Finite State Machines
Finite State Machines
Finite automata (FA) are used to produce outputs YES or NO, i.e. recognization of regular
languages only. FA can be enhanced to produce output other than “YES” or “NO” known
as finite state machine (FSM) or transducer which is used in sequential circuit design. A
finite state machine is used to represent behavior of an event-driven (reactive) system.
Inputs
State Transition
Conditions
State
Output
Conditions
Outputs
Representation of FSMs
We represent a finite state machine (FSM) in the same way as finite automaton are
represented, that is, transition graph or transition table. In transition graph, edges or arches
are labeled with Input / output and input/output is represented in transition table also. Let
us consider that in transition table, entries are defined by a function F. For example, for
input ai and state qi, function F is defined as below:
F(qi, ai)=((qi, ai), (qi, ai))
(where is transition function, is output function.)
0/1
s
1/0
Fig. 3.2 Transition Graph of FSM
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For example,
(1) Consider a finite state machine (FSM), which
changes 1’s into 0’s and 0’s into 1’s (1’s complement)
as shown in Fig. 3.2.
Transition Table:
Inputs
0 1
Present State (PS) Next State (NS) Output Next State (NS) Output
s s 1 s 0
(2) Consider the finite state machine shown in Fig. 3.3, which outputs the 2’s
complement of input binary number reading from least significant bit (LSB).
0/0 0/1
1/1
q1 q2
1/0
0 0 1 0 1
q1 q1 q1 q2 q2 q2
0 0 1 1 0
Outputs
Outputs
MOORE MACHINE
The name Moore machine comes from promoter Edward F. Moore, a state machine
pioneer. Edward Forrest Moore was a professor of mathematics and computer sciences
at the University of Wisconsin-Madison from 1966 until he retired in 1985. He was the
first person to use the type of Finite State Machine that is most commonly used today, the
Moore FSM.
Clocked sequential systems are a restricted form of Moore machine where the state
changes only when the global clock signal changes. The present state is stored in flip-flops,
and global clock signal is connected to the flip-flops. The output of this finite state
machine is dependent on present state only. A Moore machine can be described by 6-
tuple (Q, , , , , s), where
(1) Q is finite and non-empty set of states,
(2) is input alphabet,
(3) is output alphabet,
(4) is transition function which maps present state and
input symbol on to the next state or Q Q,
(5) is the output function which maps Q,
(Present stateOutput), and
(6) sQ, is the initial state or starting state.
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If Z(t), q(t) are output and present state respectively at time t, then
Z(t)= (q(t))
For example, consider the Moore machine shown in Fig. 3.4. Construct the transition table.
What is the output for the input 01010?
Output=0
0/0
1/0 s1 1/0
0/0 0/0
s0 s2
1/0 s3 Output=0
Output=0 1/1
0/1
Output=1
Since, the output of Moore machine does not depend on input. So, the first output
symbol is additional from the initial state without reading the input i.e. null input
and output length is one greater than the input length, but not included in the above
output. The input is important for the transitions and does not affect the output.
MEALY MACHINE
If the output of finite state machine is dependent on present state and present input, then
this model of finite state machine is known as Mealy machine. The name “Mealy
machine” comes from the promoter G. H. Mealy, a state machine pioneer who wrote “A
Method for Synthesizing Sequential Circuits” in 1955. A Mealy machine can be described
by 6-tuple (Q,, , ,, s), where
(1) Q is finite and non-empty set of states,
(2) is input alphabet (finite, non-empty set),
(3) is output alphabet(finite, non-empty set),
(4) is transition function which maps present state and
input symbol on to the next state or Q Q,
(5) is the output function which maps Q , ((Present
state, present input symbol)Output), and
(6) sQ, is the initial state or starting state.
If Z(t), q(t), and x(t) are output, present state, and present input respectively at time
t, then, Z(t)= (q(t), x(t)) and
For example, consider the Mealy machine shown in Fig. 3.5. Construct the transition table
and find output for input 01010.
Solution: 0/0
Transition table is constructed as follows: q1
0/1
Inputs q0 1/1
0 1 0/1
PS NS Output NS Output 1/0 q2
q0 q1 1 q2 0 1/0
q1 q1 0 q2 1
q2 q1 1 q2 0 Fig. 3.5 Mealy machine
0 1 0 1 0
q0 q1 q2 q1 q2 q1
1 1 1 1 1
So, the output is 11111. The output length is equal to the input length because it is
dependent on input also. So, number of transitions for the input decides the length of the
output.
The additional length is due to the output produced by initial state of Moore machine. Let
output symbol b is the additional output produced by the initial state of Moore machine,
then T1(w)=bT2(w)
It means, if we neglect the one initial output produced by the initial state of Moore machine
then outputs produced by both machines are equivalent. (The additional output is produced
by the initial state of (for input ) Moore machine without reading the input.)
Inputs
0 1
Present State (PS) Next State (NS) Next State (NS) Output
s q1 q2 1
q1 q3 q2 0
q2 q2 q1 1
q3 s q3 1
Inputs
0 1 q1
PS NS Output NS Output 0/1
0/0
s q1 0 q2 1
q1 q3 1 q2 1 1/1 1/0 q3
q2 q2 1 q1 0 s 0/1
q3 s 1 q3 1 1/1
1/1 q2 0/1
Theorem 3.2 If M1=(Q, , , , , s) is a Mealy machine then there exists a Moore machine
M2 equivalent to M1.
Proof: We will discuss proof in two steps:
Step 1: Construction of equivalent Moore machine M 2, and
Step 2: Outputs produced by both machines are equivalent.
Step 1: Construction of equivalent Moore machine M2:
We define the set of states as order pair over Q and . There is also a change in transition
function and output function.
Let equivalent Moore machine M2= (Q, , , , , s), where
(1) QQ is the set of states formed with order pair over Q and ,
(2) remains unchanged,
(3) remains unchanged,
(4) is defined as following:
([q, b], a)=[(q, a), (q, a)] , where and are transition function and output
function of Mealy machine.
(5) is the output function of equivalent Moore machine which is dependent on
present state only and defined as follows:
([q, b])=b
(6) s is the initial state and defined as [s, b0], where s is the initial state of Mealy
machine and b0 is any arbitrary symbol selected from output alphabet .
Step 2: Outputs of Mealy and Moore machines:
Suppose, Mealy machine M1 enters states q0, q1, q2…qn on input a1, a2, a3, …, an and
produces outputs b1, b2, b3, …, bn, then M2 enters the states [q0, b0], [q1, b1], [q2, b2], …,
[qn, bn] and produces outputs b0, b1, b2, …, bn as discussed in Step1.
Hence, outputs produced by both machines are equivalent.
Therefore, Moore machine M2 is equivalent to Mealy machine M1.
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For example, consider the Mealy machine shown in Fig. 3.7. Construct an equivalent
Moore machine. 0/y
(Since, QQ),
Fig. 3.7 Mealy Machine
(2) ={0, 1},
(3) ={n, y},
(4) s=[s, y], where s is the initial state and
y is the output symbol of Mealy machine,
(5) is defined as following:
For initial state [s, y]: ([s, y], 0)=[(s, 0), (s, 0)] =[q1, n]
([s, y], 1)=[(s, 1), (s, 1)] =[q2, n]
For state [q1, n]: ([q1, n], 0)=[(q1, 0), (q1, 0)] =[q1, y]
([ q1, n], 1)=[(q1, 1), ( q1, 1)] =[q2, n]
For state [q2, n] ([q2, n], 0)=[(q2, 0), (q2, 0)] =[q1, n]
([q2, n], 1)=[(q2, 1), (q2, 1)] =[q2, y]
For state [q1, y]: ([q1, y], 0)=[(q1, 0), (q1, 0)] =[q1, y]
([q1, y], 1)=[( q1, 1), ( q1, 1)] =[q2, n]
For state [q2, y]: ([q2, y], 0)=[(q2, 0), (q2, 0)] =[q1, n]
([q2, y], 1)=[(q2, 1), (q2, 1)] =[q2, y]
Let us conclude some important points here. We have considered those states only, which
are reachable from initial state [s, y]. Although there are six states {[s, n], [s, y], [q 1, n],
[q1, y], [q2, n], [q2, y]} because QQ. There are two possible initial states [s, y], and
[s, n] and we have considered the first one, that is, [s, y]. We can choose any one of these
two states as initial state.
(6) is defined as follows:
[s, y]=y
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1
O/P=n
O/P=n
0 1
[s, y] [q1, n] [q2, n]
0
O/P=y
0 1
1
O/P=y
0
O/P=y [q1, y] 0 [q2, y]
1
Mealy and Moore machines have well-defined semantics, which is given in following
table:
Mealy Output is a function of input and Clocked synchronous machines where state
state: transitions occur on clock edges
EQUIVALENCE OF FSMs
Two finite state machines (FSMs) are said to be equivalent if and only if every input
sequence yields identical output sequence when process by two machines.
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For example, consider the FSM M1 shown in Fig. 3.9 (a) and FSM M2 Fig. 3.9(b).
0 1
M1 s1 s2 0
1
O/P=0 O/P=1
Fig. 3.9(a) Finite State Machine
1
0 1
M2 0 0 0
s1 s2 s3 s4
1
1
O/P=0 O/P=1 O/P=1 O/P=1
Are these two FSMs equivalent? Let us check. Consider the inputs strings and
corresponding outputs of both the machines as given following:
Input string Output by M1 Output by M2
(1) 01 00 00
(2) 010 001 001
(3) 0101 0011 0011
(4) 1000 0111 0111
(5) 10001 01111 01111
Now, we come to this conclusion that for each input sequence, outputs produced by both
machines are identical. So, these machines are equivalent. In other words, both machines
do the same job. But, M1 has two states and M2 has four states. It appears that some states
of M2 are equivalent and doing the same job, producing identical outputs for same input,
and have identical transitions. Such states are known as equivalent states and require extra
resources when implemented. Thus, our goal is to find the simplest and equivalent FSM
with minimum number of states.
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The process of finding the minimum state FSM is known as optimization. Optimization is
a complex process and has non-linear time complexity.
Optimization (or minimization) of Finite State Machines (FSMs):
We minimize a FSM using the following method, which finds the equivalent states, and
merges these into one state and finally construct the equivalent FSM.
Method: (Initially we assume that all pairs (s1, s2) over states are
non-equivalent states)
Step 1: Construct the transition table.
Step 2: Repeat for each pair of non-equivalent states (s1, s2):
(a) Do s1 and s2 produce same output?
(b) Do s1 and s2 reach the same states for each input a?
(c) If answers of (a) and (b) are YES, then s1 and s2 are equivalent
states and merge these two states into one state [s1, s2] and
replace the all occurrences of s1 and s2 by [s1, s2] and mark these
equivalent states.
Step 3: Check the all-present states, if any redundancy is found, remove that.
Step 4: Exit
For example, let us consider the transition table for FSM shown in Fig. 3.9(b).
Inputs
0 1
Present State (PS) Next State (NS) Next State (NS) Output
s1 s1 s2 0
s2 s3 s1 1
s3 s4 s1 1
s4 s4 s1 1
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Solution: Pairs over {s1, s2, s3, s4} are: (s1, s2), (s1, s3), (s1, s4), (s2, s3), (s2, s4), (s3, s4).
Consider the pair (s1, s2):
Since, (s1)=0, and (s2)=1 and hence, s1 and s2 are not equivalent.
Consider the pair (s1, s3):
Since, (s1)=0, and (s3)=1 and hence, s1 and s3 are not equivalent.
Consider the pair (s1, s4):
Since, (s1)=0, and (s4)=1 and hence s1 and s3 are not equivalent.
Consider the pair (s2, s3):
Since, (s2)=1, and (s3)=1, thus outputs are identical.
Now, consider the transitions: (s2, 0)=s3, (s2, 1)=s1, (s3, 0)= s4, (s3, 1)=s1
So, transitions from s2 and s3 are not identical for input 0. Hence, s2 and s3 are not
equivalent.
Consider the pair (s2, s4):
Since, (s2)=1, and (s4)=1, thus outputs are identical.
Now, consider the transitions: (s2, 0)=s3, (s2, 1)=s1, (s4, 0)=s4 , (s4, 1)=s1
So, transitions from s2 and s4 are not on the same state for 0 input. Hence, s2 and s4 are not
equivalent.
Consider the pair (s3, s4):
Since, (s3)=1, and (s4)=1, thus outputs are identical.
Now, consider the transitions: (s3, 0)=s4, (s3, 1)=s1, (s4, 0)=s4, (s4, 1)=s1
So, transitions from s2 and s3 are identical for inputs 0 and 1. Hence, s3 and s4 are equivalent
states. So, merging states s3 and s4 into one state represented as [s3, s4] and replacing states
s3 and s4 by [s3, s4], we have intermediate transition table 1:
Intermediate transition Table 1:
Inputs
0 1
PS NS NS Output
s1 s1 s2 0
s2 [s3, s4] s1 1
[s3, s4] [s3, s4] s1 1
[s3, s4] [s3, s4] s1 1
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Applying Step 2 further on intermediate transition Table 1 and we see that states s 2, [s3,
s4] are equivalent. So, replacing states s2 and [s3, s4] by single state [s2, s3, s4], we have
intermediate transition Table 2.
Intermediate transition Table 2:
Inputs
0 1
(PS) Next State (NS) Next State (NS) Output
s1 s1 [s2, s3, s4] 0
[s2, s3, s4] [s2, s3, s4] s1 1
[s2, s3, s4] [s2, s3, s4] s1 1
[s2, s3, s4] [s2, s3, s4] s1 1
Now, there are no equivalent states in intermediate transition Table 2. So, applying Step 3
and for removing redundancy, we have to delete two rows of present state [s 2, s3, s4]. Now,
we have the final transition table.
Final transition Table 3:
Inputs
0 1
Present State (PS) Next State (NS) Next State (NS) Output
s1 s1 [s2, s3, s4] 0
[s2, s3, s4] [s2, s3, s4] s1 1
Transition Graph:
0 1
M2
s1 [s2, s3, s4] 0
1
O/P=0 O/P=1
Now, we can compare the finite state machines shown in Fig. 3.9(a) and Fig. 3.9(c) and we
find that these machines are equivalent.