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Example 2.1: 2.2 Long-Channel I-V Characteristics

The document discusses long-channel I-V characteristics of MOS transistors. It defines key metrics like Ion and Ioff and describes the transistors' behavior in different regions. An example is provided to illustrate calculating current using the long-channel model for an nMOS transistor.

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Carlos Saavedra
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959 views1 page

Example 2.1: 2.2 Long-Channel I-V Characteristics

The document discusses long-channel I-V characteristics of MOS transistors. It defines key metrics like Ion and Ioff and describes the transistors' behavior in different regions. An example is provided to illustrate calculating current using the long-channel model for an nMOS transistor.

Uploaded by

Carlos Saavedra
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© © All Rights Reserved
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2.

2 Long-Channel I-V Characteristics 67

This expression is valid for Vgs > Vt and Vds > Vdsat . Thus, long-channel MOS transistors
are said to exhibit square-law behavior in saturation.
Two key figures of merit for a transistor are Ion and Ioff . Ion (also called Idsat ) is the
ON current, Ids, when Vgs = Vds = VDD . Ioff is the OFF current when Vgs = 0 and Vds = VDD .
According to the long-channel model, Ioff = 0 and

I on =
G
(V  Vt )
2 DD
(2.9)

EQ (2.10) summarizes the current in the three regions:

¯
² 0 V gs < Vt Cutoff
²²
( )
I ds = °G VGT  Vds 2 Vds Vds < Vdsat Linear (2.10)
²
² G 2
V Vds > Vdsat Saturation
²± 2 GT

Example 2.1
Consider an nMOS transistor in a 65 nm process with a minimum drawn channel
length of 50 nm (Q = 25 nm). Let W/L = 4/2 Q (i.e., 0.1/0.05 Rm). In this process, the
gate oxide thickness is 10.5 Å. Estimate the high-field mobility of electrons to be 80
cm2/V · s at 70 ºC. The threshold voltage is 0.3 V. Plot Ids vs. Vds for Vgs = 0, 0.2, 0.4,
0.6, 0.8, and 1.0 V using the long-channel model.
SOLUTION: We first calculate G.
14 F ¹
W © cm 2 ¹ © 3.9 × 8.85 × 10 cm ©W ¹ W A
G = RC ox = ª 80 º ªª 8 º ª º = 262
L « V š s » « 10.5 × 10 cm º» « L » L V2 (2.11)

Figure 2.7(a) shows the I-V characteristics for the transistor. According to the first-order
model, the current is zero for gate voltages below Vt. For higher gate voltages, current
increases linearly with Vds for small Vds . As Vds reaches the saturation point Vdsat = VGT ,
current rolls off and eventually becomes independent of Vds when the transistor is satu-
rated. We will later see that the Shockley model overestimates current at high voltage
because it does not account for mobility degradation and velocity saturation caused by the
high electric fields.
pMOS transistors behave in the same way, but with the signs of all voltages and cur-
rents reversed. The I-V characteristics are in the third quadrant, as shown in Figure 2.7(b).
To keep notation simple in this text, we will disregard the signs and just remember that
the current flows from source to drain in a pMOS transistor. The mobility of holes in sili-
con is typically lower than that of electrons. This means that pMOS transistors provide
less current than nMOS transistors of comparable size and hence are slower. The symbols
Rn and Rp are used to distinguish mobility of electrons and of holes in nMOS and pMOS
transistors, respectively. The mobility ratio Rn /Rp is typically 2–3; we will generally use 2
for examples in this book. The pMOS transistor has the same geometry as the nMOS in
Figure 2.7(a), but with Rp = 40 cm2/V· s and Vtp = – 0.3 V. Similarly, Gn, Gp, ken, and kep are
sometimes used to distinguish nMOS and pMOS I-V characteristics.

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