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Preview: Chapter 1 Introduction

This document provides an introduction and preview to a chapter about integrated circuits and CMOS design. It discusses how the number of transistors on chips has grown exponentially and how designers rely on automation for productivity gains. The chapter will take a simplified view of CMOS transistors as switches to develop CMOS logic gates and latches. It will also explore layout design by specifying transistor locations and connections. The chapter concludes with a design example of an 8-bit MIPS microprocessor to demonstrate the concepts covered.

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Carlos Saavedra
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29 views1 page

Preview: Chapter 1 Introduction

This document provides an introduction and preview to a chapter about integrated circuits and CMOS design. It discusses how the number of transistors on chips has grown exponentially and how designers rely on automation for productivity gains. The chapter will take a simplified view of CMOS transistors as switches to develop CMOS logic gates and latches. It will also explore layout design by specifying transistor locations and connections. The chapter concludes with a design example of an 8-bit MIPS microprocessor to demonstrate the concepts covered.

Uploaded by

Carlos Saavedra
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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6 Chapter 1 Introduction

generation, designers are having to make trade-offs between improving power and
improving delay. Although the cost of printing each transistor goes down, the one-time
design costs are increasing exponentially, relegating state-of-the-art processes to chips that
will sell in huge quantities or that have cutting-edge performance requirements. However,
many predictions of fundamental limits to scaling have already proven wrong. Creative
engineers and material scientists have billions of dollars to gain by getting ahead of their
competitors. In the early 1990s, experts agreed that scaling would continue for at least a
decade but that beyond that point the future was murky. In 2009, we still believe that
Moore’s Law will continue for at least another decade. The future is yours to invent.

1.2 Preview
As the number of transistors on a chip has grown exponentially, designers have come to
rely on increasing levels of automation to seek corresponding productivity gains. Many
designers spend much of their effort specifying functions with hardware description lan-
guages and seldom look at actual transistors. Nevertheless, chip design is not software
engineering. Addressing the harder problems requires a fundamental understanding of cir-
cuit and physical design. Therefore, this book focuses on building an understanding of
integrated circuits from the bottom up.
In this chapter, we will take a simplified view of CMOS transistors as switches. With
this model we will develop CMOS logic gates and latches. CMOS transistors are mass-
produced on silicon wafers using lithographic steps much like a printing press process. We
will explore how to lay out transistors by specifying rectangles indicating where dopants
should be diffused, polysilicon should be grown, metal wires should be deposited, and
contacts should be etched to connect all the layers. By the middle of this chapter, you will
understand all the principles required to design and lay out your own simple CMOS chip.
The chapter concludes with an extended example demonstrating the design of a simple 8-
bit MIPS microprocessor chip. The processor raises many of the design issues that will be
developed in more depth throughout the book. The best way to learn VLSI design is by
doing it. A set of laboratory exercises are available at www.cmosvlsi.com to guide you
through the design of your own microprocessor chip.

1.3 MOS Transistors


Silicon (Si), a semiconductor, forms the basic starting material for most integrated circuits
[Tsividis99]. Pure silicon consists of a three-dimensional lattice of atoms. Silicon is a
Group IV element, so it forms covalent bonds with four adjacent atoms, as shown in Fig-
ure 1.7(a). The lattice is shown in the plane for ease of drawing, but it actually forms a
cubic crystal. As all of its valence electrons are involved in chemical bonds, pure silicon is a
poor conductor. The conductivity can be raised by introducing small amounts of impuri-
ties, called dopants, into the silicon lattice. A dopant from Group V of the periodic table,
such as arsenic, has five valence electrons. It replaces a silicon atom in the lattice and still
bonds to four neighbors, so the fifth valence electron is loosely bound to the arsenic atom,
as shown in Figure 1.7(b). Thermal vibration of the lattice at room temperature is enough
to set the electron free to move, leaving a positively charged As+ ion and a free electron.
The free electron can carry current so the conductivity is higher. We call this an n-type

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