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CMP 472 3 Computer Architecture 3 1 2

The document outlines a computer architecture course, including objectives, contents, and a laboratory project. The course covers topics like central processing units, control unit design, input/output organization, memory organization, RISC, pipelining techniques, and multiprocessors. Students must complete a project on computer architecture and give an oral presentation.

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0% found this document useful (0 votes)
25 views2 pages

CMP 472 3 Computer Architecture 3 1 2

The document outlines a computer architecture course, including objectives, contents, and a laboratory project. The course covers topics like central processing units, control unit design, input/output organization, memory organization, RISC, pipelining techniques, and multiprocessors. Students must complete a project on computer architecture and give an oral presentation.

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Amended Course as passed by the Subject Committee Meeting held on Feb.

29,
2004.

CMP 472.Computer Architecture (3-1-2)

Theory Practical Total


Sessional 30 20 50
Final 50 - 50
Total 80 20 100

Course objectives:
To study basic and Architecture Concepts of Computers.

Course Contents:

1. Introduction (3 hrs)
SSI and MSI circuits, VLSI Technology, mile stone in computer organization,
examples of computer families, future trends in computer.

2. Central Processing unit: Case Study (8 hrs)


Arithmetic and Logic unit, Instruction sets, Addressing modes and formats, Stack,
Processor organization, Register organization, Instruction cycle, Pentium
processor, Power PC processor.

3. Control Unit Design (8 hrs)


Micro – operations, Control of CPU, Hardwired implementation, Micro-
instruction sequencing, Micro – instruction execution, Application of micro-
programming.

4. Input/ Output Organization (6 hrs)


External devices, I/O modules, Programmed I/O, interrupt Driven I/O Direct
memory access, I/O channels and processors, External interfaces.

5. Memory organization (6 hrs)


Main memory, auxiliary memory, associative memory, virtual memory, Cache
memory, Cache memory driving forces, Cache design issues, Placement, Fetch,
Replacement & Update policies.

6. RISC (4 hrs)
RISC and CISC systems, RISC instructions, Processor to memory movement,
Pipelining, RISC pipelining, Pipeling Hazards.

7. Pipelining Techniques (7 hrs)


Parallel processing, introduction to pipelining, arithmetic pipelining, instruction
pipeling, RISC pipeling Hazards.
8. Multiprocessors (3 hrs)
Characteristics of multiprocessors, Flynn’s Enslow’s classification,
interconnection structures, cache coherence.

Laboratory:
The student should develop a project on computer Architecture. The topic could
be either initiated by the student or selected from a list provided by the instructor.
An oral presentation with a demonstration should be part of the laboratory project
report.

Reference Books:
1. W. Staling, Computer Organization and Architecture 17 edition. Prentice- Hall
India Limited. New Delhi.

2. A.J. Vande Goor, Computer Architecture and Design, Addison Wesley:


Workingham. UK. 1989.
3. A.S.Tanenbaum, Structured Computer Organization, prentice Hall Indial Limited
new Delhi.

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