• TEXAS

INSTRUMENTS

F Logic
(SN54174F)

989 1989
 11II
~G_e_n_e_r_a_I_ln_fo_r_m_a_t_io_n________________..

~D_a_t_a_S_h_e_e_ts____________________~E1II

Application Report

~M__e_c_ha_n_i_c_al_D__at_a__________________~F_~1I
 F Logic
Data Book

2nd Edition

TEXAS
INSTRUMENTS
 IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to or to
dis continua any semiconductor product or service identified in this
publication without notice. TI advises its customers to obtain the latest
version of the relevant information to verify, before placing orders,
that the information being relied upon is current.
TI warrants performance of its semiconductor products to current
specifications in accordance with Tl's standard warranty. Testing and
other quality control techniques are utilized to the extent TI deems
necessary to support this warranty. Unless mandated by government
requirements, specific testing of all parameters of each device is not
necessarily performed.
TI assumes no liability for TI applications assistance, customer product
design, software performance, or infringement of patents or services
described herein. Nor does TI warrant or represent that any license,
either express or implied, is granted under any patent right, copyright,
mask work right, or other intellectual property right of TI covering or
relating to any combination, machine, or process in which such
semiconductor products or services might be or are used.
Information contained in this databook supersedes all data for this
technology published by TI in the United States of America before
January 1989.

Copyright © 1988. Texas Instruments Incorporated

Printed in U.S.A.
Revised January 1989
SDFD001A
 INTRODUCTION

In this volume, Texas Instruments presents technical information on the SN54F/SN74F TTL logic family. The
combination of the SN54F/SN74F family with Texas Instruments other advanced families of TTL integrated
circuits, Advanced Low-Power Schottkyt (ALS) and Advanced Schottky (AS), offers the industry the broadest
spectrum of advanced bipolar logic products available from any supplier. In addition, the SN54F/SN74F TTL
logic family provides the system designer with a pin-for-pin compatible alternate source for 54F/74F devices
in standard 300-mil plastic dual-in-line packages (DIPs) along with plastic "small outline" (SO) packages, ceramic
chip carriers, and ceramic DIPs. Texas Instruments offers all of the above packages with the service levels,
quality, and reliability that users have come to expect in a logic family.

The SN54F/SN74F TTL data sheets have been configured for ease of use. They stand alone and require a minimum
of reference to other sections for supporting information. Each data sheet has complete absolute maximum
ratings, recommended operating conditions, timing requirements (if applicable), and electrical characteristics.
The input/output loading and fan-out characteristics of each circuit are specified in terms of actual load-current
value in amperes. Pin-outs are specified using Texas Instruments TTL name conventions.

The following definitions are for the system design engineer who prefers to use unit loads. One unit load in
the high state is defined to be 20 microamperes. One unit load in the low state is defined to be 0.6 milliamperes.

Logic symbols prepared in accordance with IEEE and lEe standards, logic diagrams, and pinout assignments
are provided for all SN54F/SN74F TTL devices. The logic diagrams are provided for the understanding of the
logic operation of the device and should not be used to estimate propagation delays. Package dimensions given
in the Mechanical Data section of this book are in metric measurements with inches in parenthesis. This is to
simplify board layout for designers involved in metric conversion and new designs.

The Texas Instruments SN54F/74F TTL logic family offers several new SN54F/SN74F logic devices. Included
among the new functions are:
'F286 9-bit parity generator with bus driver parity I/O port
'F518, 'F519, 'F520 8-bit identity comparators with input pull-up resistors and open-
collector outputs
'F621, 'F622 Open-collector octal-bus transceivers.
The devices offered can be characterized into distinct logic functions that address several different application
areas. The following functional group table summarizes these groups and lists specific application areas that
the functions address.

tThe integrated Schottky-barrier diode-clamped transistor is patented by Texas Instruments Incorporated (U.S. Patent Number 3,463,975),

v
 FUNCTIONAL GROUPS

FUNCTION APPLICATIONS
Binary/Decade Counters Synchronous dividers and multipliers
Timing circuits and state machine sequencers
Pulse and sync generation
Code conversion circuits
Analog-ta-digital and digital-ta-analog conversion circuits
Modulo-n event counters and rate multipliers

Decoders Memory, board, processor, and component enable generation

Minterm generation and data-flow control
Clock phase splitter and decoder trees
Demultiplexing for clock distribution and scanning switch encoders
Program counters and digital-display systems

Dual Flip-Flops Extra register bits (e.g., guard bits and carry bits)
Synchronizing asynchronous inputs, interrupts, and control signals
Finite or algorithmic state machine "state" bits
Customized modulo-n event counters

Gates Combinational logic

Identity Comparators Peripheral and board enables, address decodes, and cache tag comparisons
Page memory boundary detection, page fault detection, and error detection and correction

Multiplexers/Demultiplexers Implementing combinational logic (function) tables

Data flow control and parallel-to-serial converters
Multiplexing trees, asynchronous shifting, and sorting

Octal Buffers/Transceivers Error detection and correction circuits

Hamming code generation

Octal Flip-Flops Bus interface, pipeline registers, and customized shift registers
Ring counters, Johnson counters, pattern generators, and custom modulo-n event counters
Synchronizing asynchronous inputs, interrupts, and control signals

Shifters/Shift Registers Serial-to-parallel conversion or parallel-to-serial conversion

Clock phase generation, custom counters, and random-number generators
Pipeline registers, accumulators, and digital filters
On-board diagnostics and multiply and divide by 2'* *N
CPU desig'n and array processors

This volume provides design and specification data for SN54F/SN74F TTL components. Complete technical
data for any TI semiconductor product is available from the nearest TI field sales of ice , local authorized TI
distributor, or directly by writing to:
Marketing and Information Services
Texas Instruments Incorporated
P.O. Box 655012, MS 308
Dallas, Texas 75265

vi
 ATTENTION

Stresses beyond those listed under "absolute maximum ratings" may

cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other condition
beyond those indicated under "recommended operating conditions"
is not implied. Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability.

vii
General Information

1-1
II
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Contents

Numerical Index" ............ ; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..

Page
1-3

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Glossary- TTL Symbols, Terms, and Definitions. . . . . . . . . . . . . . . . . . . ..
Explanation of Function Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
Functional Testing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
1-5
1-9
1-11
Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1-12
....
S"
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Parameter Measurement Information ............................. 1-13

3
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 NUMERICAL INDEX

SN54FOO ......... SN74FOO ........ 2-3 SN54F243 .......... SN74F243 ........... 2-136
SN54F02 ......... SN74F02 ........ 2-5 SN54F244 ......... SN74F244 ........... 2-139
SN54F04 ......... SN74F04 ........ 2-7 SN54F245 ........... SN74F245 ........... 2-143
SN54F08 ............ SN74F08 ....... 2-9 SN54F251A ......... SN74F251A . ........ 2-147
SN54F09 ............ SN74F09 ............ 2-11 SN54F253 ........... SN74F253 ........... 2-151
SN54Fl0 ............ SN74Fl0 ............ 2-13 SN54F257 ........... SN74F2S7 ........... 2-155
SN54Fll ............ SN74Fll ............ 2-15 SN54F258 ........... SN74F258 ........... 2-159
SN54F20 ............ SN74F20 ............ 2-17 SN54F260 ........... SN74F260 ........... 2-163
SN54F21 ............ SN74F21 ............ 2-19 SN54F273 ........... SN74F273 ........... 2-165
SN54F27 ............ SN74F27 ............ 2-21 SN54F280B .......... SN74F280B .......... 2-189 C
SN54F30 ............ SN74F30 ............ 2-23 SN54F283 ........... SN74F283 ........... 2-173 0
SN54F32 ............ SN74F32 ............ 2-25 SN54F286 ........... SN74F286 ........... 2-177 ';::
ca
SN54F36 ............ SN74F36 ............ 2-27 SN54F299 ........... SN74F299 ........... 2-181

..E
-
SN54F37 ............ SN74F37 ............ 2-29 SN54F323 ........... SN74F323 ........... 2-187
SN54F38 ............ SN74F38 ............ 2-31 SN54F350 ........... SN74F350 ........... 2-193
SN54F40 ............ SN74F40 ............ 2-33 SN54F352 ... SN74F352 ........... 2-197 0
SN54F51 ............ SN74F51 ............ 2-35 SN54F353 ...... SN74F353 ........... 2-201
SN54F64 ............ SN74F64 ............ 2-37 SN54F373 ........... SN74F373 ........... 2-205 .5
SN54F74 ............
SN54F86 ............
SN54Fl09 ...........
SN54F112 ...........
SN54F113 ...........
SN74F74 ............
SN74F86 ............
SN74Fl09 ...........
SN74Fl12 ...........
SN74Fl13. ..........
2-39
2-43
2-45
2-49
2-53
SN54F374 ...........
SN54F377 ...........
SN54F378 ...........
SN54F379 ...........
SN54F381 ...........
SN74F374 ...........
SN74F377 ...........
SN74F378 ...........
SN74F379 ...........
SN74F381 ...........
2-209
2-213
2-217
2-221
2-225
..
'ii
CD
C
SN54FI14 ........... SN74FI14 ........... 2-57 SN54F382 ........... SN74F382 ........... 2-231 CD
SN54F125 ...........
SN54F126 ...........
SN74F125 ...........
SN74F126. " " ' , ....
2-61
2-65
SN54F518 ...........
SN54F519 ...........
SN74F518 ...........
SN74F519 ...........
2-237
2-237
0
SN54F138 ........... SN74F138 ........... 2-69 SN54F520 ........... SN74F520 ........... 2-241
SN54F139 ........... SN74F139 ........... t SN54F521 ........... SN74F521 ........... 2-241
SN54F148 ........... SN74F148 ..... t SN54F533 ........... SN74F533 ........... 2-245
SN54F151A ......... SN74F151A 2-73 SN54F534 ........... SN74F534 ........... 2-249
SN54F153 ........... SN74F153 ........ 2-77 SN54F540. .......... SN74F540 ........... 2-253
SN54F157A ....... , . SN74F157A 2-81 SN54F541 ........... SN74F541 ......... , . 2-257
SN54F158A ......... SN74F158A . ........ 2-85 SN54F543 ........... SN74F543 ........... 2-261
SN54F160A ......... SN74F160A . ........ 2-89 SN54F544 ........... SN74F544 ........... 2-265
SN54F161A ......... SN74F161A . ........ 2-97 SN54F563 ........... SN74F563 ........... 2-269
SN54F162A ..... , ' .. SN74F162A 2-89 SN54F564 ........... SN74F564 ........... 2-273
SN54F163A . , ' .. , ... SN74F163A . ' , . , . , .. 2-97 SN54F568 ........... SN74F568 ........... 2-277
SN54F166 ........... SN74F166 ........... 2-105 SN54F569 ........... SN74F569 ........... 2-277
SN54F168 ........... SN74F168 ........... 2-111 SN54F573 ........... SN74F573 ........... 2-287
SN54F169 ........... SN74FI69 ........... 2-111 SN54F574 ........... SN74F574 ........... 2-291
SN54F174 ........... SN74F174 ........... 2-121 SN54F620 ........... SN74F620 ........... 2-295
SN54F175 ........... SN74F175 ........... 2-125 SN54F621 ........... SN74F621 . .......... 2-295
SN54F240 ........... SN74F240 ........... 2-129 SN54F622 ...... SN74F622 ........... 2-295
SN54F241 ........... SN74F241 ........... 2-129 SN54F623 ........... SN74F623 ........... 2-295
SN54F242 ........... SN74F242 ........... 2-135 SN54F657 ........... SN74F657 ........... 2-305

tFor more information on these devices, contact the factory.

INSTRUMENlS
TEXAS .Jf 1-3
POST OFFICE BOX 655012 • DALLAS, TEXAS 75266
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1-4
 GLOSSARY
TTL SYMBOLS, TERMS, AND DEFINITIONS

INTRODUCTION
These symbols, terms, and definitions are in accordance with those currently agreed upon by the JEDEC
Council of the Electronic Industries Association (EIA) for use in the USA and by the International

II
Electrotechnical Commission (lEC) for international use.

OPERATING CONDITIONS AND CHARACTERISTICS (IN SEQUENCE BY LETTER SYMBOLS)

f max Maximum clock frequency

The highest rate at which the clock input of a bistable circuit can be driven through its required
sequence while maintaining stable transitions of logic level at the output with input conditions
established that should cause changes of output logic level in accordance with the specification.

ICC Supply current

The current into' the VCC supply terminal of an integrated circuit.

ICCH Supply current, outputs high

The current into' the VCC supply terminal of an integrated circuit when all (or a specified number)
of the outputs are at the high level.

ICCL Supply current, outputs low

The current into' the VCC supply terminal of an integrated circuit when all (or a specified number)
of the outputs are at the low level.

IIH High-level Input current

The current into' an input when a high-level voltage is applied to that input.

IlL Low-level Input current

The current into' an input when a low-level voltage is applied to that input.

10H High-level output current

The current into' an output with input conditions applied that, according to the product
specification, will establish a high level at the output.

10L Low-level output current

The current into' an output with input conditions applied that, according to the product
specification, will establish a low level at the output.

lOS Short-circuit output current

The current into' an output when that output is short-circuited to ground (or other specified
potential) with input conditions applied to establish the output logic level farthest from ground
potential (or other specified potentia\).

10ZH Off-stata (high-impedence-state) output current (of a three-state output) with high-level voltege
applied
The current flowing into' an output having three-state capability with input conditions established
that, according to the production specification, will establish the high-impedance state at the output
and with a high-level voltage applied to the output.
NOTE: This parameter is measured with other input conditions established that would cause the
output to be at a low level if it were enabled .

• Current out of a terminal is given as a negative value.

TEXAS . " 1-5

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 GLOSSARY
TTL SYMBOLS. TERMS. AND DEFINITIONS

IOZl Off-state (high-impedance-state) output current (of a three-state output) with low-level voltage
applied
The current flowing into * an output having three-state capability with input conditions established
that, according to the product specification, will establish the high-impedance state at the output
and with a low-level voltage applied to the output.
NOTE: This parameter is measured with other input conditions established that would cause the
output to be at a high level if it were enabled.
G')
(1)

..
:::s
(1)

!.
ta Access time
The time interval between the application of a specified input pulse and the availability of valid
signals at an output.

S"
.... tdis Disable time (of a three-state or open-collector output)

..3
0 The propagation time between the specified reference points on the input and output voltage

..o·
waveforms with the output changing from either of the defined active levels (high or low) to a
high-impedance (off) state.
m NOTE: For 3-state output, tdis = tpHZ or tPLZ. Open-collector outputs will change only if they
are low at the time of disabling so tdis = tPLH. .
:::s
ten Enable time (of a three-state or open-collector output)
The propagation time between the specified reference points on the input and output voltage
waveforms with the output changing from a high-impedance (off) state to either of the defined
active levels (high or low).
NOTE: In the case of memories, this is the access time from an enable input (e.g., G). For 3-state
outputs, ten = tPZH or tPZL. Open-collector outputs will change only if they are responding
to data that would cause the output to go low so ten = tPHL.

th Hold time
The time interval during which a signal is retained at iI specified input terminal after an active
transition occurs at another specified input terminal.
NOTES: 1. The hold time is the actual time interval between two signal events and';s determined
by the system in which the digital circuit operates. A minimum value is specified that
is the shortest interval fot which correct operation of the digital circuit is guaranteed.
2. The hold time may have a negative value in which case the minimum limit defines
the longest interval (between the release of the signal and the active transition) for
which correct operation of the digital circuit is guaranteed.

tpd Propagation delay time

The time between the specified reference points on the input and output voltage waveforms with
the output changing from one defined level (high or low) to the other defined level. (tpd = tpHL
or tpLH).

tpHl Propagation delay time. high-to-Iow level output

The time between the specified reference points on the input and output voltage waveforms with
the output changing from the defined high level to the defined low level.

tPHZ Disable time (of a three-state output) from high level

The time interval between the specified reference points on the input and output voltage waveforms
with the three-state output changing from the defined high level to a high-impedance (off) state.

* Current out of a terminal is given as a negative value.

1-6 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 666012 • DAll~S, TEXAS 75265
 GLOSSARY
TTL SYMBOLS, TERMS, AND DEFINITIONS

tPLH Propagation delay time. low-to-high-Ievel output

The time between the specified reference points on the input and output voltage waveforms with
the output changing from the defined low level to the defined high level.

tPLZ Disable time lof a three-state output) from low level

The time interval between the specified reference points on the input and output voltage waveforms
with the three-state output changing from the defined low level to a high-impedance (off) state.
c
tpZH Enable time lof a three-state output) to high level "';;
o
The time interval between the specified reference points on the input and output voltage waveforms ca
with the three-state output changing from a high-impedance loff) state to the defined high level. E
...
tpZL Enable time lof a three-state output) to low level .E
The time interval between the specified reference points on the input and output voltage waveforms .5
with the three-state output changing from a high-impedance loff) state to the defined low level.
m
...CD
tsr Sense recovery time
The time interval needed to switch a memory from a write mode to a read mode and to obtain C
CD
valid data signals at the output. ~
tsu Setup time
The time interval between the application of a signal at a specified input terminal and a subsequent
active transition at another specified input terminal.
NOTES: 1. The setup time is the actual time interval between two signal events and is determined
by the system in which the digital cirucit operates. A minimum value is specified that
is the shortest interval for which correct operation of the digital circuit is guaranteed.
2. The setup time may have a negative value in which case the minimum limit defines
the longest interval (between the active transition and the application of the other
signal) for which correct operation of the digital circuit is guaranteed.

tw Pulse duration Iwidth)

The time interval between specified reference points on the leading and trailing edges of the pulse
waveform.

VIH High-level input voltage

An input voltage within the more positive (less negative) of the two ranges of values used to
represent the binary variables.
NOTE: A minimum is specified that is the least-positive value of high-level input voltage for which
operation of the logic element within specification limits is guaranteed.

VIK Input clamp voltage

An input voltage in a region of relatively low differential resistance that serves to limit the input
voltage swing.

VIL Low-level input voltage

An input voltage level within the less positive (more negative) of the two ranges of values used
to represent the binary variables.
NOTE: A maximum is specified that is the most-positive value of low-level input voltage for which
operation of the logic element within specification limits is guaranteed.

. TEXAS'" 1-7
INSTRUMENTS
POST OFFICE BOX 666012 • DAL-LAS, TEXAS 75265
 GLOSSARY
TTL SYMBOLS, TERMS, AND DEFINITIONS

VOH High-level output voltage

The voltage at an output terminal with input conditions applied that, according to the product
specification, will establish a high level at the output.

VOL Low-level output voltage

The voltage at an output terminal with input conditions applied that, according to the product
specification, will establish a low level at the output.
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1-8 TEXAS ."

INSTRUMENlS
POST O"FFICE BOX 855012 • DALLAS. TEXAS 7528&
 EXPLANATION OF FUNCTION TABLES

The following symbols are used in function tables on TI data sheets:

H high level (steady state)

L
t
low level (steady state)
transition from low to high level
II
..
,J. transition from high to low level
c
value/level or resulting value/level is routed to indicated destination o
'
f' value/level is re-entered CIS
...E
-
X irrelevant (any input, including transitions)
Z off (high-impedance) state of a 3-state-output o
a .. h the level of steady-state inputs at inputs A through H respectively .5
00
00
level of 0 before the indicated steady-state input conditions were establ ished
complement of 00 or level of n before the indicated steady-state input conditions were establ ished
...
'ii
CD
C
On level of 0 before the most recent active transition indicated by ,J. or t CD
JL one high-level pulse (!)
""Lf one low-level pulse
TOGGLE each output changes to the complement of its previous level on each active transition indicated by
,J. or t_

If, in the input columns, a row contains only the symbols H, L, and/or X, this means the indicated output is valid when-
ever the input configuration is achieved and regardless of the sequence in which it is achieved. The output persists so
long as the input configuration is maintained.

If, in the input columns, a row contains H, L, and/or X together with t and/or ,J., this means the output is valid when-
ever the input configuration is achieved but the transition(s) must occur following the achievement of the steady-state
levels. If the output is shown as a level (H, L, 00, or 00), it persists so long as the steady-state input levels and the
levels that terminate indicated transitions are maintained. Unless otherwise indicated, input transitions in the opposite
direction to those shown have no effect at the output. (If the output is shown as a pulse,]"Lor 1J.the pulse
follows the indicated input transition and pprsists for an interval dependent on the circuit.)

TEXAS ..., 1-9

INSTRUMENTS
POST OFt=ICE BOX 855012 • OAll.AS, TEXAS 15265
 EXPLANATION OF FUNCTION TABLES

Among the most complex function tables in this book are those of the shift registers .. These embody most of the
symbols used in any of the function tables, plus more. Below is the function table of a 4·bit bidirectional universal
shift register, e.g., type SN74194.

FUNCTION TABLE
INPUTS OUTPUTS

en
CD
CLEAR
MODE
S1So CLOCK
SERIAL
LEFT RIGHT A
PARALLEL
B C D
aA aB ac aD
::::s L X X X X X X X X X L L I.- L
CD
H X X l.- X X X X X X aAO aBO aCO aDO
D1 H H H I X X a b c d a b c d
H L H I X H X X X X H aAn aBn aCn
5'
..3
.....
o
H
H
H
L
H
H
H
L
L
I
I
I
X
H
L
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
aBn
aSn
L aAn
aCn
aS n
aOn
aCn aOn
aCn
H
L

....m H L L X X X X X X X aAO aSO aCO aDO

0'
::::s The first line ofthe table represents a synchronous clearing of the register and says that if clear is low, all four outputs
will be reset low regardless of the other inputs. In the following lines, clear is inactive (high) and so has no effect.

The second line shows that so long as the clock input remains low (while clear is high), no other input has any effect
and the outputs maintain the levels they assumed before the steady-state combination of clear high and clock low
was established. Since on other lines of the table only the rising transition of the clock is shown to be active, the
second line implicitly shows that no further change in the outputs will occur while the clock remains high or on the
high-to-Iow transition of the clock.

The third line of the table represents synchronous parallel loading of the register and says that if S 1 .and SO are both
high, then without regard to the serial input, the data entered at A will be at output OA, data entered at B will be
at OB, and so forth, following a low-to-high clock transition.

The fourth and fifth lines represent the loading of high- and lOW-level data, respectively, from th~ shift-right serial
input and the shifting of previously entered data one bit; data previously at OA is now at OB, the previous levels of
OB and Oc are now at Oc and OD respectively, and the data previously at OD is no longer in the register. This entry
of serial data and shift takes place on the low-to-high transition of the clock when S 1 is low and s6 is high and the
levels at inputs A through D have no effect.
,.
The sixth and seventh lines represent the loading of high- and low-level data, respectively, from the shift-left serial
input and the shifting of previously entered data one bit; data previously at OB is now at OA, the previous levels of
Oc and QD are now at OB and OC, respectively, and the data previously at OA is no longet in the register. This entry
of serial data and shift takes place on the low-to-high transition of the clock when S 1 is high and SO is low and the
levels at inputs A through D have no effect.

The last line shows that as long as both mode inputs are low, no other input has any effect, and as in the second
line, the outputs maintain the levels they assumed before the steady-state combination of clear high and both mode
inputs low was established.

1-10
TEXAS -I!}
INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS, TEXAS 75265
 FUNCTIONAL TESTING

functional testing
Functional testing is performed on all logic devices by the execution of a set of functional patterns located
in the test program. These patterns are used to guarantee conformance to the truth table and simulate
operation in an actual system.

Problems are frequently discovered in functional testing when VIH min and Vil max are used as the input
conditions to exercise the function table. VIH min and Vil max are input conditions that are used in
parametric testing. The problems occur because of the noise that is present on the test heads of automated
..
'
c
o
test equipment with long cables. Parametric test such as VOH, Val, lOZH, or lOZl are done at a relatively
slow repetition rate, and any noise that is present on the test head will have settled out before the outputs.
are measured. But during functional testing, the outputs are sensed much sooner, before the noise on
.
"l-
ca
E
o
the the inputs has settled out and the output has reached its final and correct state.
.E
The functional patterns that are applied to the device under test are O-volt to 3-volt transitions as defined
in the parameter measurement section. The use of VIH = 3 volts and VIL = 0 volts during functional
testing does not imply that the devices are noise sensitive since the environment that the device sees
on a system's printed circuit board is much less severe than a noisy production test environment. Therefore,
VIH min and VIL max should not be used to test functionality of 54/74 devices.

TEXAS ." 1-11

INSTRUMENTS
POST OFFICE BOX 656012. DALLAS, TEXAS 75265
 -
THERMAL INFORMATION

In digital system design, consideration must be given JUNCTION-TO-AMBIENT THERMAL RESISTANCE

to thermal management of components. The small VI
size of the "small outline" package makes this even ~ AIR VELOCITY
more critical. Figure shows the thermal resistance of ~ 130r---~--~----~---r---'--~
.I 14-PIN D PACKAGE
these packages for various rates of air flow.
1 120r---+--7~---r---r---+~~
18-PlN D PACKAGE
The thermal resistances in Figure 1 can be used to I 110~~~?-~---20~_-Pl-N-D-W~PA-C-K+A-G-E~
G) approximate typical and maximum virtual junction II! 100 ......,~.....,~f-----'f-----+--+----j
90~~~~~--+---+---+-~
CD temperatures for the SN54F/SN74F Family. In
:::::J )
CD general; junction temperature for any device can be
!. calculated using Equation 1.
I 80

5"
..3
0-
TJ

where
= R8JA (Vcc • ICC + N.IOL· Vall + TA

TJ = virtual junction temperature

(1)
i 70r-~~~d---~~~~~-----j

:r---~~+-~~~~--+-~

a
o·
R6JA = thermal resistance, junction to
30~--~--~--~----~--~---~
:::::J
ambient air
VCC = supply voltege (5 V for typical, 5.5 V iI 0 100 200 300 400 liDO 800
Air Veloclty-Faat/Mln
for maximum)
ICC = supply current FIGURE 1
N = the number of outputs
IOL = the low-level output current
VOL =the low-level output voltage
T A = the ambient air temperature

Typical junction temperature can be calculated using Equation 1 directly with typical values of ICC taken from
the data sheets and VCC = 5 volts. To calculate maximum junction temperature, it is necessary to take into
account the spread of ICC values for a population. Due to the specification practices that have been followed,
it is useful to use slightly different calculations for SN54F and SN74F devices.
Maximum junction temperature for SN54 parts can be calculated using Equation 1 with ICC being the maximum
value specified on the data sheet and VCC = 5.5 volts. In fact, ICC for Series 54 devices at the temperature
extremes of -55°C to 125°C will be higher than for a SN74F device at the temperature extremes of ooC
to 70°C.
The SN54F/74F family data sheets give a single maximum value for ICC. If that value is used to calculate
maximum junction temperature for SN74F devices, an unrealistically high value will result. Instead, Equation 2
can be used. This uses the factor 1.31 to scale the typical value of ICC up to a practical maximum value for
process variations and thermal effects.
Thus, for SN74F devices:

TJmax = R6JA (5.5.1.31.ICCtyp + N.IOL,VoLl + TA (2)

1-12
TEXAS ..,
INSTRUMENTS
POST OFFICE BOX 655012. DALLAS. TeXAS 75285
 PARAMETER MEASUREMENT INFORMATION

SERIES SN54F/SN74F DEVICES

FROM OUTPUT~TEST 7 V (tpZL. tpLZ. O.C.)

UNDER TEST POINT
1~OPEN
CL
ISee Note A)
R,

FIGURE 1. LOAD CIRCUIT FOR

FROM OUTPUT
TEST
UNDER TEST -~"'''-'''''''-POINT
S, (ALL OTHER)
II c
o
TOTEM-POLE OUTPUTS (See Note A) R2 ';
FIGURE 2. LOAD CIRCUIT FOR THREE STATE
RL - R' - R2
......oE
AND OPEN-COLLECTOR OUTPUTS .5

TIMING ./. 3 V
HIGH.~----3V
_t ..
n;
Q)
INPUT _ _ _ _ 4_'.:..5:-_____ 0 V LEVEL
PULSE I
'.5 V
w
'.5
_V_I
I OV
C
Q)
(See Note C) ~
... t su ""'" th-et
:e--- tw ~
----.......L-'.5 V --,.5 v.v-
LOW- 3 V
~
' -:----3V
DATA '.5 V '.5 V LEVEL
INPUT 0 V PULSE ~---OV
A. SETUP AND HOLD TIMES B. PULSE WIDTHS

INPUT
(See Note C)....It
-i, . 5 V \, 5 V
I
----3V
. 0 V
OUTPUT
CONTROL ~.
(LOW-LEVEL
I
"1\".5 V'I~~V __ O V
3 V

tPLH~ ~tPHL ENABLE) ,----

i1-'o;~ tpZL ~
iII ~
'pi
IN-PHASE " VOH !e---*-tPLZ
OUTPUT : '.5 V
, VOL II
tPHL ~ I4----*- tpLH WAVEFORM' ,x..
I l\
I -*- -
3.5V

OUT-OF-PHASE \1,.5 V ~ VOH (Sae Notes B and E)

I I I - f VOL
OUTPUT • '~fJ~ VOL . ..I.o.......J 0.3 V
(See Notes 0 and E) tpZH --,..----., tpHZ --it-+! 0.3 V
, -* -VOH
~ov
C. PROPAGATION DELAY TIMES WAVEFORM 2
(S88 Notes B and E) ".5V

D. THREE-STATE OUTPUT ENABLE TIMES

FIGURE 3. VOLTAGE WAVEFORMS

NOTES: A. CL includes probe end jig capacitance.
B. Waveform' is for an output with Internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with Internal conditions such that the output is high axcept when disabled by the output control.
C. All input pulses have the following characteristics; PRR = , MHz. tr = tf :S 2.5 ns. duty cycla = 50%.
D. When measuring propagation delay times of three-state outputs. switch 5' is open.
E. The outputs are measured one at a time with one transition per measurement.

TEXAS . " 1-13

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 -

1-14
~D_a_t_a_S_h_e_e_ts____________________~f1ll

2-1
I

2-2
 SN54FOO, SN74FOO
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
02932. MARCH 1987-REVISEO JANUARY 1989

• Package Options Include Plastic "Small SN54FOO ... J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74FOO ... D OR N PACKAGE
and Standard Plastic and Ceramic 300-mil (TOP VIEWI
DIPs 1A VCC
• Dependable Texas Instruments Quality and 1B 4B
Reliability 1Y 4A
2A 4Y
description 2B 38
2Y 3A
These devices contain four independent 2-input GND 3Y
NAND gates. They perform the Boolean
functions Y = A·B or Y = A+B in positive
SN54FOO ... FK PACKAGE
logic.
(TOP VIEW)
The SN54FOO is characterized for operation over U
the full military temperature range of - 55 °e to ~~~~~
125°e. The SN74FOO is characterized for
3 2 1 2019
operation from ooe to 70 oe.
1Y 4 18 4A
FUNCTION TABLE (each gate) NC 5 17 NC
2A 6 16 4Y
INPUTS
A
H
B
H
OUTPUT
Y
L
NC
2B 8 14
NC
38 ...
CI)

CD
9 1011 12 13 CD
L X H ~
X L H >-cu>-<e
<'<ZZMM en
logic symbol t
C!J

NC - No internal connection
...asas
C
logic diagram (positive logic)
1A
1B
l A = = D - 1Y
2A 18
2B
3A
2A~_~2Y
28~
38
4A 3A~3Y
38~
48

4 A = = D - 4Y
t This symbol is in accordance with ANSI/IEEE Std 91-1984 and 4B
lEe Publication 61 7 -1 2.
Pin number. shown are for D. J. and N packages.

PRODUCTIO. DATA do••_ oolltlln Information Copyright © 1987, Texas Instruments Incorporated
doto. Pradvctl .onto... to
..",nt " of ptdollcotl••
_lfIootI... por tile 11l11li of T_ lal1nl..anll
TEXAS . .
=~..;ai~~"'li =::r:.,==~ Rot INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS, TEXAS 76286
2-3
 SN54FOO, SN74fOO
QUADRUPLE 2·INPUT POSITIVE·NAND GATES

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54FOO.. . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74FOO ............................. ooe to 70°C
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54FOO SN74FOO
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil Low-level input voltage O.B O.B V
11K Input clamp current -lB -lB mA
IOH High-level output current -1 -1 mA
IOl Low-level output current 20 20 mA
C
m
r+
TA Operating free-air temperature -55 125 0 70 °e

m
electrical characteristics over recommended operating free-air temperature range (unless otherwise
rn noted)
:'
CD SN54FOO SN74F00
CD PARAMETER TEST CONDITIONS UNIT
r+ MIN TYP* MAX MIN TYP* MAX
fII
VIK Vee = 4.5 V. II = -lB mA -1.2 -1.2 V
Vee - 4.5 V. IOH = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, IOH = -1 mA 2.7
VOL Vee = 4.5 V, IOl = 20 mA 0.30 0.5 0.30 0.5 V
II Vee - 5.5 V, VI - 7 V 0.1 0.1 mA
IIH Vee = 5.5 V, VI = 2.7 V 20 20 p.A
III Vee = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
IOS§ Vee = 5.5 V, Vo = 0 -60 -150 -60 -150 rnA
leeH Vee - 5.5 V, VI - 0 1.9 2.8 1.9 2.8 mA
leel Vee = 5.5 V, VI = 4.5 V 6.B 10.2 6.8 10.2 rnA

switching characteristics (see Note 1)

vec = 5V. VCC - 4.5 V to 5.5 v,
Cl = 50pF, CL - 50 pF,
FROM TO Rl = 500Q, RL - 500 D,
PARAMETER UNIT
(INPUT! (OUTPUT) TA = 25°C TA - MIN to MAX'
'FOO SN54FOO SN74FOO
MIN TYP MAX MIN MAX MIN MAX
tpLH AorS Y 1.6 3.3 5 1.2 7 1.6 6 ns
tpHl AorS y 1 2.8 4.3 1 6.5 1 5.3 ns

*All typical values are at Vce= 5 V, TA = 25°C.

§ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Condition •.
NOTE1: load circuits and waveforms are shown in Section 1.

2-4 TEXAS •
INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS, TeXAS 75265
 SN54F02. SN74F02
QUADRUPLE 2·INPUT POSITIVE·NOR GATES
02932. MARCH 1987-REVISED JANUARY 1989

• Package Options Include Plastic "Small SN54F02 ... J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F02 ... 0 OR N PACKAGE
and Standard Plastic and Ceramic 300·mil (TOP VIEW)
DIPs
1Y Vee
• Dependable Texas Instruments Quality and 1A 4Y
Reliability 18 48
2Y 4A
description 2A 3Y
28 38
These devices contain four independent 2-input
......._ _...r- 3A
NOR gates. They perform the Boolean functions
y = A+B or Y = A.a
in positive logic. SN54F02 ... FK PACKAGE
The SN54F02 is characterized for operation over (TOP VIEW)
the full military temperature range of - 55°C to U
<J:>-U U>-
125°C. The SN74F02 is characterized for _.-z>v
operation from ooe to 70°C.

•
3 2 1 2019
4 18
FUNCTION TABLE (each gete)
5 17
INPUTS OUTPUT 6 16
A
H
X
B
X
H
Y
L
L
7
8
9 10 111213
15
14 ...
II)
Q)
Q)
L L H .c
U)
logic symbol t
NC - No internal connection ...
CIS
CIS
lA
(21 ;;'1 o
(31 logic diagram (positive logic)
18
(5)
2A
(6) lA-""-.
28
(8)
'B~'Y
3A
(9)
38 2A-""-.
4A
(111 2B~2Y
(12)
48
3 A = D o - 3Y
tThis symbol is in accordance with ANSIIIEEE Std 91-1984 and 3B
lEe Publication 617-12.
Pin numbers shown are for D. J. and N packages. 4A~4Y
4B~

PRODueTIO. OATA document. contain inform.tion Copyright © 1987, Texas Instruments Incorporated
curnnt •• of publicltlon dill. ProdUell conform to
opecillcitioni por th. IIrml of Tex•• Inltrum.ntl
.lIndlnl wlrnnty. Production ,rollll.ing dOlI not TEXAS . " 2-5
n......rily includl tilting of III p.rlmatera. INSTRUMENTS
POST OFFICE BOX 6S5012 • DALLAS, TeXAS 7626&
 SN54F02, SN74F02
QUADRUPLE 2-INPUT POSITIVE-NOR GATES

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . .. -0.5 V to 7 V
Input voltage t .................................................' . . .. -1.2 V to 7 V
Input current .................................................... -30 mA to 5 mA
Voltage applied to any output in the high state .............. ; .............. -0.5 V to Vee
eurrent into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F02. . . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F02 ............................. ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 0 e
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F02 'SN74F02
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.~ V
VIH High-level input voltage 2 2 V
Vil low-level input voltage 0.8 0.8 V
11K Input clamp current 18 18 mA
IOH High-level output current 1 1 mA
c IOl Low-level output current 20
a
20 mA

!II) TA Operating free-air temperature -55 125 70 °c

en electrical characteristics over recommended operating free-air temperature range (unless otherwise
:r noted)
CD
!(11 PARAMETER TEST CONDITIONS
MIN
SN64F02
TYP; MAX MIN
SN74F02
TYP' MAX
UNIT

VIK VCC = 4.5 V, II = -18 mA -1.2 -1.2 V

VCC - 4.5 V, IOH - -1 mA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V, IOH = -1 mA 2.7
VOL VCC = 4.5 V, IOl = 20 mA 0.30 0.5 0.30 0.5 V
II VCC - 5.5 V, VI - 7 V 0.1 0.1 mA
IIH VCC - 5.5 V, VI = 2.7 V 20 20 p.A
III VCC = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
IOS§ VCC = 5.5 V, Vo = a -60 -150 -60 -150 mA
ICCH VCC = 5.5 V, VI = 0 3.7 5.6 3.7 5.6 mA
ICCl VCC = 5.5 V, See Note 1 8.7 13 8.7 13 mA

switching characteristics (see Note 2)

VCC = 5V, VCC - 4.5 V to 5.5 v,
Cl = 50 pF, CL - 50 pF,

PARAMETER
FROM TO Rl = 50012, RL - 500 n,
UNIT
(INPUT) IOUTPUT) TA = 25°C TA - MIN to MAX'
'F02 SN54F02 SN74F02
MIN TYP MAX MIN MAX MIN MAX
tPLH AorB V 1.7 4 5.5 1.7 7.5 1.7 6.5 ns
tpHl AorB V 1 2.8 4.3 1 6.5 1 5.3 ns

; All typical values are at VCC = 5 V, T A = 25°C.

§ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICCl is measured with one input at 4.5 V and all others grounded.
2. Load circuits and waveforms are shown in Section 1.

2-6 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS, TEXAS 76266
 SN54F04, SN74F04
HEX INVERTERS
02932, MARCH 1987-REVISEO JANUARY 1989

• Package Options Include Plastic "Small SN54F04 .•. J PACKAGE

Outline" Packages, Ceramic Chip Carriers, SN74F04 ... D OR N PACKAGE
and Standard Plastic and Ceramic 300-mil ITOP VIEW)
DIPs lA Vee
• Dependable Texas Instruments Quality and lY 6A
Reliability 2A 6Y
2Y 5A
description 3A 5Y
3Y 4A
These devices contain six independent inverters, --""_ _J"" 4Y
They perform the Boolean function Y = A"
The SN54F04 is characterized for operation over SN54F04 ... FK PACKAGE
the full military temperature range of - 55°C to ITOP VIEW)
125°C. The SN74F04 is characterized for
U
operation from ooe to 70°C. >- < u u<
~~z>",

FUNCTION TABLE leach Inverter) 3 2 1 2019

2A 4 18
INPUT OUTPUT
A Y
Ne 5 17
2Y 6 16
H L
H
Ne 7 15 en
L
3A 8 14 1)
9 1011 1213 CD
logic symbol t oJ:
>-ou>-< CI)
C'lzz.r.r
lA

2A
11)

13)
(!l

NC - No internal connection
...caca
3A
15) Q
19) logic diagram (positive logic)
4A
111)

lA~IY
5A
113)
6A

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

lEe Publication 617-12. 2A~2Y
Pin numbers shown are for D, J, and N packages.

3A~3Y

4A~4Y

5A~5Y
6A~6Y

PRODUCTIOI DATA documants .ontaln informltlon Copyright © 1987, Texas Instruments Incorporated
currant .s of publication data. Products .onfarm to
:CCill••tions p.r tile tar... of TI.a. Inatrumants TEXAS . " 2-7
nl.=~~",~~~li ==::~; :'r'=~~:"~ not INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS, TEXAS 76265
 SN54F04, SN74F04
HEX INVERTERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee ............................................... , -0.5 V to 7 V
Input voltage t .................................................... , - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F04............... . . . . . . . . . .. - 55 °e to 125 °e
SN74F04 ............................. ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 °e
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F04 SN74F04
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil Low·level input voltage O.B O.B V
11K Input clamp current lB 18 mA
IOH High·level output current -1 -1 mA
IOl Low-level output current 20 20 mA
TA Operating free·air temperature -55 125 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F04 SN74F04
PARAMETER TEST CONDITIONS UNIT
MIN TVP; MAX MIN TVP; MAX
VIK Vee = 4.6 V, II = -18 mA -1.2 -1.2 V
Vee = 4.5 V, _IDH = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vec = 4.75 V, IOH = -1 mA 2.7
VOL Vee = 4.6 V, IOl - 20 mA 0.30 0.6 0.30 0.6 V
II Vee = 5.5 V, VI = 7 V 0.1 0.1 mA
II~ Vee = 6.6 V, VI = 2.7 V 20 20 p.A
IlL Vee = 5.6 V, VI = 0.5 V -0.6 -0.6 mA
10S§ Vee = 6.5 V, Vo = 0 -60 -160 -60 -160 mA
leeH Vee - 5.6 V, VI = 0 2.8 4.2 2.8 4.2 mA
leel Vee = 5.5 V, VI = 4.6 V 10.2 16.3 10.2 15.3 mA

switching characteristics (see Note 1)

vcc = 5V, vcc -
4.5 V to 5.& v,
CL=50pF, Cl - 60 pF,
FROM TO RL = 50012, Rl - 500 n,
PARAMETER UNIT
(INPUT) (OUTPUTl TA = 25°C TA - MIN to MAX'
'F04 SN54F04 SN74F04
MIN TVP MAX MIN MAX MIN MAX
tPLH AorS Y 1.6 3.3 5 1.2 7 1.6 6 ns
tpHl AorS Y 1 2.B 4.3 1 6.5 1 5.3 ns

*All typical values ere at VCC = 5 V, TA = 25°e.

§ Not more than one output should be shorted at a time and tha duration of tha short circuit should not axceed one second.
, For conditions shown as MIN or MAX, use the approprlata value spaclfled undar Recommended Operating Conditions.
NOTE 1: Load circuits and wavaforms are shown in Section 1.

2-8 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 665012 • DAI.LAS. TEXAS 76265
 SN54FOB. SN74FOB
QUADRUPLE 2·INPUT POSITIVE·AND GATES
02932. MARCH 1987-REVISEO JANUARY 1989

• Package Options Include Plastic "Small SN54FOB . _ . J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F08 ... D OR N PACKAGE
and Standard Plastic and Ceramic 300-mil (TOP VIEW)
DIPs 1A VCC
• Dependable Texas Instruments Quality and 1B 4B
Reliability 1Y 4A
2A 4Y
description 2B 3B
2Y 3A
These devices contain four independent 2-input GND 3Y
AND gates. They p'erform the Boolean functions
Y = A-B or Y = A+B in positive logic.
SN54F08 ... FK PACKAGE
The SN54F08 is characterized for operation over ITOP VIEW)
the full military temperature range of - 55°C to U
125°C. The SN74F08 is characterized for cc<l:UUcc
Z><t
operation from OOC to 70°C.
3 2 1 2019

FUNCTION TABLE (each gate) 1Y 4 18 4A

NC 5 17 NC
INPUTS OUTPUT 2A 6 16 4Y
A
H
L
B
H
X
Y
H
L
NC
2B
7
8
15
14
NC
3B
... U)
II)
9 10111213 II)
X L L .c
tn
logic symbol t
NC - No internal connection
... CO
CO
lA
111
131 1Y C
18
121 logic diagram (positive logic)
141
2A 161 2v
151 1 A = D - - 1Y
28
191 1B
3A
181 3V
1101
38
1121 2 A = D - - 2Y
4A 1111 4v 2B
1131
48

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

3 A = D - - 3Y
3B
lEe Publication 617-12.
Pin numbers shown are for D, J, and N packages.
4 A = D - - 4Y
4B

UILESS OTHERWISE NOTED ..il dacU""nt c.ntlins Copyright © 1987, Texas Instruments Incorporated
PRODUCTION DATA l.farllotJ•• ,u'lInt II of
pub_ HIe. Products """'""" tI spocIIiootl...
par the tllOII of Tms Inst.._ • •da,d TEXAS . . 2-9
::r:.~~.~':lr=.::~'" not ....... rily INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
 SN54F08, SN74F08
QUADRUPLE 2-INPUT POSITIVE-AND GATES

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F08. . . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F08 ............................. ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 0 e
tThe input voltage ratings may be exceeded provided tha input current ratings ara observed.

recommended operating conditions

SN54FOB SN74FOS
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 ~ 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 ..;,.~ 2 V
VIL Low~level input voltage <1'<' 0.8 0.8 V
11K Input clamp current ,c,A" -18 -18 rnA
IOH High-level output current >:;~ 1 1 rnA

c IOL Low-level output current Q'<' 20 20 rnA

....
II)
II)
TA Operating free-air temperature -55 125 0 70 ·C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
tn noted)
:r
CD
SN54FOS SN74F08
....
CD
til
PARAMETER TEST CONDITIONS
MIN TYP* MAX MIN TVP' MAX
UNIT

VIK VCC = 4.5 V, II = -IBmA -1.2 -1.2 V

VCC = 4.5 V, 10H = -1 rnA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V, IOH=-1mA 2.7
VOL VCC = 4.5 V, IOl = 20 rnA 0.30 li--'''O.5 0.30 0.5 V
II Vec = 5.5 V, VI = 7V ~q..V 0.1 0.1 rnA
IIH VCC = 5.6 V, VI = 2.7 V .c," 20 20 p.A
IlL VCC = 5.5 V, VI = 0.5 V .OQ -0.6 -0.6 rnA
10SI VCC = 5.5 V, Vo = 0 1"-60 -150 -60 -160 rnA
ICCH Vee = 5.5 V, VI = 4.5 V 5.5 B.3 6.5 B.3 rnA
leel Vee = 5.5 V, VI = 0 B.6 12.9 B.6 12.9 rnA

switching characteristics (see Note 1)

Vcc = 5V, vcc - 4.5 V to 6.5 V,
Cl=60pF, Cl - 60 pF,

PARAMETER
FROM TO Rl = 5002, lit. - 600 n, UNIT
(lNPUTI (OUTPUTI TA = 2SoC TA - MIN to MAX'
'FOB SN54FOB SN74FOB
MIN TVP MAX MIN ,.'{ MAX MIN MAX
tplH AorB Y 2.2 3.8 5.6 1.7 "",09:-;,,\1'1 7.5 2.2 6.6 ns
tpHl AorB Y 1.7 3.6 5.3 1.2 \'\\"'. 7.5 1.7 6.3 ns

*AII typical values are at Vec = 5 V, TA = 25°C.

§ Not more than one output should ba shorted at a time end the duration of tha short circuit should not exceed one sacond.
, For conditions shown as MIN or MAX, use the approprlata value specified under Recommended Operating Conditions.
NOTE1: load circuits and waveforms are shown in Section 1.

2-10 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75286
 SN54F09. SN74F09
QUADRUPLE 2·INPUT POSITIVE·AND GATES
WITH OPEN·COLLECTOR OUTPUTS
03074. NOVEMBER 1987-REVISEO JANUARY 19B9

• Package Options Include Plastic "Small SN54F09 •.• J PACKAGE

SN74F09 ... D DR N PACl<AGE
Outllna" Packages. Ceramic Chip Carriers.
(TDPVIEWI
and Standard Plastic and Ceramic 300·mil
DIPs 1A VCC
• Dependable Texas Instruments Quality and 18 48
Reliability 1Y 4A
2A 4Y
descriptiDn 28 38
2Y 3A
These devices contain four independent 2·input GND 3Y
AND gates. They perform the Boolean functions
Y = A·B or Y = A+B in positive logic. The SN54F09 ... FK PACKAGE
open-collector outputs require pull-up resistors (TDPVIEWI
to perform correctly. They may be connected to U
other open-collector outputs to implement m«U Um
~~Z><:t
active-low wired-OR or active-high wired-AND
3 2 1 2019
functions. Open-collector devices are often used
to generate higher VOH levels. 1Y 4 18 4A
NC 5 17 NC
The SN54F09 is characterized for operation over 2A 6 16 4Y
the full military temperature range of - 55°C to
125°C. The SN74F09 is characterized for
operation from OOC to 70°C.
NC
28
7
8
9 1011 12 13
15
14
NC
38 ...en
G)
G)
>-CU>-« .c
FUNCTIDN TABLE (each gatel N Z Z (') (')' en
...asas
(!)
INPUTS DUTPUT
B Y NC - No internal connection
A
H H H C
L X L logic diagram (positive logic)
X L L
l A = D - lY
logic symbol t lB

(11
lA & (31 2 A = D - 2Y
(21 ~ lY 2B
lB
(41
3A~3Y
2A (61
151 2Y
2B
(91
3B~
3A (BI
1101 3Y
3B 4 A = D - 4Y
(121 4B
4A (111
1131 4Y
4B

tnis symbol is in accordance with ANSIIIEEE Std 91-1984 and

IEC Publication 617-12.
Pin numbers shown ara for 0, J, and N packages.

PRODUCTION DATA doc.....ts .. lIIl. Infarmatlo. Copyright @ 1982. Texas Instruments Incorporated
.umot II 01 pu.lleollo. dote. Predueta ...farm to
,poeHleollo., por iii. terml 0' T...I 1••tnlm.1II TEXAS . " 2-11
:':=~,~·t'::,~li =~;t':r lIlo:::~:,:~~ "" INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75285
 SN54F09, SN74F09
QUADRUPLE 2·INPUT POSITIVE·AND GATES WITH OPEN·COLLECTOR OUTPUTS

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, VCC ................................:'. . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t ................................ '.............. '. . . . . .. -1.2 V to 7 V
Input current ... '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state ......... _ . .. . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free·air temperature range: SN54F09. . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F09 ............................. ooe to 70°C
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may'be exceeded provided the input current ratings are observed.

recommended operating conditions

SN64F09 SN74F09
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.6 V
VIH High-level input voltage 2 2 V
Vil low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
VOH High-level output voltage 5.5 5.5 V
IOl low-level output current '. 20 20 mA
TA Operating free-air temperature -55 125 0 70 ·C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F09 SN74F09
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
VIK VCC = 4.5 V, II = .-18 mA -1.2 -1.2 V
IOH Vec = 4.5 V, VOH = 5.5 V 0.1 0.1 mA
VOL Vec - 4.5 V, IOl - 20 mA 0.30 0.5 0.30 0.5 V
II Vec = 5.5 V, VI = 7 V 0.1 0.1 mAo
IIH Vec = 5.5 V, VI = 2.7 V 20 20 pA
III Vec - 5.5 V, VI - 0.5 V -0.6 -0.6 mA
ICCH Vec = 5.5 V, VI = 4.5 V 5 7.8 5 7.8 mA
ICCl Vec = 5.5 V, VI = 0 8.1 12.8 8.1 12.8 mA

switching characteristics (see Note 1)

Vee - 5 V, Vee - 4.5 V to 5.5 V,
Cl ~ 50 pF, eL - 50 pF,
FROM TO RL - 500O, RL- 500 0,
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 26'C TA - MIN to MAXi
'F09 SN54F09 SN74F09
MIN TYP MAX MIN MAX MIN MAX
tpLH Aor B Y 5 8 9.2 5 10.5 5 9.6 ns
tpHl A or B Y 1.5 3.4 4.6 1.5 6 1.5 4.8 ns

*AII typical values are at Vce = 5 v, TA = 25°C. .

§For conditions shown as MIN or MAX, use the appropriate valul! specified under Recommended Operating Conditions.
NOTE1: Load circuits and waveforms are shown in Section 1.

2-12
TEXAS ",
INSTRUMENlS
POST OFFICE BOX 856012 • DALLAS. TEX~S 75265
 SN54F10, SN74F10
TRIPLE 3·INPUT POSITIVE·NAND GATES
02932, MARCH 1987-REVISEO JANUARY 1989

• Package Options Include Plastic "Small SN54Fl0 ... J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74Fl0 ... 0 OR N PACKAGE
and Standard Plastic and Ceramic 300·mil (TOP VIEW)

DIPs 1A VCC
• Dependable Texas Instruments Quality and 18 1C
Reliability 2A 1Y
28 3C
description 2C 38
2Y 3A
These devices contain three independent 3-input 3Y
NAND gates, They perform the Boolean
functions Y = A.B.C or Y = A+ B+ C in SN54Fl0 ... FK PACKAGE
positive logic, (TOP VIEW)
The SN54Fl0 is characterized for operation over U
<I: U UU
the full military temperature range of - 55°C to '" ~2>~

125°C, The SN74Fl0 is characterized for 3 2 1 2019

operation from OOC to 70°C.
2A 4- 18 1Y
NC 17 NC
FUNCTION TABLE (each gate)
28 6 16 3C

A
H
INPUTS
B
H
C
H
OUTPUT
Y
L
NC
2C
./

8
9 10111213
15
14
NC
38 ...
U)

CD
CD
L X X H >-OU>-<I: .c
X L X H "'22MM en
X X L H
(!l

NC - No internal connection ...CO

CO
logic symbol t logic diagram (positive logic) C
lA (I) &
lA
18 (2)
lC (13)
18
lC
}---1Y
2A·(3)
2A
28 4) 2B [}---2Y
2C (5) 2C

3A (9)
3A
38,(10) 3B }---3Y
3C (11) 3C

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

I.
PRODUCTION DATA do.umltlts .ontai. i.formatio.
.u....t of publicstlon data. Product••o.form to
.pacifl••tio•• par tho tarm. of Texa. I.strumants
st••d.rd wI..anty. Productlo. pro....I.g do...ot TEXAS . "
Copyright © 1987, Texas Instruments Incorporated

2·13
.......rily in.luda l8at1ng of an p.rlmlla... INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS, TeXAS 75286
 SN54F1 O,SN74F1 0
TRIPLE 3·INPUT POSITIVE·NAND GATES

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied i:o any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to Vee
Current into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F10. . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F10 ............................. ooe to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54Fl0 SN74Fl0
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply volt'age 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil low-level input voltage O.S O.S V
11K Input clamp current -1S -18 mA
10H High-level output current 1 1 mA
c 10l Lowwlevel output current 20 20 mA

a
I»
TA Operating free·air temperature -55 125 0 70 °e

(I) electrical characteristics over recommended operating free-air temperature range (unless otherwise
~ oo~) .
CD
!(I) PARAMETER TEST CONDITIONS
MIN
SN64Fl0
TYP* MAX MIN
SN74Fl 0
TYP' MAX
UNIT

VIK Vee = 4.5 V, II = -18 mA -1.2 -1.2 V

Vec = 4.5 V, IOH = -1 rnA 2.6 3.4 2.6 3.4
V
VOH
VCC = 4.75 V, IOH = -1 rnA 2.7
VOL Vec = 4.5 V, 10l = 20 rnA 0.30 0.5 0.30 0.5 V
II VCC = 5.6 V, VI = 7 V 0.1 0.1 rnA
IIH VCC = 5.6 V, VI = 2.7 V 20 20 p.A
III VCC = 5.6 V, VI = 0.5 V -0.6 -0.6 rnA
10S§ VCC = 6.5 V, Vo = 0 -60 -150 -60 -150 rnA
ICCH VCC = 5.5 V, VI = 0 1.4 2.1 1.4 2.1 rnA
ICCl VCC = 6.5 V, VI = 4.5 V 5.1 7.7 5.1 7.7 rnA

switching characteristics (see Note 1)

Vee - 5 V, Vee - 4.5 V to 5.6 V,
eL - 50 pF, CL - 60 pF.
FROM TO RL - 5000, RL - 600 Il,
PARAMETER UNIT
IINPUT) (OUTPUT) TA - 25°e TA - MIN to MAX'
'FlO SN54Fl0 SN74Fl0
MIN TYP MAX MIN MAX MIN MAX
tplH AorB y 1.6 3.3 5 1.2 7 1.6 6 ns
tpHl AorB y 1 2.8 4.3 1 6.5 1 5.3 ns

*AII typical values are at VCC = 5 V, TA = 26°C.

§ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: load circuits and waveforms are shown in Section 1.

2-14 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS, TeXAS 75265
 SN54F11, SN74F11
TRIPLE 3-INPUT POSITIVE-AND GATES
02932. MARCH 1987-REVISED JANUARY 1989

• Package Options Include Plastic "Small SN54F11 •.. J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F11 ..• 0 OR N PACKAGE
and Standard Plastic and Ceramic 300-mil ITOP VIEW)
DIPs 1A VCC
• Dependable Texas Instruments Quality and 18 1C
Reliability 2A 1Y
28 3C
description 2C 38
2Y 3A
These devices contain three independent 3-input GND 3Y
AND gates. They perform the Boolean functions
Y = A.B.C or Y = A+B+C positive logic. SN54Fll ..• FK PACKAGE
ITOPVIEW)
The SN54F11 is characterized for operation over
the full military temperature range of - 55°C to u
ID<tUUU
~Z>~
125°C. The SN74F11 is characterized for
operation from O°C to 70°C. 3 2 1 20 19
4
FUNCTION TABLE leach gate) 5
INPUTS OUTPUT 6
A B C V 7

H H H H 8 14
L X X L 9 1011 1213
X L X L
X X L L

NC - No internal connection ....caca

logic symbol t C
logic diagram (positive logic)
II)
lA Be
(2) (12) 1
1B A = = D - 1V
lB IV
1131 lC
lC
2A
2B
(31
(4) (S)
2V
2A=D--
2B
2C
2V

3A=D--
(5)
2C
(9)
3A 3B 3V
(10) (8)
3C
3B 3V
(11)
3C

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.
Pin numbers shown are for Dr J, and N packages.

PRODUCTION DATA doc....m cont.,. i.I.,..atl•• Copyright © 1987 r Texas Instruments Incorporated
••"anl II of publication data. PraduCII •••10... to
....,fi.at,onl .. tila IIrms of T._ Inatnmonll TEXAS . "
atandonl ..rnlly. PratIactllll _ , " doos IlOl 2-15
n....lllily incl"" taating of .11 p.....at..... INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS, TEXAS 75265
 SN54F11, SN74F11
TRIPLE 3·INPUT'POSITIVE·AND GATES

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, Vee ..................................... '......... :. -0.5 V to 7 V
Input voltage t ......................................... '. . . . . . . . . . .. - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air tempereture renge: SN54F11 . . . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F11 ............................. ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 0 e
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54Fll SN74Fll
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage O.S 0.8 V
11K Input clamp current IS IS mA
IOH High-level output current I I mA
IOL Low-level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54Fll SN74Fll
PARAMETER TEST CONDITIONS UNIT
MIN TVP* MAX MIN TVP* MAX
VIK Vee - 4.5 V, 11- -1SmA -1.2 -1.2 V
Vce = 4.5 V, IOH=-lmA 2.5 3.4 2.5 3.4
VOH V
Vce = 4.75 V, 10H=-lmA 2.7
VOL Vce = 4.5 V, IOl - 20 mA 0.30 0.5 0.30 0.5 V
II VCC =-5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 /LA
III Vee = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
10S§ Vec = 5.5 V, Va = 0 -60 -150 -60 -160 mA
ICCH Vec = 6.5 V, VI = 4.6 V 4.1 6.2 4.1 6:2 mA
Icel Vec = 6.5 V, VI = 0 6.5 9.7 6.6 9.7 mA

switching characteristics (see Note 1)

VCC = 5V, VCC - 4.6 V to 5.5 V,
Cl=60pF, Cl - 50 pF,
FROM TO Rl=500Q, Rl - 50011,
PARAMETER UNIT
(INPUT) 10UTPUTI TA = 25°C TA - MIN to MAX'
'Fl1 SN54Fll SN74Fll
MIN TVP MAX MIN MAX MIN MAX
tpLH AorB Y 2.2 3.S 5.6 1.7 7.5 2.2 6.6 ns
tpHL AorB Y 1.7 3.7 5.5 1.2 7.5 1.7 6.5 ns

*§AllNottypical values are at VCC = 5 V, TA = 25°C.

more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX, use the appropriate valua specified under Recommended Operating Conditions.
NOTE 1: load circuits and waveforms are shown In Section 1.

2-16 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012· • DALLAS, TEXAS 75265
 SN54F20, SN74F20
DUAL 4-INPUT POSITIVE-NAND GATES
02932, MARCH 1987-REVISEO JANUARY 1989

• Package Options Include Plastic "Small SN54F20 ... J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F20 ... 0 OR N PACKAGE
and Standard Plastic and Ceramic 300-mil (TOP VIEW)
DIPs
1A VCC
• Dependable Texas Instruments Quality and 18 20
Reliability NC 2C
1C NC
description 10 26
1Y 2A
These devices contain two independent 4-input GNO 2Y
NAND gates. They perform the Boolean
functions Y = A.B·C·D or Y = A + B + C + 5 in SN54F20 ... FK PACKAGE
positive logic. (TOP VIEW)
The SN54F20 is characterized for operation over
the full military temperature range of - 55 DC to
125 DC, The SN74F20 is characterized for
3 2 1 2019
operation from oDe to 70 DC.
NC 4 18 2C
FUNCTION TABLE (each gate) NC 5 17 NC
1e 6 16 NC
INPUTS OUTPUT NC 7 15 NC
A B C 0 V 10 8 14 26
H H H H L 9 10111213
L X X X H
)-ou)-<t
X L X X H ""'ZZNN
(!)
X X L X H
X X X L H NC-No internal connection

logic diagram (positive logic)

logic symbol t

(1) &
lA
(2)
lB
(4) IV
lC
(5)
10
(9)
2A
(10)
2B
(12) 2V
2C
(13)
20

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 617·12.
Pin numbers shown are for D, J, and N packages.

PRODUCTION DATA documants contain infarmation Copyright © 1987, Texas Instruments Incorporated
.urrant •• of publi••tlon data. Products eonform to
Ipselfieationl par the tarms of Te..s Instrument. TEXAS . " 2-17
=~i::"i~':I~'li ~::I~~i:; lJlo::~:~:,::." not INSTRUMENTS
POST OFFICE ~ox 655012 • DALLAS, TEXAS 75265
 SN54F20, SN74F20
DUAL 4·INPUT POSITIVE·NAND GATES

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . .. . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - ~O mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to Vee
eurrent into any output 'jn the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .40 mA
Operating free-air temperature range: SN54F20. . . . . . . . . . . . . . . . . . . . . . . . .. - 55 De to 125 De
SN74F20 ............................. oDe to 70 De
Storage temperature range ......................................... - 65 De to 150 De
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F20 SN74F20
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltege 4.5 5 5.5 4.5 5 5.5 V
VIH High·level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 rnA
IOH High-level output current -1 -1 rnA
IOL Low-level output current 20 20 rnA
TA Operadng free-air temperature 55 125 0 70 °C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F20 SN74F20
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
VIK Vee = 4.6 V. 11=-18mA -1.2 -1.2 V
VCC = 4.5 V, IOH = -1 rnA 2.6 3.4 2.5 3.4
VOH V
VCC '" 4.76 V, IOH - -1 rnA 2.7
VOL Vee = 4.6 V, 10l = 20 rnA 0.30 0.6 0.30 0.5 V
II Vce = 5.5 V, VI = 7 V 0.1 0.1 rnA
IIH Vce = 6.6 V, VI = 2.7 V 20 20 p.A
III Vee = 6.5 V. VI = 0.5 V -0.6 -0.6 rnA
losl Vee = 6.6 V. Vo - 0 -60 -160 -60 -150 rnA
lecH Vce = 5.5 V. VI = 0 0.9 1.4 0.9 1.4 rnA
lecl Vee = 6.6 V. VI = 4.6 V 3.4 6.1 3.4 6.1 rnA

switching characteristics (see Note 1)

Vee=6V. vcc - 4.6 V to 6.6 V.
Cl=50pF. Cl - 60 pF.
FROM TO Rl = 6002. Rl - 600 n.
PARAMETER UNIT
(lNPUTI (OUTPUTI TA = 25°C TA - MIN to MAX'
'F20 SN64F20 SN74F20
MIN TYP MAX MIN MAX MIN MAX
tplH AorB Y 1.6 3.3 5 1.2 7 1.6 6 ns
tpHl AorB Y 1 2.8 4.3 1 6.5 1 5.3 ns

*AII typical values are at Vee = 6 V. TA = 26°C.

I Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1 .

2-18 . . TEXAS"
INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS, TEXAS 75286
 SN54F21, SN74F21
DUAL 4·INPUT POSITIVE·AND GATES
02932, MARCH 1987-REVISEO JANUARY 1989

• Package Options Include Plastic "Small SN54F21 , .. J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F21 ... 0 OR N PACKAGE
and Standard Plastic and Ceramic 300-mil (TOP VIEW)

DIPs 1A VCC
• Dependable Texas Instruments Quality and 18 20
Reliability NC 2C
1C NC
description 10 28
1Y 2A
These devices contain two independent 4-input 2Y
GNO
AND gates. They perform the Boolean functions
Y = A.B.C.D or Y = A+B+C+D in positive SN54F21 ... FK PACKAGE
logic. (TOP VIEW)

The SN54F21 is characterized for operation over U

m<tUUc
the full military temperature range of - 55°C to ~~z>'"
125°C. The SN74F21 is characterized for 3 2 1 2019
operation from ooe to 70°C. NC 4 18
NC 5 17

..
FUNCTION TABLE (each gata) 1C 6 16
NC 7 15
INPUTS OUTPUT
14 U)
A B C 0 Y 10 B
9 10111213 Q)
H H H H H Q)
L X X X L >-CU>-<t .c
X
X
X
X
X
L X
L
X
X
X
L
L
L
L
-Z2 N N
(!)

NC - No internal connection
..
tn

C
ca
ca
logic symbol t logic diagram (positive logic)

(11
1A
18
(2)

(4)
&

(6)
1Y }-1Y
1C
(5)
10 2
2B A § J - 2Y
(9) 2C
2A 20
(10)
28 (8)
2Y
2C
20

t This symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 617·12.
Pin numbers shown are for 0, J, and N packages.

PRODUCTION DATA d•• u...." ••nIal. inforlllli•• Copyright @ 1987, Texas Instruments Incorporated
••mat •• of p.blllltt.n dllo. Pr........0.10... to
_ilic.ti... per tbe ...... of TI... ,....u......
IIon...rd .8..I.ty. Production ~"'IIII•• d••••t TEXAS . " 2-19
.......rOy lnol_lalltnl If ill Plr......... INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 76286
 SN54F21, SN74F21
DUAL4-INPUTPOSITIVE-AND GATES

absolute maximum ratings over .operating free-air temper~ture range (unless otherwise. noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t ................. '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current .................................................. " - 30 rnA to 5 rnA
Voltage applied to any output in the high state. . . . . . . . . . . . . . .. . . . . . . . . . ... -0.5 V to Vee
eurrent into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 rnA
Operating free-air temperature range: SN54F21 .......................... -55°e to 125°e
SN74F21 ............................. ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 0 e
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F21 SN74F21
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 rnA
IOH High-level output current -1 -1 rnA
c lot Low-level output current ,20 20 rnA

....
D)
D)
TA Operating free-air temperature -55 125 0 70 °e

(/) electrical characteristics over recommended operating free-air temperature range (unless otherwise
::T noted)
(1)

....
(1)

en
PARAMETER TEST CONOITIONS
MIN
SN54F21
TYP* MAX MIN
SN74F21
TYP* MAX
UNIT

VIK Vee = 4.5 V, II = -18 rnA -1.2 -1.2 V

Vee = 4.5 V, IOH = -1 rnA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, IOH = -1 rnA 2.7
VOL Vee = 4.5 V, IOl = 20 rnA 0.30 0.5 0.30 0.5 V
II Vee = p.SoV, VI = 7 V 0.1 0.1 rnA
IIH Vec = 5.5 V, VI = 2.7 V 20 20 p.A
III Vec = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
IOS§ VCC = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
ICCH VCC = 5.5 V', VI = 4.5 V 2.8 4.3 2.8 4.3 mA
ICCl Vec = 5.5 V, VI =0 4.7 7.3 4.7 7.3 mA

switching characteristics (see Note 1)

vcc - 5 v, Vcc. - 4.5 V to 5.5 v,
Cl - 50 pF, Cl - 50 pF,
FROM TO Rl - 500 n, Rl - 500 n,
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 25°C TA - MIN to MAX'
'F21 SN64F21 SN74F21
MIN TYP MAX MIN MAX MIN MAX
tpLH A orB Y 1 3.2 4.7 1 5.6 1 5.3 ns
tpHl A or B Y 1.5 3.4 5.1 1.5 5.9 1.5 5.5 ns

*AII typical values are at VCC = 5 V, TA = 25°C.

§Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
'For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1.

2-20 TEXAS •
INSTRUMENTS
POST OFFICE BOX 6~5012 • DALLAS. TEXAS 75265
 SN54F27, SN74F27
TRIPLE 3-INPUT POSITIVE-NOR GATES
02932. MARCH 1986-REVISED JANUARY 1989

• Packaga Options Include Plastic "Small SN54F27 ... J PACKAGE

SN74F27 ... 0 DR N PACKAGE
Outline" Packages. Ceramic Chip Carriers.
(TOP VIEW)
and Standard Plastic and Ceramic 300-mil
DIPs 1A VCC
• Dependable Texas Instruments Quality and 18 1C
Reliability 2A 1V
28 3C
description 2C 38
2V 3A
These devices contain three independent 3-input GND 3V
NOR gates. They perform the Boolean functions
y = A+B+C or Y = A.B.C in positive logic. SN54F27 ... FK PACKAGE
(TOP VIEW)
The SN54F27 is characterized for operation over
the full military temperature range of - 55°C to U
m«U UU
125°C. The SN74F27 is characterized for ~~Z>~

operation from OOC to 70°C. 3 2 1 2019

2A 18 1V
FUNCTION TABLE (each gatel
NC 17 NC
INPUTS OUTPUT 28 6 16 3C
NC 7 15 NC
A B C Y en
H X X L 2C 8 14 38 l)
X H X L 9 10 111213 CD
X X .c

..
H L >-OU>-«
L L L H NZZMM
(!)
Ul
ca
NC - No internal connection
ca
logic symbol t C
logic diagram (positive logic)
lA
Itl >1
18
lC
2A
28
2C
3A
38
(111
3C

t This symbol is in accordance with ANSI/lEEE Std 91-1984 and

IEC Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

PRooueTIO. DATA d••um••ta •••tal. I.'.rmltl•• Copyright © 1987, Texas Instruments Incorporated
.urrent I ••, publIClti•• dlta. Pr.ducta .....rm t •
• paclli.ltio.1 (III the tarms ., T•••• I.strum..ta
TEXAS . "
:':'=I~"I~:)~7i =:~:r :I\o:,::::~:.~ ••t
2-21
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
 SN54F27, SN74F27
TRIPLE 3-INPUT POSITIVE-NOR GATES

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t ................................................... ". -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to Vee
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F27..................... . . . .. - 55°C to 125°C
SN74F27 ............................. ooe to 70°C
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F27 SN74F27
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
High-level output current -1 -1 mA

..c
IOH
IOL Low-level output current 20 20 mA
C» TA Operating free-air temperature 55 125 0 70 ·e
C»
en electrical characteristics over recommended operating free-air temperature range (unless otherwise
:r noted)
CD
SN54F27 SN74F27
!en PARAMETER TEST CONDITIONS
MIN TVP; MAX MIN TVP; MAX
UNIT

VIK Vee = 4.5 V. II = -18 mA -1.2 -1.2 V

Vec = 4.6 V. 10H = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V. IOH=-1mA 2.7
VOL Vee = 4.5 V. 10L = 20 mA 0.30 0.5 0.30 0.5 V
II Vee = 5.5 V. VI = 7 V 0.1 0.1 mA
IIH Vee = 5.5 V. VI = 2.7 V 20 20 p.A
IlL Vee = 5.6 V. VI = 0.5 V -0.6 -0.6 mA
105 1 Vee = 5.5 V. Vo = 0 -60 -150 -60 -150 mA
leeH Vee = 5.5 V. VI = 0 3.8 6.5 3.8 5.6 mA
IceL Vee = 5.6 V. See Note 1 8.4 12 8.4 12 mA

switching characteristics (see Note 2)

Vcc - 6 V. VCC - 4.5 V to 5.5 V.
CL - 50 pF. CL - 60 pF.
FROM TO RL - 500 Il. RL - 600 Il.
PARAMETER UNIT
(lNPUTI (OUTPUTI TA - 25·C TA - MIN to MAX'
'F27 SN64F27 SN74F27
MIN TYP MAX MIN MAX MIN MAX
tpLH A or B V 1.2 3.1 5 1 6 1 5.5 ns
tpHL A or B Y 1 2.1 4.6 1 5.5 1 4.5 ns
*All typical values are at Vee = 5 V. TA = 26 ·e.
I Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTES:. 1. leCL is measured with one input at 4.5 Vend all others grounded.
2. Load circuits and waveforms are shown in Section 1.

2-22 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TeXAS 15266
 SN54F30. SN74F30
8-INPUT POSITIVE-NAND GATES
02932, MARCH 1987-REVISEO JANUARY 1989

• Package Options Include Plastic "Small SN54F30 ... J PACKAGE

SN74F30 ... D OR N PACKAGE
Outline" Packages. Ceramic Chip Carriers.
ITOP VIEW)
and Standard Plastic and Ceramic aOO-mii
DIPs A VCC
• Dependable Texas Instruments Quality and B NC
Reliability C H
D G
description E NC
F NC
These devices contain a single a-input NAND GND y
gate and perform the following Boolean
functions in positive logic:
SN54F30 ... FK PACKAGE
Y = A.B.C.D.E.F.G.H or ITOP VIEW)

Y = A+B+C+"tl+E+F+G+H U
U UU
"'<z>z
The SN54F30 is characterized for operation over
the full military temperature range of - 55°C to 3 1 2019
125°C. The SN74F30 is characterized for C 4 18
operation from O°C to 70°C. NC 5 17
D 6 16
FUNCTION TABLE NC 15 (I)

OUTPUT
E 8 14 ~
INPUTS A THRU H 9 1011 12 13 Q)
V .c

logic symbol t
All inputs H
One or more inputs L
L
H
L.L.ClU>-U

NC-No internal connection.

zz
(.!)
z
..
en
ca
ca
o
logic diagram (positive logic)
(1) &
A
(2)
B A
(3) B
C
(4) C
D (8) v
(5) D
E
E
D---v
(6)
F
(11)
G G
(12)
H H

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

lEe Publicalion 617-12.
Pin numbers shown are for D, J, and N packages.

PRODUCTION DATA documant. contein information Copyright © 1987. Texas Instruments Incorporated
currenl a. 01 publication date. ProduclI c.nform I.
specifications par the tarms of Tax•• Instruments
TEXAS . " 2-23
:'~=~~i;ai~:Ir::1~ ~!~::i:r :I~D::;::::~:~~ not INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 SN54F30, SN74F30
8·INPUT POSITIVE-NAND GATES

absolute maximum ratings over operating free-air temperature range .(unless otherwise noted)

Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V

Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . .. . . . . . . . . .. - 0.5 V to Vee
eurrent into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... 40 mA
Operating free-air temperature range: SN54F30. : . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F30 ............................. ooe to 70 0 e
Storage temperature range ......................................... -65°e to 150 0 e
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F30 SN74F30
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18. mA
IOH High-level output current -1 -1 mA
IOL Low-level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 °C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)

SN64F30 SN74F30
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
VIK Vee = 4.5 V, II = -18mA -1.2 -1.2 V
Vee = 4.5 V, IOH = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vec = 4.76 V, IOH=-1mA 2.7
VOL Vce = 4.5 V, IOl = 20 mA 0.30 0.5 0.30 0.5 V
II Vee = 5.5 V, VI - 7 V 0.1 0.1 mA
IIH Vee = 6.5 V, VI = 2.7 V 20 20 p.A
IlL Vce - 6.6 V, VI - 0.6 V -0.6 -0.6 mA
IOS§ Vee = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
ICCH Vec - 5.5 V, VI = 0 0.7 1.5 0.7 1.5 mA
ICCl Vce = 5.5 V, VI = 4.5 V 2.2 4 2.2 4 mA

switching characteristics (see Note 1)

vcc - 5 V, vcc - 4.5 V to 5.5 V,

Cl - 50 pF, CL - 50 pF,
FROM TO RL - 5000, RL - 600 O.
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 26°C TA - MIN to MAX,
'F30 SN64F30 SN74F30
MIN TYP MAX MIN MAX MIN MAX
tpLH 1 3.1 5 1 6 1 5.5
A thru H Y ns
tpHL 1 2.6 4.5 1 6 1 5

*AII typical values are at Vce = 5 V, TA = 25°C.

§Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1.

2-24 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 865012 • DALLAS. TEXAS 75285
 SN54F32, SN74F32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
O~932. MARCH 1987-REVISEO JANUARY 1989

• Package Options Include Plastic "Small SN54F32 ... J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F32 ... D OR N PACKAGE

and Standard Plastic and Ceramic 300-mil (TOP VIEW)

DIPs 1A Vee
• Dependable Texas Instruments Quality and 1B 4B
Reliability 1Y 4A
2A 4Y
descriptibn 2B 3B
2Y 3A
These devices contain four independent 2-input GND 3Y
OR gates. They perform the Boolean functions
Y = A+B or Y = A'.S in positive logic.
SN54F32 ... FK PACKAGE
The SN54F32 is characterized for operation over (TOP VIEW)
the full military temperature range of - 55 °e
U
to 125°e. The SN74F32 is characterized for III <t U U III
~~z><:
operation from ooe to 70 oe.
3 2 1 20 19
FUNCTION TABLE 18
(each gate) 17

OUTPUT
A
H
B
X
INPUTS
Y
H
9 1011 1213
16
15
14
.. en
CD
CD
X H H .c
en
logic symbol t
L L L

NC - No internal connection
..
Q
IU
IU
(1) . ;>1
lA
(3) lY
logic diagram (positive logic)
(2)
lB

2A
(4) lA~(l)
(3l ly
(6)2Y
(5) 1 B (2)
2B

2A~
(9)
3A
(8) 3Y
3B
(10) 2B~2Y
(12)
4A
(11)4Y 3A~
4B
(13) 3B~3Y

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and 4A~

IEC Publication 617-12. 4B~4Y
Pin numbers shown are for D. J, and N packages.

PROOUCTION OATA d... mellllcantlin inlon.lti•• Copyright © 1987, Texas Instruments Incorporated

~
cormt .1 of publicotJ•• dote. Pnducts ..lfa... to
lpocilieati... per tho _ a' Texu InIt......1I
TEXAS 2-25
=1~·I:I:re =:~:r lIr:::~:.' not INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F32, SN74F32
QUADRUPLE 2-INPUT POSITIVE-OR GATES

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage. Vee ................................................• -0.5 V to 7 V

Input voltage t . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . .. .. ,..0.5 V to Vee
eurrent into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F32. . . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F32 ............................. ooe.to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 0 e
t The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
- .
SN54F32 SN74F32
UNIT
MIN NOM MAX. MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High-level output current -1 -1 mA
IOL Low-level output current 20 20 mA
c
S»
TA Operating free-air temperature -55 125 0 70 ·C
.~

S» electrical characteristics over recommended operating free-air temperature range (unless otherwise
(I) noted)
::r SN54F32 SN74F32
CD PARAMETER TEST CONDITIONS UNIT
!
(I) VIK VCC = 4.5 V. II = -18mA
MIN TYpJ MAX
-1.2
MIN TYpJ MAX
-1.2 V
VCC - 4.5 V. IOH = -1 mA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V. IOH = -1 mA 2.7
VOL VCC = 4.5 V. IOL = 20 mA 0.3 0.5 0.3 0.5 V
II VCC = 5.5 V. VI = 7 V 0.1 0.1 mA
IIH VCC - 5.5 V. VI - 2.7 V 20 20 p.A
IlL VCC = 5.5 V. VI = 0.5 V -0.6 -0.6 mA
IOS§ VCC = 5.5 V. Vo = 0 -60 -150 -60 -150 mA
ICCH VCC = 5.5 V. See Note 1 6.1 9.2 6.1 9.2 mA
ICCL VCC = 5.5 V. VI =0 10.3 15.5 10.3 15.5 mA

switching characteristics Isee Note 21

Vcc - 6 V. Vcc - 4.5 V to 6.6 V.
CL - &0 pF. CL - 60 pF.
FROM TO RL - 500 n. RL - 600 n.
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 26·C TA - MIN to MAX'
'F32 SN54F32 SN74F32
MIN TYP MAX MIN MAX MIN MAX
tpLH y 2.2 3.8 5.6 2.2 7.5 2.2 6.6
A or 8 ns
tpHL 2.2 3.6 5.3 1.7 7.5 2.2 6.3

*§AllNottypical values are at VCC = 5 V. TA = 25 ·C.

more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICCH is measured with one Input per gate at 4.5 V and all others at ground.
2. Load circuits and waveforms are shown in Section 1.

2-26 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS, TeXAS 76286
 SN54F3&, SN74F3&
QUADRUPLE 2·II/PUT POSITIVE·NOR GATES
D293~. MARCH 1987-REVISED JANUARY 1989

• Package Options Include Plastic "Small SN54F3B ..• J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F3B ... D OR N PACKAGE
and Standard Plastic and Ceramic 300·mil ITOPVIEW)
DIPs 1A VCC
• Dependable Texas Instruments Quality and 1B 4B
Reliability 1V 4A
2A 4Y
description 2B 3B
2Y 3A
These devices contain four independent 2-input
GNO 3Y
NOR gates. They perform the Boolean functions
y = A+B or Y = "Aos in positive logic.
SN54F3B ... FK PACKAGE
The SN54F36 is characterized for operation over (TOP VIEW)
the full military temperature range of - 55°C to
U
125°C. The SN74F36 is characterized for __ U
ttl «
Z>'"
Uttl
operation from 0 DC to 70°C.
3 2 1 2019
FUNCTION TABLE leach gata) 1Y 4 18
NC 5 17
INPUTS OUTPUT
2A 6 16
A B V
H X L NC 7 15
8 14
X H L
L L H 9 1011 1213
)-CU)-«
NZZMM
logic symbol t l!l

lA (1) >:1 NC - No internal connection

18 12)
2A (4) logic diagram (positive logic)
28 (5)
3A (9)
l A = I > - IV
38 (10) lB .
4A (12)
4B (13) 2 A = I > - 2V
2B .
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and 3 A = I > - 3V
lEe Publication 617-12. 3B
Pin numbers shown are for D. J. and N packages.
4A~4Y
4B~

PRDDUCTIDI DATA tIacu..,IIII ••nteln Imnlllltllll Copyright © 1987, Taxas Instruments Incorporated
oorrllll II of publication date. P..d_ e••Iano 18
_illllti••• psr Ib, IIrIll If Toa InaI...,.1I
IIIndord Wlr..oty. Praduotl•• p..-lnl ..... oat
_rlly Includo tutlnl If ill ....._ .
TEXAS ." 2-27
INSTRUMENTS
POST OFFICE SOX 866012 • DALLAS, TEXAS 7528&
 SN54F36. SN74F36
QUADRUPLE 2-INPUT POSITIVE-NOR ·GATES

absolute maximum ratings'over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee ., ...................... , ................... , . .. -0.5 V to 7 V
Input voltage t .............................. ~ . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state ...........•....... ; . . . . . . . . .-0.5 V to Vee
eurrent into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .... '40 mA
Operating free-air temperature range: SN54F36. . . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F36 ............................. OOeto 70 0 e
Storage temperature range ............................ ;............. - 65 °e to 150 0 e
tThe input voltage ratings may be exceeded provided the input current ratings' are observed.

recommended operating conditions

SN54F36 SN74F36
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil low-level input voltage 0.8 0.8 V
11K Input clamp current 18 18 mA
IOH High-level output current ~1 -1 mA
IOl Low~level output current 20 20 mA
C
...
m
m
TA Operating free-air temperature -55 125 a 70 DC

electrical characteristics over recommended operating free-air temperatUre range (unless otherwise
en
J
noted)

m
... PARAMETER TEST CONDITIONS
MIN
SN54F36
TYP* MAX MIN
SN74F36
TYP* MAX
UNIT
en
VIK VCC = 4.5 V, II = -18 mA -1.2 -1.2 V
VCC = 4.5 V, IOH = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vce = 4.75 V, IOH=-lmA 2.7
VOL VCC = 4.5 V, IOl = 20 mA 0.30 0.5 0.30 0.5 V
II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 p.A
III Vec = 5.5 v, VI - 0.5 V -O.B -O.B mA
IOS§ VCC = 5.5 V, Vo = a -60 -150 -BO -150 mA
ICCH VCC = 5.5 V, VI = a 3.7 5.6 3.7 5.6 mA
ICCl VCC T' 5.5 V, See Note 1 8.7 13 8.7 13 mA

switching characteristics (see Note 2)

Vce - 5 v, VCC - 4.5 V to 5.5 v,
CL - 50 pF, CL - 50 pF,
FROM TO RL - 500 II, RL - 500 II,
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 25°C TA - MIN 'to MAX'
'F36 SN54F36 SN74F36
MIN TYP MAX MIN MAX MIN MAX
tplH 1.7 4 5.5 1.7 7.5 1.7 B.5
AorS Y ns
tpHl 1 2.8 4.3 1 6.5 1 5.3

*AII typical values are at VCC = 5 V, TA = 25°C.

§Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
'For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICCl is measured with one input per gete at 4.5 V and all others grounded.
2. Load circuits and waveforms are shown in Section 1.

2-28 TEXAS •
·.INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F37, SN74F37
QUADRUPLE 2·INPUT POSITIVE· NAND BUFFERS
03206. JANUARY 1969

• Package Options Include Plastic "Small SN54F37 ... J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F37 ... 0 OR N PACKAGE
and Standard Plastic and Ceramic 300·mil (TOP VIEW)
DIPs 1A VCC
• Dependable Texas Instruments Quality and 18 48
Reliability 1V 4A
2A 4Y
description 28 38
2Y 3A
These devices contain four independent 2·input GND 3Y
NAND buffer gates. They perform the Boolean
functions Y = A· B or Y = Ii: + B in positive logic.
SN54F37 ... FK PACKAGE
The SN54F37 is characterized for operation over (TOP VIEW)
the fuli military temperature range of - 55°C
U
to 125°C. The SN74F37 is characterized for __ Z>M
m«UUm
operation from ooe to 70°C.
3 2 1 20 19
FUNCTION TABLE (each gate) 18
NC 5 17 NC
INPUTS OUTPUT
2A 6 16
A B V
NC 15
H H L
L X H
14 38
9 10 11 12 13
X L H

logic symbol t
NC - No internal connection

1A
logic diagram (positive logic)
1B
2A 1A
}>---1V
2B 1B
3A 2A
}>---2V
3B 2B
4A 3A
}>---3V
4B 3B
4A
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and }>---4V
lEe Publication 617-12. 4B
Pin numbers shown are for D. J. and N packages.

PRODUCTION DATA Inf.rlloll•• current II

UNLESS OTHERWISE NOTED this d..u..lnt contlinl
.f
TEXAS ~
Copyright @ 1989, Texas Instruments Incorporated

..
::~I~=:O~I= ~od~:':.=:: "I':"I:~:: 2-29
...
=:r::'li.t"':~:lr~ ::~~~ •• t .......rily
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TeXAS 75265
 SN!i4F37. SN74F37
QUADRUPLE 2·INPUT POSITIVE·NAND BUFFERS

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, VCC .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t .............................. '.' . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vec
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range: SN54F37.......................... - 55°C to 125°C
. SN74F37 ............................. OOCto70oC
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the Input current ratings are observed.

recommended operating conditions

SNI54F37 SN74F37
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.6 6 6.6 4.6 6 6.6 V
VIH High-level Input voltage 2 .&~ 2 V
VIL Low-level Input voltage "Q;o"" 0.8 0.8 V
11K Input clamp current G -18 -18 mA
IOH Hlgh-Ieval output current ~)v -15 -16 mA
IOL Low-Ieval output current 48 64 mA
C
...mm TA Operating free-air temperature -56

electrical characteristics over'recommended operating free·alr temperature range (unless otherwise

126 0 70 DC

t/) noted)
::r SN64F37
CD SN74F37
...
CD
(II
PARAMETER

VIK Vee
TE8T CONDITIONS

= 4.6 V. II = -18mA
MIN
-0.73
TVpT MAX
-1.2
MIN TVpT MAX
-1.2
UNIT

V
Vee = 4.6 V. 10H - -1 mA 2.6 3.4 2.6 3.4
VOH Vee = 4.5 V. IOH - -15 mA 2 .~ 2 V
VCC = 4.75 V. 10H = -1 mA \~. 2.7
IIOL = 48 mA 0.3f<'- 0.6
VOL VCC= 4.5 V V
IIOL = 64mA .\0 0.40 0.66
II Vee = 6.6 V. VI = 7 V .<J..0 • 0.1 0.1 mA
IIH Vce = 6.6 V. VI = 2.7 V 20 20 ,.A
IlL Vec = 6.5 V. VI = 0.6 V -0.6 -0.6 mA
10S* VCC = 6.5 V. Vo = 0 -100 -225 -100 -226 mA
ICCH Vce = 6.6 V. VI = 0 3 6 3 6 mA
ICCL Vee = 5.5 V. VI = 4.5 V 23 33 23 33 mA

switching characteristics (see Note 1)

VCC - 5 V. VCC - 4.6 V to 6.5 V.
CL - 50 pF. CL - 60 pF.
FROM TO RL - 600 O. RL - 600 O.
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 26 DC TA .. MIN to MAXi
'F37 SNI54F37 SN74F37
MIN TVpT MAX MIN .n\lC"\ MAX MIN MAX
tPLH 1.6 3.1 6.6 ? .,,\1\'(: 1.6 6.6
A or B Y ns
tpHL 1 2.1 4.5 1 6

t All typical values are at VCC = 5 V. TA = 25 DC.

* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1.

2-30 TEXAS ."

INSTRUMENlS
POST OFFICE BOX 856012 • DALLAS. TEXAS 75285
 SN54F38. SN74F38
QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS
WITH OPEN-COLLECTOR OUTPUTS
03207, JANUARY 1989

• Package Options Include Plastic "Small SN54F38 ... J PACKAGE

SN74F38 ... D OR N PACKAGE
Outline" Packages. Ceramic Chip Carriers.
ITOP VIEW)
and Standard Plastic and Ceramic 300-mil
DIPs 1A VCC
• Dependable Texas Instruments Quality and 18 48
Reliability 1Y 4A
2A 4Y
description 28 38
2Y 3A
These devices contain four independent 2-input GND 3Y
NAND buffer gates with open-collector outputs.
These NAND buffers perform the Boolean
functions Y = A.B or Y = A + B in positive logic, SN54F38 ... FK PACKAGE
The open-collector outputs require pull-up ITOP VIEWI
resistors to perform correctly. They may be U
m«UUm
_ .....
connected to other open-collector outputs to 2>~

implement active-low wired-OR or active-high

3 2 1 20 19
wired-AND functions, Open-collector devices are
1Y 4 18
often used to generate higher VOH levels,
NC 5 17
The SN 54F38 is characterized for operation over 16
the full military temperature range of - 55°C NC 7 15
to 125°C, The SN74F38 is characterized for 28 8 14
operation from ooe
to 70°C. 910111213

>OU>«
FUNCTION TABLE leach gatal NZZMM
(!)

INPUTS OUTPUT
NC - No internal connection
A B V
H H L
L X H logic diagram (positive logic)
X L H
lA
}>--lY
18
logic symbol t
2A
}>--2Y
111 28
lA &\>
121 3A
lB
»---3Y
141 38
2A
151 4. A = = = D - 4Y
2B
191 48
3A
1101
38
1121
4A
1131
48

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 617-12.
Pin numbers shown are for D, J, and N packages.

UNLESS OTHERWISE NOTED this documant contain. Copyright @ 1989, Texas Instruments Incorporated
PRODUCTIOI DATA Inlormltlon current .s of
publication dat•. ProduGls conform to .,.cilicatlons
p" th. tarms 01 TaxI. Instrumants standard
TEXAS ." 2-31
~:~~:\:~~u~:lr~~=~~~ not n......rily INSTRUMENTS
POST OFFICE BOX 655012 • DALLA'S, TEXAS 75266
 SN54F38, SN74F38
QUADRUPLE 2·INPUT POSITIVE·NAND BUFFERS
WITH OPEN·COLLECTOR OUTPUTS

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)·.
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . .. -0.5 V to 7 V
Input current. .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 128 mA
Operating free-air temperature range: SN54F38.......................... - 55°C to 125°C
SN74F38 ............................. ooe to 70°C
Storage temperature range ......................................... - 65°C to 150°C
tThe Input voltage ratings may be exceeded provided the Input current ratings are observed.

recommended operating conditions

SN64F38 SN74F38
UNIT
MIN NOM MAX MIN NOM MAX
vCC Supply voltage 4.5 5 ,,5,.5 4.5 5 5.5 V
~~.
VIH High-level input voltage 2 2 V
Low-level input voltage </\,. 0.8 0.8 V
VIL
11K Input clamp current .:,v -18 -18 mA
VOH High-level output voltage _,*)V 4.5 4.5 V
C IOL Low-level output current 48 84 mA
m
1+ TA Operating free-air temperature -55 125 0 70 ·C
m
tJ) electrical characteristics over recommended operating free·air temperature range (unless otherwl8e
:r noted)
CD
CD SN64F38 SN74F38
1+ PARAMETER TEST CONDITIONS UNIT
en MIN TYpT MAX MIN Typt MAX
VIK Vcc - 4.5 V. II - -18 mA -0.73 -1.2 -1.2 V
IOH Vcc = 4.5 V 2:;0 250 pA
Vcc = 4.6 V. IOL = 48 mA 0.35 \~.5
VOL V
VCC = 4.5 V. IOL = 64 mA <>,,,. 0.4 0.55
II
IIH
VCC
Vce
= 5.5
= 5.5
V.
V.
VI = 7 V
VI = 2.7 V ,O,r
". 0.1
20
0.1
20
mA
p.A
IlL
ICCH
VCC
VCC
= 5.5
- 5.6
V.
V.
VI = 0.5 V
VI = 0 " 4
-0.6
7 4
-0.6
7
mA
mA
ICCL VCC =5.5 V. VI = 4.5 V 22 30 22 30 mA

switching characteristics (see Note 1)

Vcc - 5 V. VCC - 4.6 V to 5.5 V.
CL - 50 pF. CL - 50 pF.
FROM TO RL - 500 n. RL - 500 n.
PARAMETER UNIT
IINPUT) 10UTPUT) TA - 25·C TA - MIN to MAXf
'F38 SN64F38 SN74F38
MIN TYpt MAX MIN . .,-.,0\" MAX MIN MAX
tpLH 6.7 9.6 12.5 'i'~":'>J\I{,'- 6.7 13
A or B y ns
1 2.6 5 '( 1 5.5
tpHL

t All typical values are at VCC = 5 V. TA = 25·C.

f For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTE1: Load circuits and waveforms are shown in Section 1.

2-32 TEXAS .."

INSTRUMENTS
,POST OFFICE BOX 655012 • DALLAS. T~XAS 75285
 SN54F4D, SN74F4D
DUAL 4·INPUT POSITIVE· NAND BUFFERS
03208, JANUARY 1989

• Package Options Include Plastic "Small SN54F40 , .• J PACKAGE

SN74F40 ... 0 OR N PACKAGE
Outline" Packages. Ceramic Chip Carriers.
(TOP VIEWI
and Standard Plastic and Ceramic 300-mil
DIPs 1A VCC
• Dependable Texas Instruments Quality and 1B 20
Reliability NC 2C
1C NC
description 10 2B
1Y 2A
These devices contain two independent 4-input GNO 2Y
NAND buffer gates. They perform the Boolean
functionsY = A.B·C.DorY = A+B+C+Din
SN54F40 ..• FK PACKAGE
positive logic.
(TOPVIEWI
The SN54F40 is characterized for operation over U
the full military temperature range of - 55°C ~~~;;'~
to 125°C. The SN74F40 is characterized for
3 2 1 20 19
operation from O°C to 70°C.
4 18 2C
FUNCTION TABLE (each gatel
5 17 2C
16 NC
INPUTS OUTPUT 15 NC
A B C 0 V 8 14 2B
H H H H L 9 1011 1213
L X X X H
;"OU;..<t
X L X X H -Z2NN
(!)
X X L X H
X X X L H NC - No internal connection

logic symbol t logic diagram (positive logic)

(11
lA &[>
18
(21
1V
1A~
18
1V
(41
lC 1C
(51 10
10
(91
2A
28
(101
2V
2A~
28
2V
(121 2C
2C
(131 20
20

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 617·12.
Pin numbers shown are for O. J, and N packages.

UNLESS OTHERWISE NOTED this document oontei .. Copyright © 1989. Texas Instruments Incorporated
PRODUCTION DATA information ourrent a. of
publiollion dill. Products .onlorm to spa.meation.
par the tann. 01 Te.a. Instruments standard
TEXAS . " 2-33
r::~:t~~~o:.r:e=~!'" not .......rily INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
 SN54F40, SN14F40
DUAL 4·INPUT POSITIVE·NAND BUFFERS

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, Vee. . . • . • • . . . . • . . . • . . . • . • • • • • . • . . . • . • • . . • . • • • . • . • .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input current. • • • • . • . • • . . • . . • . . • . . • . • . . . . • • . • • • . • • • • • • • • • • • . . • • .• - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . • . . • . . . . . . . • . • • . . • • . • •• ~0.5 V to Vee
Current into any output in the low state • . • . • • • . • . • • • . • . . • . . • • . . . . . . • . • . • . . . • .. 128 mA
Operating free-air temperature range: SN54F40.......................... - 55°C to 125°C
SN74F40 . • . • . • . • . . • . . • • . • • . . • • . • . • . • . ooe to 70°C
Storage temperature range . . • . . . . . • . . • . . . . . . . • • . • . . . • . • • • • . • • . . • • • • - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN64F40 SN74F40
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 6.6 V
VIH High-level input voltage 2 /\ 2 V
Low-level input voltage \~;,\)..,.? ,·.t~ 0.8 0.8
VIL v
11K Input clamp current y ,,,~,, -18 -18 mA
10H High-level output current -15 -16 mA
10L Low-level output current 48 64 mA
cQ) TA Operating free-air temperature -55 125 0 70 ·C

;- electrical characteristics over recommended operating free·air temperature range (unless otherwise
o noted)
:T SN54F40 SN74F40
CD
...en
CD
PARAMETER

VIK Vcc =
TEST CONDITIONS

4.5 v, II = -18 mA
MIN TYP* MAX
-0.73 -1.2
MIN TYP* MAX
-1.2
UNIT

V
Vcc = 4.5 v, IOH=-lmA 2.5 3.4 2.6 3.4
VOH Vcc = 4.5 v, IOH = -15 mA 2 ~ 2 V
Vcc = 4.75 V, 10H = -1 mA ,,<;':- 2.7

VOL Vcc = 4.5 V

LIOL=48mA 0.3(i;~, 0.5
V
IIOL = 64 mA " 0.4 0.55
II Vcc = 5.5 V, VI = 7 V ,,_> i- 0.1 0.1 mA
IIH VCC - 5.5 V, VI - 2.7 V ,;:;' 20 20 p.A.
IlL VCC = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
IOS§ VCC = 5.6 V, Vo = 0 -100 -225 -100 -225 mA
ICCH VCC = 5.5 V, VI = 0 1.75 4 1.75 4 mA
ICCL VCC - 5.5 V, VI = 4.6 V 11 17 11 17 mA

switching characteristics (see Note 1)

VCC - 6 V, Vcc - 4.6 V to 6.6 V,
CL - 50 pF, CL - 50 pF,
FROM TO RL - 600 0, RL - 5000,
PARAMETER UNIT
(INPUT) IOUTPUT) TA - 2SoC TA - MIN to MAX'
'F40 SN54F40 SN74F40
MIN TVP MAX MIN • "\~: ·MAX MIN MAX
tpLH
A or B V
1.6 3.6 6 "'~..v .' ,\"~\t'" 1.5 7
ns
tpHL 1 2.6 S ,;>".,-" 1 5.5
*AII typical values are at VCC = 6 V, TA = 25°C.
§Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
'For conditions as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1.

2-34
TEXAS ."
INSTRUMENTS
POST OFFICE BOX 856012 • DALLAS, TEXAS 75285
 SN54F51, SN74F51
DUAL 2·WIDE 2·INPUT, 2·WIDE 3·INPUT AND·DR·INVERT GATES
03209. JANUARY 1989

• Package Options Include Plastic "Small SN54F51 ... J PACKAGE

Outline" Packages, Ceramic Chip Carriers, SN74F51 ... 0 OR N PACKAGE
(TOP VIEW)
and Standard Plastic and Ceramic 300-mil
DIPs lA VCC
2A 1C
• Dependable Texas Instruments Quality and
28 18
Reliability
2C 1F
20 1E
description
2Y 10
The F51 provides 2-wide, 2-input, and 2-wide, GNO
3-input AND-DR-INVERT gates. The devices
perform the following Boolean functions: SN54F51 ... FK PACKAGE
1y = (1 A • 1B • 1C) + (1 D • 1 E • 1F) (TOP VIEW)
2Y = (2A • 2B) + (2C • 2D).
««UUU
U
N"-Z>-
The SN54F51 is characterized for operation over
the full military temperature range of - 55°C 3 2 1 2019
to 125°C. The SN74F51 is characterized for 28 4 18
operation from O°C to 70°C. NC 5 17
2C 6 16 IF
logic symbol t NC 7 15
20 8 14
1A & ;;'1 910111213
(12)
18 :>-OU:>-O
NZZ--
1C Cl
10 NC - No internal connection
1E
1F logic diagram (positive logic)
2A
28
2C
(5)
20

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

FUNCTION TABLES
GATE 1

INPUTS OUTPUT
1A 1B 1C 10 1E 1F 1Y
H H H X X X L
X X X H H H L
All other combinations H

GATE 2

INPUTS OUTPUT
2A 28 2C 20 2Y
H H X X L
X X H H L
All other combinations H

PRODUCTION DATA dDCU..IlIIIoontal.lnformotio. Copyright @ 1989. Texas Instruments Incorporated

oumnt II of pub/lootlo. dote. Prod.eta 00.10l'1li to
IHCIfiootlo.1 per thl tar....f TOXI. Inotruml.1I
oIa.de'" .am.ty. Pro••oIIo. ~r.....i.a d•• not TEXAS ~ 2-35
-.artly loci... taotina of .11 poromat.... INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75266
 SN54F51, SN74F51
DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-DR-INVERT GATES

absolute maximum ratings over free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state ...... ; . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F51 .......................... -55°e to 125°e
SN74F51 ............................. ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 0 e
TThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F51 SN74F51
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 rnA
IOH High-level output current -1 -1 rnA
C IOL Low-level output current 20 20 rnA

...mm TA Operating free-air temperature -55 125 0 70 °e

en electrical characteristics over recommended operating free-air temperature range (unless otherwise
::T noted)
CD
....
CD
U)
PARAMETER TEST eONDITIONST
MIN
SN54F51
TYpJ MAX MIN
SN74F51
TYP* MAX
UNIT

VIK Vee = 4.5 V, II = -18 mA -1.2 -1.2 V

Vee - 4.5 V, IOH - -1 rnA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, IOH = -1 mA 2.7
VOL Vee = 4.5 V. IOL = 20 rnA 0.35 0.5 0.35 0.5 V
II Vee - 5.5 V. VI - 7 V 100 100 ~A
IIH Vee = 5.5 V. VI = 2.7 V 20 20 ~
IlL Vee = 5.5 V. VI = 0.5 V -0.6 -0.6 rnA
lOS! Vee = 5.5 V. Vo = 0 -60 -150 -60 -150 rnA
leeH Vee = 5.5 V. VI = OV 1.8 3 1.8 3 rnA
leeL Vee = 5.5 V. VI = 4.5 V 5.5 7.5 5.5 7.5 rnA

switching characteristics (see Note 1)

Vec - 5 V. Vee - 4.5 V to 5 V.
CL - 50 pF. CL - 50 pF.
FROM TO RL - 500 Il. RL - 500 Il.
PARAMETER UNIT
(INPUT) IOUTPUT) TA - 25°C TA - MIN to MAX'
'F51 SN54F51 SN74F51
MIN TYP MAX MIN MAX MIN MAX
tpLH 2 3.5 5.5 1.5 7.5 1.5 6.5
Any Y ns
tpHL 1 2.5 4 1 5 1 4.5

*AII typical values are at Vce = 5 V. TA = 25°C.

§Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
'For conditions shown as MiN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circiJits and waveforms are shown in Section 1.

2-36
. TEXAS'"
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
 SN54F64, SN74F64
4·2·3·2 INPUT AND·DR·INVERT GATES
03178, AUGUST 198B-REVISED JANUARY 1989

• Package Options Include Plastic "Small SN54F64. . J PACKAGE

SN74F64 ... 0 OR N PACKAGE
Outline" Packages, Ceramic Chip Carriers,
(TOP VIEW)
and Standard Plastic and Ceramic 300·mil
DIPs A VCC
• Dependable Texas Instruments Quality and E D
Reliability F C
G B
description H K
J
These devices contain 4-2-3-2 input AND-OR-
GND y
INVERT gates. They perform the Boolean
function Y = ABCD + EF + GHI + JK. The 'F64
has totem-pole outputs. SN54F64 ... FK PACKAGE
(TOP VIEW)
The SN54F64 is characterized for operation over
u
the full military temperature range of - 55 DC u u
UJ«Z>Cl
to 125 DC. The SN74F64 is characterized for
operation from 0 DC to 70 DC. 1 20 19
F 4 18

logic symbol t NC 17
G 16

B
(I)
(II)
& ;;'1
NC
H
15
14 ...en
Q)
9 10 I I 12 13 Q)
C
(12)
ClU;..-, .c
(13) ZZ fn
0
(2)

(3)
&
(9

NC-No internal connection ...

CO
CO
Y
logic diagram (each device) (positive logic)
C
(4)
G &
(5) A -.......- _
H B
(6) c
D---l._-"
(9)
&
(10)
K

tThis symbol is in accordance with ANSI/IEEE Std 91 -1984 and Y

lEG Publication 617-12. G
Pin numbers shown are for 0, J, and N packages. H

PRODUCTION DATA docume.ts contain information Copyright © 1988, Texas Instruments Incorporated
current 8S of publication date. Products conform to
specifications par the terms of Texas Instruments TEXAS .."
:~~~~:~~i~at~:I~~8 ~~:~~~ti:r :1~O::~:::::t:;s~S not INSTRUMENTS
2·37
POST OFFICE BOX 656012 • DALLAS. TEXAS 75265
 SN54F64, SN74F64
4-2-3-2 INPUT AND-OR-INVERT GATES

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , ' , , " , , , , " -0,5 V to 7 V
Input voltage t , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , " -1,2 V to 7 V
Input current, , , , , , , , , , , , , , , , , ' , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , " - 30 mA to 5 mA
Voltage applied to any output in the high state, , , , , , , , , , , , , , , , , , , , , , ' , , , " - 0,5 V to Vee
eurrent into any output in the low state , , , , , , , , , , , , , , , , , , , ' , , , , , , , , , , , , , , , , , , " 40 mA
Operating free-air temperature range: S N 5 4 F 6 4 " " " " " " " " " " " " " - 55 °e to 125°e
SN74F64 , , , , , , , , , , , , , , , , , , , , , , , , , , , " ooe to 70 0 e
Storage temperature range " " " " " " " " " " " " " " " " " " " ' " - 65 °e to 150 0 e
tThe input voltage ratings may be e'xceeded provided the input current ratings are observed.

recommended operating conditions

SN54F64 SN74F64
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4,5 5 5,5 4,5 5 5,5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0,8 0,8 V
11K Input clamp current -18 -18 mA
IOH High-level output current -1 -1 mA
Low-level output current 20 20 mA
C IOL

...
I»
I»
TA Operating free-air temperature -55 125 a 70 °c

electrical characteristics over recommended operating free-air temperature range (unless otherwise
tJ)
J noted)
CD
...
CD
CII
PARAMETER TEST CONDITIONS

VCC = 4,5 V, 11=-18rnA

MIN
SN54F64
TYP* MAX
-1.2
MIN
SN74F64
TYP* MAX
-1,2
UNIT

V
VIK
VCC - 4,5 V, IOH - -1 mA 2.4 3,4 2,5 3,4
VOH V
VCC = 4,75 V, IOH = -1 rnA 2,7
VOL VCC = 4,5 V, IOL = 20 mA 0,30 0,5 0,30 0,5 V
II VCC = 5,5 V, VI - 7 V 0,1 0,1 rnA
IIH VCC = 5,5 V, VI = 2,7 V 20 20 ~A
IL VCC = 5,5 V, VI = 0,5 V -0,6 -0,6 mA
IOS§ VCC = 5,5 V, Va = 0 -60 -150 -60 -150 mA
ICCH VCC = 5,5 V, VI = a 1,9 2,8 1,9 2,8 rnA
ICCL VCC = 5,5 V, See Note 1 3,1 4,7 3.1 4,7 mA

switching characteristics (see Note 2)

Vcc - 5 v, VCC - 4,5 V to 5,5 V,
CL - 50 pF, CL - 50 pF,
FROM TO RL - 500O, RL - 500O,
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 25°C TA - MIN to MAX'
'F64 SN54F64 SN74F64
MIN Typt MAX MIN MAX MIN MAX
tpLH 1,7 4,6 6 1.7 8,5 1.7 7
Any Y ns
tpHL 1.2 3,2 4,5 1,2 6,5 1,2 5,5

*All typical values are at VCC = 5 V, TA = 25°C,

§ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions,
NOTES: 1. ICCL is measured with one input per gate at 4,5 V and all others grounded,
2. Load circuits and waveforms are shown in Section 1.

2-38 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F74, SN74F74
DUAL D·TYPE POSITIVE·EDGE·TRIGGERED FLlP·FLOPS
WITH CLEAR AND PRESET
MARCH 1987-REVISED JANUARY 1989

• Package Options Include Plastic "Small SN54F74 . . . J PACKAGE

Outline" Packages, Ceramic Chip Carriers, SN74F74 . . . 0 OR N PACKAGE
and Standard Plastic and Ceramic 300-mil (TOP VIEWI
DIPs
1CLR VCC
• Dependable Texas Instruments Quality and 10 2CLR
Reliability 1CLK 20
1m 2CLK
description 1Q 2PRE
These devices contain two independent D-type fa 2Q
positive-edge-triggered flip-flops. A low level at GNO 20
the Preset or Clear inputs sets or resets the
outputs regardless of the levels of the other
SN54F74 FK PACKAGE
inputs. When Preset and Clear are inactive
(high), data at the 0 input meeting the setup time (TOP VIEW)
requirements are transferred to the outputs on ulO:
the positive-going edge of the clock pulse. Clock __ 10:
o d Z>N
u ud
triggering occurs at a voltage level and is not
directly related to the rise time of the clock pulse. 3 2 1 20 19
Following the hold time interval, data at the D 1CLK 4 18 20
inputs may be changed without affecting the

..
NC 5 17 NC
levels at the outputs. 1PRE 6 16 2CLK
U)
The SN54F74 is characterized for operation over NC 15 NC
the full military temperature range of - 55°C to 1Q 8 14 CD
125°C. The SN74F74 is characterized for CD
9 1011 1213 .c

..
operation from O°C to 70°C. CI)
IOOUIOO
-ZZNN as
(!)
FUNCTION TABLE
NC - No internal connection
as
INPUTS OUTPUTS C
PRESET CLEAR CLOCK 0 a a
L H X X H L logic symbol t
H L X X L H
x 1PRE (4)
L l X Ht Ht s (5)
10
H H t H H L 1ClK (3)
H H t L L H 10 (2)
10
H H L X aD aD 1ClR
tThe output levels in this configuration are not 2PRE
20
guaranteed to meet the minimum levels for VOH. 2ClK
Furthermore, this configuration is nonstable; that 20
20
is, it will not persist when either Preset or Clear 2ru
returns to its inactive (highllevel.

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

lEe Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

PRODUCTION DATA documonts co.lIl. 1.lormllio. Copyright © 1987, Texas Instruments Incorporated
cumnt .1 of publicatio. d.lI. Produeta conlorm to
.p..llicllio.. par tho 1Im11 01 To••• Instruments
dlndlnl wI".nty. Production p......ln. do...ot TEXAS .." 2-39
n...... rlly includo IIl1in. 01 .n p.",mll.,.. INSTRUMENTS
POST OFFICE BOX 655012 • OALLAS, TEXAS 76266
 SN54F74. SN74f74
DUAL D·TYPE POSITIVE·EDGE·TRIGGERED FLlp·FLOPS
WITH CLEAR AND PRESET

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F74. . . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 126 °e
SN74F74 ............................. ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 °e

t The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F74 SN74F74
UNIT
MIN NOM MAX MIN NOM MAX
vee Supply voltage 4.5 5 5.5 4.5 5 5.5 v
vlH High·level input voltage 2 2 v
Vil low-level input voltage O.B O.B v
11K Input clamp current -IB -IB mA
10H High-level output current -1 -1 mA
C IOl Low-level output current 20 20 mA
....I»
I»
TA Operating free-air temperature 55 125 0 70 °e

(I) electrical characteristics over recommended operating free-air temperature range (unless otherwise
::r noted)
CD
....
CD
(I)
PARAMETER TEST CONDITIONS
MIN
SN54F74
TYP* MAX MIN
SN74F74
TYP* MAX
UNIT

VIK Vee = 4.5 V, II = -18mA -1.2 -1.2 V

Vee - 4.5 V, 10H - -1 mA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, IOH=-lmA 2.7
VOL Vee = 4.5 V, 10l = 20 mA 0.30 0.5 0.30 0.5 V
II Vee - 5.5 V, VI - 7 V 0.1 0.1 mA
IIH Vee = 5.5 V, VI = 2.7 V 20 20 ,.A
I Data, elK Vee = 5.5 V, VI = 0.5 V
-0.6 -0.8
mA
III
Imorm -1.8 -1.8
10S§ Vee = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
Ice Vee -5.5 V, See Note 1 10.5 16 10.5 16 mA

tAli typical values are at Vee = 5 V, TA = 25°C.

§ Not mora than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: Ice measured with 0, elK, and m
grounded, then with D, elK, and m
grounded.

2-40
TEXAS ...,
INSTRUMENTS
POST OFF.ICE BOX 655012 • DALLAS. TeXAS 75265
 SN54F74, SN74F74
DUAL D·TYPE POSITIVE·EDGE·TRIGGERED FLlp·FLOPS
WITH CLEAR AND PRESET

timing requirements over recommended operating free·air temperature range (unless otherwise noted)

Vcc - 5 v, vcc - 4.5 V to 5.5 v,

TA - 25°C TA - MIN to MAXt
UNIT
'F74 SN54F74 SN74F74
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 80 0 100 MHz
Setup time Data high 2 3 2
tsu ns
before CLK t Data low 3 4 3
Hold time Data high 1 2 1
th ns
after CLK t Data low 1 2 1
CLK high, PRE or CLR low 4 4 4
tw Pulse dUration ns
CLK low 5 6 5
Inactive-state setup
tsu PRE or CLR to CLK 2 3 2 ns
time before CLKtt

switching characteristics (see Note 2)

Vce = 5V, vee - 4.5 V to 5.5 v,

CL = 50pF, eL - 50 pF,
FROM TO RL=500Q, RL - 5000,
PARAMETER
(INPUT) (OUTPUT I TA=25°e
'F74
TA - MIN to MAXi
SN54F74 SN74F74
UNIT

CD
...en
MIN Typt MAX MIN MAX MIN MAX CD
f max 100 145 100 MHz .l:
80
en
...caca
tPLH 3 4.9 6.8 3 8.5 3 7.8
CLK OorO ns
tPHl 3.6 5.8 8 3.6 10.5 3.6 9.2
tPlH 2.4 4.2 6.1 2.4 8 2.4 7.1
PRE or.CLR OorO ns
tpHL 2.7 6.6 9 2.7 11.5 2.7 10.5 Q
t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
:I: Inactive-state setup time is also referred to as "recovery time".
§ All typical values are at VCC = 5 V, TA = 25°C.
NOTE 2: Load circuits and waveforms are shown in Section 1.

TEXAS . " 2·41

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
C
m
....
m
en
:::s-
CD
!(I)

2-42
 SN54F86, SN74F86
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
03210. JANUARY 1989

• Package Options Include Plastic "Small SN54F86 •.. J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F86 ••. 0 OR N PACKAGE
and Standard Plastic and Ceramic 300-mil (TOP VIEWI
DIPs
1A VCC
• Dependable Texas Instruments Quality and 18 48
Reliability 1Y 4A
2A 4Y
description 28 38
2Y 3A
These devices contain four independent 2-input
GND 3Y
Exclusive-OR gates. They perform the Boolean
functions Y = AeB = AB + AS in positive logic.
SN54F86 ..• FK PACKAGE
A common application is as a true/complement
(TOP VIEWI
element. If one of the inputs is low. the other
U
input will be reproduced in true form at the m<l:U um
~Z><t
output. If one of the inputs is high. the signal on
the other input will be reproduced inverted at the 3 2 1 2019
output. 4 18
5 17 NC
The SN54F86 is characterized for operation over
16 4Y
the full military temperature range of - 55 °e to
125°e. The SN74F86 is characterized for
operation from ooe to 70 oe.
15
14
NC
38
...en
Q)
Q)
9 1011 12 13
.s::
FUNCTION TABLE >-OU>-<l: en
(each gatel
INPUTS OUTPUT
"'ZZM'"
l!)

NC - No internal connection
...
CO
CO
A B Y C
L L L
logic symbol t
L H H
H L H lA
111
=1 (31
H H L
(21 lY
18
(41
2A (61
(51 2Y
2B
(91
3A (81
(101 3Y
38
(121
4A (111
(131 4Y
48

tThis symbol is in accordance with ANSI/IEEE Sid 91-1984 and

~
lEe Publication 617-12. w
Pin numbers shown are for D, J, and N packages.
:>w
a::
0..
t-
(.)
:::)
o
o
a::
0..
PRODUCT PREVIEW do.umantl .ontaln Information Copyright © 1989, Texas Instruments Incorporated
on products in the formative or design ~h••• of
da.alopmant. Chara.taristl. data an~ other TEXAS •
spa.llI.ation. ara da.lgn goal•. Ta.as Instrumonts 2-43
,esarves the right to changa or discontinue thase
products without noliee.
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 SN54F86, SN74F86
QUADRUPLE2-INPUT EXCLUSIVE-OR GATES

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . .. . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F86. . . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F86 ............................. OOCto70oC
Storalle temperature range ......................................... - 65°C to 150°C
t The input ~oltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN64F86 SN74F86
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 rnA
IOH High-level output current -1 -1 rnA

c
Q)
IOL
TA
Low-level output current
Operating free-air temperature -55
20
125 0
20
70
rnA
·e
~
Q)
electrical characteristics over recommended operating free-air temperature range (unless otherwise
en
::::r
noted)
CD SN54F86 SN74F86
PARAMETER TEST CONDITIONS UNIT
CD MIN TYP* MAX MIN TYP* MAX
~
UI VIK Vce = 4.5 V, II = -18mA -1.2 -1.2 V
VCC = 4.5 V, IOH = -1 rnA 2.5 3.4 2.5 3.4
V
VOH
VCC = 4.75 V, IOH = -1 rnA 2.7
VOL Vec = 4.5 V, IOL = 20 rnA 0.30 0.5 0.30 0.5 V
Vce = 5.5 V, V, = 7 V 0.1 0.1 rnA
"
IIH Vee = 5.6 V, V, = 2.7 V 20 20 p.A
',L Vcc = 5.5 V, V, = 0.5 V -0.6 -0.6 rnA
IOS§ Vcc = 5.5 V, Vo = 0 -60 -150 -60 -150 rnA
IceH Vcc = 5.5 V, VI = 0 15 23 16 23 rnA
ICCL Vcc = 5.5 V, VI = 4.5 V 18 28 18 28 rnA

switching characteristics (see Note 1)

"tI
::g VCC - 5 v, vcc - 4.5 V to 5.5 V.

o CL - 60 pF, CL - 60 pF,

c PARAMETER
FROM TO RL - 5000, RL - 600 O.
UNIT
c: (INPUT} COUTPUT) TA - 25·C TA - MIN to MAX'

n
-I
MIN
'F86
TYP MAX MIN
SN54F86
MAX MIN
SN74F86
MAX
tpLH A or B 2.2 3.6 5.5 2.2 6.5
Y ns
"tI tpHL Cother input low) 2.2 3.8 5.5 2.2 6.5
::g tpLH A or B 2.7 4.9 7 2.7 8
y
m ns

-:e< *
tpHL lother input high) 2.2 4.3 6.5 2.2 7.5
All typical values are at VCC = 5 V, TA = 25 ·e.
m § Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
, For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuit and voltage waveforms are shown in Section 1.

2-44 TEXAS ~
INSTRUMENlS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F109. SN74F109
DUAL J.j( POSITIVE·EDGE·TRIGGERED FLlp·FLOPS
WITH CLEAR AND PRESET
02932. MARCH 1987-REVISEO JANUARY 1989

• Packaga Options Include Plastic "Small SN64F109 ••• J PACKAGE

Outline" Packages. Ceramic Chip Carrlars. SN74F109 . • • D OR N PACKAGE
and Standard Plastic and Caramlc 300·mll (TOP VIEW)
DIPs
1CLR VCC
• Dapendable Texas Instruments Quality and 1J 2CLR
Reliability 1K 2J
1CLK 2K
description
1PRE 2CLK
These devices contain two independent J.j( 10 2m
positive·edge·triggered flip·flops. A low level at 10 20
the Preset or Clear inputs sets or resets the GNO 20
outputs regardless of the levels of the other
inputs. When Preset and Clear are inactive
(high), data at the J and j( input meeting the SN64F109. • FK PACKAGE
setup time requirements are transferred to the (TOP VIEW)
outputs on the positive-going edge of the clock ulO::
pulse. Clock triggering occurs at a voltage level 1d0:: uZ>N
..,__ ud

•
and is not directly related to the rise time of the
clock pulse. Following the hold time interval, 3 2 1 2019
data at the J and j( inputs may be changed 4 18
without affecting the levels at the outputs. 5 17
These versatile flip-fl0l;!!! can perform as toggle
flip-flops by grounding K and trying J high. The'y
6
7
16
15
....rn
Q)
also can perform as Ootype flip-flops if J and K Q)
are tied together. 8 14 .c
9 1011 1213 tn
The SN54F109 is characterized for operation
IcoulCC
over the full military temperature range of
- 55°C to 125°C. The SN74F109 is
_ZZNN
C)
!ca
characterized for operation from OOC to 70°C. NC - No internal connection o
FUNCTION TABLE logic symbol t
(EACH FLlP·FLOP)

INPUTS OUTPUTS
PRESET CLEAR CLOCK J K Q Q
L H X X X H L
H L X X X L H
L L X X X H· H·
H H t L L L H
H H t H L TOGGLE
H H t L H 00 Cio
H H T H H H L
H H L X X 00 ~
·The output levels in this configuration are not guaranteed
to meet the minimum levels for VOH. Furthermore. this tThis symbol is in accordance with ANSIIIEEE Std 91·1984 and
configuration is nonstable; that is, it will not perSist when IEC Publication 617·12.
either Preset or Clear returns to its inactive (high) level.
Pin numbers shown are for D. J. and N packages.

PRODUCTION DATA do.uments .o.tal. Informatlo. Copyright @ 1987, Texas Instruments Incorporated
.urrant I. 01 publlcatio. dlte. Products .o.form to
.paclll••tio.1 por thl tlrma of TI..I lnatrumanll
TEXAS . " 2-45
:'=~I~.I~:I~~i ~~:;ti:.. lil":::~A:.~a not INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS. TI;XAS 76285
 SN54F1D9, SN74F1D9
DUAL J~i POSITIVE· EDGE·TRIGGERED· FLlP·FlOPS
WITH CLEAR AND PRESET
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee ........................................... : .... -0.5 V to 7 V
Input voltage t . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2. V to 7 V
Input current t ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state .......... , .... ;.... , . . . . . . .. -0.5Vto Vee
eurrent into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F109. . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F109 ............................ ooe to 70 0 e
Storage temperature range .......................................... - 65 °e to 150 0 e
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54Fl09 SN74Fl09
UNIT
MIN NOM MAX MIN NOM MAX
vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level Input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current ~18 18 mA
IOH High-level output current -1 -1 mA
C IOL Low-level output current 20 20 mA

....
I»
I»
TA Operating free-air temperature -55 125 0 70 De

tn electrical characteristics over recommended operating free-air temperature range (unless otherwise
::r noted)

it
(n
PARAMETER TEST CONDITIONS
MIN
SN54Fl09
TYP* MAX MIN
SN74Fl09
TYP* MAX
UNIT

VIK Vee = 4.5 V, II = -18mA -1.2 -1.2 V

Vee = 4.5 V, IOH = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, IOH = -1 mA 2.7
VOL Vee = 4.5 V, IOL = 20 mA 0.30 0.5 0.30 0.5 V
II Vee = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH Vee = 5.5 V, VI = 2.7 V 20 20 p.A
I J. R", eLK Vee = 5.5 V. VI = 0.5 V
-0.6 -0.6
mA
IlL
I J5RE orm -1.8 -1.8
10S§ Vee = 5.5 V, Vo = 0 -80 -150 -60 -150 mA
lee Vee = 5.5 V, See Note 1 11.7 17 11.7 17 mA

* All typical values are at Vee = 5 V, TA = 25 De.

§ Not more than one output should be shorted at a time and the duration· of tha short circuit should not exceed one second.
NOTE 1: lee measured with J, K, eLK, and PRE grounded, then with J, K. eLK, and m.

2-46 TEXAS •
INSTRUMENTS
POST OFFICE BOX 865012 • DAtI.AS, TeXAS 75265
 SN54F109. SN74F109
DUAL J.j( POSITIVE·EDGE· TRIGGERED FLlp·FLOPS
WITH CLEAR AND PRESET
timing requirements over recommended operating free-air temperature range (unless otherwise noted)
Vcc - 5 V, Vce - 4.5 V to 5.5 V,
TA - 25·e TA - MIN to MAXt
UNIT
'F109 SN54F109 SN74F109
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 70 0 90 MHz
Setup time Data high 3 3 3
tsu ns
before ClK t Data low 3 3 3
Hold time Data high 1 1 1
th ns
after ClK t Data low 1 1 1

tw Pulse duration
ClK high, me or m low 4 4 4
ns
ClK low 5 5 5
Inactive-state setup
me or ClR to ClK

,.
tsu 2 2 2 ns
time before ClKt

switching characteristics (see Note 2)

Vee = 5V, Vee = 4.5Vto5.5V,
el=50pF, el = 50pF,
FROM TO Rl=500Q, RL = 50012,
PARAMETER UNIT
(INPUT) (OUTPUT) TA = 25·e

MIN
'F109
TYP* MAX MIN
TA = MIN to MAXt
SN54Fl09
MAX MIN
SN74Fl09
MAX
...rn
CD
CD
f max 100 150 70 90 MHz ~
tpLH 3 4.9 7 3 9 3 8 CI)
tPHl
tplH
~orm
ClK OorO

OorO
3.6
2.4
5.8
4.8
8
7
3.6
2.4
10.5
9
3.6
2.4
9.2
8
ns

ns
...caca
tpHL 2.7 6.6 9 2.7 11.5 2.7 10.5 Q
t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
* All typical values are at VCC = 5 V, T A = 25 ·C.
NOTE 2: load circuits and waveforms are shown In Section 1.

TEXAS • 2-47
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75266
2-48
 SN54F112, SN74F112
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
MARCH 1987 - REVISED JANUARY 1989

• Package Options Include Plastic "Small SN54F112 . . . J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F112 . . . 0 OR N PACKAGE
and Standard Plastic and Ceramic 300-mil (TOP VIEW)
DIPs
1ClK VCC
• Dependable Texas Instruments Quality and 1K 1ClR
Reliability 1J 2ClR
1PRE 2ClK
description 10 2K
These devices contain two independent J-K 10: 2J
negative-edge-triggered flip-flops. A low level at 20 2PRE
the Preset or Clear inputs sets or resets the GND 20
outputs regardless of the levels of the other
inputs. When Preset and Clear are inactive SN54F112 . FK PACKAGE
(high). data at the J and K inputs meeting the
(TOP VIEW)
setup time requirements are transferred to the
outputs on the negative-going edge of the clock
pulse. Clock triggering occurs at a voltage level
:J
><: u u
~~Z>~
ul5
uu
and is not directly related to the fall time of the
clock pulse. Following the hold time interval. 3 2 1 2019
data at the J and K inputs may be changed 1J 4 '18 2ClR
without affecting the levels at the outputs. 1PRE 5 17 2ClK
These versatile flip-flops can perform as toggle NC 6 16 NC
flip-flops by tying J and K high. 10 7 15 2K
The SN 54F 112 is characterized for operation 15 B 14 2J
over the full military temperature range of
-55°C to 125°C. The SN74Fl12 is
100 U 0l~
characterized for operation from OOC to 70°C. N2ZNCt
(!) N
FUNCTION TABLE
NC-No internal connection
INPUTS OUTPUTS
PRE CLR CLK J K Q Q logic symbol t
L H X X X H L
H L X X X L H
L L X X X Ht Ht 10
H
H
H
H •• L
H
L
L
00
H L
00
10:
H H
• L H L H
H
H
H
H •
H
H
X
H
X
TOGGLE
00 00 2J 20
2CLK
tThe output levels in this configuration are not guaranteed
2K
to meet the minimum levels for VOH. Furthermore, this
configuration is nonstable; that is, it will not persist when 2CLR
either Preset or Clear returns to its inactive (high) level.
tThis symbol is in accordancea with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

UNLESS OTHERWISE IOTED this d...mant ••ntai.. Copyright © 1987, Texas Instruments Incorporated
PRDDUCTIDI DATA i.lomation ••rrenl al of
p.bllatia. dIte. Prod.eII ...Ionn te .paolficationl
par I" tennl of Tna. I.strumanll standanl TEXAS . " 2-49
l:r:."\!'t':O:":I=':::'- nat .......ril' INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F112, SN74F112
DUAL J·K NEGATIVE·EDGE·TRIGGERED FLlp·FLOPS
WITH CLEAR AND PRESET

logic diagram. (positive logic)

PRE---+------~--------..J L-------~~-----r---~

K-=====I
CLK----------~--------------~----------~~

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. Vee ............................................... , -0.5 V to 7 V
Input voltage t ................................................... '.. , -'.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state ................... _ . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F1 12 . . . . . . . . . . . . . . . . . . . . . . . .. ..,. 55 °e to .125 °e
SN74F112 ............................ ooe to 70 0 e
Storage temperature range ................................... _ . . . .. - 65 °e to 1 50 0 e
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F112 SN74F112
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage --( 0.8 0.8 V
11K Input clamp current "Q'I,l::.N -18 -18 mA
10H High-level output current ~~O-~'" -1 -1 mA
10L Low-level output current 20 20 mA
TA Operating free-air temperature 55 125 a 70 °e

2-50
POST OFFICE BOX 666012 • DALLAS, TEXAS 7ti286
 SN54F112, SN74F112
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54Fll2 SN74F112
PARAMETER TEST CONDITIONS UNIT
MIN TYpt MAX MIN TYpt MAX
VIK VCC = 4.5 V, II = -18mA -1.2 -1.2 V
VCC = 4.6 V, 10H = -1 mA 2.5 3.4 2.5 3.4
VOH V
VCC - 4.75 V, 10H = -1 mA 2.7
VOL VCC = 4.5 V, 10l = 20 mA 0.30 0.5 0.30 0.5 V
II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI - 2.7V 0 20 20 p.A
I Jar K """Cv ,.&, -0.6 -0.6
III I !'lIlorern VCC = 5.5 V, VI = 0.5 V «,?-v -3 -3 mA
I CLK -2.4 -2.4

10S* VCC = 5.5 V, Vo = 0 -60 -150 -60 -150 mA

ICC VCC = 5.5 V, See Note 1 12 19 12 19 mA

timing requirements over recommended operating free-air temperature range (unless otherwise noted)
Vee - 5 v, Vec - 4.5 V to 5.& v,
TA - 25°C TA - MIN to MAXI
UNIT

MIN
0
'FlU
MAX
110
MIN
SN54Fl12
MAX MIN
0
SN74F112
MAX
100 MHz
...
(I)

CD
f clock Clock frequency CD
Data high 4 5 .c
tsu Setup time before ClK.
Data low 3 ,(";\ 3.5
ns en
th Hold time after ClKI
Data high
Data low 0
0 "-o~~~~
'( <>'(oY-~
0
0
ns ...asas
tw Pulse duration
ClK high or low 4.5 5
ns C
CiJi or PRE low 4.5 5
Inactive-state setup
tsu PRE or ern high 4 5 ns
time before ClK.1

switching characteristics (see Note 2)

Vcc = 5V, Vce - 4.5 V to 5.5 V,
el = 50pF, ~ - 50 pF,
FROM TO Rl = 50012, RL - 500 D,
PARAMETER UNIT
(lNPUlI (OUTPUll TA = 25°C TA - MIN to MAXI
'F112 SN54F112 SN74Fl12
MIN TYP MAX MIN MAX MIN MAX
f max 110 130 100 MHz
tplH 1.2 4.6 6.5 ~<\.;;I.< 1.2 7.5
ClK OorO ns
tpHl 1.2 4.6 6.5 ,<,<-v •.,,';y 1.2 7.5
tplH
tpHl
~orern OorO
1.2
1.2
4.1
4.1
6.5
6.5
" 1.2
1.2
7.5
7.5
ns

t All typical values are at VCC = 5 V, TA = 25°C.

* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§ For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
1lnactive-atate setup time is also referred to as "recovery time".
NOTES: 1. ICC is measured with all outputs open, the and a a
outputs alternately high and the clock input grounded at the time of
measurement.
2. load circuits and waveforms are shown in Section 1.

TEXAS . , 2-51
INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS, TEXAS 75285
2-52
 SN54F113, SN74F113
DUAL J·K NEGATIVE·EDGE·TRIGGERED FLlP·FLOPS WITH PRESET
02932. MARCH 1987 - REVISED JANUARY 1989

• Package Options Include Plastic "Smell SN54F113 . . . J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F113 . . . 0 OR N PACKAGE
and Standard Plastic and Ceramic 300·mil (TOP VIEW)
DIP8
1CLK VCC
• Dependable Texas In8truments Q.uallty and 1K 2CLK
Reliability 1J 2K
1PRE 4 2J
description 1Q 2PRE
These devices contain two independent J-K
,0: 2Q
GND 20
negative-edge-triggered flip-flops. A low level at
the Preset input sets the outputs regardless of
the levels of the other inputs. When Preset (PRE) SN54F113 . FK PACKAGE
is inactive (high). data at the J and K inputs (TOP VIEW)
meeting the setup time requirements are
transferred to the outputs on the negative-going
edge of the clock pulse. Clock triggering occurs
3 2 1 2019
at a voltage level and is not directly related to
the rise time of the clock pulse. Following the 1J 4 18
NC 5 17
hold time interval. data at the J and K inputs may
be changed without affecting the levels at the
outputs. These versatile flip-flops can perform
as toggle flip-flops by tying J and K high.
1PRE
NC
1Q
6
7
8
16
15
14
...
U)
G)
G)
The SN54F113 is characterized for operation
9 1011 1213
..c
IOOUIOO (I)
over the full military temperature range of
-55°C to 125°C. The SN74F113 is
characterized for operation from O°C to 70°C.
_ZZNN
(!l

NC - No internal connection
...asas
C
FUNCTION TABLE
logic symbol t
INPUTS OUTPUTS
(4)
PRE ClK J K 0 Ii 1m s (5)
10
(3)
l X X X H l 1J 1J
H
• L L 00 Cio 1ClK
H
• H l H L 1K
1li

H
• l H L H 2J!1m
20
H
H H
• H
X
H
X
TOGGLE
Qo 00 2CLK
2J
2ti
2K

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and

IEC Publication 617·12.
Pin numbers shown are for D. J, and N packages.

UNLESS OTHERWISE IOTEO Ihll !Iac.llln! _Ino Copyright @ 1987, Texas Instruments Incorporated
PRODUCTIOI DATA I.fa_tli. 0.'II1II II of
::'';:H~. ':r~':D=:.:r.-':t."=~ TEXAS . " 2-53
WI!I'I!IIIY. PnduatI..............II-..r11y
I.oludo iIItInl of .11 ..........
INSTRUMENlS
POST OFFICE BOX 655012 • DALLAS~ TeXAS 75285
 SN54F113,SN74Ff13
DUAL J·K NEGATIVE·EDGE·TRIGGEREDFLlP·FLOPS'
WITH PRESET

logic diagram (positive logic)

Q iI

~--+--------.----~

CLK

absolute maximum ratings over operating free-air temperature range (unlass otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. -0.5 V to 7 V
Input voltage t ...................................................... -1.2 V to 7 V

aC
I»
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state ...................... '. . . . . . . . . . . . . . . . .. 40.mA
(I) Operating free-air temperature range: SN54F1 13 . . . . . . . . . . . . . . . . . . . . . . . .. :.. 55°C to 125°C
::T SN74F113 ............................ ooC to 70°C
CD Storage temperature range ......................................... - 65°C to 150°C
!en tThe input voltage ratings may be exceeded provided the Input current ratings are observed.

recommended operating conditions

SN64F113 SN74F113
UNIT
MIN NOM MAX MIN NOM MAX
Vce Supply voltage 4.6 6 6.6 4.5 5 6.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage .ri O.B O.B V
11K Input clamp current AOQ'::.:.~ -1B 1B mA
IOH High-level output current . ',,~«..' -1 1 mA
IOL Low-level output current 20 20 mA
TA Operating free·air temperature -55 125 0 70 ·e

2-54 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS, TeXAS 16265
 SN54F113, SN74F113
DUAL J·K NEGATIVE·EDGE·TRIGGERED FLlp·FLOPS
WITH PRESET
electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F113 SN74F113
PARAMETER TEST CONDITIONS UNIT
MIN TVpT MAX MIN TVpt MAX
VIK VCC = 4.5 V, II = -18mA -1.2 -1.2 V
VCC - 4.5 V, 10H = -1 rnA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V, 10H = -1 rnA 2.7
VOL VCC = 4.5 V, 10l = 20 rnA 0.3
0.5 0.3 0.5 V
II VCC = 5.5 V, VI = 7 V 0.1 0.1 rnA
IIH VCC = 5.5 V, VI = 2.7 V ""v 20 20 pA
I Jar K ,,,'
-0.6 -0.6
IlL 1m VCC = 5.5 V, VI = 0.5 V -3 -3 rnA
I ClK -2.4 -2.4
10S* VCC = 5.6 V, Vo = 0 -60 -150 -60 -150 rnA
ICC VCC = 5.5 V, See Note 1 12 19 12 19 rnA

timing requirements over recommended operating free-air temperature range (unless otherwise noted)
Vcc - 5 V, Vcc - 4.6 V to 5.6 V,
TA - 2S·C TA - MIN to MAXI
UNIT
'F113 SN54Fl13 SN74Fl13

fclock Clock frequency

MIN
0
MAX
110
MIN MAX MIN
0
MAX
100 MHz
...
U)
Q)
Data high 4 5 Q)
tsu Setup time before ClK.
Data low 3 3.5
ns .c
U)
th Hold time after ClKI Data high or low 0 ." <' 0 ns

tw Pulse duration
ClK high or low
PRE low
4.5
4.5
5
5
ns ...asas
Inactive·state setup o
tsu j5fi! high 4 5 ns
time' before ClK.

switching characteristics (see Note 2)

Vcc = SV, VCC - 4.6 V to 6.6 V,
Cl=50pF, CL - 60 pF,
FROM TO RL = 50011, RL - 600 D,
PARAMETER UNIT
(INPUT) (OUTPUT) TA = 2S·C TA - MIN to MAXI
'F113 SN54F113 SN74F113
MIN TVP MAX MIN MAX MIN MAX
f max 110 125 100 MHz
tplH 1.2 3.6 6 1.2 7
ClK Oar!! ns
tpHl 1.2 3.6 6 1.2 7
tplH 1.2 4.1 6.5 1.2 7.5
PRE Oar!! ns
tpHl 1.2 4.1 6.5 1.2 7.5

t All typical values are at VCC = 5 V, TA = 25 ·C.

* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§ For condiltlons shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured with all outputs open with the 0 and!! outputs alternately at high level; at the time of measurement,
the clock input is grounded.
2. load circuits and waveforms are shown in Section 1.

TEXAS • 2-55
INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS. TeXAS 75265
C
m
r+
m
en
':r
CD
CD
r+
en

2-56
 SN54F114, SN74F114
DUAL J·K NEGATIVE·EDGE·TRIGGERED FLlp·FLOPS
WITH PRESET, COMMON CLEAR, AND COMMON CLOCK
02932. MARCH 1987-REVISEO JANUARY 1989

• Package Options Include Plastic "Small SN54F114 . . • J PACKAGE

Outline" Packages. Ceramic Chip Carriers. SN74F114 . . . 0 OR N PACKAGE
and Standard Plastic and Ceramic 300-mil (TOP VIEW)

DIPs CLR VCC

• Dependable Texas Instruments Quality and 1K ClK
Reliability 1J 2K
1PRE 2J
description 10 2PRE
10 20
These devices contain two independent J-K GND 20
negative-edge-triggered flip-flops. A low level at
the Preset or Clear inputs sets or resets the
SN54F114 . FK PACKAGE
outputs regardless of the levels of the other
(TOP VIEW)
inputs. When Preset and Clear are inactive
(high). data at the J and K inputs meeting the
setup time requirements are transferred to the
outputs on the negative-going edge of the clock

•
3 2 1 20 19
pulse. Clock triggering occurs at a voltage level
and is not directly related to the fall time of the 1J 4 18
NC 5 17
clock pulse. Following the hold time interval.
6
data at the J and K inputs may be changed
without affecting the levels at the outputs.
These versatile flip-flops can perform as toggle 8
7
...
U)

Q)
9 1011 1213 Q)
flip-flops by tying J and K high. .c
The SN54Fl14 is characterized for operation
looUIOO
...-ZZNN
tn
over the full military temperature range of
-55°C to 125°C. The SN74Fl14 is
(!l

NC - No internal connection
...
ca
ca
characterized for operation from OOC to 70°C. C
logic symbol t
FUNCTION TABLE

INPUTS OUTPUTS
CUi
PRE CLR CLK J K Q Q ClK
L H X X X H L 1Plil
10
H L X X X L H 1J
L X X X Ht Ht 111
L 1K
H H
• L L 00 00 2PRE
H H
• H L H L 2J
20
211
H H
• L H L H 2K
H
H
H
H
•
H
H
X
H
X
TOGGLE
00 00 tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
tThe output levels in this configuration are not Pin numbers shown are for Dr J, and N packages.
guaranteed to meet the minimum levels for VOH.
Furthermore, this configuration is nonstable; that is,
it will not persist when either Preset or Clear returns
to its inactive (high) level.

UNLESS OTHERWISE NOTED this "'.IIII1.onbi.. Copyright © 1987, Texas Instruments Incorporated
PROOUCTIO. DATA inlOllllalia•••mot II 01
pobIillllio. dIlL Praducts oonfanI to opocIfIllllion. TEXAS •
par do. bl'llll 01 Till. Instrumlllll IIInd.nI 2-57
:.r::'t!t=r=..,..... oot • ..,....;Iy INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
 SN54F114. SN74F114
DUAL J;K NEGATlVE·EDGE·TRIGGERED FLlP·FLOPS
WITH PRESET. COMMON CLEAR. AND COMMON CLOCK

logic diagram (positive logic)

PRE _+___......___-1

K-=====I ~=====+-J

elK '-.-'
TO OTHER F-F

absolute maximum ratings over operating free-air temperature range' (unless otherwise noted)
Supply voltage, Vee, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
C Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
! Voltage applied to any output in the high state. . . .. . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
I» eurrent into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
(I) Operating free-air temperature range: SN54F114 ....................... " - 55 °e to 125°e
:r SN74F114 ............................ OOeto70oe
m Storage temperature range ...... , .. ".............................. - 65 °e to 150 0 e
ur tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN64F114 SN74F114
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 ~ 2 V
Vil low-level Input voltage o.(;.~' 0.8 0.8 V
11K Input clamp current .c~ -18 -18 mA
IOH High-level output current "Q" -1 -1 mA
IOl Low-level output current <? 20 20 mA
TA Operating free-air tempereture 65 125 0 70 ·C

2-58 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 86&012 • DALLAS. TEXI\S' 762&5
 SN54F114, SN74F114
DUAL J·K NEGATIVE·EDGE·TRIGGERED FLlP·FLOPS
WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

electrical characteristics over recommended operating free· air temperature range (unless otherwise
noted)
SN64F114 SN74F114
PARAMETER TEST CONDITIONS UNIT
MIN Typt MAX MIN TYpT MAX
vlK Vee = 4.5 V, II = -18 mA -1.2 -1.2 V
Vee - 4.5 V, IOH = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, IOH = -1 mA 2.7
VOL Vee = 4.5 V, IOL = 20 mA 0.3 0.5 0.3 0.5 V
II Vee - 5.5 V, VI - 7 V 0.1 0.1 mA
IIH Vee = 5.5 V, VI = 2.7 V c,'· 20 20 pA
I J or K ,,~;(y~';~'i;,j" -0.6 -0.6
. «11:<'
IlL I f5I!il!orern Vee = 5.5 V, VI = 0.5 V -3 -3 mA
I CLK -2.4 -2.4
lost Vee = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
ICC Vee = 5.5 V, See Note 1 12 19 12 19 mA

timing requirements
VCC - 5 V. VCC - 4.5 V to 5.5 V,
TA - 25°C TA - MIN to MAXi

MIN
'Fl14
MAX MIN
SN54F114
MAX
SN74F114
MIN MAX
UNIT
... U)

Q)
f clock Clock frequency 0 100 0 90 MHz Q)
Data high 4 5 .c
tsu Setup time before ClKI ns CJ)
Data low

th Hold time after ClK.

Data high
or low
3

0
3.5

0 ns ...caca
C
?\\~~~~~N
CLK high
tw Pulse duration 4.5 5 ns
or low
PRE or ClR
tw Pulse duration 4.0 5 ns
low
f5I!il! or ern
tree Recovery time 4 5 ns
to CLK

switching characteristics (see Note 2)

Vcc = 5V, VCC - 4.6 V to 5.5 v,
Cl = 50pF, CL - 50 pF,
FROM TO RL=500Q, ilL - 500 n,
PARAMETER UNIT
(INPUT) (OUTPUT) TA = 25°C TA - MIN to MAX.
'Fl14 SN54F114 SN74F114
MIN TYP MAX MIN MAX MIN MAX
f max 100 125 90 MHz
tplH
ClK QorIT
2.2 4.6 6.5 t·:' 2.2 7.5
ns
tpHL 2.2 5.1 7.5 .,l~)\J'~1C't" 2.2 8.5
tplH
PRE orCLR QorIT
2.2 4.1 6.5 (;.~:i;" 2.2 7.5
ns
tpHl 2.2 4.1 6.5 2.2 7.5

t All typical values are at Vec = 5 V, TA = 25°C.

t Not more than one output should be shorted at a time and the dUration of the short circuit should not exceed one second.
§ For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured with an outputs open, the Q and IT outputs alternately at high level and at the time of measurement, the clock Is
grounded.
2. Load circuits and waveforms are shown in Section 1.

TEXAS . . 2-59
INSTRUMENTS
POST OFfICE BOX 655012. DALLAS, TEXAS 75265
cQ)
r+
Q)

fA
=r
CD
CD
r+
en

2-60
 SN54F125. SN74F125
QUADRUPLE BUS BUFFER GATES WITH 3·STATE OUTPUTS
03211. JANUARY 1989

• 3·State Outputs Drive Bus Lines or Buffer SN64F126 ..• J PACKAGE

Memory Address Registers SN74F126 .•. D OR N PACKAGE
(TOP VIEW)
• Package Optiona Include Standard Plastic
and Ceramic 300·mll DIPs 1G Vee
1A 4G
• Dapendable Texas Instruments Quality and 1Y 4A
Reliability 2G 4Y
2A 3G
description 2Y 3A
This bus buffer features independent line drivers GND 3Y
with three-state outputs. Each output is disabled
when the associated G is high. logic diagram (positive logic)
The SN54F125 is characterized for operation
over the full military temperature range of
- 55°C to 125°C. The SN74F125 is
characterized for operation from OOC to 70°C.
lY
FUNCTION TABLE
(EACH BUFFER)

INPUTS
lJ A
OUTPUT
Y
....
U)
Q)
L H H Q)
L L L
..c
tn
H X Z 2A 2Y

H = high level ....caca

L = low level
X = irrelevant
C

logic symbol t
lG (I)
EN I> (3) lY
lA (2)
2G (4)
(6) 2Y
2A (5)
3G (10) """-t------I
(81 3Y
3A (9)
4G (13) ....Jr----~
4A (12)

tThis symbol is In accordance with ANSI/lEEE Std 91-1984 and ~

lEe Publication 617-12.
:>w
a:
Q.
I-
(,,)
::;)
Q
oa:
Q.
PRODUCT PREVIEW d_mollll .ollllin Information Copyright C> 1989, Texas Instruments Incorporated
on prod.eta In thl form.tl •• or dalgq ~h... 01
do.olopmo.t. Chorl.torl.tl. dlt. In~ othor
~=~':.otlg:'r~r:t ~~.I::.I::I~r Tr.::~~:~:~::.~
TEXAS ~ 2-61
product. without notl.o.
INSTRUMENTS
POST OFFICE BOX 856012·' DALLAS. TEXAS 75286
 SN54F12~ SN14F125
QUADRUPLE BUS BUFFER GATES ,WITH 3·STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range (unless otherwise .noted) t
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage ............................... '. . . . . . . . .•. . . . . . . . . . .. .. -1;2 V to 7 V
Input current ..... : . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. ,- 30 mA to 5 mA
Voltage applied to any output in the disabled or power·off sta,e •............. -0.5 V to 5.5 V
Voltage applied to any output in the high state ............... '. . .. . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state: SN54F125 ............................ :. 96 mA
. . SN74F125 . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 128 mA
Operating free-air temperature range: SN54F125......................... - 55 °e to 125°e
SN74F125 ............................ ooe to 70 0 e
Storage temperature range ............................ ,'. . . . . . . . . . .. - 65 °e to 150 0 e
tStresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the de.ice. These are strees ratings
only and functional operation of the davlce at these or any other conditions beyond those indicated under "recommended operating
conditions" Is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions

SN64F125 SN74F125
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.6 5 5.6 V

c VIH High-level input voltage

low-level input voltage
2
O.B
2
O.B
V
V
!I» Vil
11K Input clamp current -lB -18 mA
10H High-level output current -16 -15 mA
en
::r 10l low-level output current 64 64 mA
CD TA Operating free-air temperature -65 125 0 70 'e
CD
;: electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F125 SN74F126
PARAMETER TEST CONDITIONS UNIT
MIN TYpt MAX MIN TYpt MAX
VIK Vee = 4.5 V. 11=-18mA -1.2 -1.2 V
10H = -3 mA 2.4 3.3 2.4 3.3
Vee = 4.5 V 10H = -12 mA 2 3.2
VOH V
IQH = -15 mA 2 3.1
Vee = 4.76 V 10H = -3 mA 2.7
10l = 48 mA 0.35 0.5
VOL Vee = 4.5 V V
10l = 64 mA 0.40 0.55
." II' Vee = O• VI = 7 V 0.1 0.1 mA
~ IIH Vee = 5.5 V. VI = 2.7 V 20 20 ~A

o III Vee = 5,5 V. VI = 0.6 V -20 -20 ~A

c 10ZH Vee = 5.5 V. Vo = 2.7 V 50 60 ~

c: 10Zl Vee = 5.6 V. Vo = 0.5 V -50 -60 ~

n 10S* Vee = 5.5 V. Vo =0 -100 -226 -100

24
-225 mA
-I leeH
Outputs open
17
28 40
17
28
24
40 mA
leel Vee = 5.5 V.
." leez 25 35 25 35
~

~
t Ali typical values are at Vee = 5 V, TA = 25 'e.

-'m:E *Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

2-62 .' TEXAS'"

INSlRUMENlS
POST OFFICE BOX 866012 • DALLAS, TEXAS 75265
 SN54F125 SN74F125
QUADRUPLE BUS BUFFER GATES WITH 3·STATEOUTPUTS

switching characteristics (see Note 11

VCC - 5 V. VCC - 4.5 V to 5.5 V.
CL - 50 pF. CL - 50 pF.
FROM TO RL - 500 II. RL - 500 II.
PARAMETER
(INPUT) (OUTPUT) TA - 26"C TA - MIN to MAXt UNIT
'F126 SN54F125 SN74F126
MIN TVP MAX MIN MAX MIN MAX
tPLH 1.2 3.6 6 1.2 6.5
A Y ns
tpHL 2.2 5.1 7.5 2.2 B
IpZH 2.7 5.1 7.5 2.7 8.6
C; Y ns
tpZL 3.2 5.6 8 3.2 9
tpHZ 1 3.1 5 1 6
C; Y ns
tpLZ 1 3.1 5.6 1 6

tFor conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuit and voltage waveforms are shown in Section 1.

...
II)
Q)
Q)
.c
U)

...caca
C

==
W
:;
w
a:
c..
I-
(.)
::)
C
oa:
c..

TEXAS ." 2-63

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
2-64
 SN54F126, SN74F126
QUADRUPLE BUS BUFFER GATES WITH 3·STATE OUTPUTS
03212 JANUARY 1989

• 3·State Outputs Drive Bus Lines or Buffer SN54F128 ... J PACKAGE

Memory Address Registers SN74F126 ... 0 OR N PACKAGE
(TOP VIEW)
• Package Options Include Standard Plastic
and Ceramic 300·mil DIPs 1G Vee
1A 4G
• Dependable Texas Instruments Quality and 1Y 4A
Reliability 2G 4Y
2A 3G
description 2Y 3A
This bus buffer features independent line drivers GND ..._ _...r- 3Y
with three-state outputs. Each output is disabled
when the associated G is low. logic symbol t
The SN54F126 is characterized for operation (11
over the full military temperature range lG EN C> (3) 1Y
(2)
of -55°C to 125°C. The SN74F126 is lA
(4)
characterized for operation from OOC to 70°C. 2G
(5)
(6) 2V
2A
(10)
FUNCTION TABLE 3G (S)
(9) 3Y
leach buffar) 3A
(13)

G
INPUTS
A
OUTPUT
Y
4G
4A
(12)
(II) 4Y
...en
CD
H H H CD
tThis symbol is in accordance with ANSIJlEEE Std 91-1984 and .t:
H L L lEe Publication 617-12. o
L X

H = high level
L = low level
Z
...coco
X = irrelevant
C

~
w
:>w
a::
a..
I-
o
:::l
C
oa::
a..
Copyright @ 1989, Texas Instruments Incorporated

TEXAS .." 2-65

INSTRUMENTS
POST OFFICE BOX 655012 ... DALLAS, TEXAS 76265
 ·SN54F126. SN74F126
OUADRUPLEBUS BUFFER GATES WITH 3"STATE OUTPUTS

logic diagram (positive logic)

1A-'------I 1Y

(41
2G

(51
2A------I 2Y

(101
3G

3A_';.;,9;.;,1_ _ _---I

4G

(121
4A------I 4Y

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) t
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state .............. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state: SN54F126 ........... . . . . . . . . . . . . . . . . . .. 96 mA
SN74F126 ............................. 128 mA
Operating free-air temperature range: SN54F126 ......................... -55°e to 125°e
SN74F126 ........ c • • • • • • • • • • • • • • • • • • • • ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 0 e
tStresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
onlv and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device rellebility.

2-66
. TEXAS'"
INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS, TEXAS 7528&
 SN54F126, SN14F126
QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

recommended operating conditions

SN64F126 SN74F126
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil low-level input voltage 0.8 0.8 V
11K Il"!put clamp current -18 -18 mA
10H High-level output current -15 -15 mA
10l low-level output current 64 64 mA
TA Operating free-air temperature -55 125 a 70 ·C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F126 SN74F126
PARAMETER TEST CONDmONS UNIT
MIN TYpt MAX MIN TypT MAX
VIK VCC = 4.5 V, II = -18mA -1.2 -1.2 V
10H - -3 mA 2.4 3.3 2.4 3.3
VOH VCC = 4.5 V 10H = -12 mA 2 3.2 V
10H = -15 mA 2 3.1

VOL VCC = 4.5 V 10l = 48 mA

10l = 64 mA
0.35 0.5
0.4 0.55
V
...en
Q)
II VCC = 0, VI = 7 V 0.1 0.1 mA Q)
IIH VCC = 5.5 V, VI = 2.7 V 20 20 ~A .c:
III VCC = 5.5 V, VI = 0.5 V -20 -20 ~A rn
10ZH
IOZl
VCC
VCC
= 5.5 V,
= 5.5 V,
Vo = 2.7 V
Vo = 0.5 V
50
-50
50
-50
~A
~A
...asas
10S* VCC - 5.5 V, Vo - a -100 -225 -100 -225 mA C
ICCH 20 30 20 30
ICCl VCC = 5.5 V, Outputs open 32 48 32 48 mA
ICCZ 26 39 26 39

switching characteristics (see Note 1)

VCC-5V. Vcc - 4.5 V to 5.5 v,
Cl - 50 pF, CL - 50 pF,
FROM TO RL - 500 Il, RL - 500 Il,
PARAMETER UNIT
(INPUT) (OUTPUn TA - 25·C TA - MIN to MAXi
'F126 SN54F126 SN74F126
MIN TYP MAX MIN MAX MIN MAX
tl'LH
tPHl
A B
1.2
2.2
3.6
5.1
6.5
8
1.2
2.2
7
8.5
ns
~
tpZH
tpZl
G Y
3.2
3.2
5.8
5.6
7.5
8
2.7
2.7
8.5
8.5
ns :>w
tpHZ
tpLZ
G Y
1.2
2.2
4.1
5.1
6.5
7.5
1.2
2.2
7.5
8
no a:::
a..
t All typical values are at VCC = 5 V, TA = 25 ·C.
*Not more than one output should be shorted at a time, and tha duration of the short-circuit should not excaed one second.
....
o
IFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditons.
NOTE 1: load circuits and waveforms are shown in Section 1. ::>
c
oa:::
a..
TEXAS ." 2-67
INSlRUMENlS
POST OFFICE BOX 8155012 • DALLAS, TeXAS 76266
...c
Q)
Q)

(f)
::::r
(I)

...
(I)

VI

2-68
 SN54F13t SN74F13B
3·LlNE TO B·LlNE DECODERSIDEMULTIPLEXERS
02932. MARCH 1987 - REVISED JANUARY 1989

• Designed Specifically for Hlgh·Speed SN64F13B ... J PACKAGE

Memory Decoders and Data Transmission SN74F13B ... D OR N PACKAGE
Systems ITOPVIEWI

• Incorporates 3 Enable Inputs to Simplify A Vee

Cascedlng and/or Data Reception B YO
e Yl
• Package Options Include Plastic "Small <32A Y2
Outline" Packages, Ceramic Chip Carriers, G2B Y3
and Standard Plastic and Ceramic 300·mll Gl Y4
DIPs Y7 Y5
• Dependable Texas Instruments Quality and GND Y6
Reliability
SN64Fl3S ... FK PACKAGE
description ITOP VIEWI

The SN54F138 and SN74F138 circuits are u

u Uo
designed to be used in high-performance m<Z>>-
memory-decoding or data-routing applications 3 2 1 20 19
requiring very short propagation delay times. In 18 Yl
high-performance memory systems this decoder
can be used to minimize the effects of system
decoding. When employed with high-speed
memories utilizing a fast enable circuit, the delay Gl 8
5
6
7
17
16
15
14
Y2
Ne
Y3
Y4
.. rn
Q)
Q)
times of this decoder and the enable time of the .c

..
en
9 10111213
memory are usually less than the typical access r--OUioLll
time of the memory. This means that the >-zz>->-
(!)
ca
effective system delay introduced is negligible. ca
The conditions at the binary select inputs and the NC-No internal connection Q
three enable inputs select one of eight input
lines. Two active-low and one active-high enable
inputs reduce the need for external gates or
inverters when expanding. A 24-line decoder can
be implemented without external inverters and
a 32-line decoder requires only one inverter. An
enable input can be used as a data input for
demultiplexing applications.
The SN54F138 is characterized for operation
over the full military temperature range of
-55°e to 125°e. The SN74F138 is
characterized for operation ooe to 70 oe.

PRODUCTIOI DATA d..umonta.ontaln iniormllion Copyright © 1987, Texas Instruments Incorporated

••rrant H of publlOltlo. dote. Prod••" .onform to
lpaolll.llia.o par tho tarml of To,," I.olrumonta TEXAS . "
:==.;o. ::.~'li ~.:I~:':l' r.,=,.:~:::." not INSTRUMENTS
2-69
POST OFFICE BOX 665012 • DALLAS, TeXAS 76286
 SN54F13B, SN74F13B
3·LlNE TO B·LlNE DECODERS/DEMULTIPLEXERS

FUNCTION TABLE

ENABLE SELECT
OUTPUTS
INPUTS INPUTS
G1 G2A G2B C B A YO Y1 Y2 Y3 Y4 YS Y6 Y7
X H X X X X H H H H H H H H
X X H X X X H H H H H H H H
L X X X X X H H H H H H H H
H L L L L L L H H H H H H H
H L L L L H H l H H H H H H
H L l l H l H H l H H H H H
H l l l H H H H H l H H H H
H l L H l l H H H H l H H H
H L l H L H H H H H H L H H
H l l H H l H H H H H H l H
H l l H H H H H H H H H H l

logic symbols (alternatives) t

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

logic diagram (positive logic)

I==f\. (1S)
(1) ... ~
A
... (14)
~
(13)
SELECT (2) .. ~
i"L-F

---
B ;.r (12)
INPUTS

........... (11)

C
(3) ..
,/I. P---I"
1--1
(10)
~
~ (9)
p..-r
G2 A (4) (7)
ENABLE { G2 B
INPUTS (S) (~
G1
~

Pin numbers shown are for D. J. and N packages.

2-7.0 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 655012. DALLAS. TEXAS·75266
 SN54F13t SN74F138
3-LlNE TO B-LlNE DECODERS/DEMULTIPLEXERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t .................................................... , - 1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . .. . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F138. . . . . . . . . . . . . . . . . . . . . . . .. - 55 DC to 125 DC
SN74F138 ............................ ODCto70 DC
Storage temperature range ......................................... - 65 DC to 150 DC

tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F138 SN74F138
UNIT
MIN NOM MAX MIN NOM MAX
vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
V,H High-level input voltage 2 2 V
V,L Low-level input voltage O.B O.B V
',K Input clamp current 1B 1B mA
IOH High-level output current 1 1 mA
IOL Low~'evel output current
-55
20
125 0
20
70
mA
°e
....
II)
Q)
TA Operating free-air temperature
Q)
.c
electrical characteristics over recommended operating free-air temperature range (unless otherwise CI)
noted)
SN64F138 SN74F138
....caca
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX C
V,K Vee - 4.5 V, 'I = -18mA -1.2 -1.2 V
Vee - 4.5 V, IOH - -1 mA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V. 'OH=-1mA 2.7
VOL Vee = 4.5 V. IOL = 20 mA 0.3 0.5 0.3 0.5 V
I, Vee = 5.5 V, V, - 7 V 0.1 0.1 p.A
I'H Vee - 5.5 V. V, - 2.7 V 20 20 p.A
IlL Vee - 5.5 V. V, = 0.5 V -0.8 -0.6 mA
IOS§ Vee = 5.5 V. Vo = 0 -60 -150 -60 -150 mA
lee Vee - 5.5 V. See Note 1 13 20 13 20 mA

* All typical values are at Vee = 5 V. TA = 25°e.

§ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: lee is measured with outputs enabled and open.

TEXAS • 2-71
INSTRUMENTS
POST OFFICE BOX 665012 • CALLAS, TeXAS 76265
 SN54F13L SN74F13B
3·LlNE TO B·LlNE DECODERS/DEMULTIPLEXERS

switching characteristics (see Note 2)

VCC = 5V, VCC - 4.5Vt05.5V,
CL=50pF, CL-60pF,
FROM TO RL = 6002, RL=5002,
PARAMETER UNIT
(INPUT) (OUTPUT) TA = 26°C TA - MIN toMAXt
'F138 SN64F13S SN74F138
MIN TYP MAX MIN 'MAX MIN MAX
tpLH A,B, 2.7 5.2 7.5 2.7 12 2.7 8.5
Y no
tpHL orC 3.2 5.7 8 3.2 9.5 3.2 9
tpLH ~2Aor 2.7 5 7 2.7 11 2.7 8
y ns
tpHL ~2B 2.2 4.9 7 2.2 8 2.2 7.5
tpLH 3.2 5.8 8 3.2 12.5 3.2 9
G1 V ns
tpHL 2.7 5.2 7.5 2.7 B.5 2.7 8.5

t For conditions shown as MIN or MAX, use the appropriate value specified undar Recommended Operating Conditions.
NOTE 2: Load circuits and waveforms are shown In Section 1.

2-72 , TEXAS'"
INSTRUMENTS
POST OFFICE BOX 865012 • DALLAS, TEXAS 715285
 SN54F151A. SN74F151A
1 OF 8 DATA SELECTORSIMULTIPLEXERS
D2932, MARCH 1987-REVISED JANUARY 1989

• 8-Line to 1-Line Multiplexers can Perform SN54F151A, , ,J PACKAGE

as: SN74F151A ..• 0 DR N PACKAGE
Boolean Function Generators (TOP VIEW)
Parallel-to-Serial Converters
Data Source Selectors 03 Vee
02 04
• Packege Options Include Plastic "Sma" 01 05
Outline" Packages. Ceramic Chip Carriers. 00 D6
and Standard Plastic and Ceramic 300-mil Y 07
DIPs W A
• Dependable Taxas Instruments Quality G B
Reliability GNO e
SN54F151A .•• FK PACKAGE
description
(TOP VIEW)
These monolithic data selectors/multiplexers
provide full binary decoding to select one of eight N C') U
U
U'<t
data sources. The strobe input (<3) must be at COZ>O
a low logic level to enable the inputs. A high level 3 2 1 20 19
at the strobe terminal forces the W output high 4 18 05
and the Y output low.
The SN54F151A is characterized for operation
over the full military temperature range of
5
6
7
17
16
15
06
Ne
07
...
U)
CI)
CI)
-55°C to 125°C. The SN74F151A is 8 14 A .c
characterized for operation from OOC to 70°C. 9 1011 1213 en
FUNCTION TABLE
I(!)OUUal
ZZ
(!)
...caca
INPUTS OUTPUTS Q
NC-No internal connection
SELECT STROBE
y W
C B A G
logic symbol t
X X X H L H
L L L L DO 00
L L H L D1 1ST MUX
L H L L D2 D2 G EN
(11)

:}G~
L H H L D3 J:rn A
(10)
H L L L D4 D4 B
(9)
H L H L 05 m; c
(4)
H H L L D6 DB DO 0
(3) (5)
H H H L D7 i57 01 1 Y
(2) (6)
02 2 w
(1)
H = high level, L = low level, 03 3
X = irrelevant (15)
04 4
00,D1 ..• 07 = the level of the (14)
o respective input 05 5
(131
06 6
(12)
07 7

tThis symbol is in accordance with ANSI/IEEE Standard 91·1984

and lEe Publication 617·12.
Pin numbers shown are for D, J, and N packages.

UILESS OTHERWISE IOTED this doculI.nt contoins Copyright © 1987, Texas Instruments Incorporated
PRODUCTION DATA i.tarllltion currant al of
publlcllion dolo. Praducts ..nform to _ificatio..
p.r tho tarm. or T•••• InstrulI.ntl .tandard
TEXAS . . 2-73
:::r~~:'l:~~,,*lr=~:'- not .......rily INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F151A. SN14F151A
1 OF 8 DATA SELECTORS/MULTIPLEXERS

logic diagram (positive logic)

(7)
II

(4)
DO
'\
--./
(3)
01
"\
--./
02 (2)

~
03
(1)

,r
;,- - (5)
Y

---
DATA
(15)
(6)
INPUTS
04 w
,......, ::::I }-
(14)
06
C
...
I» ~ ::::I ~
I» (13)
06
'\
fA ~
::r o:::L.J
CD
...
CD
0
07
(12)

~=L.....I
'\

(11)
A

DATA (10)
SELECT
B
(BINARY)
(9)
c

Pin numbers shown are for 0, J, and N packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F151 A. . • . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F151A ........................... OOCto70 o C
Storage temperature range ......................................... - 65 °C to 1 50 DC
t The InpU1 yoltage ratings may be axceeded proyided the Input current ratings are observed.

2-74 TEXAS . "

INSTRUMENTS
POST OFFIc.e BOX 866012 • DALLAS, TEXAS'76286
 SN54F151A, SN74F151A
1 OF 8 DATA SELECTORS/MULTIPLEXERS

recommended operating conditions

SN&4F161A SN74F161A
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 ~ 2 V
VIL Low-level input voltage ~v 0.8 0.8 V
11K Input clamp current .c':' 18 18 mA
10H High-level output current "''V~ -1 1 mA
10L Low-level output current q,'<'- 20 20 mA
TA Operating free-air temperature -55 125 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN&4F151A SN74F151A
PARAMETER TEST CONDITIONS UNIT
MIN TVP MAX MIN TYP MAX
VIK

VOH
"-ee
Vee
Vee
=
=
-
4.5 V,
4.5 V,
4.75 V,
11=-18mA
IOH=-lmA
IOH--lmA
2.5
-1.2
3.4 _ .
.:;."'"
2.5
2.7
3.4
-1.2 V

VOL
II
IIH
IlL
Vee
Vec
VCC
Vec
=
=
=
=
4.5 V,
6.5 V,
5.5 V,
5.5 V,
10L = 20mA
VI = 7 V
VI = 2.7 V
VI = 0.6 V q,
-60
('\'V
~«f'
,,'"
-150
0.5
0.1
20
-0.6
-60
0.3 0.5
0.1
20
-0.6
-1&0
V
mA
".A
mA
mA
..
.c
rn
CD
CD
10S* Vee = 5.5 V, Vo = 0
Ice Vcc = 5.5 V,

switching characteristics (see Note 1)

VI = 4.5 V 13.5 21 13.5 21 mA

..
U)

C
ca
ca
Vee - 6V, VCC - 4.5 V to 5.5 V,
et. - &0 pF, CL - 50 pF,

PARAMETER
FROM TO lit. - 500O, RL - &00 0,
UNIT
(INPUT) (OUTPUT) TA - 26°C TA - MIN to MAXI
'F161A SN54F161A SN74F161A
MIN TVP MAX MIN MAX MIN MAX
tPLH A, B, 3.2 5.8 9 2.7 11.5 2.7 9.5
W ns
tPHL arC 2.4 4.8 7.5 2.2 8 2.4 7.5
tPLH A,8, 3.7 7.1 10.5 3.7 ...13.5 3.7 12
y ns
tpHL arC 3.2 5.8 9 3.2 .:;.~ 9.5 3.2 9
tpLH 2.2 4.3 6.1 2.2 Q~ 7.5 2.2 7
G' W ns
tPHL 2.2 4 6 1.7 ~,v 6.5 1.7 6
tpLH 4.2 6.6 9.5 3.2.0"'- 12 3.2 10.5
G' Y ns
tPHL 2.7 4.9 7 2~ 8 2.2 7.5
tPLH 2.2 4.4 6.6 1.7 7.5 2.2 7
0 W ns
IPHL 1 2.1 4 1 .6 1 5
tPLH 2.2 4.4 6.5 1.7 8.6 1.7 7.5
D Y ns
tpHL 2.9 5.1 7 2.7 9 2.9 7.5

t All typical values are at VCC = 5 V, TA = 25°e.

* Not more than one output should be shorted at a time and the duration of the ahart circuit should not exceed one sacond.
§ For conditions shown as MIN or MAX, uaa tha appropriate value specified under Recommended Operating Conditions.
NOTE 1: See General Information for load circuits and waveforms.

TEXAS . " 2-75

INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS. TEXAS 75285
2-76
 SN54F153, SN74F153
DUAL 1-0F-4 DATA SELECTORS/MULTIPLEXERS
02932, MARCH 1987-REVISEO JANUARY 1989

• Permits Multiplexing from N Lines to 1 Line SN54F153 , , . J PACKAGE

SN74F153 ... 0 OR N PACKAGE
• Performs Parallel-to-Serial Conversion (TOP VIEW)

• Strobe (Enable) Line Provided for Cascading 1(3 vcc

(N lines to n lines) B 2G
• Package Options Include Plastic "Small lC3 A
Outline" Packages. Ceramic Chip Carriers. lC2 2C3
and Standard Plastic and Ceramic 300-mil lCl 2C2
DIPs lCO 2Cl
lY 2CO
• Dependable Texas Instruments Quality and GND 2Y
Reliability
SN54F153 ... FK PACKAGE
description
(TOP VIEW)
Each of these data selectors/multiplexers
contains inverters and drivers to supply full
binary decoding data selection to the AND-OR
gates. Separate strobe inputs (G'j are provided 3 2 1 2019

for each of the two four-line sections. 4 18

The SN54F153 is characterized for operation

over the full military temperature range of
-55°e to 125°e. The SN74F153 is
characterized for operation from ooe to 70 oe.
5
6
7
8
17
16
15
14
..
rn
CI)
CI)
.c

..
9 1011 1213
>-cu>-o
o
FUNCTION TABLE ~ZZNU
C!l N
as
SELECT
DATA INPUTS STROBE OUTPUT
as
INPUTS NC-No internal connection C
B A CO Cl C2 C3 G V
x X X X X X H L logic symbol t
L L L X X X L L
L L H X X X L H
L H X L X X L L
L H X H X X L H
H L X X L X L L
H L X X H X L H
H H X X X L L L
(7) 1Y
H H X X X H L H

Select inputs A and B are common to both sections.

(9) 2Y

t This symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 617-12.
Pin numbers shown afe for D, J, and N packages.

PRODUCTION DATA do.umanta .o.tai. i.formatlo. Copyright @ 1987. Texas Instruments Incorporated
• urrant 10 of publi••tio. data. Products ca.'o"" to
_"'oatio.o per tho tll1ll0 of T.... Inllr.m.nta TEXAS . .
ota.dard w.rrl.ty. Productto. ~ro....i.g dOlI not 2-77
0'
n.....rily in.lld. t.sti.g oil p.romotora. INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TeXAS 76265
 SN54F153, SN74F153
DUAL 1·0F·4 DATA SELECTORS/MULTIPLEXERS

logic diagram (positive logic)

161
1CO

151
1C1 OUTPUT
1Y
DATA 1
141
1C2

131
1C3

c SELECT

a
ell A

en
::r 2CO
(101
CD
!
(II
(111
2C1

DATA 2 OUTPUT
2C2 (121 2Y

2C3 (131

Pin numbers shown are for D. J. and N packages,

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free·air temperature range: SN54F153. . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F153 ............................ ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 1 50 0 e
t The input voltage ratings may be exceeded provided the input current ratings are observed.

2-78 TEXAS
INSTRUMENTS
..II
POST OFFICE BOX 856012 • DALLAS, TEXAS "75285
 SN54F153, SN74F153
DUAL 1·0F·4 DATA SELECTORS/MULTIPLEXERS

recommended operating conditions

SN54F153 SN74F153
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current 18 18 mA
10H High-level output current -1 1 mA
10L Low·level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64f153 SN74F153
PARAMETER TEST CONDITIONSt UNIT
MIN TYpt MAX MIN TYpt MAX
VIK Vee - 4.5 V, II - -18 mA -1.2 -1.2 V
Vee = 4.5 V, 10H = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, 10H = -1 mA 2.7
VOL Vee = 4.5 V, 10L = 20 mA 0.3 0.5 0.3 0.5 V
0.1 0.1
II
IIH
Vee
Vee
-
=
5.5 V,
5.5 V,
VI - 7 V
VI = 2.7 V 20 20
mA
,.A ....rn
CI)
IlL Vee = 5.5 V, VI = 0.5 V -0.6 -0.6 mA CI)
10S* Vee = 5.5 V, Va = 0 -60 -150 -60 -150 mA .c
ICC Vee - 5.5 V, VI = 0 12 20 12 20 mA en
switching characteristics (see Note 2)
....asas
Vce = 5V, VCC - 4.6 V to 5.5 V,
C
CL=50pF. CL - 50 pF.
FROM TO RL = 50012, RL - 500 II.
PARAMETER UNIT
(lNPUTI (OUTPUT) TA = 25°C TA - MIN to MAX§
'F153 SN54F153 SN74F153
MIN TYP MAX MIN MAX MIN MAX
tpLH 3.7 7.7 10.5 3.7 14 3.7 12
AorB Y ns
tpHL 2.7 6.6 9 2.7 11 2.7 10.5
tpLH 3.7 6.7 9 3.7 11.5 3.7 10.5
G Y ns
tpHL 2.2 5.3 7 1.7 9 1.7 B
tpLH 2.2 4.9 7 1.7 9 2.2 B
e y ns
tpHL 2.2 4.7 6.5 1.7 8 1.7 7.5
t All typical values are at Vee = 5 V, TA = 25°C.
*Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§ For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1.

TEXAS • 2-79
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
C
...
I»
I»
en
::r
CD
...
CD
III

2-80
 SN54F157A. SN74F157A
QUADRUPLE 2·LlNE TO HINE DATA SELECTORS/MULTIPLEXERS
02932, MARCH 1987-REVISEO JANUARY 1989

• Buffered Inputs and Outputs SN54F157A ... J PACKAGE

SN74F157A ... D OR N PACKAGE
• Package Options Include Plastic "Small (TOP VIEW)
Outline" Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
AlB VCC
DIPs
lA IT
1B 4A
• Dependable Texas Instruments Quality and 1V 4B
Reliability 2A 4V
2B 3A
description 2V 3B
The 'F157A is a quadruple 2-input multiplexer/
GND 3V
data selector featuring a common strobe input
SN54F157A ... FK PACKAGE
(G). When the strobe is high, all outputs are low. (TOP VIEW)
When the strobe is low, a 4-bit word is selected
from one of two sources and is routed to the four !!! u ~
outputs. The 'F157A presents true data.
::!I<t Z > It!!
3 2 1 2019
The SN54F157A is characterized for operation
1B 4 18 4A
over the full military temperature range of
1V 5 17 4B
-55°e to 125°e. The SN74F157A is
6 NC
characterized for operation from ooe to 70 oe.

FUNCTION TABLE
8
7 4Y
3A
...
U)
Q)
Q)
9 10111213
.r:.
INPUTS
OUTPUT ~~q~~~ en
STROBE
G
H
SELECT
A/B
X
DATA
A
X
B
X
V

L
t!!

NC - No internal connection
...caca
L L L X L
Q
L L H X H logic symbol t
L H X L L
L H X H H

lA (4)
(3) 1Y
lB
(5)
2A (7)
(6) 2Y
2B
(11)
3A (9)
3Y
3B
4A (12)
4B (13) 4V

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 617-12.
Pin numbers shown are for D, J, and N packages.

PRODUCTION DATA d_mantl contain i.fannllio. Copyright © 1987, Texas Instruments Incorporated
curnat IS 0' plbli..tio. dlta. Products COnfO'1I to
.pacificatlon. par tho limn. of T.... InstrUllants TEXAS •
=i:;";'::I":1i ~=:~i: :.r:.,,:=:~ .ot INSTRUMENlS
2-81

POST OFFICE BOX 655012 • DALLAS, TeXAS 75265

 SN54Ft57A, SN74F157A
OUAD~UPLE 2·LlNE TO 1·LlNE DATA SELECTORS/MULTIPLEXERS

logic diagram (positive logic)

1A (21

1B (31

2A (51

2B (01

(111
3A

(101
3B

(141
4A

(131
4B

C
....
I»
I»
STROBE
SELECT AlB
G

tn
::r
CD
CD
;t Pin numbers shown are for 0, J, and N packages.

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, VCC ................................................. -0.5 V to 7 V
Input voltage t ...................................................... -1.2 V to 7 V
Input current ..................................................... - 30 mA to 5 mA
Voltage applied to any output in the high state ............................. -0.5 V to VCC
Current into any output in the low state ......................................... 40 mA
Operating free-air temperature range: SN54F157A ........................ -55°C to 125°C
SN74F157A ............................ DoC to 70°C
Storage temperature range .......................................... -65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN64F157A SN74F167A
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High-level output current -1 -1 mA
IOL Low-level output current 20 20 mA
TA Operating free-~ir temperature -55 125 0 70 ·e

2·82 . TEXAS ..If

INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS, TEXAS 75266
 SN54F157A. SN74F157A
QUADRUPLE 2·LlNE TO 1·LlNE DATA SELECTORS/MULTIPLEXERS

electrical characteristics over recommended operating free·air temperature range (unless otherwise
noted)
SN54F157A SN74F157A
PARAMETER TEST CONDITIONS UNIT
MIN TYpt MAX MIN TYpt MAX
VIK Vee = 4.5 V, II = -18mA -1.2 -1.2 V
Vee = 4.5 V, 10H = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vce = 4.75 V, 10H=-lmA 2.7
Val Vee - 4.5 V, 10l = 20 mA 0.3 0.5 0.3 0.5 V
II Vee = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH Vee = 5.5 V, VI = 2.7 V 20 20 ~A
III Vee - 5.5 V, VI - 0.5 V -0.6 -0.6 mA
105* Vee = 5.5 V, Va = 0 -60 -150 -60 -150 mA
Icc Vee = 5.5 V, VI = 4.5 V 15 23 15.5 23 mA

switching characteristics (see Note 1 )

Vee = 5V, Vec - 4.5 V to 5.5 v,
Cl = 50 pF, Cl - 50 pF,
FROM TO Rl = 500Q, Rl - 500 II,

..
PARAMETER UNIT
(INPUT) (OUTPUT) TA = 25°e TA - MIN to MAXI
'F157A SN54F157A SN74F157A en
MIN TVP MAX MIN MAX MIN MAX
CD
tplH 3.2 6.6 10 3.2 12 3.2 11 CD
AlB V ns
tpHl 2.2 4.6 7 2.2 9 2.2 8 .c
tplH
tpHl
tplH
tpHl
~

Aor8
V

V
4.2
1.7
1.7
1.7
6.6
4.1
4.1
3.6
9.5
6.5
6
5.5
4.2
1.7
1.7
1
13
7.5
7.5
7.5
4.2
1.7
1.7
1.2
11
7
6.5
7
ns

ns
..o
U)
as
as
t All typical values are at Vee = 5 V, TA = 25°C.
* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§ For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE1: load circuits and waveforms are shown in Section 1.

TEXAS . . 2-83
INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS. TEXAS 75266
2-84
 SN54F158A. SN74F158A
QUADRUPLE 2·UNE to 1·UNE DATA SELECTORS/MULTIPLEXERS
02932, MARCH 1987-REVISEO JANUARY 1989

• Buffered Inputs and Outputs SN54F158A, . ,J PACKAGE

SN74F158A ... D OR N PACKAGE
• Package Options Include Plastic "Small (TOP VIEW)
Outline" Packages. Ceramic Chip Carriers.
and Standard Plastic and Ceramic 300·mil AlB VCC
DIPs 1A IT
1B 4A
• Dependable Texas Instruments Quality and 1Y 4B
Reliability 2A 4Y
2B 3A
description 2Y 3B
The SN54F158A and SN74F158A are quadruple GND 3Y
2-input multiplexer/data selectors each featuring
SN54F158A ... FK PACKAGE
a direct strobe input ((3,), When the strobe is high, (TOP VIEW)
all outputs are high. When the strobe is low, a
4-bit word is selected from one of two sources
and is routed to the four outputs. The data
presented is inverted. 3 2 1 2019

The SN54F158A is characterized for operation 1B 4 18 4A

over the full military temperature range of 1Y 17 4B
NC 6 16 NC
-55°C to 125°C. The SN74F158A is
characterized for operation from OOC to 70° C. 2A
2B 8
15
14
4Y
3A
...en
CI)
CI)
9 1011 1213
FUNCTION TABLE .s::.
>-OU>-al (J)
,",ZZMM

STROBE
~
INPUTS
SELECT
AlB
DATA
A B
OUTPUT
Y
(!)

NC - No internal connection
...
«I
«I
H X X X H
C
L L L X H logic symbol t
L L H X L
L H X L H
L H X H L

lA
lY
lB
2A
2Y
2B
3A
3Y
3B
4A (14)
4B (13) 4Y

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

PROOUCTIOI DATA doc.ments contlln Informetion Copyright © 1987, Texas Instruments Incorporated
..",II al of p"bllcllio. dall. Produeta .onform to
_lIleldons par the Ilrm. of Te.l. Instrumlnll
standard WI""oty. Produollon pro....in. dOl••Dt
TEXAS . " 2-85
....... rlly 1••luda IIstl •• of oil paromllars. INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F158A, SN14F158A
QUADRUPLE 2·L1NE TO 1·L1NE DATA SELECTORS/MULTIPLEXERS

logic diagram (positive logic)

(21
1A

141 1Y
(31
1B

161
2A

(71 2Y
161
2B

1111
3A

191 3Y
1101
3B

1141
4A

(121 4Y
1131
4B

C
...
E»
E»
STROBE C;
SELECT AlB
1151
111

t/)
:::T
CD
CD
(it Pin numbers shown are for D, J, and N packages.

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, Vce ................................................. -0.5 V to 7 V
Input voltage t ...................................................... -1.2 V to 7 V
Input current ..................................................... - 30 mA to 5 mA
Voltage applied to any output in the high state ............................. -0.5 V to Vee
Current into any output in the low state ......................................... 40 mA
Operating free-air temperature range: SN54F158A ........................ -55°e to 125°e
SN74F158A ............................ ooC to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 65 °e to 1 50 0 e
tThe input voltage ratings may be exceeded provided the input current ratings ere observed.

recommended operating conditions

SN54F158A SN74F158A
UNIT
MIN NOM MAX MIN NOM M~X
Vce Supply voltage 4.5 5 6.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High-level output current -1 -1 mA
IOL Low-level output current 20 20 mA
TA Operating free-sir temperature -55 125 0 70 ·e

2·86 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS, TEXAS 76265
 SN54F158A, SN74F158A
QUADRUPLE 2-LlNE TO 1-LlNE DATA SELECTORS/MULTIPLEXERS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F1SSA SN74F158A
PARAMETER TEST CONDITIONSt UNIT
MIN TYP~ MAX MIN TYP* MAX
VIK VCC = 4.5 V, II = -18mA -1.2 -1.2 V
VCC = 4.5 V, IOH = -1 mA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V, IOH=-1mA 2.7
VOL VCC = 4.5 V, IOL = 20 mA 0.3 0.5 0.3 0.5 V
II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 "A
IlL VCC = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
IOS§ VCC = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
ICC VCC = 5.5 V, VI = 4.5 V 10 15 10 15 mA

switching characteristics (see Note 1)

Vcc - 5 v, VCC - 4.5 V to 5.6 V,
CL - 50 pF, CL - 50 pF,
FROM TO RL - 500 II, RL - 500 II,
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 25 D C TA - MIN to MAXt

MIN
2.2
'F158A
TYP MAX
5.1 8.5
MIN
2.2
SN54F158A
MAX
10.5
MIN
2.2
SN74F158A
MAX
9.5
...en
Q)
tpLH Q)
AlB Y ns
tPHL 1.7 4.1 6.5 1.7 8 1.7 7 ~
tPLH
G
1.7 4.1 6 1.7 8 1.7 7 en
tPHL
tPLH
A or B
Y

Y
1.2
1.7
3.6
3.6
6
5.9
1.2
1.7
7
8.5
1.2
1.7
6.5
7
ns

ns
...caca
tPHL 1 2.1 4 1 5 1 4.5 C
t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
*All typical values are at VCC = 5 V, TA = 25 C. D

§ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: Load circuits and waveforms are shown in Section 1.

TEXAS • 2-87
INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS, TEXAS 75265
2-88
 SN54F160A, SN54F162A, SN74F160A, SN74F162A
SYNCHRONOUS 4·81T DECADE COUNTERS
MARCH 1987 -REVISED JANUARY 1989

• Internal Look-Ahead for Fast Counting SN54F160A. SN54F162A ... J PACKAGE

~N74F160A. SN74F162A ... 0 OR N PACKAGE
• Carry Output for n-Bit Cascading ITOP VIEW)
• Fully Synchronous Operation for Counting
ClR VCC
• Package Options Include Plastic "Small ClK RCO
Outline" Packages, Ceramic Chip Carriers, A OA
and Standard Plastic and Ceramic 300-mil 8 08
DIPs C Oc
0 00
• Dependable Texas Instruments Quality and
ENP ENT
Reliability
GNO lOAD
description SN54F160A. SN54F162A ... FK PACKAGE
These synchronous, presettable decade ITOPVIEW)

counters feature an internal carry look-ahead for

application in high-speed counting designs.
~15 u tlS
uuz>a:
Synchronous operation is provided by having all 3 2 1 2019
flip-flops clocked simultaneously so that the
A 4 18
outputs change coincident with each other when
8 5 17
so instructed by the count-enable inputs and
internal gating. This mode of operation
eliminates the output counting spikes that are
NC
C
6
7
16
15 ...
fI)
G)
0 8 14 G)
normally associated with asynchronous (ripple .c
9 1011 1213
clock) counters; however. counting spikes may CI)
occur on the ripple carry output (RCO). A
buffered clock input triggers the four flip-flops
on the rising (positive-going) edge of the clock
c..oul°l-
Zzz«z
w(!) OW
...J
...caca
input waveform. NC - No internal connection
C
The counters are fully programmable; that is.
they may be preset to any number between
o and 9. As presetting is synchronous. setting up a low level at the load input disables the counter and
causes the outputs to agree with the setup data after the next clock pulse regardless of the levels of the
enable inputs.
If one of these decade counters is preset to a number between 10 and 15 or assumes such an invalid
state when power is applied. it will progress to the normal sequence within two counts as shown in the
State Diagram ..
The clear function for the 'F160A is asynchronous and a low level at the clear input sets all four of the
flip-flop outputs low regardless of the levels of the clock. load, or enable inputs.
The clear function for the 'F162A is synchronous and a low level at the clear input sets all four of the
flip-flop outputs low after the next low-to-high transition of the clock regardless of the levels of the enable
inputs. This synchronous clear allows the count length to be modified easily by decoding the Q outputs
for the maximum count desired. The active-low output of the gate used for decoding is connected to the
clear input to synchronously clear the counter to 0000 (LLlL).
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without
additional gating. Instrumental in accomplishing this function are two count-enable inputs and a ripple carry
output. Both count-enable inputs (ENP and ENT) must be high to count, and ENT is fed forward to enable
the ripple carry output (RCO). RCO thus enabled will produce a high-level pulse while the count is 9 (HLLH).
This high-level overflow ripple carry pulse can be used to enable successive cascaded stages. Transitions
at the ENP or ENT are allowed regardless of the level of the clock input.

UlLESS OTHERWISE 10TED Ihi. """III8III.O.loi.1 Copyright © 1987, Texas Instruments Incorporated
PROOUCTIOI DATA i.'ormltio••• ,rall .1 of
publlcllio. dote. Products .0nfO'1l to .paciflCationl
ptII' Iho IIIrmI of To,," 1.ltru.._ IlInda'" TEXAS . " 2-89
warranty. Productio. lH'OCIIIII.g _ .ot _rlly INSTRUMENTS
in.lu•• lIIIing of alf p.,"motan.
POST OFFICE BOX 855012 • DALLAS. TeXAS 75285
 SN54F160A, SN54F162A, SN74F160A, SN74F162A
SYNCHRONOUS 4·81T DECADE COUNTfRS

description (continued)
These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD)
that will modify the operating mode have no effect on the contents of the counter until clocking occurs.
The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by
the conditions meeting the setup and hold times.
The SN54F160A and SN54F162A are characterized for operation over the full military temperature range
of - 55°C to 125°C. The SN74F160A and SN74F162A are characterized for operation from 0 °C to 70°C.

state diagram

o
....CDCD logic symbols t
(I) 'F182A
'F180A
:::r DECADE COUNTERS WITH DIRECT CLEAR DECADE COUNTERS WITH SXNCHRONOUS CLEAR
CD
!(I)

ENT
ENP
ClK

A
8
C
D

tThese symbols are in accordance with ANSI/IEEE SId 91-1984 and lEe Publication 817-12.
Pin numbers shown are for D, J, and N packages.

2·90 TEXAS
INSTRUMENTS
..If
POST OFFICE BOX 8155012 • DALLAS. TexAS 76286
 SN54F160A. SN74F160A
SYNCHRONOUS 4·81T DECADE COUNTERS

'F160A logic diagram (positive logic)

erR ...;("'11'--_ _ _ _~ >C~-------,

LOAD _(:.:;;91'--_...._ _~ > ____--,

ENT (101 -V
1151 RCO

ENP~

~) KR
~~>--~-----~~4G2
CLK-(:::.21'---+~--=---~:>~----eH-+-d>,.2T/C3
A (31 1.30 P
~-I..M_l_ _.....

~~--~-r-'\~-r4-4-~G2
....oR
(131 QS
-L....I 1.2T/C3
S (41
1.30 h
~f-L.M_l_ _...... I
~I
-
H> -
(121 QC

:)

-
~ ~
I ~ ]_JJ+4--~G2 "<,
(111 QO
~---..(-L_.JI 1.2T/C3
o (61
1.30 h
"---...M_'___ I ..... 1

TEXAS ." 2·91

INSTRUMENTS
POST OFFICE BOX 856012 • DALLAS. TEXAS 75286
 SN54F162A. SN74F162A
SYNCHRONOUS 4·81T DECADE COUNTERS

'F162A logic diagram (positive logic)

WI (1) ~

lOAO~(9~)--~~--------~-a~~~~
ENT (10)
(15) RCO

ENP..l!L..,

\~~
~ 3R
~~--------------~~~G2
ClK (2) -t>~--------4""'1--1-<1I> 1.2T/C3
A (3)
1.30 0
~I-LM;;;.l;...._--,

~ ~----~
-r-"\ 3R
~~~~~G2
k
(13) Qa
...-L-J 1.2T/C3
a ....!:(4::...)---I-----------I~------_+__+__+__Il.30 ~
~ I-L;M;;;.';...._--,

L<\l
--..

_
~ 3R
L .......... '-1
I~ ~
I}--+~~....j G2 (12) Qc
rv">--------L~ 1.2T/C3
~
C ...!.::!.....--+------------------_+_-I-~ 1.30
~
P

NI - _
-'~
] 'l+~--~G2
J
Y
--
~I- LM;;;.l;""_--I

3R t:>
(11) Qo
4-------d_-~"' ~~_d> 1.2T/C3
o (6)
1.30 p---,
'----L;M;;;.';...._--'I I

2-92 TEXAS .."

INSTRUMENTS
POST OFFICE BOX 655012 • DAlLAS, TEXAS 75265
 SN54F160A, SN54F162A, SN74F160A, SN74F162A
SYNCHRONOUS 4·811 DECADE COUNTERS

logic symbol, each flip·flop (positive logic)

IN 'F160A IN 'F162A
WITH DIRECT CLEAR WITH SYNCHRONOUS CLEAR

ii 01
ii 01
TE TE
Q1 Q1
ClK 1,2T/C3
Q2
roc Q2
D 1,3D D 1,3D
02 02
lDAD M1 tOAD M1

logic diagram, each flip-flop in 'F160A (positive logic)

ii------------~~-----,

01

•
TE ---+-+1._'/
(TOGGLE ENABLE)
Q1

~----r--------------+_~_.
Q2 ...
fI)
G)
G)
02 .c
(/)

...caca
Q
D-----~·~P_._--~

lOAD----e~-----_{_ _I

logic diagram, each flip-flop in 'F162A (positive logic)

R -----------.,

01
TE--~~../
(TOGGLE ENABLE)
Q1

CiJ{ --t----+------+--..
Q2

'---+---- 02

D ----f"-,):)----tl----------'
lOAD---.-------~___I

TEXAS . " 2-93

INSTRUMENTS
POST OFFice BOX 656012"' DALLAS, TEXAS' 715265"
 SN54F16DA, SN54F162A, SN74F16.0A,SN74F162A
SYNCHRONOUS4·BIT DECADE COUNTERS

typical clear, preset, count, and inhibit sequences

Illustrated below is the following sequence:
1. Clear outputs to zero rH60A Is asynchronous; 'F162A is synchronous)'
2. Preset to BCD seven
3. Count to eight, nine, zero, one, two,"and three
4. Inhibit

LOAD u
A-.J
c=
1:=
[--
B-.J
DATA
INPUTS
c-.J

D
____ ~--------~I-
,'-- __
C
...
I»
I»
ClK I
I
en
::r ENP
I
I

...
CD
CD
(I)
ENT
I ,
-,I --1
QA
--! --I
,I ,, ,,
OUTPUTS
QB
::1-----.11
, I , ' - ' - - - - - - - - - - -....
-, -1 ' I
QC
.....!
-~~---------------~---------------
I I

QD -,
~_I
-.,, '~------~
'.
I
I
•

I I I "
RCO _ --11-'-·
, I , ! L______+-__________
+-1, _-+'_-+I_-...I:-1L
7 !
i8 9 Ii 2 3,

I i
I ,

I I lj.-·
. I · o - - - - - C O U N T - - -..... - - - I N H I B I T - - - -
SYNC PRESET
,. CLEAR
ASYNC
CLEAR

2-94
TEXAS.
IN STRl,lMENTS
P:qST OFFICE BOX 65.5012 • DAL~S. TEXAS 75285
 SN54F160A, SN54F162A, SN74F160A, SN74F162A
SYNCHRONOUS 4·811 DECADE COUNTERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F160A, SN54F162A . . . . . . . . . . . .. - 55°C to 125°C
SN74F160A, SN74F162A ................. ooe to 70°C
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F160A SN74F160A
SN54F162A SN74F162A UNIT
MIN NOM MAX MIN NOM MAX
vee Supply voltage 4.5 5 _~ 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 .~~. 2 V
VIL Low-level input voltage 1/:-" 0.8 O.B V
11K Input clamp current ,-:- 18 -18 mA
High-level outut current ~'-' 1 1 mA en
10H
10L Low-level output current <I~ 20 20 mA ;
Operating free-air temperature 55 125 0 70 °e CD
TA
.c
en
electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted) ...caca
SN&4F160A SN74F160A C
PARAMETER TEST CONDITIONS SN64F162A SN74F162A UNIT
MIN TYP; MAX MIN TYP; MAX
VIK Vee = 4.6 V, II = -18 mA -1.2 -1.2 V
vee = 4.5 V, IOH=-1mA 2.5 3.4 2.6 3.4
VOH V
Vee = 4.75 V, IOH=-1mA 2.7
VOL Vee = 4.5 v, 10L = 20 mA 0.3 0.5 0.3 0.5 V
II Vee = 5.5 V, VI = 7 V ~... 0.1 0.1 mA
IIH Vee = 5.5 V, VI = 2.7 V .~ 20 20 p.A
ENP, eLK, t<:'
A, B,e,D
,,<I. -0.6 -0.6
Co
IlL ENT,mA15 Vee = 5.5 V, VI = 0.5 V >:Iv -1.2 -1.2 mA
ml'F160A) Q~ -0.6 -0.6
ml'F162A) -1.2 -1.2
10SI Vee = 5.6 V, Vo = 0 -60 -150 -60 -150 mA
lee Vee = 5.5 V 37 55 37 55 mA

*I AllNottypical values are at Vee = 6 V, TA = 25°e.

more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.

TEXAS • 2-95
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TeXAS 75265
 SN54F160A. SN54F162A. SN74F160A. SN74F162A
SYNCHRONOUS 4·81T DECADE COUNTERS

timing requirements
Vee - 5 V, Vee - 4.5 V to 5.5 V,
TA - 25°e TA - MIN to MAXt
SN54F160A SN74F180A UNIT
'F160A, 'F162A
SN54F182A SN74F182A
/
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 90 MHz
Setup time, data (A, B, C, D) .
tsu 5 5 ns
high or low before ClKt
Hold time, data (A, B, C, D)
thold 2 2 ns
high or low after ClKt
Setup time, [OAD and (for High 11 11.5
tsu no
'F162A) m before ClKt low 8.5
"-"'~....
9.5
Hold time, [OAD and (for High 2 "C'" y 2
thold ns
'F162A) m after ClKt low 0 1'i''''Uv 0
Setup time, ENP and ENT High 11 11.5
tsu ns
before ClKt low 5 5
Hold time, ENP and ENT
thold 0 0 ns
high or low after ClKt
Pulse duration, ClK
tw 5 5 ns
high or low (loading)
Pulse duration, ClK High 4 4
tw ns
(counting) low 6 7
tw Pulse duration, ClR low ('FI60A) 5 5 ns
Inactive-state setup time,
6 6 ns
tsu
m high before ClKt ('FI60A)~

switching characteristics (see Note 1)

Vee - 5 V, Vee - 4.5 V to 5.5 V,
el - 50 pF, el - 50 pI',
Rl - 5000, Rl - 5000,
FROM TO
PARAMETER TA - 25°e TA - MIN to MAXt UNIT
(INPUT) (OUTPUT)
SN54F160A SN74F160A
'F180A, 'F162A
SN54F162A SN74F162A
MIN TYP MAX MIN MAX MIN MAX
f max 100 120 90 MHz
tplH 2.7 5.1 7.5 2.7 8.5
ClK (lOAD high) Any Q ns
tpHl 2.7 7.1 10 2.7 11
tplH 3.2 5.6 8.5 _,,'-J W' 3.2 9.6
ClK (UiAli'low) Any Q ns
tpHl 3.2 5.6 8.5 3.2 9.5
C""
tplH
ClK RCO
4.2 9.6 14 "",ov 4.;t lb
ns
tpHl 4.2 9.6 14 4.2 15
tplH 1.7 4.1 7.5 1.7 <I.b
ENT RCO no
tpHl 1.7 4.1 7.5 1.7 8.5
tpHl m ('FI60A) Any Q 4.7 8.6 12 4.7 13 ns
tpHl CLA('FI60A) RCO 3.7 7.6 10.5 3.7 11.6 ns

t For conditions shown as MIN or MAX, USe the appropriata valua specified under Recommendad Operating Conditions.
* Inactive-state setup time Is also referred to as "racovery time".
NOTE 1: load circuits and waveforms are shown in Section 1.

2-96 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS. TEXAS 75285
 SN54F161A, SN54F163A, SN74F161A, SN74F163A
SYNCHRONOUS 4-BIT BINARY COUNTERS
02932, MARCH 1987-REVISEO JANUARY 1989

• Internal Look-Ahead for Fast Counting SN54F161A, SN54F163A ... J PACKAGE

SN74F161A. SN74F163A .• , D OR N PACKAGE
• Carry Output for n-Bit Cascading (TOP VIEW)

• Fully Synchronous Operation for Counting

ClR VCC
• Package Options Include Plastic "Small ClK RCO
Outline" Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
A
B
°A
OB
DIPs C Oc
0 00
• Dependable Texas Instruments Quality and
ENP ENT
Reliability
GNO lOAD
description SN54F161A, SN54F163A .•. FK PACKAGE
These synchronous, presettable 4-bit binary (TOP VIEW)
counters feature an internal carry look-ahead for ><: Ia: U 0
...J...J U UU
application in high-speed counting designs, UUz>a:

•..
Synchronous operation is provided by having all 1 2019
3 2
flip-flops clocked simultaneously so that the
A 4 18
outputs change coincident with each other when
B 5 17
so instructed by the count-enable inputs and
NC 6 16 fI)
internal gating. This mode of operation
C 7 15
eliminates the output counting spikes that are Q)
0 8 14 Q)
normally associated with asynchronous (ripple
.c

..
9 1011 12 13
clock) counters; however, counting spikes may
occur on the ripple carry output (RCO). A a..oul°\-
en
buffered clock input triggers the four flip-flops
ZZZ«Z
W(!l OW ca
on the rising (positive-going) edge of the clock
...J
ca
input waveform. NC - No internal connection C
The counters are fully programmable; that is,
they may be preset to any number between a
and 15. As presetting is synchronous, setting up a low level at the load input disables the counter and
causes the outputs to agree with the setup data after the next clock pulse regardless of the levels of the
enable inputs.
The clear function for the 'F161 A is asynchronous and a low level at the clear input sets all four of the
flip-flop outputs low regardless of the levels of the clock, load, or enable inputs.
The clear function for the 'F163A is synchronous and a low level at the clear input sets all four of the
flip-flop outputs low after the next low-to-high transition of the clock regardless of the levels of the enable
inputs. This synchronous clear allows the count length to be modified easily by decoding the Q outputs
for the maximum count desired. The active-low output of the gate used for decoding is connected to the
clear input to synchronously clear the counter to 0000 (LLLL).
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without
additional gating. Instrumental in accomplishing this function are two count-enable inputs and a ripple carry
output. Both count-enable inputs (ENP and ENT) must be high to count, and ENT is fed forward to enable
the ripple carry output (RCO). RCO thus enabled will produce a high-level pulse while the count is 15 (HHHH).
This high-level overflow ripple carry pulse can be used to enable successive cascaded stages. Transitions
at the ENP or ENT are allowed regardless of the level of the clock input.

UNLESS OTHERWISE NOnD tIIi.....umant ••nbi.. Copyright © 1987, Texas Instruments Incorporated
PRODUCTIO. DATA inforllitio. currant " of
publilllio. d.... Produell conlGr.. to _lficatlo•• TEXAS . .
p.r tho 10...1 of T.... Instrum.nts otsadord 2-97
r:~~~o~r,'o=~:'- not .......lily INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F161A, SN54F163A, SN74F161A, SN74F163A
SYNCHRONOUS 4-BIT BINARY COUNTERS

description (continued)
These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOADI
that will modify the operating mode have no effect on the contents of the counter until clocking occurs.
The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by
the conditions meeting the setup and hold times.
The SN54F161 A and SN54F163A are characterized for operation over the full military temperature range
of - 55°C to 125°C. The SN74F161A and SN74F163A are characterized for operation from OOC to 70°C.

state diagram

...C
I»
I» logic symbols t
CJ) 'F161A 'F163A
::r BINARY COUNTERS WITH DIRECT CLEAR BINARY COUNTERS WITH SYNCHRONOUS CLEAR
(1)
...
(1)
(II
CTRDIV 16
ClR
LOAD
1151 1151
3CT-15 RCO 3CT-15 RCO
ENT ENT
ENP ENP
ClK ClK
1141
A A QA
141
B [21 B QB
151
C
161
[4] C ac
D [B] D QD

tThese symbols are in accordance with ANSI/IEEE Std 91·1984 and lEG Publication 617·12.
Pin numbers shown are for 0, J, and N packages.

2-98
TEXAS •
INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TeXAS 7&26&
 SN54F161A, SN74F161A
SYNCHRONOUS 4·BIT BINARY COUNTERS

'F161A logic diagram (positive logic)

(11

(91
(101 -V
ENT (151
RCO

ENP ~ ...--
r~)
'-l ..... HlR

ClK
121
131
H> ........
V
G2
T.2T/C3
1141

A 1.30

~ - Ml

In
til
HlR ~
CD

B
141
-4> - G2

1.30
T.2T/C3
1131 CD
.c
o
CO
I- 0....- M1 ~
CO
Q

H> ~
~ R
G2 1121
--' T.2T/C3
Oc
(51
C 1.30
~I - Ml

r--<\-
- I

1-, I...(:R
G2 1111
~ --../
o
(61 - 1.30
T.2T/C3

- Ml

TEXAS " , 2-99

INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS, TeXAS 75265
 SN54F163A, SN74F163A
SYNCHRONOUS 4·BIT BINARY COUNTERS

'F163A logic diagram (positive logic)

(1)
T_ -{>-
(9) j }--
lOAD
(10)
ENT

---
(15)
RCO
..--
ENP ~ -
"1 l-
I
~t'" K 3R

~ G2 114)

'"
(2)
ClK 1.2T/C3
(3) V

•
A 1.30
I-- - M1

C
....
C» 1-
1 '
~ 3R

~
G2 113)
C»
en (4)
--' 1.2T/C3
:::r
(1)
B 1.30
~ f- M1
....til
(1)

1-,
L::::I
k 3R
G2
~
(12)
.J QC
1.2T/C3
(5)
c 1.30
I--I-- M1

--<I
--.....

1__, -0 3R

] G2 (11)

-
J QO
.J - 1.2T/C3
(6)
o 1.30
' - - - M1

2·100
TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 15266
 SN54F161A, SN54F163A, SN74F161A, SN74F163A
SYNCHRONOUS 4·B11 BINARY COUNTERS

logic symbol, each flip-flop (positive logic)

IN 'F161A IN 'F163A
WITH DIRECT CLEAR WITH SYNCHRONOUS CLEAR

R R
01 01
TE TE
01 01
eo< l,2T/C3
02
m 02
0 1,30 0 1,30
02 02
LOAD M1 LOAD Ml

logic diagram, each flip-flop in 'F161A (positive logic)

R------------------------~------------~

TE - - - -....-+I.:...-~
(TOGGLE ENABLE)
01

eo<-----r---------------r--~~
02
...II)
Q)
Q)
~
(J)

...asas
C
D------~--~....------~

LOAD----~----------~~

logic diagram, each flip-flop in 'F163A (positive logic)

R ------------,

TE ---""H..~
(TOGGLE ENABLE)
01

m----~------~--------+_--~
02

o ------r-" P-~It"_----'

LOAD ---.-------------L.-I

TEXAS . " 2-101

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS, TEXAS 76265
 SN54F161A, SN54F163A, SN14F161A, SN14F163A
SYNCHRONOUS 4·BIT BINARY COUNTERS

typical clear. preset. count. and inhibit sequences

Illustrated below is the following sequence:
1. Clear outputs to zero ('F161A is asynchronous; 'F163A is synchronous I
2. Preset to binary twelve
3. Count to thirteen, fourteen, fifteen, zero, one and two
4. Inhibit

CLR~
ti5Ai5
U
A r-
I_-

r-
DATA
a
--
I
INPUTS
c.J --
I
L_

D..J
i
L_
--
C
....
C»
C»
ClK

t/)
ENP
::::r
CD I

....
CD
en
ENT
I
I
I
QA
--, -,
~_I

Qa
_ - _
--,I - ,I

OUTPUTS

QD

RCO
=-, :J---.J
I
I
II
I
I I
I
I
r---1
I I
--~'-~I-~'-----1-4-~~O~-~~-~2+-~-----------

Isvt
I

ASVNC
CLEAR
J~~ET tl~----- COUNT~---'- ...
, 1.'O------INHlaIT----.

CLEAR

2·102 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS, TEXAS 76265
 SN54F161A, SN54F163A, SN74F161A, SN74F163A
SYNCHRONOUS 4-BIT BINARY COUNTERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee .............................................. " -0.5 V to 7 V
Input voltage t ................................................... " -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F161A, SN54F163A ............. -55 De to 125 De
SN74F161A, SN74F163A ................. oDe to 70 DC
Storage temperature range ......................................... - 65 DC to 150 DC
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F161A SN74F161A
SN54F163A SN74F163A UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 .:,..f§ 2 V
Vil low-level input voltage ,,«:' 0.8 0.8 V
11K Input clamp current .ri- 18 18 mA
10H High-level outut current ,:r 1 1 mA
10l low-level output current <i.<I;-~' 20 20 mA
TA Operating free·air temperature -55 125 0 70 ·e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F161A SN74F161A
PARAMETER TEST CONDITIONS SN64F163A SN74F163A UNIT
MIN TVP; MAX MIN TVP; MAX
VIK Vee = 4.5 V, II = -lamA -1.2 -1.2 V
Vee = 4.5 v, IOH=-lmA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, 10H=-lmA 2.7
Val vee = 4.5 V, IOL = 20 mA 0.3 0.5 0.3 0.5 V
II Vee = 5.5 v, VI = 7 v .~ 0.1 0.1 mA
IIH Vee - 5.5 V, VI = 2.7 V .:,.'" 20 20 ~A
ENP, elK, 'l'l:'-
-0.6 -0.6
A,a,e,D ~
III ENT,mA15 Vee = 5.5 V, VI = 0.5 V _c<:} -1.2 -1.2 mA
m('FI61A) 'l -0.6 -0.6
m('F163AI -1.2 -1.2
10SI Vee = 5.5 V, Va = 0 -60 -150 -60 -160 mA
lee Vee - 5.5 V 37 55 37 55 mA

*All typical values are at Vee = 5 V, TA = 25·e. .

I Not more than one. output should be shortad at a time and the duration of the short circuit should not exceed one second.

TEXAS • 2-103
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75266
 SN54F161A. SN54F163A. SN74F161A.SN74F163A
SYNCHRONOUS .4·BIT BINARY COUNTERS

timing requirements
Vcc - 5 V, Vcc - 4,6 V to 5,5 V,
TA - 26·C TA - MIN to MAXt
SN54F161A SN74F161A UNIT
'F161A, 'F163A
SN54F163A SN74F163A
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 75 0 90 MHz
5etup time, data (A, B, C, 0)
tsu 5 5,5 5 ns
high 'or low before ClK!
Hold time, data (A, B, C, 0)
thold 2 2,5 2 ns
high or low after ClK!
Setup time, ~ and Ifor High 11 13,5 11,5
tau ns
'F163A) m before ClK! low 8,5 10.5 9.5
Hold time, ~ and (for High .2 2 2
thold ns
'FI63A) m after ClK! low 0 0 0
Setup time, ENP and ENT High 11 13 11.5
tsu ns
before ClK!
Hold time, ENP and ENT
low 5 6 .(\00 '< 5

0 0 ~'I'>~-J'<-' 0 ns
thold
high or low after ClK!
Pulse duration, ClK
o
m
tw
high or low (loading)
5 5 5 ns

....
m tw
Pulse duration, ClK
(counting)
High 4 5 4
ns
low 6 8 7
en tw Pulse duration, CCR low ('FI61A) 5 5 5 ns
::r Inactive-state setup time,
CD tsu
CCR high before ClK! ('FI61A);
6 6 6 ns
....
CD
(II
switching characteristics (see Note· 1)
VCC - 6V, vce - 4.6 V to 1i.5 V,
Cl - 60 pF, Cl - 50 pF,
RL - 5000, RL - 500 II,
FROM TO
PARAMETER TA - 26°C TA - MIN to MAXt UNIT
(INPUT) (OUTPUT)
SN64F161A SN74F161A
'F161A, 'F163A
SN64F163A SN74F163A
MIN TYP MAX MIN MAX MIN MAX
f max 100 120 75 90 MHz
tplH 2.7 5.1 7.5 2.7 9 2.7 B.5
ClK (~high) Any a 2.7 7.1 10 2.7 11.5 2.7 11
ns
tpHl
tplH 3.2 5.6 B.5 3.2 \c.~ 10 3.2 9.5
ClK (ti5Al) low) Any a 3.2 5.6 B.5 3.2 "",v.:,\'<.1[11 10 3.2 9.5
ns
tpHl
tplH 4.2 9.6 14 4.2 v 16.5 4.2 15
ClK RCO ns
tpHL 4.2 9.6 14 4.2 15 4.2 15
tPLH 1.7 4.1 7.5 1.7 9 1.7 B.5
ENT RCO ns
tpHL 1.7 4.1 7.5 1.7 9 1.7 B.5
tpHl ml'F161A) Any a 4.7 B.6 12 4.7 14 4.7 13 ns
tpHl CCR ('FI61A) RCO 3.7 7.6 10.5 3.7 12.5 3.7 11.5 ns

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
; Inectlve-state aatup time is also referred to as "recovery time".
NOTE 1: load circuits and waveforms are shown in Section 1.

2-104
'. TEXAS'"
INSTRUMENTS
POST'OFFICE BOX 855012 • DALLAS, TEXA'S 7528'S
 SN54F166, SN74F166
PARALLEL· LOAD 8·BIT SHIFT REGISTERS
03213. JANUARY 1989

• Synchronous Load SN54F166 •.• J PACKAGE

SN74F166 ... D OR N PACKAGE
• Direct Overriding Clear {TOPVIEWI

• Parallel to Serial Conversion SER VCC

• Package Options Include Plastic "Small
A SH/[5
Outline" Packages, Ceramic Chip Carriers, B H
and Standard Plastic and Ceramic 300·mil C QH
DIPs D G
CLK INH F
• Dependable Texas Instruments Quality and CLK E
Reliability GND CLR

description SN54FI66 ... FK PACKAGE

The 'F166 parallel-in or serial-in, serial-out {TOPVIEWI
registers feature gated clock inputs and an
overriding clear input. The parallel·in or serial-in
II: ul~
w U U:I;
<tUlZ>Ul
modes are established by the shift/load input.
When high, this input enables the serial data 3 2 1 20 19
input and couples the eight flip-flops for serial 18 H
shifting with each clock pulse. When low, the 5 17 QH
parallel (broadside) data inputs are enabled, and
synchronous loading occurs on the next clock
6
7
16
15
NC
G
...en
Q)
Q)
pulse. During parallel loading, serial data flow is 8 14 F J:.
inhibited, Clocking is accomplished on the low- 9 10111213 CJ)
to-high-revel edge of the clock pulse through a
two-input positive NOR gate permitting one input
to be used as a clock·enable or clock-inhibit
-.: 0
...Jzz...J
U(!J U
UIII: w ...
('CJ
('CJ

function. Holding either of the clock inputs high NC-No internal connection
C
inhibits c!P,Fking; holding either low enables the
other clock input. This, of course, allows the logic symbol t
system clock to be free-running, and the register
can be stopped on command with the other
clock input. The clock-inhibit input should be
changed to the high level only when the clock
input is high. A direct clear input overrides all
other inputs, including the clock, and resets all ClKINH
flip-flops to zero. ClK
The SN 54F 166 is characterized for operation SER

~
over the full military temperature range {21
A
{31
of -55°C to 125°C. The SN74F166 is
characterized for oper!ltion from O°C to 70°C,
B
{41
2,3D w
c
D
{51
{lOI
5>
w
E
F
{Ill a:
Q.
{l21
G
{l41 (131
H QH I-
o
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and :::>
lEe Publication 617-12.
c
Pin numbers shown are for 0, J, and N packages.
o
a:
Q.

PRODUCT PREVIEW documents contain infarmotion Copyright @ 1989. Texas Instruments Incorporated
DR praductl in the formative Dr design p'ha.1 of
development. Characteristic data anil othar TEXAS • 2-105
::.e:~:.at:=:1ri~~ dt~i~I=::I~r T:i~::~~:~:~:: INSTRUMENlS
~ruductl without notice.
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F166, SN74F166
PARALLEL· LOAD 8·BIT SHIFT REGISTERS

FUNCTION TABLE
...
INPUTS INTERNAL
OUTPUT
PARALLEL OUTPUTS
CLR SHIm CLKINH CLK SER QH
A •.• H QA as
L X X X X X L L L
H X L L X X QAO QBO QHO
H L L t X a .•. h a b h
H H L t H X H QAn llGn
H H H t L X L QAn llGn
H X H t X X GAO QBO QHO

logic diagram (positive logic)

B C D F G H
(31 (41 (51 (111 (121 (141
SHIm

...o
I»
I»
en
':r

...en
CD
CD

CLKINH~=l==~~----~1-
CLK .!
____~~__-!~____4-~__-J~____J-t-__~

Pin numbers shown are for D. J. and N packages.

2-106
TEXAS •
INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS. TEXAS 75285
 SN54F166, SN74F166
PARALLEL·LOAD 8·BIT SHIFT REGISTERS

typical clear, shift, load, inhibit, and shift sequences

TI-
iii
i
z
- 0

r
l-
I&.

i...
0(
i
...caca
C

w
III

1 a:
~
W
:;
w
-- ----- -- -- -- -- -- -- --- -r-j I
I
I
I
_0(
...w
U
a:
&:L.

;
:z:
lIOi
g...
I- I-
...
:::t
0( ID U 0 W I&.

" ~ I-
~
iii 0 \ /
i v
! 1 ... I-
U
U !
lIOi ~
I-
I&.
~~ ~ :;:)
...ug i
w i ~E 5 C
III a:z
...
0(-
oa:
&:L.

TEXAS ." 2·107

INSTRUMENTS
POST OFFICE BOX 866Q12 • DAlLAS. TEXAS 1628&
 SN54F166. SN74F166
PARALLEL.LOAD 8·BIT SHIFT REGISTERS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t ..................................... : ...... '.' . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state ..... : .. ; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F166......................... - 55 DC to 125 DC
SN74F166 ............................ ODC to 70 DC
Storage temperature range ....................................' . . . .. - 65 DC to 150 DC
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F166 SN74f166
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V

•
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High-level output current -1 -1 rnA
C IOL Low-level output current 20 20 mA
I» TA Operating free-air temperature -55 125 0 70 De
r+
I»
tJ) electrical characteristics over recommended operating free-air temp~lrature range (unless otherwise
::T noted)
CD
CD SN54F166 SN74F166
r+ PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
tn
VIK Vee = 4.5 V, II = -18 rnA -1.2 -1.2 V
Vee = 4.5 V. IOH = -1 mA 2.5 3,4 2.5 3.4
V
VOH
Vee = 4.75 V. IOH = -1 mA 2.7
VOL Vee = 4.5 V. IOL = 20 mA 0.35 0.5 0.35 0.5 V
II Vee - O. VI - 7 V 0.1 0.1 mA

IIH
ern. SER Vee = 5.5 V. VI = 2.7 V
40 40
pA
Others 20 20

IlL
ern. SER Vee = 5.5 V. VI = 0.5 V
-40 -40
pA
Others -20 -20
IOS§ Vee = 5.5 V. Vo =0 -60 -150 -60 -150 rnA
lee Vee = 5.5 V 41 60 41 60 mA
"C
*AII typical values are at Vee = 5 V. TA = 25 De.
::a::J
o §Not more than one output should be shorted at a time and the dUration of the short circuit should not exceed one second.

C
c:
(")
-t
"C
::a::J

-:E~
m

2-108
TEXAS ,.,
INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS. TEXAS 75285
 SN54F166, SN74F166
PARALLEL·LOAD 8·BIT SHIFT REGISTERS

timing requirements over recommended operating free·air temperature range. Vee - 5 V :t 0.5 V
lunless otherwise noted)
TA - 2S"C SN64F188 SN74F188
UNIT
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 135 110 MHz
~Iow 4 4
tw Pulse duretlon ClK high 3.5 3.6 ns
ClK low 6.6 8.6
SHfC15 high 3 4
SER 26 3
tsu Setup time before ClK t ClK INH low 6 8 ns
Deta 2.6 3
~ inactive 4 4.6
SHfC15 high 0 0
SER 0 0
th Hold time after ClKt ns
ClK INH high 0 0
Data 0 0

switching characteristics Isee Note 1)

vcc - S v, Vcc - 4.8 V to 6.6 V,
Cl - 60 pF, Cl - 60 pF,
FROM TO Rl - 6000, RL - 600 n,
PARAMETER UNIT
(lNPUTI (OUTPUTI TA - 26"C TA - MIN tD MAX'
'F188 SN64F188 SN74F188

f max
MIN
135
TYP MAX
175
MIN MAX MIN
110
MAX
MHz
...caca
tpHl ~ QH 3.2 8.1 8.5 3.2 9.6 ns C
tplH 4.2 7.1 10 4.2 14
ClK QH ns
tpHl 3.2 5.8 8 2.7 9

'For conditions shown as MIN or MAX, use the apprDpriete value specified under Recommended Operating Conditions.
NOTE 1: load circuits and waveforms are shown In Section 1.

~
W

~
a:
a..
I-
CJ
;:)
C
oa:
a..

TEXAS ." 2-109

INSTRUMENTS
POST OFF1CE BOX 855012 • DALlAS. TeXAS 715286
...C
I»
I»
en
:r
...en
CT>
CT>

2-110
 SN54F168, SN54F169, SN74F168, SN74F169
SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS
02932. MARCH 1987-REVISEO JANUARY 1989

• and Programming
SN54F168. SN54F169 ... J PACKAGE
SN74F168. SN74F169 ... 0 OR N PACKAGE
ITOP VIEW}
• Internal Look-Ahead for Fast Counting
UfO VCC
• Carry Output for n-Blt Cascading ClK RCO
A aA
• Fully Independent Clock Circuit
s as
• Package Options Include Plastic "Small C ac
Outline" DiPs and Ceramic Chip Carriers in 0 aD
Addition to the Standard 300-mil Plastic and
ENP EN'i'
GNO lOAD
Ceramic DIPs

• Dependable Texas Instruments Quality and SN54F168. SN54F169 .•. FK PACKAGE

Reliability ITOPVIEWI

description ~Ie u ~18

u::>z>a:
These synchronous presettable counters feature 3 2 1 20 19
an internal carry look-ahead for cascading in A 18
4 aA
high-speed counting applications. The 'F168 is S
...
5 17 a8
a decade counter and the 'F169 is a 4-bit binary NC U)
6 16 NC
counter. Synchronous operation is provided by C CI)
aC CI)
having all flip-flops clocked simultaneously so 0 14 QO
that the outputs change coincident with each
8
.c
other when so instructed by the count-enable
9 en
inputs and internal gating. This mode of
operation helps eliminate the output counting
r urr-
ZzZetZ
0
we] OW
...J
...eaea
spikes that are normally associated with 0
asynchronous (ripple clock) counters. A buffered NC-No internal connection
clock input triggers the four flip-flops on the
riSing (positive-going) edge of the clock
waveform.
These counters are fully programmable; that is, they may be preset to any number between 0 and their
maximum count. The load input circuitry allows loading with the carry-enable output of cascaded counters.
As loading is synchronous, setting up a low level at the load input disables the counter and causes the
outputs to agree with the data inputs after the next clock pulse.
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous application without
additional gating. Instrumental in accomplishing this function are two count-enable inputs and a carry output.
Both count enable inputs (ENP and ENTl must be low to count. The direction of the count is determined
by the level of the UfO' input. When UfO' is high, the counter counts up; when low, it counts down. Input
ENT is fed forward to enable the carry output. The ripple carry output (RCO) thus enabled will produce
a low-level pulse while the count is zero (all inputs low) counting down or maximum (9 or 15) counting
up. This low-level overflow carry pulse can be used to enable successive cascaded stages. Transistions
at ENP or ENT are allowed regardless of the level of the clock input. All inputs are diode-clamped to minimize
transmission-line effects, thereby simplifying system design.
These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, LOAD. UfO')
that will modify the operating mode have no effect on the contents of the counter until clocking occurs.
The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by
the conditions meeting the stable setup and hold times.
The SN54F168 and SN54F169 are characterized for operation over the full military temperature range
of -55°C to 125°C. The SN74F168 and SN74F169 are characterized for operation from O°C to 70°C.

UlLESS OTHERWISE IOTED this d.......t call1li.. Copyright © 1987. Texas Instruments Incorporated
'HoouenOI DATA Im...lllo. turrant II 01
' ' 'aell
puIIIlcIII•• dill. 10","111 II IlIIOIIIcatio..
,or the II_ 01 T_ 1II1II.....10 lIII.doni TEXAS • 2-111
WlIfI!IIY. ,rodoctIo• . . - ........ 1IGI._.11y INSTRUMENTS
inol.d. _Inl 01 .11 pou..- . .
POST OFFICE BOX 665012 • DALLAS. TEXAS 75265
 S154F188, S154F169, S174F168, SI74F189
SYNCHRONOUS4·Bll UP/DOWN DfCADE AND BINARY COUNTERS

logic symbols t
'F168 'F169

CTRDIV16
M1[LOAD]

2,3,5,6+/C7 2,3,5,6+/C7
2,4,5,6- 2,4,5,6-

A [1] A [1]
B [2] B [2]
C [4] C [4]
D [8] D [8]

C tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
I» Pin numbers shown are for D, J, and N packages.
Dr
(I)
:r
:t:

2-112 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS, TEXAS 7&285
 SN54F168, SN74F168
SYNCHRONOUS 4·811 UP/DOWN DECADE COUNTERS

'F168 logic diagram (positive logic)

(9)

(1)

,L~
(10)

(7)
-
(15)

~.- ,..,
'" f

1 JJ
I
"-
(2)
ClK
V G2
(14)
'---
(3) >--<: t> 1.2T/C3 r--

~
A 1.30
>- M1
I
I
...
II)

Q)

~~
Q)
.c
(J)

(4)
G2
>--<: t> 1.2T/C3 r--
(13)
I----
...asas
~
B 1.30 C
>- M1

~
G=r-n
~ G2
(12)
1----'
./
(5) >- -<:t> 1.2T/C3 r---
c 1,30 ~
~ M1 P

~
o
Ull
~b3 G2

1.30 P-
~
-f-<: > 1.2T1C3 r---

~
'-- M1

r
~
r
logic diagrams for the four flip-flops are shown separately.
Pin numbers shown are for O. J. and N packages.

TEXAS . " 2-113

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
 SN54F16~ SN74F169
SYNCHRONOUS 4·BIT UP/DOWN BINARY COUNTERS

'F169 logic diagram (positiva logic)

~
~~
(11

(101

ClK
~
(21

V '"
f
"- . (1&1

(141
02

(31 -< ~1.2T/C3 I--

~
A 1.3D
~ M1

<. ( - I- - I
-
~ (131

(41 -
I J 02
f-< ~1.2T/C3
1---.
I--

~
B 1.3D

--
"1=:--'"
~ M1

'''-.. L-("l
, 02 1---'
1121
--../
(&1 '"+-c >1.3D
1.2T/C3 I--

~
C
~ M1

<l - -=I
-
r ""\
-I
(111
02
1---1 -c > 1.2T/C3
(61
D 1.3D p-
- M1 P
r
:(
- ( -- I

logic diagrams for the four flip-flops are shown separately.

Pin numbers shown ere for D. J. and N packages.

2-114 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TeXAS 76286
 SN54F168, SN54F169, SN74F168, SN74F169
SYNCHRONOUS 4·BIT UP/DOWN DECADE AND BINARY COUNTERS

logic symbol, each flip·flop in 'F168 and 'F169 (positive logic)

TE G2 01
eIK ----C:t> T.2T/C3 02
DATA 1.3D 0:1
lOAD M1 0:2

logic diagram, each flip-flop in 'F168 and 'F169 (positive logic)

ITOGGlE ENABLE)
TE

eIK--I--d

01

02
...
U)

CD
DATA - - + - - _ - , CD
~~-------4__J .c
en
lOAD--+-~-----L-~ ...caca
C
0:1

0:2

FUNCTION TABLE. EACH FLlp·FlOP

COUNTER INPUTS FLlP·FlOP INPUTS OUTPUTS

'iIDij) ClK lOAD TE eIK DATA 0 Q
l r H L
• H H L
L r H L
• L L H
H r L H
• X 00 00
H r L L
• X 00 0:0

TEXAS . " 2-115

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS; TEXAS 7628&
 SN54F168, SN74F168
SYNCHRONOUS4·BIT UP/DOWN DECADE COUNTERS

'F168 typical load, count, and inhibit sequences

Illustrated below is the following sequence:

1. Load Ipresetl to BCD seven

2. Count up to eight, nine (maximum), zero, one, and two
3. Inhibit
4. Count down to one, zero (minimum), nine, eight, and seven

i
A..J L

B..J I
DATA L..
INPUTS
c..J I
L

D _ _ _ _..:...IIr
o
I»
at CLK

(I)
i" UID ~J I
CD I I
r+ I
(I) EiiiP.ndENT IL-!i-......:I..:..._ _ _ _ _ _ _ _ _ _.J
I
I
I
I:
°B ----;--nI!-.- - - - - - - - - - - '
___ ..J I
I I
°c ----f"""Il
___ ..J I LI_ _ _ _ _ _ _ _ _ ~ ____ ~_~_~ _ _ _ _ __ . J
I
°D ---, 11-'-----.
L...iJ
____
L-
Rca ----I
___ ..J
II
I I
I I LJ I
II
I
LJ
a a 7

U.
: 7 II 9 0 2 2 2 11 0 9

I.---
• COUNT U P - - -... "~.-,NH,B,T-.f I+-- COUNT DOWN
•
LOAD

2-116
POST OFFICE BOX 655012 ~ DALLAS. TEXAS 75265
 SN54F169, SN74F169
SYNCHRONOUS 4·BIT UP/DOWN BINARY COUNTERS

'F189 typical load. count. and inhibit sequences

Illustrated below is the following sequence:

1. load (preset) to binary thirteen

2. Count up to fourteen, fifteen (maximum), zero, one, and two
3. Inhibit
4. Count down to one, zero (minimum), fifteen, fourteen, and thirteen

I --
L..._

DATA [=
INPUTS
I --
L..._

--
ClK
i
L..._
..
en
CD
CD
.c
..
I
uifj __
--,J I I en
II &a
I I &a
II Q
EiiiP Ind EN'f --'~+--:-i----------~
I I
I I I
... -_1 II
I
I
II
De __ -LJ.li - - - - - ,'--__. .1r-.;.----L.-...;
- - , I
:
I

- --I
QD __ ...J

--I
iiCO -__ ~
LJ II
LJ
I 13 14 16 0 2 2 2 o 16 14 13

L"~I---COUNT UP - - -••~~I- INHIBIT -+I ~COUNTDOWN----••

lOAD

. TEXAS'" 2·117
INSTRUMENTS
POST OFFICE BOX 8156012 • DALLAS, TEXAS 15286
 SN54f168, SN54F169, SN74F168. SN74F169
SYNCHRONOUS 4·BIT UP/DOWN DECADE AND BINARY COUNTERS

absolute maximum ratings over operating free-air temperature range (U.nless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t ...............................................' ....... :' -'1.2 V to 7 V
Input current .................................................. " - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . .. .. . . . . • . •. . . . . ... -0.5 V to Vee
eurrent into any output in the low state ................. , . . . . . . . . . . . . . . . . . .. . .. 40 mA
Operating free·air temperature range: SN54F168, SN54F169 . . . . . . . . . . . . . . .• - 55 °e to 125°e
SN74F168, SN74F169 ................... ooe to 70 0 e
Storage tempereture range ................. ; ....... ;............... - 65 °e .to 150 0 e
t The input voltage ratings may be exceeded provided the Input current ratings ere observed.

recommended operating conditions

SN64F' SN74F'
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.6 5 5.5 5 V
VIH High-level input voltage 2 ~ 2 v
VIL Low-level input voltage ._o.«,.~' 0.8 0.8 V
11K Input clamp current ,('1- -18 -18 mA
-1 -1
IOH
!OL
High·level output current
Low-level output current .. _0'0 20 20
mA
mA
TA Operating free-air temperature -65 126 0 70 ·C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F' SN74F'
PARAMETER TEST CONDITIONS UNIT
MIN TYP' MAX MIN TYP' MAX
VIK Vec = 4.5 V, II = -18 mA -1.2 -1.2 V
VCC = 4.6 V, IOH = -1 mA 2.5 3.4 2.6 3.4
VOH V
VCC - 4.75 V, IOH = -1 mA 2.7
VOL VCC = 4.6 V, IOL= 20 mA '"
0.3L~~O.6 0.3 0.6 V
II VCC = 5.5 V, VI = 7 V ~'t-' 0.1 0.1 mA
IIH VCC = 6.6 V, VI = 2.7 V _,\u 20 20 pA
1m VCC = 5.5 V, VI = 0.5 V
.o..CV -1.2 -1.2
mA
IlL
I All others -0.6 -0.6
lOS' VC_C = 5.6 V, Vo = 0 -60 -160 -60 -160 mA
ICC VCC = 5.5 V, See Note 1 38 52 38 52 mA

* All typical values are at VCC = 5 V, TA = 25·C.

, Not more than. one output should be shorted at a time and the duretion of the sho~ circuit should not exceed one second.
NOTE 1: ICC is measured after applying a momentary 4.5 V, then ground, to the clock input with B andENT inputs high and all other inputs low.

2-118 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 856012 • DAlLAS. TEXAS 76286
 SN54F168, SN54F169, SN74F168, SN74F169
SYNCHRONOUS 4·BIT UP/DOWN DECADE AND BINARY COUNTERS

timing requirements
Vcc - 5 V, Vcc - MIN to MAXt,
TA - 25°C TA - MIN to MAXt
'F168, 'F169 SN74F' UNIT
SN54F'
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 90 MHz
tou Setup time, data (A, B, C, 0) high or low before ClK; 4 4.5 ns
thold Hold time, data (A, B, C, 0) high or low after ClK; 3 ... 3.5 ns
tsu Setup time, E!iil5 and ENi' high or low before ClK; 5 ~ 8 ns
thold Hold time, E!iil5 and ENi' high or low after ClK; 0 ~ 0 ns
ts• Setup time, mAli high or low before ClK; a 10...' 9 ns
thold Hold time, rmrn high or low after ClK; 0 oS' 0 ns
'F16a, high 11 0 12.5
Setup time, 'F16a, low 16.5 ~ 18
tsu ns
u/15 before ClK; 'F169, high 11 12.5
'F169, low 7 a
thold Hold time, u/15 high or low after ClK; 0 0 ns
tw Pulse duration, ClK high or low 5 5.5 ns

switching characteristics (see Note 2)

Vcc -5 V,
Cl - 50 pF,
Vce - MIN to MAXt,
Cl - 50 pF,
..
tI)

CD
CD
FROM TO .c

..
Rl - 500O, Rl - 500O,
PARAMETER UNIT (I)
(INPUT) (OUTPUT) TA - 25°C TA - MIN to MAXt
'F168, 'F169 SN54F' SN74F' as
MIN TVP MAX MIN TYP MAX MIN TVP MAX as
f max 100 115 90 MHz C
tPlH 2.2 6.1 8.5 2.2 9.5
ClK Q ns
tPHl 3.2 a.6 11.5 ~ 3.2 13
'tplH 4.7 11.6 15.5 -Q,'<; 4.7 17
ClK RCO ns
tpHl 3.2 8.1 11 <- 3.2 12.5
tplH 1.7 4.1 6 _Q'J 1.7 7
ENT RCO ns
tpHl 1.7 5.6 a o~ 1.7 9
tplH 2.7 8.1 11 2.7 12.5
u/15 ('F168) ~ ns
tPHl 3.2 12.1 16 3.2 17.5
tPlH 2.7 8.1 11 2.7 12.5
u/15 ('F169) ~ ns
tpHl 3.2 7.6 10.5 3.2 12

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: load circuits and waveforms are shown in Section 1.

TEXAS " , 2·119

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
2-120
 SN54F174, SN74F174
HEX O-TYPE FLIP-FLOPS WITH CLEAR
02932. MARCH 1987-REVISEO JANUARY 1989

• Contains Six Flip-Flops with Single-Rail SN54F174 ... J PACKAGE

Outputs SN74F174 ... 0 OR N PACKAGE
(TOP VIEWI
• Buffered Clock and Direct Clear Inputs
ClR VCC
• Applications Include: 10 60
Buffer/Storage Registers 10 60
Shift Registers 20 50
Pattern Generators 20 50
• Fully-Buffered Outputs for Maximum 30 40
Isolation from External Disturbances 30 40
GNO ClK
• Package Options Include Plastic "Small
Outline" Packages. Ceramic Chip Carriers.
and Standard Plastic and Ceramic 300-mil SN54F174 .•• FK PACKAGE
DIPs (TOP VIEWI

• Dependable Texas Instruments Quality and

Reliability
015 u
~uz>co
~o
3 2 1 20 19
description 18

...
5 17
These monolithic. positive-edge-triggered flip- U)
6 16
flops utilize TTL circuitry to implement D-type
7 15 G)
flip-flop logic with a direct clear input. G)
8 14
Information at the D inputs meeting the setup .c
time requirements is transferred to outputs on
9 1011 1213 en
the positive-going edge of the clock pulse. Clock
triggering occurs at a particular voltage level and ...caca
is not directly related to the transition time of the
positive-going pulse. When the clock input is at
NC-No internal connection o
either the high or low level. the D input signal logic symbol t
has no effect at the output.
The SN54F174 is characterized for operation
CLR
over the full military temperature range of
ClK
-55°C to 125°C. The SN74F174 is
(21
characterized for operation from OOC to 70°C. 10 lQ
(41 (51
20 2Q
(61 (71
FUNCTION TABLE 3D 3Q
(111 (101
(each fllp-flopl 4D 4Q
(131 (121
5Q

s:w
50
INPUTS OUTPUTS (141 (151
60 6Q
CUi ClK 0 Q
l X X L
H
H
t
t
H
L
H
L
t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
Pin numbers shown are for 0, J, and N packages.
:>w
H L L Co a:
0..
t-
O
::l
C
o
a:
0..
D. prDd.... i. III. fD1ll1IIve or _a. ....
PRODUCT PREVIEW daculI.1III cantol. lifomolion
~
d•••IDpm••t. Char••t.ri.ti. dlllll •• ~ .ther
If
TEXAS ~
Copyright © 1987, Texas Instruments Incorporated

=11=:"ri"; O:i:'''=~rT:.::':::::~=
pro..... withDiit .000ca.
INSTRUMENTS
POST OFFICE BOX 655012. DALLAS; TEXAS 75265
2-121
 SN54F174, SN74F174
HEX O·TYPE FLlp·FLOPS WITH CLEAR

logic diagram .(positive logic)

ClK

1 0 - - - -....+-1

20 .....;~--_+_+-I

30
3Q

..
0
I»
I»
en
4D

..
::T
CD
CD
fI) 50

60 ....................-1_+-1

Pin numbers shown are for D. J. and N packages.

absolute maximum ratings over operating free·alr temperature range (unless otherwise noted)
~ Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
o Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
c Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
c: Voltage applied to any output in the high state ...................... : . . . .. -0.5 V to VCC
n Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . .. 40 mA
Operating free·air temperature range: SN54F174. . . . . . • . . . . . . . . . . . . . . . . .. - 55 °C to 125°C
-4 SN74F174 .1 • • • • • . • • • . . • • . • • • . • . • . • • • • ODCto 70 DC
""CI Storage temperature range ......................................... - 65 DC to 150 DC
::a
~ t The input voltage ratings may be exceeded provided the Input current ratings are observed.

~
2-122 TEXAS •
INSTRUMENTS
POST OFFICE BOX 856012 • DALLAS. TEXAS 76286
 SN54F174, SN74F174
HEX O·TYPE FLIp· FLOPS WITH CLEAR

recommended operating conditions

SN54F174 SN74F174
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
10H High-level output current 1 1 mA
10l Low-level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 °C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F174 SN74F174
PARAMETER TEST CONDITIONS UNIT
MIN TYpt MAX MIN TYpt MAX
VIK VCC = 4.5 V, II = -18 mA -1.2 -1.2 V
VCC = 4.5 V, 10H = -1 mA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V, 10H = -1 mA 2.7
VOL VCC = 4.5 V, 10L - 20 mA 0.3 0.5 0.3 0.5 V
II
IIH
III
VCC =
VCC =
VCC -
5.5 V,
5.5 V,
5.5 V,
VI = 7 V
VI = 2.7 V
VI - 0.5 V
0.1
20
-0.6
0.1
20
-0.6
mA
p.A
mA
; CD
VCC = 5.5 V,
.c
10S* Vo = 0 -60 -150 -60 -150 mA
en
ICC

timing requirements
VCC - 5.5 V, See Note 1 30 45 30 45 mA
...caca
Q
vcc - 5 v, VCC - 4.5 V to 5.5 v,
TA - 25°C TA - MIN to MAXi
UNIT
'F174 SN54F174 SN74F174
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 80 MHz
Setup time data high
tsu 4 4 ns
or low before ClKt
Hold time data high
th 0 0 ns
or low after ClK;
LClK high 4 4
tw Pulse duration I ClK low 6 6 ns
ICCillow 5 5

~
Inactive-state setup time,
tsu 5 5 ns
m high before ClKt'

t All typical values are at VCC = 5 V, T A = 25°C.

*Not more than one output should be shorted at a time and tha duration of the short circuit should not exceed one second.
I For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
~a:
1Inactive-state setup time is also referred to as "recovery time". Q.
NOTE1: With all outputs open and 4.5 V appllad to all data and enable inputs, ICC is measured after a momentary ground, then 4.5 V,
I-
is applied to ClK.
o::)
c
oa:
Q.

TEXAS . " 2-123

INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS, TEXAS 75265
 SN54F17' SN74F174
HEX D·TYPE FLlP·FLOPS WITH CLEAR

switching characteristics (see Note 21

VCC = 5V. Vcc = 4.5Vt05.5V.
CL = 50 pF. CL=50pF.
FROM TO RL = 500Q. RL = 500Q.
PARAMETER UNIT
(INPUT) (OUTPUT) TA'; 25°C TA = MIN to MAXt
'F174 SN54F174 SN74F174
MIN TYP MAX MIN MAX MIN MAX
f max 100 140 80 MHz
tpLH 2.7 5.1 8 2.7 9 ns
elK Q
tpHL 3.7 6.6 10 3.7 11 ns
tpHL ern Q 4.2 9.6 14 4.2 15 ns
,.
t For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: load circuits and waveforms are shown in Section 1.

"a
:0
o
C
c:
o
-4
"a
:0
m
:S
m
~
2·124 TEXAS . "
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 SN54F17t SN74F175
QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
02932, MARCH 1987-REVISED JANUARY 1989

• Contains Four Flip-Flops with Double-Rail SN64F176, , . J PACKAGE

Outputs SN74F175 ... D OR N PACKAGE
(TOP VIEW)
• Buffered Clock and Direct Clear Inputs
CLR VCC
• Applications Include: 10 40
Buffer/Storage Registers 1'0 4'0
Shift Registers 10 40
Pattern Generators 20 30
• Package Options Include Plastic "Small 2'0 3'0
Outline" Packages. Ceramic Chip Carriers. 20 30
and Standard Plastic and Ceramic 300-mll GNO CLK
DIPs
SN54F175 .•. FK PACKAGE
• Dependable Texas Instruments Quality and
(TOP VIEW)
Reliability

description
d\5 u ~d
~uz><t

These monolithic. positive-edge-triggered flip- 3 2 1 2019

flops utilize TTL circuitry to implement Ootype 18 4'0
flip-flop logic with a direct clear input. 10 5 17 40
Information at the 0 inputs meeting the setup NC 6 16 NC us
time requirements is transferred to outputs on 20 7 15 30 1)
the positive-going edge of the clock pulse. Clock 2'0 8 14 3'0 Q)
triggering occurs at a particular voltage level and 9 1011 12 13 .c
CI)
is not directly related to the transition time of the dCU~O
positive-going pulse. When the clock input is at Ni3 Z U'" as
either the high or low level, the 0 input signal 'Iii
has no effect at the output. Q
NC-No Internal connection
The SN54F175 is characterized for operation
over the full military temperature range of logic symbol t
-55°C to 125°C. The SN74F175 is
characterized for operation from OOC to 70°C.

FUNCTION TABLE 10
(each ftlp-flop) 1ii
20
INPUTS OUTPUTS
2ii
~ ClK D 0 n: 3Q
l X X L H 3ii
H f H H l 40
H t L l H 4ii
H L L Do 00
t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.

UNLESS OTHERWISE lIono tIIll daaU"lnt ••nIIl.. Copyright © 1987, Texas Instruments Incorporated
PROOUCTIOII DATA Inll,..otlo. ..mot II If
pubUootion dIlL PraIIloII confann 10 INCillellil.
par the _ at TUII lnotrollinto ItIndlrd TEXAS . " 2-125
r:r:."\.t~.~a:\r=-..:~~ not _my INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F175, SN74F175
QUADRUPLE D·TYPE FLlP·FLOPS WITH CLEAR

logic diagram (positive logic)

CUi (1)

.ClK(9)

10 (4)

20~(6~)________.-.-~
2Q

30~(~1_2) ______~~~
3Q

...C
I»
I»
tn 40 __(_13_)______~~~
:r
CD
...en
CD

Pin number. shown are for D. J. and N packages.

absolute maximum ratings over operating free·alr temperature range (unless otherwise noted)
Supply voltage. Vee. . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . • .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F175... . . . . . . . . . . . . . . . . . . . . .. - 55 De to 125 De
SN74F175 ............................ OOeto70oe
Storage temperature range ......................................... - 65 °e to 150 0 e
t The input voltage ratings may ba exceeded provided the input currant ratings ara obsarvad.

recommended operating conditions

SN64F176 SN74F176
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.6 6 6.6 4.6 6 6.6 Y
YIH High·laval input voltage 2 .k....~ 2 Y
Yll low-level input voltage <>-«-- 0.8 0.8 Y
11K Input clamp current -18 -18 mA
IOH
IOl
High-level output current
low-level output current
_a">~
o~~
" -1
20
-1
20
mA
mA
TA Oparatlng free-air temperature -55 126 0 70 ·C

2-126 TEXAS . "

INSTRUMENTS
POS'r OFFICE BOX 665012 • DALLAS. TEXAS 75285
 SN54F175. SN74F175
QUADRUPLE D·TYPE FLlP·FLOPS WITH CLEAR

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN&4FI7& SN74F17&
PARAMETER TEST CONDITIONS UNIT
MIN Typt MAX MIN TYpT MAX
VIK VCC - 4.6 V, II - -18 mA -1.2 -1.2 V
VCC = 4.5 V, 10H = -1 mA 2.6 3.4 2.5 3.4
VOH V
VCC = 4.75 V, 10H = -1 mA 2.7
VOL VCC = 4.5 V, 10l = 20 mA O.:t,~ 0.5 0.3 0.5 V
II VCC = 5.6 V, VI - 7 V . Q\~ 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V .(. 20 20 p.A.
III VCC = 6.6 V, VI = 0.5 V _,,9" -0.6 -0.6 mA
10S* VCC = 6.6 V, Vo = 0 -60 -150 -60 -150 mA
ICC VCC = 5.5 V, See Note 1 22.5 34 22.5 34 mA

timing requirements

•
Vcc - & V, vee - 4.B V to B.& V.
TA - 2&Oe TA - MIN to MAXi
UNIT
'F175 SN&4FI7& SN74F17&
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 100 0 100 MHz
Setup time data high
en
tsu
or low before ClKt
3 3
\<v..f.
3 ns iCD
Hold time data high ~~'f.- .c
1 1 1 ns
th
or low after ClKt ,\c,'" en
I ~o
tw
ClK high
I
Pulse duration ClK low
4
5 '!;
4
5 ns ....asas
Jem low 5 5 5
C
Inactive-state setup time
5 5 5 ns
tsu
m
high before ClKt'

switching characteristics (see Note 2)

Vcc - 5V, Vce - 4.5 V to &_5 v,
Cl = 50 pF, Cl - 50 pF,
FROM TO Rl = 50012. Rl - 500 n,
PARAMETER UNIT
(INPUT) (OUTPUT) TA = 25°C TA - MIN to MAXi
'F175 SN54F175 SN74F175
MIN TYP MAX MIN MAX MIN MAX
f max 100 140 100 ~ '.~·l 100 MHz
tPlH
ClK OorO:
3.2 4.6 6.5 2.7 ";<: B.5 3.2 7.5
ns
tpHl 3.2 6.1 B.5 3.2_,~\.lV 10.5 3.2 9.5
tpHl m 0 3.7 B.6 11.5 ~ 15 3.7 13 ns
tplH m 0: 3.2 6.1 B.5 3.2 10 3.2 9 ns
t All typical values are at VCC = 5 V, TA = 26·C.
*Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§ For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
, Inactive-state setup time is also referred to as "recovery time".
NOTES: 1. ICC is measured with outputs open with 4.5 V applied to all data inputs, after a momentary ground followed by 4.5 V applied
to ClK.
2. load circuits and waveforms are shown in Section 1.

TEXAS ~ 2-127
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
...c
C»
C»
(I)
:::r
CD
...en
CD

2-128
 SN54F24L SN54F241
SN74F240, SN74F241
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
02932, MARCH 1987 - REVISED JANUARY 1989

• 3-State Outputs Drive Bus lines or Buffer SN54F240, SN54F241 ... J PACKAGE
SN74F240, SN74F241 ... OW OR N PACKAGE
Memory Address Registers
{TOP VIEWI
• Package Options Include Plastic "Small
Outline" Packages. Ceramic Chip Carriers. 1G vee
and Standard Plastic and Ceramic 300-mil 1A1 2G/2G'
DIPs 2Y4 1Y1
lA2 2A4
• Dependable Texas Instruments Quality and 2Y3 lY2
Reliability lA3 2A3
2Y2 1Y3
description 1A4 2A2
These octal buffers and line drivers are designed 2Y1 1Y4
specifically to improve both the performance and GND 2A1
density of three-state memory address drivers.
SN54F240, SN54F241 ... FK PACKAGE
clock drivers. and bus-oriented receivers and
transmitters. The designer has a choice of
selected combinations of inverting and
{TOP VIEWI
.
(!)
non inverting outputs. symmetrical G (active-low ...>- .-« u~
I(!) UI(!)
output control) inputs. and complementary G ~~>'"
and G inputs, '"3
The SN54F240 and SN54F241 are
characterized for operation over the full military
4
5
2 1 2019
18
17
...
fI)

Q)
Q)
temperature range of - 55°C to 125°C. The 6 16 .c
SN74F240 and SN74F241 are characterized for 7 15 CI)
operation from ooe
to 70°C. 8
9 1011 1213
14
...
ca
ca
.-O ......
>-z«>-«
o:;tN C
N(!)N ..... N

• 213 for 'F240 or 2G for 'F241

FUNCTION TA8LES

'F240 'F241 'F241

OUTPUT DATA OUTPUT DATA OUTPUT DATA

OUTPUT OUTPUT OUTPUT
CONTROL INPUT CONTROL INPUT CONTROL INPUT
G A Y lG lA lY 2G 2A 2Y
H X Z H X Z L X Z
L L H L L L H L L
L H L L H H H H H

PRODUCTION DATA documents contain info,mation Copyright © 1987, Texas Instruments Incorporated
currant II of publication date. Products conform to
specifications par the terms of Taxas Instruments
TEXAS " ,
:'~~:~~i~a{::1~7i ~=:~ti~n ~r=:::t::'S not INSTRUMENTS
2-129

POST OFFICE BOX 655012 • DALLAS, TEXAS 75265

 SN54f240, SN54F241 : ..'

SN74F240, SN74F241
OCTAL BUFFERS AND LINE DRIVERS WITH 3·STATE OUTPUTS

logic symbols t
'F~40 'F24l

tG

tAt tvt lA1 tvl

1A2 tv2 tv2
lA3 tv3 tv3
lA4 tv4 tv4

2G

2Al 2V1 2A1 2Vl

2A2 2V2 2A2 2V2
2A3 2V3 2A3 2Y3
2A4 2V4 2A4 2V4

tThese symbols are in accordance with ANSI/IEEE Std 91-1984

and lEe Publication 617-12.

logic diagrams (positive logic)

C
C\) 'F240 'F241
r+
C\)
lG 111
tn
::r
CD lAl 121 1181
IVl lAl
121 (181
IV1
CD
r+
en
141 1161 141 1161 IV2
lA2 IV2 lA2

161 1141 IV3

lA3 lA3 161 (141 IV3

181 1121
1M IV4 lA4 III 1121 IV4

21: 2G

1111 191 1111 191

2Al 2Yl 2Al 2Yl

1131 171 1131 171

2A2 2Y2 2A2 2Y2

1151 151 1t51 151

2A3 2Y3 2A3 2Y3

1171 131 1171 131

2M 2Y4 2A4 2Y4

2-130 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS, TEXAS 752615
 SN54F240, SN54F241
SN74F240, SN74F241
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state .. . . . . . . . . . . .. - 0.5 V to 5.5 V
Voltage applied to any output in the high state ................. _ . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state: SN54F240, SN54F241 ..................... 96 mA
SN74F240, SN74F241 .................... 128mA
Operating free-air temperature range: SN54F240, SN54F241 ............... - 55°C to 125°C
SN74F240, SN74F241 ................... O°C to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C

tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F240 SN74F240
SN54F241 SN74F241 UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage
...
VIH 2 2 V
U)
Vil low-level input voltage 0.8 0.8 V
Input clamp current -18 -18 mA G)
11K
G)
IOH High-level output current -12 -15 mA .c:
IOl Low·level output current 48 64 mA en
TA Operating free·air temperature -55 125 0 70 °e
...caca
C

TEXAS ." 2-131

INSTRUMENTS
POST OFFICE BOX 6660'2 • DALLAS. TEXAS 76266
 SN54F24D. SN74F24D
OCTAL BUFFERS AND LINE DRIVERS WITH 3·STATE OUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F240 SN74F240
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
VIK Vee = 4.5 V, II = -18 mA -1.2 -1.2 V
IIOH = -3 mA 2.4 3.3 2.4 3.3
Vee = 4.5 V IIOH - -12 mA 2 3.2
VOH V
IIOH = -15 mA 2 3.1
Vee = 4.75 V, 10H = -3 mA 2.7
IIOl-48mA 0.38 0.55
VOL Vee = 4.5 V, V
IIOL = 64 mA 0.42 0.55
10ZH Vee = 5.5 V, Vo = 2.7 V 50 50 pA
10Zl Vee = 5.5 V, Vo - 0.5 V -50 -50 pA
II Vce = 5.5 V, VI =7V 0.1 0.1 mA
IIH Vee = 5.5 V, VI = 2.7 V 20 20 p.A
III Vee = 5.5 V, VI = 0.5 V -1 -1 mA
10S§ Vee = 5.5V, Vo = 0 -100 -225 -100 -225 mA
I Outputs high 19 29 19 29
lee Vee = 5.5 V I Outputs low 50 75 50 75 rnA
I Outputs disabled 42 63 42 63
o
a
II)
switching characteristics (see Note 1)
vcc - 5 V, Vcc - MIN to MAXt,
en CL - 50 pF, Cl - 50 pF,
:r- Rl - 500 Il, Rl - 500 Il,
CD FROM TO
CD PARAMETER R2 - 500 Il, R2 - 500 Il, UNIT
r+ (INPUT) IOUTPUT)
CII TA - 25°C TA - MIN to MAXt
'F240 SN54F240 SN74F240
MIN TYP MAX MIN MAX MIN MAX
tpLH Data 2.2 4.7 7 2.2 9 2.2 8
Y ns
tpHL IAny A) 1.2 3.1 4.7 1.2 6 1.2 5.7
tpZH 1.2 3.1 5.3 1.2 6.7 1.2 6.1
(j Y ns
tpZL 3.2 6.5 9 3.2 10.5 3.2 10
tpHZ 1.2 3.6 5.3 1.2 6.5 1.2 6.3
G Y ns
tpLZ 1.2 5.6 8 1.2 12.5 1.2 9.5

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
*All typical values are at Vee = 5 V, TA = 25 ·e.
§ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: See Section 1 for load circuits and waveforms.

2-132 TEXAS . "

INSTRUMENTS
. POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F241. SN74F241
OCTAL BUFFERS AND LINE DRIVERS WITH 3·STATE OUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F241 SN74F241
PARAMETER TEST CONDITIONS UNIT
MIN TVP; MAX MIN TVP; MAX
VIK VCC_ = 4.5 V, II = -18 mA -1.2 -1.2 V
IIOH = -3 mA 2.4 3.3 2.7 3.3
Vce = 4.5 V IIOH - -12 mA 2 3.2
VOH V
IIOH = -16 mA 2 3.1
Vee = 4.75 V, 10H = -3 mA 2.7
II0l = 48 mA 0.38 0.66
VOL Vee = 4.6 V, V
I 10l = 64 mA 0.42 0.55
IOZH Vee = 5.6 V, Vo = 2.7 V 50 50 ~A
10Zl Vee = 6.6 V, Vo = 0.6 V -50 -60 ~A
II Vee = 5.5 V, VI - 7 V 0.1 0.1 mA
IIH Vee = 5.6 V, VI = 2.7 V 20 20 ~A
I G or ~ input -I -1
Vee = 6.5 V, VI = 0.5 V mA

•
III
I Any A input -1.6 -1.6
10si Vee = 5.5 V, Vo = 0 -100 -225 -100 -225 mA
I Outputs high 40 60 40 60
lee Vee = 5.5 V I Outputs low 60 90 60 90 mA
I Outputs disablad 60 90 60 90

switching characteristics (see Note 1)

Vcc - 5 V, Vcc - MIN to MAxt,
Cl - 50 pF, Cl - 50 pF,
Rl - 500!J, R1 - 500!J,
FROM TO
PARAMETER R2 - 500!J, R2 - 500!J, UNIT
(INPUT) 10UTPUT)
TA - 25 DC TA - MIN to MAXt
'F241 SN54F241 SN74F241
MIN TVP MAX MIN MAX MIN MAX
tPlH Data 1.7 3.6 5.2 1.2 6.5 1.7 6.2
V ns
tpHl IAny AI 1.7 3.6 5.2 1.2 7 1.7 6.5
tpZH 1.2 3.9 5.7 1.2 7 1.2 6.7
l~or 2G Y ns
tpZl 1.2 5 7 1.2 8.5 1.2 8
tpHZ 1.2 4.1 6 1.2 7 1.2 7
l~or 2G Y ns
tpLZ 1.2 4.1 6 1.2 7.5 1.2 7

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating eonditions.
*All typical values are at Vee = 5 V, TA = 25 ·e.
I Not more than one output should be shorted at a time and the duration 01 the short circuit should not exceed one second.
NOTE 1: See Section 1 for load circuits and waveforms.

TEXAS ", 2·133

INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS. TEXAS 76285
2-134
 SN54F242, SN54F243, SN74F242, SN74F243
QUADRUPLE BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
D2932. MARCH 1987-REVISED AUGUST 1988

• 2-Way Asynchronous Communication SN54F242. SN54F243 ... J PACKAGE

Between Data Buses SN74F242. SN74F243 ... D OR N PACKAGE
(TOP VIEW I
• Local Bus-Latch Cepability
GAB VCC
• Choice of True or Inverting Logic NC GBA
• Package Options Include Plastic "Small A1 NC
Outline" Packages, Ceramic Chip Carriers, A2 B1
and Standard Plastic and Ceramic 300-mil A3 B2
DIPs A4 B3
GND B4
• Dependable Texas Instruments Quality and
Reliability
SN54F242. SN54F243 ... FK PACKAGE
(TOP VIEW)
description
OJ U «
These quadruple bus transceivers are designed U«U UOJ
Zit:) z.> t:)
for asynchronous two-way communications
between data buses. The control function 3 2 1 2019
implementation allows for maximum flexibility in A1 4 18 NC
timing. NC 5 17 NC
A2 6 16 B1
Each device allows data transmission from the
NC 7 15 NC
A bus to the B bus or from the B bus to the A
A3 8 14 B2
bus, depending upon the logic levels at the
9 1011 1213
enable inputs GBA and GAB. The enable inputs
can be used to disable the device so that the <tOU<tM
«zzOJOJ
buses are effectively isolated. t:)

The dual-enable configuration gives the NC-No internal connection

quadruple bus transceivers the capability to store
data by simultaneous activation of GBA and
GAB. Each output sustains its input in this transceiver configuration. Thus, when both control inputs are
activated and all other data sources to the two sets of bus lines are at high impedance, both sets of bus
lines (eight in all) will remain at their states. The 4-bit codes appearing on the two sets of buses will be
identical for the 'F243, or complementary for the 'F242.
The SN54F242 and SN54F243 are characterized for operation over the full military temperature range
of - 55°C to 125°C. The SN74F242 and SN74F243 are characterized for operation from OOC to 70°C.

FUNCTION TABLE

ENABLE INPUTS
'F242 'F243
GAB GBA
L L A to 8 A to 8
H H 8 to A 8 to A
H L Isolation Isolation
Latch A and 8 Latch A and 8
L H
(A ~ lil (A ~ 81

PRODUCTION DATA documonts cont.in information Copyright © 1987. Texas Instruments Incorporated

~
curnnt I. of publil:BtiDn date. Preducts conform to
0'
spocill••tlons psr tho terms To••s Instrumo.ts
:~~~~:~i~.t::ru~~ ~:~::i:; lI~o::::~:~~s not TEXAS
INSTRUMENTS
2-135
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F242, SN54F243, SN74F242, SN74F243
QUADRUPLE BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

logic symbols t
'F242 'F243

r---1..~~B3

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

logic diagrams (positive logic)

'F242 'F243

GBA

C A 1 ..:.:.;'----Hf-l
I»
r+
I»
en
::r
A2 -,f4"':)_ _-HlH (10) B2

CD
CD
r+ A3 ..!(5~)_ _HH (9) B3
en

A4 (6) (B) B4

Pin numbers shown are for: D, J, and N packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage; .................................................... _ -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . . . .. -0.5 to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state: SN54F242, SN54F243 . . . . . . . . . . . . . . . . . . . .. 96 mA
SN74F242, SN74F243 .................... 128 mA
Operating free-air temperature range: SN54F242, SN54F243 .............. -55°C to 125°C
SN74F242, SN74F243 .................. DoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
*The input voltage ratings may be exceeded provided the input current ratings are observed.

2-136 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 76265
 SN54F242, SN74F242
QUADRUPLE BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

recommended operating conditions

SN54F242 SN74F242
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 rnA
10H High-level output current -12 -15 rnA
10L Low-level outpu~ current 48 64 rnA
TA Operating free-air temperature -55 125 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F242 SN74F242
PARAMETER TEST CONDITIONS UNIT
MIN Typt MAX MIN Typt MAX
VIK Vee = 4.5 V. II =
-18 rnA -1.2 -1.2 V
Vee - 4.5 V. 10H - -3 rnA 2.4 3.3 2.4 3.3
Vee = 4.5 V. 10H = -12 rnA 2 3.2
VOH V
Vee = 4.5 V. 10H = -15 rnA 2 3.1

VOL
Vee - 4.75 V.
Vee = 4.5 V.
10H - -3 rnA
10L = 48 rnA 0.38 0.55
2.7

V
...
U)

G)
Vee = 4.5 V. 10L = 64 rnA 0.42 0.55 G)
A or B port Vee = 5.5 V. VI = 5.5 V 1 1 rnA .c
II
Control inputs Vee = 5.5 V. VI =7V 0.1 0.1 rnA en
IIH
A or B port~
Control inputs
Vee
Vee
= 5.5 V.
= 5.5 V.
VI = 2.7 V
VI = 2.7 V
70
20
70
20
p.A ...
CO
CO
IlL ~ Vee = 5.5 V. VI = 0.5 V -1 -1 rnA C
10S§ Vee = 5.5 V. Vo = 0 -100 -225 -100 -225 rnA
I Outputs high 30 46 30 46
Vee = 5.5 V.
ICC
See Note 1
I Outputs low 46 69 46 69 rnA
I Outputs disabled 42 63 42 63

switching characteristics (see Note 2)

VCC - 5 V. VCC - 4.5 V to 5.5 V.
CL - 50 pF. CL - 50 pF.

FROM TO
R1 - 500 n. R1 - 500 n.
PARAMETER
(INPUT) (OUTPUT)
R2 - 500 n. R2 - 500 n. UNIT
TA - 25°C TA - MIN to MAX'
'F242 SN54F242 SN74F242
MIN TYP MAX MIN MAX MIN MAX
tpLH 2.2 4.1 6.5 2.2 9 2.2 7.5 ns
A or B BorA
tpHL 1 2.6 4.5 0.5 5 1 4.5 ns
tPZL 2.7 5.6 7.5 2.2 10 2.7 8.5 ns
Enable A or B
tpZH 2.7 6.1 9 2.2 12 2.7 10.5 ns
tpHZ 1.8 6.6 9 1.8 11 1.8 9.5 ns
Disable A or B
tpLZ 2.7 5.6 9.5 2.3 13.5 2.7 11 ns

t All typical values are at Vee = 5 V. TA = 25°C.

~ For 1/0 ports. the parameters IIH and IlL include the off-state output current.
§Not more than one output should be shorted at a time. and the duration of the short circuit should not exceed one second.
'For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured either with all transceivers enabled in only one direction or all transceivers disabled.
2. Load circuits and waveforms are shown in Section 1.

TEXAS . " 2-137

INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS. TEXAS 15266
 SN54F243, SN74F24~
QUADRUPLE BUS TR~~SCEIVERS WITH 3·STATE OUTPUTS

recommended operating conditions

SN54F243 SN74F243
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High"level input voltage 2 2 V
VIL Low-level input vOltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High-level output current 12 16 mA
IOL Low-level output current 48 64 mA
TA Operating free-a,r temperature 55 125 0 70 ·e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted) ,
SN54F243 SN74F243
PARAMETER TEST CONDITIONS UNIT
MIN TVpt MAX MIN TVpT MAX
VIK Vee = 4.5 V, II = -18 mA ~1.2 -1.2 V
Vee = 4.5 V, IOH - -3 mA 2.4 3.3 2.4 3.3
Vee = 4.6 V, IOH = -12 mA 2 3.2
VOH V
Vee = 4.5 V, IOH = -15 mA 2 3.1
Vee - 4.75 V, loti - -3mA 2.7
C
...
I»
I»
VOL

A or B port
Vee
Vee
Vee
=
=
-
4.5 V,
4.5 V,
6.6 V,
IOL = 48 mA
IOL = 64 mA
VI - 5.5 V
0.38 0.55

1
0.42 0.55
1
V

mA
en
::T
II
ConTrol' inputs Vee = 5.5 V, VI" 7 V 0.1 0.1 mA

CD A or B p.,rt* Vee = 6.5 V, VI = 2.7 V 70 70

...
CD
(I)
'IIH

IlL *
eOnTrol'lnputs Vee = 5.5 V,
Vee = 5.5 V,
VI = 2.7 V
VI = 0.5 V
20
-1
20
-1.6
pA

mA
IOS§ Vee =5.5 V, Vo = 0 -100 -225 -100 -225 mA

Vee = 5.5 V,
L OutpuTs high 64 80 64 80
lee
Sea Note 1
I OutpUTs lOW 64 gO 64 90 mA
I Outputs disabled 71 90 71 90

switching characteristics (see Note 2)

VCC - 6V, VCC - 4.5 V to 5.5 V
CL - 50 pF, CL - 50 pF,
Rl - 500 D, Rl - 500 D,
FROM TO
PARAMETER R2 - 500 D, R2 - 500 0, UNIT
(lNPUTI (OUTPUTI
TA - 25°C TA - MIN to MAX'
'F243 SN54F243 SN74F243
MI~ TVP MAX MIN MAX MIN MAX
tPLH t.7 3.6 5.2 1.2 6.5 1.2 6.2 ns
AorB BorA
tpHL 1.7 3.6 5.2 1.2 8.5 1.2 6.5 ns
tpZH 1.2 3.9 6.7 1.2 8 1.2 6.7 ns
Enable Aor B
tpZL ;,~ 6.4 7.5 1.2 10.6 1.2 8.5 ns
tpHZ 1.2 4.1 6 1 7.6 1 7 ns
Disable AorB
tpLZ 2 4.6 6 2 8.6 2 7 ns
t All typical values are at Vee = 15 V, TA = 26°C.
* For 1/0 portS, the parameter. IIH and IlL include the off-sTste output current.
§Not more than one output should be shorted at e time, and the duration of the .~ort circuit should not exceed one second.
, For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured either with all transceivers enabled In only one direction or all transceivers disabled.
2. Load circuita and waveforms are shown in Section 1.

2-138 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TEXAS 76286
 SN54F244, SN74F244
OCTAL BUFFERS AND LINE DRIVERS WITH 3·STATE OUTPUTS
02932. MARCH 1987-REVISEO JANUARY 1989

• 3·State Outputs Drive Bus Lines or Buffer SN54F244 ... J PACKAGE

Memory Address Registers SN74F244 ... DW OR N PACKAGE
(TOPVIEWI
• Package Options Include Plastic "Small
Outline" Packages. Ceramic Chip Carriers, 1G' Vee
and Standard Plastic and Ceramic 300-mil lAl 2G
DIPs 2Y4 lYl
lA2 2A4
• Dependable Texas Instruments Quality and 2Y3 lY2
Reliability lA3 2A3
2Y2 lY3
description lA4 2A2
These octal buffers and line drivers are designed 2Yl lY4
specifically to improve both the performance and GND 2Al
density of three-state memory address drivers.
clock drivers. and bus-oriented receivers and SN54F244 •.. FK PACKAGE
transmitters. Taken together with the 'F240 and (TOPVIEWI
'F241. these devices provide the choice of
selected combinations of inverting and
noninverting outputs. symmetrical G (active-low
output control inputs. and complementary G and
G inputs.
The SN54F244 is characterized for operation
lA2
2Y3
4
5
3 2 1 2019
18
17
lYl
2A4
...
fI)
Q)
Q)
over the full military temperature range of lA3 6 16 lY2 .c
- 55°C to 125°C. The SN74F244 is 2Y2 7 2A3 en
characterized for operation from OOC to 70°C. lA4 8
9 10111213
14 lY3
...caca
logic diagram (positive logic)
-C-.N
~z<><
CJN-N
Q

1 Al ..:;(2;:.1_--1 >-_+...!(.:.,:IS:;:,1 lYl

(4.:.,:1_ _-1
1 A2 ... (lei lY2
lG

1 A3 ..:;(6:;:,1_--1 (141 lY3 (181

lAl 1Yl
(161
lA2 1Y2
(141
lA4~(~SI~_~ ~~_-L(1~2~1 lY4 lA3 1Y3
(121
lA4 1Y4

zG
(91
2Al 2Yl
(131 (7l
2Al ...
(1;.;1;.:.1_-1 >_-+....:::(9:!.,1 2Yl 2A2 2Y2
(151 (51
2A3 2Y3
(171 (31
2A4 2Y4
2 A 2 ....(1:..:3",1_-1 >---4-........L.2Y2
2A 3 .:,(1.;.,;6;:.1_-1 >--1--'-'''- 2Y3 t This symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
2A4~(1.:..:7~1_~ > __....:::(3~1 2Y4

CopyrlQht C> 1987. Texas Instruments Incorporated

TEXAS
INSTRUMENTS
4f 2-139
POST OFFICE BOX 666012 • DALLAS. TEXAS 7628&
 SN54F244, SN74F244
OCTAL BUFFERS AND LINE DRIVERS WITH 3·STATE OUTPUTS

FUNCTION TABLE

OUTPUT DATA
OUTPUT
CONTROL INPUT
y
l(i, 2G A
H X Z
L L L
L H H

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state ............ .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state: SN54F244 . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. 96 mA
SN74F244 . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 128 mA
Operating free-air temperature range: SN54F244.. . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F244 ............................ DoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
C
CI)
t The input voltage ratings may be exceeded provided the input current ratings are observed.
r+
CI) recommended operating conditions
en SN54F244 SN74F244
J UNIT
(D MIN NOM MAX MIN NOM MAX
CD Vee Supply voltage 4.5 5 5.5 4.5 5 5.5. V
r+
til VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High-level output current 12 15 mA
IOL Low-level output current 48 64 mA
TA Operating free-air temperature -55 125 0 70 ·e

2-140 . TEXAS'"
INSTRUMENTS
POST OFF.ICE BOX 655012 • DALLAS. TEXAS 75266
 SN54F244. SN74F244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F244 SN74F244
PARAMETER TEST CONDITIONSt UNIT
MIN TVP* MAX MIN TYP* MAX
VIK Vee = 4.5 V. II = -18 mA -1.2 -1.2 V
Vee - 4.5 V. 10H = -3 mA 2.4 3.3 2.4 3.3
Vee = 4.5 V. 10H = -12 mA 2 3.2
VOH V
Vee = 4.5 V. 10H = -15 mA 2 3.1
Vee - 4.75 V. 10H - -3 mA 2.7
Vee = 4.5 V. 10L = 48 mA 0.38 0.55
VOL V
Vee = 4.5 V. 10L = 64 mA 0.42 0.55
II Vee - 5.5 V. VI = 7 V 0.1 0.1 mA
10ZH Vee = 5.5 V. Vo = 2.7 V 50 50 p.A
10ZL Vee = 5.5 V. Vo = 0.5 V -50 -50 p.A
IIH Vee = 5.5 V. VI = 2.7 V 20 20 p.A

IlL
I Any ~ input Vee = 5.5 V. VI = 0.5 V
-1 -1
mA
I Any A input -1.6 -1.6
10S§ Vee = 5.5 V. Vo = 0 -100 -225 -100 -225 mA
I Outputs high 40 60 40 60
Vee = 5.5 V. LOutputs low 60 90 60 90 mA
ICC
Outputs open
I Outputs disabled 60 90 60 90

switching characteristics (S88 Not8 1)

Vce - 5 V. Vee - 4.5 V to 5.5 V.
eL - 50 pF. CL - 50 pF.
Rl - 500 n. Rl - 500 n.
FROM TO
PARAMETER R2 - 500 n. R2 - 500 n. UNIT
(INPUT) (OUTPUT)
TA - 25 0 e TA - MIN to MAxt
'F244 SN64F244 SN74F244
MIN TVP MAX MIN MAX MIN MAX
tpLH 1.7 3.6 5.2 2 6.6 1.7 6.2
A Y ns
tpHL 1.7 3.6 5.2 2 7 1.7 6.5
tpZH 1.2 3.9 5.7 2 7 1.2 6.7
l~or 2Cl' Y ns
tpZL 1.2 5 7 2 8.5 1.2 8
tpHZ 1.2 4.1 6 2 7 1.2 7
lCl' or 2Cl' Y ns
tpLZ 1.2 4.1 6 2 7.5 1.2 7

t For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions
tAli typical values are at Vee = 5 V. TA = 25°C.
§ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: Load circuits and waveforms are shown in Section 1.

TEXAS ~ 2-141
INSTRUMENTS
POST OFFICE BOX 855012 • DALl.AS. TeXAS 75265
2-142
 SN54F245, SN74F245
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
02932. MARCH 1987-REVISEO JANUARY 1989

• 3-State Outputs Drive Bus Lines Directly SN54F246 •.. J PACKAGE

SN74F246 .•. DW OR N PACKAGE
• Package Options Include Plastic "Small (TOPVIEWI
Outline" Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mll DIR vee
DIPs A1 G
A2 B1
• Dependable Texas Instruments Quality and A3 B2
Reliability A4 B3
A5 B4
description A6 B5
The SN54F245 and SN74F245 are octal bus A7 B6
transceivers designed for asynchronous two- AB B7
way communication between data buses. The GND B8
control function implementation minimizes
external timing requirements. SN64F245 ••• FK PACKAGE

The devices allow data transmission from the A (TOPVIEWI

bus to the B bus or from the B bus to the A bus

N _ g; ~
depending upon the logic level at the direction <I: <I: 0 > It.?
control (DIR) input. The enable input fG) can be
used to disable the device so that the buses are
effectively isolated. 4
5
3 2 1 2019
18
17
B1
B2
...
U)

Q)
Q)
The SN54F245 is characterized for operation
over the full military temperature range of
16 B3 .c
7 15 B4 U)
- 55 °e to 125°e. The SN74F245 is
characterized for operation from ooe to 70 oe.
A7 8
9 10 11 1213
14 85
...caca
logic symbol t
IDCID .... '"
<l:zlDlDlD
C
t.?

FUNCTION TABLE

DIRECTION
ENABLE
CONTROL OPERATION
G
A1 DIR
L L B data 10 A bus
A2 L H A data to B bus

AJ
H X Isolation

A4
A5
A6 B6

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 61 7·1 2.

PRODUCTION DATA .......l1li .. ntll. Infarlllll.n Copyright @ 1987. Texas Instruments Incorporated
••rrtnt I. of publlcall.. UII. Praducll ..nf.rm I.
lpacificotla.. por Ihl lormo .f TI••• InotruIIIIIII
=~~"i:c:ri =~~:; l!r:::~A!'~" nat
TEXAS . .
INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS, TEXAS 75265 2-143
 SN54F245, SN74F245
OCTAL BUS TRANSCEIVERS WITH 3·STATE OUTPUTS

logic diagram (positive logic)

DIR
(191 G

Al....:.:;~....-I :>-+-:1::--..,
L....--l-l-< 1-"-__ Bl
"'::-+4--..,
A2....:.:;:...-.....-I
L....---4--4-< 1-"-":":":':'" B2
A3....:..;,;-....-I "'::-+-.1.=--..,

L....--l-l-< 1-"-":":':::"" B4
A5..:.:.~....-I :>-+......=-...,
L....--I-IK" 1-"-":":"';::"" B5
A6....;".;-_..... "'::>4-.1.--..,

A7....:.::...-.....-1 "'::>4-.1.--...,
C
...
AI
AI
I...---If--II-< 1-.......:..:.:::.... B7

1...-_ _ _ -< 1-..-":";";'- BB

en
:::T
! absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
U) Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage (excluding I/O ports) t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 rnA to 5 rnA
Voltage applied to any output in the disabled or power-off state .............. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state: SN54F245 (A 1 thru A8) . . . . . . . . . . . . . . . . . . .. 40 rnA
SN54F245 (B1 thru B8) .................... 96 rnA
SN74F245 (A 1 thru A8) . . . . . . . . . . . . . . . . . . .. 48 rnA
SN74F245 (B1 thru B8) ................... 128 mA
Operating free-air temperature range: SN54F245. . . . . . . . . . . . . . . . . . . . . . . .. - 55 DC to 125 DC
SN74F245 ............................ ODCto 70 DC
Storage temperature range ......................................... - 65 DC to 150 DC

t The input voltage ratings may be exceeded provided the input current ratings are observed.

2-144 TEXAS . "

INSTRUMENTS
POST OFFice BOX 666012 • DALLAS. T'EXAS 76285
 SN54F245, SN74F245
OCTAL BUS TRANSCEIVERS WITH 3·STATE OUTPUTS

recommended operating conditions

SN54F245 SN74F245
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage O.B O.B V
11K Input clamp current -lB -lB mA
Al thru AB -3 -3
10H Hi9'~-level output current mA
Bl thru BB -12 -15
Al thru AB 20 24
10L Low-level output current mA
Bl thru BB 4B 64
TA Operating free-air temperature -55 125 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F245 SN74F245
PARAMETER TEST CONDITIONSt UNIT
MIN Typt MAX MIN TYpt MAX
VIK Vee = MIN. II =
-lB mA -1.2 -1.2 V
Any output Vee - 4.75 V. 10H = -1 mAto -3mA 2.7
10H = -1 mA
...
2.5 3.4 2.5 3.4
Al thru AB fII
VOH 10H = -3 mA 2.4 3.3 2.4 3.3
Vee = MIN V Q)
10H = -12 mA 2 3.2
Q)
Bl thru BB
10H = -15 mA 2 3.1 .s::.
10L = 20 mA 0.3 0.5 CJ)
Al thru AB
VOL
Bl thru BB
Vee = MIN
10L = 24 mA
10L = 4B mA
10L = 64 mA
0.38 0.55
0.35

0.42
0.5

0.55
V
...
CU
CU
C
DIR and G VI = 7 V 0.1 0.1
II Vee = MAX mA
A and B VI = 5.5 V 1 1
A and B 70 70
IIH§ Vee = MAX. VI = 2.7 V p.A.
DIR and G 20 20
A and B -0.65 -0.65
IlL § Vee = MAX. VI = 0.5 V mA
DIR and (l" -1.2 -1.2
Al thru AB -60 -150 -60 -150
lOS'
B1 thru BB
Vee = MAX. Va =0 -100 -225 -100 -225
mA

leeH Vee = MAX 70 90 70 90 mA

leeL Vee = MAX 95 120 95 120 mA
leez Vee = MAX 85 110 B5 110 mA

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
tAli typical values are at Vee = 5 V. TA = 25°e.
§ For 1/0 ports. the parameters IIH and IlL include the off-state output current.
, Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

TEXAS . " 2-145

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75266
 SN54F245. SN74F245
OCTAL BUS TRANSCEIVERS WITH 3·STATE OUTPUTS

switching characteristics (see Note 1)

Vcc - 6 V, vcc - 4.6 V to 6.6 V,
CL - 50 pF, CL - 60 pF,
Rl - 6000, Rl - 500 0,
FROM TO
PARAMETER R2 - 600 0, R2 - 600 0, UNIT
(INPUT) (OUTPUT)
TA - 26°C TA - MIN to MAXt
'F246 SN64F245 SN74F246
MIN TVP MAX MIN MAX MIN MAX
tPLH 1.7 3.B 6 1.2 7.6 1.7 7
AorB B or A ns
tpHL 1.7 4.2 6 1.2 7.5 1.7 7
tpZH 2'.2 4.9 7 1.7 9 2.2 B
'1l' AorB ns
tpZL 2.7 6.6 8 2.2 10 2.7 9
tpHZ 2.2 4.6 6.5 1.7 9 2.2 7.5
'1l' A or B ns
tpLZ 1.2 4.6 6.5 1.2 10 1.2 7.5

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE1: Load circuits and waveforms are shown in Section 1.

2·146 TEXAS ."

INSTRUMENlS
POST OFFICE BOX 866012 • DALLAS. TEXAS 76285
 SN54F251A, SN74F251A
1-0F-8 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS
D2932. MARCH 1987-REVISEO JANUARY 1989

• Three-State Versions of SN54F151A and SN54F261A ••. J PACKAGE

SN74F261A ... 0 OR N PACKAGE
SN74F151A
(TOPVIEWI
• Three-State Outputs Interface Directly with
System Bus 03 Vee
02 04
• Performs Parallel-to-Serial Conversion 01 05
• Complementary Outputs Provide True and DO 06
y 07
Inverted Data
W A
• Package Options Include Plastic "Small G B
Outline" Packages, Ceramic Chip Carriers GNO e
and Standard Plastic and Ceramic 300-mil
DiPs
SN54F251A ..• FK PACKAGE
• Dependable Texas Instruments Quality and (TOPVIEWI
Reliability U
'" (') U u-.t
ooz>o
description
3 2 1 20 19
These data selectors/multiplexers contain full 01 4 18
binary decoding to select one-of-eight data 5 17
sources and feature strobe-controlled 6 16
complementary three-state outputs. 7 15
The three-state outputs can interface with and 8 14
drive data lines of bus-organized systems. With 9 1011 1213
all but one of the common outputs disabled (at
e high-impedance state), the low-impedance of
the single enabled output will drive the bus line
...caca
to a high or low logic level. Both outputs are Ne - No internal connection C
controlled by the strobe fa). The outputs are
disabled when G is high. logic symbol t
The SN54F251A is characterized for operation MUX
over the full militery temperature range of G
e e.
:)Gt
A
-55 D to 125 D The SN74F251A is
characterized for operation from oDe to 70 De. B
c
DO 0
FUNCTION TABLE 01 5 Y
\l
16)
02 \l W
INPUTS OUTPUTS
03
SELECT STROBE
C B A 'II
y W D4
~
X X X H Z Z
OS
w
L
L
L
L
L
H
L
L
DO
01
DO
Di
D6
07 :>w
L
L
H
H
L
H
L
L
02
03
52
53
tThis symbol Is in accordance with ANSIIIEEE Std 91·1984 and
lEe Publication 617·'2.
a:
a..
H
H
L
L
L
H
L
L
04
05
54
05
Pin numbers shown are for O. J. and N packages.
....
(.)
H Ii L L D6 Os ::;)
H H H L 07 D7
C
~O. 01 ... 07 = the level of the respective 0 input oa:
a..
PRODUCT PREyn d•••_ contein Infor.llI.n Copyright e 1987. Texas Instruments Incorporated
•• prod_ In tile flll'lllltlve II 1IaIi.. p'~I" of
d...I.,'..lt. Ch..lcterllli. dltl IIi IIh,r
=~rI":t ":1::'~rTZ::.=:=
..tf
TEXAS
INSTRUMENTS 2-147
prod_ wIIII••t .otIoe.
POST OFFICE BOX 866012 • DALLAS, TeXAS 7&285
 SN54F251A, SN74F251A
1·0F·8 DATA SELECTORS/MULTIPLEXERS WITH 3·STATE OUTPUTS

logic diagram (positive logic)

~ (7)

DO (4)

D1 ..:;(3~)~----------------~r=f===~~~===r----l
D2 (2)

D3 (1)

DATA Y
INPUTS D4 (15) W

D5 (14)

D6 (13)

(12)
D7...:..-.;..-----11lr=f:R~C)---.J

S~~:~T
(BINARY)
{ : ::::

Pin numbers shown are for D. J. and N packages.

'lJ
::XJ
o
C
c:
(")
-I
'lJ
::XJ
m
S
m
~

2·148
TEXAS ~
INSTRUMENlS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 SN54F251A, SN74F251A
1-0F-8 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state: SN54F251 A ............................. 40 mA
SN74F251A ............................. 48 mA
Operating free-air temperature range: SN54F251 A ....................... - 55°C to 125°C
SN74F251A ........................... ooC to 70°C
Storage temperature range ......................................... -65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F251A SN74F251A
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 v
VIL
11K
IOH
IOL
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
0.8
-18
-3
20
0.8
-18
-3
24
V
mA
mA
mA
..
(I)
Q)
Q)
J:.
Operating free-air temperature -55 125 0 70 °e

..
TA (J)
C'CI
electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted) C'CI
C
SN54F251A SN74F251A
PARAMETER TEST eONDITIONS UNIT
MIN TYP* MAX MIN TYP' MAX
VIK Vee = 4.5 V, 11=-18mA -1.2 -1.2 V
IOH - -1 mA 2.5 3.4 2.5 3.4
Vee = 4.5 V
VOH IOH - -3 mA 2.4 3.3 2.4 3.3 V
Vee = 4.75 V IOH = - 1 mA to - 3 mA 2.7
IOl = 20 mA 0.30 0.5
VOL Vee = 4.5 V V
IOL - 24 mA 0.35 0.5
IOZH Vee = 5.5 V, Vo = 2.7 V 50 50 ~A
IOZl Vee = 5.5 V, Vo = 0.5 V -50 -50 ~A
II vee - 5.5 V, VI - 7 V 0.1 0.1 mA
IIH IIee = 5.5 V, VI - 2.7 V 20 20 ~A
~
IlL Vee = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
w
IOS§

lee
Vee = 5.5 V,
Vee = 5.5 V,
Vo = 0
I Condition A
-60
15
-150
22
-60
15
-150
22
mA

mA
:>w
See Note 1 I eondition B 16 24 24
16
a:
*AII typical values are at Vec = 5 V, TA = 25°C. Q.
§Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: lee is measured with the outputs open under the following conditions: I-
A. Select input and data input at 4.5 V, output control grounded. (J
B. All inputs at 4.5 V. ::;)
C
o
a:
Q.

INSTRUMENTS
TEXAS -If 2-149
POST OFFICE BOX 655012· DALLAS, TEXAS 75265
 SN54F251A, SN74F251A
1·0F·8 DATA SELECTORS/MULTIPLEXERS WITH 3·STATE OUTPUTS

switching characteristics (see Note 2)

Vee - 5 V, Vee - 4.5 V to 5.5 V,
eL - 50 pF, CL - 50 pF,
Rl - 5000, Rl - 15000,
FROM TO
PARAMETER R2 - 5000, R2 - 5000, UNIT
(lNPUTI (OUTPUTI
TA - 26°e TA - MIN to MAXt
'F2151A SN154F2151A SN74F2151A
MIN TVP MAX MIN MAX MIN MAX
tpLH 2.7 6.4 9 2.7 11.6 2.7 9.6
A, B, orC W ns
tPHL 2.4 4.6 7.6 2.4 8 2.4 7.5
tpLH 3.7 7.1 10.5 2.7 14 3.7 12.6
A, B, or C Y ns
tpHL 3.2 6.6 8.6 2.2 10.6 3.2 9
tPLH Data 2.2 4.6 6.6 1.7 8 2.2 7
W ns
tpHL (Any 01 1 2.1 4 1 6 1 6
tPlH Data y 2.7 4.6 7 1.7 9 1.7 8
na
tpHL (Any 01 2.7 6.1 7 2.7 9 2.7 7.6
tPZH 1.7 3.9 8 1.3 7 1.7 7
1I W ns
tpZL 1.7 3.9 6 1.7 7.6 1.7 8.6
tPHZ
1I W
1.7 3.6 6.6 1.7 6 1.7 e na
tPLZ 1 2.6 4.6 I 6 2.9 4.6
c tPZH
1I y 2.7 4.4 7 2.3 8.6 2.3 7.6
na
....
D)
D)
tpZL
tPHZ
2.7
1.3
6.1
3.4
7.6
6.6
2.7
1.3
9
6.6
2.7
1.3
8
5.6
1I y nl
en tPLZ 2 2.6 4.6 I 6.6 1 4.6

!
i tFor conditions shown as MIN or MAX, usa the appropriate value specified under Recommended Operating Conditions.
NOTE 2: Load circuits and waveforms are shown in Sactlon 1.
en

."
:I:J
o
C
c:
(')
-I
."
:I:J

-~
~
2-150
TEXAS ."
INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS. TeXAS 76285
 SN54F253, SN74F253
DUAL 1·0F·4 DATA SELECTORS/MULTIPLEXERS
WITH 3·STATE OUTPUTS
02932, MARCH 1987 - REVISED JANUARY 1989

• Three·State Versions of SN54F153 and SN54F253 •.. J PACKAGE

SN74F253 ... 0 OR N PACKAGE
SN74F153
(TOP VIEW)
• Permits Multiplexing from N Lines to 1 Line
• Performs Parallel·to·Serlal Conversion 1<3 VCC
B 2<3
• Package Options Include Plastic "Small 1C3 A
Outline" Packages. Ceramic Chip Carriers. 1C2 2C3
and Standard Plastic and Ceramic 300-mll 1C1 2C2
DIPs 1CO 2C1
• Dependable Texas Instruments Quality and 1Y 2CO
Reliability GND 2Y

description SN54F253 ... FK PACKAGE

(TOP VIEW)
Each of these data selectors/multiplexers
U
contains inverters and drivers to supply full CIlI~ ~ ~I~
binary decoding data selection to the AND·OR
gates. Separate output control inputs are 3 2 1 20 19
provided for each of the two four-line sections. 1C3 4 18 A

The three-state outputs can interface with and

drive data lines of bus-organized systems. With
all but one of the common outputs disabled (at
a high-impedance state), the low-impedance of
1C2
NC
1C1
1CO
5
6
7
8
17
16

14
2C3
NC
2C2
2C1
.. en
Q)
Q)

the single enabled output will drive the bus line

9 1011 12 13 .c
CI)
to a high or low logic level. Each output has its > CU>O
own strobe (<3'1. The output is disabled when its
ZZNU
(!) N ca
strobe is high. ~
The SN54F253 is characterized for operation
NC-No internal connection
o
over the full military temperature range of logic symbol t
- 55 °e to 125°e. The SN74F253 is
characterized for operation from ooe to 70 oe.

FUNCTION TABLE B

SELECT
DATA INPUTS STROBE OUTPUT 1G
INPUTS
B A CO C1 C2 C3 a v leo 17)
1Cl 1Y
x x x x x X H Z
lC2
L L L X X X L L
lC3
L L H X X X L H 2!l'
L H X L X X L L 2CO
(9)
L H X H X X L H 2Cl 11 2Y
H L X X L X L L 2C2 (12)
2C3 13)
H L X X H X L H
H H X X X L L L
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
H H X X X H L H
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
Address inputs A and B are common to both sections.

UNLESS OTHERWISE NOTED this document contains Copyright © 1987, Texas Instruments Incorporated
PRODUCTION DATA Informetlon c.rrent es of
publication dati. Products conform to specifications
par the terms of Tax88 Instruments standard
TEXAS . " 2-151
::~~:tt!ti~~U~Jo:,r:=~Ls~ not naeasurily INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F253, SN74F253
DUAL 1·0F·4 DATA SELECTORS/MULTIPLEXERS
WITH 3·STATE OUTPUTS

logic diagram (positive logic)

lCO ..;1,;:.6:..)- - - - - - - - t - t - - t

lCl JI~5~)_ _ _ _ _ _ _ _f=+=~=t_)

OUTPUT
lY
DATA 1
1 C2 ..;1::;4:..)------If-t-t-t--t._/

lC3-1~3~)-----~~f=~$:~==~

SELECT
C
...
I»
I»
A

t/) 110)
2CO
::s-
CD
...
CD
til 2Cl
111 )

DATA 2 OUTPUT
112) 2Y
2C2

113)
2C3

115)
2G

Pin numbers shown are for D, J, and N packages.

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t ............... , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state ............. , - 0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state: SN54F253.............................. 40 mA
SN74F253 . , ..... , . . . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F253 .... , ............. , . . . . .. - 55°C to 125°C
SN74F253 ............................ ooe to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C

tThe input voltage ratings may be exceeded provided the input current ratings are observed,

2-152 TEXAS •
INSTRUMENTS
POST OFFICE BOX 655012· DALLAS, TeXAS 75266
 SN54F253, SN74F253
DUAL 1·0F·4 DATA SELECTORS/MULTIPLEXERS
WITH 3·STATE OUTPUTS

recommended operating conditions

SN54F253 SN74F253
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 <::}" 2 V

.;, ~4~ -18

Vil low-level input voltage 0.8 0.8 V
11K Input clamp current -18 mA
IOH High-level output current ::;Jv -3 -3 mA
IOl Low-level output current '11:' 20 24 mA
TA Operating free-air temperature -55 125 0 70 °c

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F253 SN74F253
PARAMETER TEST CONDITIONS UNIT
MIN TYpt MAX MIN TYpt MAX
VIK VCC = 4.5 V. II = -18 mA -1.2 -1.2 V
IOH = -1 mA 2.5 3.4 2.5 3.4
VCC = 4.5 V
VOH IOH = -3 mA 2.4 3.3 2.4 3.3 V
Any output I VCC - 4.75 V IOH - -1 mAto -3mA 2.7
IOl = 20 mA 0.30 .&~.5
VOL VCC = 4.5 V V
IOl = 24 mA
10ZH VCC - 5.5 V. Vo - 2.7 V
""x: 50
0.35 0.5
50 ~A
A
10Zl VCC = 5.5 V. Vo = 0.5 V _c~ -50 -50 ~A
II VCC = 5.5 V, VI =7V o"!:v 0.1 0.1 mA
IIH VCC - 5.5 V, VI - 2.7 V 20 20 ~
III VCC = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
105* VCC = 5.5 V, Vo =0 -60 -150 -60 -150 mA
ICCH VCC = 5.5 V,
I Condition A 11.5 16 11.5 16
ICCl. I Condition B 16 23 16 23 mA
See Note 1
ICCZ I Condition C 16 23 16 23

t All typical values are at VCC = 5 V, T A = 25°C.

* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE1: ICC is measured with the outputs open under the following conditions:
A. Inputs A, 8, 1C3, and 2C3 at 4.5 V, other inputs grounded
B. All inputs grounded
C. Inputs 1~ and 2ll' at 4.5 V. other inputs grounded.

TEXAS . " 2-153

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 76266
 SN54F253. SN14F253
DUAL 1·0F·4 DATA SELECTORSIMULTIPLEXERS
WITH 3·STATE OUTPUTS

switching characteristics (see Note 21

Vcc,,; SV. Vcc = 4.SVtoS.5V.
CL = 5OpF. CL = 5OpF.
R1 = 50012. R1 = 50012.
FROM TO
PARAMETER R2 = 5002. R2 = SOOQ. UNIT
(INPUT) IOUTPUT)
TA = 25°C TA = MIN to MAXt
'F253 SNS4F2S3 SN74F2S3
MIN TYP MAX MIN MAX MIN MAX
tpLH 3.7 8.1 11.S 2.7 _,15 3.7 13
AorS AnyV no
tpHL 2.2 6.1 9 1.7 \~" 11 2.2 10
~.
tpLH Data 2.2 5.1 7 1.7 9 2.2 8
AnyV no
tPHL
tpZH
(Any C)

~ AnyV
1.7
2.2
4.1
5.6
6
8
1.7
"
1.7(')'->
8
10
1.7
2.2
7
9
no
tpZL 2.2 5.6 8 l{8' 10 2.2 9
tpHZ 1.2 3.3 5 1.2 6.5 1.2 6
G AnyV no
tpLZ 1.2 4 6 1.2 8 1.2 7

t For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.

C
...
I»
I»
U)

if
...
CD
tit

2-154 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TEXAS 7628&
 SN54F257. SN74F257
QUADRUPLE '·OF·2 DATA SELECTORS/MULTIPLEXERS
WITH 3·STATE OUTPUTS
02932. MARCH 1987-REVISEO JANUARY 1989

• Three-State Outputs Interface Directly with SN54F257 ... J PACKAGE

System Bus SN74F257 •.. D OR N PACKAGE
(TOP VIEW)
• Provides Bus Interface from Multiple
Sources in High-Performance Systems AlB VCC
1A G
• Package Options Include Plastic "Small lB 4A
Outline" Packages. Ceramic Chip Carriers. lY 4B
and Standard Plastic and Ceramic 300-mil 2A 4Y
DIPs 2B 3A
• Dependable Texas Instruments Quality and 2Y 3B
Reliability GND 3Y

description SN54F257 ... FK PACKAGE

(TOP VIEW)
These devices are designed to multiplex signals
from four-bit data sources to four-output data <I:~ut3
lines in bus-organized systems. The 3-state ~I<I: Z >1C!1
outputs will not load the data lines when the 3 2 I 2019
output control pin (G) is at a high-logic level. 4 18 4A
1B
The SN54F257 is characterized for operation 1Y 5 17 4B
NC 6 16 NC rn
over the full military temperature range of
-55°C to 125°C. The SN74F257 is 2A
2B
7
8
15
14
4Y
3A
-;
G)
characterized for operation from OOC to 70°C.
9 10,11 1213 .c
logic symbol t
tn
>OU>Ul
NZZMM
C!1 ...
ca
ca
FUNCTION TABLE
C
AlB
INPUTS
OUTPUT OUTPUT
(2) SELECT DATA
lA i' (4) CONTROL
AlB A B
V
(3) '\1 1Y
if
lB
(5)
2A (7) H X X X Z
(61 2Y
2B L L L X L
(11)
3A (9) L L H X H
(10) 3Y
3B L H X L L
(14)
4A (12) L H X H H
(13) 4Y
4B

t This symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 617-12.
Pin numbers shown are for D. J. and N packages.

PRDDUCTID. DATA decUlllata e.llIl. I.mllltl•• Copyright © 1987, Texas Instruments Incorporated
eurmI u of ~.. dtII. Potd.... oomllD to
.lIICIfIcttlon. per the 11l1li If THI. I.ttru...nta
1'"
110•• "'rltty. Prodllll... ~oetufnl daM nat
a_.11y I....... II1II11 If In po_1IIrL
TEXAS • 2-'55
INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS. TEXAS 75286
 SN54F257, SN74F257
QUADRUPLE '-OF-2 DATA SELECTORS/MULTIPLEXERS
WITH3-STATE OUTPUTS

logic diagram (positive logic)

lA (2)
(4) lY

(3)
lB

(5)
2A (1) 2Y

(6)
2B

(11)
3A
(9) 3Y

(10)
3B

(14)
4A
(12) 4Y

(13)
48
c
...
CD
CD
en
::r
AlB

CD
...
CD
(II
Pin numbers shown are for 0, J, and N packages .

absolute maximum ratings over operating free-air temperature range (unless otherwlie noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 rnA to 5 rnA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high st~te . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state: SN54F257.............................. 40 rnA
SN74F257 ........................ , ..... 4!f(T1A
Operating free-air temperature range: SN54F257........... . . . . . . . . . . . . .. - 55°C to 125°C
SN74F257 ............................ DoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F257 SN74F257
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 O·ll V
11K Input clamp current -18 -18 rnA
IOH High-level output current -3 -3 rnA
IOL Low-level output current 20 24 rnA
TA Operating free-air temperature -55 125 0 70 ·e

2-156 TEXAS " ,

INSTRUMENTS
POST OFFICE BOX 656012 • OALLAS, TEXAS 76265
 SN54F257, SN74F257
QUADRUPLE '·OF·2 DATA SELECTORS/MULTIPLEXERS
WITH 3·STATE DUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F257 SN74F257
PARAMETER TEST CONOITIONS UNIT
MIN Typt MAX MIN TypT MAX
VIK VCC = 4.5 V. II =
-18mA -1.2 -1.2 V
IOH = -1 mA 2.5 3.4 2.5 3.4
VCC = 4.5 V
2.4 3.3
VOH IOH - -3 mA 3.3 2.4 V
Any outputl VCC = 4.75 V IOH = -1 mA to -3 mA 2.7
10L = 20 mA 0.30 0.5
VOL VCC = 4.5 V V
10L = 24 mA 0.35 0.5
10ZH VCC = 5.5 V. Vo = 2.7 V 50 50 p.A
10ZL VCC = 5.5 V. Vo = 0.5 V -50 -50 p.A
II VCC = 5.5 V. VI = 7 V 0.1 0.1 mA
IIH VCC - 5.5 V. VI - 2.7 V 20 20 ~A
IlL VCC = 5.5 V. VI = 0.5 V -0.6 -0.6 mA
105* VCC = 5.5 V. Vo =0 -60 -150 -60 -150 mA
ICCH VCC = 5.5 V.
I Condition A 9 15 9 15
ICCL I Condition B 14.5 22 14.5 22 mA

..
See Note 1
ICCZ 1 Condition C 15 23 15 23

switching characteristics (see Note 2) rn

II)
VCC - 5V. VCC - 4.5 V to 5.5 V. II)
CL - 50 pF. CL - 50 pF. .c
en
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
R1 - 500 D.
R2 - 500 D.
TA - 25°C
'F257
R1 - 500 D.
R2 - 500 D.
TA - MIN to MAXi
SN54F257 SN74F257
UNIT
..o CO
CO

M)N TYP MAX MIN MAX MIN MAX

tPLH Data 2.2 4.1 6 2.2 B 2.2 7
Any Y ns
tpHL (A or B) 1.2 3.B 5.5 1 B 1.2 6.5
tpLH 3.7 9.7 13 3.7 15.5 3.7 15
AlB Any Y ns
tpHL 2.7 6.1 B.5 2.7 10.5 2.7 9.5
tpZH 2.2 5.5 7.5 2.2 9.5 2.2 8.5
'eI Any Y ns
tPZL 2.2 5.1 7.5 2.2 10 2.2 8.5
tpHZ 1.2 3.9 6 1.2 7 1.2 7
'eI Any Y ns
tpLZ 1.2 4.1 6 1.2 9.5 1.2 7

tAli typical values are at VCC = 5 V. TA = 25°C.

*Not more than one output should be shorted at a time and the duration of tha short circuit should not exceed one second.
§For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured with tha outputs open under the following conditions:
A. AlB and all B inputs at 4.5 V. other inputs grounded.
B. All B inputs at 4.5 V. other inputs grounded.
C. 'eI and all B data inputs at 4.5 V. other inputs grounded.
2. Load circuits and waveforms are shown in Section 1.

TEXAS . " 2·157

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS, TeXAS 76265
...c
C»
C»
en
:r
CD
...
CD
(II

2-158
 SN54F258, SN74F258
QUADRUPLE 1-0F-2 DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS
02932, MARCH 1987-REVISEO JANUARY 1989

• Three-State Outputs Interface Directly with SN54F258 ... J PACKAGE

System Bus SN74F258 ... D OR N PACKAGE
(TOP VIEW)
• Provides Bus Interface from Multiple
Sources In High-Performance Systems A/B VCC
1A G
• Package Options Include Plastic "Small 1B 4A
Outline" Packages. Ceramic Chip Carriers. 1Y 4B
and Standard Plastic and Ceramic 300-mil 2A 4Y
DIPs 2B 3A
• Dependable Texas Instruments Quality and 2Y 3B
Reliability GND 3Y

description SN54F258 ... FK PACKAGE

(TOP VIEW)
These devices are designed to multiplex signals
from four-bit data sources to four-output data <~ut3
~I< z >I(!)

•
lines in bus-organized systems. The 3-state
outputs will not load the data lines when the 3 2 1 20 19
output control pin (G"j is at a high-logic level. 1B 4 18 4A
The SN54F258 is characterized for operation 1Y 5 17 4B
NC 6 16 NC II)
over the full military temperature range of
- 55 cc to 125 cC. The SN74F258 is 2A 15 4Y
3A
~
characterized for operation from 0 cC to 70 cC. 2B 8 14 Q)
9 1011 12 13 .c
logic symbol t en
>-
N
ClU
zz
(!)
>-cc
"'''' ... CO
CO
FUNCTION TABLE
C
INPUTS
OUTPUT OUTPUT
(2) SELECT DATA
lA i' (4) CONTROL Y
(3) \l 1Y X/S A B
lB lJ
(5)
2A (7) H X X X Z
6) 2Y
2B L L L X H
(11)
3A (9) L L H X L
(10) 3Y
3B L H X L H
(14)
4A (12) L H X H L
(13) 4Y
4B

t This symbol is in accordance with ANSI/IEEE SId 91-1984 and

IEC Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

PRODUCTION DATA docum••11 co.I.I. I.formalio. Copyright © 1987, Texas Instruments Incorporated
.u"a.1 .1 of publl ••llo. data. Products co.form 10
:r::~~~I~::r:"' .1~~o~:~Jo~'~:::.~i~:'J~:·:: TEXAS ~ 2-159
n••••••rlly Inol':.'.1a 1..llng of .11 p.ramalo,.. INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F258, SN74F258
QUADRUPLE 1-DF-2 DATA SELECTDRS/MULTIPLEXERS
WITH 3-STATE OUTPUTS

logic diagram (positive logic)

lA (2)
(4) 1V

(3)
lB

(5)
2A
(7) 2V

(6)
2B

(11)
3A (9) 3V

(10)
3B

(14)
4A (12) 4V

(13)
4B
c
II)
r+
II)

til AlB
::r
CD Pin numbers shown are for 0, J, and N packages.
CD
r+
til absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state: SN54F258.............................. 40 mA
SN74F258 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F258... . . . . . . . . . . . . . . . . . . . . .. - 55 DC to 125 DC
SN74F258 ............................ ODCto 70 DC
Storage temperature range ......................................... - 65 DC to 150 De

tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F25B SN74F258
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High·level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High·level output current -3 -3 mA
IOL Low-level output current 20 24 mA
TA Operating free-air temperature -55 125 0 70 ·e

2-160 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012 • DAl.I.AS, TEXAS 75285
 SN54F258. SN74F258
QUADRUPLE 1-0F-2 DATA SELECTORS/MULTIPLEXERS
WITH 3-STATE OUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F258 SN74F258
PARAMETER TEST CONDITIONS UNIT
MIN Typt MAX MIN Typt MAX
VIK VCC = 4.5 V. II - -18 mA -1.2 -1.2 V
IOH = -1 mA 2.5 3.4 2.5 3.4
VCC = 4.5 V
VOH IOH=-3rnA 2.4 3.3 2.4 3.3 V
Any outputl VCC = 4.75 V IOH = - 1 rnA to - 3 rnA 2.7
IOl = 20 mA 0.30 0.5
Val Vcc = 4.5 V V
10l = 24 mA 0.35 0.5
10ZH Vcc = 5.5 V. Va = 2.7 V 50 50 ~A
10Zl Vcc = 5.5 V. Va = 0.5 V -50 -50 ~A
II Vcc = 5.5 V. VI = 7 V 0.1 0.1 mA
IIH Vcc = 5.5 V. VI = 2.7 V 20 20 ~A

III Vcc = 5.5 V. VI - 0.5 V -0.6 -0.6 rnA

Va = a -60 -150 -60 -150 mA

•
10S* Vcc = 5.5 V.
ICCH Vcc = 5.5 V.
I Condition A 6.2 9.5 6.2 9.5
ICCl I Condition B 15.1 23 15.1 23 mA
See Note 1
ICCZ I Condition C 11.3 17 11.3 17

switching characteristics (see Note 2)

Vce - 5 V. Vee - 4.5 V to 5.5 V.
eL - 50 pF. CL - 50 pF.
Rl - 500 0. R1 - 5000.
FROM TO
PARAMETER R2 - 5000. R2 - 5000. UNIT
IINPUTI IOUTPUT!
TA - 25°C TA - MIN to MAX!
'F258 SN54F258 SN74F258
MIN TYP MAX MIN MAX MIN MAX
tpLH Data 1 3.6 5.3 1 7.5 1 6
Any Y ns
tpHL (A or BI 1 3.1 4.7 1 6 1 5.5
tpLH 3.2 6.1 8.5 3.2 12 3.2 9.5
AlB Any Y ns
tpHL 3.2 6.9 9.5 3.2 11.5 3.2 11
tpZH 2.2 5.5 7.5 2.2 11 2.2 8.5
Cl" Any Y ns
tPZL 2.2 5.1 7.5 2.2 9.5 2.2 8.5
tpHZ 1.2 3.9 6 1 7 1.2 7
Cl" Any Y ns
tplZ 1.2 4.1 6 1.2 9 1.2 7

tAli typical values are at VCC = 5 V. TA = 25°C.

*Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured with the outputs open under the following conditions:
A. All B inputs at 4.5 volts. other inputs grounded.
B. AlB and all B inputs at 4.5 V. other inputs grounded.
C. Cl" and all B inputs at 4.5 V. other inputs grounded.
2. Load circuits and waveforms are shown in Section 1.

TEXAS . . 2-161
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
c
....
C»
C»
en
::r
(1)
....en
(1)

2-162
 SNS4F280, SN74F260
DUAL S·INPUT POSITIVE· NOR GATES
03214, JANUARY 1989

• Package Options Include Ceramic Chip SN64F260 .. , J PACKAGE

Carriers and Flat Packages In Addition to SN74F260 ... D OR N PACKAGE
Plastic and Ceramic DiPs ITOPVIEWI

• Dependable Texas Instruments Quality and 1A VCC

Reliability 1B 1E
1C 10
description 2A 2E
1Y 20
These devices contain two independent 5-input 2Y 2C
positive-NOR gates. They perform the Boolean GNO 2B
function Y '" A + B + C + D + E in positive logic.
The SN54F260 is characterized for operation SN64F280 ... FK PACKAGE
over the full military temperature range of ITOPVIEWI
- 55 DC to 125 DC. The SN74F260 is
characterized for operation from ODC to 70 DC. U
m«UUw
-.-z>_
logic diagram (each gate' 3 2 1 20 19
1C 4 18 10
NC
2A
NC
5
6
7
8
9 1011 12 13
17
16
15
14
..
U)

CD
CD
.c:
logIc symbol t

1A
1B
111

121
;;'1
>oumu
NZZNN
(!I

NC-No internal connection

..
C/)
CU
CU
C
1C 1Y

1E

2B
2C 2Y
(10)
2D
1111
2E

t This svmbol is in accordance with ANSI/IEEE Std 91-1984 and ~

IEC Publication 817-12. W

~IX:
Pin numbers shown are for D. J. and N packages.

I-
CJ
::l
C
oIX:
Q.
Copyright I) 1989. Taxa. Instruments Incorporated

TEXAS ." 2-163

INSTRUMENTS
POST OFFICE eoX'656012 • DALLAS. TEXAS 75286
 SN54F260,SN74F260
DUAL 5-INPUT POSITIVE-NOR GATES

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t ........................................... :: ........ -1.2 V to 7 V
Input current .................................... '. . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F260..... . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F260 ............................ OOeto 70 0 e
Storage temperature range ......................................... - 65 °e to 1 50 0 e
t The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F260 SN74F260
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 rnA
IOH High-level output current -1 -1 rnA
c
g)
IOl
TA
Low-level output current
Operating free-air temperature -55 125
20
0
20
70
rnA
"C
r+
g)
electrical characteristics over recommended operating free-air temperature range (unless otherwise
en noted)
J
CD SN54F260 SN74F260
CD PARAMETER TEST CONDITIONS UNIT
r+ MIN TYP* MAX MIN TYP* MAX
(I)
VIK VCC - 4.5 V, II - -18 rnA -1.2 -1.2 V
VCC = 4.5 V, IOH = -1 rnA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V, IOH = -1 rnA 2.7
Val Vcc - 4.5 V, IOl - 20 rnA 0.30 0.5 0.30 0.5 V
II Vcc = 5.5 V, VI =7V 0.1 0.1 rnA
IIH Vcc = 5.5 V, VI = 2.7 V 20 20 ~A

III Vcc = 5.5 V, VI = 0.5 V -0.6 -0.6 rnA

IOS§ Vcc = 5.5 V, Va = 0 -60 -150 -60 -150 rnA
ICCH Vcc - 5.5 V, VI - 0 4.6 6.5 4.6 6.5 rnA
ICCl Vcc = 5.5 V, VI = 4.5 V 7.3 9.5 7.3 9.5 rnA

." switching characteristics (see Note 1)

::D
o VCC - 5 v,
CL - 50 pF,
vcc - 4.5 V to 5.5 V,
CL - 50 pF,
C
c: PARAMETER
FROM TO RL - 500O, RL - 500O,
UNIT
n-4 (lNPUTI (OUTPUTI TA - 25°C
'F260
TA - MIN to MAX'
SN54F260 SN74F260
MIN TYP MAX MIN MAX MIN MAX
." tplH
A,8,C,D,E y 1.7 3.6 5.5 1.2 6.5 ns
::D tpHl 1 2.1 4 1 4.5 ns
m
:S * All typical values are at VCC = 5 V, TA = 25°C.
§ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
m , For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.

:E NOTE1: Load circuits and voltage waveforms are shown in Section 1.

2-164 , TEXAS'"
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 15265
 SN54F273, SN74F273
OCTAL OoTYPE FLIP-FLOPS WITH CLEAR
02932. APRIL 1986-REVISEO JANUARY 1989

• Contains Eight D-Type Flip-Flops with SN54F273 ... J PACKAGE

Single-Rail Outputs SN74F273 ... ow OR N PACKAGE
(TOP VIEWI
• Buffered Clock and Direct Clear Inputs
CLR VCC
• Individual Data Input to Each Flip-Flop 10 80
• Applications Include: 10 80
BufferlStorage Registers 20 70
Shift Register 20 70
Pattern Generators 30 60
3D 60
• Package Options Include Plastic "Small 40 50
Outline" Peckeges, Ceramic Chip Carriers, 40 50
and Standard Plastic and Ceramic 300-mll GNO CLK
DIPs
• Dependable Texas Instruments Quality and SN54F273 ... FK PACKAGE
Reliability (TOP VIEWI

description col5tlo
~~u>co
These monolithic, positive-edge-triggered flip-
flops implement D-type flip-flop logic with a
direct clear input. 20
20
4
5
3 2 1 20 19
18
17
80
70
...
en
G)
Information at the D inputs meeting the setup G)
30 6 16 70 .c
time requirements is transferred to the Q outputs
on the positive-going edge of the clock pulse.
3D 7 15 60 en
Clock triggering occurs at a particular voltage
level and is not directly related to the transition
40 8
9 1011 12 13
14 60
...caca
time of the positive-going pulse. When the clock oc~oc C
input is at either the high or low level, the D input
q- 13 u ""n
signal has no effect at the output.
logic symbol t
The SN54F273 is characterized for operation
over the full military temperature range of
- 55°C to 125°C. The SN74F273 is ClK
characterized for operation from OOC to 70°C.
10 10
FUNCTION TABLE (EACH FLIP-FLOP) 20 20
30 30
INPUTS OUTPUT
40 40
l:m ClK 0 Q
L
H
X
t
X
H
L
H
50
60
(16)
50
60
3:
w
(17)
H
H
t
L
l
X
L
00
70
80
(181 (19)
70
80 :>w
a:
tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and
IEC Publication 617·12. n.
I-
CJ
:;)
C
oa:
n.
PRODUCT PREVIEW doc.mlnll .onllin informltlo. Copyright @ 1987, Texas Instruments Incorporated
I. p,oduell in
t~1 'ormllivl Dr doolgn ~hl.1 0'
dlv.lopml.t. Chl,••llriotl. d.tl •• ~ othlr TEXAS • 2-165
=~~::ti=:",rg':t ~~lr.:::I~r T.r.:~~:~:~:= INSTRUMENTS
praduell wilhoul .oli...
POST OFFICe BOX 6&6012 • DALLAS, TeXAS 76285
 SN54F273. SN74F273
OCTAL O·TYPE FLlP·FLOPS WITH CLEAR

logic diagram (positive logic)

10 20 30 40 50 60 70 SO
(3) (4) (7) (S) (13) (14) (17) (IS)

(19)
SQ

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
InplJt voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 6 mA
Voltage applied to any output in the high state ........................... , -0.5 V to Vee
eurrent into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
c Operating free-air temperature range: SN54F273 ......................... -55°e to 125°e
SN74F273 ............................ ooe to 70 0 e
....
£I)

£I) Storage temperature range ......................................... - 65 °e to 1 60 0 e

en tThe input voltage ratings may be exceeded provided the input current ratings are observed.
:r
CD recommended operating conditions
....CD
fI) SN54F273 SN74F273
UNIT
MIN NOM MAX MIN NOM MAX
vee Supply voltage 4.5 6 6.5 4.5 5 5.5 V
VIH High·level input voltage 2 2 V
VIL Low·level input voltage 0.8 O.S v
11K Input clamp current -18 -18 mA
IOH High-level output current -1 -1 mA
IOL Low·level output current 20 20 mA
TA Oparating free-air temparature -55 125 0 70 ·e

"tI
~
o
c
c:
(')
-t
"tI
~
m
-
<
m
~

2-166 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS, TEXAS 76286
 SN54F273, SN74F273
OCTAL O·TYPE FLlp·FLOPS WITH CLEAR

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F273 SN74F273
PARAMETER TEST CONDITIONS UNIT
MIN TVPt MAX MIN TVpT MAX
VIK VCC = 4.5 V. II = -18 mA -1.2 -1.2 V
VCC = 4.5 V. IOH--lmA 2.5 3.4 2.7 3.4
VOH V
VC~ = 4.75 V. ioH=-lmA 2.7
VOL VCC = 4.5 V. 10l = 20 mA 0.3 0.5 0.3 0.5 V
II VCC = O. VI = 7 V 0.1 0.1 mA
IIH Vce = 5.5 V. VI = 2.7 V 20 20 p.A
III Vc~ = 6.6 V. VI = 0.6 V -20 -20 mA
10S* Vee = 6.6 V. Vo = 0 -60 -150 -60 -150 mA
ICCH VCC = 6.5 V. See Note 1 65 85 65 85 mA
Icel VCC = 6.6 V. See Note 2 68 88 68 88 mA

timing requirements over recommended operating free-air temperature range (unless otherwise noted)
VCC - 6 V. VCC - 4.5 V to 5.5 V.
Cl - 50 pF. CL - 50 pF.
Rt - 500 n. RL - 500 n.
UNIT
TA - 25°C

MIN
'F273
MAX MIN
TA - MIN to MAXi
SN54F273
MAX MIN
SN74F273
MAX
...en
CD
CD
fclock Clock frequency MHz .c
tau Setup time. data high or low before CLKt 1.5 ns t/)
th Hold time. data high or low after CLKt
I ClK high
0
4
ns
...caca
tw Pulse duration I ClK low 5 ns
C
1~low 3.5
Inactive-state setup time,
tsu
~ high before ClKt1
e ns

switching characteristics (see Note 3)

Vcc - 5V. VCC - 4.5 V to 5.5 V.
CL - 50 pF. CL - 50 pF.
FROM TO RL - 500 n. RL - 500 n.
UNIT
PARAMETER (INPUTI (OUTPUTI TA - 25°C TA - MIN to MAXt
'F273 SN54F273 SN74F273
MIN TVP MAX MIN MAX MIN MAX
f max 145 MHz ~
tpLH 7.5 ns w
tpHl
tpHl
ClK

~
Any Q

Any Q
7.5
7
ns
ns
:>w
a:
t All typical values are at VCC = 5 V. TA = 2SoC.
* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
a..
§ For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions. I-
, Inactive-state setup time is also referred to as "recovery time",
NOTES: 1. ICCH is measured after applying a momentary ground. then 4.5 V. to the clock input with all data inputs at 4.5 V and the CiJi
o
::l
Input at 4.5 V.
2. ICCl Is measured with CLR and DATA at ground. o
3. Load circuits and waveforms are shown in Section 1. oa:
a..

TEXAS ." 2-167

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 76265
2-168
 SN54F280B. SN74F280B
9-BIT PARITY GENERATORS/CHECKERS
APRIL 1

• Generates Either Odd or Even Parity for SN54F2BOB ..• J PACKAGE

Nine Data Lines SN74F2BOB ••• 0 OR N PACKAGE
(TOPVIEWI
• Cascadable for n-Bits Parity
G VCC
• Package Options Include Plastic "Small H F
Outline" Packages, Ceramic Chip Carriers, NC E
and Standard Plastic and Ceramic 300-mil D
DiPs E EVEN C
E ODD B
• Dependable Texas Instruments Quality and
GND A
Reliability

description SN54F2BOB .•• FK PACKAGE

(TOPVlEWI
These universal, monolithic, nine-bit parity
U
generators/checkers feature odd and even U U
outputs to facilitate operation of either odd or :I:t?z>u.
even parity application. The word-length 3 2 1 20 19
capability is easily expanded by cascading. 18

The SN54F280B is characterized for operation NC 5 17

c;»vsr the full military temperature range of 6 16
-55 DC to 125 DC. The SN74F280B is 7 15

characterized for operation from 0 DC to 70 DG. 8 14

9 1011 1213

logic s~~bolt OOU<CID

ozz
ot?
A
181
2k t.:l ....coCO
NC-No internal connection
B
(91 C
flOI
C
(111 (51 1: FUNCTION TABLE
P (121 EVEN
E
1131 (61 1: NUMBER OF INPUTS A OUTPUTS
F
(11 000
G THRU I THAT ARE HIGH 1: EVEN 1:000
(21 0,2.4,6,8 H L
H
(41 1,3,5,7,9 L H
I

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

lEe Publication 617-12.
Pin numbers shown are for 0, J, and N packages.

PRODUCTIOI DATA d.......IItI ••ntai. iotormatio. Copyright © 1987, Texas Instruments Incorporated
'."lIIt II .f p••liollia. dll8. P..........nt.... to
spHHicotion ... tho _ 01 Ieicn Instrumllltl
standard WI,,"IIy. P..dulli.. preoauing .....ot TEXAS . " 2-169
.......rily 1..llid. tasti•• 01 .11 plnmataro. INSTRUMENTS
POST OFFiCe BOX 656012 • DALLAS, TEXAS 75265
 SN64F280B, SN74F280B
.,·BIT PARITY GENERATORSIC~ECKERS

logic diagram (positive logic)

1:
EVEN

...o
C»
C»
1:
ODD

en
J
CD
...
CD
U)

absolute maximum ratings over oparatlng free-air temparature range (unless otherwisa noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . .. . . • . . . . . . . . . . • . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t ..... ; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to IIny output in the high state. . . • . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F280B.. . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F280B ........................... ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the Input current retlngs are observed.

2·170 TEXAS ..,

INSTRUMENTS
POST OFFICE BOX e5601~ • DALLAS, TEXAS 76266
 SN54F280B, SN74F280B
9·BIT PARITY GENERATORS/CHECKERS

recommended operating conditions

SN&4F2BOB SN74F280B
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supplv voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High-level input voltage 2 2 V
VIL Low-leval input voltage O.B 0.8 V
11K Input clamp current -18 -18 mA
10H High-level output current -1 -1 mA
10L Low-level output current 20 20 rnA
TA Operating free-elr temperature -55 125 0 70 ·C

electrical characteristics over recommended operating fre.air temperature range (unless otherwise
noted)
SN&4F280B SN74F2SOB
PARAMETER TEST CONDiTIONst UNIT
MIN TYPt MAX MIN TVpT MAX
VIK Vcc = MIN, II = -18mA -1.2 -1.2 V
VCC = MIN, 10H = -1 mA 2.5 3.4 2.5 3.4
V
VOH
VCC = MAX, 10H = -1 rnA 2.7
VOL Vee = MIN, IOL = 20mA 0.30 0.5 0.30 0.& V
II
IIH
IlL
VCC
VCC
Vee
=
a
0,
= MAX,
MAX,
VI
VI
=
7 V
=
2.7 V
VI = 0.5 V
0.1
20
-20
0.1
20
-20
mA
p.A
p.A
...en
CD
CD
10S* Vec = MAX, Vo =0 -60 -150 -60 -150 mA .c
ICC VCC = MAX, VI - 0 26 35 26 35 mA en
switching characteristics (see Note 1)
...asas
Vcc - 4.6 V to B.B V,
Q
Vee - 5 V,
~ - &OpF, CL - &0 pF,
FROM TO RL - &00 0, RL - &00 n,
PARAMETER UNIT
IINPUTI IOUTPUTI TA - 25·C TA - MIN to MAXi
'F2SOB SN&4F280B SN74F2SOB
MIN TYP MAX MIN MAX MIN MAX
lpLH 3.2 6.1 9 2.7 13 2.7 10
Anv input EVEN ns
tJ>HL 3.2 6.6 10 2.7 15 2.7 11
tpLH 3.2 6.1 9 2.7 14 2.7 10
Anv input ODD ns
tpHL 3.2 8.8 10 2.7 14 2.7 11

tAil tvpical values are at VCC = 5 V, T A = 25 ·C.

* Not more than one output should be shorted at a time and the duration of the ahort circuit should not exceed one second.
§ For conditions shown aa MIN or MAX, use tha appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load clrculte and waveforms are shown In Section 1.

TEXAS ~ 2-171
INSTRUMENTS
POST OFFICE BOX 866012 • OALl.AS. TEXAS 76286
C
I»
r+
I»
t/)
::r
CD
CD
r+
(I)

2-172
 SN54F283, SN74F283
4·BIT BINARY FULL ADDERS WITH FAST CARRY
02932. MARCH 1987-REVISEO JANUARY 1989

• Full·Carry Look·Ahead Across the Four Bits SN54F283 .•. J PACKAGE

SN74F283 •.• 0 OR N PACKAGE
• Systems Achieve Partial Look·Ahead (TOP VIEW)
Performance with the Economy of Ripple
Carry 1:2 Vee
B2 B3
• Package Options Include Plastic "Small A2 A3
Outline" Packages. Ceramic Chip Carriers, E1 1:3
and Standard Plastic and Ceramic 300-mil A1 A4
DIPs B1 B4
• Dependable Texas Instruments Quality and eo 1:4
Reliability e4

description SN54F283 ... FK PACKAGE

(TOP VIEW)
The SN54F283 and SN74F283 are full adders
that perform the addition of two 4-bit binary U
N N U UM
words. The sum (E) outputs are provided for IXl~Z>1Xl

each bit and the resultant carry (C4) is obtained 3 2 1 20 19

from the fourth bit. 18

These adders feature full internal look-ahead 1:1 5 17

6 16
across all four bits generating the carry term C4
in typically 5.7 nanoseconds. This capability 7 15

provides the system designer with partial look- 8 14

ahead performance at the economy and reduced 9 1011 1213

package count of a ripple-carry implementation.
The adder logic, including the carry, is
implemented in its true form. End-around carry NC - No internal connection
can be accomplished without the need for logic
or level inversion. logic symbol t
The 'F283 can be used with either all-active-high
(5) l:
(positive logic) or all-active-Iow (negative logic) Al
operands.
The SN54F283 is characterized for operation
over the full military temperature range of
A2
A3
A4
(3)
(14)
(12)
(6)
]- { (4)
(1)
(13)
(10)
l:1
l:2
l:3

}
-55°C to 125°C. The SN74F283 is Bl l:4
2)
characterized for operation from - 40°C to B2
(15)
85°C. B3
(11) (9)
B4 CO C4
(7)
CO CI

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.

PRODUCTION DATA d••ulllnII ••ntal" infalRlatl.n Copyright © 1987, Texas Instruments Incorporated
ourrant H of p.bll..llin doll. P"d......nlarm t •
• 0111••11••• ,.. the ta,mo of TIXI. InlllUmlnll
TEXAS . " 2-173
:'=~~I~·I:I:i =:~I:r 1Ir:::~£:.u nat INSTRUMENTS
POST OFFfCE BOX 655012 • DALLAS. TEXAS 75266
 SN54F283. SN74F283
4·BIT BINARY FULL ADDERS WITH FAST CARRY

L L L H L L
H L L H H L
L H H L L H L
H H L L H H H L
L H H H H L
H L H H H L L H
H H L H H L L H
H H H L L L H H H
L L H L H L H H
H L H H H L H
L H L H H H L L L H
H H H H H H
L L H H H H L H
C H L H H H H L H H

....
I»
I» H
H
H
H
H
H
H
H
L H
L H
H
L
H
H
·H
H
H

en
::r H = high leveC L = low level
NOTE: Input conditions at AI, Bl, A2, 62, and CO are used to determine outputs
CD 1:1 and 1:2 and the value of the internal carry C2. The values at C2, A3,
....
CD
(I)
63, A4, and 64 are then used to determine outputs E3, E4, and C4 .

2-174 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS. TeXAS 76265
 SN54F283, SN74F283
4·BIT BINARY FULL ADDERS WITH FAST CARRY

logic diagram (positive logic)

(9) C4

B4 (11)

A4 (12)

B3 (15)

A3 (14) ...
fI)

CD
CD
.c
CI)

S
c'"

B1 (6)

(4) £1

CO -",(7..:.)- - - I :>c>------'

Pin number. shown are for D, J, and N package•.

absolute maximum ratings over operating free·alr temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current " . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to an\o' output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state .................. " . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free·air temperature range: SN54F283. . . . . . . . . . . . . . . . . . . . . . . .. - 55 De to 125 De
SN74F283 ............................ oDe to 70 De
Storage temperature range ......................................... - 65 De to 1 50 De
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

TEXAS . " 2·175

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS "75266
 SN54F283, SN74F283
4·BIT BINARY FULL ADDERS WITH FAST CARRY

recommended operating conditions

SN54F283 SN74F283
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 6 5.5 4.5 6 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current 18 18 mA
10H High-level output current 1 -1 mA
10L Low-level output current 20 20 mA
TA Operating free-air temperature -66 126. 0 70 ·e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F283 SN74F283
PARAMETER TEST CONDITIONS
MIN TYpt MAX MIN TypT MAX
VIK Vee = 4.6 V, 11K - -18 mA -1.2 -1.2 V
\ICC = 4.6 V, 10H = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, IOH=-lmA 2.7
VOL Vee - 4.5 V, 10L = 20 mA 0.30 0.5 0.30 0.6 V
II Vee = 5.5 V, VI = 7 V 0.1 0.1 mA

...C
II
II
IIH

IlL
I
I
AnyAorB
co
Vee = 6.6 V,

Vee = 6.6 V,
VI = 2.7 V

VI = 0.5 V
20
-1.2
-0.6
20
-1.2
-0.6
~A

mA

en
::r
10S* Vee = 5.5 V,
Vee = 5.5 V,
Vo = 0
VI = 4.5 V
-60
36
-160
55
-60
36
-160
55
mA
mA
Icc
G
G
Cit switching characteristics (see Note 1)
Vce=5V, Vcc - 4.6 V to 6.6 V,
CL = 50 pF, CL - 50 pF,
FROM TO RL=500Q, RL - 500O,
PARAMETER UNIT
(INPUT! (OUTPUT) TA = 25·C TA - MIN to MAXi
'F283 SN54F283 SN74F283
MIN TYP MAX MIN MAX MIN MAX
tpLH 2.7 6.6 9.5 2.7 14 2.7 10.5
eo Ii ns
tpHL 3.2 6.6 9.5 3.2 14 3.2 10.5
tpLH 3.2 6.6 9.5 3.2 14 3.2 10.5
AiorBi Ii ns
tpHL 2.7 6.6 9.5 2.7 14 2.7 10.5
tpLH 2.7 5.3 7.5 2.7 10.5 2.7 8.5
eo e4 ns
tpHL 2.2 5 7 2.2 10 2.2 8
tpLH 2.7 5.3 7.5 2.7 10.5 2.7 8.5
AiorBi e4 ns
tpHL 2.2 4.9 7 2.2 10 2.2 8
t All typical values ara at Vee = 5 V, TA = 25·e.
* Not more than one output should be shorted at a time, and the duration of the short circuit should not excaed one second.
§ For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions;
NOTE 1: See General Information for load circuits and waveforms .

2-176
. TEXAS.
INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS, TeXAS 75266
 SN54F286, SN74F286
9·BIT PARITY GENERATORS/CHECKERS
WITH BUS DRIVER PARITY 1/0 PORT
02932. MARCH 1987-REVISEO JANUARY 1989

• Generates Either Odd or Even Parity for SN54F286 ... J PACKAGE

SN74F286 ... D OR N PACKAGE
Nine Data Lines
(TOP VIEW)
• Cascadable for n-Bits Parity G Vee
• Package Options Include Plastic "Small H F
Outline" Packages, Ceramic Chip Carriers, XMIT E
and Standl!rd Plastic and Ceramic 300-mil 0
DIPs PARITY ERROR e
PARITY I/O B
• Dependable Texas Instruments Quality and GND A
ReliabiliW

description SN54F286 ..• FK PACKAGE

(TOP VIEW)
The SN54F286 and SN74F286 universal nine- U
bit parity generators/checkers feature a local u u
::C(!)Z>u..
output for parity checking and a bus-driving
3 2 1 20 19
parity I/O port for parity generation/checking.
18
The word-length capability is easily expanded by
NC 5 17
cascading.
6 16
TheXMIT control input is implemented
specifically to accommodate cascading. When
XMIT is low, the parity tree is disabled and the
NC
PARITY ERROR
7
8
9 1011 1213
15
14 ...
II)
Q)
Q)
Parity Errpr output will remain at a high logic level
regardless of the input levels. When XMIT is
.c
U)
high; the parity tree is enabled. Th~ Parity Error
output will indicate a parity error when either an
even number of inputs (A through I) are high and
...caca
Parity I/O is forced to a low logic level, or when C
NC - No internal connection
an odd number of inputs are high and Parity I/O
is forced to a high logic level.
The I/O control circuitry was designed so that the I/O port will remain in the high-impedance state during
power-up or power-down to prevent bus glitches.
The SN54F286 is characterized for operation over the full military range of - 55 DC to 125 DC. The
SN74F286 is characterized for operation from ODe to 70 De.

FUNCTION TA8LE

NUM8ER OF INPUTS
PARITY PARITY
{A THRU II THAT XMIT
ARE HIGH
0,2,4,6,8 I
I/O

H
ERROR

H
3:
w
1,3,5.7.9

0,2.4,6.8
h
I L
h
H
H :>w
h
h
I
h
L
L
a:
1,3,5,7.9 D.
h I H
I-
h - high input level I - low input level (.)
H - high output level L - low output level
::J
C
oa:
D.
PRODUCT PREVIEW do.uments .ontsln Information Copyright © 1987, Texas Instruments Incorporated
on produ... in thl formativI or ....ign ~hl•• of
dlviJlopmlnt. Chl ...torl.tl. dlt. .n~ othor TEXAS •
=::~::'r~':t ~1::lr':/~r T.:::~~::~::: INSTRUMENTS
praduct8 without notice. 2-177
POST'OFFICE BOX 665012 • DALLAS. TEXAS 75265
 SN54F286, SN74F286
9-BIT PARITY GENERATORS/CHECKERS
WITH BUS DRIVER' PARITY I/O PORT

logic symbol t logic diagram (positive ~ogic)

(8) 2k
A
:(9)
B
(10)
c
(II)
D
(12)

(13)

(1)
G
(2)
H
(4)

(31
XMiT EN1

t This symbol is in accordance with ANSI/IEEE Std 91-1984 and

lEe Publication 617·12,
Pin numbers shown are for D. J. and N packages,

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. VCC .. _ ...................................... ',' . . . .. -0.5 V to 7 V
Input voltage:!: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .. -1.2 V to 7 V
Input current ............... _ ... _ . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . .. - 30 mA, to 5 mA
Voltage applied to Parity 1/0 in the disabled or power-off state .......... _ .... ,-0.5 V to 5.5 V
Voltage applied to either output in the high state '" _..... _ . . . . . . . . . . . . .. .. - 0.5 V to VCC
Current into either output in the low state: SN54F286 (Parity Errorl ., _ ...... _ .... : ... , 40 mA
SN54F286 (Parity 1/01 .......... , ...... ,. . .. 96 mA
SN74F286 (Parity Errorl _ ........... : .. ".... 40 mA
SN74F286 (Parity 1/0) . . . . . . . . . . • . . . . . . . .. 128 mA
Operating free-air temperature range: SN54F286. " ......... , ...... , ..... ' -55°C to 125°C
SN74F286 ............................ OOCto700C
Storage temperature range ......................................... -65°C to 150°C

*The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F28S SN74F286
UNIT
MIN NOM MAX MIN NOM MAX
vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
"a VIH High-level input voltage 2 2 V
:IJ
o VIL
11K
Low-level input voltage
Input clamp current
0.8
-18
0.8
-18
V
rnA
C
c:
(')
10H High-level output current
Parity
Parity
Error
I/O
-1
-12
-1
-15
rnA

Parity Error 20 20
---I 10L Low-level output current
Parity I/O 48 64
rnA

"a TA Operating free-air temperature -55 125 0 70 ·e

:IJ
m
S
m
~,
2-178 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS, n:XAS 76286
 SN54F286, SN74F286
9·BIT PARITY GENERATORS/CHECKERS
WITH BUS DRIVER PARITY I/O PORT

eiectrical characteristics over recommended free·air temperature range (unless otherwise noted)

SN54F288 SN74F288
PARAMETER TEST CONDITIONS UNIT
MIN TYpt MAX MIN TYpt MAX
VIK Vcc = 4.5 V, II = -18 mA -1.2 -1.2 V
Parity Error 10H = -1 mA 2.5 3.4 2.5 3.4
10H = -3 mA 2.4 3.3 2.4 3.3
Parity 1/0
VCC = 4.5 V
VOH 10H - -12 mA 2 3.2 V
10H = -15 mA 2 3.1
Any output VCC = 4.75 V 10H = -1 mAto -3mA 2.7
Parity Error 10L - 20 mA 0.3 0.5 0.3 0.5
VOL VCC = 4.5 V 10L = 48 mA 0.38 0.55 V
Parity 1/0
10L = 84 mA 0.42 0.55
II VCC - 5.5 V, VI - 7 V 0.1 0.1 mA
Parity 1/0 70 70
IIH* VCC = 5.5 V, VI = 2.7 V p.A
Any other input 20 20
IlL; VCC = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
Parity 1/0 -100 -225 -100 -225
10S§ VCC = 5.5 V, VI = 0.5 V mA
Parity Error -80 -150 -60 -150
ICCH VCC = 5.5 V, 27 27 44 mA
ICCL
ICCZ
VCC - 5.5 V
VCC = 5.5 V
28
27
28
27
45
44
mA
mA ...U)

CD
CD
switching characteristics (see Note 1) .c
CI)

...caca
vcc - 5 V, Vcc - 4.5 V to 5.5 v,
Cl - 50 pF, Cl - 50 pF,
FROM TO Rl - 500 n, Rl - 500 n,
PARAMETER UNIT
IINPUT) (OUTPUT) TA - 25·C TA - MIN to MAX' C
'F288 SN54F286 SN74F288
MIN TYP MAX MIN MAX MIN MAX
tpLH B.3
Any A thru I Parity 1/0 ns
tPHL B.6
tpLH 10.B
Any A thru I Parity Error ns
tpHL 10
tpLH 4.9
Parity 1/0 Parity Error ns
tpHL 5
tpZH 3.8
XMIT Parity 1/0 ns
tpZL 5.8
tpHZ 3.B
XfiiIlT Parity 1/0 ns

~
tpLZ 3.3

t All typical values are at VCC = 5 V, TA = 25 ·C. W

*For 1/0 ports, parameters IIH and IlL include the off-state output current.
§Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. :;
'For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions. w
NOTE 1: Load circuits and waveforms are shown in Section 1. ex:
0..
....
CJ
:::l
C
oex:
0..

TEXAS ." 2-179

INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS, TEXAS 75286
c
C\)
r+
C\)

en
:r
CD
CD
r+
1/1

2-180
 SN54F299. SN74F299
8·BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3·STATE OUTPUTS
02932. MARCH 1987-REVISEO JANUARY 1989

• Four Modes of Operation: Hold (Store), Shift SN54F299 ... J PACKAGE

Right, Shift Left, and Load Data SN74F299 ... DW OR N PACKAGE
(TOP VIEW)
• Operates with Outputs Enabled or at High
Impedance 50 VCC
G1 51
• 3·State Outputs Drive Bus Lines Directly 5l
• Can be Cascaded for N·Bit Word Lengths G/QG Qw
E/QE H/QH
• Direct Overriding Clear C/Qc F/QF
• Applications: A/QA 7 D/Qo
Stacked or Push·Down Registers, Buffer QA' 8 B/QB
Storage, and Accumulator Registers ClR 9 ClK
GNO 5R
• Package Options Include Plastic "Small
Outline" Packages, Ceramic Chip Carriers,
SN54F299 ... FK PACKAGE
and Standard Plastic and Ceramic 300·mil
(TOP VIEW)
DIPs
U
• Dependable Texas Instruments Quality and I~ I~ g ~ en
Reliability
3 2 1 20 19
18 rn
description 5 17
16
;
These eight· bit universal registers feature 6 CD
multiplexed 1/0 ports to achieve full eight-bit data 7 15 .c
(I)
handling in a single 20-pin package. Two 8 14
function-select inputs and two output-control
inputs can be used to choose the modes of
9 10 11 12 13
III: C II: lIo! m
....asas
operetion listed in the function table. d ~ (/) d ~ o
Synchronous parallel loading is accomplished by taking both function-select lines SO and 51 high. This
places the three-state outputs in a high-impedance state and permits data that is applied on the 1/0 ports
to be clocked into the register. Reading out of the register can be accomplished while the outputs are
enabled in any mode. Clearing occurs when CLR is low. Taking either of the output controls, G1 or G2,
high disables the outputs but this has no effect on clearing, shifting, or storage of data.
The 5N54F299 is characterized for operation over the full military range of - 55°C to 125°C. The
5N74F299 is characterized for operation from OOC to 70°C.

PRODUCTIOI DATA d......... cDIIIII. Informllion Copyright © 1987, Texas Instruments Incorporated
camlll •• of ,.bllcoliOll dall. Prada... IOnfo... tD
.....IIC1tion1,.. !hi ..... of TUH InlllUlllnII TEXAS . "
Iion••rd Wlrr.lIIY. Prlductll. p'ne...l..... nil 2-181
- . I I , Incl.... l1li1•• of III ,...l1l8I.... INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS, TEXAS 75285
 SN54F299, S1I14F299
8·BIT UNIVERSAl SHIFT/STORAGE REGISTERS WITH 3·STATE OUTPUTS

FUNCTION TABLE

INPUTS I/O PORTS OUTPUTS

OUTPUT
MODE
m S1 SO CONTROL ClK Sl SR A/QA B/Os C/QC D/QD E/QE F/QF 0/00 H/QH QA' QH'
1I1t 1I2t
L X ·L L L X X X L L L L L L L L L L
Clear L L X L L X X X L L L 'l L L L L L L
L H H X X X X X X X X X X X X X L L
H L L L L X X X QAO QBO OCO ODO OEO OFO OGO OHO OAO OHO
Hold
H X X L L L X X OAO °BO OCO ODO OEO OFO OGO OHO OAO OHO
H L H L L t X H H OAn OBn °Cn ODn OEn OFn OGn H OGn
Shift Right
H L H L L t X L L OAn OBn OCn ODn OEn OFn OGn L OGn
H H L L L t H X OBn Ocn ODn OEn °Fn OGn OHn H °Bn H
Shift Left
H H L L L t L X OBn °Cn ODn <;lEn OFn OGn OHn L °8n L
Load H H H X X t X X a b c d e f g h a h

a ... h = the level of the steady-state input at Inputs A through H, respectively. These data are loaded into the flip-flops while the flip-flop
outputs are isolated from the input/output terminals.
t When one or both output controls are high the eight input/output terminals ilre disabled· to the high-impedance state; however, sequential
operetion or cleering of the register Is not affected.

o logic symbol* ,
...
m
m
en
:r
I

1171 QH'

*This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

2-182 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 85·5012 • DALLAS, TEXAS 76286
 SN54F299. SN74F299
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS

logic diagram (positive logic)

SHIFT RIGHT
~~~*j~~~~~_..!I.!!'.LI SHIFT LEFT
seRIAL INPUT

SERIAL INPUT 1111

FOUR
IDENTICAL
CHANNELS
NOT
SHOWN

elK 1121

1'7) a,..
a"-:':::_;:==l:j::;t==+j:;t:=~~~
erR
OUTPUT JiJ1
CONTROLS 1..~2-1""3)---J I/O PORTS NOT SHOWN:
14)
(6) C/De (51 E/Oe
BICa (14ID/Q~ (16) F/Q F Glo"

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
en
\)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V G)
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V .c
tn
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V as
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee ';
eurrent into any output in the low state: (OA' or OWl. . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA C
SN54F299 (OA thru OHI . . . . . . . . . . . . . . . . . . .. 40 mA
SN74F299 (OA thru OHI . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F299 ........................ , - 55 °e to 125°e
SN74F299 ............................ ooe to 70 0 e
Storage temperature range ......................................... - 65 De to 150 0 e

t The Input voltage ratings may be exceeded provided the input current ratings are observed.

TEXAS . " 2-183

INSTRUMENTS
POST OFFice BOX 855012 • DALLAS, TEXAS 75266
 SN54f299. SN74f299
8·BIT UNIVERSAL SHIfT/STORAGE REGISTERS WITH 3·STATE OUTPUTS

recommended operating conditions

SN64F299 SN74F299
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 6 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
QA' or QH' -1 -1
10H High·level output current mA
QA thru QH -3 -3
QA' or QH' 20 20
10L Low-level output current mA
QA thru QH 20 24
TA Operating free-air temperature ~55 125 0 70 ·e

electrical characteristics over recommended operating free·air temperature range (unless otherwise
noted)
SN&4F299 SN74F299
PARAMETER TEST CONDITIONS UNIT
MIN TVpT MAX MIN TVpT MAX
VIK Vee = 4.5 V, II = -18 mA -1.2 -1.2 V
QA' or QH' 10H = -1 mA 2.5 3.4 2.5 3.4
Vee = 4.5 V 10H = -1 mA 2.5 3.4 2.5 3.4
QA thru QH V
C VOH
10H = -3 mA 2.4 3.3 2.4 3.3
m
; Any output
QA' or QH'
Vee = 4.75 V 10H = -1 mA to -3 mA
10L = 20 mA 0.3 0.5
2.7
0.3 0.5
(I) VOL Vee = 4.5 V 10L = 20 mA 0.3 0.5 V
QA thru QH
:::r' 10L = 24 mA 0.35 0.5
CD A thru H VI = 5.6 V 1 1
CD
a II

IIH*
Any other
A thru H
Vee = 5.5 V

Vee = 5.5 V,
VI = 7 V

VI = 2.7 V
0.1
70
0.1
70
mA

,.A
Any other 20 20
A thru H -0.65 -0.65
IlL * SO or Sl Vee = 5.5 V, VI = 0.5 V -1.2 -1.2 mA
Any other -0.6 -0.6
10S§ Vee = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
lee Vee = 5.5 V, See Note 1 68 95 68 95 mA

t All typical values are at Vee = 5 V, TA = 25·e.

*For 1/0 ports IQA thru QHI, the parameters IIH and IlL include the off·state output current.
§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 1: lee is measured with n-1. n-2, and eLK at 4.5 V.

2-184 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 6515012 • DALLAS. TEXAS 715285
 SN54F299, SN74F299
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS

timing requirements over recommended operating free-air temperature range (see Note 21
vcc - 5 v, VCC - 4.5 V to 5.5 v,
TA - 25°C TA - MIN to MAXt
PARAMETER UNIT
'F299 SN54F299 SN74F299
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 70 0 65 0 70 MHz
Setup time SO orSl
tsu 8.5 9.5 8.5 ns
before ClKt high or low
Hold time SO or SI
th 0 0 0 ns
after ClKt high or low
A/QA thru H/QH,
Setup time
tsu SR, or Sl 5.5 6.5 5.5 ns
before ClKt
high or low
A/QA thru H/QH,
Hold time
th SR, or Sl 2 1 2 ns
after ClKt
high or low
ClK high
tw Pulse duration 7 8 7 ns
or low
tw Pulse duration CiJi low 7 8 7 ns
Inactive-state
t su * setup time
before ClKt
ali high 7 13 7 ns

switching characteristics (see Note 21

VCC - 5V, - 4.5 V to 5.5 v,
VCC
Cl - 50 pF, CL -
50 pF,
R1 - 500 II, R1 -
500 II,
FROM TO
PARAMETER R2 - 500 II, R2 -
500 II, UNIT
(INPUT) (OUTPUT)
TA - 25°C TA - MIN to MAXt
'F299 SN54F299 SN74F299
MIN TYP MAX MIN MAX MIN MAX
f max 70 100 65 70 MHz
tplH 3.2 6.6 9 2.7 10.5 3.2 10
ClK QA' or 0H' ns
tpHl 2.7 6.1 8.5 2.2 10 2.7 9.5
tplH 3.2 6.6 9 2.7 11 3.2 10
ClK QA thru QH ns
tpHl 4.2 8.1 11 3.7 12.5 4.2 12
QA' or 0H' 3.7 7.1 9.5 3.2 11.5 3.7 10.5
tPHl m QA thru QH 5.7 10.6 14 5 15.5 5.7 15
ns

tPZH 2.7 5.6 8 2.2 10.5 2.7 9

(lIar <l'2 0A thru QH ns
tpZl 3.2 6.6 10 2.7 12 3.2 11
tpHZ 1.7 4.1 6 1.7 9 1.7 7
<l'1 or <l'2 QA thru QH ns
tpLZ 1.2 3.6 5.5 1.2 7.5 1.2 6.5

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
tlnactive-state setup time is also referred to as "recovery time".
NOTE 2: load circuits and waveforms are shown in Section 1.

TEXAS . . 2-185
INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS, TEXAS 75266
2-186
 SN54F323, SN74F323
8-BIT UNIVERSAL SHIFTIStORAGE REGISTERS
WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS
02932, MARCH 1987-REVISEO JANUARY 1989

• Four Modes of Operation: Hold (Store). Shift SN54F323 •.. J PACKAGE

Right. Shift Left. and Load Data SN74F323 ... OW OR N PACKAGE
(TOPVIEWI
• Operates with Outputs Enabled or at High
Impedance so VCC
G1 S1
• 3-State Outputs Drive Bus Lines Directly
G2 Sl
• Can be Cascaded for N-Bit Word Lengths G/OG 4 OH'
E/OE H/OH
• Synchronous Clear
C/OC F/OF
• Applications: A/OA D/OD
Stacked or Push-Down Registers. Buffer °A' B/OB
Storage. and Accumulator Registers ClR 9 ClK
GND SR
• Package Options Include Plastic "Small
Outline" Packages. Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil SN54F323 ... FK PACKAGE

•
DIPs (TOP VIEWI
u
• Dependable Texas Instruments Quality and
Reliability IlH; lil ~u;
3 2 1 20 19
description
These eight-bit universal registers feature
G/OG
E/OE 5
4 18
17
...
tn
CD
C/OC 6 16 CD
multiplexed 1/0 ports to achieve full eight-bit data
A/OA 7 15
.c
handling in a single 20-pin package. Two CI)
function-select inputs and two output-control
inputs can be used to choose the modes of
OA' 8
9 1011 1213
14
...asas
operation listed in the function table. o
Synchronous parallel loading is accomplished by
taking both function-select lines 50 and 51 high.
This places the three-state outputs in a high-impedance state and permits data that is applied on the 1/0
ports to be clocked into the register. Reading out of the register can be accomplished while the outputs
are enabled in any mode. Clearing occurs synchronously when CLR is low. Taking either of the output
controls G 1 or G2 high disables the outputs but this has no effect on clearing. shifting, or storage of data.
The 5N54F323 is characterized for operation over the full military range of - 55°C to 125°C. The
5N74F323 is characterized for operation from OOC to 70°C.

UNLESS OTHERWISE 10TED this _1111111 ......i.. Copyright © 1987, Texas Instruments Incorporated
'RODUCTIOI DATA IlIallllltil•••rrant II of
per t..
pu~lleotian .1IIa. , .....l1li ..11.... 11 llIICiflootlllll
II.... If TI... 111InI.... 1II....d
=~:li.o~~r=:"~III-rily
TEXAS . "
INSTRUMENTS
2-187

POST OFFICE BOX 655012 .• DALLAS, TEXAS 76286

 SN54F323, SN74F323
a,SITUNIVERSALSHIFT/STORAGE'REGISTERS
WITH SYNCHRONOUS CLEAR AND 3·STATE OUTPUTS
FUNCTION TABLE

INPUTS 1/0 PORTS OUTPUTS

MODE
OUTPUT ..
em S1 SO CONTROL ClK Sl SR A/OA BlOB CIOC DIOD EIOE F/Of GIOG H/Oti OA' Oti'
G1 t G2 t
L X L L L i X X L L L L L L L L L L
Clear L L X L L i X X L L L L L L L L L L
L H. H X X i X X X X X X X X X X L L
H L L L L X X X OAO OBO OCO 000 aEO aFO aGO aHO aAO aHO
Hold
H X X L L L X X aAO aBO aCO aEO 'loo aFO aGO aHO aAO aHO
H L H L L i X H H QAn aBn aCn ,aOn aEn aFn aGn H aGn
Shift Right
H L H L L i X L L aAn aBn aCn aOn aEn aFn aGn L aGn
H H L L L i H X aBn aCn aOn aEn aFn aGn aHn H aBn H
Shift Left
H H L L L i L X aBn Cen aOn aEn aFn aGn aHn L aBn L
Load H H H X X i X X a b c d e f g h a h

a ... h = the level of the steady-state input at inputs A through H, respectively. These data are loaded into the flip-flops while the flip-flop
outputs are isolated from the input/output terminals.
t When one or both output controls are high the eight inputloutput terminals are disabled to the high-impedance state; however. sequential
operation or clearing of the register is not affected.

C logic symbol*
....
I»
I»
(I)
:r
CD
....
CD
U)

(8)

(17)
2.40 Ot!.

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

2-188 TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TeXAS 75265
 SN54F323, SN74F323
8·BIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH SYNCHRONOUS CLEAR AND 3·STATE OUTPUTS

logic diagram (positive logic)

CUi
191

SHIFT AIGHT
~~~~j~~~ti-J:I'!!!BI~SHIFT LEFT SERIAL INPUT

SERIAL INPUT (11)

FOUR
IDENTICAL
CHANNELS
NOT
SHOWN

elK (12)

121
OUTPUT { G l - - ' = ' - - - g
CONTROLS 02-,
:::31----'
(13) (4) (leI
BIOe G/C o H/QH

I/O PORTS NOT SHOWN:

(6) C/Oc (5) E/Qe
(1410/°0 (15) F/OF

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input -voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state .......... . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state: (QA' or QH') . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
SN54F323 (QA thru QH) . . . . . . . . . . . . . . . . . . .. 40 mA
SN74F323 (QA thru QH) . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F323. . . . . . . . . . . . . . . . . . . . . . . .. - 55 DC to 125 DC
SN74F323 ............................ ODC to 70 DC
Storage temperature range ......................................... - 65 DC to 150 DC
t The input vDltage ratings may be exceeded provided the input current ratings are observed.

TEXAS . " 2-189

INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS, TEXAS 75265
 SN54F323, SN74F323
8;81T UNIVERSAL SHIFT/STORAGE REGISTERS
WITH SYNCHRONOUS CLEAR AND 3·STATE OUTPUTS
recommended operating conditions
SN54F323 SN74F323
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.6 6 ~.6 4.6 6 5.6 V
VIH High-level input voltage 2 ,-!f:t 2 V.
Vil low-level Input voltage ~ 0.8 0.8 V
11K Input clamp current .q 18 -18 mA
QA' or QH' .( ! -1
IOH High-level output current mA
QA thru QH ~3·
d"' -;3

IOl low-level ·output current

QA' or QH' .~ 20 20
mA
QA thru QH '(, 20 24
TA Operating free-air·temperature -55 126 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
8N64F323 8N74F323
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TVpT MAX
VIK Vee = 4.6 V" II = -18mA -1.2 -1.2 V
QA' or QH' 10H=-lmA 2.6 3.4 2.7 3.4
Vee = 4.6 V IOH=-1mA 2.5 3.4 2.6 3.4
C VOH QA thru QH
10H = -3mA 2.4 3.3 2.4 3.3
V
....
I»
I»
Any output Vee = 4.76 V 10H = -1 mA to -3 mA 2.7
QA' or QH' 10l = 20 mA 0.3 0.6 0.3 0.5
en
:::r VOL
QA thru QH
Vee = 4.6 V tOl = 20 mA 0.3 0.6 V
tOl = 24 mA IJ""?'" 0.315 0.15
CD
; II
A thru H
Any other
A thru H
Vee = 6.6 V
VI ~ 6.6 V
VI = 7 V
J...
-'"
~
1
0.1
70
0.1
70
1
lilA

IIH* Vee = 6.6 V, VI = 2.7 V ~....,

Any other 20 20
A thru H ~ -0.86 -0.815
Itl * 80 or 51 Vee = 5.5 V, VI = 0.5 V ,,'l;" -1.2 -1.2 mA
Any other -0.8 -0.8
lOS· Vee = 6.6 V, Va = 0 -80 -160 -80 -160 mA
tee Vee = MAX, See Note 1 88 96 88 96 mA

t Alltyplcel values are at Vee = 6 V, TA = 25°C.

* For I/O ports (QA thru QH), the parameters IIH and III include the off-state output currant •
• No more than one output should be shorted at a time, end the duration of the short circuit should not exceed one second.
NOTE 1: ICC is measured with ~1, ~2. and elK 8t 4.6 V.

2-190 TEXAS " ,

INSTRUMENTS
POST OFFice BOX 666012 • DALLAS. TeXAS 75285
 SN54F323, SN74F323
8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS
WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS

timing requirements over recommended operating free-air temperature range (see Note 2)

vcc - 5 v, Vcc - 4.5 V to 5.5 v,

TA - 25 Q C TA - MIN to MAXt
PARAMETER UNIT
'F323 SN54F323 SN74F323
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 70 0 70 MHz
Setup time SO or S1
tsu 8.5 8.5 ns
before CLKt high or low
Hold time SO or Sl
th
after CLKt high or low
0
,<i 0 ns

Setup time
A/OA thru H/OH,
SR, or SL 5
r<:
~.q;; 5 ns
tsu
before CLKt
high or low
A/OA thru H/OH, ::;)v
(""
Hold time

q,R
th SR, or SL 2 2 ns
after CLKt
high or low

•
Setup time Wi
tsu 10 10 ns
before CLKt high or low
Hold time Wi
th 0 0 ns
8fter CLKt high or low
tw Pulse duration CLK high or low 7 7 ns
....II)en
switching characteristics (see Note 2) II)
.l:.
VCC = 5V, VCC = 4.5Vt05.5V, (/)
CL = 50pF, CL = 50pF,

FROM TO
Rl = 500Q, Rl = 500Q, ....caca
PARAMETER R2 = 500Q, R2 = 500 Q, UNIT
(INPUT) (OUTPUT)
TA = 25 Q C TA = MIN to MAXt
C
'F323 SN54F323 SN74F323
MIN TYP MAX MIN MAX MIN MAX
f max 70 100 70 MHz
tpLH 3.2 6.6 9 A' 3.2 10
CLK QA' orOH' ns
tpHL 2.7 ~,v
6.1 8.5 2.7 9.5
tpLH 3.2 6.6 9 ,,<I;:-v 3.2 10
CLK QA thru OH ns
tpHL 4.2 8.1 11 A 4.2 12
tpZH 2.7 5.6 8 ,~) 2.7 9
c:i10rc:i2 OA thruOH ns
tpZL 3.2 6.6 10 ("',v, 3.2 11
tpHZ 1.7 4.1 6 <1" 1.7 7
i:l"10ri:l"2 QA thru 0H ns
tpLZ 1.2 3.6 5.5 1.2 6.5

t For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.

TEXAS ~ 2-191
INSTRUMENTS
POST OFFICE BOX 655012. DALLAS, TEXAS 75265
2-192
 SN54F350. SN74F350
4-81T SHIFTER WITH 3-STATE OUTPUTS

02932. MARCH 1987- REVISED JANUARY 1989

• Shifts 4-Bits of Data to O. 1. 2 or 3 Places SN54F350 .•. J PACKAGE

Under Control of Two Select Lines SN74F350 ... 0 OR N PACKAGE
(TOP VIEW)
• Three-State Outputs for Bus Organized
Systems 0-3 VCC
0-2 YO
• Package Options Include Plastic "Small 0-1 Y1
Outline" Packages. Ceramic Chip Carriers. 00 DE
and Standard Plastic and Ceramic 300-mil 01 Y2
DIPs 02 Y3
• Dependable Texas Instruments Quality and 03 50
Reliability GNO 51

description SN54F350 ... FK PACKAGE

This device is operationally equivalent to a (TOP VIEW)
4-input multiplexer with the inputs connected so N M U
I I U UO
that the select code causes shifts of the data OOZ>>-
word. This makes it possible to perform shifts 3 2 1 20 19
of O. 1. 2. or 3 places on words of any length. 18 Y1
0-1 4
with suitable interconnection. 5 17 DE
A 7-bit data word is introduced at the D inputs
and is shifted according to the code applied to 01
6
7
16
15
NC
Y2
...
U)

Q)
the select inputs 50 and 51. VO through V3 are 8 14 Y3 Q)
3-state outputs controlled by an output enable. 9 1011 1213 .c
til
OE. When OE is low. the outputs follow the
selected data inputs; when OE is high. the
outputs are in a high-impedance state. This
MOU~O
OZZUlUl
t'l ...asas
feature allows shifters to be cascaded on the NC - No internal connection C
same output lines or to a common bus. The shift
function can be logical with zeroes pulled in at logic equations
either or both ends of the shifting field. vo = 5051 + 5051 0-1 + 50510-2 + 50510-3
DO
arithmetic with the sign bit repeated during a V1 = so Sf 01 + SO Sf DO + 50 51 0-1 + SO 51 0-2
shift down. or end-around with the data word
forming a continuous loop.
V2 = so Sf 02 + SO 51 01 + SO 51 DO + SO 51 0-1
V3 = 50 51 03 + SO 51 02 + 50 51 01 + SO 51 DO
FUNCTION TABLE
INPUTS OUTPUTS
OE SI so VO VI V2 V3
H X X Z Z Z Z
L L L DO 01 02 03
L L H 0-1 DO 01 02
L H L 0-2 0-1 DO 01
L H H 0-3 0-2 0-1 DO

PROOUCTIO. DATA d.......II .....I. Infanutla. Copyright © 1987, Texas Instruments Incorporated
....anl u of pabllentia. d.... Prodlell c.nfor.. to
=lIla.1 ,_Iho ..nn. of T.... 11IIIrU...1II
TEXAS . "
•..==.l;"I:r":J,; ~=:':r :.r=~~~ lat INSTRUMENTS
2-193

POST OFFICE BOX 656012 • DALLAS', T~XAS 75265

 SN54F350. S,.74F350
4-81T SHIFTER WITH 3-STATE OUTPUTS

logic symbol t logic diagram (positive logic)

DE
(13) r-.. EN
(SHIFTERI

so
SI
(10)

(9)
).
1
G~
3

""l r
MUX
10 0
11 1 (11)
V3
03
171
(6)
Z10
12
13
2
3 "
02 ZII 11 -0---
(5) 12 1 (12)
V2
01
DO
(4)
Z12

Z13
13
14
~
2
"
(31 12 0
0-1 Z14 1
13 (14)
VI
0-2

o-a
(2)
(1)
Z15
Z16
14
15
~
2
"
13 0
14 1 (15)
VO
cC»
15 2
16- -3 "
...
Dl tThis symbol is in accordance with ANSI/lEEE Std 91-1984 and

en
::r
IEC Publication 617-12.
Pin numbers shown are for D. J. and N packages.
CD
...
CD
til

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . .. -0.5 V. to 7 V
Input voltage; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to. 5 mA
Voltage applied to any output in the disabled or power-off state .... . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . .. . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state: SN54F350 ............. ·................. 40 mA
SN74F350 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F350... . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°C
SN74F350 ............................ ooe to 70°C
Storage temperature range ......................................... - 65 °e to 1 50°C
*The input voltage ratings may be exceeded provided the input current ratings are observed.

2-194 TEXAS . . ,
INsTRUMENTS
POST OFFICE BOX 866012 • DALLAS, TEXAS 75286
 SN54F350. SN74F350
4·81T SHIFTER WITH 3·STATE OUTPUTS

recommended operating conditions

SN54F350 SN74F350
UNIT
MIN NOM MAX MIN NOM MAX
Vce Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
10H High-level output current -3 -3 mA
10L Low-level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 °e

electrical characterisitcs over recommended operating free-air temperature range (unless otherwise
noted)
SN54F350 SN74F350
PARAMETER TEST CONDITIONS UNIT
MIN TVPt MAX MIN TVpT MAX
VIK Vee = 4.5 V. II = -18 mA -1.2 -1.2 V
IIOH = -1 mA 2.5 3.4 2.5 3.4
VOH Vee = 4.5 V I IOH = -3 mA 2.4 3.3 2.4 3.3 V
Any output I Vee = 4.75 V.IOH = -1 mA to -3 mA 2.7
0.30 0.5
VOL

10ZH
V

Vce
eC
= 4.5 V I 10L - 20 mA
IIOL = 24 mA
= 5.5 V. Vo = 2.7 V 50
0.35 0.5
50
V

pA
...
U)

CD
IOZL VCC - 5.5 V. Vo - 0.5 V -50 -50 p.A CD
.c
II
IIH
VCC
Vce
= 5.5 V. VI = 7 V
= 5.5 V. VI = 2.7 V
0.1
20
0.1
20
mA
p.A
en
IlL Vec = 5.5 V. VI = 0.5 V -1.2 -1.2 mA !as
10S* Vee = 5.5 V. Vo = 0 -60 -150 -60 -150 mA
IceH I Outputs high 22 35 22 35
C
IceL Vee = 5.5 V I Outputs low 27 41 27 41 mA
ICCZ I Outputs off 26 42 26 42

switching characteristics (see Note 1)

VCC - 5V. VCC - 4.5 v to 5.5 V.
CL - 50 pF. CL - 50 pF.
R1 - 500 II. R1 - 500 II.
FROM TO
PARAMETER RZ - 500 II. RZ - 500 II, UNIT
(INPUT) (OUTPUT)
TA - Z5°C TA - MIN to MAXi
'F350 SN54F350 SN74F350
MIN TVP MAX MIN MAX MIN MAX
tPLH Data 2.2 4.1 6 3 7.5 2.2 7
Any Y ns
tpHL Any 0 1.7 3.6 5.6 2.5 7 1.7 6.5
tpLH 3.2 7.4 10 4 13 3.2 11
50.51 Any Y ns
tPHL 2.2 6.1 8.5 3 10 2.2 9.5
tPZH 1.7 4.6 7 2.5 8.5 1.7 8
~ Any Y ns
tpZL 3.2 6.6 9 4 11 3.2 10
tpHZ 1.2 3.5 6.5 2 7 1.2 6.5
~ Any Y ns
tpLZ 1.2 3.6 5.6 2 8.5 1.2 6.6

t All typical values are at VCC =

5 V. TA =
26°C.
*Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§ For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1.

TEXAS ~ 2-195
INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS, TEXAS 7528&
•
...c
CI)
CI)
(J)
:::r
...en
('j)
('j)
 SN54F352, SN14F352
DUAL 4·LlNE TO 1·LlNE DATA SELECTORS/MULTIPLEXERS
02932. MARCH 1987-REVISED JANUARY 1989

• Inverting Versions of SN54F153 and SN54F352 ... J PACKAGE

SN74F153 SN74F352 ... D OR N PACKAGE
(TOP VIEW)
• Permits Multiplexing from N Lines to 1 Line
1<3 VCC
• Performs Parallel·to·Serial Conversion B 2<3
• Strobe (Enable) Line Provided for Cascading 1C3 A
(N Lines to n Lines) 1C2 2C3
1C1 2C2
• Package Options Include Plastic "Small 1CO 2C1
Outline" Packages. Ceramic Chip Carriers. 1Y 2CO
and Standard Plastic and Ceramic 300·mil GND 2Y
DIPs
• Dependable Texas Instruments Quality and SN54F352 ... FK PACKAGE
Reliability (TOP VIEW)

U
description 1Xl1~ ~ ~I~
Each of these data selectors/multiplexers 3 2 1 20 19
contains inverters and drivers to supply fully 18
complementary binary decoding data selection 5 17
to the AND-OR-invert gates. Separate strobe 6 16
inputs (0) are provided for each of the two four- 15
lCl 7
line sections. 14
8
The SN54F352 is characterized for operation 9 1011 1213
over the full military temperature range of
- 55°C to 125°C. The SN74F352 is
characterized for operation from 0 °C to 70°C.
NC-No internal connection
FUNCTION TABLE
logic symbol t
SELECT
DATA INPUTS STROBE OUTPUT
INPUTS
G y
B A CO C1 C2 C3
X X X X X X H H B
L L L X X X L H
L L H X X X L L
L H X L X X L H
la
leo
L H X H X X L L
lCl tv
H L X X L X L H
lC2
H L X X H X L L lC3
H H X X X L L H iii
H H X X X H L L 2eo
2Cl 11 2Y
Select inputs A and B are common to both sections. 2C2 (12)
2C3 (131

tThis symbol is in accordance with ANSI/lEEE Std 91-1984 and

IEC Publication 617·12.
Pin numbers shown are for D. J. and N packages.

PRODUCTION DATA do.omanll.o.llln Information Copyright © 1987, Texas Instruments Incorporated

.. rrant I. of p.bli.llio. data. Prad••11 .onfarm to
lfII",fI••don. par the IIrm. of T.... Inllroma...
:'=~i~·r.::.':.'li ~t:l:r 1I\,,:::~Zt::.' not
TEXAS . " 2-197
INSTRUMENTS
POST OFFICE BOX 655012 • DAI.LAS, TEXAS 75265
 SN54F352, SN74F352
DUAL 4·lINE TO '·LlNE DATA SELECTORS/MULTIPLEXERS

logic diagram (positive logic)

DATA 1

SELECT

2CO(101

2Cl (111

DATA 2

2C2~(1~2~1----------~i=~==~~r-~ 2V

2C3~(1~3~1------------t:1:==~~C=~

20 (151

Pin numbers shown are for D, J, and Npackages.

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current .................................................. " - 30 rnA to 5 rnA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 rnA
Operating free-air temperature range: SN54F352....... . . . . . . . . . . . . . . . . .. - 55°C to 125 °e
SN74F352 ............................ ooe to 70°C
Storage temperature range ......................................... - 65 °C to 1 50°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

2-198 . TEXAS""
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75285
 SN54F352, SN74F352
DUAL 4·LlNE TO 1·LlNE DATA SELECTORS/MULTIPLEXERS

recommended operating conditions

SN54F352 SN74F352
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH Hlgh·level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High-level output current -1 -1 mA
IOL Low-level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 ·C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F362 SN74F362
PARAMETER TEST CONDITIONS UNIT
MIN TVPT MAX MIN TVPt MAX
VIK Vee = 4.5 V, II = -18mA -1.2 -1.2 V
Vec = 4.6 V, IOH=-lmA 2.5 3.4 2.5 3.4
VOH V
VCC - 4.76 V, 10H ~ -1 mA 2.7
VOL Vee = 4.6 V, IOL = 20 mA 0.3 0.6 0.3 0.5 V
I, Vee = 6.6 V, VI = 7V 0.1 0.1 mA
IIH Vec = 6.6 V, VI = 2.7 V 20 20 p.A
IlL Vee = 6.5 V, VI = 0.5 V -0.6 -0.6 mA
10S* VCC = 6.5 V, Vo = 0 -60 -150 -60 -160 mA
leeH VCC = 6.6 V, 9.3 14 9.3 14
leel Vec = 5.5 V, 13.3 20 13.3 20
mA
...asas
switching characteristics (see Note 1) C
Vcc - 6V, VCC - 4.6 V to 5.5 V,
CL - 60 pF, CL - 50 pF,
FROM TO RL - 6000, Rl - 6000,
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 26°C TA - MIN to MAXi
'F362 SN64F362 SN74F362
MIN TVP MAX MIN MAX MIN MAX
tPLH 2.7 7.6 11 2.2 14 2.2 12.5
A or B V ns
tPHL 2.2 6.1 8.6 1.7 11 1.7 9.5
tpLH 1.7 4.1 6 1.2 6 1.2 7
G V ns
lpHL 2.2 4.6 7 1.7 9 1.7 8
tPLH Data 1.7 4.8 7 1.2 9 1.2 8
Y ns
tPHL (Any C) 1 2.1 3.5 1 5 1 4

t All typical values are at Vec = 5 V, TA = 25 ·C.

* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
iFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1.

TEXAS ." 2-199

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TeXAS 75265
2-200
 SN54f353. SN74F353
DUAL 1-0F-4 DATA SELECTORSIMULTIPLEXERS
WITH 3-STATE OUTPUTS
02932, MARCH 1987-REVISEO JANUARY 1989

• Inverting Versions of SN54F253 and SN54F353 ... J PACKAGE

SN74F253 SN74F353 . , . D OR N PACKAGE
ITOPVIEWI
• Permits Multiplexing from N Lines to 1 Line
113 VCC
• Performs Parallel-to-Serial Conversion
B 2G
• Package Options Include Plastic "Small lC3 A
Outline" Packages, Ceramic Chip Carriers, lC2 2C3
and Standard Plastic and Ceramic 300-mil lCl 2C2
DIPs .' lCO 2Cl
IV 2CO
• Dependable Texas Instruments Quality and
GND 2V
Reliability

description SN64F353 ••. FK PACKAGE

ITOPVIEWI
Each of these data selectors/multiplexers
U
contains inverters and drivers to supply full lel U Ulel
binary decoding data selection to the AND-OR- aJ-Z>N
invert gates. Separate strobe inputs (G) are 3 2 1 2019
provided for each of the t"NO four-line sections. 4 18

The three-state outputs can interface with and

5 17 2C3
drive data lines of bus-organized systems. With
6 16 NC
7 15 2C2
all but one of the common outputs disabled (at
lCO 8 14 2Cl
a high-impedance state), the low-impedance of
9 1011 1213
the single enabled output will drive the bus line
to a high or low logic level. Each output has its >-OU>-O
-ZZNU
own strobe (G). The output is disabled when its el N
strobe is high: NC - No internal connection
The SN54F353 is characterized for operation
over the full military temperature range of logic symbol t
-55°C to 125°C. The SN74F353 is
characterized for operation from OOC to 70°C.

FUNCTION TABLE B

SELECT
DATA INPUTS STROBE OUTPUT lG
INPuTS y
G lCO
B A CO Cl C2 C3
lCl IV
X X X X X X H Z
lC2
L L L X X X L H (31
lC3
L L H X X X L L 2ii
L H X L X X L H 2CO
X H X X L L 11
L H 2Cl 2V
H L X X L X L H 2C2 1121
2C3 (131
H L X X H X L L
H H X X X L L H
tThis symbol is in accordance with ANSI/IEEE. Std 91-1984 and
H H X X X H L L
lEe Publication 617-12.
Pin numbers shown are for D, J, and N packages.
Select inputs A and B are common to both sections.

UILESS OTHERWlSi IOTED thll dIcI_ call1ll.o Copyright © 1987, Texas Instruments Incorporated
PRODUCTIOI DATA InIor.ltIa. IUIf1IIII II of
, ••Iiclltlal Ute. PnitlIIII -m. to .....iIIaIIo••
par !hi _ of Teu. lnatn_ lIII.d.nI TEXAS . . 2-201
WI!'I.IdY. PnitlucIIu ........ _ n t _ l i l y INSTRUMENTS
Incl.'" l1l1I.. II .11,....._
POST OFFiCE BOX 656012 • DALLAS, TEXAS 16286
 SN54F353, SN74F353
DUAL 1·0F·4 DATA SELECTORS/MULTIPLEXERS
WITH 3·STATEOUTPUTS

logic diagram (pos~tive l~glc)

DATA 1

SELECT

2CO,(101

2C1~(1~1~1____~____-4~~~ __~~
DATA 2 OUTPUT
2C2 (121 2Y

2C3~(1~3~1-----------i=1t:====~~

2lJ (1&1

Pin numbers shown are for D, J, and N package •.

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, Vce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current ..•............................................... " - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state .......... . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state: SN54F353.............................. 40 mA
SN74F353 .............................. 48mA
Operating free-air temperature range: SN54F353...... . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F353 ............................ ooe to 70 DC
Storage temperature range .......... "............................. - 65 De to 150 De
tThe input voltaga ratings may be exceeded provided the input current ratings are observed.

2·202 TEXAS •
INSTRUMENTS
POST OFFICE BOX 655012 • DAI.LAS, TEXAS 75286
 SN54F353. SN74F353
DUAL 1·0F·4 DATA SELECTORS/MULTIPLEXERS
WITH 3·STATE OUTPUTS
recommended operating conditions
SN64F363 SN74F363
UNIT
MIN NOM MAX MIN NOM MAX
VCC SupplV voltage 4.5 5 6.5 4.5 5 5.5 V
~.
V,H High-level input voltage 2 2 V
V,l Low-level input voltage ~~. 0.8 0.8 V
11K Input clamp current "- -18 -18 mA
IOH High-level output current _0"'" -3 -3 mA
IOl Low-level output current -~q;. 20 20 mA
TA Operating free-air temperature -56 125 0 70 ·C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F363 SN74F363
PARAMETER TEST CONDITIONSt UNIT
MIN TVP* MAX MIN TVP* MAX
V,K VCC - 4.5 V. 'I = -18mA -1.2 -1.2 V
[IOH=-lmA 2.5 3.4 2.6 3.4
VCC = 4.5 V
VOH IIOH = -3mA 2.4 3.3 2.4 3.3 V
Vce = 4.75 V. IOH = -1 mAto -3mA 2.7
JIOl = 20mA 0.30 0.5
VOL VCC = 4.5 V V
II0l = 24mA .I. 0.35 0.5
10lH VCC = 5.5 V. Vo = 2.7 V ~. 50 50 ,.A
lOll Vce = 6.6 V. Vo = 0.5 V R-v -50 -50 p.A
II VCC = 5.5 V. VI = 7V c-;.. 0.1 0.1 mA
IIH VCC = 5.6 V. V, = 2.7 V S::r 20 20 ,.A
III Vce - 6.6 V. V, = 0.5 V <I~. -0.6 -0.6 mA
lOS' VCC = 6.6 V. Vo = 0 -60 -160 -60 -160 mA
ICCH (see Note 11 Vce = 6.5 V. Condition A 9.3 14 9.3 14
ICCl VCC = 6.6 V. Condition 8 13.3 20 13.3 20 mA
ICCl VCC = 6.6 V. Condition C 16 23 15 23

t For conditions shown as MIN or 5.6 V. use the appropriate value specified under Recommended Operating Conditions.
*'Not
All typical values are at VCC = 5 V. TA = 25·C.
more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: ICC is measured with the outputs open under the following conditions:
A. All inputs grounded.
8. Output control grounded. othar inputs at 4.5 V.
C. Output control at 4.6 V. other inputs grounded.

TEXAS ." 2-203

INSTRUMENlS
POST OFFICE BOX 666012 • DALLAS, TEXAS 7&266
 SN54F353, SN74F353
DUAL 1·0F·4 DATA SELECTORS/MULTIPLEXERS
WITH 3·STATE OUTPUTS

switching characteristics (see Note 2)

Vcc - 5 V, Vcc - 4,5 V to 5.5 V,
CL - 50 pF, CL - 50 pF,
R1 - 500 n, R1 - 500 n,
FROM TO
PARAMETER R2 - 500 n, R2 - 500 n, UNIT
(INPUT) (OUTPUT)
TA - 25°C TA - MIN to MAXt ,
'F353 SN54F353 SN74F353
MIN TYP MAX MIN MAX MIN MAX
tpLH
A or B Any Y
2.7 7.6 11 2.2 5: 14 2.2 12.5
ns
tpHL 2.2 6.1 8.5 1.7 ~ 11 1.7 9.5
tpLH Data 1.7 4.8 7 1.2 I.!.i 9 1.2 8
Any Y ns
tpHL (Any C) 1 2.1 3.5 1 Q;" 5 1 4
tpZH
G AnyY
2.2 5.1 8 2.2 1": 10.5 2.2 9
ns
tp~L 2.7 5.6 8 2.2 :::5 10.5 2.2 9
tpLZ
G Any Y
1.2 3.3 5 1.2 t¥ 7 1 6
ns
tpHZ 1.2 4 6 lJ1:' 8 1 7

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.

2·204 TEXAS . "

JNSTRU~ENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 76265
 SN54F373, SN74F373
OCTAL D·TYPE TRANSPARENT LATCHES
WITH 3·STATE OUTPUTS
02932, MARCH 19S7 - REVISED JANUARY 1989

• 8 Latches in a Single Package SN54F373 ... J PACKAGE

SN74F373 ... OW OR N PACKAGE
• 3-State Bus-Driving True Outputs (TOP VIEW)

• Full Parallel Access for Loading oc Vee

10 80
• Buffered Control Inputs
1D 8D
• Package Options Include Plastic "Small 2D 7D
Outline" Packages, Ceramic Chip Carriers, 20 70
and Standard Plastic and Ceramic 300-mil 60
DIPs 3D 60
40 50
• Dependable Texas Instruments Quality and
40 50
Reliability
GNO e
description
SN54F373 ... FK PACKAGE
These B-bit latches feature three-state outputs (TOP VIEW)
designed specifically for driving highly capacitive u
or relatively low-impedance loads. They are ealu ua
_ _ 0>(1)
particularly suitable for implementing buffer

..
3 2 1 2019
registers, 1/0 ports, bidirectional bus drivers, and
working registers. 2[, 4 18 80
2Q 5 17 70
en
The eight latches of the 'F373 are transparent 3Q 6 16 7Q G)
G)
D-type latches. While the enable (C) is high the
Q outputs will follow the data (D) inputs. When
3D 7 15 6Q .c
the enable is taken low, the Q outputs will be
latched at the levels that were set up at the 0
inputs,
40 8
9 1011 1213

..,..,
aeuae
od'Z
CI
14 60 U)

C
..
ca
ca
A buffered output-control input (OC) can be used
to place the eight outputs in either a normal logic FUNCTION TABLE (EACH LATCH)
state (high or low logic levels) or a high-
INPUTS OUTPUT
impedance state. In the high-impedance state
the outputs neither load nor drive the bus lines im= ENABLE C 0 Q

significantly. The high-impedance third state and L H H H

increased drive provide the capability to drive the L H L L

bus lines in a bus-organized system without need L L X Qo
for interface or pull-up components. H X X Z

The output control OC does not affect the

internal operations of the latches. Old data can
be retained or new data can be entered while the
outputs are off.
The SN54F373 is characterized for operation
over the full military temperature range of
-55°C to 125°C. The SN74F373 is
characterized for operation from OOC to 70°C,

PRODUCTION DATA doc.meou HAIII. Inta....tl•• Copyright @ 1987, Texas Instruments Incorporated
••" ..te••, d.n
pHlI..
.....HI.III••• pit tb. _
P,.... .''''.rm
dlle. cto to
of Tun 1••tr.....11
TEXAS • 2-205
=~ii;";'::I:r,; ~=~I:r IIr;.":'':lt:.- not INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS·, TEXAS 75265
 SN54F373, SN74F373
OCTAL D·TYPE TRANSPARENT LATCHES
WITH 3·STATE OUTPUTS

logic symbol t logic diagram .. (positive logic)

10
20
30
40
50
6Q 20..:1::4)_ _~
70
t191 6Q

tThis symbol is In accordance with ANSI/IEEE Std 91·1984 and

30 (7)
lEe Publication 617·12.

50 (13 )
C
...mm
60 (14)
tJ)
::r
...=
(II
7D (17)

SD (IS)

2-206
. . . TEXAS'"
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 76266
 SN54F313, SN14F313
OCTAL O·TYPE TRANSPARENT LATCHES
WITH 3·STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state: SN54F373 .............................. 40 mA
SN74F373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F373. . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F373 ............................ ooC to 70°C
Storage temperature range ......................................... - 65°C to 150 DC

tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN&4F373 SN74F373
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltaga 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
rn
11K
IOH
Input clamp current
High-level output current
-18
-3
-18
-3
mA
mA
;
CD
IOL Low-level output current 20 24 mA .c
TA Oparating free-air temperature -55 125 0 70 °e CI)

electrical characteristics over recommended operating free-air temperature range (unless otherwise ....caca
noted) C
SN54F373 SN74F373
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
VIK Vee = 4.5 V. II = -18 mA -1.2 -1.2 V
IOH=-1mA 2.5 3.4 2.7 3.4
Vee = 4.5 V
VOH IOH = -3 mA 2.4 3.3 2.4 3.3 V
Any output I Vee = 4.75 V IOH = -1mA to -3 mA 2.7
IOL = 20 mA 0.3 0.5
VOL Vee = 4.5 V V
IOL = 24 mA 0.35 0.5
IOZH Vee = 5.5 V. Vo = 2.7V 50 50 pA
IOZL Vee = 5.5 V. Vo = 0.5 V -50 -50 ~A
II Vee = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH Vee = 5.5 V. VI = 2.7 V 20 20 pA
IlL Vee = 6.5 V. VI = 0.5 V -0.6 -0.6 mA
IOsi Vee = 5.6 V, Vo = 0 -60 -150 -60 -150 mA
leez Vee = 6.5 V. See Note 1 38 55 38 55 mA

*AII typical values are at Vee = 5 V. TA = 25°e.

iNot more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: lecz is measured with ffi: at 4.5 V and all other inputs grounded.

TEXAS . " 2-207

INSTRUMENTS
POST OFFICE BOX 856012 • DALLAS, TEXAS 76285
 SN54F373, SN74F373
OCTAL O·TYPE TRANSPARENT LATCHES
WITH 3;STATE OUTPUTS

timing requirements
Vcc - 5 V, Vcc =
4.5Vto5.5V,
TA - 25°C TA - MIN to MAXt
UNIT
'F373 SN54F373 SN74F373
MIN MAX MIN MAX MIN MAX
tsu Setup time, Data before Enable Cl 2 2 2 ns
.,
th Hold time, Data before Enable Cl 3 3 3 ns
tw Pulse duration, Enable C high 6 6 6 ns

switching characteristics (see Note 2)

Vcc = 5V, VCC = 4.5Vto5.5V,
CL = 50 pF, CL = 50pF,
R1 = 500Q, R1 = 500Q,
FROM TO
PARAMETER R2=500Q, R2=500Q, UNIT
(lNPUTI (OUTPUTI
TA = 25°C TA = MIN toMAXt
'F373 SN54F373 SN74F373
MIN TYP MAX ·MIN MAX MIN MAX
tpLH 2.2 4.9 7 2.2 8.5 2.2 8
0 Q ns
tpHL 1.2 3.3 5 1.2 7 1.2 6
tPLH 4.2 8.6 11.5 4.2 15 4.2 13
C Q ns
tpHL 2.2 4.8 7 2.2 8.5 2.2 8
tpZH 1.2 4.6 11 1.2 13.5 1.2 12
OC Q ns
tpZL 1.2 5.2 7.5 1.2 10 1.2 8.5
tpHZ 1.2 4.1 6.5 1.2 10 1.2 7.5
OC Q ns
tPLZ 1.2 3.4 6 1.2 7 1.2 6

tFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.

2·208 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012 • CALLAS, TeXAS 75265
 SN54F374, SN74F374
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
02932. MARCH 1987-REVISEO JANUARY 1989

SN54F374 ... J PACKAGE

• B D-Type Flip-Flops in a Single Package
SN74F374 ... ow OR N PACKAGE
• 3-State Bus-Driving True Outputs (TOP VIEW)

• Full Parallel Access for Loading Vee

• Buffered Control Inputs
10 80
10 80
• Package Options Include Plastic "Small 20 70
Outline" Packages, Ceramic Chip Carriers, 20 70
and Standard Plastic and Ceramic 300-mil 30 60
DIPs 30 60
• Dependable Texas Instruments Quality 40 50
and Reliability 40 50
GNO elK
description
SN54F374 ... FK PACKAGE
These B-bit flip-flops feature three-state outputs (TOP VIEW)
designed specifically for driving highly capacitive U
or relatively low-impedance loads. They are o diU Ud
~~o>CX)
particularly suitable for implementing buffer
3 2 1 2019
registers. I/O ports. bidirectional bus drivers, and
working registers. 4 18
5 17
The eight flip-flops of the 'F374 are edge- 6 16
triggered D-type flip-flops. On the positive 7 15
transition of the clock, the Q outputs will be set 8 14
to the logic levels that were set up at the D
inputs.
9 10 II 1213

dO><:dO
<t ~ ,<"lld
...
('II
('II
A buffered output-control input (DC) can be used Q
to place the eight outputs in either a normal logic
state (high or low logic levels) or a high- FUNCTION TABLE (EACH FLIP-FLOP)
impedance state. In the high-impedance state
INPUTS OUTPUT
the outputs neither load nor drive the bus lines
significantly. The high-impedance third state and OC ClK 0 a
increased drive provide the capability to drive the l t H H

bus lines in a bus-organized system without need

l t l l
l l X 00
for interface or pull-up components.
H X X Z
The output control does not affect the internal
operations of the flip-flops. Old data can be
retained or new data can be entered while the
outputs are in the high~impedance state.
The SN54F374 is characterized for operation
over the full military temperature range of
- 55°C to 125°C. The SN74F374 is
characterized for operation from OOC to 70°C.

PRODUCTION DATA ......_ collli. inf••mltio.

c.mal I. 01 publicatio. dlle. Prod.eII co.lo.m to
Copyright © 1987, Texas Instruments Incorporated

....ificoti••• p. tha tor.. of Tn.. Inotru ..IDII

::=i~"i:I':.7i =:':t" 1I=~":t!~.ot TEXAS •
INSTRUMENTS
2-209

POST OFFICE BOX 655012 • DALLAS, TEXAS 75265

 SN54f374, SN74f374
OCTAL D·TYPE EDGE·TRIGGERED fLlp·fLOPS WITH 3·STATE OUTPUTS

logic symbol t

10 (31 (21 10
2D (41 (61 20
C7I (81 30
(91 40
(121 50
(151 50
(181 70
(191 80

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

logic diagram (positive logic)

...C
I»
I»
en
:r
...o
CD
CD --+-i
20.:...(4.:...1

30 (_7_1- - t - f

--+-i
40.:.;;(8.:...1

(131
60 '--'---t-t

70(17)

2-210 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 856012 • DALLAS, TEXAS 75285
 SN54F374, SN74F374
OCTAL D·TYPE EDGE·TRIGGERED FLlp·FLOPS WITH 3·STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state ........................... , -0.5 V to Vee
eurrent into any output in the low state: SN54F374 .............................. 40 mA
SN74F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F374. . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F374 ............................ OOCto 70 0 e
Storage temperature range ......................................... - 65 °e to 150°C

tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F374 SN74F374
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil low-level input voltage 0.8 0.8 V
11K Input clamp current 18 18 mA
IOH High-level output current 3 3 mA
IOl low-level output current 20 24 mA
TA Operating freeRsir temperature -55 125 0 70 De

electrical characteristics over recommended operating free·air temperature range (unless otherwise
noted)
SN64F374 SN74F374
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TVP' MAX
VIK Vee = 4.S V. II = -18mA -1.2 -1.2 V
IOH=-lmA 2.5 3.4 2.S 3.4
Vee = 4.5 V
VOH IOH = -3 mA 2.4 3.3 2.4 3.3 V
Any output I Vee - 4.75 V 10H = -1 mAto -3mA 2.7
10l = 20 mA 0.3 0.5
VOL Vee = 4.5 V V
10l = 24 mA 0.35 0.5
10ZH Vee - 5.S V. VO- 2.7 V SO 50 ,.A-
10ZL Vce = 5.5 V. Vo = 0.5 V -50 -50 ~A
II Vee = 5.S V. VI = 7 V 0.1 0.1 mA
IIH Vee = 5.S V. VI = 2.7 V 20 20 ,.A-
III Vee = 5.5 V. VI = 0.5 V -0.8 -0.6 mA
lOS· Vee = S.5 V. Vo = 0 -60 -150 -60 -150 mA
leez Vee = S.5 V. See Note 1 55 '36 55 86 mA

* All typical values are at Vee = 5 V. TA = 2s·e .

• Not more than one output should be shorted at a time. and the duration of the short circuit should not exceed one second.
NOTE 1: lee is measured with ~ at 4.5 V and the data inputs grounded.

TEXAS . " 2-211

INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TEXAS 75286
 SN54F374, SN74F374
OCTAL D·TYPE EDGE·TRIGGERED FLlp·FLOPS WITH3·STATE OUTPUTS

timing requirements
Vee - 5 V, Vee =
4.5Vt05.5V,
TA - 25°e TA - MIN to MAXt
PARAMETER UNIT
'F374 SN54F374 SN74F374
MIN MAX MIN MAX MIN MAX
fclock Clock frequency a 100 a 60 a 70 MHz
Data high 2 2.5 2
tsu Setup time before ClKt ns
Data low 2 2 2
Data high 2 2 2
th Hold time after ClK! ns
Data low 2 2.5 2
ClK high 7 7 7
tw Pulse duration ns
ClK low 6 6 6

switching characteristics (see Note 2)

Vee = 5V, vee = 4.5 Vto 5.5 V,
el=50pF, eL = 50pF,
Rl = 5002, Rl = 50012,
FROM TO
PARAMETER R2 = 50012, R2 = 5002, UNIT
(INPUT) (OUTPUT)
TA = 25°e TA = M(Nto MAXt

c
C» MIN
'F374
TVP MAX MIN
SN54F374
MAX MIN
SN74F374
MAX
r+ f max 100 60 70 MHz
C» tplH 3.2 6.1 8.5 3.2 10.5 3.2 10
en
:::r
tpHl
ClK Q
3.2 6.1 8.5 3.2 11 3.2 10
ns

tpZH 1.2 8.6 11.5 1.2 14 1.2 12.5

CD OC Q ns
CD tpZl 1.2 5.4 7.5 1.2 10 1.2 8.5
r+ tpHZ 1.2 4.9 7 1.2 8 1.2 8
tn DE Q ns
tplZ 1.2 3.9 5.5 1.2 7.5 1.2 .6.5

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: load circuits and waveforms are shown in Section 1.

, .
2·212 . TEXAS"
INSTRUMENTS
POST OFFICE BOX 665012 • DALl.AS, TEXAS 75265
 SN54F377, SN74F377
OCTAL D·TYPE FLlp·FLOPS WITH CLOCK ENABLE
02932. MARCH 1987 - REVISED JANUARY 1989

• Contains Eight D· Type Flip-Flops with SN54F377 ... J PACKAGE

Single-Rail Outputs SN74F377 ... D OR N PACKAGE
ITOP VIEW)
• Buffered Common Enable Input
G Vee
• Applications Include: lQ 8Q
Buffer/Storage Registers
10 80
Shift Register
20 70
Pattern Generators
2Q 7Q
• Package Options Include Plastic "Small 3Q 6Q
Outline" Packages, Ceramic Chip Carriers. 30 60
and Standard Plastic and Ceramic 300-mil 40 50
DIPs 4Q 5Q
• Dependable Texas Instruments Quality and
GNO elK
Reliability
SN54F377 . .. FK PACKAGE
description ITOP VIEW)
U
The SN54F377 and SN74F377 are monolithic.
positive-edge-triggered D-type flip-flops with a
Cl ~ 1<.9 !;: g
clock enable input. The 'F377 is similar to the 2 1 20 19
'F273, but features a common clock enable
instead of a common clear. 5
18
17
80
70
...II)
Q)
Q)
6 16 7Q
Information at the D inputs meeting the setup
15 6Q
.c
7 (/)
time requirements is transferred to the Q outputs
on the positive-going edge of the clock pulse if
the clock enable input G is low. Clock triggering
40 8
9 1011 12 13
14 60
...asas
occurs at a particular voltage level and is not OCl¥OCl
..qz....Jl.t')ln C
directly related to the transition time of the <.9 U
positive-going pulse. When the clock input is at
either the high or low level, the D input signal logic symbol t
has no effect at the output. The circuits are
deSigned to prevent false clocking by transitions G
at the G input. elK
(2)
The SN54F377 is characterized for operation lD 10
over the full military temperature range of 15)
20 20
(6)
-55°C to 125°C. The SN74F377 is 3D 30
characterized for operation from O°C to 70°C. (9)
40 40
112)
50 50
FUNCTION TABLE (EACH FLIP-FLOP) (15)
6D
70
(17) (16)
60
70 ==
w
G
INPUTS
CLOCK DATA
OUTPUT
a 80
(18) (19)
80 :>w
H x X 00
a:
tThis symbol is in accordance with ANSI/IEEE Std 91-19B4 and
L 1 H H IEC Publication 617-12. . 0.
L 1 L L Pin numbers shown are for D, J, and N packages.
X L X 00 I-
o
:::>
c
o
a:
0.
PRODUCT PREVIEW documents contain information Copyright © '987, Texas Instruments Incorporated
on products in the formative Dr design ~hasa of
development. Characteristic data anil other
TEXAS • 2-213
~::::!i::t!C:1r~:t dt~li:C8:::I~r T3i:::~a:~:~:::: INSTRUMENTS
products without notica.
POST OFF!CE BOX 655012 • DALLAS, TEXAS 75265
 SN54F377, SN74F377
OCTAL O·TVPE FLlp·FLOPS WITH CLOCK ENABLE

logic diagram (positive logic)

elK (11)

10 (3)
(2) 10
)--+--4 10

• ••
•• •

C
...
I»
I»
80 118)

P
Pin numbers shown are for 0, J, and N packages.
~D" IJ
(19) 80

en
::r absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
CD
...en
CD Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F377......... . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F377 ............................ ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C

tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F377 SN74F377
"'CJ UNIT
::a Supply voltage
MIN
4.5
NOM
5
MAX
5.5
MIN
4.5
NOM
5
MAX
V
o Vee
High-level input voltage 2 2
5.5
V
c VIH
VIL Low-level input voltage 0.8 0.8 V
c:
(")
11K Input clamp current -18 -18 mA
IOH High-level output current -1 -1 mA
-I IOL Low·level output current 20 20 mA
TA Operating free· air temperature 55 125 0 70 °e
"'CJ
::a
m
:S
m
~

2-214 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 655012 • DALL.AS, TEXAS 75265
 SN54F377, SN74F377
OCTAL O·TYPE FLlP·FLOPS WITH CLOCK ENABLE

electrical characteristics over recommended operating free· air temperature range (unless otherwise
noted)
SN54F377 SN74F377
PARAMETER TEST CONDITIONS UNIT
MIN TVP MAX MIN TVP MAX
VIK VCC = 4.5 V. II = -18 mA -1.2 -1.2 V
VCC = 4.5 V. 10H = -1 mA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V. 10H = -1 mA 2.7
VOL VCC - 4.5 V. 10l - 20 mA 0.3 0.5 0.3 0.6 V
II VCC = O. VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V. VI = 2.7 V 20 20 p.A
III VCC = 5.5 V. VI = 0.5 V -0.6 -0.6 mA
10S* VCC = 5.5 V. Vo = 0 -60 -150 -60 -150 mA
ICCH VCC = 5.5 V. See Note 1 55 72 55 72 mA
ICCl VCC = 5.5 V. See Note 2 70 90 70 90 mA

timing requirements
Vce - 5 V. VCC - 4.5 V to 5.5 V.
TA - 25·C TA - MIN to MAXi
UNIT
'F377 SN54F377 SN74F377

fclock Clock frequency

MIN MAX MIN MAX MIN MAX
MHz
...o
CD
Data high CD
tsu Setup time before ClK! 2 ns .c
or low
Data high
en
th Hold time aftar ClK!
or low
0 ns ca
tl' high 2.5
11;
tsu ,setup time before ClK!
tl'low 3
ns C
tl' high
th Hold time after ClK! 0 ns
or low
tw Pulse duration ClK low 4 ns

switching characteristics (see Note 3)

Vce - 5 V. VCC - 4.5 V to 5.5 V.
Cl - 50 pF. Cl - 50 pF.
FROM TO Rl - 500 n. Rl - 500 n. UNIT
PARAMETER (INPUT) (OUTPUT) TA - 25·C TA - MIN to MAXi
'F377 SN54F377 SN74F377
MIN TVP MAX MIN MAX MIN MAX ~
f max 125 MHz w
tplH
tpHl
ClK Any a 6.5
7
ns :>w
t All typical values are at VCC = 5 V. TA = 25·C a:
*No more than one output should be shorted at a time and tha duration of the short circuit should not exceed one second.
§ For
conditions shown as MIN or MAX. use the appropriate valua specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured after applying a momantary ground. then 4.5 V. to the clock Input with all data inputs at 4.5 V and the enable
input at ground.
.-a..CJ
2. ICCl is measured after applying a momentary ground. then 4.5 V. to the clock input with all data and enable inputs at ground. ::l
3. load circuits and waveforms are shown In Section 1. C
oa:
a..

TEXAS . . 2·215
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
c
....
D)
D)

en
::r
CD
!en

2-216
 SN54F378, SN74F378
HEX O-TYPE FLIP-FLOPS WITH CLOCK ENABLE
02932. MARCH 1987-REVISEO JANUARY 1989

• Contains Six D-Type Flip-Flops with Single- SN54F378 .... J PACKAGE

Rail Outputs SN74F378 ..... D OR N PACKAGE
nop VIEWI
• Buffered Common Enable Input
• Applications Include:
G VCC
Buffer/Storage Registers 10 60
10 60
Shift Register
Pattern Generators 2D 5D
20 50
• Package Options Include Plastic "Small 3D 40
Outline" Packages, Ceramic Chip Carriers, 30 40
and Standard Plastic and Ceramic 300-mil GNO ClK
DIPs
• Dependable Texas Instruments Quality and SN54F378 ... FK PACKAGE
Reliability (TOP VIEW)
U
description d U Ud
~1(!)2><O

The SN54F378 and SN74F378 are positive- 3 2 1 2019

edge-triggered D-type flip-flops with'a clock 10 4 18
enable input. The 'F378 is similar to the 'F174,
...en
20 5 17
but features a common clock enable instead of NC 6 16
a common clear. 2Q 7 15 CD
CD
Information at the D inputs meeting the setup 3D 8 14 ~
time requirements is transferred to the Q outputs 9 1011 1213 U)
on the positive-going edge of the clock pulse if
the clock enable input IT is low. Clock triggering
dOU>!d
"'i3 2 d<t ...caca
occurs at a particular voltage level and is not C
NC - No internal connection
directly related to the transition time of the
positive-going pulse. When the clock input is at
either the high or low level, the D input signal logic symbol t
has no effect at the output.
G
The SN54F378 is characterized for operation elK
over the full military temperature range of (2)
- 55°C to 125°C. The SN74F378 is lD 10
(5)
characterized for operation from OOC to 70°C. 2D 20
(6) (7)
3D 30
FUNCTION TABLE lEACH FLIP-FLOP) (11) (10) 4Q
4D

G
H
INPUTS
CLOCK
X
DATA
X
OUTPUT
Q
Qo
5D
6D
(13)
(14)
(12)
(15)
50
60 ::w
L
L
t
t
H
L
H
L
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.
5>
w
X L X 00
Pin numbers shown are for D. J, and N packages.
a::
fl.
I-
U
:::>
C
oa::
fl.
PRODUCT PREVIEW d.cumant. c.ntain information Copyright © 1987, Texas Instruments Incorporated
an pfaduets in til, formative ar design ~h.s. of
developmant. C"ractaristic data Inll ather
TEXAS • 2-217
=:.at:::s,rg':t ~i~.:::I~r T:.::~:~:~::
preducts withaut notice. INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F378, SN74F378
HEX O·TYPE FLlp·FLOPS WITH CLOCK ENABLE

logic diagram

10 131
10

20 141
20

3D 161
C
....
I»
I»
(I) 1111
:r 40
CD
....fn
CD

1131
50

80 1141

Pin numbers shown are for 0, J, and N packages.

"tJ absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
::0
o Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
C Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 rnA
c:
(')
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 rnA
-I Operating free·air temperature range: SN54F378.. . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
." SN74F378 ............................ OOCto70oC
::0 Storage temperature range ......................................... - 65°C to 150°C
m
< tThe input voltage ratings may be exceeded provided the input current ratings are observed.

~
2·218 TEXAS ,.,
INSTRUMENTS
POST OFFICE SOX 866012 • DALLAS, TEXAS 7628&
 SN54F378, SN74F378
HEX O·TYPE FLlP·FLOPS WITH CLOCK ENABLE

recommended operating conditions

SN54F378 SN74F378
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 ·4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vil low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
10H High-level output current -1 -1 mA
10l Low~level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 ·C

electrical characteristics over recommended operating free-air temperature range (unl••• oth.rwl••
noted)
SN64F378 SN74F378
PARAMETER TEST CONDITIONS UNIT
MIN TVP MAX MIN TYPT MAX
VIK VCC = 4.5 V, II = -18mA -1.2 -1.2 V
VCC = 4.5 V, 10H = -1 mA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V, 10H = -1 mA 2.7
VOL VCC = 4.5 V, 10l = 20 mA 0.3 0.5 0.3 0.5 V
II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC - 5.5 V, VI = 2.7 V 20 20 p.A
III VCC = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
105* VCC = 5.5 V, Vo = 0 -60 -160 -60 -160 mA
ICC VCC = 5.5 V, See Note 1 30 30 46 mA

timing requirements
Vee - 5 V, Vec = 4.5 V to 5.5 V,
TA - 25 0 e TA = MINtoMAXt
UNIT
'F378 SN54F378 SN74F378
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 80 0 70 0 80 MHz
Oata high
tsu Setup time before ClKt 4 5 4 ns
or low
Data high
th Hold time after ClKt 0 2 0 ns
or low
G high 4 4.5 4
tsu Setup time before ClKt ns
Glow 10 13 10

th Hold time after ClKt

G high
or low
0 0 0 ns 3=
w
~
ClK high 4 5 4
tw Pulse duration ns
ClK low 6 7.5 6

t All typical values are at VCC = 5 V, TA = 25°C.

a:
* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
A.
§ For conditions shown as MIN or MAX, use the appropriate value spacifled under Recommended Operating Condition••
NOTE1: ICC is measured with all outputs open, all data inputs and the enable input grounded, and the ClK input at 4.5 V after being
I-
momentarily grounded. CJ
::)
Q
oa:
A.

TEXAS . . , 2·219
INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS. TEXAS 76286
 SN54F378, SN74F378
HEX O·TYPE FLlp·FLOPS WITH CLOCK ENABLE

switching characteristics (see Note 2)

Vcc = 5V. VCC = 4.5 Vto 5.5 V.
Cl=50pF. Cl = 50pF.
FROM TO Rl = 50012. Rl = 50012.
PARAMETER UNIT
(INPUT) (OUTPUT) TA = 25°C TA = MIN to MAXt
'F378 SN54F378 SN74F378
MIN TYP MAX MIN MAX MIN MAX
f max BO 100 80 MHz
tpLH 2.2 5.1 7.5 2.2 8.5
ClK AnyQ ns
tPHl 2.7 5.6 8.5 2.7 9.5

tFor conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1 .

."
XI
o
C
c:
n
-t
."
XI
m
S
m
~

2-220 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
 SN54F379, SN74F379
QUADRUPLE D·TYPE FLlP·FLOPS WITH CLOCK ENABLE
02932, MARCH 1987-REVISED JANUARY 1989

• Contains Four D· Type Flip-Flops with SN54F379 ... J PACKAGE

Double-Rail Outputs SN74F379 ... 0 OR N PACKAGE
(TOP VIEW)
• Buffered Common Enable Input
G VCC
• Applications Include:
1Q 4Q
Buffer/Storage Registers
Pattern Generators '0
10
40
40
• Package Options Include Plastic "Small 20 30
Outline" Packages. Ceramic Chip Carriers. 20 30
and Standard Plastic and Ceramic 300-mil 2Q 3Q
DIPs GNO ClK
• Dependable Texas Instruments Quality and
Reliability SN54F379 ... FK PACKAGE
(TOP VIEW)
description U

The SN54F379 and SN74F379 are monolithic. ~I(!l ~ ~~

positive-edge-triggered D-type flip-flops with a 3 2 1 2019
clock enable input. The 'F379 is similar to the 18 40
'F 175, but features a common ciock enable 5 17 40
instead of a common clear.
Information at the D inputs meeting the setup 20
6 16
15
NC
...
U)

CD
time requirements is transferred to the Q outputs 8 14 30 CD
9 1011 12 13
.c
on the positive-going edge of the clock pulse if fn
the clock enable input G is low. Clock triggering
occurs at a particular voltage level and is not
directly related to the transition time of the
ocu~o
N~ZUC') ...caca
positive-going pulse. When the clock input is at NC - No internal connection C
either the high or low level, the D input signal
has no effect at the output, logic symbol t
The SN54F379 is characterized for operation G
over the full military temperature range of ClK
-55°C to 125°C. The SN74F379 is
characterized for operation from OOC to 70°C. 10
10
10
20
20
20
30
~
FUNCTION TABLE (EACH FLIP-FLOP)
30
INPUTS OUTPUT W

~
G CLOCK DATA Q 0:
H X X 00 Cio
l t H H l tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and a:
l
X
t
l
l
X
l
00
H
Cia
lEe Publication 617-12.
Pin numbers shown are for D, J, and N packages.
c.
I-
U
::::»
C
oa:
c.
PRODUCT PREVIEW do.uma.ts .o.tai. i.'ormatio. Copyright @ 1987, Texas Instruments Incorporated
o. products In tha formatlva or dllian ~ha•• 01
dav.'opma.t. Char.ct.rl.tlc data .n~ other
2-221
::::;~:t::.r~~ dt~ir8=::'~r Tli!::~a:::~:=:: TEXAS ' "
INSTRUMENTS
product. without .otic•.
POST OFFICE BOX 666012 • DALLAS, TEXAS 75285
 SN54F379, SN74F379
QUADRUPLE D·TYPE FLlp·FLOPS WITH -CLOCK ENABLE

logic diagram (positive logic)

(4)
lD----------~--~ 10

(5)
20 -----------i----t

3D (12)

(13)
40 -----------i----t

Pin numbers shown are for 0, J, and N packages.

absolute maximum ratings over operating free·alr temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F379..... . . . . . . . . . . . . . . . . . . .. - 55 DC to 125 DC
SN74F379 ............................ ODCto70 DC
." Storage temperature range ......................................... - 65 DC to 150 DC
l:J
o t The input voltage ratings may be exceeded provided the input current ratings are observed.
C
C
o-I

2-222 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TEXAS 76286
 SN54F379. SN74F379"
QUADRUPLE D-TYPE FLIP-FLOPS WITH CLOCK ENABLE

recommended operating conditions

SN64F379 SN74F379
UNIT
MIN NOM MAX MIN NOM MAX
Vec Supply voltage 4.5 6 6.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High-level output current 1 -1 mA
IOL Low-level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 ·C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)

PARAMETER TEST CONDITIONS

SN54F379 SN74F379 " UNIT
MIN TVpT MAX MIN TVpT MAX
VIK VCC = 4.5 V, II = -18 mA -1.2 -1.2 V
VCC = 4.5 V, 10H=-lmA 2.6 3.4 2.5 3.4
VOH V
VCC = 4.75 V, 10H=-lmA 2.7
VOL VCC = 4.5 V, 10L = 20 mA 0.3 0.5 0.3 0.6 V
II VCC = 6.6 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 6.5 V, VI = 2.7 V 20 20 ,.A
IlL VCC = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
10S* VCC = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
VCC = 5.5 V, See Note 1 28 40 28 40 mA

;
ICC

timing requirements
Q
Vee - 6 V, Vee" 4.6Vt06.6V,
TA - 25·e TA - MIN to MAXi
UNIT
'F379 SN64F379 SN74F379
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 100 MHz
Data high
tau Setup time before CLKt 3 3 ns
or low
Data high
th Hold time after CLKt 1 1 na
or low
G high
tou Setup time before CLKt 6 6 na
or low

th Hold time after CLK t

G high
0 0 na ~
or low W
tw Pulse duration
CLK high
CLK low
4
5
4
5
ns s:w
t All typical value. are at Vce = 5 V, TA = 26·C. a:
a.
* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§ For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
I-
NOTE 1: ICC is measured with all outputs open, all data inputs and the enable input grounded, and the eLK Input at 4.5 V after being
momentarily grounded. o
~
c
oa:
a.
TEXAS . " 2-223
INSTRUMENTS
POST OFFICE BOX 856012 - DALLAS. TEXAS 75265
 SN54F379, SN74f379
QUADRUPLE D·TYPE FLIP· FLOPS WITH CLOCK ENABLE

switching characteristics (see Note 2)

Vcc = SV, Vcc = 4.SVt06.6V,
Cl = so pF, Cl= SOpF,
FROM TO Rl=SOOIl, Rl = SOOIl,
PARAMETER UNIT
(INPUT) IOUTPUT) TA = 2S o C TA = MINtoMAXt
'F379 SNS4F379 SN74F379
MIN TVP MAX MIN MAX MIN MAX
f max 100 140 100 MHz
tplH 3.2 4.6 6.5 3.2 7.S
ClK Qor'O: ns
tpHL 4.2 6.1 8.5 4.2 9.6

tFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: load circuits and waveforms are shown in Section 1.

"tI
:D
o
C
c:
o-I
:Bm
-<~
m

2·224 TEXAS . .
INSTRUMENTS
POST OFFIce BOX 666012 • DALLAS, TEXAS 75265
 SN54F381. SN74F381
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS
02932, MARCH 1987 - REVISED JUNE 1988

• Fully Parallel 4-Bit ALUs in 20-Pin Package SN54F381 , .. J PACKAGE

SN74F381 ... OW OR N PACKAGE
• Ideally Suited for High-Density Economical (TOP VIEW)
Processors
A1 Vee
• G and ji Outputs for Look-Ahead Carry B1 A2
Cascading AO B2
BO A3
• Arithmetic and Logic Operations Selected
50 B3
Specifically to Simplify System
Implementation: 51 en
52 j5
A Minus B
B Minus A FO G
F1 F3
A Plus B
and Five Other Functions
GND F2

• Package Options Include Plastic "Small SN54F381 ... FK PACKAGE

Outline" Packages, Ceramic Chip Carriers, (TOP VIEW)
and Standard Plastic and Ceramic 300-mil U
0 . - . - UN
DIPs <tm<t><t
• Dependable Texas Instruments Quality and 3 2 1 2019
Reliability BO 4 18 B2
50 5 17 A3
PIN DESIGNATIONS 51 6 16 B3

DESIGNATION PIN NOS. FUNCTION

52 7 15 en
FO 8 14 j5
A3,A2,A1, AO 17,19,1.3 WORD A INPUTS
9 1011 1213
B3, B2, B1, BO 16,18,2,4 WORD B INPUTS
FUNCTION-SELECT ~ 0 N MIt!)
52,51, SO 7,6,5 LLZU.u..
INPUTS t!)

CARRY INPUT FOR

ADDITION, INVERTED FUNCTION TABLE
Cn 15
CARRY INPUT FOR
SELECTION ARITHMETIC/LOGIC
SUBTRACTION
S2 S1 SO OPERATION
F3, F2, F1, FO 12,11,9,8 FUNCTION OUTPUTS
L L L CLEAR
ACTIVE-LOW CARRY
j5 14 L L H B MINUS A
PROPAGATE OUTPUT
L H L A MINUS B
ACTIVE-LOW CARRY
G 13 L H H A PLUS B
GENERATE OUTPUT
H L L AG)B
VCC 20 SUPPLY VOLTAGE H L H A + B
GND 10 GROUND H H L AB
H H H PRESET

H ~ high level, L ~ low level

description
The SN54F381 and SN74F381 are arithmetic logic units (ALU)/function generators that perform eight binary
arithmetic/logic operations on two 4-bit words as shown in the function table, The exclusive-OR, AND,
and OR functions of the two Boolean variables are provided without the use of external circuits. In addition,
the outputs can be cleared (low) or preset (high) as desired. The 'F381 provides two cascade outputs
(p and G) for expansion utilizing 'AS 182 look-ahead carry generators,
The SN54F381 is characterized for operation over the full military temperature range of - 55 DC to 125 DC,
The SN74F381 is characterized for operation from ooe to 70°C.

PRODUCTION DATA documents contain information Copyright © 1987, Texas Instruments Incorporated
currant as of publication date. Products conform to
specifications par the tarms of TexBs Instruments
TEXAS •
:~~=i~a{;:1~7i ~=~:i:r :'~D:::::::':~~S not INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265 2-225
 SN64fU1, Sl74F381
ARITHMlTfC lOGIC UNITS/FUNCTION GENERATORS

function t"bI.
Certain differences exist in the Gand j5 function table compared with similar parts from other technologies.
No differences exist in the arithmetic modes (B minus A, A minus B, and A plus B), where these outputs
perform valu.8ble cascade functions. There are slight differences in the other modes (CLEAR, A + B, A<±> B,
AB, and PRESET), in which these outputs are strictly "don't care." There are no functional differences
between 'F381 parts built by Texas Instruments and Fairchild.
This function table is a condensed version and assumes for An that AO, A 1, A2, and A3 inputs all agree
and for Bn that BO, B1, B2, and B3 inputs all agree. This table is intended to point out the response of
these G lind j5 outputs in all modes of operation to facilitate incoming inspection.

FUNCTION TABLE

ARITHMETIC/LOGIC INPUTS OUTPUTS

(j P
OPERATION S2 S1 SO Cn An Bn F3 F2 F1 FO
CLEAR L L L X X X L L L L L L
L L L H H H H H L
L L H H H H L L L
L H L L L L L H H
L H H H H H H H L
B MINUS A L L H
H L L L L L L H L
H L H H H H H L L
H H L L L L H H H
H H H L L L L H L
L L L H H H H H L
L L H L L L L H H
L H L H H H L L L
L H H H H H H H L
A MINUS B L H L
H L L L L L L H L
H L H L L L H H H
H H L H H H H L L
H H H L L L L H L
L L L L L L L H H
L L H H H H H H L
L H L H H H H H L
L H H H H H L L L
A PLUS B L H H
H L L L L L H H H
H L H L L L L H L
H H L L L L L H L
H H H H H H H L L
X L L L L L L H H
X L H H H H H H H
AG)B H L L
X H L H H H H H L
X H H L L L L L L
X L L L L L L H H
X L H H H H H H H
A + B H L H
X H L H H H H H H
X H H H H H H H L
X L L L L L L L L
X L H L L L L H H
AB H H L
X H L L L L L L L
X H H H H H H H L
X L L H H H H H H
X L H H H H H H H
PRESET H H H
X H L H H H H H H
X H H H H H H H L

2-226 TEXAS
INSTRUMENTS
-II
POST OFFICE BOX 855012 • DALLAS. TEXAS 76286
 SN!i4F381. Sl74f381
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS

logic diagram (positive logic)

Cn (16)
BOI4)~~----~_~~

AO~13t)~====~~~~
B,g)

A, 111 ...
fI)

CD
B2 (18) CD
.c
en
...
CO

C!
A2( 9 )

B3 116)

113) (f

TEXAS ." 2-2Q7

INSTRUMENTS
POST OFFICE BOX 856012 • DALLAS, TEXAS 15265
 SN54F381, SN74F381
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS

,
'i
logic symbol t

(5) ALU

:}M~
SO
(6)
81
(7) [F(P,Q);' 15J CP P
S2
[F(P,Q) ;, 16J CG G
(1/21 Bl [lJ

(3)
AO P (8)
(4) [lJ FO
BO Q
(1)
Al P (9)
(2) [2J Fl
Bl Q
(19)
A2 P (11)
(18) [4J F2
B2 Q
(17)
A3 P (12)
(16) [8J F3
B3 Q

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee ...... _ ....................... _ ....... _ . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range.: SN54F381 . . . . . . . . . . . . . . . . . . . . . . . .. - 55°e to 125°e
SN74F381 ............................ oDe to 70 0 e
Storage temperature range .... _ ..... _ .... _ . . . . . . . . . . . . . . . . . . . . . . . .. - 65 °e to 150 De

:;The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F381 SN74F381
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
IOH High-level output current -1 -1 mA
IOL Low-level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 ·e

2-228 . TEXAS'"
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
 SN54F381, SN74F381
ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
BN54F3Bl SN74F3Bl
PARAMETER TEST CONDITIONS UNIT
MIN TYpt MAX MIN TYpt MAX
VIK Vee = 4.5 V. II ~ -18 mA -1.2 -1.2 V
Vee - 4.75 V, IQJi - -1 mA 2.7
VOH V
Vee = 4.5 V. iOH = -1 mA 2.5 3.4 2.5 3.4
VOL Vee = 4.5 V. 10l = 20 mA 0.3 0.5 0.3 0.5 V
II Vee = 5.5 V. VI = 7 V 0.1 0.1 mA
IIH Vee - 5.5 V. VI - 2.7 V 20 20 I'A

Vee = 5.5 V. l
Any A or B -2.4 -2.4
III
VI = 0.5 V
I
Any S -0.6 -0.6 mA
I en -2.4 -2.4
10S* Vee = 5.5 V. Vo = 0 -60 -150 -60 -150 mA
lee Vee - 5.5 V. See Note 1 59 89 59 89 mA

switching characteristics (see Note 2)

Vcc - 5 V, VCC - 4.5 V to 5.5 V.
Cl - 50 pF. CL - 50 pF.

PARAMETER
FROM
(lNPUTI
TO
(OUTPUTI
RL - 5000.
TA - 26·C
'F3S1
RL - 5000,
TA - MIN to MAXi
SN54F3B1 SN74F381
UNIT
...
(I)

CD
CD
MIN TVP MAX MIN MAX MIN MAX .c
tPlH 2.5 5.1 B.5 3 15 2.5 9.5 tn
...
Cn Any F ns
tPHl 2 4.3 7 2.5 12 2 7.5 ca
3 6.7 11.5 3.5 19 3 12.5
tpLH
AnyAorB Any F
5.8 9.5 16 2.5 10
ns ca
tPHL 2.5 3 C
tPLH 3.5 B.l 15 3 16 3.5 16
SO. SI. S2 Any F ns
tpHL 3.5 7.3 14 3 16 3.5 15
tPLH 2.5 5.2 9 3 13 2.5 10
AnyAorB l:l' ns
tpHl 2 4.6 7.5 3 14 2 7.5
tpLH 2.5 5 9 3 15 2.5 10
AnyAorB ]5 ns
tpHl 3.5 6 9 3 13 3.5 9.5
tPLH 4.5 7.4 12.5 3 15 4.5 13.5
SO. SI. S2 1l or]5 ns
tPHL 3 6 13 3 19 3 13.5

t All typical values are at Vce = 5 V. TA = 25 ·C.

* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
I For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measurad with all outputs open. SO. SI and S2 grounded. and all other Inputs at 4.5 V.
2. Load circuits and waveforms are shown in Section 1.

TEXAS • 2-229
INSTRUMENlS
POST OFFICE BOX 665012 • DALLAS, TEXAS 76265
...c
C\I
C\I
tJ)
:T
CD
...
CD
til

2-230
 SN54382, SN74F382
ARITHMETIC LOGIC/FUNCTION GENERATORS
02932, MARCH 1987 - REVISED JANUARY 1989

• Fully Parallel 4-Blt ALUs In 20-Pln Package SN54F382 ... J PACKAGE

SN74F382 .•• OW OR N PACKAGE
• Ideally Suited for High-Density Economical (TOP VIEW)
Processors
A1 VCC
• Ripple Carry (Cn +41 and Overflow (OVRI B1 A2
Outputs AD B2
BO A3
• Arithmetic and Logic Operations Selected B3
50
Specifically to Simplify System
51 Cn
Implamentatlon:
A Minus B
52 Cn +4
FO OVR
B Minus A
F1 F3
A Plus B
GND F2
and Five Other Functions
• Package Options Include Plastic "Small SN64F382 ••• FK PACKAGE
Outline" Packages, Caramlc Chip Carriers, (TOP VIEW)
and Standard Plastic and Ceramic 300-mll U
0 _ - UN
DIPs <1Xl<><
• Dependable Texas Instruments Quality and 3 2 1 2019
Reliability 4 18 B2

PIN DESIGNATIONS 51
5
6
17
16
A3
B3
...
U)
II)
II)
52 7 15 Cn
DESIGNAnON PIN NOS. FUNCTION .c
A3, A2, A 1. AO 17,19,1,3 WORD A INPUTS
FO 8 14 Cn +4 r.n
B3, B2, B1. BO

S2, S1, SO
16,18,2,4

7,6,5
WORD B INPUTS
FUNCTION-SELECT
9 1011 1213

-ClC'\I(W)a:
u..zu..u..>
...
CU
CU
INPUTS (!l 0 C
CARRY INPUT FOR
FUNCTION TABLE
ADDITION, INVERTED
Cn 15
CARRY INPUT FOR SELECTION ARITHMETIC/LOGIC
SUBTRACTION S2 S1 SO OPERATION
F3, F2, F1, FO 12,11,9,8 FUNCTION OUTPUTS L L L CLEAR
RIPPLE-CARRY L L H B MINUS A
C n +4 14
OUTPUT L H L A MINUS B
OVERFLOW L H H A PLUS B
OVR 13
OUTPUT H L L A(DB
20 SUPPLY VOLTAGE H L H A+B
VCC
GND 10 GROUND H H L AB
H H H PRESET

H = high level, L = low level

description
The SN54F382 and SN74F382 are arithmetic logic units (ALU)/function generators that perform eight binary
arithmetic/logic operations on two 4-bit words as shown in the function table. The exclusive-OR, AND,
and OR functions of the two Boolean variables are provided without the use of external circuits. In addition,
the outputs can be cleared (low) or preset (high) as desired. The 'F382 provides a en + 4 output to ripple
the carry to the en input of the next stage. The 'F382 detects and indicates the two's complement overflow
condition via the OVR output. The overflow output is logically equivalent to en + 3 EE> en + 4. When the
'F382 is cascaded to handle word lengths longer than four bits in length, only the most significant overflow
(OVRI output is used.
The SN54F382 is characterized for operation over the full military temperature range of - 55 °e to 125 °e,
The SN74F382 is characterized for operation from ooe to 70 o e.
UlLESS OTHERWISE lUTED dill doc....II ..lIIiR1 Copyright © 1987, Texas Insttumen.ts Incorporated
'HDDumDI DATA InIolllllllon ••,II1II II of
,or till II.... of T.... 1.1In....1I lII....rd
..........111. , ........."""'" II 1IIIOIIIoatIo..
TEXAS •
l':":li.o~.:Ir=-..==..~ III_rIIy .INSTRUMENTS 2-231
POST OFFICE BOX 665012 • DALLAS. TEXAS 75265
 SN5438t SN74F382
ARITHMETIC LOGIC/FUNCTION GENERATORS

function table
Certain differences exist in the OVR and Cn + 4 function table compared with similar parts from other
technologies and other vendors. No differences exist in the arithmetic modes (8 minus A, A minus 8, and
A plus 8), where these outputs perform valuable cascade functions. There are slight differences in the
other modes (CLEAR, A+8, A(±)8, A8, and PRESET), in which these outputs are strictly "don't care."
There are no functional differences between 'F382 parts built by Texas Instruments and Fairchild.
This function table is a condensed version and assumes for An that AO, A 1, A2, and A3 inputs all agree
and for 8 n that 80, 81, 82, and 83 inputs all agree. This table is intended to point out the response of
these OVR and Cn + 4 outputs in all modes of operation to facilitate incoming inspection.

FUNCTION TABLE

ARITHMETIC/LOGIC INPUTS OUTPUTS

OVR Cn +4
OPERATION S2 51 so Cn An Sn F3 F2 F1 FO
CLEAR L L L X X X L L L L H H
L L L H H H H L L
L L H H H H L L H
L H L L L L L L L
L H H H H H H L L
B MINUS A L L H
H L L L L L L L H
H L H H H H H L H
H H L L L L H L L
H H H L L L L L H
L L L H H H H L L
L L H L L L L L L
L H L H H H L L H
L H H H H H H L L
A MINUS B L H L
H L L L L L L L H
H L H L L L H L L
H H L H H H H L H
H H H L L L L L H
L L L L L L L L L
L L H H H H H L L
L H L H H H H L L
L H H H H H L L H
A PLUS B L H H
H L L L L L H L L
H L H L L L L L H
H H L L L L L L H
H H H H H H H L H
X L L L L L L L L
X L H H H H H L L
AGB H L L L H L H H H H L L
H H L H H H H H H
X H H L L L L H H
X L L L L L L L L
X L H H H H H L L
A + B H L H X H L H H H H L L
L H H H H H H L L
H H H H H H H H H
X L L L L L L H H
X L H L L L L L L
AB H H L X H L L L L L H H
L H H H H H H L L
H H H H H H H H H
X L L H H H H L L
X L H H H H H L L
PRESET H H H X H L H H H H L L
L H H H H H H L L
H H H H H H H H H

2-232 TEXAS
INSTRUMENTS
-1!1
POST OFFICE BOX 655012 ~ DALLAS, TEXAS 75265
 SN54382. SN74F382
ARITHMETIC LOGIC/FUNCTION GENERATORS

logic diagram (positive logic)

en (lS}
BO (4}

Al

B2
(1 }

(18}
...
(/)

CD
CD
.t:.
en
...
CU
CU
C

(19}
A2
(lS}
B3

A3 (17}

TEXAS . " 2-233

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54382, SN14F382
ARITHMETIC LOGIC/FUNCTION GENERATORS

logic symbol t

so (5)

Sl (6)
82(7)

AO (3) p (B)
BO (4) [11 FO
Q
(1)
Al P (9)
(2) [21 Fl
Sl Q
(19)
A2 p (11)
(18)
S2 Q

(17)
A3 P
[81
(16)
B3 Q
(12)
F3

tThis symbol Is in accordance with ANSI/IEEE Std 91-1984 and lEe Publication 617-12.

absolute maximum ratings over operating free-air temperatur, range (unless otherwise noted)
Supply voltage. Vee .............. _ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage:!: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . • . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F382 ....................... " - 55°C to 125°C
SN74F382 ............................ ODe to 70 De
Storage temperature range ......................................... - 65°C to 150°C
*The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN&4F382 SN74F382
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.6 5 6.5 4.6 5 5.6 V
VIH High-level input voltage 2 ~ 2 V
Vil low-level input voltage .0.."'.... '·0.8 0.8 V
11K Input clamp current ,..:<' -18 -18 mA
IOH High-level output current ",'\Iv -1 -1 mA
IOl low-level output current '?'- 20 20 mA
TA Operating free·alr tamperature -65 126 0 70 ·e

2·234 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS, TEXAS 75266
 SN54382, SN74F382
ARITHMETIC LOGIC/FUNCTION GENERATORS

electrical characteristics over recommended operating frea-air temperature range lunless otherwise
noted)
SN54F382 SN74F3S2
PARAMETER TEST CONDITIONS UNIT
MIN TVpT MAX MIN TVPt MAX
VIK Vcc = 4.5 V, II = -18mA -1.2 -1.2 V
Vcc = 4.5 V, IOH = -1 mA 2.5 3.4 2.5 3.4
VOH V
Vcc - 4.75 V, IOH = -1 mA ," 2.7
VOL Vcc = 4.5 V, 10L = 20 mA O.3_{~' 0.5 0.3 0.5 V
II Vcc = 5.5 V, VI = 7 V ",pC' 0.1 0.1 mA
IIH Vcc = 5.5 V, VI = 2.7 V C.' 20 20 p.A
I AnyAorB
~"'- -2.4 -2.4
Vcc = 5.5 V,
IlL
VI = 0.5 V
I Any 5 ;::y -0.6 -0.6 mA
I cn -3 -3
105* Vcc = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
ICC Vcc = 5.5 V, See Note 1 54 81 54 81 mA

switching characteristics Isee Note 2)

vce - 5 v, Vee - 4.5 V to 5.5 V,
~ - 50 pF, eL - 50 pF,

PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
RL - 500 II,
TA - 25·e
'F3S2
RL - 500 II,
TA - MIN to MAXi
SN64F3S2 SN74F382
UNIT
...en
G)
G)
MIN TVP MAX MIN MAX MIN MAX .c
tPLH 2.3 6.3 11 2.3 12 Ul
tpHL
tpLH
Cn

AnyAorB
Any F

Any F
2.2
2.7
4.6
6.9
7.5
12
2.2
2.4
8.5
13
ns

ns
...
CO
CO
tPHL 2.6 6.1 10 2.3 11 C
tpLH 4.7 8.3 15 .s: 4.3 17
50,51,52 Any F ns
tpHL 3.3 7.5 14 ;,,' 3.3 15
tPLH
AnyAorB Cn +4
3.3 6.6 10 !! 3.3 11
ns
3.4 6.3 10 f •• 3 10.5
tpHL
tpLH
tpHL
50,51,52
OVR or
Cn +4
3.6
5
9.8
8.6
16.5
13
,)
;? 3
4.6
17.5
14
ns

tpLH
Cn Cn +4
2.2 3.9 6.5 '" 2 6.5
ns
tPHL 3 4.8 6.6 2.6 7.5
tPLH 3.3 7 11 3 12.5
Cn OVR ns
tpHL 3 6 6.5 3 8
tPLH 6.1 8.8 13 4.7 15
AnyAorB OVR ns
tpHL 3.3 6.9 10.5 3.3 11.5

t All typical values are at VCC = 5 V, TA = 25 ·C.

*Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
§ For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured with all outputs open. SO and Cn Inputs at 4.5 V. and all other inputs grounded.
2. Load circuits and waveforms are shown in Section 1.

TEXAS ." 2-235

INSTRUMENTS
POST OFFICE BOX·855012 • DALLAS, TEXAS 75285
...c
Q)
Q)

en
:::r
CD
...en
CD

2-236
 SN54F518, SN54F519, SN74F518, SN74F519
8·BIT IDENTITY COMPARATORS WITH OPEN·COLLECTOR OUTPUTS
02932. MARCH 1987-REVISEO JANUARY 1989

• Compares Two 8-Bit Words SNS4FSI8. SNS4FS19 ... J PACKAGE

SN74FSI8. SN74FS19 ... OW OR N PACKAGE
• 'F518 Has 20-kO Pull-up Resistors on Q (TOP VIEW)
Inputs
G Vee
• Package Options Include Plastic "Small PO p=o
Outline" Packages, Ceramic Chip Carriers, 00 07
and Standard Plastic and Ceramic 300-mil P1 P7
DIPs 01 06
• Dependable Texas Instruments Quality and P2 P6
Reliability 02 05
P3 P5
description 03 04
GND P4
These identity comparators perform
comparisons on two eight-bit binary or BCD
SN54FSI8. SNS4FS19 ... FK PACKAGE
words. The 'F518 and F519 provide P = Q
(TOP VIEW)
open-collector outputs. The 'F518 devices
feature 20-kO pull-up termination resistors on the ud
Q inputs for analog or switch data.
00
dCL)t!l>CL
u"
The SN54F518 and SN54F519 are 3 2 1 2019
characterized for operation over the full military P1 4 18
temperature range of - 55°C to 125°C. The 01 5 17
SN74F518 and SN74F519 are characterized for P2 6 16
operation from O°C to 70°C. 02 7 15
P3 8 14
logic symbol t 9 1011 1213

COMP 8§l[[~~
- (1) t!l
G (2)

}
PO (4) FUNCTION TA8LE
PI
(6)
P2 INPUTS
(8)
P3 OUTPUT
(11) DATA ENA8LE
P4 P - Q
(13) p. Q G
PS
(IS) P = 0 L H
P6
P7 (17) (19) P=O
lP=OQ P*O X L
00 (3) X H L

}
01 (S)
02 (7)
Q3 (9)
04 (12)
OS (14)
as (16)
07 (18)

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

PRODUCTION DATA doc.ments contain informalion Copyright @ 1987, Texas Instruments Incorporated
currant as of publication data. Praducts conform to
specifications par the tarma of TaXIS Instruments
TEXAS • 2-237
:!.~=~~jrvat::I~~i ~!:~:~ti:r :1~O::~::~::s~1 not INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F518, SN54F519, SN74F518,SN74F519
8·BIT IDENTITY COMPARATORS WITH OPEN·COLLECTOR OUTPUTS

logic diagram (positive logic) ,

P7

07

ps
as
P5

05

P4,

04
119)
p=o
P3

03

P2
C
...
I»
I»
Q2

P1
(I)
::T 01
CD
...en
CD PO

00

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage. VCC ' , . , . , . , . , ... , ........ , ... , ..... , ............... -0.5 V to 7 V
Input voltage t .................... , ....................... , ........ -1.2 V to 7 V
Input current .............. " . , ....... " . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state .......................... , -0.5 V to 5.5 V
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F518. SN54F519 ......... ,..... - 55°C to 125°C
SN74F518. SN74F519 ................... O°C to 70°C
Storage temperature range ............................... ' ......... -65°C to 150°C

tThe input voltage ratings may be exceeded provided the input current ratings are observed.

2-238 , TEXAS'"
INSTRUMENTS
POST OFFICE BOX 865012 • DALLAS, TEXAS 75285
 SN54F518, SN74F518
8·BIT IDENTITY COMPARATORS WITH OPEN·COLLECTOR OUTPUTS

recommended operating conditions

SN54F51S SN74FB1S
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.6 6 6.5 4.76 6 6.6 V
VIH High-level input voltage 2 2 V
VIL Low-level Input voltage 0.8 0.8 V
VOH High-level output voltage 6.5 6.5 V
IOL Low-Ieval output current 20 20 mA
TA Operating free-air temparature -65 126 0 70 ·C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54FBle SN74FBle
PARAMETER TEST CONDITIONS UNIT
MIN TypT MAX MIN TypT MAX
VIK VCC = 4.6 V. II = -le mA -1.2 -1.2 V
IOH Vcc - 4.5 V. VOH = 5.5 V 0.1 0.1 mA
VOL VCC = 4.5 V. IOL = 20 mA 0.30 0.5 0.30 0.5 V
~ and P Inputa VCC = 5.5 V. VI = 7 V 0.1 0.1
II mA
a Inputs VCC - 5.5 V. VI - 5.5 V 0.1 0.1
~ and P inputs 20 20 p.A
IIH VCC = 6.6 V. VI = 2.7 V
a inputs -0.3 -0.3 mA
~ and P inputs -0.6 -0.6
IlL VCC = 6.5 V. VI = 0.6 V mA
a Inputs -1 -1
ICC Vcc = 6.5 V. See Note 1 24 39 24 39 mA

switching characteristics (see Note 21

Vcc - 5 V. VCC - 4.6 V to B.B V.
CL -60 pF. CL - 50 pF.
FROM TO RL - BOO n. RL - BOO n.
PARAMETER UNIT
(INPUT) (OUTPUT) TA - 25·C TA - MIN to MAX*
'F51e SNB4F61e SN74FBle
MIN TVP MAX MIN MAX MIN MAX
tPLH 4 11.5 14.5 4 15.5 4 10
Pora p=a ns
tpHL 2 6.2 9 2 11.5 2 10
tPLH 4.5 11.5 14 4.5 15.5 4.5 14.5
~ p=a ns
tPHL 2 5.1 6.6 2 9.5 2 7.5

tAli typical velues are at VCC = 5 V. TA = 26·C

*For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured with all inputs at 4.5 V.
2. Load circuits and waveforms are shown in Section 1.

TEXAS • 2-239
INSTRUMENTS
POST OFFICE BOX 865012 • DALLAS, TEXAS 76265
 SN54F519, SN74F519
8·BIT IDENTITY COMPARATORS WITH OPEN·COLLECTOR OUTPUTS

recommended operating conditions

SN54F519 SN74F519
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.75 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0;8 V
VOH High-level output voltage 5.5 5.6 V
IOL Low-level output currerit 20 20 mA
TA Operating free-air temperature -55 125 0 70 ·C

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F519 SN74F519
PARAMETER TEST CONDITIONS UNIT
MIN TVPt MAX MIN TVPt MAX
VIK VCC = 4.5 V, II = -18mA -1.2 -1.2 V
IOH VCC - 4.5 V, VOH - 6.6 V 0.1 0.1 mA
VOL VCC = 4.5 V, IOL = 20 mA 0.30 0.5 0.30 0.5 V
II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC - 5.5 V, VI - 2.7 V 20 20 pA
IlL VCC = 5.5 V, VI = 0.5 V -0.6 -0.6 mA

...C
I»
I»
ICC VCC

switching characteristics (see Note 2)

= 5.5 V, See Note 1 24 39 24 39 mA

tn
:r- VCC - 5 V, VCC - 4.5 V to 5.5 V
CD
...
CD
(I) PARAMETER
FROM
(lNPUTI
TO
(OUTPUTI
CL - 50 pF,
RL - 500 II,
TA - 25·C
CL - 50 pF,
RL - 600 II,
TA - MIN to MAX*
UNIT

'F519 SN54F519 SN74F519

MIN TVP MAX MIN MAX MIN MAX
tPLH 4 11.5 14.5 4 15.5 4 16
Pora 'P = a ns
tPHL 2 6.2 9 2 11.5 2 10
tPLH 4.5 11.6 14 4.5 15.5 4.5 14.6
1; p=a ns
tpHL 2 5.1 6.6 2 9.5 2 7.5

t All typical values are at VCC = 5 V, TA = 25 ·C.

*For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured with inputs at 4.6 V.
2. Load circuits and waveforms are shown in Section 1.

2-240 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 656012 '. DALLAS, TEXAS 75265
 SN54F52~ SN54F521, SN74F52~ SN74F521
8-BIT IDENTITY COMPARATORS
02932, MARCH 1987-REVISEO JANUARY 1989

• Compares Two 8-Bit Words SN54F520, SN54F521 ... J PACKAGE

SN74F520, SN74F521 ... DW OR N PACKAGE
• 'F520 has 20-kO Pull-up Resistors on Q ITOPVIEWI
Inputs
G Vee
• Package Options Include Plastic "Small PO p=o
putline" Packages, Ceramic Chip Carriers, 07
and Standard Plastic and Ceramic 300-mil P1 P7
DIPs 01 06
• Depen"able Texas Instruments Quality and P2 P6
Rellabilitv 02 05
P3 P5
description 03 04
GND P4
These identity comparators perform
comparisons on two eight-bit binary or BeD
words, The 'F520 and F521 provide P = Q SN54F520, SN54F521 ... FK PACKAGE
outputs, The 'F520 devices feature 20-kO pull- ITOP VIEWI
up termination resistors on the Q inputs for
o U!o
U II
analog or switch data, o ~1C!l > c..
Th!3 SN54F520 and SN54F521 are 3 2 1 20 19
characterized for operation over the full military
temperature range of - 55 °e to 125°e, The
P1
01
4
5
18
17
...en
CD
SN74F520 and SN74F521 are characterized for CD
operation from ooe to 70 oe,
6 16
15
.c
7 til
199ic symbol t
8
9 1011 12 13
14
...caca
COMP ~~C!~te C
C!l
G
PO
FUNCTION TABLE
Pl
P2 INPUTS OUTPUT
181 DATA ENABLE
P3
1111 P P - a
P4 P,Q ~
1131 P-Q L L
P5
(151 X H
P6 P" Q
P7 1171 7 lP=a p=a X H H
131
ao 0
151
al
a2 171
a3 191
a4 1121 a
a5 1141
1161
a6 1181
a7 7

tThis symbol is in accordance with ANSI/lEEE Std 91-1984 and

lEe Publication 617-12.

PRODUCTION DATA do.uments contain infor...lio. Copyright © 1987, Texas Instruments Incorporated
•• rronl I. of publi.ation dlle. Products .oillo... 10
.pacifications par the terms of ' I I•• Instruments
==~i;air::1~7i ~:\::i:; rrr::::£::'1 not TEXAS .."
INSTRUMENTS
2-241

POST OFFICE BOX 655012 • DALLAS, TEXAS 75265

 SN54F520. SN54F521. SN74F520. SN74F521
8-BIT IDENTITY COMPARATORS

logic diagram (positive logic)

P7

07

P6

06

P5

05

P4

Q4
p-_';.;,1;;.;91_ _ p:a
P3

03

P2

02

P1

01

PO

00

NOTE: The 'F520 has a 20-kll pullup resistors on the Q inputs.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to VCC
Current into any output in the low state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Operating free-air temperature range: SN54F520, SN54F521 ............... -55°C to 125°C
SN74F520, SN74F521 ................... 00Ct0700C
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current rating~ are observed.

2-242 TEXAS •
INSTRUMENTS
POST OFFICE BOX 6S5012 • DALLAS, TeXAS 75286
 SN54F520, SN74F520
8·BIT IDENTITY COMPARATORS

recommended operating conditions

SN54F520 SN74F520
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 rnA
10H High-level output current -1 -1 rnA
10L Low-level output current 20 20 rnA
TA Operating free-air temperature 55 125 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F520 SN74F520
TEST CONDITIONS UNIT
MIN Typt MAX MIN Typt MAX
VIK Vee - 4.5 V, II - -18 rnA -1.2 -1.2 V
Vee = 4.5 V, 10H = -1 rnA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, 10H = -1 rnA 2.7
VOL Vee - 4.5 V, 10L - 20 rnA 0.30 0.6 0.3 0.5 V
l; and P inputs Vee = 5.5 V, VI = 7 V 0.1 0.1
II rnA
a inputs Vee - 5.5 V, VI - 5.5 V 0.1 0.1
l; and P inputs 20 20 ~A
IIH Vee = 5.5 V, VI = 2.7 V
a inputs -0.3 -0.3 rnA
l; and P inputs -0.6 -0.6
IlL Vee = 5.5 V, VI = 0.5 V rnA
a inputs -1 -1
105* Vee = 5.5 V, Vo = 0 -60 -150 -60 -150 rnA
lee Vee = 5.5 V, See Note 1 21 32 21 32 rnA

switching characteristics (see Note 2)

Vce = 5V, Vce = 4.5Vt05.5V,
CL = 50 pF, CL = 50pF,
FROM TO RL=500Q, RL=500Q,
PARAMETER UNIT
(lNPUTI IOUTPUTI TA = 25°C TA = MIN to MAX§
'F520 SN54F520 SN74F520
MIN TYP MAX MIN MAX MIN MAX
tpLH 3.9 5.7 7.7 3.7 10.2 3.7 8.7
PorO p-;;(! ns
tpHL 4.7 7 9.3 4.4 11.3 4.4 10.3
tpLH 3.5 4.6 5.8 3.4 7 3.4 6.4
G P=Q ns
tpHL 5.2 7.5 9.5 4.9 11.2 4.9 10.4

t All typical values are at Vce = 6 V, TA = 26°e.

t Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
§For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating eonditions.
NOTES: 1. ICC is measured with all inputs at 4.5 V.
2. Load circuits and waveforms are shown in Section 1.

TEXAS . " 2·243

INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS, TEXAS 75265
 SN54F521, SN74F521
8·BIT IDENTITY COMPARATORS

recommended operating conditions

SN54F521 SN74F521
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current 18 18 mA
IOH High-level output current -1 -1 mA
IOL Low-level output current 20 20 mA
TA Operating free-air temperature -55 125 0 70 °e

electrical characteristics over recommended operating free-ait temperature range (unless otherwise
noted)

SN54F521 SN74F521
PARAMETER TEST CONDITIONS UNIT
MIN TYpt MAX MIN Typt MAX
VIK Vee = 4.5 V, II = -18 mA -1.2 -1.2 V
Vee = 4.5 V, 10H=-lmA 2.5 3.4 2.5 3.4
VOH V
Vee = 4.75 V, 10H=-lmA 2.7
VOL Vee - 4.5 V, IOL - 20 mA 0.3 0.5 0.3 0.5 V
cC» II Vee = 5.5 V, VI = 7 V 100 100 p.A
....
C»
IIH Vee = 5.5 V,
Vee - 5.5 V,
VI = 2.7 V
VI - 0.5 V
20
-0.8
20
-0.6
~A
mA
IlL
en 10S* Vee = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
::T ICC Vee = 5.5 V, See Note 1 21 32 21 32 mA
CD
CD
fit switching characteristics (see Note 2)
Vee = 5V. Vee.= 4.5Vt05.5V,
CL=50~F, CL = 50pF,
FROM TO RL = 500Q, RL=500Q.
PARAMETER UNIT
(lNPUTI (OUTPUTI TA = 25°C TA = MINtoMAX§
'F521 SN54F521 SN74F521
MIN TYP MAX MIN MAX MIN MAX
tpLH 2.7 6.6 10 2.7 15 2.7 11
PorQ P=Q ns
tpHL 3.7 6.6 10 3.2 12 3.2 11
tpLH 2.2 4.6 6.5 2.2 8.5 2.2 7.5
IT P= Q ns
tpHL 2.7 6.1 9 2.7 13.5 2.7 10

tAli typical values are at Vee = 5 V, TA = 25°C.

*Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
§For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTES: 1. ICC is measured with all inputs at 4.5 V.
2. Load circuits and waveforms are shown in Section 1.

2-244 . TEXAS'"
INSTRUMENTS
PCIST OFFICE BOX 855012 • DALLAS, TeXAS 75265
 SN54F533. SN74F533
OCTAL OoTYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
02932, MARCH 1987-REVISEO JANUARY 1989

• 8-Latches in a Single Package SN54F533 ... J PACKAGE

SN74F533 ... ow OR N PACKAGE
• 3-State Bus-Driving Inverting Outputs (TOP VIEW)

• Full Parallel Access for Loading oe Vee

• Buffered Control Inputs "0
1D
80
8D
• Package Options Include Plastic "Small 2D 7D
Outline" Packages, Ceramic Chip Carriers, 70
and Standard 300-mil DIPs 60
• Dependable Texas Instruments Quality and 3D 6D
Reliability 4D 5D
40 50
description GND e
These S-bit latches feature three-state outputs
SN54F533 •.. FK PACKAGE
designed specifically for driving highly capacitive
(TOP VIEW)
or relatively low-impedance loads, They are
particularly suitable for implementing buffer U
registers, I/O ports, bidirectional bus drivers, and OIOIU ulO
~~o><X>

working registers, 3 2 1 20 19
The eight latches of the 'F533 are transparent 4 18 8D
D-type latches, While the enable (C) is high, the 5 17 7D
0: outputs will follow the complements of the 0 6 16 70
inputs. When the enable is taken low, the 0: 7 15 60
outputs will be latched at the inverses of the 8 14 6D
levels that were set up at the 0 inputs. The 9 1011 12 13
'F533 is functionally equivalent to the 'F373 10ouiOO
except for having inverted outputs. '<tZ "''''
t!l
A buffered output-control (OC) input can be used
to place the eight outputs in either a normal logic FUNCTION TABLE (EACH LATCH)
state (high or low logic levels) or a high- INPUTS OUTPUT
impedance state. In the high-impedance state OC ENABLE C 0 0:
the outputs neither load nor drive the bus lines L H H L
significantly. The high-impedance third state and L H L H
increased drive provide the capability to drive the L L X 00
bus lines in a bus-organized system without need H X X Z
for interface or pull-up components.
The output control does not affect the internal
operations of the latches. Old data can be
retained or new data can be entered while the
outputs are off.
The SN54F533 is characterized for operation
over the full military temperature range of
-55°C to 125°C. The SN74F533 is
characterized for operation from OOC to 70°C.

Copyright © 1987, Texas Instruments Incorporated

TEXAS • 2-245
INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS, TeXAS 75265
 SN54F533, SN74F533
OCTAL O·TYPE TRANSPARENT LATCHES WITH 3·STATE OUTPUTS

logic symbol t logic diagram (positive logic)

"OC.:.;(1""1_ _ _ _~

10 (31

20.:;:(4::..1_ _-1--1

60 (141 30"",(7.:..1_ _-+--1

70 (171
80 (181
---+--1
40.:.:(8::..1
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

60 (131

60 (141

70 (171

80(181

2-246 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS, TEXAS 16285
 SN54F533, SN74F533
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range

Supply voltage, Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 to VCC
Current into any output in the low state: SN54F533.............................. 40 mA
SN74F533 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F533... . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F533 ............................ OOCto 70°C
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings ara observed.

recommended operating conditions

SN64F633 SN74F633
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 .'" 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 ~- 2 V
Low-level Input voltage ,,"l;' 0.8 0.8 V

;
VIL
11K Input clamp current .c-:- -18 -18 mA
10H High-level output current ~:r 3 3 mA
Q)
10L Low-level output current Lsl(: 20 24 mA
.c
TA Operating free-air temperature -55 125 0 70 DC CI)

electrical characteristics over recommended operating free-air temperature range (unless otherwise !m
noted)
o
SN64F633 SN74F633
PARAMETER TEST CONDITIONS UNIT
MIN TVP; MAX MIN TVP; MAX
VIK Vee - 4.5 V, II - -18 mA -1.2 -1.2 V
10H=-lmA 2.6 3.4 2.6 3.4
Vcc = 4.6 V
VOH 10H = -3 mA 2.4 3.3 2.4 3.3 V
Any output I Vec - 4.76 V 10H = -1 mAto -3mA 2.7
10.1. = 20 mA 0.3.,,*_ 0.5
VOL VCC = 4.5 V V
10L = 24 mA _,,"!i- 0.35 0.5
10ZH Vcc = 6.5 V, Vo - 2.7 V Q. 60 60 p.A
'llZL Vee = 6.5 V, Vo = 0.6 V v -60 -60 ~A
II Vce = 6.6 V, VI = 7 V S)~ 0.1 0.1 mA
IIH Vcc = 6.6 V, VI = 2.7 V <1." 20 20 p.A
IlL Vcc = 6.6 V, VI = 0.6 V -0.6 -0.6 mA
lOS· Vcc = 6.5 V, Vo = 0 -60 -160 -60 -160 mA
ICCZ Vce - 5.5 V, See Note 1 41 61 41 61 mA

*AII typical values are at VCC - 5 V, TA = 26 DC.

• Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 1: ICC is measurad with ~ at 4.6 V, all other inputs grounded.

TEXAS . . , 2-247
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TeXAS 75266
 S.N54F533. SN74F533
OCTAL D·TYPE TRANSPARENT LATCHES WITH 3·STATE OUTPUTS

timing requirements
Vcc - 5 V, Vcc - 4.5 V to 5.5 V,
TA - 25°C TA - MIN to MAXt
UNIT
'F633 SN54F533 SN74F533
MIN MAX MIN MAX MIN MAX

""o~~~~~ .
Data high
tsu Setup time before enable C. 2 2 ns
or low 2

th Hold time after enable C.

Data high
or low
3 3. "'''~ 3 ns

tw Pulse duration Enable C high 6 6 6 ns

switching characteristics (see Note 2)

Vcc = 5V, VCC = 4.SVtoS.SV,
CL = so pF, CL=SOpF,
Rl = SOOQ, Rl = SOOQ,
FROM TO
PARAMETER R2 = SOOQ, R2 = SOOQ, UNIT
(lNPUTI (OUTPUT)
TA = 2SoC TA = MINtoMAXt
'FS33 SNS4FS33 SN74FS33
MIN TYP MAX MIN MAX MIN MAX

o tpLH
tpHL
0 Anya
3.2
2.2
6.S
4.8
9
7
3.2
2.2 .... \
12
9
3.2
2.2
10
ns
....
I»
I»
.tpLH
C Anya
4.2 8.1 11 4.2 "')")/, < ':, 14 4.2
8
13
ns
tpHL 2.2 S.2 7 2.2 ':4">' 9 2.2 8
en
::r
tpZH
OC Anya
1.2 7.3 10 1.2 12.5 1.2 11
ns
tpZL 1.2 4.7 6.5 1.2 9 1.2 7.S
CD
tpHZ 1.2 4.3 6 1.2 8.5 1.2
!tI) tpLZ
OC Anya
1.2 3.7 5.5 1.2 7.5 1.2
7
6.5
ns

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.

2·248 TEXAS •
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 SN54F534, SN74F534
OCTAL D·TYPE EDGE·TRIGGERED FLlp·FLOPS WITH 3·STATE OUTPUTS
02932, MARCH 1987-REVISEO JANUARY 1989

• 3-State Bus-Driving Inverting Outputs SN54F534 •.. J PACKAGE

SN74F534 ... OW OR N PACKAGE
• Buffered Control Inputs (TOPVIEWI

• Package Options Include Plastic "Small oe Vee

Outline" Packages, Ceramic Chip Carriers, 10 80
and Standard Plastic and Ceramic 300-mil 10 80
DIPs 20 70
• Dependable Texas Instruments Quality and 20 70
Reliability 30 6 60
3D 60
description 40 50
50
These B-bit flip-flops feature three-state outputs
designed specifically for driving highly capacitive
GNO elK
or relatively low-impedance loads. They are
SN54F534 ... FK PACKAGE
particularly attractive for implementing buffer
(TOP VIEW)
registers, I/O ports, bidirectional bus drivers, and
working registers. t..
e'~lg ~Ig
The eight flip-flops of the 'F534 are edge-
triggered D-type flip-flops. On the positive 3 2 1 20 19
transition of the clock, the Q outputs wili be set
to the complement of the logic states that were
18
17
...
U)

CD
set up at the D inputs. The 'F534 is equivalent 16 CD
to the 'F374 except for having inverted outputs. 15 .c
14 en
A buffered output-control input can be used to
place the eight outputs in either a normal logic
state (high or low logiC levels) or a high·
9 1011 1213 ...caca
impedance state. In the high-impedance state
C
the outputs neither load nor drive the bus lines
significantly. The high-impedance third state
provide the capability to drive the bus lines in a
bus-organized system without need for inter-
face or pull-Up components.
The output control does not affect the internal
operation of the flip-flops. Old data can be
retained or new data can be entered while the
outputs are off,
The SN54F534 is .:haracterized for operation
over the full military temperature range of
- 55°C to 125°C. The SN74F534 is
characterized for operation from to 70°C. ooe
FUNCTION TABLE
(EACH FLIP-FLOP)

INPUTS OUTPUT
tiC ClK D 0:
l i H l
l i l H
l l X 00
H X X Z

PRODUCTIOI DATA doc.....11 _ I . infanutl•• Copyright @ 1987, Texas Instruments Incorporated

........ of p••llootioo dote. Praducto collom II
IPOOiliootl... per ... _ of T_ lutru••111 TEXAS " ,
lII.donI Wlrruty. Pn........ ' .....1•• d_ .ot 2-249
- . l 1 y Incl." ....... of III porl.oIIn. INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75266
 SN54F534, SN74F534
OCTAL D·TYPE EDGE·TRIGGERED FLlP·FLOPS WITH 3;STATE OUTPUTS

logic symbol t logic diagram (positive logic)

"lie .:.(l:,:.I_ _ _ _d

10 (31 lQ
20 (41 20
20 (41
30 m 30
40 (81
50 (131
60 (141
3D m
(111
70
80 (181 40 (81

t This symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 617-12.
50 (131

60 (141

70 (171

80 (181

2·250 TEXAS . "

INSTRUMENTS
POST OFFICE BOX &56012 • DALLAS. TEXAS 75285
 SN54F534. SN74F534
OCTAL D·TYPE EDGE·TRIGGERED FLlp·FLOPS WITH 3·STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range

Supply voltage, Vee· . . . . . ................ -0.5 V to 7 V
Input voltaget .... . . . . ............. - 1.2 V to 7 V
Input current . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state: SN54F534 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
SN74F534 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
Operating free-air temperature range: SN54F534... . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F534 . . . . . . . . . . . . . . . . . . . . . . . . . . . . ooe to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65°C to 150°C

t The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F534 SN74F534
UNIT
MIN NOM MAX MIN NOM MAX
Vee
VIH
Vil
11K
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
4.5
2
5 5.5

0.8
-18
4.5
2
5 5.5

0.8
-18
V
V
V
mA
II
IOH High-level output current -3 -3 mA
IOl Low-level output current 20 24 mA
TA Operating free-air temperature -55 125 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F534 SN74F534
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
VIK Vee = 4.5 V, II =
-18 mA -1.2 -1.2 V
Vee = 4.5 V, IOH = -1 mA 2.5 3.4 2.5 3.4
VOH vee = 4.5 V, IOH = -3 mA 2.4 3.3 2.4 3.3 V
Vee = 4.75 V, IOH = - 1 mA to - 3 mA 2.7
Vee = 4.5 V, IOl = 20 mA 0.3 0.5
Val V
Vee = 4.5 V, IOl = 24 mA 0.35 0.5
IOZH Vee = 5.5 V, Vo = 2.7 V 50 50 ~A
IOZl Vee = 5.5 V, Vo = 0.5 V -50 -50 ~A
II Vec = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH Vee = 5.5 V, VI = 2.7V 20 20 ~A
III Vee = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
lOS! Vee = 5.5 V, Va = 0 -60 -150 -60 -150 mA
leez Vee = 5.5 V, See Note 1 55 86 55 86 mA

tAli typical values are at Vee = 5 V, TA = 25°e,

§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 1: lee is measured with DC at 4.5 V, all other inputs grounded.

TEXAS .." 2-251

INSTRUMENTS
POST OFFICE BOX 655012. DALLAS, TEXAS 75265
 SN54F534. SN74F534
OCTAL O·TYPE EOG'E·TRIGGEREO FLlP·FLOPS WITH 3·STATE OUTPUTS

timing requirements over recommended operating free·air temperature range lunless otherwise noted)
Isee Note 2) .
Vcc - 5V. vcc - 4.5 V to 5.5 V.
TA - 25°C TA - MIN to MAXt
UNIT
'FS34 SN54FS34 SN74F534
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 60 0 70 MHz
Setup time Data high 2 2.5 2
tsu ns
before ClKt Data low 2 2 2
Hold time Data high 2 2 2
th no
after ClKt Data low 2 2.5 2
ClK high 7 7 7
tw Pulse duration ns
CLK low 6 6 6

switching characteristics Isee Note 2)

•
Vcc - 5 V. Vcc - 4.5 V to 5.5 V •
Cl - 50 pF. Cl - 50 pF.
R1 - 5000. R1 - 5000.
FROM TO
PARAMETER R2 - 5000. R2 - 5000. UNIT
(INPUT) COUTPun
TA - 2SoC TA - MIN to MAXt
C 'F534 SN54FS34 SN74F534
I»
; f max
MIN
109
TVP MAX MIN
60
MAX MIN
70
MAX
MHz
en tplH
ClK a 3.2 6.1 8.5 3.2 10.5 3.2 10
ns
::r
CD
tpHl 3.2 8.1 8.5 3.2 11 3.2 10

...en
CD tpZH
tPZl
tpHZ
oc a 1.2
1.2
1.2
8.6
5.4
4.9
11.5
7.5
7
1.2
1.2
1.2
14
10
8
1.2
1.2
1.2
12.5
8.5
8
ns

tpLZ
~ a ·1.2 3.9 5.5 1.2 7.5 1.2 6.5
ns

t For conditions shown as MIN or MAX. use the.appropriate value specified under Recommended Operating Conditions.
NOTE 2: load circuits and waveforms are shown in Section 1.

2-252 . TEXAS'"
INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS, TEXAS 76286
 SN54F540, SN74F540
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
D3215. JANUARY 1989

• 3-State Outputs Drive Bus Lines or Buffer SN54F540 ... J PACKAGE

Memory Address Registers SN74F540 ... OW OR N PACKAGE
(TOP VIEW)
• Data Flow-Through Pinout (All Inputs on
Opposite Side from Outputs) <31 Vee
A1 <32
• Package Options Include Plastic "Small A2 Y1
Outline" Packllges, Ceramic Chip Carriers, A3 Y2
and Standard Plastic and Ceramic 300-mil
A4 Y3
DIPs A5 Y4
• Dependable Texas Instruments Quality and A6 Y5
Reliability A7 Y6
A8 Y7
description GND Y8

These octal buffers and line drivers are designed SN54F540 ... FK PACKAGE
to have the performance of the popular (TOP VIEW)
SN54F240/SN74F240 series and, at the same
U
time, offer a pinout with inputs and outputs on N~~ UN
<I: <I: It:) > It:)
opposite sides of the package. This arrangement
greatly enhances printed circuit board layout. 3 2 1 20 19

The three-state control gate is a 2-input NOR

gate so that if either (31 or (32 is high, all eight
4
5
18
17
16
Y1
Y2 ...
CI)
Q)
6 Y3 Q)
outputs are in the high-impedance state.
7 15 Y4 .c
The SN54F540 is characterized for operation 8 14 Y5 en
over the full military temperature range
of - 55 DC to 125 DC. The SN74F540 is
9 1011 12 13

",o",r- <D
...
CO
CO
characterized for operation from 0 DC to 70 DC. <l:z>->- >-
t:) o
FUNCTION TABLE

INPUTS OUTPUT
G1 G2 A V
L L L H
L L H L
H X X Z
X H X Z

Z = High Impedance

~
w
:>w
a:
0..
I-
C.J
::J
C
oa:
0..
PRODUCT PREVIEW do.umenls .onllin information Copyright @ 1989, Texas Instruments Incorporated
on produoll in the 'ormltive or design pha.e of
development. Chlr••lerlstl. date an~ other . TEXAS. 2-253
:r:::~I::t:::B,~~t dt~li:Ca=::I~r Tli:::~~:~:7~;~: INSTRUMENlS
produ.ts without notl.e. POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F540, SN74F540
OCTAL BUFFERS AND LINE DRIVERS
WITH 3·STATE OUTPUTS

logic symbol t logic diagram (positive logic)

(1)
li1
(19)
(J2

(1B)
A1 V1

(17)
A2 V2

(16)
A3 V3

(15)
A4 V4

(14)
AS VB

(131
tThls symbol is in accordance with ANSI/IEEE Std. 91·1984 and A6 V6
lEe Publication 617-12.
(121
A7 V7

c
CI)
AB
(11)
VB

;
(I) absolute maximum ratings over operating free·alr temperature range (unless otherwise noted)*
i Supply vOltag:, Vee· . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
CD Input voltaga ..................................................... -1.2 V to 7 V
; Input cu'rrent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state: SN54F540 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 96 mA
SN74F540 . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 128 mA
Operating free-air temperature range: SN54F540....... . . . . . . . . . . . . . . . . .• - 55 °e to 125°e
SN74F540 ............................ ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 0 e
*The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
"'0 SN54F540 SN74FII40
UNIT
:::0 MIN NOM MAX MIN NOM MAX
o vee Supply voltage 4.6 6 5.5 4.6 6 6.6 V
C VIH High-level input voltage 2 2 V
c: VIL Low·level input voltage O.B 0.8 V
(") 11K Input clamp current -18 -18 mA
-I IOH High-level output current -12 -15 mA
IOL Low-level output current 48 64 mA
"'0 TA Operating free·air temperature -66 125 0 70 ·e
:::0
m
-~
<

2-254 TEXAS •
INSTRUMENlS
POST OFFice BOX 855012 • DALLAS, 'TEXAS 75285
 SN54F540, SN74F540
OCTAL BUFFERS AND LINE DRIVERS
WITH 3·STATE OUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F640 SN74F640
PARAMETER TEST CONDITIONS UNIT
MIN TypT MAX MIN TypT MAX
V,K Vee - 4.5 V. " = -18 mA -1.2 -1.2 V
JIOH = -3 mA 2.4 3.3 2.4 3.3

VOH
Vee = 4.6 V L10H = -12 mA 2 3.2
V
JIOH = -15 mA 2 3.1
Vee = 4.76 V. 10H = -3 mA 2.7

VOL Vee = 4.5 V

L'OL=48mA 0.38 0.56
V
JIOL = 64mA 0.42 0.55
10ZH Vee = 5.5 V. Vo = 2.7 V 60 &0 ~A
10ZL Vee = &.5 V. Vo = 0.& V -50 -60 ~A
II V~e = 5.& V. V, = 7 V 0.1 0., mA
IIH Vee = &.5 V. V, = 2.7 V 20 20 !loA
IlL Vee - 6.5 V. V, - 0.5 V -0.6 -0.6 mA
10S* Vee = 5.5 V. Vo = 0 -100 -225 -100 -225 mA
LOutputs high 59 75 59 75
lee Vee = 5.5 V J Outputs low 12 20 12 20 . mA
J Outputs disabled 35 45 35 45

switching characteristics (see Note 1)

VCC - 6 V. VCC - 4.6 V to 6.6 V.
CL - 60 pF. CL - 60 pF.
R' - 6000. R' - 6000.
FROM TO
PARAMETER R2 - 600 D. R2 - 500 D. UNIT
IINPUTI (OUTPUTI
TA - 26°C TA - MIN to MAxi
'F540 SN64F640 SN74F640
MIN TVP MAX MIN MAX MIN MAX
tPLH Data 1 2.6 5 1 6 1 6.6
y ns
tpHL (Any AI 1 1.6 4 1 4.5 1 4
tpZH 1.7 4.5 8 1.7 9 1.7 8.6
~ y ns
tpZL 2.7 &.4 10 2.7 11 2.7 10.5
tPHZ 1 3 8 1 7 1 6.5
~ Y ns
tPLZ 1 2.1 6.6 1 7.5 1 6

tAli typical values are at Vee = 5 V. TA = 25°C.

* Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
S For conditions shown as MIN or MAX. use the approprlata value specified under Recommended Operating Conditions.
NOTE1: Load clrcuite and waveforms are shown in Section 1.
~
~a:
0..
....
o
::J
C
oa:
0..

TEXAS . " 2-255

INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS, TEXAS 75265
c
Q)
r+
Q)

en
::r
CD
CD
r+
(II

2-256
 SN54F541, SN74F541
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
03126, JANUARY 1989

• 3-State Outputs Drive Bus Lines or Buffer SN54F541 ... J PACKAGE

Memory Address Registers SN74F541 •.. DW OR N PACKAGE
(TOP VIEW)
• Data Flow-Through Pinout IAlllnputs on
Opposite Side from Outputs) G1 Vee
A1 G2
• Package Options Include Plastic "Small A2 Y1
Outline" Packages. Ceramic Chip Carriers. A3 Y2
and Standard Plastic and Ceramic 300-mil
A4 Y3
DIPs Y4
• Dependable Texas Instruments Quality and Y5
Reliability A7 Y6
A8 Y7
description GND Y8
These octal buffers and line drivers are designed
to have the performance of the popular SN54F541 •.• FK PACKAGE
(TOP VIEW)

•
SN54F240/SN74F240 series and, at the same
time. offer a pinout with inputs and outputs on N..-.- UN
U
opposite sides of the package. This arrangement « «It!) > It!)
greatly enhances printed circuit board layout. 3 2 1 20 19

The three-state control gate is a 2-input NOR

gate so that if either 01 or 02 is high, all eight
4
5
18
17
Y1
Y2
....enCD
outputs are in the high-impedance state. 16 Y3 CD
7 15 Y4 .t:.
The SN54F541 is characterized for operation
8 14 Y5
o
over the full military temperature range
of - 55°C to 125°C. The SN74F541 is
9 1011 1213 ....caca
characterized for operation from O°C to 70°C. co 000 I"-c.c
<(2)->->-
t!)
Q
FUNCTION TABLE

INPUTS OUTPUT
G1 G2 A V
L L L L
L L H H
H X X Z
X H X Z

Z = High Impedance

~
w
5>
w
a:
c.
I-
o
::;)
c
oa:
c.
PRODUCT PREVIEW d.......11 .ont.in inf.rmatio. Copyright @ 1989. Texas Instruments Incorporated
on products in tho formltiva or design ~h....f
development. Characteristic dati anil othar TEXAS •
::=:t::=1rr;Ct dt,:i:C.=::I~rT3i~::~~:~:7:=:
products without notice.
INSTRUMENTS
2-257
POST OFFICE BOX 655012· DALLAS, TEXAS 75265
 SN54F541, SN74F541
OCTAL BUFFERS AND LINE DRIVERS WITH 3·STATE OUTPUTS

logic symbol t logic diagram (positive logic)

(1)
Gl
(19)
G2

(18)
AI VI
AI
A2 (17)
A2 V2
A3
A4 (16)
A3 V3
AS
AS (15)
A4 V4
A7
AB 19) (14)
A5 V5

tThis symbol is in accordance with ANSIIIEEE Std. 91-1984 and (13)

A6 V6
lEe Publication 617-12.
(12)
A7 V7

C (11)

...
I»
I»
A8 V8

t/) absolute maximum ratings over operating free·alr temperature range (unless otherwise noted)
J Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
CD
...
CD
(II
Input voltage:!: .................................................... , -1.2 V to 7 V
Input current ................................................... , - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state: SN54F541 .............................. 96 mA
SN74F541 ............................. 128 mA
Operating free-air temperature range: SN54F541 . . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F541 ............................ ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 150 0 e
*The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

." SN54F541 SN74F541
~ UNIT

o Vee Supply voltage

MIN
4.6
NOM MAX
5 5.5
MIN
4.5
NOM MAX
5 6.5 V
c VIH High-level Input voltage 2 2 V
c:
(")
VIL Low·level input voltage
Input clamp current
0.8
-18
0.8
-18
V
11K mA
-I IOH High-level output current -12 -15 mA
IOL Low-level output current 48 84 mA
.~ TA Operating free-air temperature -55 125 a 70 ·e

~
~
2-258 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 856012 • DALLAS. TEXAS 75285
 SN54F541. SN74F541
OCTAL BUFFERS AND LINE DRIVERS WITH 3·STATE OUTPUTS

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F541 SN74F541
PARAMETER TEST CONDITIONS UNIT
MIN TYPt MAX MIN Typt MAX
VIK Vee = 4.5 V, II = -18 mA -1.2 -1.2 V
IIOH = -3 mA 2.4 3.3 2.7 3.3
Vee = 4.5 V IIOH - -12 mA 2 3.2
V
VOH
IIOH - -15 mA 2 3.1
Vee = 4.75 V, IOH = -3 mA 2.7
IIOl = 48 mA 0.38 0.55
VOL Vee = 4.5 V V
IIOl-64mA 0.42 0.55
IOZH Vee = 5.5 V, Vo = 2.7 V 50 50 pA
10Zl Vee = 5.5 V, Vo = 0.5 V -50 -50 pA
II Vee - 5.5 V, VI - 7 V 0.1 0.1 mA
IIH Vee = 5.5 V, VI = 2.7 V 20 20 pA
III Vee = 5.5 V, VI = 0.5 V -0.6 -0.6 mA
105* Vee = 5.5 V, Vo = 0 -100 -225 -100 -225 mA
I Outputs high 62 75 62 75
lee Vee = 5.5 V I Outputs low 28 35 28 35 mA

switching characteristics (see Note 1)

I Outputs disabled 40 55 40 55
...
II)

Q)
Q)
Vee - 5 V, vec - 4.5 V to 5.5 V, .c
Cl - 50 pF, CL - 50 pF, en
PARAMETER
FROM
(lNTPUT)
TO
R1 -
R2 -
500 0,
5000,
R1 - 500 0,
R2 - 500 O. UNIT
...
CO
CO
(OUTPUT)
TA - 25"e TA - MIN to MAXI o
'F541 SN54F541 SN74F541
MIN TVP MAX MIN MAX MIN MAX
tpLH Data 1 2.9 5.5 1 6.5 1 6
y ns
tpHl (Any A) 1 2.3 5.5 1 6.5 1 6
tpZH 2.2 6.4 8 1.7 10 1.7 9.5
1l! or 2G Y ns
tpZL 2.7 5.7 8.5 2.2 10 2.2 9.5
tpHZ 1 3 6 1 7 1 6.5
1l! or 2G Y ns
tpLZ 1 2.5 5.5 1 7.5 1 6

tAli typical values are at Vee = 5 V, TA = 25°e.

*Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
§For conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: load circuits and waveforms are shown in Section 1.
~
w
:>w
~
Q.
to-
(.)
::::>
c
o~
Q.

TEXAS ." 2·259

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS. TEXAS 75285
...c
II)
II)

en
:::T
CD
...
CD
til

2-260
 SN54F543, SN74F543
OCTAL REGISTERED TRANSCEIVERS WITH 3·STATE OUTPUTS
02942, MARCH 1987 - REVISED JANUARY 1989

• 3-State True Outputs SN54F543 ... JT PACKAGE

SN74F543 ... ow OR NT PACKAGE
• Back-to-Back Registers for Storage
(TOP VIEW)
• Package Options Include Plastic "Small LE8A VCC
Outline" Packages, Ceramic Chip Carriers, CE8A
G8A
and Standard Plastic and Ceramic 300-mil
A1 81
DIPs 82
A2
• Dependable Texas Instruments Quality and A3 83
Reliebility A4 84
A5 85
description A6 86
A7 87
The 'F543 octal transceiver contains two sets
A8 88
of D-type latches for temporary storage of data LEA8
CEA8
flowing in either direction. Separate Latch Enable GA8
GND
(LEAB or LEBA) and Output Enable (GAB or GBA)
inputs are provided for each register to permit
SN54F543 ... FK PACKAGE
independent control in either direction of
(TOP VIEW)
data flow. For the SN54F543 and SN74F543,

~1~lffi U >UID
uffi
ul« _
respectively, the A outputs are characterized to
sink 20 or 24 milliamperes while the B outputs «(!)-,Z
are characterized for 48 or 64 milliamperes.
4 3 2 1 28 27 26 ...en
Q)
The A-to-B Enable (CEAB) input must be low in A2 5 25 82 Q)
order to enter data from A or to output data from A3 6 24 83 .c
B. Having CEAB low and LEAB low makes the A- A4 7 23 B4 en
to-B latches transparent; a subsequent low-to-
high transition of LEAB puts the A latches in the
NC
A5
8
9
22
21
NC
B5
...
a:I
a:I
storage mode. With CEAB and GAB both low, A6 10 20 B6 C
the 3-state B outputs are active and reflect the A7 11 19 B7
data present at the output of the A latches. Data 12 13 14 15 16 17 18
flow from B to A is similar, but requires using the
CEBA, LEBA, and GBA inputs. COICO 0 UIIDIID co
««zz««<O
~(!) (!)~
The SN54F543 is characterized for operation
over the full military temperature range of -55°C NC - No internal connection
to 125 DC. The SN74F543 is characterized for
FUNCTION TABLE
operation from OOC to 70°C.
INPUTS LATCH STATUS OUTPUT BUFFERS
CEAB LEAB GAB A TO Bt B1 THRU B8
H X X Storing High Z
X H Storing
X H High Z
L L L Transparent Current A Data
L H L Storing Previous *A Data
t A·to-B data flow is shown: B-to-A flow control is the same
except uses CEBA, LEBA, and GSA.
tBefore low-to-high transition of LEAB.

UNLESS OTHERWISE NOTED this documant .ontains Copyright © 1987, Texas Instruments Incorporated
PRODUCTION DATA information current as of
:::'Ii;:o'l.~~:' ~~od~:.:o~:~~~o.:r:.i!~~~:~~ TEXAS ~ 2-261
=r~~:~=~~~u~o:.r~=::~~~s nat necessarily INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F543, SN74F543
OCTAL REGISTERED TRANSCEIVERS WITH3·STATE OUTPUTS

logic symbol t logic diagram

GBA
CEBA

GAB
CEAB
LEAB

A1 B1

A2 B2
_+_Ct....,H-oI
A1 -(:;;3):...-......... (22)
Hf-~_81
A3 B3

A4 B4

~----~v~------~
A5 B5
TO 7 OTHER CHANNELS
A6 B6
Pin numbers shown are for OW, JT, and NT packages.
C
...
I»
I»
A7 B7

A8
tn B8
:r
CD
CD
a tThis symbol is in accordance with ANSIIIEEE Std 91-;984 and
lEe Publication 617-12.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee .................................................. -0.5 V to 7 V
Input voltage (excluding I/O ports) *....................................... -1.2 V to 7 V
Input current ..................................................... -30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state ................ -0.5 V to 5.5 V
Voltage applied to any output in the high state .............................. -0.5 V to Vee
eurrent into any output in the low state: SN54F543 (A 1 thru A8) .................... 40 mA
SN54F543 (Bl thru B8) ..................... 96 mA
SN74F543 (A 1 thru A8) ..................... 48 mA
SN74F543 (B 1 thru B8) .................... 128 mA
Operating free-air temperature range: SN54F543 .......................... -55 °e to 125°e
SN74F543 ............................. ooe to 70 0 e
Storage temperature range .......................................... -65°e to 150 0 e
t:The input voltage ratings may be exceeded provided th,e input current ratings are observed.

2-262 TEXAS . "

INSTRUMENTS
POST OFfiCE BOX 666012 • DALLAS, TEXAS 76285
 SN54F543, SN74F543
OCTAL REGISTERED TRANSCEIVERS WITH 3·STATE OUTPUTS

recommended operating conditions

SN54F543 SN74F543
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltaga 4.5 5 5.5 4.5 5 5.6 V
VIH High·level input voltage 2 2 V
VIL Low-level Input voltage ,,,"'0.8 0.8 V
11K Input clamp current _",<i -18 -18 mA
A1 thru A8 c,'\ -3 -3
IOH High-level output current mA
B1 thru B8 ,0.0\')' -12 -15
A1 thru A8 20 24
IOL Low-level output current mA
B1 thru B8 48 64
TA Operating free-air temperature -55 125 0 70 °e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F543 SN74F543
PARAMETER TEST CONDITIONS UNIT
MIN TypT MAX MIN TypT MAX
VIK Vee - 4.6 V, II - -18 mA -1.2 - 1.2 V
10H = -1 mA 2.5 3.4 2.6 3.4
A1 thru A8
10H = -3 mA 2.4 3.3 2.4 3.3

VOH
Vee = 4.6 V 10H = -3 mA 2.4 3.3 2.4 3.3
V
....
U)
Q)
B1 thru B8 10H = -12 mA 2 3.2
Q)

Any output
10H = -15 mA 2
2.7
3.1
.c
Vee = 4.75 V, 10H = - 1 mA to -3 mA U)
10L - 20 mA 0.3. <,>0.5

VOL
A1 thru A8
Vee = 4.5 V
10L = 24 mA h('; 0.35 0.5
V
....COCO
10L = 48 mA .1>.38 0.55
B1 thru B8
10L = 64 mA ",'0v 0.42 0.55
C
~,LE, and ~ VI = 7 V q"'~ 0.1 0.1
II Vee = 5.5 V mA
A and B VI = 6.5 V 1 1
~,J:l, and~ 20 20
IIH* Vee = 5.5 V, VI = 2.7 V /"A
A and B 70 70
~,J:l, and~ -1.2 -1.2
IlL * Vee = 5.5 V, VI = 0.5 V mA
A and B -0.65 -0.65
A1 thru A8 -60 -150 -60 -150
10S§ Vee = 5.5 V, Vo = 0 mA
B1 thru B8 -100 -225 -100 -225
leeH Vee = 5.5 V 67 100 67 100 mA
leeL Vee = 5.5 V 83 125 83 125 mA
leez Vee - 5.5 V 83 125 83 125 mA

tAli typical values are at Vee = 5 V, TA = 25 oe.

*For 1/0 ports, the parameters IIH and IlL include the off-state output current.
§Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

TEXAS ~ 2-263
INSTRUMENTS
POST OFFICE BOX 655012 • DALlAS, TEXAS 75265
 SN54F543, SN74F543
OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

timing requirements over recommended operating free-air temperature range (unless otherwise noted)

VCC - 5 v, Vcc - 4.5 V 10 5,5 v,

TA - 25°C TA - MIN 10 MAXt
UNIT
'F543 SN54F543 SN74F543
MIN MAX MIN MAX MIN MAX
Setup time, data before
tsu
latch enable
High or low 3
;)",O;.~~:. 3.5 ns

th
Hold time, data after
latch enable
High or low 3 ".' 3.5 ns

switching characteristics (see Note 1)

vcc = 5 v, VCC = 4.5 V to 5.5 v,

CL = 50 pF, CL = 50 pF,
Rl = 500 Q, Rl = 500 Q,
PARAMETER
FROM TO R2 = 500 Q, R2 = 500 Q,
UNIT
(INPUT) (OUTPUT) TA = 25°C TA = MIN 10 MAxt
'F543 SN54F543 SN74F543
MIN TYP MAX MIN MAX MIN MAX
tpLH 2.2 5.1 7.5 2.2 8.5
A or B B or A ns
tpHL 2.2 4.6 6.5 2.2 7.5
,:,: "
tpLH 3.7 8.1 11 4.1 12.5
LEBA A ns
tpHL 3.7 8.1 11 :" 4.1 12.5
tPLH 3.7 8.1 11 ,i.' 4.1 12.5
LEAB B ns
tpHL 3.7 8.1 11 ..:.:';
::),
4.1 12.5
tpZH 2.2 6.6 9 2.2 10
GorCE A or B ns
tpZL 3.2 7.1 10.5 3.2 12
tpHZ 1.7 5.6 8 1.7 9
GorCE A or B ns
tpLZ 1.7 5.1 7.5 1.7 8.5

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1.

2-264 TEXAS
INSTRUMENTS
..If
POST OFFICE BOX 656012 • DALLAS, TEXAS 75265
 SN54F544, SN74F544
OCTAL REGISTERED TRANSCEIVERS WITH3-STATE OUTPUTS
02942, MARCH 1987 - REVISED JANUARY 1989

• 3-State Inverted Outputs SN54F544 ... JT PACKAGE

SN74F544 ... ow OR NT PACKAGE
• Back-to-Back Registers for Storage (TOP VIEW)
• Package Options Include Plastic "Small LEBA VCC
Outline" Packages, Ceramic Chip Carriers, GBA CEBA
and Standard Plastic and Ceramic 300-mll A1 B1
DIPs A2 B2
• Dependable Texas Instruments Quality and A3 B3
Reliability A4 B4
A5 B5
description A6 B6
A7 B7
The 'F544 octal transceiver contains two sets A8 B8
of Ootype latches for temporary storage of data CEAB LEAi3
flowing in either direction. Separate Latch Enable GND GAB
(LEAB or LEBA) and Output Enable (GAB or GBA)

•
inputs are provided for each register to permit
SN54F544 ... FK PACKAGE
independent control in either direction of (TOP VIEW)
data flow. For the SN54F544 and SN74F544.
respectively. the A outputs are characterized to 1« 1« ul«
.-mffiu uffi..-
«(!)..Jz>um
sink 20 or 24 milliamperes while the B outputs
are characterized for 48 or 64 milliamperes. The
'F544 inverts data in both directions.
282726 ...
U)

CD
A2 5 25 B2 CD
The A-to-B Enable (CEAB) input must be low in A3 6 24 B3 .c
A4 7 23 B4
U)
order to enter data from A or to output data from
B. Having CEAB low and LEAB low makes the A-
to-B latches transparent; a subsequent low-to- A5
8
9
22
21
NC
B5
...asas
high transition of LEAB puts the A latches in the A6 10 20 B6 C
A7 11 19 B7
storage mode. With CEAB and GAB both low,
121314 15 16 17 18
the 3-state B outputs are active and reflect the
data present at the output of the A latches. Data
flow from B to A is similar, but requires using the «CXlIID« Cz UIIDIID
z « «'IDCXl
~(!) (!)~
CEBA. LEBA. and GBA inputs.
NC-No internal connection
The SN54F544 is characterized for operation
over the full military temperature range of
FUNCTION TABLE
- 55°C to 125°C. The SN74F544 is
characterized for operation from O°C to 70°C. INPUTS LATCH STATUS OUTPUT BUFFERS
~ LElii GAB A to Bt B1 THRU as
H X X Storing High Z
X H Storing
X H High Z
L L L Transparent Current A Data
L H L Storing *
Previous A Data

t A-to-S data flow is shown: B-to-A flow control is the same except
uses ~, t:El!!A, and ID!A
*Before low-to-high transition of LEAB.

UILES. OTHERWISE IOTED t.lo .......ont _lao Copyright @ 1987, Texas Instruments Incorporated
PRODUCTIOI DATA i""i1nIlla. ..mat u at
publiatiao dote. , ......... lllIfann tllI8Iificoti...
por ilia tWill at Tna Inllnllllllio ItIInurd TEXAS . " 2-265
Wlmllly. PnducIJao .............. nat.-lly
at .If ......_
i ...... 1aII•• INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 16265
 SN54F544, SN74F544
OCTAL REGISTERED TRANSCEIVERS WITH 3·STATE OUTPUTS

logic symbol t logic diagram

GBA
CEBA CEBA
LEBA
lEBA---<;1_""
GAB
CEAB
LEAB

A1

A2
A1 131 1221
A3 B3 Hr.-....-B1
A4 B4

A5 B5

V
A6 B6 TO 7 OTHER CHANNELS

Pin numbers shown are for OW, JT, and NT packages.

B7

B8

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

lEe Publication 617-12.

absolute maximum rating over operating free-air temperature range lunle'ss otherwise noted)
Supply voltage, Vee .................................................. -0.5 V to 7 V
Input voltage (excluding I/O ports):J: ....................................... -1.2 V to 7 V
Input current ..................................................... -30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state ................ -0.5 V to 5.5 V
Voltage applied to any output in the high state .............................. -0.5 V to Vee
Current into any output in the low state: SN54F544 (A 1 thru A8) ....... ,. ............ 40 mA
SN54F544 (B1 thru B8) ..................... 96 mA
SN74F544 (A 1 thru A8) ..................... 48 mA
SN74F544 (B1 thru B8) .................... 128 mA
Operating free-air temperature range: SN54F544 .......................... -55°C to 125 °e
SN74F544 ............................. ooe to 70°C
Storage temperature range .......................................... -65°C to 150 °e
*The input voltage ratings may be exceeded provided the input current ratings are observed.

2-266 TEXAS . .
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75266
 SN54F544, SN74F544
OCTAL REGISTERED TRANSCEIVERS WITH 3·STATE OUTPUTS

recommended operating conditions

SN54F544 SN74F544
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage
Low-level input voltage
2 ~
...-<:
... 0.8
2
0.8
V
V
VIL
11K Input clamp current Q,"<'" -18 -18 mA

10H High-level output current

Al thru A8 v -3 3
mA
Bl thru B8 _o'J -12 -15
Al thru A8 Q, 20 24
10L Low-level output current mA
Bl thru B8 48 64
TA Operating free-air temperature 55 125 0 70 ·e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN64F544 SN74F544
PARAMETER TEST CONDITIONS UNIT
MIN TVpt MAX MIN TVpT MAX
VIK Vee = 4.5 V, II = -18 mA -1.2 -1.2 V
10H = -1 mA 2.5 3.4 2.5 3.4
Al thru A8
10H - -3mA 2.4 3.3 2.4 3.3
Vee = 4.5 V 10H = -3mA 2.4 3.3 2.4 3.3
V
VOH
Bl thru B8 10H = -12 mA 2 3.2
10H = -15 mA 2 3.1
Any output Vee = 4.75 V, 10H = - 1 mA to - 3 mA 2.7
10L = 20 mA 0.3 0.6
AI thru A8
0.35 0.5
VOL Vee = 4.5 V 10L = 24 mA
IOL = 48 mA 0.38 .. 0.55
V
Bl thru B8
10L = 84 mA -~~ 0.42 0.56
~, [E,and~ VI = 7V :<' 0.1 0.1
II
A and B
Vee = 5.5 V VI = 5.5 V 1 1
mA
-,"
~,m, and~ -<::,;} 20 20
IIH*
A and B
Vee = 5.5 V, VI = 2.7 V ~ 70 70 "A
~,[E, and~ -1.2 -1.2
IIL*
A and B
Vee = 5.5 V, VI = 0.5 V -0.65 -0.65
mA

Al thru A8 -60 -150 -60 -150

10SI
Bl thru B8
Vee = 5.5 V, Vo =0 -100 -225 -100 -225
mA

leCH Vee = 5.5 V 67 100 67 100 mA

leel Vee = 5.5 V 83 125 83 125 mA
leez Vee - 5.5 V 83 125 83 126 mA

t All typical values are at Vce = 5 V, TA = 26 ·e.

*For 1/0 ports, the paramatera IIH and III include the off-state output current.
INot more than ana output should be shorted at a time, and the duration of the short circuit should not exceed one second.

TEXAS . " 2-267

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS. TEXAS 75285
 SN54F544, SN74F544
OCTAL REGISTERED TRANSCEIVERS WITH 3-STATEOUTPUTS

timing requirements over recommended operating free-air temperature range (unless otherwise noted)
VCC - 5 V, VCC - 4.5 V to 5.5 V,
TA - 25°C TA - MIN to MAXt
UNIT
'F544 SN54F544 SN74F544
MIN MAX MIN MAX MIN MAX
Setup time, data before
tsu High or low 3 '0,;\ 3 ns
latch enable _0.0'1> .,,"~
Hold time, data after ,?",,'(.."
th High or low 3' 3 ns
latch enable

switching characteri$tics .(see Note 1)

VCC= 5 V, vcc = 4.5 V to 5.5 V,
CL = 50 pF, CL = 50 pF,
R1 = 500 Q, R1 = 500 Q,
FROM TO R2 = 500 Q, R2 = 500 Q,
PARAMETER UNIT
(INPUT) (OUTPUT) TA = 25°C TA = MIN to MAXt
'F544 SN54F544 SN74F544
MIN TYP MAX MIN MAX MIN MAX
tpLH 2.2 6.6 9.5 2.2 10.6
A or B B or A ns
tpHL 2.2 4.6 6.5 2.2 7.5
tpLH 5.2 9.6 13 r""\ 5.2 14.5
LEBA A ns
tpHL 3.2 6.6 9.5 .dO°':.,"" 3.2 10.5
tpLH 5.2 9.6 13 ~'" 5.2 14.5
LEAB B ns
tpHL 3.2 6.6 9.5 3.2 10.5
tpZH 2.2 6.6 9 2.2 10
GorCE A or B ns
tpZL 3.2 7.1 10.5 3.2 12
tpHZ 1.7 5.6 8 1.7 9
GorCE A or B ns
tpLZ 1.7 5.1 7.5 1.7 8.5

tFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 1: Load circuits and waveforms are shown in Section 1.

2-268 ':TEXAS ~
INSTRUMENTS
POST OFFICE BOX 665012" DAllAS. TEXAS 75265
 SN54F563. SN74F563
OCTAL D·TYPE TRANSPARENT LATCHES
WITH 3·STATE OUTPUTS
03034, JUNE 1987-REVISEO JANUARY 1989

• B Latches in a Single Package SN54F563 , .. J PACKAGE

SN74F563 ... OW OR N PACKAGE
• 3·State Bus-Driving Inverting Outputs (TOP VIEW)

• Full Parallel Access for Loading oe Vee

• Buffered Control Inputs 10 10
20 20
• Package Options Include Plastic "Small 3D 30
Outline" Packages, Ceramic Chip Carriers. 40 40
and Standard Plastic and Ceramic 300-mil 50 50
DIPs 60 60
70 70
description 80 80
These B-bit latches feature three-state outputs GNO e
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are SN54F563 ... FK PACKAGE
particularly suitable for implementing buffer (TOP VIEW)
registers, 1/0 ports, bidirectional bus drivers, and
working registers.
The eight latches are transparent Ootype latches. 3 2 1 20 19
When the enable (CI is high, the 0: outputs will
follow the complements of data (01 inputs.
When the enable is taken low, the output will be
4
5
18
17
2()
30 ...
fI)
Q)
6 16 40 Q)
latched at the inverses of the levels that were 15 50 .c
set up at the 0 inputs. 14 60 en
A buffered output-control input can be used to
place the eight outputs in either a normal logic
9 10 11 1213

0 0 Uldld
...
C'CS
C'CS
state (high or low logic levelsl or a high- ooZ 00 .....
(!)
C
impedance state. In the high-impedance state
the outputs neither load nor drive the bus lines
significantly. The high-impedance state and FUNCTION TABLE
increased high-logic level provide the capability (EACH LATCH)
to drive the bus lines in a bus-organized system
INPUTS
without need for interface or pull-up OUTPUT
ENABLE
components. 0:
OC C 0
The output control (OCI does not affect the L H H L
internal operation of the latches. Old data can L H L H
be retained or new data can be entered while the L L X 00
outputs are in the high-impedance state. H X X Z

The SN54F563 is characterized for operation

over the full military temperature range of
- 55°C to 125°C. The SN74F563 is
characterized for operation from O°C to 70°C.

UIILESS OTHERWISE 1I0TED this d...mont ••ntolnl Copyright @ 1987, Texas Instruments Incorporated
PRODUCTIOI DATA Infarm.tion ••"anl a. of
::11~=0'l.~:' ~~d¥:':"~:~~:a:r.~::J:~ TEXAS ." 2-269
~:=:\.t~.~o:.r,:.=~~ nat .......rlly INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F563. SN74F563
OCTAL O·TYPE TRANSPARENT LATCHES
WITH 3·STATE OUTPUTS

logic symbol t logic diagram (positive logic)

10~~~~______~

20 20 (3)
3D
40
50
30(4)
60
70
80 (9)
40.;;(5::')_-+-1

tThis symbol is in accordance with ANSI/IEEE Std 91·1984

and lEe Publication 617·12
Pin numbers shown are for OW, J, and N packages. 50 (6)

C 60 (7)

....
I»
I»
CJ) 70 (8)
':r
CD
....
CD
til
so (9)

2-270 TEXAS ~
INSTRUMENTS
POST'QFFICE BOX 655012. DALLAS, TeXAS 75265
 SN54F563, SN74F563
OCTAL O·TYPE TRANSPARENT LATCHES
WITH 3·STATE OUTPUTS

abolute maximum ratings over operating free· air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled orpower·off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state: SN54F563 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
SN74F563 .............................. 48mA
Operating free· air temperature range: SN54F563. . . . . . . . . . . . . . . . . . . . . . . .. - 55 DC to 125 DC
SN74F563 ............................ oDe to 70 De
Storage temperature range ......................................... - 65 DC to 150 DC

tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F563 SN74F563
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 .,<C 2 V
Vil low-level input voltage n":~' O.B O.B V
....
II)

~> "'
11K Input clamp current -lB -18 rnA
-3 -3 rnA CI)
IOH High-level output current CI)
IOl low-level output current .f' 20 24 rnA .r:.
TA Operating free-air temperature -55 125 0 70 °e en
electrical characteristics over recommended operating free· air temperatuare range (unless otherwise ....
~
~
noted)
C
SN54F563 SN74F563
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
VIK Vee = 4.5 V. II = -lB rnA -1.2 -1.2 V
JIOH = -1 rnA 2.5 3.4 2.5 3.4
Vee = 4.5 V
VOH JIOH = -3 rnA 2.4 3.3 2.4 3.3 V
Vee = 4.75 V. IOH = -1 to -3 rnA 2.7
JIOl = 20 rnA 0.30 0.5
VOL Vee = 4.5 V V
JIOl = 24 rnA N 0.35 0.5
IOZH Vee = 5.5 V. Vo - 2.7 V d'"" 50 50 ~A
IOZl Vee = 5.5 V. Vo = 0.5 V .<1'<:' -50 -50 ~A
II Vee = 5.5 V. VI = 7 V S/' 0.1 0.1 rnA
IIH Vee - 5.5 V. VI - 2.7 V _d'> 20 20 ~A
III Vee = 5.5 V. VI= 0.5 V '< -0.6 -0.6 rnA
IOS§ Vee = 5.5 V. Vo = 0 -60 -150 -60 -150 rnA
leez Vee = 5.5 V. See Note 1 38 61 38 61 rnA

*AII typical values are at Vee = 5 V. TA = 25°e.

§Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: leez is measured with oc:at 4.5 V and all other inputs grounded.

TEXAS ." 2-271

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F563, SN74F563
OCTALO·TVPE TRANSPARENT LATCHES
WITH 3·STATE OUTPUTS
timing requirements
Vcc - 6 V, Vcc - 4.6 V to 6.6 V,
TA - 26°C TA - MIN to MAXt
UNIT
'F563 SN54F563 SN74F663
MIN '. MAX MIN MAX MIN MAX
tsu Setup time, data before enable C. 2 2 ,,c,i 2 ns
th Hold time, data before enable C. 3 3 ~~\,.l::,\,,-'4'l 3 ns
tiN Pulse duration, enable C high 6 6 \'''~ 6 ns

switching characteristics (see Note 2)

Vcc - 6 V, VCC - 4.6 V to 5.5 V,
CL - 60 pF, CL - 50 pF,
Rl - 600 Il, Rl - 500 Il,
FROM TO
PARAMETER R2 - 500 Il, R2 - 600 Il, UNIT
(INPUT) (OUTPUT)
TA - 25°C TA - MIN to MAXt
'F663 SN54F563 SN74F563
MIN TYP MAX MIN MAX MIN MAX
tpLH 3.2 6.5 9 3.2 12 3.2 10
0 Q ns
tpHL 2.2 4.8 7 2.2 C.. 9 2.2 8
tpLH 4.2 8.1 11 4.2 ~?-\J::~I\"''<'I 14 4.2 13
C Q ns
cC» tpHL 2.2 5.2 7 2.2 ,?"y 9 2.2 8
tpZH 1.2 7.3 10 1.2 12.5 1.2 11
r+ m! Q ns
C» tpZL 1.2 4.7 6.5 1.2 9 1.2 7.6
(f) tpHZ 1.2 4.3 6 1.2 8.5 1.2 7
m! Q ns
j" tpLZ 1.2 3.7 5.5 1.2 7.6 1.2 6.5
CD
! tFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
(/) NOTE 2: Load circuits and waveforms are shown in Section 1.

2-272 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F56' SN74F564
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
03034, SEPTEMBER 1987-REVISEO JANUARY 1989

• 3-State Bus-Driving Inverting Outputs SN54F564 ... J PACKAGE

SN74F564 ... DW DR N PACKAGE
• Buffered Control Inputs (TDP VIEW)

• Package Options Include Plastic "Small oe Vee

Outline" Packages, Ceramic Chip Carriers, 1D 15
and Standard Plastic and Ceramic 300-mil 2D 25
DIPs 3D 35
4D 45
• Dependable Texas Instruments Quality and
5D 55
Reliability
6D 65
7D 75
description
8D 85
These 8-bit flip-flops feature three-state outputs GND elK
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
SN54F564 ... FK PACKAGE
particularly attractive for implementing buffer
(TOP VIEW)
registers, I/O ports, bidirectional bus drivers, and
working registers, U
0 o IU ulO
('oj ~O>~
The eight flip-flops of the 'F564 are edge-
3 2 1 20 19
triggered D-type flip-flops. On the positive
transition of the clock, the Q outputs will be set 3D 18 25
to the complement of the logic states that were 4D 5 17 35
set up at the D inputs. The 'F564 is equivalent 5D 6 16

to the 'F574 except for having inverted outputs. 6D 7 15 55

7D 8 14 65
A buffered output-control input can be used to 9 1011 12 13
place the eight outputs in either a normal logic
00'-'1010
state (high or low logic levels) or a high-
impedance state. In the high-impedance state,
oo6 dOO r--.

the outputs neither load nor drive the bus lines

significantly. The high-impedance third state
provides the capability to drive the bus lines in
a bus-organized system without need for
interface or pull-up components.
The output control does not affect the internal
operation of the flip-flops. Old data can be
retained, or new data can be entered while the
outputs are off.
The SN54F564 is characterized for operation
over the full military temperature range of
-55°C to 125°C. The SN74F564 is
characterized for operation from OOC to 70°C.

FUNCTION TABLE
(EACH FLIP-FLOP)

INPUTS OUTPUT
OC CLK D Q
L t H L
L t L H
L L X 00
H X X Z

UNLESS OTHERWISE NOTED this do.umant contains Copyright © 1987, Texas Instruments Incorporated
PRODUCTION DATA information currant as of
publication datI. Products conform to specifications
per the' terms of Texas Instruments standard
"!1
TEXAS
INSTRUMENTS
2-273
:::r~~:tl~::i~~u~JO:lr~~Cr'::~~~r~~8s not necessarily
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
SN54F564, SN14f564
OCTAL D·TYPE EDGE·TRIGGERED FLIp· FLOPS WITH 3·STATE OUTPUTS

logic symbol t logic diagram (positive logic)

oc
elK

1D 121 1191 10
10
20
3D
40
50 2D 131 li81 2ii
60
70
80
1171 _
3D 141 ~-IJ)C-+,,-';" 3D
tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and
lEe Publication 617-12.

4D 151

1151 _
5D 16) 50

'1141 _
6D 171 6D

7D 181 1131 70

so 191 1121 &ii

TEXAS ~
INSTRUMENTS
PQST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 SN54F564, SN74F564
OCTAL D·TYPE EDGE·TRIGGERED FLlP·FLOPS WITH 3·STATE OUTPUTS

absolute maximum ratings over operating free·air temperature range

Supply voltage. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state .............. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into any output in the low state: SN54F564 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
SN74F564 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F564. . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F564 ............................ DoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C

t The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F564 SN74F564
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 v
VIH High-level input voltage 2 ,;},", 2 V
Vil
11K
10H
low-level input voltage
Input clamp current
High-level output current "0'Y
" "
/"-;', O.B
-18
-3
O.B
-18
-3
V
mA
mA
...
U)

Q)
Q)
IOl low-level output current <i'c" 20 24 mA .c
TA Operating free-air temperature -55 125 0 70 ·C (/J

electrical characteristics over recommended operating free-air temperature range (unless otherwise
notedl
...
CI:I
CI:I
C
SN54F664 SN74F564
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
VIK vcc - 4.5 V. II - -1B mA -1.2 -1.2 v
IIOH=-1mA 2.5 3.4 2.5 3.4
Vcc = 4.5 V
VOH IIOH = -3 mA 2.4 3.3 2.4 3.3 V
VCC = 4.75 V. 10H - -1 to -3 mA iv" . 2.7
VCC = 4.5 V, 10l = 20 mA O,¢"· 0.5
VOL V
VCC = 4.5 V, 10l = 24 mA "," 0.35 0.5
IOZH VCC - 5.5 V, Va - 2.7 V .';:, 50 50 pA
10Zl VCC = 5.5 V, Vo = 0.5 V ,~~) -50 -50 p.A
II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 p.A
III VCC = 5.5 V, VI - 0.5 V -0.6 -0.6 mA
10S§ VCC = 5.5 V, Va = 0 -60 -150 -60 -150 mA
ICCZ VCC - 5.5 V, See Note 1 55 86 55 86 mA

*AII typical values are at VCC = 5 V, TA = 25·C.

§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed 1 second.
NOTE 1: ICC is measured with OC at 4.5 V, all other inputs grounded.

TEXAS ~ 2-275
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F564,SN74F564
OCTALD·TVPE EDGE·TRIGGERED FLlp·FLOPS WIT~. 3·STATE OUTPUTS

timing requirements over recommended operating free·air temperature range (unless otherwise noted)
(see Note 2)
vcc - 5 v, vcc - 4.5 V to 5.5 v,
TA - 25°C TA - MIN to MAxt
UNIT
'F564 SN54F564 SN74F564
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 60 0 70. MHz
Data high 2 2.5 2
tsu Setup time before ClK! ~'" ns
Data low 2 2 <"'. ~. 2
Data high 2 2 Q{(c":(c~ 2
th Hold time after ClK! q ns
Data low 2 2.5 2
ClK high 5 7 7
tw Pulse duration ns
ClK low 5 6 6

switching characteristics (see Note 2)

vcc - 5 v, vcc - 4.5 V to 5.5 v,
CL - ~() pF, CL - 50 pF,
Rl - 500 Il, R! - 500 Il,
FROM TO
PARAMETER R2 - 500 Il, R2 - 500 Il, UNIT
IINPUTI (OUTPUT)
c
Q,)
TA - 25°C
'F564
TA -
SN54F564
MIN to MAxt
SN74F564
r+ MIN TVP MAX MIN MAX MIN MAX
Q,)
f max 100 60 70 MHz
en
:r
tplH
ClK Q
3.2 6.1 8.5 3.2 r'" 10.5 3.2 10
ns
CD tpHl 3.2 6.1 8.5 3.2 ,o'->&.If. 11 3.2 10
CD
r+
tpZH
~ Q
1.2 8.6 11.5 1.2 ,,'<- <:~ 14 1.2 12.5
ns
en tpZl 1.2 5.4 7.5 1.2 10 1.2 8.5
tpHZ 1.2 4.9 7 1.2 8 1.2 8
De Q ns
tpLZ 1.2 3.9 5.5 1.2 7.5 1.2 6.5

tFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: load circuits and waveforms are shown in Section 1.

2-276 TEXAS ~
INSTRUMENTS
POST OFFICE SOX 656012 • DALLAS. TEXAS 75265
 SN54F568, SN54F569, SN74F568, SN74F569
SYNCHRONOUS 4·BIT UP/DOWN DECADE AND
BINARY COUNTERS WITH 3·STATE OUTPUTS
02932. MARCH 1987-REVISEO JANUARV 1989

• 3·State Q Outputs Drive Bus Lines Directly SN54F568. SN54F569 ••. J PACKAGE
SN74F568. SN74F569 ••. OW OR N PACKAGE
• Counter Operation Independent of 3·State (TOP VIEW)
Output
UfO VCC
• Fully Synchronous Clear. Count. and Load ClK RCO
A CCO
• Asynchronous Clear Also Provided s G
• Fully Cascadable C QA
0 Qs
• Package Options Include Plastic "Small ENP Qc
Outline" Packages, Ceramic Chip Carriers,
AClR QD
and Standard Plastic and Ceramic 300-mil SClR ENT
DIPs
GND lOAD
• Dependable Texas Instruments Quality and
Reliability SN54F568. SN54F569 •.• FK PACKAGE
(TOP VIEW)
description
The 'F568 decade counters and 'F569 binary ~ Ie
<CU:::l>
tll8a:
counters are programmable. count up or down.
3 2 1 2019
and offer both synchronous and asynchronous
clearing. All synchronous functions are executed S 4 18 CCO en
on the positive-going edge of the clock.
o 6
C
16 QA
5 17 G iCD
The clear function is in.itiated by applying a low 7 15 QS ..c
level to either Asynchronous Clear (ACLR) or 8 14 QC
en
Synchronous Clear (SCLR). Asynchronous 9 10111213 ....asas
(direct) clearing overrides all other functions of
the device. while synchronous clearing overrides da:t/l(!)g
Z <Ci5 d I 010II- 0 C
only the other synchronous functions. Data is
loaded from the A. B. C. and 0 inputs by holding
Load (LOAD) low during a positive-going clock transition. The counting function is enabled only
when Enable P (ENP) and Enable T (ENT) are low and ACLR. SCLR. and LOAD are high. The Up/Down
UfO) input controls the direction of the count. These counters count up when U/O is high and count down
when U/O is low.
A high level at the Output Enable (G) forces the Q outputs into the high-impedance state, and a low level
enables those outputs. Counting is independent of G. ENT is fed forward to enable the Ripple Carry Output
(RCO) to produce a low-level pulse while the count is zero (all a
outputs low) when counting down or
maximum (9 or 15) when counting up. The Clocked Carry Output (CCO) produces a low level pulse for
a duration equal to that of the low level of the clock when RCO is low and the counter is enabled (both
ENP and ENT are low); otherwise, CCO is high as shown in the CCO function table. CCO does not have
the glitches commonly associated with a ripple-carry output. Cascading is normally accomplishd by
connecting RCO or CCO of the first counter to ENT of the next counter. However. for very-high-speed
counting, RCO should be used for cascading since CCO does not become active until the clock returns
to the low level.
The SN54F568 and SN54F569 are characterized for operation over the full military temperature range
of - 55°C to 125°C. The SN74F568 and SN74F569 are characterized for operation from 0 °C to 70°C.

UlLESS OTHERWISE NOTED Ihls d......nt c.nlalns Copyright © 1987. Texas Instruments Incorporated
PRDDUCTIOI DATA Inlolllllti.n •• "Int " 01
....IcaUOn data. P....011 oanlarm I. opaolflllll.nl
par Ihl tar.. 01 Tlnl Indrumlnll .11.dl'" TEXAS ~
=-:li.t"'::'~r:=.:=:.- not n....'"y INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS. TeXAS 75265 2-277
 SN54F568, SN54F569, SN74F568, SN74F569
SYNCHRONOUS··4·BIT UP/DOWN DECADE AND
BINARY COUNTERS WITH3·STATE OUTPUTS

ceo FUNCTION TABLE

INPUTS OUTPUT
SCiJi lOAD ENJS ENT Te* ClK ~
l X X X X X H
X L X X X X H
X X H X X X H
X X X H X X H
X X X X H X H
H H l L l 1I 1I
* = TC is generated internally
H = High voltage level
L = low voltage level
X = Don't care

FUNCTION TABLE

INPUTS
OPERATION
G ACLii m:R TIiAl5 00 ENP U/O ClK
H X X X X X X X Q Outputs Disabled
L L X X X X X X Asynchronous Clear
L H L X X X X t Synchronous Clear
c L H H L X X X t Load
....
CI)
CI)
L
L
H
H
H
H
H
H
L
L
L
L
H
L
t
t
Count Up
Count Down
en L H H H H X X X Inhibit Count
:::r L H H H X H X X Inhibit Count
CD
!en logic symbols t
'F56B 'F569

CTRDIV10 CTRDIV16·

-=_-C:> C5/1,4,7,S+/2,4,7,S- ..::::.._-C> C5/1,4,7,S+/2,4,7,S-

Z6

ACLii (SI mR (SI

A. (31 (161 A (31

B (41 (151 ~A B (41
C (61 (141 aB C (61
0(61 (131 a~ 0(6)

tThese symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12 .

2-278 . TEXAS'"
INSTRUMENTS
POST OFFice BOX 665012 • DALLAS, TEXAS 75266
 SN54F568, SN74F568
SYNCHRONOUS 4·81T UP/DOWN DECADE COUNTERS
WITH 3·STATE OUTPUTS

'F568 logic diagram (positive logic)

G
(17)
(1)
."
v
U/D "
T " ...
(2) v" (18)
ClK
m
mJ5 QL
"'-'=-- ~
....
r;::r
...
(19)

(9)
~~
T
j
G4

n...e-
tQ

•
(16)
AClR
(8)

(3)
...
-"
f-< ~ 1,2,4T/C3
!! p.-::-
QA

A 1,2,3R
1,2,30 p
0- M1
f- M2
,,{'L en
[ 4J
.......-
~ Go)
Go)
.l:

~~
U)

n
G4 .r- ca
4J
, t-< 1,2,4T/C3 ~
(15)
QB ca
C
B
(4)
~M1
h~
1,2,30 p
f- M2
-/1 .ML
~

C
(5)

J
,{'L f-
G4
M ~ 1,2,4T/C3

l.,.~
1,2,30
"'"" M1
M2
n...e-
tQ
to
(14)

~
G4 .r-
l=D~
I-< 1,2,4T/C3 tv (13)
l...-
I-< !! p-:-
o (6)
L-
1,2,3R

L...- M2
1,2,30
M1
10-
n
( r-Q:
~
logic diagrams for the four flip-flops are shown separately.

TEXAS • 2-279
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F569, SN74F569
SYNCHRONOUS 4·BIT ,UP/DOWN BINARY COUNTERS
WITH 3·STATE OUTPUTS

'F569 logic diagram (positive logic)

(17)
G V
(1)

~~
uil5
(2) (1e)
ClK

~
(12)
!NT
ENP
(7) ~ ' (19)
--==I
-f

(S) ~
(11) I
j
~
(e) -~
-v
G4

R
r:~.4T/C3

if.2.3R
~
+ (1S)

...C
(3)
A 1.2.30
C» ~
10- M1
C» - M2
(I)
'::J'
CD ~- r
...
CD
G4'

l
(15)
(II U.4T/C3 t::""j2
(4)
B
~M1
I""
1.2.30

f- M2

~
(5)
-J
G4

R
r.2.4T/C3

l.2.3R
+ (14)

-- l
C 1.2.30
M1
M2

,~
- G4

~
-d >r:2:.4T/C3 (13)
R
(S) if.2.3R

1
o 1.2.30
Y M1

~
'----i M2

Logic diagrams for the four flip-flops are shown separately.

2-280 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 76266
 SN54F568, SN54F569, SN74F568, SN74F569
SYNCHRONOUS 4-BIT UP/DOWN DECADE AND
BINARY COUNTERS WITH 3-STATE OUTPUTS

logic symbol, each flip-flop in 'F568 and 'F569 (positive logic)

TE G4
ClK 1,2.4TIC3
01
ClR
Q1
SYNC RESET (lNTERNAll 1,2,3R
02
DATA 1,2,30
03
MODE1 M1
MODE2 M2

logic diagram, each flip-flop in 'F568 and 'F569 (positive logic)

TE
(TOGGLE ENABlEI
---+------c

•
ClK )~--------------------_.

Q1 ...
(I)
CI)
CI)
DATA .c
MODE1 (I)

MODE2
...caca
C
~~--------- 03

FUNCTION TABLE, EACH FLIP-FLOP

COUNTER INPUTS FLIP-FLOP INPUTS OUTPUTS

AClR SClR lOAD ClK ClR MODE1 MODE2 TE ClK DATA Q Q
l X X X l X X X X X L H
H L X ! H L H X j X L H
H H L ! H H H X j H H L
H H L ! H H H X j L L H
H H H ! H L L H j x 00 00
H H H ! H L L L j X 00 00

TEXAS . " 2-281

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F568, SN14F568
SYNCHRONOUS 4·811 UP/DOWN DECADE COUNTERS
WITH 3'STATE OUTPUTS

'F568 typical load, count, and Inhibit sequences

G
I
AClR .J
SClR ~ LJ
I
lOAD ~ I LJ
I I
ENP ~ Ep'Q~:t:¢i.~~~
I I
ENT ~ ERQ~;n~ii~~
I I
UfO ~
ClK

I I I ; . I
QB IL.Jl
I I I
~H';~~ L.U
• I I

Dc I n
I I
~H'~~~ ril
I I

QD I I ~:~I;*~
I
liCO I
I
L.J L..J
eal I I I I Uo I
oU I

ASYNC
1 . 2
I4-CO~:T.j
0

SYNC SYNC
CLEAR lOAD
r~ 9
COUNT UP
2 3
4~14
3 2
COUNTDOWN
g 8
~~ INHI81T COUNTING./
CLEAR

2·282 TEXAS
INSTRUMENTS
..If
POST ,OFFICE BOX 865012 • DALLAS, TEXAS 76285
 SN54F569. SN74F569
SYNCHRONOUS 4·BIT UP/DOWN BINARY COUNTERS
WITH 3·STATE OUTPUTS

'F569 typical load, count,and inhibit sequences

G __________________________

~
U/iilS§§!
ClK

D ~RQRt:%~~®I~*~;Ul~~~1
I •
•
I I I
I
• ...
U)

CD
CD
.c
en
...caca
C

QD __~----~--I

LJ LJ
11 2 '0 113 C Uo 16 2 3 411 3 2 0 U 16 14
j..C~~NT.j ~'""---CDUNT u P - - - -...........I----COUNT OOWN---.~~... INHIBIT COUNTING.j
....

ASYNC SYNC SYNC

CLEAR CLEAR LOAD

. TEXAS'" 2-283
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75285
 SN54f568. SN54F569. SN74F568. SN74F569
SYNCH,RONOUS 4-BIT UP/DOWN DECADE AND
BINARY COUNTERS WITH 3-STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current .................................................. " - 30 mA ,to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . . . .. -0.5 to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to VCC
Current into outputs in the low state: RCO, CCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
Any Q; SN54F568, SN54F569 . . . . . . . . . . . . . . . .. 40 mA
Any Q; SN74F568, SN74F569 . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F568, SN54F569 ....... , . . . . . .. - 55°C to 125°C
SN74F568, SN74F569 .................. ooC to 70°C
Storage temperature range ......................................... - 65°C to 150°C

tTl)e input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F' SN74F'
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input vol,tage 2 2 V
cCD Vil low·level input voltage , ,"
0.8 0.8 V
VIK Input cl(lmp curr~nt Ji;•.' -18 -18 mA
Dr 10H High-level output current
i'iEO, ceo ,", , -1 -1
mA
t/) Any Q : ~.,.) -3 -3
:::r Low-level output current'
ReO, ceo ):" 20 20
mA
CD 10l AnyQ' 20 24
!en TA Operating free-air temperature -55 125 0 70 ·e

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F' SN74F'
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYP* MAX
VIK Vee = 4.5 V. II = -18 mA -1.2 -1.2 V
Vee - 4.5 V. 10H - -1 mA 2.5 3.4 2.5 3.4
Any output
VOH Vee = 4.75 V. 10H = -1 mAto -3mA 2.7 V
AnyQ Vee = 4.5 V. IOH=-3mA 2.4 3.3 2.4 3.3
~.~ Vee = 4.5 V. 10l = 20 mA 0.3 0.5 0.3 0.5
VOL Vee = 4.5 V. 10l = 20 mA 0.3 0.5 0.3 0.5 V
Any Q
Vee - 4.5 V. 10l - 24 mA ;, 0.35 0.5
10ZH Vee = 5.5 V. Vo = 2.7 V ',' 50 50 ~
10Zl Vee = 5.5 V, Vo = 0.5 V ,,' -50 -50 pA
II Vee - 5.5 V. VI - 7 V (> 0.1 0.1 mA
IIH Vee = 5.5 V. VI = 2.7 V ;:, 20 20 ~
~ ,
ENT,rnA5 -1.2 -1.2
III Vee = 5.5 V, VI = 0.5 V mA
I All other -0.6 -0.6
lOS' Vee = 5.5 V. Vo = 0 -60 -150 -60 -150 mA
lee Vee = 5.5 V, See Note 1 45 67 45 67 mA

*All typical values are at Vee = 5 V. TA = 25 ·e.

'Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second.
NOTE 1: lee is measured after applying a momentary 4.5 V, then ground, to the clock input with Band ENT. ACiJi. and SelR inputs
high and all other inputs low.

2-284 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 SN54F56l SN54F56t SN74F568, SN74F569
SYNCHRONOUS 4·BIT UP/DOWN DECADE AND
BINARY COUNTERS WITH 3·STATE OUTPUTS

timing requirements
VCC - 5 V, Vcc - 4,5 V to 5,5 V,
TA - 25°C TA - MIN to MAXt
UNIT
'F56B, 'F569 SN54F' SN74F'
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 90 MHz
Setup time, data lA, B, C, 01
tsu 4 4.5 ns
high or low before CLK!
Hold time, data lA, B, C, 01
thold 3 3.5 ns
high or low after CLK!
Setup time, EfiI15 and ENT
tsu 5 6 ns
high or low before CLK!
Hold time, EfiI15 and m
thold
high or low after CLK!
0 ,,}~\ 0 ns

,,:i; ~'
Setup time, LOAD
tsu 8 9 ns
high or low before CLK!
Hold time, LOAD ,,{po
thold 0 0 ns
high or low after CLK!
'F568, high 11 12.5

tsu
Setup time,
UfO before CLK!
'F568,
'F569,
'F569,
low
high
low
16.5
11
7
17.5
12.5
8
ns
...en
CI)
CI)
Hold time, UfO .c
thold
high or low after CLK!
0 0 ns
en
tsu
Setup time,
SCCR before CLK!
LHigh
Low
9.5
8.5
10.5
9.5
ns ...asas
Hold time, ~
0 0 ns
C
thold
high or low after CLK!
I High 4 4.5
tw Pulse duration, CLK ns
I Low 6 6.5
tw Pulse duration, ACLR low 4.5 5 ns
Inactive-state setup time,
tsu 6 7 ns
~ high before CLK!;

t For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
:t: Inactive-state setup time is also referred to as "recovery time".

TEXAS . . 2-285
INSTRUMENTS
POST OFFICE BOX 666012. DALLAS, TeXAS 75265
 SN54F56~ SN54F56L SN74F56~ SN74F569
SYNCHRONOUS4·BIT UP/DOWN DECADE AND
BINARY COUNTERS WITH 3·STATE OUTPUTS

switching characteristics (see Note 21

Vee = 5V, vee = 4.5Vt05.5V,
Cl=50pF, Cl = 50 pF,
Rl '7 50012, Rl=500Q,
FROM TO
PARAMETER R2 = 50012, R2 = 50012, UNIT
(INPUT) (OUTPUT)
TA = 25 D C TA = MIN to MAXt
'F568, 'F569 SN54F' SN74F'
MIN TYP MAX MIN MAX MIN MAX
f max 100 115 90 MHz
tplH 2.2 6.1 8.5 2.2 9.5
elK Q ns
tpHL 3.2 8.6 11.5 3.2 13
tpLH 4.7 11.6 15.5 4.7 17.5
eLK J!fe(j' ns
tpHL 3.2 8.1 11 3.2 12.5
tpLH 1.7 4.1 6 1.7 7
ENT RC1i ns
tpHL 1.7 5.6 8 1.7 9
tpLH 2.7 8.1 11 -;:(," 2.7 12.5
U/D ('F568) RCO ns
tpHL 3.2 12.1 16 "',' 3.2 18
tpLH 2.7 8.1 11 "",;)' 2.7 12.5
U/D (,F569) RCO ns
tpHL 3.2 7.6 10.5 'r 3.2 12
tpLH 1.7 5.1 7 1.7 8
eLK <:CO ns
C tpHL 1.2 4.1 6 1.2 7

...
I»
I»
tpLH
tpHL
ENP, ENT <:CO
1.7
3.2
4.6
8.1
6.5
11
1.7
3.2
7.5
12.5
ns

tpHL iiCCR Q 4.2 9.6 13 4.2 14.5 ns

(I)
::r tpZH
IT Q
1.7 5.1 7 1.7 8
ns
CD tpZL 2.2 5.6 8 2.2 9
!en tpHZ
tpLZ
G Q
1
1.2
4.6
4.1
6.5
6
1
1.2
7.5
7
ns

tFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.

2-286 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F573, SN74F573
OCTAL O·TYPE TRANSPARENT LATCHES
WITH 3·STATE OUTPUTS
JULY 1987 -REVISED JANUARY 1989

• 8 Latches in a Single Package SN54F573 ... J PACKAGE

SN74F573 ... OW DR N PACKAGE
• 3·State Bus·Driving True Outputs ITOP VIEW)

• Full Parallel Access for Loading oe Vee

• Buffered Control Inputs 10 10
20 20
• Package Options Include Plastic "Small 30 30
Outline" Packages, Ceramic Chip Carriers, 40 40
and Standard Plastic and Ceramic 300-mil 50 50
DIPs 60 60
• Dependable Texas Instruments Quality and 70 70
Reliability 80 80
GNO e
description
SN54F573 ... FK PACKAGE
These 8-bit latches feature three-state outputs ITOP VIEW)
designed specifically for driving highly capacitive U

II
or relatively low-impedance loads. They are Cl ClIU U
"'~O>~
a
particularly suitable for implementing buffer
registers, 110 ports, bidirectional bus drivers, and 3 2 1 20 19
working registers.
The eight latches of the 'F573 are transparent
4
5
6
18
17
16
...
II)
Q)
Ootype latches. While the enable (C) is high, the Q)
15 ~
Q outputs will follow the data (O) inputs. When f/)
14
the enable is taken low, the Q outputs will be
latched at the levels that were set up at the 0
inputs.
9 10 II 12 13

ClClUOO
coz CO""
...caca
l? C
A buffered output-control input (DC) can be used
to place the eight outputs in either a normal logic
FUNCTION TABLE (EACH LATCH)
state (high or low logic levels) or a high-
impedance state. In the high-impedance state, INPUTS OUTPUT
the outputs neither load nor drive the bus lines ire ENABLE C 0 0
significantly. The high-impedance third state and L H H H
increased drive provide the capability to drive the L H L L
bus lines in a bus-organized system without need L L X 00
for interface or pull-up components. H X X Z
The output control DC does not affect the
internal operations of the latches. Old data can
be retained, or new data can be entered while
the outputs are off.
The SN54F573 is characterized for operation
over the full military temperature range of
-55°C to 125°C. The SN74F573 is
characterized for operation from OOC to 70°C.

UNLESS OTHERWISE NOTED this ....um.nt .ontoinl Copyright @ 1987, Texas Instruments Incorporated
PRODUCTION DATA information .urrant •• of
publication dllla. Products .onform to spe.lfi.ation. . TEXAS ~ 2-287
par t.. IIrml of T.... Inltrumanto atlndan!
r:r~~"\!':i~~o~r,:.=:~~~ not n......rily INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F573, SN74F573
OGTAL D·TYPETRANSPARENT LA.TCHES
WITH 3·STATE OUTPUTS

logic symbol t logic diagram Ipositlve logic)

DC --'----a1 .::>----,

c c

10 (21
10
20
30
40 20 13)
50
60
70
80 (91 30 14}

tThis symbol is in accordance with ANSI/IEEE Std 91·1984 and

lEe Publication 617·12.
40 IS}

.
C
I»
I»
6D 18}

en
..
::r
CD
CD
(I)
8D (7) so

70 _1;,;;8;...}- - H 70

80 191

2-288 TEXAS . "

INSTRUMENlS
POST OFFICE BOX 655012 • DALLAS. TeXAS 76285
 SN54F573, SN74F573
OCTAL D·TVPE TRANSPARENT LATCHES
WITH 3·STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state . . . . . . . . . . . . .. - 0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
Current into any output in the low state: SN54F573.............................. 40 mA
SN74F573 .............................. 48 mA
Operating free-air temperature range: SN54F573. . . . . . . . . . . . . . . . . . . . . . . .. - 55°C to 125°C
SN74F573 ............................ ooe to 70°C
Storage temperature range ......................................... - 65°C to 1 50°C

tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F573 SN74F573
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High-level input voltage 2 .·it 2 V
Vil Low-level input voltage -,,/,<- . 0.8 0.8 V
11K Input clamp current
High-level output current ::)v
/'. -18 -18 mA ....CIl
Q)
IOH -3 -3 mA
Q)
IOl Low-level output current .'.~ 20 24 mA
.J:.
TA Operating free-air temperature -55 125 0 70 °e CJ)

electrical characteristics over recommended operating free-air temperature range (unless otherwise ....COCO
noted)
C
SN54F573 SN74F573
PARAMETER TEST CONDITIONS UNIT
MIN Typf MAX MIN Typf MAX
VIK Vee = 4.5 V, II = -18mA -1.2 -1.2 V
IIOH = -1 mA 2.5 3.4 2.5 3.4
Vee = 4.5 V
VOH IIOH = -3 mA 2.4 3.3 2.4 3.3 V
Vee = 4.75 V, IOH = - 1 to - 3 mA 2.7
IIOl = 20 mA 0.30 0.5
VOL Vee = 4.5 V
.'r.;}~
V
IIOl = 24 mA 0.35 0.5
IOZH Vee = 5.5 V, Vo = 2.7 V .:.;-. 50 50 "A
IOZl Vee = 5.5 V, Vo = 0.5 V ,« -50 -50 "A
II Vee = 5.5 V, VI - 7 V .:V 0.1 0.1 mA
IIH Vee = 5.5 V, VI= 2.7 V .;$- 20 20 "A
III Vee = 5.5 V, VI= 0.5 V <c -0.6 -0.6 mA
IOS§ Vee = 5.5 V, Vo = 0 -60 -150 -60 -150 mA
leez Vee = 5.5 V, See Note 1 38 55 38 55 mA

fAil typical values are at Vee = 5 V, TA = 25°e.

§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed 1 second.
NOTE 1: leez is measured with oe at 4.5 V and all other inputs grounded.

TEXAS
INSTRUMENTS
'Ii1 2-289

POST OFFICE BOX 655012 • DALLAS, TEXAS 75265

 SN54F573, SN74F573
OCTAL D·TYPETRANSPARENT LATCHES
WITH 3·STATE OUTPUTS

timing requirements
Vee - 5 V, Vee - 4,5 V to 5.5 V,
TA - 25°C TA - MIN to MAXt
UNIT
'F573 SN54F573 SN74F573
MIN MAX MIN MAX MIN MAX
tsu Setup time, Data before Enable C. 2 ,c-.j\'C.\III 2 ns
th Hold time, Data before Enable C. 3 ,\C"\ 3 ns
tw Pulse duration, Enable C high 6 1" 6 ns

switching characteristics (see Note 2)

Vee - 5 V, Vee - 4.5Vto 5.5 V,
el - 50 pF, el - 50 pF,
R1 - 50011, R1 - 50011,
FROM TO
PARAMETER R2 - 50011, R2 - 500.11, UNIT
(INPUT) (OUTPUT)
TA - 25°C TA - MIN to MAXt
'F573 SN54F573 SN74F573
MIN TYP MAX MIN MAX MIN MAX
tplH 2 4.9 7 2.2 8
0 a 1.2 3.3 5 1.2 6
ns
tpHl
4.2 8.6 11.5 4.2 13
c tplH
C a .,;,,<\'.:.'"
ns

...
Q)
Q)
tpHl
tpZH
rn: a
2.2
1.2
1.2
4.8
4.6
5.2
7
11
7.5
C'.,,'.!V
.• C\ \' 2.2
1.2
1.2
8
12
8.5
ns
tpZl
en tpHZ
OC a
1.2 4.1 6.5 1.2 7.5
ns
:::T tpLZ 1.2 3.4 6 1.2 6
CD
CD
... tFor conditions shown as MIN or MAX, use the appropriate value specified under Racommended Operating Conditions.
VI NOTE 2: load circuits and waveforms are shown in Section 1.

'To
..• .
EXAS "is
~
2-290
INSTRUMENTS
POST OFFICE BOX 655012 • DALlAS, TeXAS 15265
 SN54F514, SN14F514
OCTAL. D·TYPE EDGE·TRIGGERED FLlp·FLOPS WITH 3·STATE OUTPUTS
03034, SEPTEMBER 19B7 - REVISED JANUARY 1989

• B D·Type Flip·Flops in a Single Package SN54F574 ..• J PACKAGE

SN74F574 ... OW OR N PACKAGE
• 3·State Bus·Driving True Outputs (TOP VIEW)
• Full Parallel Access for Loading
oe Vee
• Buffered Control Inputs 10 10
20 20
• Package Options Include Plastic "Small
30
Outline" Packages, Ceramic Chip Carriers,
40
and Standard Plastic and Ceramic 300-mil
50 50
DIPs
60 60
• Dependable Texas Instruments Quality and 70 70
Reliability 80
GNO elK
description
These a-bit flip-flops feature 3-state outputs SN54F574 ... FK PACKAGE
designed specifically for driving highly capacitive (TOP VIEW)

Ell
or relatively low-impedance loads. They are U
particularly suitable for implementing buffer C CIU Ud
N~O>~
registers, I/O ports, bidirectional bus drivers, and 3 2 1 20 19
working registers.
The eight flip-flops of the 'F574 are edge-
18
17
...
en
Q)
Q)
triggered D-type flip-flops. On the positive 16
transition of the clock, the Q outputs will be set
..c
15
en
to the logic levels that were set up at the 0
inputs. 9 1011 12 13
14
...
CO
CO
A buffered output-control input (DC) can be used C
to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-
impedance state. In the high-impedance state, FUNCTION TABLE (EACH FLIP-FLOP)
the outputs neither load nor drive the bus lines INPUTS OUTPUT
significantly. The high-impedance third state and
OC ClK 0 Q
increased drive provide the capability to drive the
l T H H
bus lines in a bus-organized system without need
l T l L
for interface or pull-up components.
L l X Qo
The output control does not affect the internal H X X Z
operations of the flip-flops. Old data can be
retained, or new data can be entered while the
outputs are in the high-impedance state.
The SN54F574 is characterized for operation
over the full military temperature range of
-55 D C to 125 D C. The SN74F574 is
characterized for operation from 0 DC to 70 DC.

UILESS OTHERWISE IOTEO Ibll ....um.nt ..nllin. Copyright © 1987. Texas Instruments Incorporated
PROOUCTIOI DATA inl.....lloo ••rnot •• of
~ all. Producta ...form to III8CIflclli.1II
plr tba terms of T.... Intr....nia .lInd.nI TEXAS . " 2-291
:~=.'::.r='"":::!- not n..-artly INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75265
 SN54F57'4, SN74F574
OCTAL D·TYPE EDGE·TRIGGERED FLlp·FLOPS WITH 3·STATE OUTPUTS

logic symbol t logic diagram (positive logic)

oc
elK

10 (19) 10

20 (18) 20
20.:.:(3;:')--H
(4) (17) 30
3D
(5) (16) 40
40
(61 (15) 50
50 30(:..:4;:')--H
(7) (14) 60
60
(81 (13) 70
70
(9) (12) 80
80 40(5)

tThis symbol is in accordance with ANSI/IEEE Std 91-1984 and

lEe Publication 617-12.
50.:..:(6.:.1_-+-1

60:o(7-'.)_ _H

70!.:(8:':')--H

80!.:19:.:.)_ _--I

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state .............. '.' . . . . . .. . . . .. -0.5 V to Vee
eurrent into any output in the low state: SN54F574 . . . . . . . . . . . . . .. . .. . . . . . . . . . . . .. 40 mA
SN74F574 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 48 mA
Operating free-air temperature range: SN54F574. . . . . . . . . . . . . . . . . . . . . . . .. - 55 °e to 125°e
SN74F574 ............................ OOeto70oe
Storage temperature range ..................................... :... - 65 °e to 150 0 e
:I: The input voltage ratings may be exceeded provided the input current ratings are observed .

2-292 . .. TEXAS'"
INSTRUMENTS
POST· OFFICE BOX 655012 • DALLAS, TeXAS 75265
 SN54F574. SN74F574
OCTAL D·TYPE EDGE·TRIGGERED FLlp·FLOPS WITH 3·STATE OUTPUTS

recommended operating conditions

SN54F574 SN74F574
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 .....
~ 2 V
Vil low-level input voltage -Q.'(; 0.8 0.8 V
11K Input clamp current ... -18 -18 mA
IOH High-level output current ~v -3 -3 mA
IOl low-level output current ~'t'- 20 24 mA
TA Operating free-air temperature -55 125 0 70 DC

electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F574 SN74F574
PARAMETER TEST CONDITIONS UNIT
MIN TVpT MAX MIN Typt MAX
VIK VCC = 4.5 V. II = -18mA -1.2 -1.2 V
II0H=-lmA 2.5 3.4 2.5 3.4
VCC = 4.5 V
VOH IIOH = -3 mA 2.4 3.3 2.4 3.3 V
Vee = 4.75 V. IOH = -1 to -3 mA 2.7

VOL

IOZH
VCC = 4.5 V

VCC = 5.5 V,
IIOl=20mA
IIOl=24mA
Vo = 2.7 V
0.3

~'v
-"
0.5

50
0.35 0.5
50
V

p.A
...
CI)
II)
II)
10Zl VCC = 5.5 V, Vo = 0.5 V <1,"<' -50 -50 p.A .J:.
II VCC - 5.5 V, VI - 7 V (. 0.1 0.1 mA en
IIH
III
Vce
VCC
=
=
5.5
5.5
V,
V,
VI = 2.7 V
VI = 0.6 V ~
.o'V 20
-0.6
20
-0.6
p.A
mA ...caca
10S* VCC = 5.5 V, Vo = 0 -60 -150 -60 -150 mA C
ICCZ VCC = 5.6 V, See Note 1 55 86 55 86 mA

t All typical values are at VCC = 5 V, TA = 25 DC.

* Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed 1 second.
NOTE 1: ICCZ is measured with rn:and ClK at 4.6 V and the data inputs grounded.

TEXAS ." 2-293

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F574, SN74F574
OCTAL D·TYPE EDGE·TRIGGERED FLfp·FLOPS WITH 3·STATE OUTPUTS

timing requirements
Vee - 5 V, Vee - 4.5 V to 5.5 V,
TA - 25 0 e TA - MIN to MAXt
UNIT
'F574 SN54F574 SN74FS74
MIN MAX MIN MAX MIN MAX
fclock Clock frequency 0 100 0 60 0 70 MHz

Setup time before ClKt

Data high 2 2.S ,,<:v"- 2
ns
tsu
Data.low 2 2 ,'?c'" Cc 2
Data high 2 2 ,\" 2
th Hold time after CLK! ns
Data low 2 .~<6v 2
ClK high 7 7 7
tw Pulse duration ns
ClK low 6 6 6

switching characteristics (see Note 21

Vee - S V, vee - 4.S V to 5.S V,
el - 50 pF, eL - so pF"
Rl - 5000, Rl - 5000,
FROM TO
PARAMETER R2 - 5000, R2 - SOO 0, UNIT
(INPUT) (OUTPUTI
TA - 2soe TA - MIN to MAXt
'FS74 SNS4FS74 SN74F574
C MIN TYP MAX MIN MAX MIN MAX
I»
~
I»
f max
tplH
100
3.2 6.1 8.5
60
3.2
-".. 70
,,,,-:to. 5 3.2 10
MHz

t/)
ClK a 3.2 6.1 8.5 3.2 </<l:v 11 3.2 10
ns
tpHL
::r tpZH
~ a 1.2 8.6 11.5 1.2,,:§ 14 1.2 12.5
CD ns
CD tpZL 1.2 4.9 7.5 l~v 10 1.2 8.5
~
tpHZ 1.2 4.9 7 U 8 1.2 8
(II ~ a 1.2 3.9 5.5 1.2 7.5 1.2 6.5
ns
tplZ

tFor conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.

2-294 TEXAS ."

INSfRUMENlS
POST OFFICE BOX 65501.2 • DALLAS, TEXAS 75285
 SN54F620 THRU SN54F623, SN74F620 THRU SN74F623
OCTAL BUS TRANSCEIVERS
02932, MARCH 1987 - REVISED JANUARY 1989

• Local Bus-Latch Capability SN54F' ... J PACKAGE

SN74' ... OW OR N PACKAGE
• Choice of Inverting or Noninverting Logic ITOP VIEW'
• Choice of 3-State or Open-Collector Outputs GAB Vee
• Package Options Include Plastic "Small AI GBA
Outline" Packages, Ceramic Chip Carriers A2 Bl
and Standard Plastic and Ceramic 300-mil A3 B2
DIPs A4 B3
A5 B4
• Dependable Texas Instruments Quality and A6 B5
Reliability A7 B6
A8 B7
DEVICE OUTPUT LOGIC GND B8
'F620 3-State Inverting
'F621 Open-Collector Noninverting
SN54F' ... FK PACKAGE
'F622 Open-Collector Inverting
ITOP VIEW'
'F623 3-State Noninverting
N .....
Ol
<C
U
um
«
description «« (!) > I(!)

3 2 1 2019
These octal bus transceivers are designed for
asynchronous two-way communications A3 4 18 CI)
5 17 ~
between data buses, The control function A4 CI)
implementation allows for maximum flexibility in A5 6 16 CI)
timing, A6 7 15 .s:
(/)
A7 8 14
These devices allow data transmission from the 9 1011 1213 CO
~
A bus to the B bus or from the B bus to the A
OlO'" .... co CO
bus depending upon the logic levels at the enable
inputs (GBA and GAB). .
«ZOl 0l0l
(!) C
The enable inputs can be used to disable the
device so that the buses are effectively isolated,
The dual-enable configuration gives the octal bus transceivers the capability to store data by simultaneous
activation of GBA and GAB, Each output reinforces its input in this transceiver configuration. When both
control inputs are activated and all other data sources to the two sets of bus lines are at high impedance,
both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing'on the two sets
of buses will be identical for 'F621 and 'F623, or complementary for the 'F620 and 'F622,
The SN54F620 through SN54F623 are characterized for operation over the full military temperature range
of - 55°C to 125°C, The SN74F620 and SN74F623 are characterized for operation from OOC to 70°C.

FUNCTION TABLE

ENABLE INPUTS OPERATION

GBA GAB 'F620, 'F622 'F621, 'F623
L L Ii data to A bus B data to A bus
H H A data to B bus A data to B bus
H L Isolation Isolation
Ii data to A bus, B data to A bus,
L H
A data to B bus A data to B bus

UNLESS OTHERWISE NOTED this .....m..t ...lli•• Copyright © 1987, Texas Instruments Incorporated
PRODUCTION DATA iofarmlli•••urnot I. of
~:"=O~:'::, ~d1:':"V!"IIr::.:.:,.i~~:~ TEXAS . " 2-295
Wlrnnty, PnductIon ...-Ing d... nat n......rily INSTRUMENTS
1••ludo lolling of .If po.amllarL POST OFFICE BOX 656012 • DALLAS, TEXAS 75265
2-296 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 655012 ." DALLAS, TEXAS 75265
 SN54F620 THRU SN54F623, SN74F620 THRU SN74F623
OCTAL BUS TRANSCEIVERS

logic diagrams (positive logic)

'F620 'F621

GBA-----<~ GBA-----OI

GAB GAB

A1 B1 A1 B1

A2 B2 A2 B2

TO OTHER SIX TO OTHER SIX

TRANSCEIVERS TRANSCEIVERS

'F622 'F623

GBA------<OI GBA---~::.t

GAB GAB

A1 B1 A1 B1

A2 B2 A2 B2

TO OTHER SIX TO OTHER SIX

TRANSCEIVERS TRANSCEIVERS

TEXAS . " 2-297

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75266
 SN54F620, SN54F623, SN74F620, SN74F623
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . •. . . . . . . . . . . . . . . . . . . .. - 1.2 V to 7 V
Input current. . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . .. - 30 mA to 5 mA
Voltage applied to any outpufin the disabled or power-off state. . . . . . . . . . . . .. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vee
eurrent into any output in the low state: SN54F620, SN54F623 (Any A) .............. 40 mA
(Any B) .............. 96 mA
SN74F620, SN74F623 (Any A) ............. 128 mA
(Any B) .............. 48 mA
Operating free-air temperature range: SN54F620, SN54F623 ............... - 55 °e to 125°e
SN74F620, SN74F623 ................... ooe to 70 0 e
Storage temperature range ......................................... - 65 °e to 1 50 °e
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F620 SN74F620
SN54F623 SN74F623 UNIT
MIN NOM MAX MIN NOM MAX
vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
Vll low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 mA
Any A -3 -3
IOH High·level output current mA
Any 8 -12 -15
Any A 20 24
IOl Low-level output current rnA
Any 8 48 64
TA Operating free-air temperature -55 125 0 70 ·e

2-298 TEXAS ~
INSTRUMENTS
POST OFFICE BOX 656012 • DALLAS. TEXAS 75285
 SN54F620. SN54F623. SN74F620. SN74F623
OCTAL BUS TRANSCEIVERS WITH 3·STATE OUTPUTS

electrical characteristics over recommended operating free·air temperature range (unless otherwise
noted)
SN54F620 SN74F620
PARAMETER TEST CONDITIONS SN54F623 SN74F623 UNIT
MIN TYpt MAX MIN Typt MAX
VIK Vee - MIN, II - -18mA -1.2 -1.2 V
A and B Vee = 4.75 V IOH = -1 mA to -3 mA 2.7
10H = -1 mA 2.5 3.4 2.5 3.4
Any A
10H - -3 mA 2.4 3.3 2.4 3.3
VOH V
Vee = 4.5 V 10H = -3 mA 2.4 3.3 2.4 3.3
Any B 10H = -12 mA 2 3.2
10H - -15 mA 2 3.1
IOl = 20 mA 0.3 0.5
Any A
IOl = 24 mA 0.35 0.5
VOL Vee = 4.5 V V
10l = 48 mA 0.38 0.55
Any B
10l = 64 mA 0.42 0.55
A and B VI = 5.5 V 1 1
II Vee = 5.5 V mA
GAB or~BA VI - 7 V 0.1 0.1
A and B 70 70
IIH* Vee = 5.5 V, VI = 2.7 V p.A
GABor~BA 20 20

III * A and B
GAB or~BA
Vee = 5.5 V, VI = 0.5 V
-0.65
-0.6
-0.65
-0.6
mA ...
U)

CD
Any A -60 -150 -60 -150 CD
10S§
Any B
Vee = 5.5 V, Vo = 0
-100 -225 -100 -225
mA .c
G"BA=GAB=4.5 V,
en
'F620
leeH
Al- A8=GND
~BA=GAB=4.5 V,
70

84
92

110
70

84
92

110
...
CO
CO
leel
Al-A8=4.5 V C
GAB=GND,
leez 70 92 70 92
GBA=Al-A8=4.5 V
lee Vee = 5.5 V mA
~BA=GAB=4.5 V,
leeH 110 140 110 140
Al-A8=4.5 V
G"BA=GAB=4.5 V,
'F623 leel 110 140 110 140
Al- A8=GND
GAB-GND,
leez 99 130 99 130
~BA=Al-A8=4.5 V

t All typical values. are at Vee = 5 V, TA = 25 ·e.

* For 110 ports, the parameters IIH and III include the off-state output currant.
§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

TEXAS . " 2-299

INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS, TeXAS 75265
 SN54F620, SN54F623, SN74F620, SN74F623
OCTAL BUS TRANSCEIVERS WITH 3·STATE OUTPUTS

'F620 switching characteristics (see Note 11

Vcc - 5 V, vcc -
MIN to MAX',
CL - 50 pF, CL - 50 pF,
Rl - 5000, Rl - 5000,
FROM TO
PARAMETER R2 - 5000, R2 - 5000, UNIT
(INPUT) (OUTPUT)
TA - 25 GC TA - MIN to MAXt
'F620 SN54F620 SN74F620
MIN TYP MAX MIN MAX MIN MAX
tpLH 1.7 4.1 6.5 1.2 8.5 1.2 7.5
A B ns
tpHL 1 2.1 4.5 1 5.5 1 5
tpLH 1.7 4.1 6.5 1.2 8.5 1.2 7.5
B A ns
tpHL 1 2.1 4.5 1 5.5 1 5
tpZH 2.2 7.1 10.5 1.7 12 1.7 11.5
GBA A ns
tpZL 3.2 7.1 10.5 2.7 12.5 2.7 11.5
tpHZ 1.7 4.1 7.5 1.2 9 1.2 8
GBA A ns
tpLZ 1.2 4.1 7 1 8.5 1 7.5
tpZH 3.7 7.1 10.5 2.5 12 3.2 11.5
GAB B ns
tpZL 3.7 7.1 10 3.2 12 3.2 11
tpHZ 2.2 6.1 9.5 1.7 11 1.7 10.5
GA8 B ns
tpLZ 3.2 6.1 9.5 2.7 11.5 2.7 10.5
c
~ 'F623 switching characteristics (see Note 11
Q)
Vcc - 5 V, vcc -
MIN to MAXt,
en CL - 50 pF, CL - 50 pF,
:T Rl - 5000, Rl - 5000,
CD FROM TO
CD PARAMETER R2 - 5000, R2 - 5000, UNIT
P+ (INPUT) (OUTPUT)
en TA - 25 GC TA - MIN to MAXt
'F623 SN54F623 SN74F623
MIN TYP MAX MIN MAX MIN MAX
tpLH 1.2 3.6 5.5 1.1 6.8 1.2 6.5
A B ns
tPHL 2.2 4.6 7 1.6 8 1.7 7.5
tPLH 1.2 3.6 5.5 1.1 6.8 1.2 6.5
B A ns
tpHL 1.7 4.1 6.5 1.6 8 1.7 7.5
tpZH 3.1 8.1 10.5 2.7 12.4 3.1 12
GBA A ns
tpZL 2.8 7.1 9.5 2.5 10.3 2.8 10
tpHZ 1.7 4.1 6.5 1.6 8.3 1.7 7.5
GBA A ns
tpLZ 1.7 4.1 6.5 1.5 7.4 1.7 7
tpZH 2.8 7.6 10 2.7 12 2.8 H.5
GAB B ns
tpZL 2.8 6.6 9 2.B 10 2.9 9.5
tpHZ 2.2 5.6 8.5 1.9 10 2.2 10
GAB B ns
tpLZ 3.2 6.6 9 3.1 10.7 3.2 10

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditons.
NOTE 1: Load circuits and waveforms are shown in Section 1.

2-300 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS, TEXAS 75265
 SN54F621, SN74F621
OCTAL BUS TRANSCEIVERS WITH OPEN·COLLECTOR OUTPUTS

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, Vee. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 5.5 V
Current into any output in the low state: SN54F621 (Any A) ........................ 40 mA
(Any B) . . . . . . . . . . . . . . . . . . . . . . .. 96 mA
SN74F621 (Any A) ........................ 48 mA
(Any B) ....................... 128 mA
Operating free·air temperature range: SN54F621......................... - 55°C to 125°C
SN74F621 ............................ DoC to 70°C
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F621 SN74F621
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL
11K
Low-level input voltage
Input clamp current
O.S
18
O.S
18
V
mA
...
II)

Q)
VOH High-level output voltage 5.5 5.5 mA Q)
I Any A 20 24 ~
10L Low-level output current
I Any B 4B 64
mA en
TA Operating free-air temperature -55 125 0 70 °e ...
CO
CO
electrical characteristics over recommended operating free-air temperature range (unless otherwise 0
noted)
SN54F621 SN74F621
PARAMETER TEST CONDITIONS UNIT
MIN TYP; MAX MIN TYP; MAX
VIK Vec = 4.5 V, 11=-18mA -1.2 -1.2 V
10H Vec = 4.5 V, VOH = 5.5 V 0.1 0.1 mA
10L = 20 mA 0.3 0.5
Any A
10L = 24 mA 0.35 0.5
VOL Vec = 4.5 V V
10L = 48 mA 0.38 0.55
Any B
10L = 64 mA 0.42 0.55
A and B VI = 5.5 V 1 1
IL Vec = 5.5 V mA
GAB or ~BA VI = 7 V 0.1 0.1
A and B 70 70
IIH§ Vee = 5.5 V, VI = 2.7 V ~A
GAB or ~BA 20 20
A and B -0.65 -0.65
IlL § Vee = 5.5 V, VI = 0.5 V mA
GAB or ~BA -0.6 -0.6
leeH 105 140 105 140
lee Vcc = 5.5 V mA
ICCL 105 140 105 140

tAli typical values ere atVeC = 5V,TA = 25°C.

§ For I/O ports, the parameter. IIH and IlL include the off-state output current.

TEXAS ~ 2-301
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 75266
 SN54F622, SN74F622
OCTAL· BUS TRANSCEIVERS WITH OPEN·COLLECTOROUTPUTS

absolute maximum ratings over operating free·air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . .. -1.2 V to 7 V
Input current .................................................... ' - 30 mA to 5 mA
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 5.5 V
Current into any output in the low state: SN54F622 (Any A) . . . . . . . . . . . . . . . . . . . . . . .. 40 mA
(Any B) . . . . . . . . . . . . . . . . . . . . . . .. 96 mA
SN74F622 (Any A) ........................ 48 mA
(Any B) ....................... 128 mA
Operating free-air temperature range: SN54F622......................... - 55°C to 125°C
SN74F622 ............................ OOCto70oC
Storage temperature range ......................................... - 65°C to 150°C
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F622 SN74F622
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 6.6 V
VIH High·level input voltage 2 ~;\ :2 V

c
CI)
VIL
11K
Low·level input voltage
Input clamp current
~;::.v
,-1:'-
0.8
-18
0.8
-18
V
mA
r+ High·level output voltage 5.5 6.5 mA
CI) VOH

en 10L Low·level output current

I Any A \c:': 20 24
mA
I Any B '(" 48 64
::T
CD TA Operating free·air temperature -55 125 0 70 ·e
CD
c: electrical characteristics over recommended operating free-air temperature range (unless otherwise
noted)
SN54F622 SN74F622
PARAMETER TEST CONDITIONS UNIT
MIN TYP* MAX MIN TYpJ MAX
VIK Vee = 4.5 V, II - -18 mA -1.2 -1.2 V
10H Vee = 4.5 V, VOH = 5.5 V 0.1 0.1 rnA
10L = 20 mA 0.3 0.5
Any A 0.36 0.5
10l';' 24 mA
VOL Vee = 4.5 V 10l = 48 mA 0.38 0.55
V
Any B
10l = 64 mA 0.42 0.55
A and B VI = 5.5 V 1 1
Il
GAB orCl'BA
Vee = 5.5 V
VI ;= 7 V \: 0.1 0.1
rnA

A and B
= 2.7 V '5' 70 70
IIH§ Vee = 5.5 V, VI p.A
GAB orCl'BA ",' 20 20
A and B " -0.65 -0.65
III §
GAB orCl'BA
Vee = 5.5 V, VI = 0.5 V
-0.6 -0.6
rnA
.. 37 48 37 48
IleeH .,'
ICC Vee = 5.5 V rnA
I leel 68 90 68 90

tAli typical values are at Vee = 5 V, TA = 25·e.

§For 1/0 ports, the parameters IIH and IlL include the off·state output current.

2-302 TEXAS " ,

INSTRUMENTS
POST OFFICE BOX 655012 • CALLAS, TeXAS 75266
 SN54F621, SN54F62~ SN74F621, SN74F622
OCTAL BUS TRANSCEIVERS WITH 3·STATE OUTPUTS

'F621 switching characteristics (see Note 1)

Vcc = 5V. vcc = 4.5Vt05.5V.
CL=50pF. CL = 50pF.
Rl = 500 0. Rl = 500 0.
FROM TO
PARAMETER R2 = 500 0. R2 = 500 0. UNIT
(INPUT) (OUTPUT)
TA = 25°C TA = MIN to MAxt
'F62l SN54F621 SN74F621
MIN TYP MAX MIN MAX MIN MAX
tpLH 6 9.5 12 5.5 13 5.5 13
A B ns
tpHL 2.5 3.8 8 2 8.5 2 8.5
tpLH 6 9 12 5.5 12.5 5.5 12.5
B A ns
tpHL 2.5 4 7.5 2 8 2 8
tpLH 6 10 13.5 5.5 14 5.5 14
GBA A ns
tpHL 3.5 6.5 10.5 2.5 11 2.5 11
tpLH 7 12 15 6 17 6 17
GAB B ns
tpHL 3.5 6.5 9.5 3 10 3 10

'F622 switching characteristics (see Note 1)

Vcc = 5 V. Vcc = 4.5 V to 5.5 V.
CL = 60 pF. CL = 50 pF.

FROM TO
Rl = 500 Q. R1 = 5002. ....
II)
Q)
PARAMETER R2 = 500 Q. R2 = 500 Q. UNIT Q)
(INPUT) (OUTPUT)
TA = 25°C TA = MIN to MAXt .c:
'F622 SN54F622 SN74F622 (/)
MIN TYP MAX MIN MAX MIN MAX
tplH
A B
7.2 10.6 12.5 7.2 13.5
ns
....COCO
tpHL 1 3.6 5.5 ... 1 6
tplH 6.7 9.6 12 6.7 12.5
C
B A <,);- ns
tpHl 1 3.1 5 1 5.5
tpLH 7.2 10.1 12 7.2 12.5
GBA A ns
tpHl 4 7.6 10 4 10.5
tplH 9.2 12.1 14.5 9.2 15.5
GAB B ns
tpHL 4 7.1 9 4 9.5

tFor conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 1: load circuits and waveforms are shown in Section 1.

TEXAS • 2-303
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
2-304
 SN54F657, SN74F657
OCTAL TRANSCEIVERS WITH 8-BIT PARITY GENERATORS/CHECKERS
AND 3-STATE OUTPUTS
03217. JANUARY 1989

• Combines 'F245 and F280B Functions in SN54F657 ... JT PACKAGE

One Package SN74F657 ... ow OR NT PACKAGE
(TOP VIEW)
• High-Impedance N-P-N Inputs for Reduced
Loading (70 p.A in Low end High States) T/R G
A1 B1
• High Output Drive and Light Bus Loading A2 B2
• 3-State B Outputs Sink 48 mA or 64 mA B3
and Source 12 mA or 15 mA A4 B4
A5 GND
• Input Diodes for Termination Effects Vee GND
• Package Options Include Plastic "Small A6 85
Outline" Packages, Ceramic Chip Carriers, A7 86
and Standard Plastic and Ceramic 300-mil AS B7
DIPs ODD/EVEN BB
ERROR PARITY
description
SN54F657 ... FK PACKAGE
The 'F657 contains 8 noninverting buffers with
(TOP VIEW)
3-state outputs and an 8-bit parity generator/
checker, and is intended for bus-oriented
applications. The buffers have a specified current
sinking capability of 20 mA or 24 mA at the 432 1 282726
A port and 48 mA or 64 mA at the B port. 5 25
6 24
The T /A" input determines the direction of the
7 23
data flow through the bidirectional transceivers.
When T/A" is high, data is transmitted from the
8 22 co
~

A port to the B port. When T/R is low, data is

9 21 co
received at the A port from the B port.
10 20 C
11 19
When the G input is high, both the A and B ports 12131415161718
are placed in a high-impedance state (disabled). LDOOU<tMN
The ODD/EVEN input allows the user to select mzzzmmm
l?l?
between odd or even parity systems. When
transmitting from port A to port B (T/R high), NC - No internal connection
PARITY is an output from the generator/checker.
When receiving from port B to port A (T/A" low).
PARITY is an input.
When transmitting (T/R high), the parity-select (ODD/EVEN). input is made high or low as appropriate.
The A port is then polled to determine the number of high bits. The PARITY output goes to the logic state :>
determined by the parity-select (ODD/EVEN) input and the number of high bits on port A. When ODD/EVEN :>
is low (for even parity) and the number of high bits on port A is odd, then PARITY will be high, transmitting
even parity. If the number of high bits on port A is even, the PARITY will be low, keeping even parity. :>W
W
a:
c..
t-
(.)
::J
C
oa:
c..
PRODUCT PREVIEW documents CDn'ain infarmatiDn Copyright © 1989, Texas Instruments Incorporated
an prodlcls in the formative or design ~h8S8 of
development. Characteristic data anll othar TEXAS .." 2-305
=~i::~=:'r~~ dt'::ir.r.:'!rT:.::~~:~:~::.~
preducts without noticl.
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 SN54F657, SN74657
OCTAL TRANSCEIVERS WITH 8·BIT PARITY GENERATORS/CHECKE~S
AND 3·STATE OUTPUTS

description (continued)
When in the receive mode (T/R low), the B port is polled to determine the number of high bits. If ODD/EVEN
is low (for even parity) and the number of highs on port B is:
1. Odd and PARITY input is high, then ERROR will be high signifying no error.
2. Even and the PARITY input is high, then ERROR will be low indicating an error.

The SN54F657 is characterized for operation over the full military temperature range of - 55 °e to 125 °e.
The SN74F657 is characterized for operation from ooe to 70 o e,

FUNCTION TABLE

NUMBER OF A OR B INPUTS INPUT/OUTPUT OUTPUTS

INPUTS THAT ARE HIGH G T/R ODD/MN PARITY EliImii OUTPUT MODE
L H H H Z Transmit
L H L L Z Transmit
L L H H H Receive
0.2.4.6.8
L L H L L Receive
L L L H L Receive
L L L L H Receive
L H H L Z Transmit
C
...
m
m 1.3.5.7
L
L
L
H
L
L
L
H
H
H
H
L
Z
L
H
Transmit
Receive
Receive
tn L L L H H Receive
';1' L L L L L Receive
CD
...
CD
(I)
DON'T CARE H X X Z Z Z

logic symbol t

"a
:rI
o
C
c:
o
-I
"a
:rI
m
<
-
~
tThis symbol is in accordance with ANSI/IEEE Std. 91-1984 and lEe Publication 617-12.
Pin numbers shown are for OW. JT. and NT packages.

2·306 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TEXAS 76285
 SN54F657, SN74F657
OCTAL TRANSCEIVERS WITH 8·BIT PARITY GENERATORS/CHECKERS
AND 3·STATE OUTPUTS

logic diagram (positive logic)

A3 ",(4,-+'-t.--

...
II)

Q)
Q)
~
tJ)

...
CO
CO
Q

~
w
111}
ODoJ!'i1!ll 5>
w
a:
Q.
....
CJ
::>
o
o
Pin numbers shown are for OW, JT, and NT packages. a:
Q.

TEXAS ." 2-307

INSTRUMENlS
POST OFFICE BOX 655012 • DALLAS, TeXAS 15266
 SN54F651, SN14F651
OCTAL TRANSCEIVERS WITH 8-BIT PARITY GENERATORS/CHECKERS
AND 3-STATE OUTPUTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to 7 V
Input voltage (excluding I/O ports) t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. -1.2 V to 7 V
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. - 30 mA to 5 mA
Voltage applied to any output in the disabled or power-off state .............. -0.5 V to 5.5 V
Voltage applied to any output in the high state. . . . . . . . . . . . . . . . . . . . . . . . . . .. -0.5 V to Vce
Current into any output in the low state: SN54F657 (A 1 thru A8) . . . . . . . . . . . . . . . . . . .. 40 mA
SN54F65? (B1 thru B8) .................... 96 mA
SN74F657 (A 1 thru A8) . . . . . . . . . . . . . . . . . . .. 48 mA
SN74F657 (B1 thru B8) ................... 128 mA
Operating free-air temperature range: SN54F657......................... - 55°C to 125°e
SN74F657 ............................ ooe to 70°C
Storage temperature range ......................................... - 65°C to 150 0 e
tThe input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F657 SN74F657
UNIT
MIN NOM MAX MIN NOM MAX
Vee Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
11K Input clamp current -18 -18 rnA
A1-A8 -3 -3 rnA
IOH High-level output current
B1-B8, PARITY, ERROR -12 -15 rnA
A1-A8 20 24 rnA
IOL Low-level output current
B1-88 PARITY, rFiROrl 48 64 rnA
TA Operating free-air temperature range -55 125 0 70 ·e

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2-308 TEXAS . "
INSTRUMENlS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75285
 SN54F651, SN14F651
OCTAL TRANSCEIVERS WITH 8·BIT PARITY GENERATORS/CHECKERS
AND 3·STATE OUTPUTS

electrical characterisitcs over recommended operating free-air temperature range (unless otherwise
noted)
SN54F657 SN74F657
PARAMETER TEST CONDITIONS UNIT
MIN TYpT MAX MIN TypT MAX
VIK Vee = 4.5 V, II = -18 mA -1.2 -0.73 -1.2 V
Any output 10H = -3 mA 2.4 3.3 2.4 3.3
B1 thru BB, Vee = 4.5 V 10H = -12 mA 2 3.2
VOH V
PARITY, EFiIrnJ!! 10H = -15 mA 2 3.1
Any output Vee = 4.75 V 10H = -3 mA 2.7
10L - 20 mA 0.3 0.5
A1 thru A8
10l = 24 mA 0.35 0.5
VOL Vee = 4.5 V V
B1 thru B8, 10l = 48 mA 0.38 0.55
PARITY, EFiIrnJ!! 10L = 64 mA 0.42 0.55
T/Fi Vee = 0, VI = 7 V, ll' = 4.5 V 0.1 0.1
ll' Vee = 0, VI = 7 V, T/R = 4.5 V 0.1 0.1
II ODD/eVEN Vee - 0, VI = 7 V 0.1 0.1 mA
Al thru A8 2 2
Vee = 5.5 V, VI = 5.5 V
Bl thru B8 1 1
A, B, and PARITY 70 70
IIH* T/R and ~ Vee = 5.5 V, VI = 2.7 V 40 40 ~A
ODD/EVEN
A, B, and PARITY
20
-70
20
-70
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ODD/EVEN -20 -20 .c
~ = = 2.7
tn
10ZH Vee 5.5 V, VI V 50 50 ~
10Zl EFiImR
Al thru A8
Vee = 5.5 V, VI = 0.5 V
-60
-50
-150 -60
-50
-150
~ ....asas
10S§
B1 thru B8
Vee = 5.5 V, Vo = 0
-100 -225 -100 -225
mA
o
leeH Vee = 5.5 V 90 125 90 125 mA
leel Vee = 5.5 V 106 150 106 150 mA
leez Vee = 5.5 V 98 145 98 145 mA

tAli typical values are at Vee = 5 V, TA = 25 D e.

*For I/O ports, the parameters IIH and IlL include the off-state output current.
§Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

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TEXAS • 2-309
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TEXAS 76266
 SN54F657. SN74F657
OCTAL TRANSCEIVERS WITH 8·BIT PARITY GENERATORS/CHECKERS
AND 3·STATE OUTPUTS

switching characteristics (see Note 1)

.Vcc - 6V. vcc - 4.6 V to 6.6 V •
CL - 60 pF. CL - 60 pF.
R1 - 50011. R1 - 50011.
FROM TO
PARAMETER R2 - 50011. R2 - 60011. UNIT
(INPUT) (OUTPUT)
TA - 25"C TA - MIN to MAXi
'F657 SN64F667 SN74F667
MIN TYP MAX MIN MAX MIN MAX
tpLH 1.7 5.1 7.5 1.7 8
A or B B or A ns
tpHL 2.2 5.6 7.5 2.2 8
tpLH 6.2 9.6 14 6.2 16
An PARITY ns
tpHL 6.2 9.6 16 6.2 16
tpLH 3.7 7.1 11 3.7 12
ODD~ PARITY. EIm"1m ns
tpHL 3.7 7.6 11.6 3.7 12.6
tpLH 7.2 13.6 20.5 6.7 22.5
Bn EIm"1m n8
tPHL 7.2 13.6 20.6 6.7 22.6
tpLH 7.2 11.1 16.6 6.7 16.6
PARITY mitl'Fi ns
tpHL 7.2 11.6 15.6 7.2 17
tpZH 2.2 6.1 8 2.7 9
ll' An. Bn. or PARITY ns
tpZL 3.2 6.6 9.5 3.2 11

...c
tpHZ 1.2 4.1 7.6 1.2 8
ll' ~ ns
C» tpLZ 1.2 3.8 6 1.2 6.6

C» tFor conditions shown as MIN or MAX. use the appropriate value specified under Recommended Operating Conditions.
tn NOTE 1: Load circuits and voltage waveforms are shown in Section 1.
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TEXAS ."
INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS, TeXAS 75266
Application Report

3-1
E

3-2
Radiation Exposure Test Results
of
F Logic Functions

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TEXAS
INSTRUMENTS

3-3
3-4
 Contents
Page
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
Testing Performmed by TI .......................................... 3-7
Third-Party OEM Test Results .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18

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3-5
 List of Illustrations
Figure Title Page
1 High-Level Input Current vs Total Dose- '54F04 ................. 3-12
2 High-Level Input Current vs Total Dose - '54F20 ................. 3-13
3 Supply Current vs Total Dose - '54F20 ......................... 3-14
4 High-Level Input Current vs Total Dose - '54Fll ................. 3-15
5 Supply Current vs Total Dose - '54Fll ......................... 3-16
6 High-Level Output Voltage vs Total Dose - '54Fll ................ 3-17

List of Tables
Table Title Page
1 Relative Radiation Tolerance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3-9
2 Biasing Schemes for Devices ................................... 3-10
3 Actual Dose Rates ............................................ 3-11
4 High-Level Input Current vs Total Dose - '54F04 ................. 3-12
5 High-Level Input Current vs Total Dose - '54F20 ................. 3-13
6 Supply Current vs Total Dose - '54F20 ......................... 3-14
7 High-Level Input Current vs Total Dose - '54Fll ................. 3-15
8 Supply Current vs Total Dose - '54Fll ......................... 3-16
9 High-Level Output Voltage vs Total Dose - '54Fll ................ 3-17

3-6
 Introduction
Military system functionality in a radiation environment is becoming more of a design
criteria. System designers have a need for comparative IC radiation tolerance data, because
exposure to gamma radiation degrades the performance of integrated circuits. The amount
of performance degradation for various manufacturers' logic families is variable as process
technologies differ. So comparison studies that expose various vendors' logic devices to
radiation can be used to determine a logic family's suitability for use in a system. These
studies may, in fact, influence the selection of product for design-in.
There are numerous guidelines/methods for radiation testing. Also, there is room
for interpretation regarding the failure modes of logic devices. Some IC manufacturers
choose to define radiation induced failure as the total-dose level at which a logic error
occurs. Others define failure at the point at which data sheet parametrics are exceeded.
In addition, variable test methodologies make direct comparisons of existing studies difficult.
Therefore, many OEMs have developed their own radiation test schemes to assure program
compliance.
However, it is helpful to have some generic radiation data to use as comparisons
for initial selection oflogic families for new designs. To that end, the following is offered
as a guide for that selection process. The data is presented in two sections ... (1) Results
of testing done by Texas Instruments and (2) Results of testing done by a third-party OEM
and printed herein with their permission. The comparisons are necessarily generic and
any conclusions that are drawn from the data may warrant further investigation. Results
of the tests do indicate that TI's F Logic product is more radiation tolerant than currently
available FAST™ product. ....~

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Testing Performed by TI Q)
a:
Failure to meet data sheet parametric specifications is one consequence of exposing t:
devices to radiation. After a device is irradiated, typically the first parametric specification o
'';::;
to be violated is the input leakage current, as it will increase beyond the maximum data ~
(.)
book limit. Therefore, for the radiation tolerance tests done by TI, the parameter monitored
Q.
was IIH. The data book maximum limit for this parameter is 20 p,A for the F Logic family. Q.
In typical system applications with 10 unit loads, 200 p,A is considered a representative «
value for IIH. Test conditions simulated a total dose radiation environment.

FAST is a registered trademark of National Semiconductor Corporation.

3-7
 Both the supply voltage (VCC) and the inputs were kept at 5.5 V during irradiation.
The dose rate was 201.9 rad(Si)/second and the highest readings in each sample of four
units of each device type ('54Foo, '54F74, '54F244) are tabulated below (see Table 1).
Initial tests were done with total doses of 50, 100, 200, and 1000 krads(Si). However,
some devices were beyond the 20 pA data book limit at the 50 krad(Si) total dose level,
so an additional test point of 20 krads(Si) was added. A few tests were stopped at
200 krads(Si) because the devices read over the full-scale tester capability of 3031 pA.
Full MIL-STD-883C compliant product from each vendor was used, except where
indicated.
The following specific devices and date codes were subjected to the radiation testing:
Texas Instruments Date Code
, 54Foo B873SZ
'S4F74 8647
, 54F244 8706
Fairchild Semiconductor Date Code
'54FOO 8430, Recertification tested 8604
'54F74 Non-883C compliant P-DIP, 8718
,54F244 8641
Motorola Inc. Date Code
,54FOO 8513B
'S4F74 8640A
'S4F244 8619B
Signetics Corporation Date Code
'S4Foo 8717
'S4F74 8648
, 54F244 8644

3-8
 Table 1. Relative Radiation Tolerance
'54FOO
TEXAS
PARAMETER FAIRCHILD MOTOROLA SIGNETICS
INSTRUMENTS
IIH at 20 krad(Si) - <0.1 p.A 380.1 p.A -
IIH at 50 krad(Si) 14.3 p.A 2.4 p.A 1231.1 p.A 2725 p.A
IIH at 100 krad(Si) 174.4 p.A 283.7 p.A 2214.3 p.A >3031 p.A
IIH at 200 krad(Si) 526.2 p.A 840.1 p.A >3031 p.A >3031 p.A
IIH at 500 krad(Si) 834.9 p.A 1408.3 p.A >3031 p.A -
IIH at 1000 krad(Si) 739.5 p.A 1570.8 p.A >3031 p.A _.'

'54F74
IIH at 20 krad(Si) - 597.8 p.A 6.95 p.A 192.7 p.A
IIH at 50 krad(Si) 7.2 p.A >3031 p.A 230.9 p.A 1648.9 p.A
IIH at 100 krad(Si) 138.0 p.A >3031 p.A 389.3 p.A >3031 p.A
IIH at 200 krad(Si) 475.4 p.A >3031 p.A 713.1p.A >3031 p.A
IIH at 500 krad(Si) 732.5 p.A - 1417.2p.A -
IIH at 1000 krad(Si) 648.4 p.A - 1528.3 p.A -
'54F244
IIH at 20 krad(Si) - 48.6 p.A 350.9 p.A 59.4. p.A
IIH at 50 krad(Si) 0.7 p.A 583.1 p.A 1062 p.A 280.7 p.A
IIH at 100 krad(Si) 64.7 p.A 2972.1 p.A 1650.1 p.A 751.9 p.A
IIH at 200 krad(Si) 296.7 p.A >3031 p.A 2644 p.A 1296.8 p.A
IIH at 500 krad(Si) 560.2 p.A - >3031 p.A 1545 p.A
IIH at 1000 krad(Si) 525.5 p.A - - 1395.5 p.A
Supply voltage Vee and input voltage VIH were both 5.5 V during irradiation.
Dose rate = 201.9 rad(Si)/second ......
Tester full-scale limit for IIH = 3031 p.A MAX Q
Q.
Table listings were the highest IIH readings obtained in each sample of four units. Q)
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3-9
 Third-Party OEM Test Results t
Eight samples of the '54F04 Hex inverters and '54F11 Triple 3-input AND gates
along with four samples of a '54F20 Dual4-input NAND gate were tested in a total dose
environment. They were exposed to gamma radiation and irradiated at approximately
500 rads(Si)/minute or 8 rads(Si)/second. Test data was taken every 2 krads(Si) up to
30 krads total dose. If the first four samples showed no significant degradation, then the
remaining parts were irradiated at 1000rads(Si)/minute or 16.7 rads(Si)/second and data
was taken every 5 krads(Si) up to 100 krads(Si). All devices were exercised, both
functionally and parametrically, using the Eagle Multiplexer with the NUGPMUX test
package on the EAGLE LSI-4 Automated Test Equipment.
In addition to monitoring IIH, the propagation delay (tpd) of four samples of each
device type was measured independently at baseline and following exposure to the highest
total dose level tested ... between 60 and 80 krads(Si). A custom propagation delay fixture
was used. In all cases, one input received a 3-V amplitude square wave while the other
inputs were tied to 5 V or 0 V so that the output yielded a positive square wave. The
propagation delay was then measured using the 50% points of the input and output
waveforms as reference. No significant degradation was observed in any of the devices
tested.
During irradiation, the parts were statically biased with "H"s and "L"s as seen
in Table 2, and dc parametric test conditions were selected according to data book
specifications.

Table 2. Biasing Schemes for Devices

PIN NUMBER
PART SIN
1 2 3 4 5 6 7 8 9 10 11 12 13 14
'54F04
1-4 H X L X H X GND X L X H X L Vee
5-8 H X L X H X GND X L X H X L Vee
'54F11
1-4 H L H L H X GND X L H L X L Vee
5-8 H L H L H X GND X L H L X L Vee
'54F20 1-4 H L Ne H L X GND X H H Ne H H Vee

Dosimetry data showed that each device received radiation at a slightly different
dose rate due to its positioning on the multiplexer. The actual exposure is shown in Table 3.

tOnly Texas Instruments Incorporated product was used in the study.

3-10
 Table 3. Actual Dose Rates
DEVICE TYPE SIN DOSE RATE IradslSiIl AVERAGE A%-POSITION
'54F04 1 472 496 12.5
2 498
3 484
4 531
5 939 1011 16
6 1003
7 1016
8 1089
'54Fll 1 472 496 12.5
2 498
3 484
4 531
5 1038 1144 25.5
6 1090
7 1145
8 1303
'54F20 1 1038 1144 25.5
2 1090
3 1145
4 1303

The minimum, mean, and maximum values for all parameters are shown for all device
types in Tables 4 through 9. Table 4 and Figure lexhibit the input leakage current for
the '54F04. Similarly, Tables 5 and 6 and Figures 2 and 3 represent the parametric
performance for the IIH and ICC for the ' 54F20 respectively. And finally, Tables 7 thru 9
and Figures 4 thru 9 correspond to IIH, ICC and VOH of the '54Fll.

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3-11
 80

70
....-IIIHMINI
___ IIH MEAN
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. . . . IIHMAX
""'*- BOOK SPEC
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.5 40 JV
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X
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......J ~
1= /
./
10
~~
.-- -" ~
o
o 10 20 30 40 50 60 70 80 90 100
Total Dose-krads(Si)

Figure 1. High-Level Input Current vs Total Dose - '54F04

Table 4. High-Level Supply Current

vs Total Dose - ' 54F04
PART NUMBER: •54F04 SIN 5-8
TOTAL DOSE IIH ("AI @ VI - 2.7 V
DATE CODE: A8709
IN krads(SI) MIN MEAN MAX
VENDOR: TI
00 0.20 0.20 0.20 TEST DATE: 3-0CT-88
05 0.20 0.20 0.20
10 0.20 0.20 0.20
15 0.20 0.20 0.20
20 0.20 0.30 0.60
25 0.20 1.10 2.60
30 0.20 2.50 5.80
35 0.20 4.50 10.30
40 0.20 6.80 15.30
45 0.20 9.50 21.10
50 0.20 12.40 27.50
55 0.50 15.70 34.50
60 0.80 19.30 42.20
65 1.20 23.30 50.40
70 1.80 27.70 59.30
75 2.60 32.30 68.60
80 3.60 37.20 77.80
85 3.20 35.90 75.50
BOOK SPEC - - 20.00

3-12
 20
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20 25 30
- --
[-
35 40 45
....
50 55 60
Total Dose-krads(Si)

Figure 2. High-Level Input Current vs Total Dose - '54F20

Table 5. High-Level Input Current

vs Total Dose - '54F20
TOTAL DOSE PART NUMBER: '54F20 SIN 1·4
IIH ("AI @ VI - 2.7 V
DATE CODE: 8726
IN krads(Sil MIN MEAN MAX
VENDOR: TI
00 0.50 0.50 0.50 TEST DATE: 4·0CT·88
03 0.50 0.50 0.50
06 0.50 0.50 0.50
09 0.50 0.50 0.50
12 0.50 0.50 0.50

-
15 0.40 0.50 0.50
18 0.50 0.50 0.50 +oJ

21 0.50 0.50 0.50 o

Q.
24 0.50 0.50 0.50 Q)
27 0.50 0.50 0.50 a:
30 0.50 0.50 0.50 c:
33 0.50 0.50 0.50 o
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36 0.50 0.50 0.50 «J
39 0.40 0.50 0.50 ,~
42 0.40 0.50 0.50 c..c.
45 0.40 0.40 0.40
48 0.30 0.50 0.90 «
51 0.30 0.80 1.80
54 0.30 1.40 3.20
57 0.30 2.20 4.90
60 0.50 3.30 7.20
BOOK SPEC - - 20.00

3·13
 30
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25 -
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E ""*""BOOK SPEC
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- -- - - - - - -- - ,-
rr·
I ••

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Total Dose-krads(SiJ
Figure 3. Supply Current vs Total Dose - '54F20
Table 6. Supply Current vs
Total Dose - '54F20
TOTAL DOSE PART NUMBER: '54F20 SIN 1-4
ICCH (rnA) @ VCC - 5.5 V
DATE CODE: 8726
IN krads(Si) MIN MEAN MAX
VENDOR: TI
00 3.962 4.007 4.042 TEST DATE: 4-0CT-88
03 3.958 4.003 4.040
06 3.954 4.000 4.037
09 3.946 3.996 4.043
12 3.948 3.994 4.032
15 3.945 3.992 4.029
18 3.941 3.990 4.028
21 3.940 3.988 4.026
24 3.941 3.987 4.024
27 3.937 3.985 4.023
30 3.936 3.983 4.021
33 3.936 3.983 4.020
36 3.933 3.981 4.019
39 3.932 3.979 4.017
42 3.932 3.979 4.017
45 3.931 3.979 4.017
48 3.930 3.978 4.015
51 3.078 5.667 11.629
54 3.974 8.782 23.159
57 4.015 14.447 23.243
60 4.015 16.910 28.721
BOOK SPEC - - 5.100

3-14
 70 I I I
..-IIHMIN ~
_ ..... IIHMEAN
60

Iif
-+-IIH MAX

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10 20 30 40 50 60 70 80 90 100
Total Dose-kradslSiI

Figure 4. High-Level Input Current vs Total Dose - '54Fll

Table 7. High-Level Input Current

vs Total Dose - ' 54Fll
TOTAL DOSE PART NUMBER: '54F11 SIN 5-8
IIH ("AI @ VI .. 2.7 V
DATE CODE: 8822
IN krads(Si) MIN MEAN MAX
VENDOR: TI
00 0.50 0.50 0.50 TEST DATE: 4-0CT-88
05 0.50 0.50 0.50
10 0.50 0.50 0.50
15 0.50 0.50 0.50 t:
20 0.50 0.50 0.50 o
Q.
25 0.50 0.50 0.50 Q)
30 0.40 0.40 0.50 a:
35 0.40 0.40 0.40 c
40 0.40 0.70 1.10 o
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45 0.40 1.70 3.60 C'O
50 0.40 3.60 7.50 "~
55 0.50 6.S0 13.40 C.
c.
60 0.90 11.00 20.90 «
65 0.70 16.00 29.S0
70 4.20 22.70 40.00
75 20.60 45.10 66.S0
SO 10.40 3S.40 64.20
BOOK SPEC - - 20.00

3-15
 35 I ! I
___ ICC MIN

30 - -.-ICC MEAN
•
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...... ICC MAX
""*"" BOOK SPEC
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5

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Total Dose-krads(Sj)

Figure 5. Supply Current vs Total Dose - '54Fll

Table 8. Supply Current

vs Total Dose - ' 54Fll
TOTAL DOSE ICCH (mAl @VCC - 5.5 V PART NUMBER: '54F11 SIN 5-8
DATE CODE: 8822
IN krads(Sii MIN MEAN MAX
VENDOR: TI
00 3.41 3.48 3.55 TEST DATE: 4-0CT-88
05 3.41 3.48 3.55
10 3.41 3.47 3.54
15 3.40 3.50 3.53
20 3.39 3.46 3.53
25 3.40 3.47 3.54
30 3.40 3.47 3.54
35 3.39 3.47 3.54
40 3.41 3.46 3.50
45 3.41 7.94 21.43
50 3.37 8.20 22.57
55 3.34 12.94 22.92
60 3.35 12.82 25.49
65 3.36 14.91 26.54
70 4.61 15.16 26.96
75 4.62 15.52 30.53
80 4.63 11.10 22.70
BOOK SPEC - - 9.70

3-16
 3.5

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0.5 ----VOH MAX
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o 10 20 30 40 50 60 70 80 90 100
Total Dose-krads(Sil
Figure 6. High-Level Output Voltage vs Total Dose - 'S4Fll

Table 9. High-Level Output Voltage vs

Total Dose - ' S4Fll
TOTAL DOSE PART NUMBER: '54F11 SIN 5-8
VOH @ IOH - -1 rnA
DATE CODE: 8822
IN kradslSii MIN MEAN MAX
00
05
10
3.063
3.064
3.064
3.066
3.067
3.068
3.069
3.072
3.073
VENDOR:
TEST DATE:
TI
4-0CT-88
II
......
15 3.065 3.069 3.074 o
20 3.065 3.069 3.074 c..
Q)
25 3.065 3.069 3.074 a:
30 3.065 3.069 3.074 t:
35 3.065 3.070 3.077 o
40 3.011 3.056 '';:;
3.077 co
45 3.069 3.073 3.082 (,)

50 1.411 2.657 3.075 Q.

55 0.551 0.035 3.076
c..
~
60 0.076 0.032 3.073
65 0.150 0.994 3.073
70 0.150 0.654 1.719
75 0.150 0.512 1.597
80 0.051 0.469 1.523
BOOK SPEC 2.500 - -

3-17
 Summary
The tests performed by Texas Instruments Can be used as a gauge of relative radiation
tolerance of various vendor's 54F-type logic families. Defining the data sheet parametric
failure points, as opposed to defining the points where logic errors occur, was the basis
for both studies. Test results do indicate that the TI 54F logic family is more radiation
tolerant within the constraints of the parameters monitored. Significantly lower 1m readings
were recorded for TI 54F logic devices a~ several total dose levels. An additional point
for comparison is the data contained in the third-party OEM study.
The study that was performed by the third-party OEM gives a definition of radiation
tolerance of TI 54F devices that is based on additional data sheet parametrics. Although
no functional failure was observed in any of the eight samples of the devices tested, the
dc parametrics did show some degradation. Again, the various parameters monitored were
the input leakage current (IIH), the supply current (ICC), andthe output voltage (VOH).
Data sheet parametric failures for input leakage current for the '54F04, '54F11, and '54F20
were exhibited at 65,60, and 70 krads(Si) total dose, respectively. Also, the supply current
exceeded data book specifications at 51 and 55 krads(Si) for the '54F20 and '54Fll,
respectively. No significant degradation was observed in the supply current for the '54F04
to 85 krads(Si). The output voltage (VOH) for the '54F11 fell below the data book minimum
specified value at total dose levels exceeding 45 krads(Si). Finally, no degradation in
propagation delays (tpd) was observed in any of the devices irradiated.

3-18
 I_~.
,--_M_e_c_h_a_n_ic_a_'_D_a_ta_ _ _ _ _ _ _ _ _...

4-1
 Contents
Page
Ordering Instructions • . . • • • . • • • • • . • . . • • . • . • • • • . . • . • • • . . • . • . . .• 4·3
Mechanical Data •• • • . • • • • • • . • . • • • • • . . . • . • • • . . • . • . . • • . . • . . • .. 4·4
Tape and Reel Information • • • • • • • • • • • • . . . • . • • . . • • . • . . • . . . • • . • .. 4-15
Ie Sockets ....•.••..••••.•.•.••••••••.••••.•.•..••.••.••.• 4·27

s:
CD
n
:r
S»
::::s
(;'
I.
oS»
Dr

II

4-2
 ORDERING INSTRUCTIONS

Electrical characteristics presented in this data book, unless otherwise noted, apply for circuit type(s) listed
in the page heading regardless of package. The availability of a circuit function in a particular package is denoted
by an alphabetical reference above the pin-connection diagram(s). These alphabetical references refer to
mechanical outline drawings shown in this section.
Factory orders for circuits described in this catalog should include a four-part type number as explained in the
following example.

EXAMPLE: 54F240 J -oot

1. Prefix _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _- - J

MUST CONTAIN TWO TO FOUR LETTERS

SN Standard Prefix
SNJ MIL-STO-883 Processed and
Screened per JEOEC Standard 101
JANB MIL-M-38510 Processed

2. Unique Circuit Description - - - - - - - - - - - - - - - '

MUST CONTAIN SIX TO NINE CHARACTERS

Examples: 54F620
74F125
74F657

3. Package - - - - - - - - - - - - - - - - - - - - '

MUST CONTAIN ONE OR TWO LETTERS

J, JT, N, NT (Oual-in-line Packages);

0, OW ("Small Outline" Packages)
FK (Leadless Ceramic Chip Carriers)
(From pin-connection diagram on individual data sheet)
ca
~

4. Instructions (Dash No.) - - - - - - - - - - - . . . . . / ca

C
MUST CONTAIN TWO NUMBERS ca
(,)
-00 No special instructions "2
-10 Solder-dipped leads (N and NT packages only) ca
.c
(,)
tFor tape and reel information contact the factory. CI)
tThese circuits in dual-in-line packages are shipped in one of the carriers shown below. Unless a specific method of shipment is specified
by the customer (with possible additional costs), circuits will be shipped in the most practical carrier. Please contact your TI sales
:E
representative for the method that will best suit your particular needs.

Oual-in-line (J, JT, N, NT)

-Slide Magazines
-A-Channel Plastic Tubing
-Barnes Carrier (N only)
-Sectioned Cerdboard Box
-Individual Plastic Box

TEXAS ." 4-3

INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS, TEXAS 75265
 MECHANICAL DATA

0008. 0014. and 0016 plastic "small outline" packages

Each of these "small outline" packages consists of a circuit mounted on a lead frame and encapsulated
within a plastic compound. The compound will withstand soldering temperature with no deformation, and
circuit performance characteristics will remain stable when operated in high-humidity conditions. Leads
require no additional cleaning or processing when used in soldered assembly.

0008, 0014, and 0016

(16-pln package used for iUustrationl

f
6.20 (0.2441
1-
, - iF.:!:=!:!:====!::=!:i=='='!:=!:!:=~
5,80 (0.228) I
4.00 (0.1571
3.81 (0.1501
*--- ~t;:::;:;::;:;:::;:;::;:;::;:;::~

i r- ,=,,- ~

[=R"
050 (00201 --............ 5.21 (0.2051
1,75(0.0691 7" NOM - ' - - ' - ,W r,'~"'''''~ 'V~

1'35j(Ot'0=5=31= ~;: : J~ 4;P~L~A~c~e~S~ -J~ ~l~ ~ '~45~ ~:'~':~" \.., _

0,356 (0.0141 4 PLAces

0,79 (0.0311
0,28 (0.0111 1,12 (0.0441
PIN SPACING 0.51 (0.020)
1.27 (0.0501
(See Note A)

~DIM
8

4,80
14

8,55
16

9,80
A MIN
(0.1891 (0.3371 (0.3861
5,00 8,74 10,00
A MAX
(0.1971 (0.3441 (0.3941

ALL LINEAR DIMENSIONS ARE IN M(LLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Leads are within 0,25 10.0101 radius of true position at maximum material dimension.
B. Body dimensions do not include mold flash or protrusion.
C. Mold flash or protrusion shall not exceed 0.15 10.0061.
D. Lead tips to be planar within ±O,051 10.0021 exclusive of solder.

4-4 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TeXAS 75265
 MECHANICAL DATA

DW016. DW020. DW024. and DW028 plastic "small outline" packages

Each of these "small outline" packages consists of a circuit mounted on a lead frame and encapsulated
within a plastic compound. The compound will withstand soldering temperature with no deformation. and
circuit performance characteristics will remain stable when operated in high-humidity conditions. Leads
require no additional cleaning or processing when used in soldered assembly.

DWOI6. DW020. DW024. and DW028

120-pln package used for illustration}

Ir~'­
~r20
10,1510.400)

7,5510.2971

7~5112931 ~~~~:;~;:~;:~~;:~

0,785 {O.03l1
~

~
DIM
16

10.16
20

12.70
24

15.29
28 t

17.6B
A MIN
10.400} 10.500} 10.602} 10.696}
10.36 12.90 15.49 17.88
A MAX
10.40B} 10.50B} 10.610} 10.704}

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

tThe 28-pin package drawing is presently classified as Advance Information.

NOTES: A. leads are within 0,25 (0.0101 radius of true position at maximum material dimension.
B. Body dimensions do not include mold flash or protrusion.
C. Mold flash or protrusion shall not exceed 0.15 10.006).
D. Lead tips to be planar within ±0.051 10.002) exclusive of solder.

. TEXAS'" 4-5
INSTRUMENTS
POST OFFICE BOX 655012 • CALLAS, TEXAS 75265
 MECHANICAL DATA

FD and FK lead less ceramic chip carrier packages

Each of these hermetically sealed chip carrier packages has a three-layer ceramic base with a metal lid
and braze seal. The packages are intended for surface mounting on solder lands on 1.27 (O.050-inch)
centers. Terminals require no additional cleaning or processing when used in soldered assembly.
FK package terminal assignments conform to JEDEC standards 1. 2. and 11.

44-TERMINAL FD and FK

~----------A----------~ FO AND FK PACKAGES

I' ~ 27 ~ 25 U •
23 22 21 ~ 19 18 ,[ NO. OF
TERMINALS MIN
A
MAX
•
MAX MIN
C
MAX

rr'
8,69 9,09 9.09 1,63 2,03
20
(0.3421 10.3581 (0.3581 (0.0641 (0.0801

,. 2.
11.23
10.4421
1'.63
(0.458)
11,63
10.4581
1,63
(0.0641
2,03
{O.C80!

" 44
16.26
(0.6401
16,76
(0.6601
14,22
10.5601
1,75
10.0691
3,05
10.1201
" 18,78 19.33 14.22 2,08 3,05

A 8
"34 52
(0.739) (0.7611 (0.5601 (0.082) (0,1201
23.83 24,43 21,89 2.08 3.05
G. (0.9381 (0.962) (0.8621 10.0821 (0.1201

., 28,83
11.1351
29,59
(1.165\
27.05
11.065)
2,08
10.0821
3,05
(0.\20)

INDEX CDRNER~ 7

~1~·
J.---*-
O,3E' (0.0151

.. .. t.0,64 10.0251
0.38 {0.0151

0,635 x 1.27
(0.025 )( 0.050\
TYPiCAL

tQ 0 IJ 0 [HJO 35 PLACES
(See Note AI

tlHl fJ 0 EH]O
fHJD0 EJDD
/fJEl[J[]EJEH.!J
1.14 (0.0451
. --'£0.89 (0.035)
I

'--I l";4 10 0451

I
~c-oi
1

C 0,89 (0.035)

m
....m ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTE A: The checkerboard pattern is aligned vertically with the contact pads and is symmetrical horizontally as shown; it is applicable
to some 44-terminal packages only.

4-6 TEXAS ."

INSTRUMENlS
POST OFFICE BOX 665012 • DALLAS, TEXAS 15285
 MECHANICAL DATA

J014 ceramic dual-in-line package

This hermetically sealed dual-in-line package consists of a ceramic base, ceramic cap, and a lead frame.
Hermetic sealing is accomplished with glass. The package is intended for insertion in mounting-hole rows
on 7,62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to
secure the package in the board during soldering. Tin-plated ("bright-dipped") leads require no additional
cleaning or processing when used in soldered assembly.

J014

r ~::~: :~:;~: --j

1~~~®@~9?1
o.6310025}RNOMi::: : ::: I
7.87103l0} Q
1------I-H7"".,""'1(:;c0.~;8~~~ 10.290} (2) (3) CD 0 CD ® 0
I
Il-1 J:j
6.22 10.2'5}
1.27 0.5110,020} MINl _ . . 1,78 (O.070) MAX ,. PLACES

~ 10.OSO} NOM 5,0~~~200} l~ g }- HH H)J S~~t!~T

L~ _ ~\4-
14 PLACES
\-SEATING PLANE 8-~r
_U
1ullf.o,6~.I~~~~~~IN
0 I }
,-. I- I ~ I- O:~: I~:~~:} ,. PLACES
~'~~ :~~~:: 3,30MII~ 130} 2.5'10.l00} ~ IS•• Not•• 8 & CI
14 PLACES 1,78 (0.070) PIN SPACING 2.54 (0.100) T.P.
4 PLACES (See Note AI

Falls Within JEDEC TO-116 and EIA MO-OOl AA Dimensions

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
...co
CO
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.0201 above the C
seating plane.
'ii
(,)
'2
CO
.c
(,)
Q)
:i!:

TEXAS ." 4-7

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 MECHANICAL DATA

JO 16 ceramic dual-In-line package

This hermetically sealed dual-in-line pa·ckage consists of a ceramic base, ceramic cap, and a lead frame.
Hermetic sealing is accomplished with glass. The package is intended for insertion in mounting-hole rows
on 7,62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to
secure the package in the board during soldering. Tin-plated ("bright-dipped") leads require no additional
cleaning or processing when used in soldered assembly.

J016

Ii. Ii.

~
7'87(O.3101
7.37 (0.2901

~~! :~:~::.
00000000
-, . 1.27 10.0501 NOM
'1 .. 1.78 (0.0701 MAX 16 PLACES

.1.;
f.,JI 1\ ."'~ ,,~, i;:5~(1~0201' l~ ~i\ ~ '~,'~~,:"
-.----- GLASS
5,OB (02001 SEALANT

16 PLACES \\ 0,36 (0.014)

...1-- 0.20 (0.0081 3.3~(1~1301 I ~ jfi-a::g:~~~1
16 PLACES
,..!
0,305 (0012) MIN
~ 16 PLACES
(Sae Notes B and C)
4 PLACES
PIN SPACING 2.54 (0.1001 T.P. ~:~~ :~:~~~: 4 PLACES
(See Note A)

• For memories of 64 bits and up, a few MSIILSI products in Series 54174 and Series 54S174S that are
derived from memory circuit bars, and complex HCMOS parts, this maximum is 7,6210.300), All other
dimensions apply without modification.
3: ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
CD
(')
:r
C» NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
:::s B. This dimension does not applv for solder-dipped leads.
(=r C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 10.020) above the
!!. seating plane.

c
...
C»
C»

4-8 TEXAS
INSTRUMENTS
'If
POST OFFICE BOx 855012 • DALLAS, TEXAS 75266
 MECHANICAL DATA

J020 ceramic dual-in-line package

This hermetically sealed dual-in-line package consists of a ceramic base, ceramic cap, and a lead frame.
Hermetic sealing is accomplished with glass. The package is intended for insertion in mounting-hole rows
on 7,62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to
secure the package in the board during soldering. Tin-plated ("bright-dipped") leads require no additional
cleaning or processing when used in soldered assembly.

J020

"..'1 24.7610.9751
0------23.6210.9301 ------11

'i 'i

·~·-""{~~~~~~~~1
~ -,
;;;;;:;;;;
1.27 100501 NOM
0000®®0®®@
1.78 10.0701 MAX 20 PLACES

~
~;~~;:;:;;;:;;;:;~;;;;;;t~
, GLASS
SEALANT

1050 _S~t~~~G =~'-:-:c::-.:----.-

!iii"
20 PLACES
MIN
- ._ _ _ _ _ _ y
11-tt--It-+1t- ~66~~~g~~1 MIN
II 0.3610.0141 •
0.58 10.0231
.-.\1*"0.2010.0081 I 0.38 10.0151
20 PLACES
20 PLACES

ISee Notes B & CI

(See Note AI

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 (0.0101 of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.0201 above the
seating plane.

TEXAS ." 4-9

INSTRUMENTS
POST OFFICE BOX 868012 • DALLAS. TEXAS 75285
 MECHANICAL DATA

JT024 ceramic dual-in-line package

This hermetically sealed dual-in-line package consists of a ceramic base, ceramic cap, and a lead frame.
Hermetic sealing is accomplished with glass. The package is intended for insertion in mounting-hole rows
on 7,62 (0.300) centers. Once the pins are compressed and inserted, sufficient tension is provided to
secure the package in the board during soldering. Tin-plated ("bright-dipped") pins require no additional
cleaning or processing when used in soldered assembly.

JT024
1------32.5111.2801 MAX -----I

GLASS
SEALANT

3,30(0.130)
MIN
U PIN SPACING 2,54 (0.100) T.P.
0,69 {O,027/ MIN
24 PLACES

~ ~ ~:~: ~~:~~:
24 PLACES

2,54 /0.100) MAX (See Note AI

4 PLACES

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0.25 (0.0101 of its true longitudinal pOSition.

c
....C»C»

4-10 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 MECHANICAL DATA

N014 plastic dual-in-line package

This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation. and circuit
performance characteristics will remain stable when operated in high-humidity conditions. The package
is intended for insertion in mounting-hole rows on 7.62 (0.300) centers (see Note A). Once the leads are
compressed and inserted. sufficient tension is provided to secure the package in the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

N014

Falls Within JEDEC TO-116 and EIA MO-001AA Dimensions

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0.2510.010) of its true longitudinal position.
8. This dimension does not apply for solder~dipped leads.
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 10.020) above seating
plane.

TEXAS ..., 4-11

INSTRUMENTS
POST OFFtCE BOX 855012 • DALLAS. TEXAS 75265
 MECHANICAL DATA

NO 16 plastic dual-in-line package

This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
nonconductive plastic compound. The compound will withstand soldering temperature with no deformation,
and circuit performance characteristics will remain stable when operated in high-humidity conditions. The
package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are
compressed and inserted, sufficient tension is provided to secure the package in the board during soldering.
Leads require no 'additional cleaning or processing when used in soldered assembly.

N016

7,62 ± 0,25
10.300' 0.0101
6,35:t 0,25
10.250' 0.0101
2.0 10.OBOI NOM

0.B4 10.0331 MIN

(See Notes Band CI

Paru may be supplied in accordance

with the alternate side view at the
option of Tl plants located in Europe.
In this case, the overall length of the
package is 22.1 (0.870) max.

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

o
I» NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
r+ B. This dimension does not apply for solder·dipped leads.
I» C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.020) above seating
plane.

4-12 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 855012 • DALLAS. TEXAS 75265
 MECHANICAL DATA

N020 plastic dual-in-line package

This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
nonconductive plastic compound. The compound will withstand soldering temperature with no deformation,
and circuit performance characteristics will remain stable when operated in high-humidity conditions. The
package is intended for insertion in mounting-hole rows on 7,62 10.300) centers. Once the leads are
compressed and inserted, sufficient tension is provided to secure the package in the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

N020

If.
7,62± 0,25
10.300 ± 0.010)

2,0 10.0801 NOM

0,25 10.010) NOM

-SEATING PLANE----I~--r-

20PLACES -.\\e-~:;: :~:~~~:

20 PLACES
ISee Notes B and C)

J~ ~
k------~~::~ :~:~~:
ALTERNATE SIDE VIEW

L
r-- 1,02 (0.040)
4 PLACES
VIEWA
Parts may be supplied in accordance
with the alternate side view at the
option of TI. European-manufactured
parts may have pin 1 as shown in 20 PLACES
view A. Alternate.side-view parts (See Notes B and C)
manufactured outside of the USA
may have a maximum package length
of 26.711.0501.
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. When solder-dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 (0.020) above seating
plane.

TEXAS • 4-13
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 76265
 -
MECHANICAL DATA

NT024 plastic dual~in-Ilne package

This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within an electrically
nonconductive plastic compound. The compound will withstand soldering temperature with no deformation,
and circuit performance characteristics will remain stable when operated in high-humidity conditions. The
package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are
compressed and inserted, sufficient tension is provided to secure the package in the board during soldering.
Leads require no additional cleaning or processing when used in soldered assembly.

NOTE: For all except 24-pin packages, the letter N is used by itself since only the 24-pin package is available in more than one row-spacing.
For the 24'pin package, the 7.62 10.300) version is designated NT; the 15,24 10.600) version is designated NW. If no second
letter or row-spacing is specified, the package is assumed to have 15,24 (0.6001 row-spacing.

NT024

31,8 11.250)
1 < - - - - - - - - 2 8 . 6 11.1251------------1

@@@@@)(00@0G@@ 1

11 (0280) MAX
, . 0.38 10.015)
000000000@@@
"1
fij
r~
:=t= 2,010.080) NOM rlMIN"1
~l'1410'045)
24 PLACES

! fJ-
, LO 25 (0.010) NOM 5,08 (0.200)
, MAX

105°
goo
-SEATING PLANE --I ~ 1,1410.045)
24 PLACES
MIN

24 PLACES
--Ir- 036 (0014)
0:25 10:010)
24 PLACES
4,08 10.160)
3.17 10.125)
-
~
'~' ---I L
--.,
0,53310.021)
r-- 0,381 10.015)
24 PLACES
IS•• Not•• B 2,16 10.085) IS •• Not•• B
and C) 0,7110.028) PIN SPACING 2,5410.100) T.P. and C)
4 PLACES ISe. Not. A)

ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES

NOTES: A. Each pin centerline is located within 0,25 10.010) of its true longitudinal position.
B. This dimension does not apply for solder-dipped leads.
C. When solder·dipped leads are specified, dipped area of the lead extends from the lead tip to at least 0,51 10.020) above the
c seating plane.

4-14 TEXAS ."

INSTRUMENlS
POST OFFICE BOX 656012 • DALLAS. TEXAS 75265
 MECHANICAL DATA

Tape and Reel Information

A new packaging system. SMtl" Tape and Reel. has emerged along
with the introduction of surface-mount semiconductor packages by
Texas Instruments.

Benefits SMti Tape and Reel not only offers a new shipping method that protects components
from mechanical and electrical damage, but also includes the benefits of automated
inventory control, ship to stock, and total compatibility with today's automated
placement systems. SMti Tape and Reel continues the trend towards industry
automation and cost reduction and contributes to the overall goal of electronic system
quality and reliability.

Features The features of SMti Tape and Reel packaging are as follows.

• SMti Tape and Reel packaging is in full compliance with EIA Standard RS-481-A,
"Taping of Surface-Mount Components for Automatic Placement."

• Industry-compatible tape format allows second sourcing without costly and time-
consuming equipment changeovers and record-keeping changes.

• Static-inhibiting materials used in carrier tape manufacture provide device

protection from static damage.

• Rigid, dust-free polystyrene reels provide mechanical protection and clean room
compatibility for optimum equipment operation and manufacturing yield.

• Completely compatible with dereeling equipment currently available on most high-

speed automated placement systems.

• Medium-density Code 39 bar coding enables inventory and manufacturing

automation, as well as complete component traceability prior to, during, and after
system manufacture.
1&
u
• Efficient packaging offers savings in storage space and manufacturing overhead.
'2
ftJ
.c
U
C»
:e

S. !7lA:
!L ~tl
'f'
' SURFACE MOUNT
TEXAS INSTRUMENTS and SMti are trademarks of

Texas Instruments Incorporated.

TEXAS ~ 4-15
INSTRUMENlS
POST OFFICE BOX 666012 • DALLAS. TEXAS 75265
 MECHANICAL DATA

General Description

SMti Tape and Reel offers users of surface-mounted semiconductor

devices a new and efficient method of component handling. Tape and
reel consists of three major elements: a carrier tape, a cover tape, and
a reel.

Carrier Tape The carrier tape is a conductive material with custom-embossed pockets for a
particular surface-mount package. Components are oriented in the embossed pockets
per EIA Standard RS-48J-A "Taping of Surface-Mount Components for Automatic
Placement. "

Cover Tape With each component in its embossment and protected from mechanical and static
damage. a continuous transluscent cover tape is heat sealed over the entire length of
the carrier tape, isolating each component from the outside environment. This heat-
sealing process guarantees sufficient seal strength to prevent components from falling
from the pockets before use. The cover tape has a peel strength of 40 ± 30 grams in
compliance with RS-481-A and sufficient strength to ensure consistency during
dereeling operations.

Reel The entire assemblage is wound on a high-strength polystyrene-based reel. The reel
provides a means of easy storage and handling as well as a method for feeding large
quantities of packages to high-speed placement systems. In addition, SMti Tape and
Reel offers a factory-automation alternative through the use of medium-density
Code 39 bar coding on all reel assemblies. The bar code provides source, part
number, date code, and quantity.

4-16 TEXAS ."

IN STRUM ENlS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75285
 MECHANICAL DATA

Bar-Code Each reel of SMti components is labeled with a "man-and-machine" readable label
Labeling that uses a medium-density Code 39 bar code in combination with alphanumeric
characters.

Figure 1 Bar-Code Label

I 1\\111\\ 11\1 \11 \1\111\\ 11\11 \11 \\1\1 1\111 \1\\11 1\11\ 1\\11\ II \1\11 \1\111 \
TI PIN: SN74F657DWR

111111111111111111111111111111 QTY: 1000

1111111111111111111111111111111111 O/C: 614XF

Note

I. Sample labels are available for system compatibility testing.

TEXAS . " 4-17

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TeXAS 75265
 MECHANICAL DATA

Specification

SMti Tape and Reel components are available in formats that are
compatible with most industry standard component loading and tape
drive equipment. Figures 2 through 5 and Tables 1 through 6
provide information regarding these formats. A-II dimensions are
given in millimeters.

Figure 2 Tape Format

II--- TRAILER
(NO COMPONENTS)
COMPONENTS ---1---- LEADER =--l
(NO COMPONENTS) I
~o-o+-.-.-o--o-.-.-.~ ~------+---~
, ... -., ,...---, r--I r ,--, j---, r---,r-
I:,I ::II ::II ::II 1\
II
II
II
II
II
II
II
II
II
II
II
,:
..J L ___ Jq",- __ ...JIIL... _ _ ..JII 11
_.J L. _ _ J':L- __ ....pL ___ JII

Ir---- 400 ____~~~~~A~S~R~E~Q~U~IR~E~D~~~r_~------5~-----~~

340 FOR COMPONENT COUNT 500

Notes

1. Carriet tape is conductive with a resistivity value of less than 1 x 105 ohms per
square.

2. Cover tape is sealed over the entire length of the carrier tape.

Figure 3 Component Format (All components are packaged per Note J.)

DIRECTION
OFFEED •

...C
I»
I»
Note

1. Pin 1 orientation.

4-18 TEXAS . "

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 MECHANICAL DATA

Specification (Continued)

Variables are used in Figure 4 and Tables 1 and 2. The definitions

for the variables are as follows: W is tape width. P is pocket pitch.
Ao is pocket width. 8 0 Is pocket length. Ko is pocket depth. K is
maximum tapa depth. and F is the distance between the drive hole
and the centerline of the pocket. Ail dimensions are given in
millimeters.

Figure 4 Sing/e-SprocJcet Tape Dimensions

___ +0.1
1.5-0.0
4.0.0.10-_

1~40
DIAMETER
1. 75fO. , I--P--'" ,-- I-" 2.00,0 0.05
-----"----f
0.8 MIN

r-~~--~~+-~~-+~~~~--~~--~~~-~J~~ iI
!
t
r) C\)o+-T"""IIT,...o+-T""I\P-+-.... IF_T""""IlTr,=-t-.l~"'-~ - .

1 i) T ~

L!
CARRIER TAPE
EMBOSSMENT
1), I
-- A, -
DIRECTION.,
T *J --r - tj
0 MIN
COYER
TAPE

OF FEED
1.SMIN
DIAMETER

Notes

I. Tape widths are 12, 16, and 24 mm.

2. Camber per EIA Standard RS-481-A.

..o
IV
IV

3. Minimum bending radius per EIA Standard RS-481-A.

TEXAS .." 4-19

INSlRUMENlS
POST OFFICE BOX 656012 • DALLAS. TEXAS 75265
 MECHANICAL DATA

Specification (Continued)

Table 1 Single·Sprocket Variable Tape Dimensions

Package Package Dimension

Type Desiglilltor W P Ao 80 Ko K F

SO·14 0 16 8 6.5 9.5 2.1 2.5 7.5

SO·16 0 16 8 6.5 10.3 2.1 2.5 7.5

SO·20L OW 24 12 10.9 13.2 3.0 3.4 11.5

SO·24L OW 24 12 10.9 15.8 3.0 3.4 1!.5

SO·28L OW 24 12 10.9 18.3 3.0 3.4 11.5

Tolerance ±0.3 ±O.I ±O.I ±O.I ±O.I max ±O.I

c
....
~
~

4·20 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 655012· DALLAS. Tex~s 75265
 MECHANICAL DATA

Specification (Continued)

Variables are used in Figure 5 and Table 3. The definitions for the
variables are as follows: G is the distance between the flanges. T is
the maximum reel width. and N is the diameter of the reel hub. All
dimensions are given in millimeters.

Figure 5 Reel Dimensions

330 +0.0
-4.0

1.SMINWIDTH TI BAR·CODE LABEL

Table 2 Variable Reel Dimensions

Package
Type
Package
Designator
Dimension
G T N ...
C'CS

C'CS
Q
SO-14 0 16.4 22.4 100
16
SO-16 0 16.4 22.4 100 (.)
'2
SO-20L ow 24.4 30.4 100 C'CS
.c
(.)
SO-24L OW 24.4 30.4 100
CD
SO-28L OW 24.4 30.4 100 :!

TEXAS ." 4-21

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 7&265
 MECHANICAL DATA

Specification (Continued)

All dimensions are given In millimeters.

Table 3 Tape and Reel Format Summary

Package Package Tape Package Pocket Dimensions Reel Reel Hub Parts
TVpe Designator Width Pitch Width Length Depth Diameter Diameter Per Reel

50-14 D 16 8 6.5 9.0 2.1 330 100 2500

50-16 D 16 8 6.5 10.3 2.1 330 100 2500

50-20L DW 24 12 10.9 13.2 3.0 330 100 1000

50-24L DW 24 12 10.9 15.8 3.0 330 100 1000

50-28L DW 24 12 10.9 18.3 3.0 330 100 1000

...C
I»
I»

4-22
. TEXAS ."
INSTRUMENlS
POST OFFICE BOX 665012 • DALLAS, TeXAS 75265
 MECHANICAL DATA

Ordering Information

To order tape and reel components. you need to provide Information

about part numbers. quantities. shipping. and sample package
applications.

Ordering by When ordering tape and reel components, add the letter R as a suffix to the
Part Number part number. An example of the ordering sequence follows.

~~SN ~
D R
_____________
I. Prefix

2. Unique Circuit Designator

3. Package Type

4. Tape and Reel Packaging

Must be designated by the letter R

Formats and All orders for tape and reel packaging must be for whole reels. For example, if a
Quantities customer requires 9,900 TL074s in Tape and Reel packaging, he needs to place the
order for a quantity of 10,000 TL074s. The order will be filled and shipped on four
reels containing 2,500 parts per reel.

Note: TI reserves the right to provide a smaller quantity of devices per reel to
preserve date code integrity.

A list of package and tape formats and the quantity of devices per reel is provided in
Table 4. ...co
CO
Shipping Taped and reeled components are shipped in individual packing boxes measuring Q
approximately 14" x 14". The depth of each box is tailored to the tape width.
Individual boxes are packed in a larger box whose size depends on the quantity of 'i
(,)
components ordered. '2
CO
.c
(,)
CD
:E

TEXAS ." 4-23

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 MECHANICAL DATA

Ordering Information (Continued)

All- dimensions are given in millimeters.

Table 4 Condensed Tape and Reel Formats

Package Package Tape Package Reel Parts

Type Designator Width Pitch Diameter Per Reel

SO-14 D 16 8 330 2500

SO-16 D 16 8 330 2500

SO-20L DW 24 12 330 1000

SO-24L DW 24 12 330 1000

SO-28L DW 24 12 330 1000

Sample Package Sample components are available for a number of applications, such as standard
Applications mechanical sample packages, "daisy-chained" bars, and K-factor bars. Table 5
provides sample ordering information.

Table 5 Sample Package Applications

Package Package Mechanical

Type Designator Sample Daisy Chain K Factor

SO-14 D SN72197 SN200054 SN20oo60

SO-16 D SN72198 SN200055 SN200061

SO-20L DW SN72199 SN200056 SN200062

SO-24L DW SN72200 SN200057 SN2oo063

o
...
Q)
Q)
SO-28L DW SN25OO13 N/A N/A

4-24 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 666012 • DALLAS, TEXAS 76266
 MECHANICAL DATA

More Information

As a major manufacturer of SMCs, TI is committed to helping you

make the transition to surface-mount as easy and as economical as
possible. Getting started in SMT -switching from older and less
efficient methods of PCB fabrication-means learning some new
ma'l!,facturing techniques, and it entails some capital outlay. But in
volume production, it can actually reduce your capital and space
costs by up to 50 percent.

Ship-to-Stock As your usage per surface-mount component (SMC) grows, TI can implement its
Eliminates ship-to stock program for you. With all the necessary quality-control procedures built
Incoming into our standard testing process, your SMCs can be shipped directly to you in tape
Inspection and reel or in factory-sealed boxes. Benefits to you:
• Incoming inspection, scrap, and rework reduced or eliminated .
• Inventory reduced.
• Quality levels maximized.

Learn by Doing To help you realize the advantages of surface-mount technology (SMT), Texas
Instruments maintains a surface-mount laboratory. There you can gain hands-on
experience and guidance in building a surface-mount board from start to finish. To
schedule an appointment, contact your TI Field Sales Engineer or call
(800) 232-3200 for the address of the TI Field Sales Office nearest you.

Outside Help You can also find assistance among the growing number of SMT assembly houses,
Available consultants, and associations. They can help you reduce the costs of converting to
SMT, while supplying some valuable information on the latest technological advances
and industry standards.

Suppliers of assembly equipment such as pick-and-place machines and soldering and

test equipment can also help you make the transition to SMT bOllrd fabrication.

Want to Learn
More?
How to Use Surface Mount Technology is available free of charge from Texas
Instruments. This technical summary includes chapters on the process and the tooling
...co
CO
required to implement it; the wide variety of available SMCs; inspection, testing, and C
repair; quality and reliability; and how to mix SMCs with standard DIP packages.

For additional information on the availability of TI's growing line of SMCs, contact
your local TI Field Sales Office or distributor.

If you would like to have your name placed on our mailing list for additional SMT
information as it becomes available from TI, please write Texas Instruments
Incorporated, Dept. SSP05, P.O. Box 809066, Dallas, Texas 75380-9066.

TEXAS ." 4-25

INSTRUMENTS
POST OFFICE BOX 655012 • DAllAS, TEXAS 75265
4-26
 IC SOCKETS

INTRODUCTION

Texas Instruments has developed solutions for today's high density packaging needs. The TI facility at Attleboro,
Massachusetts (one of the world's largest suppliers of multimetal systems) provides leading-edge technology
which, combined with reliable, high-volume, off-the-shelf interconnection products, allows TI to quickly meet
volume commercial applications.
During the last decade, TI has produced one of the largest IC socket families. Tl's sockets include every type
and size socket in common use today and are available in a wide choice of contact materials and designs.
Our sockets are designed for:
• easy and efficient hand assembly
• compatibility with automatic assembly equipment
• maximum performance and board density
This section provides information on the following types of IC socket products.

PRODUCTION SOCKETS TYPE

Plastic Leaded Chip Carrier PLCC
Single-In-Line Packages SIP
Pin-Grid Arrays PGA
Dual-In-Line DIP
Dual-In-Line 0.070-inch spacing Shrink Pack
Quad-In-Line QUIP
BURN-IN/TEST SOCKETS TYPE
Plastic Leaded Chip Carrier PLCC
Pin Grid Array PGA
Small Outlilne J Lead
Dual-In-Line DIP
Dual-In-Line 0.070-inch spacing Shrink Pack
Small Outline Flat Pack
Quad Flat Pack

Specially formulated alloys give the TI contact springs:

• Low Contact Resistance CIS
~
• High Contact Strength (to stand up to repetitive insertions and withdrawals) CIS
• High normal forces assure gas-tight reliability o
A full line of reliable, readily available, low-cost interconnection systems means premium performance at an
"i
U
economical price. '2
CIS
Additional information on these and other TI products, including pricing and delivery quotations, may be obtained .c
from your nearest authorized TI Distributor, TI Sales Representative or: u
CD
Texas Instruments Incorporated
Connector Systems Department, MS 14-3 Telephone: (617) 699-5242/5375
:E
Attleboro, Massachusetts 02703 TELEX: 92-7708

TEXAS ~ 4-27
INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TEXAS 75285
 IC SOCKETS
PLASTIC LEADED CHIP CARRIER

PERFORMANCE SPECIFICATIONS
Mechanical
Recommended PCB thickness range: 0.062 in to 0.092 in
Recommended PCB hole size range: 0.032 in to 0.042 in
Vibration: 1 5 G max
Shock: 100 G max
Insertion force: 0.59 Ibs per position typ
Withdrljwal force: 0.25 Ibs per position typ
Normal force: 200 g min. 450 g typ
Wipe: 0.075 in min
Durability: 5 cycles min
Contact retention: 1.5 Ibs min
Electrical
Current carrying capacity: 1 A per contact
Insulation resistance: 5000 MO min
Dielectric withstanding voltage: 1000 V ac rms min
Capacitance: 1 pF max
Environmental
Operating temperature:
Operating: - 40°C to 85°C
Storage: -40°C to 95°C
Temperature cycling with humidity: will conform to final EIA
specifications
MATERIALS PART NUMBER SYSTEM

1
Body - Ryton R-4 (40% glass) UL 94 V-O rating
Contacts - CDA 510 spring temper CPR PH XXx-x-x-o
Contact finish - 90/10 tin/lead (200 "in -400 "in) over
40 "in copper · 1 1 l l c o n t a c t surface 1 - tinllead
plating
Contact spacing 1 - 0.050 in
Extraction tool available. consult factory
. Number of pos (044. 052. 068. 084)
Contact factory for detailed information
Plated thru hole. solder tail
TI socket Series
PLASTIC LEADED CHIP CARRIER CPR SERIES Plastic leaded chip carrier

~ : :
: :
!
.
:, :, : :,
:, :' :,
~
!' " ! !'
" l' :' i'
0 0
1
2,64
!' " :, i' 10.1001 TVP

l' !'
!' !'
:' :,
l'
:, ~O
23 0 !' l'
:' :'
" !'
:e :s
A

0
0

1
0 :, :s
:, :, l' l' l' l' !' :0 :' :, l'
l' ~,
!' l' !' l' !' :, !'

o ,- A -,
B8-Pin shown
I»
~
I» NOTE: Socket electrical pin-out pattern represents component side
Pos A B C

•
of P.C.B. layout. (TYP. counter clockwise numbering pin-
out system.) 21,43 17.78 12.70
44
(0.844) (0.700) (0.500)
23.98 20.32 15.24
52
(0.944) (0.800) (O.BOO)
29.06 25,40 20.32
68
(1.144) (1.000) (0.800)
34.14 30,48 25,40
84
2.54 10.1001 (1.344) (1.200) (1.000)
TV.
c Dimensions in parentheses are in inches

4-28
TEXAS ~
INSTRUMENTS
POST OFFICE BOX 665012 • OAlL.~S, TeXAS 76265
 IC SOCKETS
PLCC BURN·IN/TEST

PRODUCT FEATURES
Can be loaded by top actuated insertion or press-in
insertion, either manually or automatically
High reliability due to high pressure contact point
Open body and high stand-off design provide high efficiency
in heat dissipation
High durability up to 10,000 cycles
Compact design
PERFORMANCE SPECIFICATIONS
Mechanical
Accommodates IC leads per specific IC device
Recommended PCB thickness range: 0.062 in to 0.092 in
Recommended PCB hole size range: 0.032 in to 0.042 in
Durability: 10,000 cycles 10 mO max contact resistance
change PART NUMBER SYSTEM

I
Insertion force: Zero g
Withdrawal force: Zero gt CPJ xx xx X xxx B
Electrical
Contact rating: 1 A per contact
T L Number :1 contacts
Contact resistance: 20 mO max initial
Insulation resistance: 1000 MO per MIL-STD 202, L ~t:h 0.050
Method 302, Condition B
Dielectric withstanding voltage: 500 V ac rms per Contact finish
MIL-STD 202, Method 301 33 = overall gold plate
Environmental
Thermal shock: 100 cycles, - 25 DC to + 1 50 DC Material
Temperature soak: 150 DC for 48 hours AA = copper alloy
Operating temperature: - 40 DC to + 150 DC
TI Burn-in PLCC series
MATERIALS
Body - ULTEM glass filled (UL 94 V-Oj
18 PIN FOOTPRINT SHOWN
Contact - copper alloy
Plating* - overall gold plate 4 "in over min 70 "in
nickel plating

t After IC is unlocked from the socket

*For additional plating options contact factory
For complete test report contact the factory

PLCC BURN·IN/TEST SOCKETS CPJ SERIES ca

~
ca
C

SIZES: 18 PIN
22 PIN

1.27 10.0501

L 5.08 10.2001
12.9010.5071--1

Dimensions in parentheses are inches

Contact factory for detailed information

TEXAS • 4·29
INSTRUMENTS
POST OFFICE BOX 665012 • DALLAS. TeXAS 75265
 ICSOCKETS
SINGLE·IN~LlNE PACKAGE SOCKETS

PERFORMANCE SPECIFICATIONSt
Mechenlcal
Vibration: MIL·STD·202
Durability: 30 cyclas
Insertion force: Zero g
Withdrawal force: Zero g*
Contact (normal) force: 200 g min
Contact retention force: 2 Ibs per circuit min
Electrical
Contact rating: 1 A
Contact rallistance: 30 mO max initial
Insulation resistance: 1000 MO at 500 dc
Dielectric strangth: 1 500 V ac rms
Capacitance: 2 pF max
tV.'ues may vary due to test sequence and SIP module
configuration PART NUMBER SYSTEM

I
*After module Is unlocked from the receptacle
For a complete test report, please contact factory TS8X xx XX X -xx - xx
Environmental Lvariations
(20 mO max contact resistanca change after all tests) 00 - standard
Operating and storage temperature: - 40°C to 100 °C product
Humidity: MIL·STD 202, Method 1060, 10 days
Size
Temperature soak: 85°C for 160 hours (number of
Thermal Shock: 5 cyclas, -40°C to 85°C per contacts per row)
MIL·STD 202. Method 107E
MATERIALS Housing material
80dy - PES polyether sulfone, glass filled, UL 94 V·O A -.PES
Contact - 8eryllium copper C17000; phosphor bronze alloy
CA510 Contact base material/plating
01-C17000130 lIin gold
Contact finishes - Post plate min 200 lIin tin/lead over min 02-CA610/30 lIin gold
50llin nickel overall 03-CI7000/200 lIin tinliead
Post plate min 30 lIin hard gold over min 7511in nickel overall 04-CA610/200 lIin tinliead
For additional plating options contact the factory.
Configuration/row·to-row spacing
01-single raw/N/A
03-dual row/0.300 in
DUAL ROW VERTICAL
04-dual row/0.400 in
05-dual row/O.SOO in
,- A
Series number denotes
rill ,...~ • .-.................... ......,....,..S" ~~I
~
0-0.100 in pitch, vertical mount
1 -0.100 in pitCh, low-profile (25°) mount

.
I
Consult factory for availability of configurations, materials, and
, ~ ........... "......,. .............,..~
sizes.
.... 1-'-2.84 10.1001
C
B -' SINGLE ROW LOW PROFILE
D

Contact factory for detailed information Dimensions in parentheses are in inches

4-30 TEXAS ."

INSTRUMENTS
POST OFFICE BOX 866012 • DALLAS. TEXAS 75265
 IC SOCKETS
HIGH DENSITY PIN GRID ARRAY

PERFORMANCE SPECIFICATIONS
Mechanical
Accommodates IC leads 0.015 in to 0.021 in diameter
Recommended PCB thickness range: 0.062 in to 0.092 in
Recommended PCB hole size range: 0.032 in to 0.042 in
Recommended hole grid pattern: 0.100 in ± 0.002 in each
direction PRECISION
Vibration: 15 G, 10-2000 Hz per MIL-STD 1344A, PRECISION MACHINED
Method 2005.1 Test Condition III SIX-FINGERED S.I,EEVE
Shock: 100 G, sawtooth waveform, 2 shocks each direction . INNER CONTACT
per MIL-STD 202, Method 213, Test Condition I
Durability: 5 cycles, 10 mil max contact resistance change
per MIL-STD 1344, Method 2016
Insertion force: 3.6 oz 1102 g) per pin typ using 0.018 in
diameter test pin
Withdrawal force: 0.5 02 114 g) per pin min using 0.018 in Inner contact - 30 "In gold over 50 "in nickel or ·100 "in
diameter test pin tin/lead over 50 "in nickel
Outer sleeve - 10 "in gold over 50 "in nickel or 50 "in
Electrical tin/lead over 50 "in nickel
Contact rating: 1 A per contact
Contact resistance: 20 mil max initial
Insulation resistance: 1000 Mil at 500 V de per PART NUMBER SYSTEM
MIL-STD 1344, Method 3003.1
Dielectric withstanding voltage: 1000 V ac rms C X G xx-xxx xx-xx

li
per MIL-STD 1344, Method 3001.1
Capacitance: 1 pF max per MIL-STD 202, Method 305 ~in1ength
Environmental WIRE WRAP
Operating temperature: - 65°C to 125°C, gold; - 40 °C to 3-0.510 long
100°C, tin/lead
Corrosive atmosphere: 10 mil max contact resistance Plating
change when exposed to 22% ammonium sulfide for
4 hours
Gas tight: 10 mil max contact resistance change when
exp~sed to nitric acid vapor for 1 hour
Temperature soak: 10 mil max contact rasistance change Body Style and Orientation
when exposed to 105°C temperature for 48 hours
Contact Loading Pattern
MATERIALS Pin
Grid Number of Pins
Body - PBT polyester UL 94 V-O Array 024 to 324
On request, G10/FR4 or Mylar film
Outer sleeve - Machined Brass 100-B-626) Overall Grid Size
Inner contact - Beryllium copper (00-C-530) heat treated
Plating: (specified by part number) BODY MATERIAL
5x5=05to 18x18=18

G - Glass Filled Epoxy

...
«S
«S
P - PBT Polyester C
PIN GRID ARRAY TI Socket ca
(,)

Insulator SI.e A B "2

±O.O10 ±0.OO5 t «S
9x9 (0.950) 24,13 (0.800) 20,32 .c
(,)
lOx 10 (1.050) 26,67 (0.900) 22,86
Q)
11 xlI (1.150) 29,21 (1.000) 25.40
12x 12 (1.250) 31,75 (1.100) 27,94 :E
13x 13 (1.350) 34,29 (1.200) 30,48
1.3/2.0 2.54 14x 14 (1.450) 36,83 (1.300) 33,02
10.05/0.0SI TY~P
O. 1010. 121 10.1001 TYP NONCUMULATIVE 15x 15 (1.550) 39,37 (1.400) 35,56
16x 16 (1.650) 41,91 (1.500) 38,10
3.S/4.S
10.14/0.1SI
I
nn n
~ ~ ~ ~ ~
I 17x17
18x 18
(1.750) 44.45
(1.850) 46,99
(1.600) 40,64
(1.700) 43,18

~~033
2.S!/3.e1 - 10.0211 DIA
~~ 1.35
10.0531 DIA
tNoncumulative
Dimensions in parentheses are inches
10.105/0.1501 Consult factory for detailed information

TEXAS ." 4-31

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS. TeXAS 76266
 IC SOCKETS
SOJ BURN·IN/TEST .

PERFORMANCE SPECIFICATIONS
Mechanical
Accommodates IC leads per specific IC device
Recommended PCB thickness range: 0:062 in to 0.092 in
Recommended PCB hol.e size range: 0.032 in to 0.042 in
Durability: 10,000 cycles,20;mOmax contact resistance
change .
Insertion force: 1.3 oz per pdsition max
Withdrawal force: 8.8 grams per position min
Electrical
Contact rating: 1.0 A per contact
Contact resistance: 20 mO max initial
Insulation resistance: 1000 MO per MIL-STD 202,
Method 302, Condition B
Dielectric withstanding voltage: 700 V ac rms per
MIL-STD 202, Method 301
Environmental
Thermal shock: 100 cycles, -25°C to +180°C, 1 hour
Temperature soak: 180°C for 1000 hours, 80 mO max PART NUMBER SYSTEM
change
Operating temperature: - 65°C to + 180°C CSJT xxx xx xx X
MATERIALS T
Body Material
Body - PES glass filled UL 94 v-o
Contact - copper alloy Blank = G.F. PES
Plating - overall gold plate min 4 "in over min 70 "in nickel A = PPS R4-03
plating B = G.F. PEl

Body Variation
02 = Standard 1 forward/
backward insertion
03 = Special/orientation pin
04 = Speciallhighstandoff
05 = Speciall24-pin
06 = Standard 2 forward
insertion, BECU

Contact Finish
37 = Overall gold plate 4 "in
38 = Overall gold plate 30 "in
57 = Selective gold plate 4 "In
58 = Selective gold plate 30 "in

Number of Contacts
2.53 -+i t4- 3.00
10.0991 0.4010,0'61 1,21 (0.060) 10."SI
14---I0I+---15.2410.600l----I./+__ 2.53 TI SOJ series
+-----20.310.80011-1 -----+.'
10.0991
SIZES: 20 pln
26 pin
02 VERSION SHOWN
r------,
20-PIN (02 VERSION) FOOTPRINT SHOWN
o o.~ 2.~
....
CI)
CI)
_ ' ; ' ___ ';'~IO.O~J_ - _ . ; , __ .;,=-n10.,00J

-"'+i "'+.;,-- ---~+~tJ, ~ ~

I
;0
I I I I I I
I : I : e I I I 2
111 ' , .'~;
+$ ~-b-*$l-$ttl
I 1'1

Dimensions in parentheses are inches

-+~-l~j~~~~$ 2~51J--\
1,27 I (01001
2.64
10.1001
10.0501 .
Contact factory for detailed information NO, 1 PIN

4-32 TEXAS •
INSTRUMENlS
POST OFFICE BOX 656012 • DALLAS, TEXAS 75265
 IC SOCKETS
DUAL-IN-LiNE

PERFORMANCE SPECIFICATIONS C7X SERIES - SCREW MACHINE

Mechanical WIDE-TAPERED
ENTRY
Accommodates IC leads 0.011 ± 0.003 in by
0.018 ± 0.003
Recommended PCB thickness range: 0.062 in to 0.092 in
Recommended PCB hole size range: 0.032 in to 0.042 in
Recommended hole grid pattern: 0.100 in ± 0.003 in each
direction
Vibration: 15,G, 10-2000 Hz per MIL-STD 1344A, .PRECISION' PRECISION
Method 2005.1 Test Condition III. FOUR-FINGERED MACHINED
Shock: 100 G, sawtooth waveform, 2 shocks each direction CONTACT SLEEVE
per MIL-STD 202, Method 213, Test Condition I
Durability: 5 cycles, 10 mO max contact resistance change
per MIL-STD 1344, Method 2016
Insertion force (C7X and CB6): 16 oz (454 g) per pin max
Withdrawal force: (40 g) per pin min C7X SERIES ~ SCREW MACHINE
Electrical PART NUMBER SYSTEM

II
Contact rating: 1 A per contact C7X IX) XX - X X
Contact resistance: 20 mO max initial
Insulation resistance: 1000 MO at 500 V dc per
MIL-STD 1344, Method 3003
I Variations
Solder Tall. 9
Dielectric withstanding voltage: 1000 V ac rms per
Pin length 0.125 Typ
MIL-STD 1344, Method 3001.1

Platlng~:::::::I:)531
Capacitance: 1 pF max per MIL-STD 202, Method 305
Environmental 0
Operating temperature: - 55 DC to 125 DC, gold; - 40 DC
to 100 DC, tin Number of o- Gold/Gold
Corrosive atmosphere: 10 mO max contact resistance Positions 5 - Tin/Gold
change when exposed to 22% ammonium sulfide for
4 hours 5 - Single-in-line package (where applicable)
Gas tight: 10 mO max contact resistance change when
exposed to nitric acid vapor for 1 hour Screw Machine Socket
Temperature soak: 10 mO max contact resistance change 1 - wire wrap
when exposed to 105 DC temperature for 48 hours 2 - solder tail

Materials (C7X and C861 C86 SERIES - STAMPED AND FORMED

80dy - PBT polyester UL 94 V-O
C7X Contacts - Outer sleeve: brass
Clip: BECU
Contact finish - clip 30 "in gold over 50 "in nickel or
Specified by 50 "in tin/lead over 50 "in nickel ...co
CO
Part Number - sleeve 10 "in gold over 50 Jiin nickel C
or 50 "in tin/lead over 50 "in nickel
CB6 Contacts - Phosphor bronze base metal
CB6 Contact-finish - Tin plate 200 "in over copper flash
(ij
(J
-2
CO
.&.
(J
Q)
C86 SERIES :2:.
PART NUMBER SYSTEM

lc IS6 lXX- L Variation

01 - Standard product
Number of positions

Tin Dual Beam Face Wipe

TI Socket Series

TEXAS ~ 4-33
INSTRUMENlS
POST OFFICE BOX 665012 • DALLAS. TeXAS 75265
 IC SOCKETS
DUAL·IN·lINE

DUAL·IN-LiNE C7X SERIES

C7X AND C86 SERIES

3.05
(0.1201 MAX

-*-=,,~=1L-----JJ9
1.35
3.61/4.57 10.0531 0.53 --u-
10.1421110.1601. 10.0211 DIA
---I1-1~~:51 DIA

C86 SERIES

t
4.25
(0.1691
+
t
0,38 TYP
DIPS
'"~ '"00 8'" '"0
C!
.;
20
...'a
:i 0
+I :i +t :i .;
+I :i 0
+I

l.
E
C

is
III
.Ii "~ "~ :1l. C

~
III

~
"isE "
~
7.62
"
5.0a 10.16 7.62 30.4a 27,94 12,76 10,16
6
(0 3001 (0.2001 (0.4001 (0 3001 '24 (12001 (1.1001 (0.5001 (0.4001
10,16 7,62
10.4001 (0.3001 28 (~5';~~1 (1.3001 (0.7001 (0.6001
10,16 7,62 33,02 17,78 16.24
a
(0.4001 (0.3001
17,78 15,24 10,16 7,62 38,10 17,78 15,24
14
(0.7001 (0.6001 (0.4001 (0.3001 32 (i~6:1 (1.5001 (0.7001 (0.6001

(i6B~~1
20.32 17,78 10,16 7.62 43,18 17,78 15.24
16
(0.8001 (0.7001 (0.4001 (0.3001 34 (1.7001 (0.7001 (0.6001
22,86 20,32 10,16 7,62 48,26 17,78 15.24
(0.4001 (0.3001 40 (~OO~I (1.9001 (0.7001 (0.8001
18
(0.9001 (0.8001
22,86 10,16 7,62 58.42 17,78 15,24
(0.4001 (0.3001 48 (~O';:I (2.3001 (0.7001 (0.6001
25.40
20
(1.0001 ((i.9001
27,94 26,40 12,76 10.16 60,96 25.40 7,62
(0.5001 (0.4001 50 (~35~gl (2.4001 (1.0001 (0.9001
22
(1.1001 (1.0001

(0.7001 (0.6001 64 (~12~~1 (3.1001 11.0001 (0.9001

30,48 27,94 17,78 15.24 78,74 25.40 22,86
24
(1.2001 (1.1001
30.48 27.94 10,16 7,62
'24 (1.2001 (1.1001 (0.4001 (0.3001

t Nonstandard sizas
C
...
I»
I»
Not all sizes available in aach series
Dimensions apply to all series

Dimensions in parentheses are inches

Contact factory for detailed information

4-34
. TEXAS.
INSTRUMENTS
POST OFFICE BOX 855012 • DAUAS, TEXAS 715285
 IC SOCKETS
BURN-IN/TEST DIP

1
PERFORMANCE SPECIFICATIONS PART NUMBER SYSTEM
Mechanical C X 37 XX -
Accommodates IC leads 0.011 in by 0.018 in
Recommended PCB thickness range: 0.062 in to 0.092 in
22 LS L Pin to pin
A-D.100 centers
Recommended PCB hold size range: 0.032 in to 0.042 in
8-0.070 centers
Durability: 10K cycles - CM Series, 5K cycles - CP/CO
Electrical PPS high temperature
Contact rating: 1 A per contact body material
Contact resistance: 20 mil max initial Copper nickel alloy
Insulation resistance: 1000 Mil at 500 V de Soldertail
Dielectric withstanding voltage: 1000 V ac rms
Number of positions
Capacitance: 1 pF max per MIL-STD 202, Method 305
Environmental Overall gold plate
Operating temperature: - 65°C to 170°C - CP/CM Series,
- 65°C to 150°C - CO Series Series Features
Humidity: 10 mil max contact resistance Q - Auto unloadable
P - High density mounting
Temperature Soak: 10 mil max contact resistance change
M - Shrink 0.070 centers
MATERIALS
TI Socket Series
Body - PPS (polyphenylen sulfide I UL 94 V-O
Contacts - Higher performance copper nickel alloy
Plating: t 4 Itin of gold min over 100 Itin of nickel min CQ37 SERIES

t For additional plating options consult the factory A 0 C B

Number of
±0.01 ±0.02 ±0.01 ±0.01
Positions
BURN-IN/TEST DIP SOCKETS Length Width Contact
14 20,32 10.800)

,.Ii
16 22,35 10.880) 12,70 15,24 7,62
18 24,89 10.980) (0.500) (0.6001 (0.300)
20 27,43 (1.080)
3.30?2
10.'301L 24 32.51 (1,280)
28 37,59 (1.480) 19.05 22,86 15,24
T) I.-- to.l00)
2.5' 40 52,83 12.080) (0.750) 10.900) (0.600)
SOLDER TAil 42 55,37 (2.180)
(O.100)-..j ~

CP37 SERIES
CP37 SERIES
CQ37 SERIES
A B C
Number of
max ±0.02 max
Positions
Length Width
8 11,68 10.460)
14 17,7810.700)
7,62 12,70
16 20,32 10.800)
(0.300) 10.500)
18 22,86 (0.900)
20 25,4011.0001
24 30,48 (1.200)
15,24 20,32
28 35,56 11.400)
(0.600) (0.800)

1
40 50,80 12.000)
CM37 SERIES
CM37 SERIES
50
(0.256) '~(O,5'
6. n,Q20) A B C
Number of

~::~:::::w.:~n
±O.016 ±0.O2 ±0.O16
Positions
-.-l
• Length Width
10,67 17,20
28 27,18 (1.070)
(0.420) (0.677)

I. A----J ~~.J n/l~"99

104721
40
42
54
37,85 11.490)
39,62 (1.560)
50,29 (1.980)
16,51
(0.650)
23,11
(0.910)

0.53-11- , 78--11.. 3.48 20,32 26,92

64 59,18 (2.330)
(0,021) 10.070) (0.137) (0.800) (1.060)
0,50
10.020) Dimensions in parentheses are inches
Contact factory for detailed information

TEXAS • 4-35
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75265
 IC SOCKETS
QUAD·IN·LlNE/SHRINK PACK

PERFORMANCE SPECIFICATIONS
Insertion force: 16 oz (454 g) per pin max
Withdrawal force: 1.5 oz (42 g) per pin min
Operating temperature: - 40 DC to 100 DC, tin/lead
Accommodates IC leads 0.011 ± 0.0003 in by
0.018 ± 0.003 in
Contact rating: 1 A per contact
MATERIALS
Body - PBT polyester UL 94 V·O
C4S & CxW Contacts - Copper alloy
Contact finish - Reflow tin plating, 40 /tin min

PART NUMBER SYSTEM FOR CxW SERIES

lli l
C X W XX - 11
QUAD-IN-LINE (CxW S'ERiES)

Number of contacts (42, 52, 64) I~ A..,...--~--.j

Staggered leads
5 - 64 contacts
6 - 42, 52 contacts
TI Socket Series

QUAD·IN·LlNE (CxW SERIES)

A B C
Product
Max Row to Row Max
Number
Length Row to Row
41,90 22,90 19,05 1,79
C5W64-11
(1.651 (0.950) (0.750) (0.050)
27,90 22,90 17,80
C6W42-11
(1.101 (0.9001 (0.700)
34,30 22,90 17,80 C4S SERIES
C6W52-11
(1.35) (0.9001 (0.700)
DimenSions in parentheses are inches A B C
Contact factory for detailed information Positions Max Row to Row Max
Length Width
PART NUMBER SYSTEMt FOR C4S SERIES 25,02 10,16 13,00

1
28
(0.985) (0.4001 (0.512)

4 1S t ~uO:ber of contacts
28,40,42,52,54,64
40

64
35,69
(1.405)
57,07
(2.247)
15,24
(0.6001
19,05
(0.7501
17,98
(0.708)
21,62
(0.851)
Shrink Pack DimenSions In parentheses are Inches
(0.070 in pin-to-pin contact spacing)
Reflow tin plating SHRINK PACK DIP (C4S SERIES)
C TI Socket Series
I»
;- t Also available in screw machine contacts

C4S SERIES

4-36
. TEXAS'"
INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 75285
 IC SOCKETS
BURN·IN/TEST

PERFORMANCE SPECIFICATIONS QUAD FLAT PACK ICFPM SERIES)

Mechanical
Accommodates IC leads per specific IC device
Recommended PCB thickness range: 0.062 in to 0.092 in
Recommended PCB hole size range: 0.032 in to 0.042 in
Durability: 5000 cycles, 10 mil max contact resistance
change per MIL-STD 1344, Method 2016
Electrical
Contact rating: 1 A per contact
Contact resistance: 20 mil max initial
Insulation resistance: 1 Mil at 500 V dc per
MIL-STD 1344, Method 3003.1
Dielectric withstanding voltage: 700 V ac rms per
MIL-STD 1344, Method 3001.1
Capacitance: 1 pF max per MIL-STD 202, Method 305
Environmental PART NUMBER SYSTEM

1
Operating temperature: - 65°C to 170 °C
01X

L:~
Humidity: 10 mil max contact resistance change when
tested per MIL-STD 202, Method 103B
Temperature soak: 10 mil max contact resistance change
when exposed to 105°C temperature for 48 hours = IXX
Lvariations
A - 1.0
mm ~
8 - 0.8 mm ~
MATERIALS
Body - CFP Series - PES (polyether sulfone) glass filled M - Quad pack contact spacing
UL 94 V-O TI socket Plating
Temperature: -65°C to 170°C Style PF - Flat pack 37 - overall gold plate
Contact - Beryllium copper
Plating: t Overall gold plate min 41'in over min 70 I'in nickel PIN GRID ARRAY ICZFW SERIES)
plating
tFor additional plating option consult the factory.
Dimensional drawings available from factory.

SMALL OUTLINE FLAT PACK ICFPH/K SERIES)

PART NUMBER SYSTEM ...co

II 01
c xx X XXX xx CO
o
Lplating
37 - overall gold plate ca
Co)
Number of positions '2
CO
PART NUMBER SYSTEM
Configuration
W-llxllx2
.c
Co)
Q)
c
xx LX LXXX Lplati::
37 - overall gold plate
Style ZF - Zero force

TI Series socket
::a!:
Number of positions
AVAILABLE SIZES
Configuration
H - 14, 16, 18,20 Positions CFPH Series 14, 16, 18, 20 Small Outline
K - 24, 28 Positions CFPK Series 24, 28 Flat Pack

Style FP - Flat pack CFPM Series 64, 80 Quad Flat Pack

TI Series socket CZFW Series 11 x 11 x2 Pin Grid Array

Contact factory for detailed information

TEXAS ." 4-37

INSTRUMENTS
POST OFFICE BOX 655012 • DALLAS, TEXAS 76265
NOTES
 MARYLAND: Arrow/Klerulff (301) 995-6002;

TI Sales Offices TI Distributors ~:~~"!::r \~~V) ~S:o.~~~~; ~:~~h(~M~~l~~~64;

MASSACHUSETTS Arrow/Klerulff (508) 658-0900:
Hall-Mark (508) 667-0902; Marshall (508) 658-0810;
ALABAMA: Huntsville (205) 831·7530. Schweber (617) 275-5100; Time (617) 532-6200;
ARIZONA: Phoenix (602) 995-1001; Wyle (617) 273-7300; Zeus (617) 863-8800.
Tucson (602) 292·2640. TI AUTHORIZED DISTRIBUTORS MICHIGAN: Detroit: Arrow/Klerulff (313) 462-2290:
CALIFORNIA: Irvine (714) 660-1200; Arrow/Klerulfl ElectronIcs Group Hall-Mark (313) 462-1205; Marshall (313) 525-5850;
Roseville (916) 786-9208: Arrow (Canada) Newark (313) 967-0600; Schweber (313) 525-8100;
Future ElectronIcs (Canada) Grand Rapids: Arrow!Klerulff (616) 243-0912.
::~t~'~.~J~~~~~~~:S~b; GRS ElectronIcs Co., Inc.
Torrance (213) 217.7010;
Woodland Hills (818) 704-7759. Hall·Mark ElectronIcs ~!~_':.~~fr6~~)A~~~J~~~u:a~:~:1, ~:t1 ~~~-2211:
Schweber (612) 941-5280.
COLORADO: Auror~ (303) 368·8000.
Marshall IndustrIes
Newark ElectronIcs MISSOURI: St. louis: Arrow/Klerulff (314) 567-6888:
CONNECTICUT: Wallingford (203) 269-0074. Hall-Mark (314) 291-5350; Marshall (314) 291-4650;
Schweber ElectronIcs Schwaber (314) 739-0526.
FLORIDA: Altamonte Springs (305) 260·2116; TIme ElectronIcs NEW HAMPSHIRE: Arrow/Kleruttf (603) 668-6968:
Ft. Lauderdale (305) 973-8502; Wyle laboratorIes
Tamp. (813) 885-7411. 5chweber (603) 625-2250.
Zeus Components NEW JERSEY: Arrow/Klerulff (201) 538-0900,
GEORGIA: Norcross (404) 662·7900.
- OBSOLETE PRODUCT ONLY- (609) 596-8000: GRS Electronics (609) 964-8560;
ILLINOIS: Arlington Heights (312) 640·2925. Han-Mark (201) 575-4415, (201) 882-9773,
Rochester ElectronIcs, Inc. (609) 235-1900; Marshall (201) 882-0320,
INDIANA: Carmel (317) 573-6400: Newburyport, Massachusetts (609) 234-911)(); Schweber (201) 227-7880.
Ft. Wayne (219) 424-5174.
(508) 462·9332 NEW MEXICO: Arrow/Klerutff (505) 243-4566.
IOWA: Cedar Rapids (319) 395·9550.
KANSAS: Overland Park (913) 451·4511. :~T~:~ffl '(:r~ ~~f-~~ixt; Hall-Mark (516) 737-0600;
MARYLAND: Columbia (301) 964-2003. Marshall (516) 273-2424; Schweber (516) 334-7474;
Zeus (914) 937-7400:
MASSACHUSETTS: Waltham (617) 895-9100. ~~_~~~~~OA;,r~;~~J;~~~J!~:~~~I2~~~~81-9235; ~:~~:::(~1~r:;'~J;~~J~~:~:ln;~~~~35-7620;
MICHIGAN: Farmington Hills (313) 553-1569; Schweber (205) 895-0480.
Schweber (716) 424-2222;
Grand Rapids (616) 957-4200.
MINNESOTA: Eden Prairie (612) 828-9300.
~~,~~3::::(6~~)o:';~!f~~~ ~~~Jh~~r(~~f~96-0290; Syracuse: Marshall (607) 798-1611.
Schweber (602) 431-0030: Wyle (602) 866-2888. NORTH CAROLINA: Arrow/Klerulff (919) 876-3132,
MISSOURI: St. Louis (314) 569--7600. (919) 725-8711; Hall-Mark (919) 872-0712:

NEW JERSEY: Iselin (201) 750-1050. i~~!:/~:~~ (~~:) ~6,~~;~~~(;~~e8~:~~'l~; Marshall (919l878-9882; Schweber (919) 876-0000.
OHIO: Cleveland: Arrow/Klerulff (216) 248-3990:
Hall-Mark (818) 773-4500, (714) 669-4100:
NEW MEXICO: Albuquerque (505) 34&02555. Marshall (818) 407-0101, (818) 459-5500, Hall-Mark (216) 349-4632; Marshall (216) 248-1788;
(714) 458-5395: Schweber (818) 880-9686; Schweber (216) 464-2970;
NEW YORK: East Syracuse (315) 463-9291; Columbus: Hall-Mark (614) 8a8-3313:
~
714) 863-0200, (213) 320-8090; Wyle (818) 880-9000,
Melville (516) 454-6600; Dayton: Arrow/Klerulff (513) 435-5563:
Pittsford (716) 385-6770; 714) 863-9953; leus (714) 921-9000: (818) 889-3838;
aeramento: Hall-Mark (916) 624-9781; Marshall (513) 898-4480; Schweber (513) 439-1800.
Poughkeepsie (914) 473-2900.
Marshall (916) 635-9700; Schweber (916) 364-0222; OKLAHOMA: Arrow/Kierulff (91B) 252-7537;
NORTH CAROLINA: Charlotte (704) 527-0933; Wyle (916) 638-5282: Schweber (918) 622-8003.
Raleigh (919) 876-2725. San Diego: Arrow/Klerulff (619) 565-4800;
Hall-Mark (619) 268-1201: Marshall ~61~ 578-9600; OREGON: Arrow/Klerulff (503) 645-6456;
PHIO: Beachwood (216) 464-6100;
~~~~~~~~I~S:~::~::4~~~/~~!rJI~ (:~) ~~5-6600,
Marshall (503) 644-5050; Wyle (503) 640-6000.
Beaver Creek (513) 427-6200.
OREGON: Beaverton (503) 643-6758. Hall-Mark (408) 432-0900: Marshall (408) 942-4600;
Schweber (408) 432-7171; Wyle (408) 727-2500; ~~:r:~~Y:o~ltGRr:r~I:~~:n~!: ~~~~~ :~::~:~;
PENNSYLVAN.IA: Blue Bell (215) 825-9500. Zeus (40&) 998-5121. Marshall (412) 963-0441: Schweber (215) 441-0600,
(412) 963-6804.
PUERTO RICO: Hato Rey (809) 753-8700. COLORADO: Arrow/Klerulff (303) 790-4444;
Hall-Mark (303) 790-1662: Marshall (303) 451-8383; TEXAS: Austin: Arrow/Klerulff (512) 835-4180;
TENNESSEE: Johnson City (615) 461-2192. Schweber (303) 799-0258; Wyle (303) 457-9953. Hall-Mark (512) 258-8848; Marshall (512) 837-1991;
TEXAS: Al)stln (512) 250-7655; CONNETICUT: Arrow/Klerulff (203) 265-7741: g~~I::~~r~~!:IK~:r~l~or:i4W~~~l~~~34-9957;
Houston (713) 778-6592;
Alehard$On (214) 680-5082;
Hall-Mark (203) 271-2844: Marshall (203) 265-3822;
Schweber (203) 264-4700.
Hall-Mark (214) 553-4300; ~arshall
(214) 233-5200:
Schweber (214) 661-50fO: Wyle (214) 235-9953;
San Antonio (512) 496-1n9. Zeus (214) 783--7010;
FLORIDA: Fl. Lauderdale: EI Paso: Marshall (915) 593-0706:
UTAH: Murray (801) 266-8972. Arrow/Klerulff (305) 429-8200; Hall-Mark (305) 971-9280; Houston: Arrow!Klerulff (713) 530-4700:
WASHINGTON: Redmond (206) 881-3080. ~~~s:::: (~~~~!r~i:r~~g: (~g~r;~~.ro~50:) 977-7511; HaU-Mark (713) 781-6100: Marshall (713) 89&09200;
Schweber (113) 784-3600; Wyle (713) 879-9953.
WISCONSIN: Brookfield (414) 782-2899. Hall-Mark (407) 830-5855; Marshall (407) 767-8585:
Schweber (407) 331-7555; Zeus (407) 365-3000:
CANADA: Napaan, Ontario (613) 726-1970;
Richmond Hili, Ontario (416) 884-9181;
Tampa: Hall-Mark (813) 53D-4543: ~!~~a~r(~~~~~;~!~0~:'~:~:h!~1{~~,) 485-1551;
Marshall (813) 576-1399: Schweber (813) 541-5100. Wyle (801) 974-9953.
St. Laurant, Quebec (514) 336-1860.
GEORGIA: Arrow/Kierulff (404) 449-8252; WASHINGTON: Arrow/Klerulff (206) 575-4420:
Hall-Mark (40~) 447-8000; Marshall (404) 923-5750: Marshall (206) 486-5747; Wyle (206) 881-1150.
Schweber (404) 449-9170.
WISCONSIN: Arrow/Klerulff (414) 792-0150:
TI Regional ILLINOIS: Arrow/Klerulff (312) 250-0500;
Hall-Mark (312) 880-3800; Marshall (312) 490-0155;
Newark (312) 784-5100: Schweber (312) 364-3750.
Hall-Mark (414) 797-7844: Marshall (414) 797-8400;
Schweber (414) 784-9020.
CANADA: Calgary: Future (403) 235-5325;
Technology Centers INDIANA: Indianapolis: Arrow/Klerulff (317) 243-9353;
Hall-Mark (317) 872-8875; Marshall (317) 297-0483;
Schweber (317) 843-1050.
Edmonton: Future (403) 438-2858;
Montreal: Arrow Canada (514) 735-5511:
Future (514) 694-7710;
CAt.:IFORNIA: Irvine (714) 660-S105i Ottawa: Arrow Canada (613) 226-6903;
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GEORGIA: Norcross (404) 662-7945. Toronto: Arrow Canada (416) 672-7769;
KANSAS: Kansas City: Arrow/Kierulff(913) 541-9542;
IL.LlNOIS Arlington Heights (312) 640-2909. Hall-Mark (913) 888-4747: Marshall (913) 492-3121; Future (416) 638-4771; Marshall (416) 674-2161;
Schweber (913) 492-2922. Vancouver: Arrow Canada (604) 291-2986;
MASSACHUSETTS: Waltham (617) 895-9196. Future (604) 294-1166.
TEXAS: Richardson (214) 680-5066.
CANADA: Nepean, Ontario (613) 726-1970.
Customer
", Response Center
TOLL FREE: (800) 232-3200
TEXAS OUTSIDE USA: (214) 995-6611
INSTRUMENTS (8:00 a.m. - 5:00 p.m. CST)

A·18S
 OREGON: . . . .non: 6700 SW 106th St., Suite 110, HONG KONG: Texas Instruments Hong Kong Ltd., 8th

TI Worldwide Beaverton, OR 97005, (6031 643-6768.

PENNSYLVANIA: .......: 670 Sentry Pkwy,
Blue Bell, PA 19422, (2161 825-9600.
~~~~ ::,~~~ 1~~~r~~7i:;2~3~anton Rd., Kowloon.
IRELAND: Texaalnstruments (lr.landl Limited:

Sales Offices ~:r~5~~~~,-=::;;r:,n:=ci~izj6~jOO.

TENNESSEE: JobnIOn City: .Erwin Hwy.
7/8 Harcourt Street, Stillorgan, County Dublin, Eire,
1781677.
ITALY: Taxas In8trumentaltalia S.p.A. Division.
Semlconduttori: Viele Europa. 40, 20093 Cologne
ALABAMA: ttunta. .: 500 Wynn Drive, Suite 514, P.O. Drawer 1266. Johnson City, TN 37805 Monze.. (Milano). 102) 253001; Via Castello d.lla
Huntsville. AL 35805. (205) 837-7530. (6161 461-2192. Magliana, 38, 00148 Roma, (061 6222661;
ARIZONA: PhoenIx: B825 N. 23rd Ave .. Phoenix, TEXAS: Austfn: 12501 R....rch Blvd., Austin, TX Via Amendola, 17,40100 Bologna, (0511554004.
AZ 85021, (602) 99S·1007;TUCSON: 818 W. Miracte 78759, 1512) 260-7855; Rlchlldeon: tOOl E. JAPAN: Tokyo Marketing/Sale8 (Headquarters):
Mile. Suite 43. Tucson, AZ 85706, (602) 292-2840. Campbell Rd., Richardson, TX 75081, Texas In8truments Japan Ltd., MS Shibaura Bldg .• 9F,
(2141680-6082; Houston: 9100 SouthweSt Frwy .. 4·13-23 Shibaura, Minato-ku, Tokyo 108, Japan.
CALIFORNIA: Inrtne: 17891 Canwright Dr., Irvine. CA Suite 250. Houston, TX 77074, (7131 778-6592;
92714, (714) 880-1200; RoMvIIe: 1 Sierra Gete 03-769-8700. Tex.s Instruments Japa':l Ltd.: Nissho-
Plaza, Roseville, CA 95878, (918) 786-9208;
s.n Antonio: 1000 Central Parkway South. Iwai Bldg. 5F, 30 Imabashi 3-chome, Higashl-ku,
s.n DIego: 4333 View Ridge Ave., Suite 100, San Antonio, TX 78232,15121498-1779. Osaka 541, Japan, 06-294·1881: Deini Toyota W.st
Bldg. 7F. 10-27 Maleki 4-chome, Nakamura-ku,
~:~i~~:3~~1~s!e~2~~9~~~ Cia,., CA UTAH: Mumly: 5201 South Green St., Suite 200,
Murray. UT 84123. 1801) 268-8972. Nagoya 460. 052-683-8691: Dailchl Selme! Bldg. 6F,
95054, 14081 980-9000; Torrance: 690 Knox St .. 3- 10 Oyama-cho, Kanazawa 920, Ishikawa·k.n,
~~~~T=~~: :Jg2~i:86IN:81~':8:;.
Torrance. CA 90502. (213) 217-7010; 0762-23-5471; Daiichi Olympic Tachikawa Bldg. 6F,
WoodIMd H,,: 21220 Erwin St .• Woodland Hills, 1-25-12 Akebono-cho, Tachikawa 190, Tokyo,
CA 91367, (818) 704-7759. 0425-27-6426; Matsumoto Showa Btdg. 6F, 2-11
WISCONSIN: 1IrookfiaId: 460 N. Sunny Slope, Suite Fukashi 1-chome. Matsumoto 390, Nagano-ken.
COLORADO: Aurora: 1400 S. Potomac Ave., 160, Brookfield. WI 53005. (4141782-2899.
SUite 101, Aurora. CO 80012. (303) 36a.aooo, CANADA: N....an: 301 Moodie Drive, Mallorn Center, g~86Ji~~=aT_~~~:':hr:~'':::h~::lno~F,
Nepean, Ontario, Cenada, K2H9C4, 045-322-6741; Nihon Seimai Kvoto Yauka Bkig. SF.
CONNECTICUT: Wallngfoftl: 9 Barnes Industrial Paril. 843-2 Higashi ShlokohJldorl. Nishlnotoh-in Higashi-iru,
Rd., Barnes Industria' Perk. Wallingford. (613) 728-1970. IIchmond HII: 280 Centre St. E.,
Richmond Hili L4C1B1, Ontario. Canada Shiokouji, Shimogyo-ku, Kyoto 800, 075-341-7713:
CT 06492. (203) 269-0074. 2597-1, Aza Harudai, Oaza Vasaka. Kit8uki 873. Olta-
(4181 884-9181;'St. Leurent: Vii" St. Laurent
FLORIDA: Attamonte Springs: 370 S. North Lake Blvd. Quebec, 9460 Trans Canads Hwy., St. Laurent, kan, 09788-3-3211; Miho ~ant, 2360 Kihara Miho-
An.monte Springs. Fl32701, (305) 260-2116; auebec, Canada H4S1R7, 15141 336-1860. muta, Ina8hlki-gun 300-04, lbaragi-ken,
Ft. LeucIerdIht: 2950 N. W. 62nd St., 0298-85-2541.
Ft. Lauderdale, FL 33309, (305) 973-8502; KOREA: Texa8 Instruments Korea Ltd., 28th Fl., Trade
Tempe: 4803 George Ret. Suite 390, Tower, 1159, Sam8ung-Oong, Kangnam-ku, Seoul,
Tampa, FL 33634. (813) 885-7411. ARGENTINA: Texas Instrum.nts Argentina Viamont. Korea 2+551-2810.
GEORGIA: Nore_: 5515 Spalding Drive, Norcross. ~l ~ ~jie~g:9~aPital Fed.rat, 8uenos Aires, Argentina,
GA 30092. (404) 662-7900 MEXICO: Texas Instrum.nts d. Mexico S.A.: Alfonso
Reyes-115, Col. Hipodromo Condeaa, M.xico, D.F.,
AUSTRALIA ,. NEW ZEALAND): Texas Instruments Mexico 06120, 525/525-3860.
~:~~~~ =:1I~5. ~~~2f6:~~~~~' Australia Ltd.: 6-10 Talavera Rd .. North Ayde
(Sydney), New South Wales, Australia 2113. MIDDLE EAST: Texas Instruments: No. 13, 1st Floor
INDIANA: Ft. Wayne: 2020 Inwood Or., 2 + 887·1122; 5th Floor, 418 St. Kilds Road, Mannai Bldg., Diplomatic Area, P.O. Box 26336,
Ft. Wayne, IN 46815, (219) 424-5174: Melbourne, Victoria, Australia 3004, 3 "+ 267·4677; Manama 8ahrain, Arabian Gulf, 973+274681.
C.mel: 550 Congre8stonal Dr., Carmel, IN 46032, 171 Philip Highway, Elizabeth, South Australia 5112,
8 + 26~2066. NETHERlANDS: Texas Instruments Holland B.V.,
(317) 573-6400. 19 Hogehilweg, 1100 AZ Amstardam-Zuldoost,
tOWA: Ceftr RIIpkII: 373 Collins Rd. NE, Suite 201, AUSTRIA: Texas Instruments Gee.m.b.H.: Holland 20+5602911.
Cedar Rapids, IA 52402, (319) 395-9550. ~":~:~~2~~ 8/18, A-2345 Brunn/G.birge, NORWAY: Texas Instruments Norway AlS: pe10e,
Refstad 0585. Oslo 5, Norway, (21155090.
~~a~~:~ta:s ~l~~o7(=~\j :~~~4~~,~on BELGIUM: Texaslnstrum.nts N.V. B.lgium S.A.: 11,
PEOPLES REPUBLIC OF CHINA: Texas Instruments
~2in2:t~lg;~ond.tlaan 11, 1140 Brussels, Belgium, China Inc., Beijing Representstive Office, 7-05 Citic
MARYLAND: Columbia: 8815 Centre Park Or.,
Columbia MD 21045, (301) 984-2003. 8Idg., 19 Jianguomenw8i Dalle. Beijing, China, 18611
BRAZIL: Texa. Instruments E~ronicos do 8rasil 5002255, Ext. 3750.
MASSACHUSETTS: W....m: 960 Winter St., Ltda.: Rua Paes Leme. 524-7 Andar Pinheiros. 06424
Waltham, MA 02154, (817)895-9100. Sao Paulo, 8razil, 0815-6166. PHIUPPINES: Texas Instruments Asia Ltd.: 14th Floor,
Sa- Lepanto Bldg., Paseo de Roxaa, Makati, Metro
MICHIGAN: Fa"'*tgton .....: 33737 W. 12 Mile Rd., DENMARk: Texas Instruments A/S, Mairelundvej 46E, Manila, Philippines, 817-60-31.
Farmington H1118. MI48018, (313) 553-1569. 2730 Hertev, Denmark. 2 . 91 7400.
Orand Raplda: 3075 Orchard Vista Or. S.E., PORTUGAL: Texas Instruments Equip.mento
Grand Rapids, MI 49506, 1616) 957-4200. FINLAND: Texa8 Instruments Finland OY:
Ahettajantie 3, P.O. Box 81, ESPOO, Finland, (901 ~~~goM~~i~:0~Ut;~ia~~7~~a~:.gp:~eu~~7~0 Ulrich,
MINNESOTA: Eden Pr....: 11000 W. 78th St .. ().461-422. 2-948·1003.
Eden Prairie, MN 55344 (612) 828-9300.
FRANCE: Tex8I Instruments France: Paris Office, 8P SINGAPORE (+ INDIA. INDONESIA, MALAYSIA,
MtsSOURI: St. louis: 11816 Borman Drive, 678-10 Avenue Morana-Saulnier. 78141 Velizy- THAILAND): Texas Instruments Singapore IPTEI Ltd.,
St. Louis. MO 83146, (314) 669-7600. Villacoublay cedex (1) 30 70 1003. Asia Pacific Division, 101 Thompson Rd. #23-01,
NEW JERSEY: 1...1n: 486E U.S. Route 1 South, United Squ.r., Singapore 1130, 350-8100.
GERMANY (Fed. Republic of Germany): Texas
Parkw8Y Towers. Iselin. NJ 08830 (2011 750-1050. Inatrumentl O.utschland GmbH: Haggerty8tr.ss. 1. SPAIN: Texas Instrum.nts Espana, S.A.: C/Jose
Lazaro Galdiano No.6, Madrid 28036, 1/458.14.58.
NEW MEXICO: Albuquerque: 2820-0 Broadbent Al.wy
NE, Albuquerqua. NM 87107. (505) 345-2555.
~~?, :e:i8~~8:':i: ~~~~ ~~~~e~er.~a~.';en SWEDEN: Texas Instruments Intemational Trad.
43/Klbb.lstr..s••. 19. 4300 Essen, 201-24250;
NEW YORK: e.at Syracu..: 6366 Collamet Dr .• KirchhorsterstraSH 2. 3000 Hannover 51, ~::!~~i~n_I~6~ir~lenl: 5-164-93, Stockholm,
East Syracuse, NY 13057, (315) 483-9291: 511 +648021; Maybachstrabe 11, 7302 Ostflldem
MeIv.: 1896 Walt Whitman Rd., P.O. Box 2936. 2-Nelingen, 711 + 34030. SWITZERLAND: Texa8 Instruments. Inc., Reidstraa..
Malville, NY 11747, (5161464-6600; 6. CH·8953 Oietikon IZuerichl Switzerland,
PItbford: 2861 Clover St .• Pinaford, NY 14534. '·740 2220.
(7161 38~8770:
TAIWAN: Texss Instrument8 Supply Co., 9th Floor
~,~~~~N~~~~" Poughkeepsie, Bank Tow.r, 205 Tun Hwa N. Ad., Taipei, Taiwan,
A.public of China, 2 + 713-9311.
NORTH CAROLINA: ctwIotte: 8 Woodlawn Green.

~
Woodlawn Rd., Charlotte. NC 28210, (704) UNITED KINGDOM: Texas Instruments Limited:
Manton Lane, Bedford. MK41 7PA, England, 0234
=~I~i~~,3~b ~~, ~~:I ~i':~~rt5~ Blvd., Suite 100, 270111.
OHIO: Beachwood: 23775 Commerce Perk Ad.,
Beachwood, OH 44122, (216) 464-6100;
Buvercrwk: 4200 Colonel GI.nn Hwy ..
TEXAS
Beavercreek, OH 45431, 15131 427-8200. INSTRUMENTS
A·'8B
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TEXAS
INSTRUMENTS

Printed in U.S.A . SDFD001A

0189-50