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Synchronous Buck PWM DC-DC Controller: Description Features

The document describes the FP6321 synchronous buck PWM DC-DC controller. The FP6321 is an integrated circuit that controls two N-channel MOSFETs in a synchronous buck converter topology. It provides functions like soft-start, frequency compensation, monitoring and protection. The FP6321 operates at a fixed 300kHz switching frequency and uses voltage mode PWM control for simple control loop design. It features overcurrent protection by monitoring the voltage drop across the low side MOSFET. The FP6321 is available in an 8-pin SOP package.
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0% found this document useful (0 votes)
108 views

Synchronous Buck PWM DC-DC Controller: Description Features

The document describes the FP6321 synchronous buck PWM DC-DC controller. The FP6321 is an integrated circuit that controls two N-channel MOSFETs in a synchronous buck converter topology. It provides functions like soft-start, frequency compensation, monitoring and protection. The FP6321 operates at a fixed 300kHz switching frequency and uses voltage mode PWM control for simple control loop design. It features overcurrent protection by monitoring the voltage drop across the low side MOSFET. The FP6321 is available in an 8-pin SOP package.
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Available Formats
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Synchronous Buck PWM


DC-DC Controller

Description Features
The FP6321 is designed to drive two N-channel ● Operates from +5V or +12V
MOSFETs in a synchronous rectified buck topology. ● Drives Two Low Cost N-Channel MOSFETs
It provides the output adjustment, internal soft-start, ● Fast Transient Response
frequency compensation networks, monitoring and ● Simple Single-Loop Control Design
protection functions into a single package. ( Voltage-Mode PWM Control)
● Internal Soft-Start
The IC operating at fixed 300kHz frequency provides
● Over-Current Fault Monitor
simple, single feedback loop, voltage mode control
● SOP-8 Package
with fast transient response. The resulting PWM duty
● RoHS Compliant
ratio ranges from 0-100%.
The FP6321 features over current protection. The
output current is monitored by sensing the voltage Applications
drop across the RDS-ON of the low side MOSFET ● Motherboard
which eliminates the need for a current sensing ● Graphic Card
resistor. ● Telecomm Equipments
This device is available in SOP-8 package. ● High Power DC-DC Regulators
● Servers

Pin Assignment Ordering Information


SO Package (SOP-8) FP6321□□□
TR: Tape / Reel

P:Green
G:Green

Package Type
SO: SOP-8

Figure 1. Pin Assignment of FP6321

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Typical Application Circuit

Figure 2. Typical Application Circuit of FP6321

Note: It is not recommended to apply FP6321 on VCC=12V/ VIN =12V condition

Functional Pin Description


Pin Name Pin Function

This pin provides bias voltage to the high side MOSFET Driver. A bootstrap circuit may be to create a BOOT
BOOT
voltage suitable to drive a standard N-Channel MOSFET.
Connect UGATE to the high side MOSFET gate. This pin is monitored by the adaptive shoot-through protection
UGATE
circuitry to determine when the high side MOSFET has turned off.

GND Ground.

Connect LGATE to the low side MOSFET gate. This pin is monitored by the adaptive shoot-through protection
LGATE
circuitry to determine when the high side MOSFET has turned off.

VCC Power Pin.

FB Feedback Pin. The typical reference voltage is 0.8V.

OCSET Shutdown Control and connect a resistance (ROCSET) for over current setting.

PHASE Connect the PHASE pin to the high side MOSFET source, and sensing converter’s input power.

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Block Diagram

Figure 3. Block Diagram of FP6321

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Absolute Maximum Ratings


● VCC to GND ------------------------------------------------------------------------------------- - 0.3V to +16V
● BOOT, VBOOT-VPHASE --------------------------------------------------------------------------- - 0.3V to +16V
● PHASE -------------------------------------------------------------------------------------------- - 5V to +16V
● UGATE -------------------------------------------------------------------------------------------- VPHASE - 0.3V to VBOOT +0.3V
● LGATE --------------------------------------------------------------------------------------------- - 0.3V to VCC+0.3V
● FB,OCSET to GND ----------------------------------------------------------------------------- - 0.3V to +6V
● Power Dissipation @ TA=25℃, SOP-8 (PD)----------------------------------------------- 630mW
● Package Thermal Resistance, SOP-8 (θJA)----------------------------------------------- 160°C/W
● Junction Temperature -------------------------------------------------------------------------- +150°C
● Operation Temperature Range --------------------------------------------------------------- - 40°C to +85°C
● Storage Temperature Range------------------------------------------------------------------ - 65°C to +150°C
● Lead Temperature (Soldering, 10sec.) ----------------------------------------------------- +260°C
● ESD Susceptibility
HBM(Human Body Mode)--------------------------------------------------------------------- 2KV
MM(Machine Mode)----------------------------------------------------------------------------- 200V
Note1:Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device.

Recommended Operating Conditions


● Supply Voltage, VCC --------------------------------------------------------------------------- 5V ± 5%, 12V ± 10%
● Operating Temperature Range -------------------------------------------------------------- -40°C to +85°C

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Electrical Characteristics
(VCC=5V/12V, TA=25°C, unless otherwise specified)
Parameter Symbol Conditions Min Typ Max Unit

INPUT

VRISING VCC rising 3.7 4.1 4.5 V


VCC Under Voltage Lockout
VFALLING VCC falling 0.25 V

Quiescent Current ICC UGATE and LGATE open 2 6 mA

ERROR AMPLIFIER

Feedback Voltage VFB 0.784 0.8 0.816 V

FB Input Bias Current IFB VFB=1V 0.1 uA

Open Loop DC gain (Note2) AO 85 dB

OSCILLATOR

Frequency FOSC VCC=12V 250 300 350 kHz

Ramp Amplitude (Note2) △VOSC VCC=12V 1.5 Vp-p

GATE DRIVERS
VBOOT-VPHASE=12V,
Upper Gate Source IUGATE 300 500 mA
VUGATE-VPHASE=6V
VBOOT-VPHASE=12V,
Upper Gate Sink RUGATE 4 8 Ω
VUGATE-VPHASE=1V
Lower Gate Source ILGATE VCC=12V, VLGATE =6V 300 500 mA

Lower Gate Sink RLGATE VCC=12V, VLGATE =1V 3 5 Ω

Dead Time (Note2) TDT 100 ns

PROTECTION

FB Under-Voltage Trip FB Falling 70 75 80 %

OC Current Source IOCSET VPHASE=0V 35 40 45 uA

Soft-Start Interval (Note2) Tss 2 3.5 ms

Note2:Guarantee by design.

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Typical Performance Curves


0.85 320

0.84 315

0.83 310
Reference Voltage (V)

0.82 305

Frequency (KHz)
0.81 300

0.80 295

0.79 290

0.78 285

0.77 280

0.76 275

0.75 270
-40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80
O o
Junction Temperature ( C) Junction Temperature ( C)

Figure 4. Reference Voltage vs. Junction Temperature Figure 5. Frequency vs. Junction Temperature

100
VCC=12V
44 95 VIN=5V
VOUT=1.8V
OC Current Source (uA)

90
42
Efficiency (%)

85

40 80

75
38
70

65
36

60
-40 -20 0 20 40 60 80 0 2 4 6 8 10 12 14
o
Junction Temperature ( C) Output Current (A)

Figure 6. OC Current Source vs. Junction Temperature Figure 7. Efficiency

VCC
IOUT=15A VCC

IOUT=15A
VOUT
VOUT

IL
IL
Phase
Phase

Figure 8. Power On Figure 9. Power OFF

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Typical Performance Curves (Continued)

IOUT=0A IOUT=0A

VUGATE VUGATE
VLGATE

VPHASE VPHASE
VLGATE

Figure 10. Switching waveform (UGATE rising) Figure 11. Switching waveform (UGATE falling)

IOUT=15A IOUT=15A

VUGATE VUGATE
VLGATE VLGATE

VPHASE VPHASE

Figure 12. Switching waveform (UGATE rising) Figure 13. Switching waveform (UGATE falling)

VOUT

IL
Load switching Frequency=1kHz
VOUT Slew rate=2.5A/us

IOUT

Figure 14. Output Ripple Figure 15. Load Transient Response

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Typical Performance Curves (Continued)

VCC VCC

IL
VOUT
VOUT

VPHASE
VPHASE

Figure 16. OCP using DC loading Figure 17. OCP using Dynamic loading

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Functional Description
Initialization A resistor (ROCSET), connected from OCSET pin to
the source of high side MOSFET and the drain of
The Power-On Reset (POR) function continually low side MOSFET to set the over-current triple
monitors the input supply voltage and the enable level. An internal 40uA (typical) current source
function. The POR monitors the bias voltage at the develops the voltage across the ROCSET. The
VCC pin and the input voltage (VIN) on the phase over-current setting equation is shown as below:
pin. After VCC power is ready, turning on the high
side MOS by pulse cycle. After high side MOS 40uA × ROCSET − 0.4V
turns on, the phase pin voltage is very close to VIN. IOCSET =
RDS−ON
The VIN power is ready by sensing the phase pin
voltage reaches 1.5V four times. Shutdown
Soft-Start Connecting a small transistor to OCSET pin and
pulling the OCSET voltage less than 0.15V can
The FP6321 features soft-start to limit inrush
shutdown the FP6321. At this condition, the
current and control the output voltage rise at
FP6321 is shutdown and high side and low side
start-up. The soft-start is accomplished by ramping
MOSFETS are turned off. The output is floating.
the internal reference input from 0V to 0.8V. The
soft-start interval is 3.5ms typical. Under-Voltage Protection
Over-Current Protection The under-voltage function monitors the FB voltage
to protection the converter against the output
The over-current function protects the converter a
short-circuit condition. The under- voltage threshold
shorted output by using the low side MOSFET
is 75% VREF. The UV has 20us triggered delay. The
on-resistance RDS-ON to monitor the current. This
FP6321 will always trigger Vin power sensing after
method enhances the converter’s efficiency and
4 times UV. The under- voltage protection is disable
reduces cost by eliminating a current sensing
during the soft-start interval.
resistor.

The over-current function cycles the soft-start


function in a hiccup mode to provide fault
protection. After four times are counted, the high
side and low side MOSFET will turn off and the
output is latched off.

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Application Information
Introduction The ESR can be calculated from the following
formula.
The FP6321 integrated circuit is a synchronous
PWM controller, it operates over a wide input VRIPPLE
ESR =
voltage range. Being low cost, it is a very popular ΔIL
choice of PWM controller. This section will describe
the FP6321’s application suggestion. The operation An aluminum electrolytic capacitor's ESR value
and the design of this application will also be is related to the capacitance and its voltage
discussed in detail. rating. In most case, higher voltage electrolytic
capacitors have lower ESR values. Most of the
Design Procedures time, capacitors with much higher voltage ratings
may be needed to provide the low ESR values
This section will describe the steps to design required for low output ripple voltage.
synchronous buck system, and explains how to
construct basic power conversion circuits including b. The capacitor voltage rating should be at least
the design of the control chip functions and the basic 1.5 times greater than the output voltage, and
loop. often much higher voltage ratings are needed to
satisfy the low ESR requirements needed for low
(1) Synchronous buck converter output ripple voltage.
Since this is a buck output system, the first quantity (3) Output N-channel MOSFETs Selection
to be determined is the duty cycle value. The
formula calculated the PWM duty ratio, apply to the a. The current ability of the output N-channel
system which we propose to design: MOSFETs must be at least more than the peak
switching current IPK. The voltage rating VDS of
the N-channel MOSFETs should be at least 1.25
times the maximum input voltage. Choose the
low RDS-ON MOSFETs for reducing the
(2) Inductor Selection
conduction power loss. Choose the low CISS
To find the inductor value it is necessary to consider MOSFETs for reducing the switching loss. But
the inductor ripple current. Choose an inductor most of time, the two factors are trade-off.
which operated in continuous mode down to 10 Consider the system requirement and define the
percent of the rated output load: MOSFETs rating.
ΔIL = 2 x 10% x IO b. The MOSFETs must be fast (switch time) and
The inductor “L” value for this system is connected must be located close to the FP6321 using short
to be: leads and short printed circuit traces. In case of
a large output current, we must layout a copper
(VIN - VDS(sat) – VO) x
to reduce the temperature of these two
L≧ DMIN
MOSFETs.
ΔIL x fS
(4) Input Capacitor Selection
If the core loss is a problem, increasing the
inductance of L will be helpful. a. The RMS current rating of the input capacitor can
be calculated from the next page formula table.
(3) Output Capacitor Selection
b. This capacitor should be located close to the IC
a. The output capacitor is required to filter the output using short leads and the volt age rating should
noise and provide regulator loop stability. When be approximately 1.5 times the maximum input
selecting an output capacitor, the important voltage.
capacitor parameters are; the 100kHz Equivalent
Series Resistance (ESR), the RMS ripples current
rating, the voltage rating, and capacitance value.
For the output capacitor, the ESR value is the
most important parameter.

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Application Information (Continued)

Calculation Formula Calculation Step-down (buck) regulator


VOUT=VFB x ((R3/R2) + 1)
TON /(TON +TOFF )
[VIN(min)
]
- VDS(SAT) - VOUT × TON(max)
D
L ≥
ΔIL
VOUT/VIN
IRIPPPLE = ILOAD(max) - ILOAD(min)

V RIPPLE ΔIL 2 x 10% x IO


COUT ESR = [ ]
ΔI L
VDC -Rating ≥1.5 × V OUT
IIN(rms) I OUT × D (1 D )

CIN IIN(rms) = IOUT × D(1 D)

VDC-rating ≥1.5 × VIN(max)

Board Layout

Figure 18. Top Layer Figure 19. Bottom Layer

Figure 20. Inner Layer 2 Figure 21. Inner layer 3

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Application Information (Continued)


Layout Notice (5) Traces and Ground Plane
When designing a high frequency switching Make all of the power (high current) traces as
regulated power supply, layout is very important. short, direct, and thick as possible. It is a good
Using a good layout can solve many problems practice on a standard PCB board to make the
associated with these types of supplies. The traces an absolute minimum of 15 mils (0.381 mm)
problems due to a bad layout are often seen at high per Ampere. The inductor, output capacitors, and
current levels and are usually more obvious at output diode (In synchronous case, means the low
large input to output voltage differentials. Some of side switch) should be as close to each other
the main problems are loss of regulation at high possible. This will reduce lead inductance and
output current and/or large input to output voltage resistance as well which in turn reduces noise
differentials, excessive noise on the output and spikes, ringing, and resistive losses which produce
switch waveforms, and instability. Using the simple voltage errors. The grounds of the IC, input
guidelines that follow will help minimize these capacitors, output capacitors, and output diode (or
problems. switch, if applicable) should be connected close
together directly to a ground plane. It would also
(1) Inductor be a good idea to have a ground plane on both
Always try to use a low EMI inductor with a ferrite sides of the PCB. For multi-layer boards with more
type closed core. Open core can be used if they than two layers, a ground plane can be used to
have low EMI characteristics and are located a bit separate the power plane (where the power traces
more away from the low power traces and and components are) and the signal plane (where
components. the feedback and compensation and components
are) for improved performance. It is good practice
(2) Feedback to use one standard via per 200mA of current if the
trace will need to conduct a significant amount of
Try to put the feedback trace as far from the
current from one plane to the other. Due to the way
inductor and noisy power traces as possible. You
switching regulators operate, there are power on
would also like the feedback trace to be as direct as
and power off states. During each state there will
possible and somewhat thick. These two
be a current loop made by the power components
sometimes involve a trade-off, but keeping it away
that are currently conducting. Place the power
from inductor EMI and other noise sources is the
components so that during each of the two states
more critical of the two. It is often a good idea to run
the current loop is conducting in the same
the feedback trace on the side of the PCB opposite
direction.
of the inductor with a ground plane separating the
two. (6) Heat Sinking
(3) Filter Capacitors When using a surface mount power IC or external
power switches, the PCB can often be used as the
When using a low value ceramic input filter
heat-sink. This is done by simply using the copper
capacitor, it should be located as close to the VIN
area of the PCB to transfer heat from the device.
pin of the IC as possible. This will eliminate as
Refer to the device datasheet for information on
much trace inductance effects as possible and give
using the PCB as a heat-sink for that particular
the internal IC rail a cleaner voltage supply.
device. This can often eliminate the need for an
Sometimes using a small resistor between VCC and
externally attached heat-sink. These guidelines
IC VCC pin will more useful because the RC will be
apply for any inductive switching power supply.
a low-pass filter. Some designs require the use of a
These include Step-down (Buck), Step-up (Boost),
feed-forward capacitor connected from the output
Fly-back, inverting Buck/Boost, and SEPIC among
to the feedback pin as well, usually for stability
others. The guidelines are also useful for linear
reasons.
regulators, which also use a feedback control
(4) Compensation scheme, that are used in conjunction with
switching regulators or switched capacitor
If external compensation components are needed converters.
for stability, they should also be placed closed to
the IC. Surface mount components are
recommended here as well for the same reasons
discussed for the filter capacitors.

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Outline Information
SOP- 8 Package (Unit: mm)

SYMBOLS DIMENSION IN MILLIMETER


UNIT MIN MAX
A 1.35 1.75
A1 0.05 0.25
A2 1.30 1.50
B 0.31 0.51
D 4.80 5.00
E 3.80 4.00
e 1.20 1.34
H 5.80 6.20
L 0.40 1.27
.
Note:Followed From JEDEC MO-012-E

Life Support Policy


Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems.
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