Deltav Sis Configuration Using Exsilentia en 4972012
Deltav Sis Configuration Using Exsilentia en 4972012
June 2018
Emerson partnered with exida to deliver a database-based solution that enables automatic configuration
of safety logic based on information captured in exida’s exSILentia software suite. One evident advantage
of this approach is the reduced configuration effort. However, the real benefit is having a consistent
configuration approach with less errors and less rework that is easily traceable back to the SRS.
The purpose of this whitepaper is to provide a high-level overview of the capabilities of the DeltaV™ SIS
Configurator developed by exida. This document is not intended as a configuration guideline. For further
details please refer to exida’s documentation (exSILentia User Guide and DeltaV SIS Configurator
User Guide).
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Table of Contents
DeltaV SIS Configuration Overview ..................................................................................................................................... 2
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One of the advanced function blocks is the Analog Voter function block which provides advanced features to easily implement
M out of N voter functions. That is, M inputs of the total N inputs must vote to trip. For example, the block can be configured as
2oo3 (two out of three) voter, where two of the three inputs must exceed the trip limit before the output is tripped. What used to
take a fair amount of programming using AND and OR logical gates, it is now replaced by a standard function block configured
using radio buttons and check-boxes. For example, if the application requires to prevent multiple maintenance bypasses at the
same time, the user only needs to check one box. If the application requires a bypass timeout to either automatically remove
the bypass after a pre-defined time or simplify provide an alert, the user again just need to select the proper options within the
bypass option parameter.
Trip limits, trip delays and detection types (high limit or low limit) are easily configured using parameters.
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All the traditional programming required for implementing an analog voting function has been replaced by a few configuration
settings. In the same way, there is a Discrete Voter function block with similar functionality.
Implementing a Cause and Effect relationship is done using another advanced function block. The Cause and Effect Matrix
function block defines interlock and permissive logic that associates as many as 16 inputs (causes) and 16 outputs (effects).
The block’s MATRIX parameter defines the causes that produce each effect to trip. Figure 3 provides an example of how to
configure an 8x3 CEM. Defining the trip logic is as simple as selecting the proper intersections in the MATRIX parameter.
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While a 16x16 matrix might seem relatively small, the reality is that DeltaV SIS breaks the configuration in SIFs and the need
for large matrices is greatly reduced. While the overall project CEM might include hundreds of causes and hundreds of effects,
individual SIFs typically does not have more than 16 causes or 16 effects. Most of the SIFs can be implemented using the
CEM function block. For the few SIFs requiring larger matrices, DeltaV v14 introduced two new function blocks (MONITOR
function block and EFFECT function block). There is no set limit for the number of for causes or effects that can
be implemented combining the new MONITOR and EFFECTs blocks.
SIF Configuration
Implementing a SIF in DeltaV SIS is quite simple:
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exSILentia Overview
exSILentia is an integrated suite of engineering software tools designed to support the Process Safety Management (PSM)
work process and the SIS Functional Safety Lifecycle. Data is seamlessly exchanged between the different phases of the
safety lifecycle ensuring efficiency and consistency. Information from the PHA, LOPA and SIL target selection are feed directly
into the SRS. Once the SIFs and associated risk reduction requirements are defined, exSILentia SILver™ facilitates the
calculation of the achieved risk reduction for each SIF. Then, exSILentia enables the creation of a SRS that incorporate all the
analysis done in the risk assessment.
The IEC 61511 Standard requires the creation of a SRS and defines what the SRS should contain. exSILentia facilitates
the compliance to IEC61511 requirements. A proper SRS must contain all the requirements for the SIS and its associated
SIFs. For each SIF, the SRS should include safe state, required SIL, maintenance and a startup overrides, architecture
requirements, voting arrangements, trip delays, among other SIF requirements.
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In a traditional SIS configuration approach, the project team use the SRS, along with a custom-built CEM as the basis for the
safety logic configuration. The SRS and CEM are manually interpreted and translated into the safety logic. This configuration
model requires multiple stages of data entry and present opportunities for human error. The new configuration approach
powered by exSILentia leverages data structures created during the conceptual design to automatically generate safety logic.
Each SIF contains a combination of sensors, voting arrangements, logic solver and final elements. Those elements defined in
exSILentia are mapped to DeltaV SIS function blocks.
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There are also parallel structures for maintenance overrides. The maintenance overrides requirements in exSILentia are
mapped to the DeltaV SIS bypass option parameter.
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SIFs sharing final elements are automatically combined into the same DeltaV SIS module but user can also manually group
SIFs into DeltaV SIS modules even if those SIFs are not sharing a final element.
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The user can choose to either generate the configuration for all SIFs or only selected SIFs. The option for selected SIFs is
useful for update a SIF after late changes in the conceptual design.
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The use of exSILentia within a DeltaV SIS project is described by the following short list of activities.
1. SIF modelling. Once the SIFs are deemed required per the Analysis Phase, the SIF architecture is defined to meet the
SIL requirement. exSILentia is used to specify and model the SIFs.
2. SIF Detailing. After the SIF architecture is defined, the user need to detail the SIF within exSILentia. At this point, the user
sets variable ranges, trip limits, etc.
3. Data Transfer. The exSILentia configuration file is now sent to the project team performing the DeltaV SIS configuration.
In this approach, the exSILentia configuration file replaces the Cause and Effect diagram and other information that is
typically sent to project teams.
4. SIF Detailing for DeltaV SIS. The project team will load the exSILentia database and will work on design details the
End User or EPC not necessarily needs to care about during the Analysis Phase, but are important for the configuration.
This includes, for example, logic solver names associated with each SIF and defining the grouping of multiple SIFs into
one single SIS module. The information is limited to safety logic and excludes graphics and I/O configuration beyond I/O
references within I/O function blocks.
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5. Configuration Generation. The project team will use exSILentia DeltaV Configurator to generate DeltaV SIS Logic
(FHX file(s))
6. DeltaV Import. The project team will import the generated FHX file and finalize all the DeltaV configuration
not supported by exSILentia (i.e. alarms, IO allocation and IO binding, auxiliary actions implemented in BPCS,
CHARM configuration, etc.)
7. Finalizing DeltaV Configuration. Project team will configure HMI graphics and verify logic implementation
together with HMI
8. Validation of SIF logic. User will validate the SIF logic to verify proper connections and safety functionality for each SIF
The use of the DeltaV SIS Configurator is mainly targeted to ESD applications. It is estimated that the tool would be able to
create up to 90% of the safety logic but it would depend of the complexity of the application. Currently there is no support for
sequential type of safety logic (e.g. BMS) and applicability to Fire and Gas is greatly impacted by the lack of SIL calculations in
these applications.
The exSILentia tool focuses on the generation of tag-based safety logic. The I/O configuration including CSLS configuration,
CHARM configuration and device allocation is not part of the scope of the tool. The user can use DeltaV SIS late binding
capability to easily bind the tag-based configuration with the I/O design developed independently from SIF design. DeltaV
Smart Commissioning is supported on configuration safety logic created by exSILentia. Graphics are not automatically
generated either. Only a few alarms are configured by the tool, most SIS alarms must be configured manually or generated
from an alarm rationalization software.
Conclusions
The DeltaV SIS Configurator tools provide great benefits for the implementation of ESD projects within DeltaV SIS. While the
exSILentia tool does not generate the full DeltaV SIS configuration, it can potentially generate up to 90% of the safety logic.
The user still need to create I/O configuration, graphics and alarms. In addition of the time savings, another benefit is
a consistent approach with less error and that is easily traceable back to the SRS.
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