6.

775
Design of Analog MOS LSI
Lecture 3
Small Signal Modeling of CMOS Subcircuits

Michael Perrott
September 10, 2003

Copyright © 2003 by Michael H. Perrott

All rights reserved.
 Outline

ƒ Thevenin modeling for small-signal analysis

ƒ Small-signal analysis of CMOS Subcircuits
- Amplifiers
- Current mirrors
- Current sources
- Cascode and enhanced cascode techniques

M.H. Perrott © 2003 2

 Small Signal Analysis

ƒ A CMOS Amplifier

Small Signal Analysis Steps

ID RD
1) Solve for bias current Id
RG 2) Calculate small signal
vout parameters (such as gm, ro)
vin
3) Solve for small signal response
Vbias RS
using transistor hybrid-π small
signal model

ƒ
- Small signal parameters determined from biasing
Key analysis step is to plug in the Hybrid-π model

- All independent sources are set to zero

M.H. Perrott © 2003 3
 Analysis of Amplifier Using Hybrid-Pi Model

ƒ Fill in Hybrid-π model for transistor and set independent

sources to zero

MOS Hybrid-π Small Signal Model

RG

vin vgs gmvgs -gmbvs ro RD vout

vs RS

ƒ Use KCL/KVL to solve for node voltages/currents

- Requires solution of simultaneous equations!
Is there a faster way?
M.H. Perrott © 2003 4
 Thevenin/Norton Modeling

ƒ Allows simplification of circuits into One-Port and

Two-Port models
- Eliminates having to solve simultaneous equations!
ƒ With practice, can calculate many circuit characteristics
by inspection
- Note: we will assume unilateral behavior for two-ports
ƒ This is valid for transistor circuits given the Hybrid-π
model on the previous slide

M.H. Perrott © 2003 5

 Basics of One-Port Modeling

Linear Network
Thevenin Equivalent Norton Equivalent
Zth

Vth Ith Zth

ƒ Vth computed as open circuit voltage at port nodes

ƒ Ith computed as short circuit current across port
nodes
ƒ Zth computed as Vth/Ith

M.H. Perrott © 2003 6

 Basics of Two-Port Modeling (Unilateral)

Linear Network ƒ We now include a

Zs dependent current or
Vin ZL
voltage source
ƒ Zin
- Solve using 1-Port
No Independent analysis at input
Sources
ƒ Zout
- Solve using 1-Port
Zs
analysis at output
with V1 = 0
Vin V1 Zin GmV1 Zout ZL
ƒ GM
- Short circuit output
current as a function
OR of V1
ƒ Av
- Open circuit output
Zs Zout

Vin V1 Zin AvV1 ZL

voltage as a function
of V1
M.H. Perrott © 2003 7
 Analysis of Cascaded Blocks
Block 1 Block 2 Block 3
Linear Network Linear Network Linear Network

Vin Va Vb Vc ZL

No Independent No Independent No Independent

Sources Sources Sources

Vin Zin GmVin Zout Va Zin GmVa Zout Vb Zin GmVb Zout Vc ZL

Zout,effective

Vth,effective Vb Zin,effective

Analysis carried out without solving simultaneous equations!

M.H. Perrott © 2003 8
 Thevenin Modeling of CMOS Transistors

Hybrid-π Model Key Small-Signal Parameters

Rthd RD
RG g d Parameter Strong Inversion Weak Inversion

gm qID
2μnCox(W/L)ID
Rthg vgs nkT
gmvgs -gmbvs ro
γ gm (n-1)qID
gmb
2 2|Φp| + VSB nkT
s
Rths
vs RS 1 1
ro
λID λID

ƒ Use the Hybrid-π model of transistor to calculate

Thevenin resistances at each transistor node
ƒ Key point: we don’t need to do this every time we

- We can derive expressions for Thevenin resistances for

analyze a circuit

general use

M.H. Perrott © 2003 9

 Thevenin Resistance Expressions

Hybrid-π Model Key Small-Signal Parameters

Rthd RD
RG g d Parameter Strong Inversion Weak Inversion

gm qID
2μnCox(W/L)ID
Rthg vgs nkT
gmvgs -gmbvs ro
γ gm (n-1)qID
gmb
2 2|Φp| + VSB nkT
s
Rths
vs RS 1 1
ro
λID λID

Thevenin Resistances Exact

Rth = ro (1+(gm+gmb)RS)+RS
d
ƒ Thevenin resistances
RD
Rthg= infinite useful for many
ID 1
Rths= (1+RD /ro ) (ro )
Rthd gm+gmb calculations
d
RG g Approximation
(gmb << gm, gmro >> 1)
ƒ It would be nice to
s
Rthg
Rths Rthd= ro (1+gmRS) replace Hybrid-π
RS Rth = infinite
g
model with Thevenin
1 + RD /ro 1
Rth =
s gm gm equivalent
M.H. Perrott © 2003 10
 Replace Hybrid-π Model with Thevenin Model

Hybrid-π Model Key Small-Signal Parameters

Rthd RD
RG g d Parameter Strong Inversion Weak Inversion

gm qID
2μnCox(W/L)ID
Rthg vgs nkT
gmvgs -gmbvs ro
γ gm (n-1)qID
gmb
2 2|Φp| + VSB nkT
s
Rths
vs RS 1 1
ro
λID λID

Thevenin Resistances Exact General Thevenin Model

Rth = ro (1+(gm+gmb)RS)+RS g d
d
is
Rthg= infinite Rths
ID RD
Rths= (1+RD /ro ) (ro 1 ) α is
Rthg vg Avvg Rthd
Rthd gm+gmb
RG d
g Approximation
(gmb << gm, gmro >> 1) s
Rthg s
Approximation
Rths Rthd= ro (1+gmRS)
Exact (gmb << gm, gmro >> 1)
RS Rth = infinite
g gm
1 + RD /ro 1 Av= gmro Av = 1
Rth = gm+gmb
s gm gm α= 1 α= 1

M.H. Perrott © 2003 11

 Example 1: Source Follower Amplifier

ƒ Perform small signal analysis by plugging in Thevenin

- Determine parameters using calculations on summary

model rather than Hybrid-π model

sheet in previous slide

RG d
g M1
s Vout
Vin
RS

M1

RG Rths is

g d

vin Rthg vg Avvg α is Rthd

s
RS vout

M.H. Perrott © 2003 12

 Reduce to Two-Port For Convenience

ƒ Since Av is approximately 1, we see that a source

- Note that overall gain is highly influenced by R

follower acts like a voltage buffer with overall gain < 1
s

RG Rths
RG d
g s
g M1
s Vout vin vg vout
Vin Rthg Avvg RS
RS

M1

RG Rths is

g d

vin Rthg vg Avvg α is Rthd

s
RS vout

M.H. Perrott © 2003 13

 The Issue of the Backgate Effect

RG RG

M1 1
Vin gm gm+gmb
vin vg v Rs vout
Vout gm+gmb g

RS

ƒ Backgate effect alters VT as the source node varies

- Leads to reduced gain for the source follower
ƒ Backgate effect is eliminated if we tie the bulk
connection of the device to its source
- Causes g to be set to zero
- For N-well process, this is only possible for PMOS
mb

devices

M.H. Perrott © 2003 14

 Some Technologies Allow Elimination of Backgate Effect

RG RG

M1 1
Vin gm gm+gmb
vin vg v Rs vout
Vout gm+gmb g

RS

n-well process

RG
RG
M1 1
Vin
vin gm
Vout vg vg Rs vout

RS

p-well or triple well process

(tie the well and source)

ƒ P-well process: NMOS devices

ƒ Triple well process: both NMOS and PMOS devices
M.H. Perrott © 2003 15
 Example 2: Degenerated Common Source Amplifier
ƒ Again plug in Thevenin model for transistor
ƒ Reduction to two-port model achieved by lumping impact of
middle stage of model into last stage
- Dependent current source will then depend on v g rather than is

RD
RG Vout
M1

Vin
RS

M1

RG Rths is
g d

vin Rthg vg Avvg α is Rthd RD vout

RS

M.H. Perrott © 2003 16

 Reduce to Two-Port

ƒ Calculation of Gm

RG
RD
RG Vout
M1 vin vg Rthg Gmvg Rthd RD vout
Vin
RS

M1

RG Rths is
g d

vin Rthg vg Avvg α is Rthd RD vout

RS

M.H. Perrott © 2003 17

 Example 3: Common Gate Amplifier

ƒ Reduction to two-port is easy once we realize that

dependent source Avvg is zero since vg = 0

RD
Vout
M1

RS

Vin

M1
Rths is
g d

Rthg vg Avvg α is Rthd RD vout

s
RS

vin

M.H. Perrott © 2003 18

 Reduce to Two-Port

ƒ Left section is eliminated

RD RS
is
Vout
M1
vin Rths α is Rthd RD vout
RS

Vin

M1
Rths is
g d

Rthg vg Avvg α is Rthd RD vout

s
RS

vin

M.H. Perrott © 2003 19

 Example 4: Cascode Amplifier

RD
Vout M2
M2
Rths2 is2 d2
RG
M1

Vin α 2is2 Rthd2 RD vout

RS

s2
M1
Common Gate
RG g1 Rths1 is1 d1

vin Rthg1 vg1 Av1vg1 α 1is1 Rthd1

s1

General Model RS

ƒ Allows elimination of Miller effect of Cgd1

ƒ Reduction to two-port will be done in several steps
20
M.H. Perrott © 2003
 Eliminate Middle Sections

RD
Vout M2
M2
Rths2 is2 d2
RG
M1

Vin α 2is2 Rthd2 RD vout

RS

s2
M1

RG g1 d1

vin Rthg1 vg1 Gm1vg1 Rthd1

ƒ Calculation of Gm1 same as for common source amp

ƒ To reduce further, note that

M.H. Perrott © 2003 21

 Resulting Two-Port Similar to Common Source Amp

RD
Vout M2
M2
d2
RG
M1

Vin Gm1vg1 Rthd2 RD vout

RS

M1

RG g1

vin Rthg1 vg1

ƒ Key difference: drain impedance much larger

M.H. Perrott © 2003 22

 Example 5: Differential Amplifier

R1 R2

Vo- Vo+
Vin+ Vin-
M1 M2

Ibias

Vbias M4

ƒ Useful for amplifying signals in the presence of noise

- Common-mode noise is rejected
ƒ Useful for high speed digital circuits
- Low voltage swing allows faster gate/buffer
performance

M.H. Perrott © 2003 23

 First Steps in Small Signal Modeling

R1 R2 R1 R2

Vo- Vo+ Vo- Vo+

Vin+ Vin- Vin+ Vin-
M1 M2 M1 M2

Ibias

Vbias M4 Rthd4= ro4

ƒ Small signal analysis assumes linearity

- Impact of M on amplifier is to simply present its drain
4
impedance to the diff pair transistors (M and M )
- Impact of V and V can be evaluated separately and
1 2

in+ in-
then added (i.e., superposition)
ƒ By symmetry, we need only determine impact of Vin+
ƒ Calculation of Vin- impact directly follows

M.H. Perrott © 2003 24

 Calculate Impact of Vin+ using Thevenin Models

R1 R2

Vo- Vo+
Vin+
M1 M2

ro4
R1 R2

M1 Vo- M2 Vo+

is1
Rths1
Vin+ Rthg1 vg1 Av1vg1 α 1is1 Rthd1 Rths2 α2 is2 Rthd2

is2

General Model ro4 Common Gate

ƒ Analysis follows fairly easily, but there is a simpler way!

M.H. Perrott © 2003 25
 Method 2 of Differential Amplifier Analysis

R1 R2 R1 R2

Vo- Vo+ Vo- Vo+

Vin+ Vin-
M1 M2 M1 M2
Vid -Vid
2 2

ro4 Vic ro4

ƒ Partition input signals into common-mode and

differential components
ƒ By superposition, we can add the results to determine
the overall impact of the input signals

M.H. Perrott © 2003 26

 Differential Analysis

is1= is2
R1 R2 iR = 0 R1 R2 R1 R2
Vid Vo- Vo+ -Vid Vid Vo- Vo+ -Vid Vid Vo- Vo+ -Vid
2 2 2 2 2 2
M1 M2 M1 M2 M1 M2

is1 is2
iR ro4

ƒ
- Inputs are equal in magnitude but opposite in sign to
Key observations

- By linearity and symmetry, i must equal i

each other
s1 s2
ƒ This implies iR is zero, so that voltage drop across ro4 is
zero
ƒ The sources of M1 and M2 are therefore at incremental
ground and decoupled from each other!
ƒ Analysis can now be done on identical “half-circuits”
M.H. Perrott © 2003 27
 Common-Mode Analysis

is1= is2
R1 R2 iR = 2is1= 2is2 R1 R2 R1 R2

Vo- Vo+ Vo- Vo+ Vo- Vo+

Vic Vic Vic Vic Vic Vic
M1 M2 M1 M2 M1 M2

is1 is2 is1 idiff = 0 is2

iR ro4 2ro4 2ro4 2ro4 2ro4

ƒ Key observations
- Inputs are equal to each other
- By linearity and symmetry, i must equal i s1 s2
ƒ This implies i = 2i = 2i
- We can view r as two parallel resistors that have equal
R s1 s2

o4
current running through them
ƒ Allows us to break up amplifier into two identical half-
circuits
M.H. Perrott © 2003 28
 Issue: Thevenin Method Breaks Down in Some Cases

RthA

M1

RS

ƒ Using Thevenin method

ƒ But, in reality

ƒ Issue: coupling between source, drain, or gate

- Do we have to abandon the Thevenin method?
M.H. Perrott © 2003 29
 Thevenin Resistance of Diode-Connected MOS

Diode-Connected Derive RthA Using Resulting

Device Hybrid-p Model One-Port Model

RthA

RthA RthA

vgs gmvgs -gmbvs ro

M1 1 (gm+gmb)
RS
gm gm

RS
vs RS

ƒ Plug in Hybrid-π to do the analysis

ƒ Whenever you see this exception, you can simply use
this result for small signal analysis (i.e., Hybrid-π
model not needed anymore)

M.H. Perrott © 2003 30

 Example: Current Mirror / Current Source

Ibias
Iref
n1 n2

M2 M1

M2 n1 M1 n2 n2

g1 d1

1 Rthg1 Rth = ro1

vg1 g m1vg1 Rthd1 d1
gm2

Diode-Connected Common Source

ƒ Key parameter of current source output is its output

resistance
M.H. Perrott © 2003 31
 Cascoded Current Source

Iref Rthd3 Rthd3

Ibias Vbias Vbias
M3 M3

M2 ro1
M1

ƒ Offers increased output resistance

ƒ Calculation straightforward using Thevenin resistance
method

M.H. Perrott © 2003 32

 Double Cascode Current Source

I1 I2
Rthd3
Vbias2 M3

Vbias1 M2

M4 M1

ƒ Offers even higher output resistance

ƒ Calculation straightforward using Thevenin resistance
method

M.H. Perrott © 2003 33

 Wilson Current Mirror

I2
I1 Rthd2

M2

M3 M1

ƒ Relies on feedback in its operation

- Thevenin method cannot be applied due to source/gate
coupling!
ƒ Using Hybrid-π analysis

- Output resistance comparable to cascode current source

ƒ This circuit is rarely used these days
M.H. Perrott © 2003 34
 Enhanced Cascode Current Source

Ibias Ibias2 Iref

M4

M3

M2 M1

ƒ Offers output resistance comparable to double

cascode current source
ƒ As with Wilson mirror, analysis is tricky due to
source/gate coupling
- Must resort to Hybrid-π model
- Result (using R formula in the following slide)
thd

M.H. Perrott © 2003 35

 Thevenin Resistances for CMOS Transistor Feedback Pair

RA RC RA RC
Rthd
Rthd M4 D
D
M4

M3 vgs4 gm4vgs4 -gmb4vs4 ro4

S Rths M3
RB

S
ro3 -gmb3vs3 gm3vgs3 vgs3 Rths
vs4 RB
vs3=0

M.H. Perrott © 2003 36

 Variation on a Theme: Enhanced Cascode Amplifiers

Ibias1 Ibias2 R1
Vout
M4
Input Source
M3

Iin Rs
M2 M1

ƒ We can turn the enhanced cascode current source

into an amplifier
- Inject a current input at the source of M 4

ƒ Key aspects of small signal analysis can be done

using Thevenin method
- Simply leverage Thevenin resistance formulas shown on
previous slide
M.H. Perrott © 2003 37
 Small-Signal Analysis of Enhanced Cascode Amp

Ibias1 Ibias2 R1 R1 Rout

Vout Vout
M4 M4
Input Source Input Source
M3 M3

Iin Rs 1 Rthd1 Rin Iin Rs

M2 M1 gm2

ƒ
- Input impedance is quite low
From Thevenin resistance calculations, we know

- Output impedance is probably determined by R 1

ƒ This amplifier is useful for extracting a current signal

from a high impedance source
M.H. Perrott © 2003 38
 Conclusion

ƒ CMOS subcircuits form key building blocks for larger

circuits (such as op-amps)
- Consists of amplifiers, current mirrors, current sources
ƒ Thevenin modeling can be used to quickly perform
small-signal analysis of CMOS subcircuits
- Avoids having the solve simultaneous equations
ƒ Thevenin approach is limited to subcircuits that do
not have coupling between source, drain, and/or gate
- However, can often derive specific Thevenin equivalents
for such subcircuits
ƒ Examples: diode-connected devices, enhanced-
cascode configuration

M.H. Perrott © 2003 39