Photovoltaic Inverters Technology
Photovoltaic Inverters Technology
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978-1-4799-5829-0/15/$31.00 ©2015 IEEE
III. PHOTOVOLTAIC SYSTEM INVERTERS IV. PHOTOVOLTAIC INTEGRATION TOPOLOGY
Inverters take a DC waveform and transform it into a
The topologies are classified according to the number of
sinusoidal waveform using switches. There are two types of
stages, and the system configuration [13-15]. The isolation
inverters, two-level inverters and multi-level inverters.
and the number of processing stages are discussed here.
a. Two-level Inverters
a. Number of Processing Stages
The two-level inverter is the classical inverter design. An Typically, the prevalent topologies in use have one or two
example of a single-phase two-level inverter is shown in Fig. stages. The number of stages is significant in determining the
2. The functional mechanism depends on the state of the complexity of the PV system and cost. A single stage is the
switches. The on-off switch states result in two different most desirable topology because of the advantages associated
voltage levels at the output. It is possible to achieve a single with that structure. There are problems however which can
and three-phase structure of a two-level inverter [9]. appear during implementation and some of the benefits can be
lost. Multiple stage inverters can accept a wide range of
b. Multilevel Inverters
voltage inputs. Multiple stage inverters are typically more
Multilevel inverters are advantageous in comparison with expensive, more complex, and relatively inefficient [13].
two-level inverters particularly when used in medium and
high-power applications. This is because they are able to b. Isolation
synthesize a higher output voltage. The output of these
inverters is a stepped function as compared to the square wave Isolation in a PV system inverter is usually achieved using a
produced by a two-level inverter. Thus, there is less distortion transformer which can be placed on either the grid frequency
and significantly reduced harmonic content in the output side (low frequency – LF) or on the source frequency side
waveforms. The most commonly used multi-level inverter (high frequency – HF). Using a high frequency transformer
topologies are the diode-clamped, flying capacitor, and the results in solutions which are more compact in size, but
cascade inverter as shown in Fig. 3. The operational and special care is needed in the design of the transformer so that
structural specifications of the three multi-level inverter potential losses can be reduced [16, 17].
topologies are detailed in [10- 12]. Newer solutions utilize pulse width modulating DC-AC
inverters with IGBTs which are switched at 10 and 20 kHz.
This leads to much better quality output waveform and device
performance [3].
Connection of the grid to a DC side without using a
transformer can cause further leakage currents due to parasitic
capacitance to ground. These currents in turn increase
conducted and radiated electromagnetic emissions and
contribute to current harmonics injected into the utility grid as
well as power losses. The amplitude and spectrum of leakage
current depends on the converter topology as well as on the
switching strategy and on the resonant circuit created by the
ground capacitance, the inverter, any applied filters and the
impedance of the utility grid itself [16].
Fig. 2 Two level inverter
c. Advanced Topologies
Advances in power converter technology have made them
more efficient, cheap, and allow easy power grid integration.
In what follows, various topologies based on the integration of
PV systems are discussed.
i. Topology #1
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ଵ
ୡଶ ൌ (2)
ሺଵିሻ ୱ
Fig. 5 Topology#2
TABLE II
The switching states of Topology#1
On- State switches Switching at high Vo region Ccf
frequency
Fig. 4 Topology#1 S2, S3 and S7 S5 and S6 [-VDC -Vcf, - VDC] Discharging
S3 and S7 S1, S2, S5 and S6 [-VDC, -Vcf] Discharging
TABLE I S1, S3 and S7 S5and S6 [-Vcf, 0] Discharging
The switching states of Topology#1 S4 and S7 S1, S2, S5 and S6 [0, VDC -Vcf] Discharging
On- State switches Switching at Vo region S1, S4 and S8 S5 and S6 [VDC -Vcf, VDC] Discharging
high frequency S2, S3 and S8 S5 and S6 [-VDC, -VDC +Vcf] charging
S6 and S7 S3 ሾെܸௗ ǡ െʹܸௗ Τ͵ሿ S3 and S7 S1, S2, S5 and S6 [-VDC +Vcf, 0] charging
S6 and S7 S4 ሾെʹܸௗ Τ͵ǡ െܸௗ Τ͵ሿ S2, S4 and S8 S5and S6 [0, Vcf] charging
S3, S4, and S6 S7 ሾെܸௗ Τ͵ǡͲሿ S4 and S7 S1, S2, S5 and S6 [Vcf, VDC] charging
S8 S5 [0,ܸௗ Τ͵] S1, S4 and S8 S5 and S6 [VDC, VDC +Vcf] charging
S5 and S8 S4 ሾܸௗ Τ͵ ǡ ʹܸௗ Τ͵ሿ
S4, S5 and S8 S3 ሾʹܸௗ Τ͵ǡ ܸௗ ሿ
iii. Topology #3
ii. Topology #2
This topology uses dc–dc converter with hybrid transformer
[19]. Pulse width modulation (PWM) and resonant power
Fig. 5 shows the nine -level inverter. It includes two cascaded conversions are used in this topology by adding small resonant
full bridges (CFB) which are supplied by a DC source and inductor ୰ to the switched-capacitor ୰ as shown in Fig. 6. In
flying capacitor. Different output levels sets can be generated this way, inductive and capacitive energy transfer
by controlling the ratio between two sources [18]. Two sets of simultaneously to the high voltage dc bus which increases the
switches are used in this typology. S1, S2, S5 and S6 are
delivered power. Five different stages for one switching cycle
IGBT while S3, S4, S7 and S8 are MOSFET. Different
are shown in Table III. The boost conversion ratio is given by
generated output voltage regions when Vcf < 0.5VDC are
[19]
shown in Table II. These generated regions depend on the ାଶ
ratio between two sources, states of the switches and the status ൌ (3)
ଵି
of Ccf if it is charging or discharging. Nine equally spaced
output regions are generated whenୡ ൌ ౚౙ . Depending on the where n is turn ratio of transformer and D is duty ratio of
ଷ
output voltage, the adequate region will be chosen which switch S1. This topology introduced the term n into boost
controls the voltage of the flying capacitor. M1, M2 and S9 conversion compare to other traditional boost converters [20].
reduce the current surge. Furthermore, these switches help to The transferring energy from resonant current can be measured
keep the voltage across the parasitic capacitor of PV constant by resonant contribution ୰ and is given by [19]
and eliminate the ground leakage current.
୰ ൌ Ǥ (4)
ଶ
ଶ െ ଵ ൌ (6)
ெ
୭ ൌ ሺʹ െ ୧୬ ሻǤ (7)
ଶ
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TABLE V TABLE VI
The modes of ac- link of Topology#5 The modes of Topology#6
Mode Ac- link status Switches at Switches at Vo Mode Transformer C1 On state Switches Switches
link frequency line components at high at line
frequency frequency frequency
1 Charging S1 and S4 - - 1 Charging - Sp1 S1 Non
2 Resonating - - - (positive
3 Dis-charging - S8 and S15 Vab ac cycle)
4 Resonating - - - 2 Dis-charging to Charging Sp1 Non Non
5 Dis-charging - S8and S16 Vac C1
6 Resonating - - - 3 Dis-charging - Sp1 and Non non
7 Charging S2 and S3 - - to the grid Dp2
8 Resonating - - - 4 Charging from - Sp1 Non Sp2
9 Dis-charging - S5 and S9 Vba the grid
10 Resonating - - - 5 Dis-charging to Dis- Non Non non
11 Dis-charging - S5 and S10 Vca Cdc charging
12 Resonating - - - 6 Dis-charging to - D Non Non
Cdc
vi. Topology #6
vii. Topology #7
This topology uses fly-back inverter which operates in
modified boundary conduction mode (BCM) [26].Working in The topology shown in Fig .10 is active buck- boost
this mode helps to eliminate the drawbacks of operating in inverter [29]. It is a quasi-single stage inverter which helps to
continues conduction mode (CCM) and discontinuous eliminate the drawbacks of using single or multistage
conduction mode (DCM) [27, 28]. In this topology, inverters. It consists of full bridge and AC/AC units which
bidirectional switches are used at the secondary side of the share inductor and capacitor. It has the ability to buck –boost
the input voltage using active switches instead using
inverter instead of diode and switch in the conventional fly
transformers or passive components. A sinusoidal pulse width
back inverters [27] as shown in Fig. 9. This modification helps
modulation (SPWM) method is used to control the switches of
to charge the transformer from the grid side by small amount
full-bridge unit. The relationship between the ୧୬ and ୭ of his
of current which lead to have zero-voltage switching (ZVS) topology is given by [29]
for S1 as well switches on the secondary side of the ெǤ௦௪௧
transformer without using additional components. The amount ୭ ൌ ୧୬ Ǥ (9)
ଵିௗ
of the current transferred from the grid controlled by operating
the switches under a variable switching frequency. The where M is the modulation ratio, d is the duty ratio of switches
inverter goes through six different modes for one switching Q3 or Q4 which it depends on if the output is positive half-
cycle as shown in table VI. The capacitor C1 across S1 helps cycle or negative half-cycle. Q1and Q2 are operated in
opposite mode (1-d) of Q3and Q4. The inverter works in buck
to prevent the voltage across the s1 to jump to high value
mode when ୧୬ > ୭ and works in buck mode when ୧୬ < ୭ .
immediately when it is turned off .Also, it helps to force the
The different operating modes of the inverter are shown in
voltage across the s1 to be zero when s1 turned on. The duty
table VII.
cycle of S1 depends on the input (ܸௗ ), output voltageሺݒ )
and the turn ratio of transformer (N) and is given by [26]
௩ೌ ሺ௪௧ሻ
ሺሻ ൌ (8)
௩ೌ ሺ௪௧ሻାே
Fig. 10 Topology#7
Fig. 9 Topology#6
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TABLE VII ଵା
The modes of Topology #7
ܯ ൌ ൌ (10)
ଵି
Buck mode
where n turns ratios of coupled inductor is and D is duty
d-1=1Î ܗ܄ൌ ܖܑ܄Ǥ ۻǤ ܜܟܖܑܛ
ratio of switch S1.
Cycle SPWM On state switches Switching at line From Eq. 10, high dc gain can be achieved without using
frequency large values of duty ratios and turns ratios like other
Positive S1 and S4 Q1 and Q2 Q4 topologies [14, 21. 20] which leads to reduces the losses and
Negative S2 and S3 Q1 and Q2 Q3
improve the efficiency.
Boost mode
࢙࢚࢝
M=1Îܗ܄ ൌ ܖܑ܄Ǥ
ିࢊ
viii. Topology #8
Fig. 11 Topology#8
This topology is part of grid connected micro inverter which
is used to step up the input voltage from PV panel and transfer TABLEVIII
the voltage to DC/AC inverter. It uses a Zeta converter and a The modes of Topology# 8
coupled inductor [30]. In this topology, coupled inductor is Mode C1 C2 C3 On state Switches
components at high
used instead of input inductor in the conventional Zeta frequency
converter [31, 32] as shown in Fig. 11. This modification 1 - Charging Dis- D1 S1
helps to transfer the leakage inductor energy to the load which charging
improves the efficiency. Furthermore, it improves the voltage 2 Dis- Dis- Charging D3 S1
charging Charging
gain of boosting by using turns ratio of the coupled inductor. 3 Charging Dis- Charging D1and D3 Non
Active switch S1 is used to help to isolate the PV panels from Charging
the conversion system. This topology operates in continuous- 4 Charging Charging Dis- D1and D2 Non
conduction mode (CCM). The inverter goes through five charging
5 - Charging Dis- D2 Non
different operating modes for one switching cycle as shown in charging
table VIII. The dc voltage gainሺܯ ) is given by [30]
Table IX presents General Review of Presented Topologies.
TABLE IX
General Review of Presented Topologies
Topolog Figure Type of Number of Vin Po Efficiency Switching Transforme Inductors/capacitor Switches
y connection stages frequency r
Top. 1 [5] Grid multiple 70 v 0.5 kw 94.8% 15.36KHz yes L=2 ,C=2 6
Top. 2 [6] Grid multiple 300 v 2 kw 97.1% 20 KHz no L=2,C=2 11
Top. 3 [7] - single 20-45 v 30- 96.1- 74.5KHz yes L=1, C=3 1
220w 97.3%
Top. 4 [8] Grid & single Wide - - 20KHz no L=2,C=2 6
stand alone range
Top. 5 [9] Grid single Wide - 94%- 7.2/8.5KHz no L=5,C=5 10
range 96.5%
Top. 6 [10] Grid single 35-75 v 250w 85%- 27/ 65KHz yes L=1,C=2 5
95%
Top. 7 [11] Grid & quasi-single 100-200 v - 92.5%- 60Hz - no L=1,C=1 8
stand alone stage 96.5% 20kHz
Top.8 [12] - single 25 v 250w 94.8%- 50KHz no L=1, C=3 1
97.3%
d. Advantage and disadvantage of topologies presented more components compared with single stage topologies.
High input voltages are preferred, because there are less Top.4 and 7 are preferred for a grid and standalone inverter
ohmic losses and may not necessarily require a transformer on group, because of the allowable relatively wide input voltage,
the output such as Top.2, and 7. Topologies with multiple high efficiency, and lower number of components. Top. 7 is
stages and high switching frequencies have higher efficiency quasi-single stages which combines the advantage of single
such as Top. 1, and 2. However, multistage inverters have and multi-stage inverter such as high efficiency and fewer
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components. Top. 3 and 8 are DC-DC converter which have - No transformer input voltages
- Size of the capacitors and
boosting capability at high efficiency rate with lower inductors reduced
components. -Voltage stress of switches
Table X presents the advantages and disadvantages of the reduced
-DC link removed
topologies discussed. Top. 6 - Soft switching - Duty cycle increase, turn ratio
In general, PV inverter technology research aims to reduce - Single stage reduction, and input voltage
costs and increase the operational efficiencies of the power - Zero-voltage switching reduction, cause more losses
achieved without more - Large input capacitor
conversion process. PV inverter technology has made great components - Relatively large leakage
improvements in these areas in recent years. - Conduction losses for inductance of transformer
In particular, one focal point has been to seek a reduction in switches and diode are small
-Turn on/off loses for the
the number of components being used in PV inverters. switches are small
Advances in single-stage inverter topologies using fewer Top. 7 - Compact structure - Large number of switches
switching devices, capacitors, inductors, and filtering - No transformer - Large input inductor
components have been achieved. Reducing the number of - Number of capacitors and - Efficiency is low when
inductor reduced inverter works in boost
components, of course, leads to lower manufacturing costs and - Buck–boost ability mode
overall better efficiency by removing the potential for losses. Top. 8 - Duty ratio of switch - Voltage stress for switch and
Using fewer components also results in having a physically reduced output diodes are 50, 150,
- Turns ratio of coupled and 200 respectively, which
smaller product in addition to decreased probability of inductor reduced is considered high
component failure. There is a recent focus on PV systems - Number of switches - Efficiency reduced at full-
which employ topologies without the use of transformers. reduced load
- No transformer - Efficiency and voltage are
effected by parasitic
TABLE X resistances
Advantage and disadvantage of Presented Topologies
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