Carbon nanotubes field effect transistors: A review

RamBabu.B1, Dr.Y.Srinivasa Rao2, P.Swapna3, K.Kalyan Babu4

1
Department of Electronics and Instrumentation Engineering, Sir.C.R.R.College of Engineering, Eluru.
2,3
Department of Instrument Technology, Andhra University, India
4
Department of Electronics and Communication Engineering, GITAM University, Vizag.
[email protected], [email protected]
 unclear. N-type conduction was achieved by doping from an
Abstract- Carbon Nanotube Field Effect Transistors (CNTFET) alkali (electron donor) gas and by thermal annealing in
are promising nano-scaled devices for implementing high vacuum. Doping by exposure to an alkali gas involves charge
performance very dense and low power circuits. A Carbon
Nanotube Field Effect Transistor refers to a FET that utilizes a transfer within the bulk of the nanotube, analogous to doping
single CNT or an array of CNT’s as the channel material in conventional semiconductor materials. On the other hand,
instead of bulk silicon in the traditional MOSFET structure. annealing a CNTFET in vacuum promotes electron
The core of a CNTFET is a carbon nanotube. In this paper, the conduction via a completely different mechanism: the
review of CNTFETs is presented. The structure, operation and presence of atmospheric oxygen near the metal/nanotube
the characteristics of different types of CNTFET’s have been contacts affects the local bending of the conduction and
discussed. The operation, dc characteristics of CNTFETs have
been presented and analysis of the performance of various
valence bands in the nanotube by way of charge transfer, and
characteristics. the Fermi level is pinned close to the valence band, making it
Keywords—CNTFET, Carbon nanotubes, Field effect transistors,
easier for injection of holes. When the oxygen is desorbed at
Nanoelectronics, characteristics high temperatures, the Fermi level may line up closer to the
conduction band, allowing injection of electrons. Contrary to
I. INTRODUCTION the case of bulk doping, there is no threshold voltage shift
The first carbon nanotube field-effect transistors were when going from p-type to n-type by thermal annealing. In
reported in 1998. These were simple devices fabricated by addition, it is possible to achieve an intermediate state, in
depositing single-wall CNTs (synthesized by laser ablation) which both electron and hole injection are allowed, resulting
from solution onto oxidized Si wafers which had been in ambipolar conduction.
prepattemed with gold or platinum electrodes. The electrodes
served as source and drain, connected via the nanotube Carbon nanotube field effect transistor (CNTFETs)
channel, and the doped Si substrate served as the gate. A uses semi conducting carbon nanotube as the channel. Both p-
schematic of such a device is shown in Fig.1. Clear p-type channel and n-channel devices can be made from nanotubes.
transistor action was observed, with gate voltage modulation The physical structure of CNTFETs is very similar to that of
of the drain current over several orders of magnitude. The MOSFETs and their I-V characteristics and transfer
devices displayed high on-state resistance of several MQ, low characteristics are also very promising and they suggest that
transconductance (-Ins) and no current saturation, and they CNTFETs have the potential to be a successful replacement of
required high gate voltages (several volts) to turn them on. MOSFETs in nanoscale electronics. Of course, there are some
distinct properties of CNTFETs, such as:
▪ The carbon nanotube is one-dimensional, which greatly
reduces the scattering probability. As a result the device may
operate in ballistic regime.
▪ The nanotube conducts essentially on its surface where all
the chemical bonds are saturated and stable. In other words,
there are no dangling bonds which form interface states.
Therefore, there is no need for careful passivation of the
interface between the nanotube channel and the gate dielectric,
i.e. there is no equivalent of the silicon/silicon dioxide
interface.
▪ The Schottkey barrier at the metal-nanotube contact is the
Fig 1: Early CNTFET structure.
active switching element in an intrinsic nanotube device.
Following these initial CNTFET results advances in
With these unique features CNTFET becomes a
CNTFET device structures and processing yielded
device of special interest.
improvements in their electrical characteristics. Rather than
laying the nanotube down upon the source and drain
1.1 Type of CNTFET
electrodes, relying on weak vander walls forces for contact,
The field effect transistors made of carbon nanotubes so
the electrodes were patterned on top of previously laid down
far can be classified into:
CNs. In addition to Au, Ti and CO were used, with a thermal
a) Back gate CNTFET
annealing step to improve the metal/nanotube contact. In the
b) Top gate CNTFET
case of Ti, the thermal processing leads to the formation of
c) Wrap-around gate CNTFETs
TiC at the metal/nanotube interface, resulting in a significant
reduction in the contact resistance from several MΩ to 30 kΩ. d) Suspended CNTFETs
On state currents ~1μA were easured, with transconductance -
Other then this 4 biggest classes, some semiconductor
0.3 μS. company have been proposed their own new/next generation Carbon
All early CNTFET were p-type, i.e., hole conductors. Nanotube FET such as Infineon introduced their vertical carbon
Whether this was due to contact doping or doping by the nanotube FET (VCNTFET) concept in year 2003.
adsorption of oxygen from the atmosphere was initially
a) Back-gated CNTFET’s generated with respect to the nanotube using a lower gate
voltage. These advantages mean top-gated devices are
The earliest techniques for fabricating carbon generally preferred over back-gated CNTFETs, despite their
nanotube (CNT) field-effect transistors involved pre- more complex fabrication process.
patterning parallel strips of metal across a silicon dioxide
substrate, and then depositing the CNTs on top in a random c) Wrap-around gate CNTFET’s
pattern [1]. The semiconducting CNTs that happened to fall
across two metal strips meet all the requirements necessary for Wrap-around gate CNTFETs, also known as gate-all-
a rudimentary field-effect transistor. One metal strip is the around CNTFETs were developed in 2008 [3],and are a
“source” contact while the other is the “drain” contact. The further improvement upon the top-gate device geometry. In
silicon oxide substrate can be used as the gate oxide and this device, instead of gating just the part of the CNT that is
adding a metal contact on the back makes the semiconducting closer to the metal gate contact, the entire circumference of
CNT gateable. the nanotube is gated. This should ideally improve the
electrical performance of the CNTFET, reducing leakage
current and improving the device on/off ratio.

Fig 2: Top and side view of carbon nanotubes deposited on a silicon oxide
substrate pre-patterned with source and drain contacts.
Fig 3: Sheathed CNT
The types of back gate CNTFETs discussed so far Device fabrication begins by first wrapping CNTs in a gate
have high contact resistances (≥1 MΩ), which led to a low dielectric and gate contact via atomic layer deposition [4].
transconductance gm (=dI/dVG) of about 10 -9A/V. This These wrapped nanotubes are then solution-deposited on an
large contact resistance results from the weak van der Waals insulating substrate, where the wrappings are partially etched
coupling of the devices to the noble metal electrodes in the off, exposing the ends of the nanotube. The source, drain, and
‘side-bonding’ configuration used. Here the SWNT is gate contacts are then deposited onto the CNT ends and the
dispersed on top of the SiO2 film, and then source and drain metallic outer gate wrapping.
electrodes made of transition metals compatible with silicon
technology, such as Ti or Co, are fabricated on SWNT. d) Suspended CNTFET’s
Subsequent anneals at 400º C (Co) and, or at 820º C (Ti) in an
inert ambient, form low resistance Co contacts or TiC contacts CNTFET device geometry involves suspending the
at the source and drain electrodes. Fig shows I-V nanotube over a trench to reduce contact with the substrate
characteristics of p-type CNTFET employing metallic Co or and gate oxide [5]. This technique has the advantage of
TiC contacts. reduced scattering at the CNT-substrate interface, improving
b) Top-gated CNTFET’s device performance [5] [6] [7]. There are many methods used
to fabricate suspended CNTFETs, ranging from growing them
Eventually, researchers migrated from the back-gate over trenches using catalyst particles [5], transferring them
approach to a more advanced top-gate fabrication process [2]. onto a substrate and then under-etching the dielectric beneath
In the first step, single-walled carbon nanotubes are solution [7], and transfer-printing onto a trenched substrate [6].
deposited onto a silicon oxide substrate. Individual nanotubes
are then located via atomic force microscope or scanning
electron microscope. After an individual tube is isolated,
source and drain contacts are defined and patterned using high
resolution electron beam lithography. A high temperature
anneal step reduces the contact resistance by improving
adhesion between the contacts and CNT. A thin top-gate Fig 4: Suspended CNTFET device.
dielectric is then deposited on top of the nanotube, either via
evaporation or atomic layer deposition. Finally, the top gate
The main problem suffered by suspended CNTFETs
contact is deposited on the gate dielectric, completing the
is that they have very limited material options for use as a gate
process.
dielectric (generally air or vacuum), and applying a gate bias
has the effect of pulling the nanotube closer to the gate, which
Arrays of top-gated CNTFETs can be fabricated on
places an upper limit on how much the nanotube can be gated.
the same wafer, since the gate contacts are electrically isolated
This technique will also only work for shorter nanotubes, as
from each other, unlike in the back-gated case. Also, due to
longer tubes will flex in the middle and droop towards the
the thinness of the gate dielectric, a larger electric field can be
gate, possibly making touching the metal contact and shorting
the device. In general, suspended CNTFETs are not practical 1.2.2 Multi WALL CNTFET
for commercial applications, but they can be useful for
studying the intrinsic properties of clean nanotubes. The complexity of structure of multi wall nanotube
(MWNT) has discouraged their detailed study and use. In
1.2 Other CNTFET principle, each of its carbon shells can be metallic or
semiconducting with different chiralities. Also, these shells
The CNTFET technology is at an early stage; devices can interact. It has been found that in MWNTs side-bonded to
structures are still primitive and the devices physic still metal electrodes, effectively only the outer shell contributes to
relatively unexplored. So, other the most popular Back Gate electrical transport. One would therefore expect that MWNTs
and Top Gate structures, some of the researcher also proposed with semiconducting outer shell can be used to fabricate
their own structure such as N-Type, AMBIPOLAR CNTFET, CNTFETs. However, since the bandgap in semiconducting
Vertical Gate, and etc. to prove the performance of the CNTs is inversely proportional to the tube diameter, only
transistor is better after the channel of the transistor replaced small diameters MWNTs are expected to exemplify FET
by CNT. Below are several examples of the differences characteristics at room temperature. [9]
structure of CNTFET.
1.2.3 Vertical CNTFET
1.2.1 N-Type and AMBIPOLAR CNTFET
This vertical Carbon Nanotube FET has been
The capability to produce n-type transistors is proposed by the researcher in Infineon Technology. The
important technologically, as it allows the fabrication of CNT- concept is totally difference compared to traditional MOSFET
based complementary logic devices and circuits. A back gated vertical gate configuration. Fig.6 showed the first draft of the
n-type nanotube transistor can be obtained by doping the Vertical CNTFET proposed by Infineon in year 2003. [10]
nanotube with potassium vapor. The mechanism is that
electron transfer from adsorbed potassium atoms to the
nanotube can shift the Fermi level of the tube from the
valence-band edge to the conduction band edge, thus reverting
the doping from p- to n-type. [8] Fig.5 shows the schematic of
setup for doping and the resulting I-V characteristics.

Fig .6: Vertical CNTFET

Fig 5: Schematic diagram of the potassium doping setup.

An n-type top gate device as shown in Fig 3.9 (a) can

2.0 Characteristics of CNTFET’s
be obtained by an in situ annealing step prior to the deposition
of the gate dielectric film. Thermal treatment in an inert The drain I-V characteristics in 2D are shown in fig 7. The
atmosphere drive off the adsorbed oxygen from the source and saturation current at VGS = 0.5 V is around 6 μA, which is not
drain contact regions, shifts the Fermi level at the contacts and inconsistent with values emerging from recent experimental work
effectively lowers the barrier for electron injection, which [9].
results in an n-type behaviour. The oxide film protects the
nanotube from the ambient gases and keeps the n-type devices
stable.

If a CNTFET with SiO2 protective film is annealed in

vacuum or in inert atmosphere, the initial p-type device is
gradually transformed into an ambipolar FET, i.e., the device,
depending on the sign of the gate voltage VG, can operate as
switches for electrons and holes. These ambipolar transistors
are stable in air and show ohmic I-VDS curves in both the Fig 7: Drain current-voltage characteristics of planar CNTFET.
strong hole accumulation and inversion (electron
accumulation) regimes. This behaviour suggests that the Drain I-V characteristics exhibited dependence of saturation
effective contact barriers for both electron and hole transport drain current on temperature. When CNTFET is cooled, drain
are very small. saturation currents were lightly decreased.
 The current voltage curve can be divided into two charge carriers, begins to reduce too. Consequently, the
regions: linear and saturation. Drain current in the linear electrons induced on the channel can now enter the drain
region of CNTFET can be described as follows: metal by tunnelling through the barrier while those carriers
with sufficient thermal energy can jump over the barrier. The
limiting value of current through the nanotube is described by
the thermionic current component.

Or See from the figure, that when no gate voltage is

applied, for the case of Vgs = 0 in Fig. 8, the current increases
linearly with Vds. This is attributed to the linear dependence
of the thermionic current on the drain voltage. The application
Where Kn is conductance of CNTFET, W is the width of of a positive gate voltage induces heavy charge on the
CNTFET, L is the length of CNTFET, μ is mobility of channel. It can be seen from the same figure that the current
carriers, Cox is gate capacitance. due to charge, tunnelling through the barrier at the drain end,
is significantly greater than the thermionic current component.
We can also obtain saturation current of CNTFET by The transfer characteristics in Fig. 9 reflect a similar scenario.
replacing Vds(sat) = Vgs – VT. Then the expression of saturation For an applied drain voltage, the current increases almost
current of CNTFET can be written: quadratically as soon as a gate voltage is applied. The two
drain and transfer characteristics show that the current .owing
through the device is very sensitive to the drain voltage and is
largely controlled by manipulating the barrier height at the
contacts.

2.1 I-V characteristics

Fig 10: CNTFET sub threshold Drain characteristics

Fig 8: Output characteristics of n-type CNTFET

Fig 11: CNTFET sub threshold Transfer characteristics

We can see from Fig. 10 that for a given V gs, the

current saturates at the region, i.e., when the applied V ds ≈
generate the transistor I-V characteristics and their
dependence on the gate dielectric thickness and nature of the
insulator barrier height. At this point the barrier is entirely
suppressed and there is maximum current flow through the
channel. Fig. 11 shows an almost linear increase in the current
Fig 9: Output Characteristics for a p-type top gated CNTFET as a function of the gate voltage. The onset of current
saturation as a function of drain voltage is expressed very
As the voltage across the gate and the source of SB- clearly here. The plot consists of 5 curves for Vds ranging
CNTFET is increased from 0 volts, the Fermi level of the from 0 – 1 V. However, while there is a marked increase in
nanotube moves closer to the conduction band. This band the current for an increase of V ds from 0.1V to 0.3V, beyond
lowering effect causes barriers to develop at nanotube-metal this limit, all the other curves representing the higher values of
junctions. The electrons which have enough potential will Vds are almost merged. The electron current beyond this point
cross the barrier and flow into the tube, causing leakage is independent of Vds.
current. In our model, the main source of leakage is the
thermionic current. When a positive voltage is applied on the 3 Conclusions
drain, the barrier spike begins to progressively diminish at that Carbon Nanotubes are considered as the most
end of the channel. The barrier thickness, as seen by the promising carbon nanostructure material is realizing the nano-
electronic transistors back in year 1991. The understanding of effect Transistors, Applied Physics Letters, October
carbon nanotube transistor is evolving and the performance of 1998.
the transistor is improving very rapidly. CNTFET devices [10] S. J. Wind et al., Vertical scaling of carbon Nanotube
present a bright future and promise to sustain FET scaling and Field-effect transistors using top gate electrodes, Applied
Moore’s Law should their practical and manufacturing Physics Letters, May 2002.
problems be overcome.The V-I characteristics of top gated
CNTFET are also described. The main analysis is studies on
the I-V characteristics of the CNTFET. These top gated
CNTFET devices exhibit excellent electrical characteristics.
However, as was mentioned above, the control parameter of
the properties of the carbon nanotube will change the drain
current directly and the channel length does not impacting the
performance much. A multitude of oxide can be placed on the
nanotube and thus, many high-k dielectrics can be Dr.Y.Srinivasa Rao received his Ph.D in Electrical Communication
incorporated into CNTFET to reduce the tunneling current. Engineering from Indian Institute of Science Bangalore in 1998. At
The large potential of CNTFET transistor to semiconductor present, he is an Associate Professor in Instrument Technology
industry and microelectronic system due the large I on: Ioff , Department, AU College of Engineering (A), Andhra University,
high current drive and other special properties of carbon Visakhapatnam, AP, India. He is having 15+years of teaching and
nanotube. However, the carbon nanotube field still in the early research experience and published more than 50 research papers in
stage and the technology for reducing the process variation the International journals and presented few of them in the
should be focused for this moment. International Conferences. He will be an Visiting Researcher, EEE
Department, Nanyang Technological University, Singapore in 2012.
4 REFERENCES He had received “Emerald Literati Network 2008 Outstanding
Paper Award (UK)”, three “Best Paper Awards” (one in 2011 and
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Ram Babu. B received his M.Tech in Electrical and Instrumentation
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Letters 93: 113112.FLEXChip Signal Processor he is an Assistant Professor in Electronics and Instrumentation
(MC68175/D), Motorola, 1996. Department, Sir.C.R.R.College of Engineering, Eluru, Andhra
[7] Lin, Yu-Ming; Tsang, James C; Freitag, Marcus; University, India. He is having 4+years of teaching and research
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