SN5545xB, SN7545xB Dual-Peripheral Drivers For High-Current, High-Speed Switching

Download as pdf or txt
Download as pdf or txt
You are on page 1of 31

Product Order Technical Tools & Support &

Folder Now Documents Software Community

SN55451B, SN55452B, SN55453B, SN55454B


SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017

SN5545xB, SN7545xB Dual-Peripheral Drivers for High-Current, High-Speed Switching


1 Features 3 Description

1 Characterized for Use to 300 mA The SN5545xB and SN7545xB devices are dual-
peripheral drivers designed for use in systems that
• High-Voltage Outputs up to 30 V employ TTL logic. This family is functionally
• No Output Latch-Up at 20 V (After Conducting interchangeable with and replaces the SN75450
300 mA) family and the SN75450A family devices
• High-Speed Switching manufactured previously. The speed of the devices is
equal to that of the SN75450 family, and the parts are
• Open-Collector Outputs
designed to ensure freedom from latch-up. Diode-
• Circuit Flexibility for Varied Applications clamped inputs simplify circuit design.
• TTL-Compatible Diode-Clamped Inputs The SNx5451B, SNx5452B, SNx5453B, and
• Standard Supply Voltages SNx5454B devices are dual peripheral AND, NAND,
OR, and NOR drivers, respectively (assuming
2 Applications positive logic), with the output of the logic gates
internally connected to the bases of the npn output
• High-Speed Logic Buffers
transistors.
• Power Drivers
The SN5545xB drivers are characterized for
• Lamp Drivers operation over the full military range of –55°C to
• LED Drivers 125°C. The SN7545xB drivers are characterized for
• Line Drivers operation from 0°C to 70°C.
• Memory Drivers
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SN7545xBP PDIP (8) 9.81 mm × 6.35 mm
SN7545xBD SOIC (8) 4.90 mm × 3.90 mm
SN7545xBPS SO (8) 6.20 mm x 5.30 mm
SN5545xBJG CDIP (8) 9.60 mm × 6.67 mm
SN5545xBFK LCCC (20) 8.89 mm × 8.89 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.

SN75451B Logic Diagram


3
1 1Y
1A
2
1B 5
6 2Y
2A
7
2B
4
GND

Copyright © 2016 Texas Instruments Incorporated

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017 www.ti.com

Table of Contents
1 Features .................................................................. 1 9.3 Feature Description................................................. 10
2 Applications ........................................................... 1 9.4 Device Functional Modes........................................ 10
3 Description ............................................................. 1 10 Application and Implementation........................ 13
4 Revision History..................................................... 2 10.1 Application Information.......................................... 13
10.2 Typical Application ................................................ 13
5 Device Comparison Table..................................... 3
6 Pin Configuration and Functions ......................... 3 11 Power Supply Recommendations ..................... 14
7 Specifications......................................................... 4 12 Layout................................................................... 14
12.1 Layout Guidelines ................................................. 14
7.1 Absolute Maximum Ratings ...................................... 4
12.2 Layout Example .................................................... 14
7.2 Recommended Operating Conditions....................... 4
7.3 Thermal Information .................................................. 4 13 Device and Documentation Support ................. 15
7.4 Electrical Characteristics........................................... 5 13.1 Related Links ........................................................ 15
7.5 Switching Characteristics, VCC = 5 V, TA = 25°C ..... 5 13.2 Receiving Notification of Documentation Updates 15
7.6 Dissipation Ratings ................................................... 5 13.3 Community Resources.......................................... 15
7.7 Typical Characteristics .............................................. 6 13.4 Trademarks ........................................................... 15
13.5 Electrostatic Discharge Caution ............................ 15
8 Parameter Measurement Information .................. 6
13.6 Glossary ................................................................ 15
9 Detailed Description .............................................. 9
9.1 Overview ................................................................... 9 14 Mechanical, Packaging, and Orderable
Information ........................................................... 15
9.2 Functional Block Diagrams ....................................... 9

4 Revision History
Changes from Revision C (May 2016) to Revision D Page

• Replaced image SN75451B Logic Diagram ........................................................................................................................... 1

Changes from Revision B (January 1999) to Revision C Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1

2 Submit Documentation Feedback Copyright © 1967–2017, Texas Instruments Incorporated

Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
www.ti.com SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017

5 Device Comparison Table

DEVICE LOGIC OF COMPLETE CIRCUIT OPERATING FREE AIR TEMPERATURE RANGE


SN55451B AND –55°C to 125°C
SN55452B NAND –55°C to 125°C
SN55453B OR –55°C to 125°C
SN55454B NOR –55°C to 125°C
SN75451B AND 0°C to 70°C
SN75452B NAND 0°C to 70°C
SN75453B OR 0°C to 70°C
SN75454B NOR 0°C to 70°C

6 Pin Configuration and Functions

JG, D, P, or PS Package FK Package


8-Pin CDIP, SOIC, PDIP, or SO 20-Pin LCCC
Top View Top View

VCC
NC

NC

NC
1A
1A 1 8 VCC
1B 2 7 2B 3 2 1 20 19
NC 4 18 NC
1Y 3 6 2A 1B 2B
5 17
GND 4 5 2Y NC 6 16 NC
1Y 7 15 2A
NC 8 14 NC
9 10 11 12 13

2Y
NC

NC

NC
GND
NC – No internal connection

Pin Functions
PIN
CDIP, SOIC, PDIP, I/O DESCRIPTION
NAME LCCC
SO
1A 1 2 I Channel 1 Logic Input A
1B 2 5 I Channel 1 Logic Input B
1Y 3 7 O Channel 1 Driver
2A 6 15 I Channel 2 Logic Input A
2B 7 17 I Channel 2 Logic Input B
2Y 5 12 O Channel 2 Driver
GND 4 10 — Ground
1, 3, 4, 6, 8,
9, 11, 13,
NC — — No Internal Connection
14, 16, 18,
19
VCC 8 20 — Supply Voltage

Copyright © 1967–2017, Texas Instruments Incorporated Submit Documentation Feedback 3


Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017 www.ti.com

7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
(2)
VCC Supply voltage, (see ) 7 V
VI Input voltage 5.5 V
(3)
Inter-emitter voltage (see Note ) 5.5 V
VO Off-state output voltage 30 V
(4)
IOK Continuous collector or output current, (see Note ) 400 mA
(5)
Peak collector or output current, II (tw ≤ 10 ms, duty cycle ≤ 50%, see Note ) 500 mA
See Dissipation
Continuous total power dissipation
Ratings
SN5545xB –55 125
TA Operating free-air temperature °C
SN7545xB 0 70
Case temperature for 60 seconds SN5545xB FK package 260 °C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds SN5545xB JG package 100 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds SN7545xB D or P package 260 °C
TJ Operating virtual junction temperature 150 °C
Tstg Storage temperature –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltage values are with respect to network GND, unless otherwise specified.
(3) This is the voltage between two emitters of a multiple-emitter transistor.
(4) This value applies when the base-emitter resistance (RBE) is equal to or less than 500 Ω.
(5) Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a short time
interval must fall within the continuous dissipation rating.

7.2 Recommended Operating Conditions


over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
SN5545xB 4.5 5 5.5
VCC Supply voltage V
SN7545xB 4.75 5 5.25
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
SN5545xB –50 125
TA Operating free-air temperature °C
SN7545xB 0 70

7.3 Thermal Information


SN7545xB
THERMAL METRIC (1) D (SOIC) P (PDIP) PS (SO) UNIT
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 122.2 63.7 119.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 68.4 53.6 71.5 °C/W
RθJB Junction-to-board thermal resistance 62.4 40.8 68.7 °C/W
ψJT Junction-to-top characterization parameter 23.2 31.1 31.6 °C/W
ψJB Junction-to-board characterization parameter 62.0 40.8 67.7 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

4 Submit Documentation Feedback Copyright © 1967–2017, Texas Instruments Incorporated

Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
www.ti.com SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017

7.4 Electrical Characteristics


over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIK Input clamp voltage VCC = MIN, II = – 12 mA –1.2 –1.5 V
VCC = MIN, VIL = 0.8 V, IOL = SN5545xB 0.25 0.5
100 mA SN7545xB 0.25 0.4
VOL Low-level output voltage V
VCC = MIN, VIL = 0.8 V, IOL = SN5545xB 0.5 0.8
300 mA SN7545xB 0.5 0.7
VCC = MIN, VIH = MIN, VOH = SN5545xB 300
IOH High-level output current µA
30 V SN7545xB 100
Input current at maximum
II VCC = MAX, VI = 5.5 V 1 mA
input voltage
IIH High-level input current VCC = MAX, VI = 2.4 V 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V –1 –1.6 mA
SNx5451B 7 11
VCC = MAX, VI = 5 V
SNx5453B 8 11
ICCH Supply current, outputs high mA
SNx5452B 11 14
VCC = MAX, VI = 0 V
SNx5454B 13 17
SNx5451B 52 65
VCC = MAX, VI = 0 V
SNx5453B 54 68
ICCL Supply current, outputs low mA
SNx5452B 56 71
VCC = MAX, VI = 5 V
SNx5454B 61 79

7.5 Switching Characteristics, VCC = 5 V, TA = 25°C


over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS (1) MIN TYP (2) MAX UNIT
SNx5451B,
18 25
IO ≈ 200 mA, CL = 15 pF, SNx5453B
Propagation delay time, low-to-high-
tPLH
level output RL = 50 Ω, L See Figure 2 SNx5452B 26 35
SNx5454B 27 35
SNx5451B,
18 25
Propagation delay time, high-to-low- IO ≈ 200 mA, CL = 15 pF, SNx5453B
tPHL ns
level output RL = 50 Ω, L See Figure 2 SNx5452B,
24 35
SNx5454B
Transition time, low-to-high-level IO ≈ 200 mA, CL = 15 pF,
tTLH 5 8
output RL = 50 Ω, L See Figure 2
Transition time, high-to-low-level IO ≈ 200 mA, CL = 15 pF,
tTHL 7 12
output RL = 50 Ω, L See Figure 2
High level output voltage after VS = 20 V, IO 9 300 mA, SN5545xB VS – 6.5
VOH mV
switching See Figure 2 SN7545xB VS – 6.5

(1) For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
(2) All typical values are at VCC = 5 V, TA = 25°C.

7.6 Dissipation Ratings


TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 125°C
PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING
D 725 mW 5.8 mW/°C 464 —
FK 1375 mW 11.0 mW/°C 880 275 mW
JG 1050 mW 8.4 mW/°C 672 210 mW
P 1000 mW 8.0 mW/°C 640 —

Copyright © 1967–2017, Texas Instruments Incorporated Submit Documentation Feedback 5


Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017 www.ti.com

7.7 Typical Characteristics


0.6

VCE(sat) – Collector-Emitter Saturation Voltage – V


IC
= 10
IB
0.5 See Note A

0.4
TA = 70°C

0.3

TA = 0°C
0.2

0.1 TA = 25°C
VCE(sat)

0
10 20 40 70 100 200 400
IC – Collector Current – mA

NOTE A: These parameters must be measured using pulse techniques,


tw = 300 ms, duty cycle ≤ 2%.
Figure 1. Transistor Collector-Emitter Saturation Voltage vs Collector Current

8 Parameter Measurement Information


Input 2.4 V 10 V

’451B RL = 50 W
’452B
Output
Pulse
Generator
(see Note A) Circuit
Under
Test

CL = 15 pF
’453B GND SUB (see Note B)
’454B

0.4 V
A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.

Figure 2. Test Circuit, Complete Drivers

6 Submit Documentation Feedback Copyright © 1967–2017, Texas Instruments Incorporated

Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
www.ti.com SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017

Parameter Measurement Information (continued)

≤ 5 ns ≤ 10 ns
3V
90% 90%
Input
’451B 1.5 V 1.5 V
’453B 10% 10%
0V
0.5 ms
≤ 5 ns ≤ 10 ns
3V
Input 90% 90%
’452B
’454B 1.5 V 1.5 V
10% 10%
0V
tPHL tPLH
VOH
90% 90%
Output 50% 50%
10% 10%
VOL
tTHL tTLH
A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.

Figure 3. Waveforms, Complete Drivers

VS = 20 V

2 mH
Input 2.4 V 5V

’451B 1N3064 65 W
’452B
Pulse Output
Generator
(see Note A) Circuit
Under
Test
CL = 15 pF
(see Note B)

’453B GND SUB


’454B

0.4 V
A. The pulse generator has the following characteristics: PRR ≤ 12.5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.

Figure 4. Test Circuit for Latch-Up Test of Complete Drivers

Copyright © 1967–2017, Texas Instruments Incorporated Submit Documentation Feedback 7


Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017 www.ti.com

Parameter Measurement Information (continued)

≤ 5 ns ≤ 10 ns
3V
90% 90%
Input
’451B 1.5 V 1.5 V
’453B 10% 10%
0V
40 ms
≤ 5 ns ≤ 10 ns
3V
Input 90% 90%
’452B
’454B 1.5 V 1.5 V
10% 10%
0V

VOH

Output

VOL
A. The pulse generator has the following characteristics: PRR ≤ 12.5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.

Figure 5. Voltage Waveforms for Latch-Up Test of Complete Drivers

8 Submit Documentation Feedback Copyright © 1967–2017, Texas Instruments Incorporated

Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
www.ti.com SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017

9 Detailed Description

9.1 Overview
The SN7545xB and SN5545xB devices provide dual-output drivers with AND, NAND, NOR, or OR logic inputs. If
each logic input is set to the appropriate voltage level, then the output driver will turn on, pulling the driver to
ground and allowing current to flow.

9.2 Functional Block Diagrams


3
1 1Y
1A
2
1B 5
6 2Y
2A
7
2B
4
GND

Copyright © 2016 Texas Instruments Incorporated

Figure 6. SNx5451B Logic Diagram (Positive Logic)

3
1 1Y
1A
2
1B 5
6 2Y
2A
7
2B
4
GND

Copyright © 2016 Texas Instruments Incorporated

Figure 7. SNx5452B Logic Diagram (Positive Logic)

3
1 1Y
1A
2
1B 5
6 2Y
2A
7
2B
4
GND

Copyright © 2016 Texas Instruments Incorporated

Figure 8. SNx5453B Logic Diagram (Positive Logic)

Copyright © 1967–2017, Texas Instruments Incorporated Submit Documentation Feedback 9


Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017 www.ti.com

Functional Block Diagrams (continued)

3
1 1Y
1A
2
1B 5
6 2Y
2A
7
2B
4
GND

Copyright © 2016 Texas Instruments Incorporated

Figure 9. SNx5454B Logic Diagram (Positive Logic)

9.3 Feature Description


The SNx5451B devices allow for high current driving up to 300 mA. This family of devices have AND, NAND,
OR, or NOR input logic gates to allow for a wide variety of applications. The SN7545xB devices are rated for a
commercial temperature range of 0°C to 70°C, and the SN5545xB devices are rated for a military temperature
range of –65°C to 125°C.

9.4 Device Functional Modes


Table 1, Table 2, Table 3, and Table 4 list the functional modes of the SNx545xB.
1
1A & 3
2 1Y
1B
6
2A 5
7 2Y
2B

Figure 10. SNx5451B Logic Symbol

Table 1. SNx5451B Function Table


(1)
A B Y
L L L (on state)
L H L (on state)
H L L (on state)
H H H (off state)

(1) Positive logic: Y = AB or NOT(A + B)

10 Submit Documentation Feedback Copyright © 1967–2017, Texas Instruments Incorporated

Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
www.ti.com SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017

1
1A & 3
2 1Y
1B
6
2A 5
7 2Y
2B

Figure 11. SNx5452B Logic Symbol

Table 2. SNx5452B Function Table


(1)
A B Y
L L H (off state)
L H H (off state)
H L H (off state)
H H L (on state)

(1) Positive logic: Y = AB or A + B

1
1A ≥1 3
2 1Y
1B
6
2A 5
7 2Y
2B

Figure 12. SNx5453B Logic Symbol

Table 3. SNx5453B Function Table


(1)
A B Y
L L L (on state)
L H H (off state)
H L H (off state)
H H H (off state)

(1) Positive logic: Y = AB or NOT(A + B)

1
1A ≥1 3
2 1Y
1B
6
2A
7 2Y
2B

Figure 13. SNx5454B Logic Symbol

Table 4. SNx5454B Function Table


(1)
A B Y
L L H (off state)
L H L (on state)
H L L (on state)
H H L (on state)

(1) Positive logic: Y = A+B or A B

Copyright © 1967–2017, Texas Instruments Incorporated Submit Documentation Feedback 11


Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017 www.ti.com

VCC VCC
1.6 kW
4 kW 1.6 kW 130W 4 kW 130W
1.6 kW

Y
Y A
A
B
B 500W
1 kW 1 kW
500W
GND
1 kW
Resistor values shown are nominal.
GND Copyright © 2016 Texas Instruments Incorporated
Resistor values shown are nominal.
Copyright © 2016 Texas Instruments Incorporated

Figure 14. SNx5451B Schematic (Each Driver) Figure 15. SNx5452B Schematic (Each Driver)
VCC VCC
2 kW 2 kW 1.6
4 kW 1.6 kW 4 kW 130 W 4 kW 4 130W
kW kW

Y A Y
A B
B
1 kW 1 kW 500W
500 W
GND
1 kW
GND Resistor values shown are nominal.
Copyright © 2016 Texas Instruments Incorporated
Resistor values shown are nominal.
Copyright © 2016 Texas Instruments Incorporated

Figure 16. SNx5453B Schematic (Each Driver) Figure 17. SNx5454B Schematic (Each Driver)

12 Submit Documentation Feedback Copyright © 1967–2017, Texas Instruments Incorporated

Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
www.ti.com SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017

10 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

10.1 Application Information


Typically the SN75451B device drives a high-voltage or high-current peripheral from an MCU or logic device that
cannot tolerate these conditions. The following design is a common application of the SN75451B device, driving
an LED using one channel and a high voltage peripheral using the other. In this configuration, the LED will turn
on whenever the high voltage peripheral is on.

10.2 Typical Application


3.3-V or 5-V Logic

VSUP
VSUP
1A VCC 24 V

1B 2B

1Y 2A RLOAD

GND 2Y

Copyright © 2016, Texas Instruments Incorporated


Figure 18. SN75451B Driving an LED and a High Voltage Peripheral

10.2.1 Design Requirements


Each of the inputs to the logic gate should never float. If one of the inputs is floating, then the logic gate could be
in an unknown state. Be sure to connect ground or VCC to any unused input channels.

10.2.2 Detailed Design Procedure


1. Recommended Input Conditions:
– For specified high and low levels, see VIH and VIL in Recommended Operating Conditions.
– The input voltage must not exceed the VI specified in Absolute Maximum Ratings.
2. Recommended Output Conditions:
– It is recommended that the load current not exceed 300 mA.
– The load current must never exceed the IOK noted in Absolute Maximum Ratings.

Copyright © 1967–2017, Texas Instruments Incorporated Submit Documentation Feedback 13


Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017 www.ti.com

Typical Application (continued)


10.2.3 Application Curves

70 0.40
Outputs Low Vcc = 4.75 V

VOL -Low-level Output Voltaget (V)


60 0.35
One Output Low Vcc = 5 V
ICC - Supply Current (mA)

Outputs High 0.30 Vcc = 5.25 V


50
0.25
40
0.20
30
0.15
20
0.10
10 0.05

0 0.00
0 1 2 3 4 5 0 50 100 150 200 250 300
VCC - Supply Voltage (V) IOK - Collector Current (mA)
C001 C001

Figure 19. SN75451B Typical Supply Current vs Supply Figure 20. SN75451B Typical Low-Level Output Voltage vs
Voltage Collector Current

11 Power Supply Recommendations


The power supply can be any voltage between the minimum and maximum supply voltage rating located in
Recommended Operating Conditions. The VCC pin should have a bypass capacitor to prevent power disturbance.
A 0.1-µF capacitor is suitable for this device.

12 Layout

12.1 Layout Guidelines


Thin traces can be used on the input due to the low-current logic that is used to drive the SNx545xB devices.
Take care to separate the input channels to eliminate crosstalk. These traces are recommended for the output to
be able to drive high currents. Be sure to connect ground or VCC to any unused input channels, and use a
bypass capacitor on the VCC pin to prevent any power glitches.

12.2 Layout Example


0.1 F

1A 1 8 VCC
1B 2 7 2B
1Y 3 6 2A
GND 4 5 2Y

Figure 21. SN75451BD Layout

14 Submit Documentation Feedback Copyright © 1967–2017, Texas Instruments Incorporated

Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
www.ti.com SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017

13 Device and Documentation Support

13.1 Related Links


The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.

Table 5. Related Links


TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER ORDER NOW
DOCUMENTS SOFTWARE COMMUNITY
SN55451B Click here Click here Click here Click here Click here
SN55452B Click here Click here Click here Click here Click here
SN55453B Click here Click here Click here Click here Click here
SN55454B Click here Click here Click here Click here Click here
SN75451B Click here Click here Click here Click here Click here
SN75452B Click here Click here Click here Click here Click here
SN75453B Click here Click here Click here Click here Click here
SN75454B Click here Click here Click here Click here Click here

13.2 Receiving Notification of Documentation Updates


To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.

13.3 Community Resources


The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.

13.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information


The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 1967–2017, Texas Instruments Incorporated Submit Documentation Feedback 15


Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
PACKAGE OPTION ADDENDUM

www.ti.com 17-Jul-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

5962-9563301Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9563301Q2A
SNJ55
453BFK
5962-9563301QPA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 9563301QPA
SNJ55453B
77049012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 77049012A
SNJ55
452BFK
7704901PA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 7704901PA
SNJ55452B
77049022A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 77049022A
SNJ55
451BFK
7704902PA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 7704902PA
SNJ55451B
JM38510/12902BPA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510
/12902BPA
JM38510/12903BPA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510
/12903BPA
JM38510/12905BPA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510
/12905BPA
M38510/12902BPA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510
/12902BPA
M38510/12903BPA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510
/12903BPA
M38510/12905BPA ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 JM38510
/12905BPA
SN55451BJG ACTIVE CDIP JG 8 50 TBD SNPB N / A for Pkg Type -55 to 125 SN55451BJG

SN55452BJG ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 SN55452BJG

SN55453BJG ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 SN55453BJG

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 17-Jul-2020

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

SN55454BJG ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 SN55454BJG

SN75451BD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75451B


& no Sb/Br)
SN75451BDE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75451B
& no Sb/Br)
SN75451BDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75451B
& no Sb/Br)
SN75451BDRE4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75451B
& no Sb/Br)
SN75451BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75451B
& no Sb/Br)
SN75451BP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75451BP
& no Sb/Br)
SN75451BPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75451BP
& no Sb/Br)
SN75451BPS ACTIVE SO PS 8 80 Green (RoHS NIPDAU Level-1-260C-UNLIM A451B
& no Sb/Br)
SN75451BPSR ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 A451B
& no Sb/Br)
SN75452BD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75452B
& no Sb/Br)
SN75452BDE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75452B
& no Sb/Br)
SN75452BDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75452B
& no Sb/Br)
SN75452BDRE4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75452B
& no Sb/Br)
SN75452BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75452B
& no Sb/Br)
SN75452BP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75452BP
& no Sb/Br)
SN75452BPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75452BP
& no Sb/Br)
SN75452BPS ACTIVE SO PS 8 80 Green (RoHS NIPDAU Level-1-260C-UNLIM A452B
& no Sb/Br)

Addendum-Page 2
PACKAGE OPTION ADDENDUM

www.ti.com 17-Jul-2020

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

SN75452BPSR ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 A452B


& no Sb/Br)
SN75452BPSRG4 ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 A452B
& no Sb/Br)
SN75453BD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75453B
& no Sb/Br)
SN75453BDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75453B
& no Sb/Br)
SN75453BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75453B
& no Sb/Br)
SN75453BP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75453BP
& no Sb/Br)
SN75453BPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75453BP
& no Sb/Br)
SN75453BPSR ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 A453B
& no Sb/Br)
SN75454BD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75454B
& no Sb/Br)
SN75454BDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 75454B
& no Sb/Br)
SN75454BP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75454BP
& no Sb/Br)
SN75454BPE4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 SN75454BP
& no Sb/Br)
SN75454BPSR ACTIVE SO PS 8 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 A454B
& no Sb/Br)
SNJ55451BFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 77049022A
SNJ55
451BFK
SNJ55451BJG ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 7704902PA
SNJ55451B
SNJ55452BFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 77049012A
SNJ55
452BFK
SNJ55452BJG ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 7704901PA
SNJ55452B

Addendum-Page 3
PACKAGE OPTION ADDENDUM

www.ti.com 17-Jul-2020

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

SNJ55453BFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9563301Q2A
SNJ55
453BFK
SNJ55453BJG ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 9563301QPA
SNJ55453B
SNJ55454BJG ACTIVE CDIP JG 8 1 TBD SNPB N / A for Pkg Type -55 to 125 SNJ55
454BJG

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 4
PACKAGE OPTION ADDENDUM

www.ti.com 17-Jul-2020

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF SN55451B, SN55452B, SN55453B, SN55454B, SN75451B, SN75452B, SN75453B, SN75454B :

• Catalog: SN75451B, SN75452B, SN75453B, SN75454B


• Military: SN55451B, SN55452B, SN55453B, SN55454B

NOTE: Qualified Version Definitions:

• Catalog - TI's standard catalog product


• Military - QML certified for Military and Defense Applications

Addendum-Page 5
PACKAGE MATERIALS INFORMATION

www.ti.com 20-Dec-2018

TAPE AND REEL INFORMATION

*All dimensions are nominal


Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN75451BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75452BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75453BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75454BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION

www.ti.com 20-Dec-2018

*All dimensions are nominal


Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN75451BDR SOIC D 8 2500 340.5 338.1 20.6
SN75452BDR SOIC D 8 2500 340.5 338.1 20.6
SN75453BDR SOIC D 8 2500 340.5 338.1 20.6
SN75454BDR SOIC D 8 2500 340.5 338.1 20.6

Pack Materials-Page 2
PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1

.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]

4X (0 -15 )

4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4

.005-.010 TYP
[0.13-0.25]

4X (0 -15 )

SEE DETAIL A
.010
[0.25]

.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.

www.ti.com
EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

LAND PATTERN EXAMPLE


EXPOSED METAL SHOWN
SCALE:8X

SOLDER MASK SOLDER MASK


METAL METAL UNDER
OPENING OPENING SOLDER MASK

EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK


DEFINED DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.


7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55] SYMM

1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]

SOLDER PASTE EXAMPLE


BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
MECHANICAL DATA

MCER001A – JANUARY 1995 – REVISED JANUARY 1997

JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE

0.400 (10,16)
0.355 (9,00)

8 5

0.280 (7,11)
0.245 (6,22)

1 4
0.065 (1,65)
0.045 (1,14)

0.063 (1,60) 0.310 (7,87)


0.020 (0,51) MIN
0.015 (0,38) 0.290 (7,37)

0.200 (5,08) MAX


Seating Plane

0.130 (3,30) MIN

0.023 (0,58)
0°–15°
0.015 (0,38)
0.100 (2,54) 0.014 (0,36)
0.008 (0,20)

4040107/C 08/96

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third
party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,
damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable
warranties or warranty disclaimers for TI products.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2020, Texas Instruments Incorporated

You might also like