Embedded System Notes
Embedded System Notes
Applications of Embedded System
In Notes
The Operating system and other The operating system(mostly RTOS i.e
software for the general purpose Real Time Operating System) and other
computers, are normally complicated software occupy less memory space.
and occupy more memory space
Microprocessor
Microprocessor consists of an ALU, register array, and a control unit. ALU performs
arithmetical and logical operations on the data received from the memory or an input
device. Register array consists of registers identified by letters like B, C, D, E, H, L and
accumulator. The control unit controls the flow of data and instructions within the
computer.
Block Diagram of a Basic Microcomputer
Microcontroller
The general microcontroller consists of the processor, the memory (RAM, ROM,
EPROM), Serial ports, peripherals (timers, counters), etc.
3) Most of the pins in the microcontroller chip can be made programmable by the
user.
Microcontroller structure
The basic structure and block diagram of a microcontroller is shown in the fig
(1.1).
Microcontroller Structure
● CPU
Parallel input/output ports are mainly used to drive/interface various devices such
as LCD’S, LED’S, printers, memories, etc to a microcontroller.
● Serial ports
Serial ports provide various serial interfaces between a microcontroller and other
peripherals like parallel ports.
● Timers/counters
ADC converters are used for converting the analog signal to digital form. The
input signal in this converter should be in analog form (e.g. sensor output) and
the output from this unit is in digital form. The digital output can be used for
various digital applications (e.g. measurement devices).
● Interrupt control
The interrupt control used for providing interrupt (delay) for a working program.
The interrupt may be external (activated by using interrupt pin) or internal (by
using interrupt instruction during programming).
● Special functioning block
Some microcontrollers used only for some special applications (e.g. space
systems and robotics) these controllers containing additional ports to perform
such special operations. This considered as special functioning block.
Microcontroller Microprocessor
Its designing and hardware cost is Its designing and hardware cost is high.
low.
Microprocessors Microcontrollers
Systems become bulkier and Make the system simple, economic and
4
expensive. compact
Not capable for handling
5 Handling Boolean functions
Boolean functions
Bit
Based on bit configuration, the microcontroller is further divided into three categories.
Memory
Based on the memory configuration, the microcontroller is further divided into two
categories.
Instruction Set
Based on the instruction set configuration, the microcontroller is further divided into two
categories.
● CISC − CISC stands for complex instruction set computer. It allows the user to
insert a single instruction as an alternative to many simple instructions.
● RISC − RISC stands for Reduced Instruction Set Computers. It reduces the
operational time by shortening the clock cycle per instruction.
Applications of Microcontrollers
stored in the same memory. This architecture was designed by the famous
mathematician and physicist John Von Neumann in 1945.
Harvard Architecture:
Harvard Architecture is the digital computer architecture whose design is based on the
concept where there are separate storage and separate buses (signal path) for
instruction and data. It was basically developed to overcome the bottleneck of Von
Neumann Architecture.
Same physical memory address is Separate physical memory address is
used for instructions and data. used for instructions and data.
There is a common bus for data and Separate buses are used for
The CPU can not access instructions CPU can access instructions and
Let's see the internal architecture of 8051 Microcontroller represented in form of block
diagram as shown below:
Basic components present internally inside 8051 Microcontroller architecture are:
CPU (Central Processing Unit): CPU acts as a mind of any processing machine. It
synchronizes and manages all processes that are carried out in microcontrollers. User has
no power to control the functioning of the CPU. It interprets the program stored in ROM and
carries out from storage and then performs it projected duty. CPUs manage the different
types of registers available in 8051 microcontrollers.
Interrupts: Interrupts is a subroutine call that is given by the microcontroller when some
other program with high priority is requested for acquiring the system buses then interrupts
Memory: For operation Microcontroller required a program. This program guides the
Microcontrollers also required memory for storage of data and operands for the short
duration. In microcontroller 8051 there is code or program memory of 4 KB that is 4 KB
Bus : Bus is a group of wires which is used as a communication canal or acts as means of
data transfer. The different bus configuration includes 8, 16 or more cables. Therefore, a
bus can bear 8 bits, 16 bits all together.
● Data bus: 8051 microcontroller consists of 8 bits data bus. It is generally used for
transferring the data from one peripherals position to other peripherals.
Oscillator: As the microcontroller is a digital circuit therefore it needs timer for their
operation. To perform timer operation inside a microcontroller it required an externally
For the operation of this timer and counters the oscillator is used inside the microcontroller.
8051 Microcontroller has both Internal ROM and Internal RAM. If the internal
memory is inadequate, you can add external memory using suitable circuits.
Some variants of 8051 like the 8031 and 8032 series don't have any internal
ROM (Program Memory) and must be interfaced with external Program
Memory with instructions loaded in it.
Almost all modern 8051 Microcontrollers, like 8052 Series, have 8KB of
Internal Program Memory (ROM) in the form of Flash Memory (ROM) and
provide the option of reprogramming the memory.
In case of 4KB of Internal ROM, the address space is 0000H to 0FFFH. If the
address space i.e. the program addresses exceed this value, then the CPU
will automatically fetch the code from the external Program Memory.
For this, the External Access Pin (EA Pin) must be pulled HIGH i.e. when the
EA Pin is high, the CPU first fetches instructions from the Internal Program
Memory in the address range of 0000H to 0FFFFH and if the memory
addresses exceed the limit, then the instructions are fetched from the external
ROM in the address range of 1000H to FFFFH.
There is another way to fetch the instructions: ignore the Internal ROM and
fetch all the instructions only from the External Program Memory (External
ROM). For this scenario, the EA Pin must be connected to GND. In this case,
the memory addresses of the external ROM will be from 0000H to FFFFH.
Data Memory (RAM) of 8051 Microcontroller
The Data Memory or RAM of the 8051 Microcontroller stores temporary data
and intermediate results that are generated and used during the normal
operation of the microcontroller. Original Intel’s 8051 Microcontroller had 128B
of internal RAM.
But almost all modern variants of 8051 Microcontroller have 256B of RAM. In
this 256B, the first 128B i.e. memory addresses from 00H to 7FH is divided in
to Working Registers (organized as Register Banks), Bit – Addressable Area
and General Purpose RAM (also known as Scratchpad area).
In the first 128B of RAM (from 00H to 7FH), the first 32B i.e. memory from
addresses 00H to 1FH consists of 32 Working Registers that are organized as
four banks with 8 Registers in each Bank.
The 4 banks are named as Bank0, Bank1, Bank2 and Bank3. Each Bank
consists of 8 registers named as R0 – R7. Each Register can be addressed in
two ways: either by name or by address.
When addressing the Register using its address i.e. 12H for example, the
corresponding Bank may or may not be selected. (12H corresponds to R2 in
Bank2).
The next 16B of the RAM i.e. from 20H to 2FH are Bit – Addressable memory
locations. There are totally 128 bits that can be addressed individually using
00H to 7FH or the entire byte can be addressed as 20H to 2FH.
For example 32H is the bit 2 of the internal RAM location 26H.
The final 80B of the internal RAM i.e. addresses from 30H to 7FH, is the
general purpose RAM area which are byte addressable.
The upper 128B of the RAM i.e. memory addresses from 80H to FFH is
allocated for Special Function Registers (SFRs). SFRs control specific
functions of the 8051 Microcontroller. Some of the SFRs are I/O Port
Registers (P0, P1, P2 and P3), PSW (Program Status Word), A
(Accumulator), IE (Interrupt Enable), PCON (Power Control), etc.
SRFs Memory addresses are only direct addressable. Even though some of
the addresses between 80H and FFH are not assigned to any SFR, they
cannot be used as additional RAM area.
The reason for interfacing external Program Memory or ROM is that complex
programs written in high – level languages often tend to be larger and occupy
more memory.
Another important reason is that chips like 8031 or 8032, which doesn’t have
any internal ROM, have to be interfaced with external ROM.
The following image shows the block diagram of interfacing 64KB of External
RAM and 64KB of External ROM with the 8051 Microcontroller.
In this tutorial, we have seen the 8051 Microcontroller Memory Organization,
Internal ROM and RAM and how to interface external ROM and RAM with
8051 Microcontroller.
Interrupts of 8051
Interrupts are the events that temporarily suspend the main program, pass the control
to the external sources and execute their task. It then passes the control to the main
program where it had left off.
8051 has 5 interrupt signals, i.e. INT0, TFO, INT1, TF1, RI/TI. Each interrupt can be
enabled or disabled by setting bits of the IE register and the whole interrupt system can
be disabled by clearing the EA bit of the same register.
● A low priority interrupt can only be interrupted by the high priority interrupt, but
not interrupted by another low priority interrupt.
● If two interrupts of different priority levels are received simultaneously, the
request of higher priority level is served.
● If the requests of the same priority levels are received simultaneously, then the
internal polling sequence determines which request is to be serviced.
TCON Register
TCON register specifies the type of external interrupt to the microcontroller.
In this section, we will see different addressing modes of the 8051 microcontrollers. In
8051 there are 1-byte, 2-byte instructions and very few 3-byte instructions are present.
The opcodes are 8-bit long. As the opcodes are 8-bit data, there are 256 possibilities.
Among 256, 255 opcodes are implemented.
The clock frequency is12MHz, so 64 instruction types are executed in just 1 µs, and rest
are just 2 µs. The Multiplication and Division operations take 4 µsto to execute.
● Immediate AddressingMode
● Register AddressingMode
● Direct AddressingMode
● Register IndirectAddressing Mode
● Indexed AddressingMode
● Implied AddressingMode
MOVA, #0AFH;
MOVR3, #45H;
MOVDPTR, #FE00H;
In these instructions, the # symbol is used for immediate data. In the last instruction,
there is DPTR. The DPTR stands for Data Pointer. Using this, it points the external data
memory location. In the first instruction, the immediate data is AFH, but one 0 is added
at the beginning. So when the data is starting with A to F, the data should be preceded
by 0.
In the register addressing mode the source or destination data should be present in a
register (R0 to R7). These are some examples of RegisterAddressing Mode.
MOVA, R5;
MOVR2, #45H;
MOVR0, A;
In 8051, there is no instruction like MOVR5, R7. But we can get the same result by
using this instruction MOV R5, 07H, or by using MOV 05H, R7. But this two instruction
will work when the selected register bank is RB0. To use another register bank and to
get the same effect, we have to add the starting address of that register bank with the
register number. For an example, if the RB2 is selected, and we want to access R5,
then the address will be (10H + 05H = 15H), so the instruction will look like this MOV
15H, R7. Here 10H is the starting address of Register Bank 2.
In the Direct Addressing Mode, the source or destination address is specified by using
8-bit data in the instruction. Only the internal data memory can be used in this mode.
Here some of the examples of direct Addressing Mode.
MOV80H, R6;
MOVR2, 45H;
MOVR0, 05H;
The first instruction will send the content of registerR6 to port P0 (Address of Port 0 is
80H). The second one is forgetting content from 45H to R2. The third one is used to get
data from Register R5 (When register bank RB0 is selected) to register R5.
In this mode, the source or destination address is given in the register. By using register
indirect addressing mode, the internal or external addresses can be accessed. The R0
and R1 are used for 8-bit addresses, and DPTR is used for 16-bit addresses, no other
registers can be used for addressing purposes. Let us see some examples of this
mode.
MOV0E5H, @R0;
MOV@R1, 80H
In the instructions, the @ symbol is used for register indirect addressing. In the first
instruction, it is showing that theR0 register is used. If the content of R0 is 40H, then
that instruction will take the data which is located at location 40H of the internal RAM. In
the second one, if the content of R1 is 30H, then it indicates that the content of port P0
will be stored at location 30H in the internal RAM.
MOVXA, @R1;
MOV@DPTR, A;
In these two instructions, the X in MOVX indicates the external data memory. The
external data memory can only be accessed in register indirect mode. In the first
instruction if the R0 is holding 40H, then A will get the content of external RAM
location40H. And in the second one, the content of A is overwritten in the location
pointed by DPTR.
MOVCA, @A+PC;
MOVCA, @A+DPTR;
The C in MOVC instruction refers to code byte. For the first instruction, let us consider A
holds 30H. And the PC value is1125H. The contents of program memory location
1155H (30H + 1125H) are moved to register A.
In the implied addressing mode, there will be a single operand. These types of
instruction can work on specific registers only. These types of instructions are also
known as register specific instruction. Here are some examples of Implied Addressing
Mode.
RLA;
SWAPA;
These are 1- byte instruction. The first one is used to rotate the A register content to the
Left. The second one is used to swap the nibbles in A.
memory.
the program counter register that holds the address of the program memory.
The address 0000H is used as reset memory space and 0004H is used as
Data Memory: The data memory consists of the 368 bytes of RAM and 256
bytes of EEPROM. The 368 bytes of RAM consists of multiple banks. Each
Working Register: It consists of a memory space that stores the operands for
Status Register: The bits of the status register denotes the status of the ALU
(arithmetic logic unit) after every execution of the instruction. It is also used to
addressing.
13-bit register. The 5 upper bits are used as PCLATH (Program Counter
Latch) to independently function as any other register, and the lower 8-bits are
used as the program counter bits. The program counter acts as a pointer to
memory like ROM, but its contents can be erased and changed during the
operation of the microcontroller. The contents into EEPROM can be read from
or written to, using special function registers like EECON1, EECON, etc.
2. I/O Ports
PIC16 series consists of five ports, such as Port A, Port B, Port C, Port D, and
Port E.
Port A: It is a 16-bit port, which can be used as an input or output port based
Port B: It is an 8-bit port, which can be used as both an input and output port.
4 of its bits, when used as input, can be changed upon interrupt signals.
Port D: It is an 8-bit port, which apart from being an I/O port, acts as a slave
Port E: It is a 3-bit port that serves the additional function of the control
3. Timers
PIC microcontrollers consist of 3 timers, out of which the Timer 0 and Timer 2
are 8-bit timers and the Time-1 is a 16-bit timer, which can also be used as a
counter.
4. A/D Converter
The PIC Microcontroller consists of 8-channels, 10-bit Analog to Digital
Converter. The operation of the A/D converter is controlled by these special
function registers: ADCON0 and ADCON1. The lower bits of the converter are
stored in ADRESL (8 bits), and the upper bits are stored in the ADRESH
5. Oscillators
Oscillators are used for timing generation. PIC microcontrollers consist of
oscillators, the crystal is connected between two oscillator pins, and the value
the oscillator. The different modes are low-power mode, crystal mode, and the
high- speed mode. In the case of RC oscillators, the value of the Resistor and
Capacitor determines the clock frequency. The clock frequency ranges from
30 kHz to 4 MHz.
6. CCP module:
A CCP module works in the following three modes:
Capture Mode: This mode captures the time of arrival of a signal, or in other
words, captures the value of the Timer1 when the CCP pin goes high.
PWM Mode: It provides pulse width modulated output with a 10-bit resolution
A register is a place inside the PIC which used to read or write the data/program.
The memory of the PIC is divided into a series of registers. Each of the registers
has its own address and memory locations. These addresses are normally denoted
by using hexadecimal numbers. According to the type of working and usage, the
registers in PIC are classified into two categories.
GPR is a small amount of storage that can be accessible more quickly than any
other memory. These register files can be accessed either directly, or indirectly,
through the File Select Register (FSR). The General Purpose Register (GPR)
memory map (PIC16F877A) is shown in the figure below.
The special function registers are also memory registers which is used for special
dedicated functions. These registers perform various dedicated functions inside the
PIC chip. Each special function inside this PIC chip is controlled by using these
registers. These registers are used by the CPU and peripheral modules for
controlling the desired operation of the device. These registers are normally
implemented as in the form of static RAM memory. A list of these registers is
given in the tables below. The Special Function Registers can be classified into
two sets: core (CPU) and peripheral. Those registers associated with the core
functions are described in detail in this section. The figures below shows SFR
memory map of PIC16F877.
Status Register
Status register is an eight bit register that contains the arithmetic status of the
arithmetic logic unit (ALU), the reset status and the bank select bits for the data
memory. The detailed explanation of status register is given below.
Bit7
Bit 0
● Bit 7 – (IRP): this is a Register Bank Select Bit usually used for
indirect addressing mode.
● Bit 6-5 (RP1:RP0): these bits are Register Bank Select bits commonly
used for direct addressing mode (each banks in this mode carry 128
byes)
10 = Bank 2 (100h-17Fh)
01 = Bank 1 (80h-FFh)
00 = Bank 0 (00h-7Fh))
● Bit 4, (TO): this is a time-out bit used for timing and counting, sleep
and reset functions.
(1 = A carry-out from the 4th low order bit of the result occurred
Option Register
The option Register is a readable and writable register, which contains various
control bits to configure the TMR0 prescaler/WDT postscaler (single assignable
register known also as the pre-scaler), the external INT interrupt andTMR0 and
the weak pull-ups on PORTB. Structure of option register is shown below.
7
0
● Bit 7 (RBPU): This is a PORTB Pull-up Enable bit. If this bit is ‘1’ then
PORTB pull-up function disabled. If this bit is ‘0’, it enabled the pull-up
function by individual port-latch values.
● Bit 6 (INTEDG): This is an Interrupt Edge Select bit. This bit decided if
the interrupt is on either raisin edge or falling edge. The function of
this bit is given below.
(1 = Interrupt on rising edge of RB0/INT pin.
● Bit 5 (T0CS): this is a timer-0(TMR0) Clock Source Select bit and its
function is given below.
● Bit 4 (T0SE): TMR0 Source Edge Select bit which select the timer 0
source edge.
INTCON Register
The INTCON register is a readable and writable register, which contains various
enable and flag bits for the TMR0 register overflow, RB port change and external
RB0/INT pin interrupts. The architecture of this register is given below.
● Bit 7 GIE: Global Interrupt Enable bit. If this bit is enable (‘1’), which
also enable all unmasked interrupts and if it is zero (‘0’), which disable
all interrupts.
● Bit 2 (TMR0IF): TMR0 Overflow Interrupt Flag bit which controls the
overflow of timer 0.
PIE1 Register
The PIE1 register contains the individual enable bits for the peripheral interrupts.
The structure of this register is shown below.
● Bit 7 (PSPIE): this bit is the Parallel Slave Port Read/Write Interrupt
Enable bit
● Bit 5 (RCIE): USART Receive Interrupt Enable bit which control the
USART data reception interrupt.
● Bit 4 (TXIE): USART Transmit Interrupt Enable bit that control USART
data transmission.
● Bit 3 (SSPIE): Synchronous Serial Port Interrupt Enable bit that control
SSP data interrupt.
(1 = Enables the SSP interrupt
● Bit 0 (TMR1IE): TMR1 Overflow Interrupt Enable bit that control the
overflow interrupt of timer 1 module.
The PIR1 register contains the individual flag bits for the peripheral interrupt. The
structure of PIR1 register is given below.
● Bit 6 (ADIF): A/D Converter Interrupt Flag bit that control the interrupt
flag for that analog to digital converter.
(1 = An A/D conversion completed
● Bit 3 (SSPIF): Synchronous Serial Port (SSP) Interrupt Flag bit that
control the SSP interrupt flag in a PIC.
(1 = The SSP interrupt condition has occurred and must be cleared in software
before returning from the Interrupt Service Routine. The conditions that will set
this bit are:
• I2C Master
– A Start condition occurred while the SSP module was Idle (multi-master
system).
– A Stop condition occurred while the SSP module was Idle (multi-master
system).
1. Capture mode:
2. Compare mode:
3. PWM mode:
PIE2 Register
The PIE2 register contains the individual enable bits for the CCP2 peripheral
interrupt, the SSP bus collision
Interrupt, EEPROM write operation interrupt and the comparator interrupt. The
structure of this register is given below.
R/ R/ R/
R/W
U-0 W- U-0 W- W- U-0 U-0
-0
0 0 0
C CC
——— ——— EE BC ——— ———
MI P2I
—— —— IE LIE ——- ——
E E
PIR2 Register
The PIR2 register contains the flag bits for the CCP2 interrupt, the SSP bus
collision interrupt, EEPROM write operation interrupt and the comparator
interrupt. The structure of this register is given below.
R/ R/ R/
R/W
U-0 W- U-0 W- W- U-0 U-0
-0
0 0 0
C CC
——— ——— EE BC ——— ———
MI P2I
—— —— IF LIF —- ——
F F
(1 = A bus collision has occurred in the SSP when configured for I2C Master
Mode
1. Capture mode:
Compare mode:
2. PWM mode:
This mode is not used.
PCON Register
The Power Control (PCON) register contains flag bits to allow differentiation
between a Power-on Reset
U-
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-1
0
— — — — — —— POR(inver BOR(inver
— —- —- —- —- — ting) ting)
Interfacing EEPROM
with PIC
Microcontroller – I2C
Based
In the article, we see the interfacing EEPROM with PIC Microcontrollers using the
I2C Protocol. In the real world, microcontrollers have a limited amount of memory.
Sometimes the limited amount of memory becomes a big issue and creates a
Each microcontroller provides flexibility to connect an external memory to store
the required data. These data can store in memory by using the I2C, SPI or other
communication protocol.
Here, I am explaining an example, where I will store a single byte in an EEPROM
and after that, I will read back the written byte from the EEPROM. For verification,
I will compare read bytes from the bytes which have been written and toggle LED
What is an EEPROM?
An EEPROM is a non-volatile memory that means it can store the data
permanently without any power supply. EEPROM stands for Electrically Erasable
Programmable Read-Only Memory. We can erase the EEPROM data by the UV
eraser.
An EEPROM is slower than the flash memory. In flash memory, we can erase the
which are required in the program, for example, usernames and passwords.
There are many vendors who make different kinds of EEPROM but in this article, I
will only discuss 24lc64 (manufactured by the microchip). The 24lc64 (EEPROM) is
The control code for the 24lc64 is “1010” for the read and write operation. The
chip select size is 3 bits (A2, A1, A0) it allows the user to connect the maximum of 8
devices to the I2c bus. The last bit of the control byte is read/write bits, this bit is
zero for the write operation and one for the read operation.
When you want to interface an EEPROM with a microcontroller then you need to
have a good knowledge of I2C protocol. If you are not aware of the I2C protocol
then don’t need to worry, it is a very simple serial communication protocol. So it’s
my advice to you, before reading the remaining part of this article, read the I2C
protocol.
Micro-controller
In our case, the Micro-controller works here as master and starts the
EEPROM memory
For example, after writing the data ‘K’ on the location 0x0001, if you read the
location 0x0001 you will get ‘K’. Most important thing is to remember that each
cell of 24lc64 can store 8 bits of the data(0 -255). So if you want to store the bigger
ARM Processor
An ARM processor is also one of a family of CPUs based on the RISC (reduced instruction set
computer) architecture developed by Advanced RISC Machines (ARM).
An ARM makes at 32-bit and 64-bit RISC multi-core processors. RISC processors are designed
to perform a smaller number of types of computer instructions so that they can operate at a
higher speed, performing extra millions of instructions per second (MIPS). By stripping out
unnecessary instructions and optimizing pathways, RISC processors give outstanding
performance at a part of the power demand of CISC (complex instruction set computing)
procedure.
ARM processors are widely used in customer electronic devices such as smart phones, tablets,
multimedia players and other mobile devices, such as wear ables. Because of their reduced to
instruction set, they need fewer transistors, which enable a smaller die size of the integrated
circuitry (IC). The ARM processors, smaller size reduced difficulty and lower power expenditure
makes them suitable for increasingly miniaturized devices.
PIC Microcontroller:
Bus width: 8/16/32-bit
Communication Protocols: PIC, UART, USART, LIN, CAN, Ethernet, SPI, I2S
ARM Microcontroller:
Communication Protocols: UART, USART, LIN, I2C, SPI, CAN, USB, Ethernet, I2S, DSP, SAI
(serial audio interface), IrDA
ISA: RISC