L4973

3.5 A step down switching regulator

Features
■ Up to 3.5 A step down converter
■ Operating input voltage from 8 V to 55 V
■ 3.3 V and 5.1 V (±1%) fixed output, and DIP-18 (12+3+3) SO-20 (12+4+4)
adjustable outputs from:
– 0.5 V to 50 V (3.3 type)
– 5.1 V to 50 V (5.1 type) Description
■ Frequency adjustable up to 300 kHz The L4973 is a step down monolithic power
■ Voltage feed forward switching regulator delivering 3.5 A at fixed
voltages of 3.3 V or 5.1 V and using a simple
■ Zero load current operation (min. 1 mA) external divider output adjustable voltage up to
■ Internal current limiting (pulse by pulse and 50V. Realized in BCD mixed technology, the
HICCUP mode) device uses an internal power D-MOS transistor
■ Precise 5.1 V (1.5%) reference voltage (with a typical RDS(on) of 0.15 Ω) to obtain very
externally available high efficiency and very fast switching times.
Switching frequency up to 300 kHz are achievable
■ Input/output synchronization function (the maximum power dissipation of the packages
■ Inhibit for zero current consumption (100 mA must be observed).
typ. at VCC = 24 V) A wide input voltage range between 8 V to 55 V
■ Protection against feedback disconnection and output voltages regulated from 3.3 V to 40 V
cover the majority of the today applications.
■ Thermal shutdown Features of this new generation of DC-DC
■ Output over voltage protection converter includes pulse by pulse current limit,
■ Soft-start function hiccup mode for output short circuit protection,
voltage feed forward regulation, soft-start,
input/output synchronization, protection against
feedback loop disconnection, inhibit for zero
current consumption and thermal shutdown.
Packages available are in plastic dual in line, DIP-
18 (12+3+3) for standard assembly, and SO20
(12+4+4) for SMD assembly.
Figure 1. Internal schematic diagram
VCC (8V to 55V)
7 8 12 CBOOT
ROSC 9

1
L4973 3
VO(3.3V or 5.1V)
CIN C2 4,5,6,10 L1
2
13,14,15 16 17 11

RCOMP
COSC CSS D1 COUT

CCOMP

D97IN554A

February 2009 Rev 18 1/28

www.st.com 28
Contents L4973

Contents

1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

5 Evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

6 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

7 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

8 Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

10 Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

2/28
L4973 Block diagram

1 Block diagram

Figure 2. Block diagram

INH V5.1 VCC VCC

10(11) 16(18) 7(8) 8(9)

CBOOT
CHARGE

ZERO CURRENT VREF INTERNAL

INTERNAL 5.1V
INHIBIT GOOD 5.1V SUPPLY
REFERENCE
3.3V

17(19) SOFT HICCUP CURRENT

SS
START LIMITING

11(12)
COMP
THERMAL CURRENT
SHUTDOWN LIMITING
5.1V BOOT
3.3V + R Q 9(10)
E/A -
VFB - PWM S Q
12(13) +

SYNC OSCILLATOR
18(20)
DRIVER
4,5,6,13,14,15
1(1) (4,5,6,7,14,15,16,17) 2(2) 3(3)
OSC GND OUT OUT D94IN161B

Pin x = Powerdip
Pin (x) = S020

2 Pin settings

2.1 Pin connection

Figure 3. Pin connection (top view)

OSC 1 20 SYNC
OSC 1 18 SYNC
OUT 2 19 SS
OUT 2 17 SS
OUT 3 18 V5.1
OUT 3 16 V5.1
GND 4 17 GND
GND 4 15 GND
GND 5 16 GND
GND 5 14 GND
GND 6 15 GND
GND 6 13 GND
GND 7 14 GND
VCC 7 12 VFB
VCC 8 13 VFB
VCC 8 11 COMP
VCC 9 12 COMP
BOOT 9 10 INH
BOOT 10 11 INH
D94IN162A
D94IN163A

DIP -18 (12+3+3) SO20 (12+4+4)

3/28
Pin settings L4973

2.2 Pin description

Table 1. Pin description

N° Pin
Name Description
DIP-18 SO-20

11 12 COMP E/A output to be used for frequency compensation

A logic signal (active high) disables the device (sleep
10 11 INH mode operation). If not used it must be connected to
GND; if floating the device is disabled.
A capacitor connected between this pin and the output
9 10 BOOT
allows to drive the internal D-MOS.
18 20 SYNC Input/Output synchronization.
7,8 8,9 VCC Unregulated DC input voltage
2,3 2,3 OUT Stepdown regulator output.
Stepdown feedback input. Connecting the output
directly to this pin results in an output voltage of 3.3 V
for the L4973V3.3 and 5.1 V for L4973V5.1. An external
12 13 VFB resistive divider is required for higher output voltages.
For output voltage resistive divider is required for higher
output voltages. For output voltage less than 3.3 V, see
Note: 1 and Figure 33.
16 18 V5.1 Reference voltage externally available.
4,5,6 4,5,6,7
GND Signal ground
13,14,15 14,15,16,17
An external resistor connected between the unregulated
input voltage and Pin 1 and a capacitor connected from
1 1 OSC
Pin 1 to ground fixes the switching frequency. (Line feed
forward is automatically obtained)

Note: 1 The maximum power dissipation of the package must be observed.

4/28
L4973 Electrical data

3 Electrical data

3.1 Maximum ratings

Table 2. Absolute maximum ratings

Symbol
Parameter Value Unit
DIP-18 S0-20

V7,V8 V9,V8 Input voltage 58 V

Output DC voltage -1 V
V2,V3 V2,V3
Output peak voltage at t = 0.1 μs f = 200 kHz -5 V
I2,I3 I2,I3 Maximum output current int. limit.
V9-V8 V10-V8 14 V
V9 V10 Bootstrap voltage 70 V
V11 V12 Analogs input voltage (VCC = 24 V) 12 V
V17 V19 Analogs input voltage (VCC = 24 V) 13 V
6 V
V12 V13 (VCC = 20 V)
-0.3 V
5.5 V
V18 V20 (VCC = 20 V)
0.3 V
VCC V
V10 V11 Inhibit
-0.3 V
DIP 12+3+3
Power dissipation a Tpins ≤ 90 °C 5 W
(TA = 70 °C no copper area) 1.3 W
Ptot (TA = 70 °C 4 cm copper area on PCB) 2 W

SO-20
Power dissipation a Tpins = 90 °C 4 W
TJ,TSTG Junction and storage temperature -40 to 150 °C

3.2 Thermal data

Table 3. Thermal data

Symbol Parameter DIP-18 SO-20 Unit

RthJP Maximum thermal resistance junction-pin 12 15 °C/W

RthJA Maximum thermal resistance junction-ambient 60 (1) 80 (1) °C/W
1. Package mounted on board

5/28
Electrical characteristics L4973

4 Electrical characteristics

Table 4. Electrical characteristics

(Refer to the test circuit,VCC = 24 V; TJ = 25 °C, COSC = 2.7 nF;
ROSC = 20 kΩ; unless otherwise specified)
Symbol Parameter Test condition Min Typ Max Unit

Dynamic characteristics

Input voltage range (1) VO = VREF to 40 V; IO = 3.5A (2)

8 55 V
IO = 1 A 5.05 5.1 5.15 V
Output voltage
IO = 0.5 A to 3.5 A VCC = 8 V 5.00 5.1 5.20 V
L4973V5.1
to 55 V (2)
4.95 5.1 5.25 V
IO = 1 A 3.326 3.36 3.393 V
Output voltage
IO = 0.5 A to 3.5 A VCC = 8 V 3.292 3.36 3.427 V
L4973V3.3
to 40 V (2)
3.26 3.36 3.46 V
0.15 0.22 Ω
RDS(on ) VCC = 10.5 V IO = 3.5 A
(2)
0.35 Ω
(2)
Maximum limiting 3.8 4.5 5.5 A
VCC = 8 V to 55 V
current 4 4.5 5.5 A
VO = 5.1 V; IO = 3.5 A 90 %
η Efficiency
VO = 3.3 V; IO = 3.5 A 85 %
Switching frequency (2)
90 100 110 kHz

Supply voltage ripple Vi = VCC+2 VRMS VO = Vref;

60 dB
rejection IO = 1 A; fripple = 100 Hz
Switching frequency
Δfsw stability vs., supply VCC = 8 V to 55 V 2 5 %
voltage

Reference section

Iref = 0 to 20 mA; 5.025 5.1 5.175 V

Reference voltage
VCC = 8 to 55 V (2) 4.950 5.1 5.250 V
Iref = 0 mA;
Line regulation 5 10 mV
VCC = 8 to 55 V
Vref = 0 to 5 mA; 2 10 mV
Load regulation
VCC = 0 to 20 mA 6 25 mV
Short circuit current 30 65 100 mA

6/28
L4973 Electrical characteristics

Table 4. Electrical characteristics (continued)

(Refer to the test circuit,VCC = 24 V; TJ = 25 °C, COSC = 2.7 nF;
ROSC = 20 kΩ; unless otherwise specified)
Symbol Parameter Test condition Min Typ Max Unit

Soft-start

Soft-start charge current 30 45 60 μA

Soft-start discharge
15 22 30 μA
current
Inhibit
High level voltage (2)
3.0 V
(2)
Low level voltage 0.8 V
Isource high level VINH = 3 V (2)
10 16 50 μA
Isource low level VINH = 0.8 V (2)
10 15 50 μA

DC characteristics

Total operating
Duty cycle = 50 % 4 6 mA
quiescent current
Quiescent current Duty cycle = 0 2.7 4 mA

Total stand-by quiescent VCC = 24 V; VINH = 5 V 100 200 μA

current VCC = 55 V; VINH = 5 V 150 300 μA

Error amplifier

High level output voltage 11.0 V

Low level output voltage 0.65 V
Source bias current 1 2 3 μA
Source output current 200 300 600 μA
Sink output current 200 300 μA
VCOMP = VFB
Supply voltage ripple
CREF = 4.7 μF 1-5 mA load 60 80 dB
rejection
current
DC open loop gain RL = ∞ 50 60 dB
Icomp = -0.1 to 0.1 mA;
Transconductance 2.5 mS
Vcomp = 6 V

Oscillator section

Ramp valley 0.78 0.85 0.92 V

VCC = 8 V 1.9 2.1 2.3 V
Ramp peak
VCC = 55 V 9 9.6 10.2 V
Maximum duty cycle 95 97 %

7/28
Electrical characteristics L4973

Table 4. Electrical characteristics (continued)

(Refer to the test circuit,VCC = 24 V; TJ = 25 °C, COSC = 2.7 nF;
ROSC = 20 kΩ; unless otherwise specified)
Symbol Parameter Test condition Min Typ Max Unit

Duty cycle = 0%;

Maximum frequency 300 kHz
ROSC =13 kΩ; COSC = 820 pF;

Sync function

High input voltage VCC = 8 V to 55 V 3.5 V

Low input voltage VCC = 8 V to 55 V 0.9 V
Slave sink current 0.15 0.25 0.45 mA
Master output amplitude Isource = 3 mA 4 4.5 V
Output pulse width No load, Vsync = 4.5 V 0.20 0.35 μs
1. Pulse testing with a low duty cycle
2. Specifications referred to TJ from -40 °C to 125 °C.

8/28
L4973 Evaluation board

5 Evaluation board

Figure 4. Evaluation board circuit

SYNCH
R6 NM

JP1

Vin 3 1

C8 220n
2

10

18
7
8

9
U1 L1 68uH Vout
R1

VCC
VCC

INH

SYNC

BOOT
15k OUT 2
OUT 3
1 R3
OSC R7 2.7k
C7 C11 C12 C14

2
NM D1
STPS5L60 NM 150u 50v 150u 50v C13 NM
17 SS
15 NM

1
GND Q2
GND 14 C6
16 13 NM
C10 V5.1 GND NM R4
GND 6
470u 63v C9 5 4.99k
220n COMP GND
4

VFB
GND
signal GND
L4973 DIP 18
11

12
C4
22n
C1 C2 C3 C3A R5 C5
2.7n 470n NM 1u NM R2 150p
GND 15k
signal GND

GND

GND plane

Table 5. Component list (fsw = 150 kHz, VOUT = 5 V)

Reference Description Part number Manufacturer

R1 Resistor 15 kΩ 1%
R2 Resistor 15 kΩ 1%
R3 Resistor 2.7 kΩ 1%
R4 Resistor 4.99 kΩ 1%
R5 Not mounted
R6 Not mounted
R7 Not mounted
C1 Capacitor 2.7 nF 5%
C2 Capacitor 470 nF 5%
C3 Capacitor 1 μF 5%
C4 Capacitor 22 nF 5%
C5 Capacitor 150 pF 5%
C6 Not mounted
C7 Not mounted
C8 Capacitor 220 nF 5%
C9 Capacitor 220 nF 5%
C10 Capacitor 470 μF 63V EKY-630ELL471ML20S Nippon Chemi-con

9/28
Evaluation board L4973

Table 5. Component list (fsw = 150 kHz, VOUT = 5 V) (continued)

Reference Description Part number Manufacturer

C11 Capacitor 150 μF 35 V EKY-350ELL151MHB5D Nippon Chemi-con

C11 Capacitor 150 μF 35 V EKY-350ELL151MHB5D Nippon Chemi-con
C13 Capacitor 100 nF 5 %
C14 Not mounted
L1 68 μH IRMS = 3.4 A ISAT = 6.7 A DO5040H-683MLD Coilcraft
U1 L4973V3.3 STMicroelectronics

Table 6. Resistor divider for VOUT = 12 V

Reference Description Part number Manufacturer

R3 Resistor 2.7 kΩ 1%
R4 Resistor 1 kΩ 1%

Table 7. Resistor divider for VOUT = 3.3 V

Reference Description Part number Manufacturer

R3 Resistor 2.7 kΩ 1%
R4 Not mounted

10/28
L4973 Evaluation board

Figure 5. Evaluation board (components side)

Figure 6. Evaluation board (solder side)

11/28
Application circuit L4973

6 Application circuit

Figure 7. Application circuit (see Figure 4 part list)

VCC INH SYNC

R2 7,8 10 18 9
C8
1
17 L4973V5.1
C1 C2 C7 L1 Vo
16 4,5,6 2,3
11 13,14,15 12

C3 C4 C5 D1 3x C12
R1 C0
C6

D97IN665A

Figure 8. Application circuit (see Figure 4 part list)

VCC INH SYNC

R2 7,8 10 18 9
C8
1
17 L4973V3.3
C1 C2 C7 L1 Vo
16 4,5,6 2,3
11 13,14,15 12

C3 C4 C5 D1 3x C12
R1 C0
C6

D97IN664A

12/28
L4973 Typical characteristics

7 Typical characteristics

Figure 9. Quiescent drain current vs. Figure 10. Quiescent drain current vs.
input voltage (0% duty cycle) junction temperature

Ibias D97IN633A Ibias D97IN634

(mA) (mA)
200KHz-R2=22K 200KHz-R2=22K
C7=1.2nF C7=1.2nF
5.0
Tamb=25˚C
0% DC
4.0
4.5
100KHz-R2=20K
4.0 C7=2.7nF
100KHz-R2=20K
C7=2.7nF
3.5
0% DC
3.5 VCC = 35V

0Hz
3.0
3.0
0Hz

2.5

2.0 2.5
0 10 20 30 40 50 VCC(V) -50 0 50 100 Tj(˚C)

Figure 11. Stand by drain current vs. Figure 12. Reference voltage vs.
input voltage junction temperature (pin 16)

Ibias D97IN635A VREF D97IN637

(μA) (V)

Vinh = 5V Pin 16

5.15
150

Vcc=35V
25˚C
5.1
100
125˚C

5.05
50

5.0
0 10 20 30 40 50 VCC(V) -40 -20 0 20 40 60 80 100 Tj(˚C)

13/28
Typical characteristics L4973

Figure 13. Reference voltage vs. Figure 14. Reference voltage vs.
input voltage (pin 16) reference input current

VREF D97IN636A VREF D97IN638

(V) (V)

Tj=25˚C
Pin 16
5.15 5.2

Vcc=40V

5.1 5.1
Vcc=10V

5.05 5.0
Tj=25˚C

5.0 4.9
0 10 20 30 40 50 VCC(V) 0 10 20 30 40 50 IREF(mA)

Figure 15. Inhibit current vs. inhibit Figure 16. Line regulation (see Figure 7)
voltage (pin 10)

Iinh D97IN651 VO D97IN639A

(μA) (V)

Vcc=35V Tj=0˚C
Pin 10
100 5.12
Tj=125˚C

5˚C
=2
Tj

5.1 Tj=25˚C
50

Tj=125˚C

0 5.08
IO = 1A

-50 5.06
0 5 10 15 Vinh(V) 0 10 20 30 40 50 VCC(V)

14/28
L4973 Typical characteristics

Figure 17. Load regulation (see Figure 18. Line regulation (see Figure 8)
Figure 7)

VO D97IN640 VO D97IN660A
(V) (V)

VCC = 35V 3.35

5.15
Tj=125˚C
3.34
Tj=125˚C
Tj=25˚C
5.1 3.33
Tj=25˚C

3.32
5.05 IO = 1A
3.31

5.0 3.3
0 1 2 3 IO(A) 0 10 20 30 40 50 VCC(V)

Figure 19. Load regulation (see Figure 20. Switching frequency vs.
Figure 4) R2 and C7 (Figure 4)

VO D97IN661 fsw D97IN630

(V) (KHz)
VCC = 35V 500 Tamb=25˚C
3.35
0.8
2nF
200
3.34 1.2
Tj=125˚C nF
100
2.2
3.33 nF

50 3.3n
F
Tj=25˚C
3.32
4.7n
20 F
5.6n
F
3.31
10

3.3 5
0 1 2 3 IO(A) 0 20 40 60 80 R2(KΩ)

15/28
Typical characteristics L4973

Figure 21. Switching frequency vs. Figure 22. Switching frequency vs.
input voltage junction temperature
(see Figure 4)

fsw D97IN631 fsw D97IN632

(KHz) (KHz)

Tamb=25˚C

105 105

100 100

95 95

90 90
0 10 20 30 40 50 VCC(V) -50 0 50 100 Tj(˚C)

Figure 23. Dropout voltage between pin Figure 24. Efficiency vs. output voltage
7,8 and 2,3 (see Figure 6)

ΔV D97IN643 η D97IN641
(V) (%)

Tj=125˚C
98
100KHz
C
0.6 5˚
Tj
=2 96

94
200KHz
0.4 92
Tj=0˚C

90
0.2 IO = 3A
88 VCC = 50V

86
0
0 1 2 3 IO(A) 0 10 20 30 40 VO(V)

16/28
L4973 Typical characteristics

Figure 25. Dropout voltage between pin Figure 26. Efficiency vs. output voltage
7,8 and 2,3 (see Figure 4)

ΔV D97IN643 η D97IN641
(V) (%)

Tj=125˚C
98
100KHz
C
0.6 5˚
Tj
=2 96

94
200KHz
0.4 92
Tj=0˚C

90
0.2 IO = 3A
88 VCC = 50V

86
0
0 1 2 3 IO(A) 0 10 20 30 40 VO(V)

Figure 27. Efficiency vs. output voltage Figure 28. Efficiency vs. output current
(Diode STPS745D) (see Figure 7)

η D97IN642 η D97IN645
(%) (%)

98 VO = 5.1V
100KHz fsw = 100KHz
96 95
Vcc=12V

94 200KHz

90 Vcc=24V
92

90
Vcc=48V
IO = 3A
85
88 VCC = 35V

86
80
0 5 10 15 20 25 30 VO(V) 0 1 2 3 IO(A)

17/28
Typical characteristics L4973

Figure 29. Efficiency vs. output current Figure 30. Efficiency vs. output current
(see Figure 7) (see Figure 8)

η D97IN646 η D97IN644
(%) (%)

Vcc=12V VO = 3.3V
fsw = 100KHz
90 90
Vcc=24V Vcc=12V

85 85 Vcc=24V

Vcc=48V

80 80 Vcc=48V
VO = 5.1V
fsw = 200KHz

75 75
0 1 2 3 IO(A) 0 1 2 3 IO(A)

Figure 31. Efficiency vs. output current Figure 32. Power dissipation vs. input
(see Figure 8) voltage (device only)
(see Figure 7)

η D97IN662 Pdiss D97IN647A

(%) (W)
VO = 5.1V
fsw = 100KHz
VO = 3.3V
90 fsw = 200KHz
1.5
Vcc=12V
IO=3.5A

85
IO=3A
Vcc=24V
1.0
80
IO=2.5A
Vcc=48V

0.5 IO=2A
75

70 0
0 0.5 1 1.5 2 2.5 3 3.5 IO(A) 0 10 20 30 40 50 Vcc(V)

18/28
L4973 Typical characteristics

Figure 33. Power dissipation vs. output Figure 34. Pulse by pulse limiting
voltage (device only) current vs.
junction temperature

Pdiss D97IN648 Ilim D97IN652

(W) (A)

3.0 5.2
VCC = 35V IO=3.5A
fsw = 100KHz
2.5
5
2.0 IO=3A

4.8
1.5 IO=2.5A Vcc=35

4.6
1.0 IO=2A

0.5 IO=1A 4.4

0 4.2
0 5 10 15 20 25 30 VO(V) -40 -20 0 20 40 60 80 100 120 Tj(˚C)

Figure 35. Load transient Figure 36. Line transient

IO D97IN649 VCC D97IN650

(A) (V)
3 30

2 20

1 10
T
VO VO
2 1
(mV) (mV)
200μs/DIV
IO = 1A
100 fsw = 100KHz
100
T
1 0 2 0

VCC = 35V -100 -100

fsw = 100KHz 1ms/DIV

19/28
Typical characteristics L4973

Figure 37. Source current rise and fall Figure 38. Soft-start capacitor selection
time, pin 2, 3 (see Figure 4) vs. inductor and VCC max (ref.
AN938)

Lomax D97IN653
(μH)
Css=1μF
Css=820nF
300
fsw = 100KHz

250
Css=680nF

200

Css=470nF
150

100 Css=220nF

50 Css=100nF

0
25 30 35 40 45 50 Vi(V)

Figure 39. Soft-start capacitor selection Figure 40. Open loop frequency and
vs. inductor and VCC max (ref. phase of error amplifier
AN938)

Lomax D97IN654 GAIN D97IN663

(dB) Phase
(μH)
8nF

nF
56
s=6

s=

fsw = 200KHz 50
Cs
Cs

GAIN
150
0
nF

0
47
s=
Cs

100 -50 45
nF
33
s=
Cs
-100 90
50 F
22n Phase
s=
Cs -150 135

0 -200
15 20 25 30 35 40 45 50 Vi(V) 10 102 103 104 105 106 107 108 f(Hz)

20/28
L4973 Application ideas

8 Application ideas

Figure 41. 3.5 A at VO < 3.3 V (see part list Figure 4)

VP R5 R3
1 3.6K 4.7K
1.5 2K 2K R3
VCC INH SYNC VO=3.36-1.74•
2 4.7K 3.6K R5
2.5 7.5K 3.6K
R2 7,8 10 18 9
C8 3 5.1K 1K
1
17 L4973V3.3 L1 Vo
2,3
C1 C2 C7
4,5,6
11 16 13,14,15 12

R5 R3
D1 3x
C3 C5 R1 C0
C4
C6

D97IN666A

Figure 42. 12 V to 3.3 V high performance buck converter (fsw = 200 kHz)

INH SYNC

VCC R2
12V±5% 7,8 10 18 9 C8 η
22k
220nF (%)
1
C7 17 L4973V3.3 L1
92
1.2nF
2,3
C1 16 4,5,6 90
560uF-25V 11 13,14,15 12 Vo=3.33V
C2
HFQ Io=3.5A 88
220nF
Panasonic C3 C4 C5
33nF 1uF 220pF R1 D1
C9 86
9k1
470uF-25V
C6 HFQ 84
22nF Panasonic
82

L1 KoolMm 77120- 24 Turns- 0.9mm 80

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Io(A)
D1 STPS1025 D97IN668A

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Application ideas L4973

Figure 43. Synchronization example

VCC2 VCC1 VCC

7,8 7,8 7,8 7,8

18 18
1 18 18 1 1
L4973 L4973 L4973 L4973
4,5,6 4,5,6 4,5,6 4,5,6
13,14,15 13,14,15 13,14,15 1 13,14,15

D97IN669

Figure 44. Multi output not isolated (pin out referred to DIP12+3+3)

VCC INH SYNC

C8 D2 Vo2
R2 7,8 10 18 9
1
17 L4973 n2
C1 C2 C7 L1 Vo1
16 4,5,6 2,3
11 13,14,15 12 n1

C3 C4 C5
R1
D1 C9 C10 C11
C6

n1 + n2
VO2 = VO1
n1 D97IN667A

PO2 < 20% PO1

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L4973 Package mechanical data

9 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.

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Package mechanical data L4973

Table 8. DIP-18 mechanical data

mm. inch
Dim.
Min Typ Max Min Typ Max

a1 0.51 0.020
B 0.85 1.40 0.033 0.055
b 0.50 0.020
b1 0.38 0.50 0.015 0.020
D 24.80 0.976
E 8.80 0.346
e 2.54 0.100
e3 20.32 0.800
F 7.10 0.280
I 5.10 0.201

L 3.30 0.130
Z 2.54 0.100

Figure 45. Package dimensions

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L4973 Package mechanical data

Table 9. SO-20 mechanical data

mm. inch
Dim.
Min Typ Max Min Typ Max

A 2.35 2.65 0.093 0.104

A1 0.10 0.30 0.004 0.012
B 0.33 0.51 0.013 0.200
C 0.23 0.32 0.009 0.013
D (1) 12.60 13.00 0.496 0.512
E 7.40 7.60 0.291 0.299
e 1.27 0.050
H 10.0 10.65 0.394 0.419
h 0.25 0.75 0.010 0.030
L 0.40 1.27 0.016 0.050
k 0° (min.), 8° (max.)
ddd 0.10 0.004

Figure 46. Package dimensions

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Order code L4973

10 Order code

Table 10. Order code

Part number Package Packaging

L4973D3.3, E-L4973D3.3 SO-20 Tube

L4973D3.3-013TR, E-L4973D3.3-TR SO-20 Tape and reel
L4973D5.1 SO-20 Tube
L4973D5.1-013TR SO-20 Tape and reel
L4973V3.3, E-L4973V3.3 DIP-18 Tube
L4973V5.1, E-L4973V5.1 DIP-18 Tube

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L4973 Revision history

11 Revision history

Table 11. Document revision history

Date Revision Changes

12-Sep-2001 13 First Issue

Updated the Layout look & feel.
07-May-2005 14
Changed name of the D1 on the fig. 5.
14-Dec-2005 15 Added the ECOPACK part numbers in the Table 1. Order Codes.
06-Dec-2006 16 The document has been reformatted, and order codes updated
07-May-2007 17 New data on Table 4
26-Feb-2009 18 Updated Section 5: Evaluation board on page 9

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 L4973

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