University of Engineering &

Technology Lahore
(Faisalabad Campus)

SVPWM Control scheme,

Fly Back, Push Pull, Forward and Half
and Full Bridge DC-DC Converters
(Assignment No. 01)

Power Electronics Converters (EE 504)

Submitted By: Course Instructor:

Kantesh Kumar Dr. Hassan Irteza Geelani
2019 MSEE 204
 Space Vector Pulse Width Modulation (SVPWM)
Space vector PWM refers to a special switching scheme of the six power
semiconductor switches of a three phase power converter. Space vector PWM
(SVPWM) has become a popular PWM technique for three-phase voltage-source
inverters in applications such as control of induction and permanent magnet
synchronous motors. Instead of using a separate modulator for each of the three
phases, the complex reference voltage vectors processed as a whole. Therefore, the
interaction between the three motor phases is considered. It has been shown, that
SVPWM generates less harmonic distortion in both output voltage and current
applied to the phases of an ac motor and provides a more efficient use of the
supply voltage in comparison with sinusoidal modulation techniques. SVPWM
provides a constant switching frequency and therefore the switching frequency can
be adjusted easily. Although SVPWM is more complicated than sinusoidal PWM
and hysteresis band current control, it may be implemented easily with modern
DSP based control Systems

Principle of space vector pulse width modulation:

Eight possible combinations of on and off patterns may be achieved. The on and
off states of the lower switches are the inverted states of the upper ones. The phase
voltages corresponding to the eight combinations of switching patterns can be
calculated and then converted into the stator two phase (αβ) reference frames. This
transformation results in six non-zero voltage vectors and two zero vectors.

The non-zero vectors form the axes of a hexagon containing six sectors (V1 − V6).
The angle between any adjacent two non-zero vectors is 60 electrical degrees. The
zero vectors are at the origin and apply a zero voltage vector to the motor. The
envelope of the hexagon formed by the non-zero vectors is the locus of the
maximum output voltage. SVPWM consists of controlling the stator currents
represented by a vector. This control is based on projections which transform a
three phase time and speed dependent system into a two co-ordinate (d and q co-
ordinates) time invariant system.

These projections lead to a structure similar to that of a DC machine control. Field

orientated controlled machines need two constants as input references: the torque
component (aligned with the q co-ordinate) and the flux component (aligned with d
co-ordinate). From Fig. 3

Va = Vm sin (ωt)

Vb = Vm sin (ωt – 120)

Vc = Vm sin (ωt + 120)

Thus, Vs can be written as,

Vs = Va + Vb e j2П/3 + Vc e-j2П/3

Solving above equations,

Vs = 3/2 * Vm[ sinωt – j cosωt ]

Therefore magnitude of Vs = 3/2 *Vm and it rotates in space by (ω rad/sec )

Where ω = frequency of three sine waves Va, Vb, Vc.
Thus Vs = Vx + Vy----from above diagram In matrix form,
Modulation index, time period and calculations of vectors

Considering Fig. 5 and Fig. 6, we get 8 combinations of switching instances as 2

switches of 3 legs of inverter will give 23=8. Among this 6 are active vectors and
two are zero vectors as the combination of [1 1 1] and [0 0 0] will give zero
vectors. e.g: ( 0 0 1 )

Vao = Vdc / 2

Vbo = - Vdc / 2

Substituting in above matrix,

Van = 2/3 Vdc

&Vbn = Vcn = - 1/3 Vdc

Therefore, Vx= Van --- from eq. 1

Thus, Vx =3/2 × 2/3 Vdc = Vdc

& Vy = √3/2 *[ Van – Vcn ] --- from eq. 2

Therefore Vy = 0

Thus Vs = Vdc ∕ 0

Similarly for , c b a ( 1 1 0 ) which is complimentary of ( 0 0 1 ),

Vs = Vdc⎳180

now for,

( 0 1 1 ) ⇒ Vs = Vdc ⎳60

Thus for (1 0 0 ) ⇒ Vs = Vdc ⎳240

Now for,

( 0 1 0 ) ⇒ Vs = Vdc ⎳120
Thus for (1 0 1) ⇒ Vs = Vdc ⎳300

Thus we get a simple relationship between phase & pole voltages.

If Van, Vbn, Vcn are sinusoidal, then

Vs = M ejⱳt

Where M ⇒ modulation index, 0<M<1

ω ⇒ output frequency

Vs ⇒ locus of circle

Vs moves in discrete steps of 60

Where, ∅ ⇒ position of Vs in x-y plain.

There should be a volt-sec balance which depends on magnitude of Vs.

VsTc = V1 T1 + V2 T2 + VzTz

( The value of VzTz is always zero )

Where, Tc = Ts/2⇒ sampling time

If Tz = Tc – T1 –T2

This condition is satisfied then it does not matter how long we use ( 0 0 0 ) &
(111)

Maximum value of space vector i.e Vsmax = radius of circumscribing circle.

= Vdc cos (30)

= √3/2 *Vdc …….9

Now consider a ratio of fundamental component of SVPWM to square wave..

Let, mf = ……10

Where, V1 sp = peak of fundamental of phase voltage of SVPWM

V1 s = peak of fundamental of phase voltage obtained by square wave.

Now Van, Vbn, Vcn in terms of Vx & Vy are given as,

Van = 2/3 * Vx ------------------------ from eq. 1

Vbn = 1/3 *Vx + 1/√3Vy ------------ from eq. 2

Vcn = - 1/3 *Vx + 1/√3Vy ---------- from eq. 2

Now, Considering ( 0 0 1 )

Van peak = 2/3 *Vsmax

Therefore, Van peak = 2/3× √3/2 *Vdc --------- from eq. 9

Van peak = Vbn peak = Vcn peak = Vdc/√3 = 0.577 Vdc

Therefore

thus, 90.7% of fundamental component of square wave is available in SVPWM as

compared to 78.5% of sine PWM. Sampling time Ts should be as small as
possible.

The time period can be shown graphically in Fig. 8.

 MATLAB SIMULATION OF SVPWM
Three-Phase SV-PWM based Voltage Source Converter

A two level 3-Phase IGBT Converter with SVPM control scheme as shown in fig
below has been used for simulation purpose.

VLL_Converter = m*Vdc/ Sqrt (2)

VLL_Converter = m*Vdc *0.7071

VLL_Converter = 0.9*1000 *0.7071= 636.4 V

Output Voltage pattern of Voltage Source Converter Vab_Vsc

Output Voltage across load Vab_load

Fly back Converter

The circuit topology for the fly back converter is shown in Fig.

below. This converter is one of the most common isolated switch-
mode converters.

The transformer shown in this topology serves as a step-

up/step-down to the input voltage, reverses output voltage
polarity, provides electrical isolation, and provides energy storage
during the operation. Since all the energy obtained from the source
is first stored in the transformer and then passed on to the load,
this converter is also known as an energy storage converter.
Commercial fly back converters are normally designed with
several multi-coil output transformers. During the turn-on period,
energy is stored in the magnetic inductor and transferred to the
output side during the turn-off period. In order for the diode to
conduct only during the off period in which energy is transferred
to the output, the polarities of the transformer windings are
reversed, as shown in the figure. One popular application for the
fly back converter is in television screens, in which high output
voltage is required. This can be obtained by using a high
transformer turn ratio, n2/n1. Unlike the forward converter, the fly
back converter does not need an output inductor; it uses only one
diode and does not suffer from a core saturation problem. When
operated in dcm, it uses a relatively small, magnetizing
inductance. To understand the role of the magnetizing inductance,
we replace the transformer by a simple model that includes the
magnetizing inductor, as shown in Fig. b.

Derivation of the Fly back Convertor

Recall that the buck-boost converter was attractive since its

output voltage can be smaller and larger than the input voltage.
However, the negative output voltage typically limits the
applications of the buck-boost converter. Fortunately, output
voltage polarity reversed is possible by using a transformer that
also serves as isolation if the application calls for it. To illustrate
the steps of reversing the output voltage of Fig. 4.21 of the buck-
boost converter of Chap. 4, we redraw it again in Fig. 5.26a for
convenience. Now imagine that with your both hands you hold the
portion of the circuit at points “a” and “b” and then pull the circuit
at point “a” toward you and the circuit at the point “b” away from
you, in the process rotating the right side portion of the counter
108 as shown in Fig. 5.26b. Figure 5.26a shows the rearrangement
of the circuit of Fig. 5.26b by placing the output diode in the top
branch of the circuit. Notice when the switch is ON in Fig. 5.26c,
the diode D is off, and the voltage across the inductance is + Vin,
causing the inductance current to increase with slope + Vin/L,
with the voltage at the terminal Vab = VL = Vin <0. It is clear that
for the diode to be off in the circuit of Fig. 5.26c, the voltage
between terminals “b” and “a” must be the inverse polarity of the
voltage between terminals “a” and “b,” Vba = VL. Now when the
switch is turned off, the diode must turn ON, changing voltage
Vba = Vo. Again, the only way for the inductance to demagnetize
during the switch off interval is to have Vba = VL = Vo. Once
again the voltage across terminals “b” and “a” is the reverse of the
voltage across the terminals “a” and “b,” i.e., VL. So, in order for
terminals “b” and “a” become the negative polarities of terminals
“a” and “b,” one can show that one way to accomplish this is to
have transformer with its primary and secondary windings done
such a way to produce 180 phase shift between them. This means
the primary current and secondary current both flow toward the
dots of the reverse polarity transformer as shown in Fig. 5.26d of
the physical implementation of the primary and secondary
windings. Typical waveforms for the flyback converter of Fig.
5.25b operating in the continuous conduction mode are shown in
Fig. 5.27. When the transistor is turned on, the primary voltage vD
becomes equal to the source voltage Vin, and the diode D is
turned off by the negative polarity of (n2/n1)Vin +Vo. The
magnetizing inductance, Lm, starts charging linearly with slope
Vin/Lm.
Note that this mode of operation is like the boost converter, in
which the inductor L stores energy during the on time. When S is
turned off, the diode is forced to carry the magnetizing inductor
current through the secondary winding. The drawback of this
topology is the transformer’s primary-side leakage inductance,
whose energy must be dissipated when the transistor is turned off.
For this reason, in order to reduce the stress on the switching
transistor, a snubber circuit is normally added.
 The analysis of this circuit consists of two modes of
operation as follows:

Mode 1:[ S is turned ON at t¼0 and D is OFF].

The on-state equivalent circuit model is shown in Fig.

5.28a. The voltage across Lm is Vin, yielding, the following
equation for im(t):

where Im(0) is the initial value of the magnetizing current

when the transistor is turned ON. From this equation, we notice
that the inductor current, im, will linearly charge to t = DT when
the transistor is turned OFF to enter Mode 2.
 Mode 2: S is turned OFF and D is ON

This mode of operation starts at t = DT when the transistor

is turned OFF. To maintain the continuity of im, the diode D turns
ON. The equivalent circuit model is shown in Fig. 5.28b. The
voltage across the magnetizing inductance is nVo, where n is n1/n2.
In terms of im, we have:

Integrating this equation from DT to t, we obtain:

Where Im(DT) is the magnetizing current value at t = DT, when the diode D
starts conducting. Evaluating Eq. (5.15) at t=DT and at t=T, respectively, and using
im(T) = im(0), we obtain the following relation:

Equating Eqs. (5.24a) and (5.24b), we obtain the following conversion ratio:

This gain equation is similar to the buck-boost converter gain when n = 1.

All relevant current and voltage waveforms are shown in Fig. 5.27. The average
output current is the same as the average diode current which is given by the
following relation:
 and the average input current is given by:

Hence, the current conversion ratio is given by:

This equation can also be obtained by equating the average input and output
powers by replacing Io = Vo/R, thus we obtain the following relation:

From the above relation, we obtain the minimum and maximum current
values of im as follows:

When setting Im(0)=0, we obtain the critical value of the magnetizing

inductance for the continuous conduction mode of operation:

If the inductor current is allowed to reach zero, i.e., Lm < Lcrit, then the
converter will operate in dcm, and the core becomes fully demagnetized in each
cycle.
 Example

For the flyback converter of Fig. 5.28, consider the case when the convertor
is required to deliver 500 W a + 48 output voltage bus from a dc input voltage bus
of 400 V while operating at switching frequency of 250 kHz. It is desired to
operate the converter between 40% and 60% duty ratio and its magnetizing
inductor ripple not to exceed 10% of its average value. Design for transfer ratio
and its magnetizing inductor value.

Solution: For D = 0.4, Vo = 48 V, and Vin = 400 V, from Eq. (5.17), the
transfer ratio is given by:
 Push-Pull Converter

The circuit configuration for the push-pull converter is shown in Fig. 5.21a.
The circuit uses two active switches. It uses the transformer for voltage scaling and
electrical isolation, and the output inductor is used for energy storage. Hence,
unlike the design of the transformer for the single-ended converter, where care
must be taken in selecting the core material and geometry to design for proper
magnetizing inductance, in the push-pull converter, the transformer is used as an
ideal element. Since S1 and S2 share the current, the push-pull converter is used
for higher-power applications compared to the single-ended converters.

Figure 5.21b illustrates the switching waveforms for S1 and S2 with a dead
time during which both switches are open. During this dead time, the load current
is carried by the two output diodes, D1 and D2. The maximum duty cycle for both
switches is 0.5. As can be noticed, the switching frequency of the converter is
twice the switching frequency of each switch acting alone. The converter’s basic
operation is straightforward and similar to the analysis of the half-bridge converter.
When S1 is on, the possible primary voltage causes D1 to conduct and D2 to turn
off, resulting in the equivalent circuit shown in Fig. 5.22a. The converter voltages
are given by:

This circuit is equivalent to a buck converter with a dc input of (n2/n1)Vin.

All voltage and current waveforms are similar to the buck converter. Similarly,
when S1 is OFF and S2 is ON, the equivalent circuit is shown in Fig. 5.21b. The
voltages are given by:
 The voltage across the inductor is given by:

Notice that for both modes, whether S1 or S2 is ON, the circuit is similar to
the buck converter when the main switch is ON. Finally, consider the case when
both S1 and S2 are OFF. The equivalent circuit is shown in Fig. 5.22c. The
voltagesvS1 and vs2 are both zero, and the inductor voltage is -Vo. Hence, the
inductor current starts discharging with a slope of -Vo/L. This mode is similar to
the buck converter when the main switch is off. Therefore, the voltage gain of the
push-pull converter is given by

where D is the duty cycle for either switch, which range between 0 and 0.5.
We observe that because of the presence of the transformer, each of S1 and S2
should be able to withstand a reverse voltage of at least 2Vin. Also, a peak reverse
diode voltage for each of D1 and D2 is 2(n2/n1)Vin. One disadvantage of the push-
pull converter is the existing of the imbalance of the voltages applied across the
transformer primaries, resulting in an unequal switch current. This in turn results in
a nonzero magnetizing inductance current at the end of each switching cycle. This
eventually will lead to a transformer saturation problem. This problem is caused by
a mismatch in the transistor characteristics, such as switching times and voltage
drops. To avoid this problem, push-pull converters are designed with not only a
voltage control loop (duty cycle control) but also using a current loop (current
programmed control) that prevents the transformer from saturation.
Key waveforms for the push-pull converter are shown in Fig. 5.23a with no
magnetizing inductor being included.
Example

A push-pull arrangement shown in Fig. 5.24a.

 The input inductor, L, is very large so that the input current, Iin, is assumed
constant. These types of converters are useful in high output voltage applications.
Since Iin is continuous, there should exist an overlap in the conduction time of S1
and S2 as shown in the switching wave forms Fig. 5.21b, where δ is the
overlapping conduction time. Derive the voltage gain expression for the converter
and compare it with the push-pull converter shown earlier. Figure 5.24c shows the
waveforms for the primary voltage and input current.

Solution:

Let us assume Mode 1 begins at t = 0 when both S1 and S2 are ON,

resulting in the transformer primary voltage equaling to zero since D1 and D2 are
OFF. The voltage across L equals to the input voltage:

While iin is given by:

Iin(0) is the initial inductor current value in L. At t = t1, S2 is turned off,

forcing D2 to conduct. The voltage across the inductor is given by:
 The inductor current discharges at a rate of (Vin-(n1/n2)Vo)/L. At t = t2, S2
turns ON again, resulting in a vp = 0 as shown under Mode 3 in Fig. 5.22a. The
next two modes are similar to the first two modes except when S2 is ON, D1
conducts. The gain equation is obtained by applying the volt-second balance to L
as follows:

If we let DT represent the ON, (1-D)T is the OFF time of S1, then we have:
 Forward Converter

In this section we will analyze Fig. 5.8, which shows the simplest isolated
dc-dc converter utilizing one switch and two diodes.

This circuit is commonly referred to as a forward converter. It can be shown

that the design of Fig. 5.8 will not work properly since its magnetizing current will
not be allowed to reset to zero, causing the magnetizing current to continuously
increase linearly until it finally saturates the core. A more practical forward
converter must include a transformer core resetting circuit as shown in Fig. 5.10a.

The additional winding nr is known as tertiary winding. Figure 5.10b and c

shows two alternative ways to draw Fig. 5.10a.
 • To allow for a zero average voltage across the transformer primary
winding, the maximum duty cycle is 50%. However, if the winding ratio nr/n1 <1,
then it is possible to have a duty cycle that exceeds 50%. This will result in a
voltage stress across the switch that exceeds 2Vin.

For illustration purposes, we will analyze the converters of Figs. 5.8 and
5.10a. • If an ideal transformer is assumed in Fig. 5.8, then the steady state is quite
simple. Assume the switch is turned on for the period DT and off for the period
(1-D)T, resulting in the two modes of operation shown in Fig. 5.11a and b,
respectively.
 When the switch is turned on initially at t = 0, the initial inductor current is
IL(0),and vL is given by:

The inductor current is given by:

At t = DT, the switch turns OFF forcing D1 to reverse bias and D2 to

become forward biased, resulting in the inductor current given by:
 where IL(DT) is the inductor current at t = DT when the switch is turned
OFF. From the above equations, we obtain the following voltage gain relation:

Sketch of the waveforms for v1, v2, vL, iL, iD1, and iD2 is shown in Fig. 5.12.
For a proper operation that will allow the inductor current to reach steady state, the
relation (n2/n1)Vin >V0 must hold, which provides a step-down operation. The
capacitor voltage ripple is similar to the non-isolated buck converter. Next we
carry out the analysis by assuming the transformer has a finite magnetizing
inductance, Lm, as shown in the equivalent circuit given in Fig. 5.13.

With careful investigation of the above circuit, it is clear that the magnetizing
current im(t) has no place to discharge its value when the switch is OFF. This will
cause the converter to fail. As a result, a core resetting mechanism mentioned
above must be used. Figure 5.14 shows the equivalent circuit for the forward
converter by including the core resetting circuit given in Fig. 5.10b
The operation of this converter can be easily explained by assuming that before the
switch is turned ON again in a new cycle, the magnetizing current im, has reached
zero, i.e., the transformer core is being reset. The energy is delivered to the load
during the period the switch is ON, and the core resetting takes place during the
OFF time. It will be shown that D < 50% for nr > n1 to allow time for the magnetic
core flux to reset during the OFF switch time. In steady state, this converter has
three modes of operation discussed as follows: The first mode starts when S is
turned ON at t = 0, casing the voltage across the primary equals to Vin. This will
force D1 to turn ON and D2 to reverse bias. Since the reset winding has the
opposite polarity of the primary, the diode Dr becomes reverse biased as shown in
Fig. 5.15a.

From Fig. 5.15a, the following voltage equations are obtained:

 The current equations are given by:

From Eqs. (5.2a) and (5.2b), the following relations are obtained:

where IL(0) is the initial output inductor current and Im(0) = 0 since the core
has been reset prior to turning ON the switch. Since Lm >> L, the slope of the
magnetizing current is much smaller than the slope of iL as shown in Fig. 5.13. At
t= DT, the switch is turned OFF, and the circuit enters Mode 2 as shown in Fig.
5.15b.
 At the instance S opens, the transformer primary current, ip, becomes zero,
turning OFF D1 and forcing iL to go through D2. At this point, im now is forced to
flow in the n1 winding, which forces Dr to turn ON to carry the reflected current
through nr. The voltage equations in this mode are given by:

The waveforms are shown in Fig. 5.16. It is shown that at t = D1T, the
magnetizing inductor current becomes zero, since it represents the smaller portion
of ip. The magnetizing and inductor currents in this time interval are given by:

where Im(DT)¼(Vin/Lm)DT. Setting Eq. (5.7) to zero at t¼D1, we obtain:

 The voltage and current equations are given by: vL= -Vo, vr = v1 = v2 = 0,
vDr =Vin, vsw = Vin. Im = ir = ip = iL = 0, and iL(t)s is the same as that given in Eq.
(5.8). For the core to be fully demagnetized, im must reach zero; therefore, D1 must
not be greater than 1. Hence:

D1 < 1
 Hence, from Eq. (5.9), we restrict D by the following relation:

The maximum duty cycle of 50% occurs when nr = n1.

Example

Consider the forward converter of Fig. 5.14 with an input voltage of 50 V,

an output voltage of 35 V, and n1/n2¼1 and n1/nr¼0.25. With a frequency of 35
kHz, an inductance of 180 μH, and a minimum inductor current of 1.1 A, calculate
the duty cycle and the maximum inductor current in this converter.

Solution

The duty cycle is given in the following equation:

Calculating for the maximum inductor current:

 Half-Bridge Converters

Another way to avoid the transformer saturation problem is to use half- and
full-bridge converter topologies to generate symmetrical ac waveforms at the
primary side of the transformer. In this way the core flux is excited bi-directionally,
resulting in a better utilization of the core, which in turn results in an increased
power rating.

Figure 5.17a shows the circuit topologies for the half-bridge converter with
the center-tap output rectifier configuration.

The filtering capacitors are relatively large and used as voltage dividers,
resulting in a Vin/2 applied voltage across each primary winding. As stated before,
in the half-bridge converter, S1 and S2 are switched on and off in complementary
fashion but with equal conduction periods. Since the input voltage is not allowed to
be shorten, S1 and S2 are normally designed such that there exists a dead time
during which both switches are off. This results in a duty ratio less than 50%. Key
current and voltage waveforms are shown in Fig. 5.17b.

The voltage gain for the half-bridge converter is the same as the gain for the
push-pull converter, to be discussed in a later section. The filtering capacitors C1
and C2 are used to divide the input voltage, so each has Vin/2.
 Unlike the push pull converter, the maximum blocking voltage for each
switch of the half-bridge converter is Vin, rather than 2Vin.

• Finally, the switches S1 and S2 are implemented using bidirectional

semiconductor devices (i.e., MOSFETs with antiparallel diodes) to provide
conduction paths for the inductor leakage currents that exist due to the non-ideal
transformers.
 Full-Bridge Converter

Figure 5.18a shows the buck-derived, full-bridge converter with a full-wave

center tap output transformer.

The switch pairs S1/S3 and S2/S4 are switched complementary at a given
duty ratio. It can be shown that the output can be also regulated by controlling the
phase shift between the switches. Figure 5.18b shows the typical driving signals
for S2/S4 under the PWM control method, with the correspondingly waveforms for
vp(t), va, and iL(t).

It can be easily shown that during the periods when either pair S2/S4 or
S1/S3 is on, only one output diode of D1 or D2 will be on. Whereas, when all
switches are off, both output diodes are on, resulting in va = 0, with each diode
currying 0.5 iL(t). It is straight forward to show that the voltage gain for the full-
bridge convertor of Fig. 5.18a is given by:
 The current and voltage waveforms for the full-bridge converter of Fig.
5.18a are shown in Fig. 5.19.
 Finally, we must note that the push-pull, half-, and full-bridge converters can
use the full-bridge rectifier at the output side. Unlike the half-bridge converter, the
full bridge converter is used in high input voltage applications, since the power
switching devices are required to block only Vin.

Example

Design the full-bridge dc-dc converter with the center-tap output transformer
as shown in Fig. 5.18a with the following specifications: Vin = 480 V, Vo = 600 V
at Io = 10 A, fs = 50 kHz.

Solution:

R = Vo/Io = 600/10 = 60 Ω. If choosing n2 = 2n1, then:

since Lcrit for the buck converter is expressed as:

we have Lcrit = 112.5 μH. Choose L>10 Lcrit = 1.125 mH. If output ripple is
less than 1%, according to:

C can be determined as C = 0.42 μF. We can choose C = 10 μF.