Department of Electronics & Telecommunication Engineering

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Subject:-Microcontroller Unit:-1

1)8051 series of microcontrollers are made by which of the following companies?

a) Atmel
b) Philips
c) Atmel & Philips
d) None of the mentioned

Answer: d
Explanation: Atmel series AT89C2051 and Philips family P89C51RD2 are the two most common
microcontrollers of 8051 families.

2. AT89C2051 has RAM of:

a) 128 bytes
b) 256 bytes
c) 64 bytes
d) 512 bytes
Answer: a
Explanation: It has 128 bytes of RAM in it.

3. 8051 series has how many 16 bit registers?

a) 2
b) 3
c) 1
d) 0
Answer:a
Explanation: Program counter ,DPTR

4. When 8051 wakes up then 0x00 is loaded to which register?

a) DPTR
b) SP
c) PC
d) PSW
Answer: c
Explanation: When a program wakes up, then 0x00 is loaded to the program counter register because at
this place the first op code is burnt.
5. When the microcontroller executes some arithmetic operations, then the flag bits of which register are
affected?
a) PSW
b) SP
c) DPTR
d) PC
Answer:a

6. How are the status of the carry, auxiliary carry and parity flag affected if the write instruction
MOV A,#9C
ADD A,#64H
a) CY=0,AC=0,P=0
b) CY=1,AC=1,P=0
c) CY=0,AC=1,P=0
d) CY=1,AC=1,P=1
Answer: b
Explanation: On adding 9C and 64, a carry is generated from D3 and from the D7 bit so CY and AC are
set to 1. In the result, the number of 1’s present are even so parity flag is set to zero.

7. How are the bits of the register PSW affected if we select Bank2 of 8051?
a) PSW.5=0 and PSW.4=1
b) PSW.2=0 and PSW.3=1
c) PSW.3=1 and PSW.4=1
d) PSW.3=0 and PSW.4=1
Answer: d
Explanation: Bits of PSW register are CY, AC, F0, RS1, RS0, OV, -, P so for selecting bank2 RS1=1 and
RS0=0 which are fourth and third bit of the register respectively.

8. If we push data onto the stack then the stack pointer

a) increases with every push
b) decreases with every push
c) increases & decreases with every push
d) none of the mentioned
Answer:a

9. On power up, the 8051 uses which RAM locations for register R0- R7
a) 00-2F
b) 00-07
c) 00-7F
d) 00-0F
Answer:b

10. How many bytes of bit addressable memory is present in 8051 based microcontrollers?
a) 8 bytes
b) 32 bytes
c) 16 bytes
d) 128 bytes
Answer: c
Explanation: 8051 microcontrollers have 16 bytes of bit addressable memory.

11.The timer generates an interrupt, if the count value reaches to

a) 00FFH
b) FF00H
c) 0FFFH
d) FFFFH

Answer:d
Explanation: The timer is an up-counter and generates an interrupt when the count has reached FFFFH.

Practice Test - Chapter 1Practice Test - Chapter 2Practice Test - Chapter 3Practice Test - Chapter 4Practice Test – C
12)The external interrupt that has the lowest priority among the following is
a) TF0
b) TF1
c) IE1
d) NONEhapter 5Practice Test - Chapter 6Practice Test - Chapter 7Practice Test - Chapter 8Practice Test - Chapter
9Practice Test - Chapter 10Mock Test - Chapter 1Mock Test - Chapter 2Mock Test - Chapter 3Mock Test - Chapter
Answer: c
Explanation: The order of given interrupts from high to low priority is TF0, IE1 and TF1. ock Test - Chapter

 13)Among the five interrupts generated by 8051, the lowest priority is given to the interrupt
a) IE0
b) TF1
c) TF0
d) RI
Answer:d
Explanation: The interrupt, RI=TI (serial port) is given the lowest priority among all the interrupts.

 14)Among the five interrupts generated by 8051, the highest priority is given to the interrupt
a) IE0
b) TF1
c) TF0
d) IE1

Answer: a
Explanation: The interrupt, IE0(External INT0) is given the highest priority among all the interrupts.

 15)All the interrupts are enabled using a special function register called
a) interrupt priority register
b) interrupt register
c) interrupt function register
d) interrupt enable register

Answer: d

 16)The number of bytes stored on the stack during one operation of PUSH or POP is
a) 1
b) 2
c) 3
d) 4

Answer: a
Explanation: As 8051 stack operations are 8-bit wide i.e. in an operation using PUSH or POP instruction,
one byte of data is stored on a stack or retrieved from the stack. For implementing 16-bit operations, two
8-bit operations are cascaded.

17)The step involved in PUSH operation is

a) increment stack by 2 and store 8-bit content to address pointed to by SP
b) decrement stack by 1 and store 16-bit content to address pointed to by SP
c) increment stack by 1 and store 8-bit content to address pointed to by SP
d) store 8-bit content to address pointed to by SP and then increment stack by 1

Answer: c
Explanation: The PUSH instruction follows two steps.
1. Increment stack by 1
2. Store 8-bit content of the 8-bit address specified in the instruction to the address pointed to by SP.

6Mock Test - Chapter 7Mock Test - Chapter 8 Mock Test - Chapter 9

 18)After reset, the stack pointer(SP) is initialized to the address of
a) internal ROM
b) internal RAM
c) external ROM
d) external RAM

Answer: b
Explanation: The stack pointer(SP) is an 8-bit register and is initialized to internal RAM address 07H after
reset.

 19)8051 stack is
a) auto-decrement during PUSH operations
b) auto-increment during POP operations
c) auto-decrement during POP operations
d) auto-increment during PUSH operations

Answer: d
Explanation: The 8051 stack is opposite to that in 8085 or 8086 i.e. in 8085 it is auto-decrement while in
8051 it is auto-increment during PUSH operations.

20). Which of the following is not an addressing mode of 8051?

a) register instructions
b) register specific instructions
c) indexed addressing
d) none

21)The symbol, ‘addr 16’ represents the 16-bit address which is used by the instructions to specify the
a) destination address of CALL
b) source address of JUMP
c) destination address of call or jump
d) source address of call or jump

Answer: c
Explanation: The symbol, ‘addr 16’ represents the 16-bit destination address which is used by the LCALL
or LJMP instruction to specify the call or jump destination address, within 64 Kbytes program memory.

22) The storage of addresses that can be directly accessed is

a) external data RAM
b) internal data ROM
c) internal data RAM and SFRS
d) external data ROM and SFRS

Answer: c
Explanation: Only internal data RAM and SFRS can be directly addressed in direct addressing mode.

23) The address register for storing the 16-bit addresses can only be
a) stack pointer
b) data pointer
c) instruction register
d) accumulator

Answer: b
Explanation: The address register for storing the 16-bit addresses can only be data pointer

24)The address register for storing the 8-bit addresses can be

a) R0 of the selected bank of register
b) R1 of the selected bank of register
c) Stack pointer
d) All of the mentioned
Answer: d

25 The instruction, ADD A, R7 is an example of

a) register instructions
b) register specific instructions
c) indexed addressing
d) none
Answer: a
26 The addressing mode, in which the instructions has no source and destination operands is
a) register instructions
b) register specific instructions
c) direct addressing
d) indirect addressing
Answer: b
Explanation: In register specific instructions addressing mode, the instructions don’t have source and
destination operands. Some of the instructions always operate only on a specific register.

27. The instruction, RLA performs

a) rotation of address register to left
b) rotation of accumulator to left
c) rotation of address register to right
d) rotation of accumulator to right
Answer: b
Explanation: The instruction, RLA rotates accumulator left.

28. The instruction, ADD A, #100 performs

a) 100(decimal) is added to contents of address register
b) 100(decimal) is subtracted from the accumulator
c) 100(decimal) is added to contents of an accumulator
d) none
Answer: c
Explanation: Immediate data 100(decimal) is added to the contents of the accumulator.
29. In which of these addressing modes, a constant is specified in the instruction, after the opcode byte?
a) register instructions
b) register specific instructions
c) direct addressing
d) immediate mode
Answer: d
Explanation: In immediate mode, an immediate data, i.e. a constant is specified in the instruction, after
the opcode byte.

30. The only memory which can be accessed using indexed addressing mode is
a) RAM
b) ROM
c) Main memory
d) Program memory
Answer: d
Explanation: Only program memory can be accessed using the indexed addressing mode
31. The data address of look-up table is found by adding the contents of
a) accumulator with that of program counter
b) accumulator with that of program counter or data pointer
c) data register with that of program counter or accumulator
d) data register with that of program counter or data pointer

Answer: b
Explanation: The look-up table data address is found out by adding the contents of register accumulator
with that of the program counter or data pointer.