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Computer Architecture

The document discusses the Von Neumann model of computer architecture and its key components: 1) The fetch-execute cycle which involves fetching instructions from memory and executing them one by one. 2) The Von Neumann model consists of a CPU, memory, input/output devices, and a bus connecting them. The CPU contains an arithmetic logic unit and a control unit that manages the fetch-execute cycle. 3) The fetch-execute cycle involves fetching an instruction from memory into the instruction register, decoding and executing it using the ALU, and updating memory and registers. This cycle repeats continuously.

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0% found this document useful (0 votes)
85 views

Computer Architecture

The document discusses the Von Neumann model of computer architecture and its key components: 1) The fetch-execute cycle which involves fetching instructions from memory and executing them one by one. 2) The Von Neumann model consists of a CPU, memory, input/output devices, and a bus connecting them. The CPU contains an arithmetic logic unit and a control unit that manages the fetch-execute cycle. 3) The fetch-execute cycle involves fetching an instruction from memory into the instruction register, decoding and executing it using the ALU, and updating memory and registers. This cycle repeats continuously.

Uploaded by

kakkabura
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Computer Architecture (Fetch and Execute Cycle and Von Nueman Model)

Ref:1.3.2 Computer architecture and the fetch-execute cycle


• Show understanding of the basic Von Neumann model for a computer system and the
stored
program concept (program instructions and data are stored in main memory and
instructions are
fetched and executed one after another)
describe the stages of the fetch-execute cycle

Courtesy to http://web.eecs.utk.edu/research/cs100modules/module1/index.html

Teach-Ict.com

Von Neumann Architecture


The idea about how computers should be built was proposed by John von Neumann in
1945. This idea is called the von Neumann Architecture or Model. This is still the
basis for computers today. Using these four components, a von Neumann computer will
execute a series of instructions, called a program, which are stored in the computer's
memory. This is called the “Stored program concept”.

The components of von Neumann Architecture is:


1. Input/Output (I/O)
2. Memory
3. A Control Unit
4. An Arithmetic Logic Unit (ALU

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Input/Output (I/O) Devices


The Input/Output (I/O) components of a computer are hardware devices that are
responsible for getting data from the computer to the user or from the user to the computer.
Data going from the user to the computer is called "input." The two main input devices are the
mouse and the keyboard.
Output devices are used to transmit data from the computer's memory to the user. The two
output devices almost every computer system has are the monitor and the printer.

Memory Unit
Computer has several types of memory. Memory unit in the
Von Neumann model is the main memory, also called RAM or
Random Access Memory.
Main memory is used by the computer for storing a program
and its data while the program is running. What distinguishes a
computer from a calculator is the ability to run a stored
program; main memory allows the computer to do that.
RAM can be thought of as a sequence of boxes, called cells,
each of which can hold a certain amount of data

The remaining three components of the von Neumann model

of a computer are found inside the Processor.

Control Unit
The control unit controls the sequencing and timing of all operations. It contains a
"clock," that is actually a quartz crystal that vibrates million times per second. The clock
emits an electronic signal for each vibration. Each separate operation is synchronized to
the clock signal. For example 1 st pc operates at 4.7 MHz means 4.7 million instructions
per second.
The functions of CU are given below:
Interprets and carries out instruction of program.
Selects program statements from memory.
Moves these instructions to instruction registers
Carries out instructions
Directs flow of data between components of CPU and to and from other
devices.

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Arithmetic & Logic Unit (ALU)


Arithmetic unit perform arithmetical operations like
+, -, *, and / while logical unit are to compare two
quantities. Logical operations are important in
computer programming.
ALU can be thought of as being similar to a
calculator, except that, in addition to normal math,
it can also do logical (true/false) operations.
The functions of ALU are given below:
The arithmetic unit carries out arithmetic like
addition, division.
The logic unit enables the processor to make
comparison like =, <, > and logical decisions
like AND, OR, NOT.
The arithmetic logic unit carries out
communication with peripheral devices.
It also carries out bit shifting operatioces.

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Registers:
Registers are Immediate Access Store (IAS) located on the CPU, and used temporarily
for storing data. Because the registers are close to the ALU, they are made out of fast
memory, efficiently speeding up calculations.
There are 14 registers. Some examples are
a) MAR (Memory Address Register) holds the memory addresses of data and
instructions. b) Program Counter keeps track of the next memory address of the
instruction that is
to be executed once the execution of the current instruction is completed.

Program Counter (PC)


This register is used to hold the memory address of the next instruction that has to executed in a
program. This is to ensure the CPU knows at all times where it has reached, that is able to
resume following an execution at the correct point, and that the program is executed correctly.

Instruction Register (IR)


This is used to hold the current instruction in the processor while it is being decoded and
executed, in order for the speed of the whole execution process to be reduced. This is because the
time needed to access the instruction register is much less than continual checking of the
memory location itself.

Memory Address Register (MAR)


Used for storage of memory addresses, usually the addresses involved in the instructions held in
the instruction register. The control unit then checks this register when needing to know which
memory address to check or obtain data from.

Memory Buffer Register (MBR)


When an instruction or data is obtained from the memory or elsewhere, it is first placed in the
memory buffer register. The next action to take is then determined and carried out, and the data
is moved on to the desired location.

Flag register / status flags


The flag register is specially designed to contain all the appropriate 1-bit status flags, which are
changed as a result of operations involving the arithmetic and logic unit. Further information can
be found in the section on the ALU.

SP is the stack pointer, indicating the current position of the top of the stack. You
should generally never modify this directly, since the subroutine and interrupt call-
and-return mechanisms depend on the contents of the stack.

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Other general purpose registers


These registers have no specific purpose, but are generally used for the quick storage of pieces of
data that are required later in the program execution. In the model used here these are assigned
the names A and B, with suffixes of L and U indicating the lower and upper sections of the
register respectively.

General purpose registers

The accumulator is used to hold the result of operations performed by the arithmetic and logic
unit, as covered in the section on the ALU.

It is an 8-bit register that is part of ALU. This register is used to store 8-bit data & in performing arithmetic & logic operation.
The result of operation is stored in accumulator.

DIAGRAM

BX is the "base'' register; it is the only general-purpose register which may be used
for indirect addressing. For example, the instruction MOV [BX], AX causes the contents
of AX to be stored in the memory location whose address is given in BX.

CX is the "count'' register. The looping instructions (LOOP, LOOPE, and LOOPNE), the
shift and rotate instructions (RCL, RCR, ROL, ROR, SHL, SHR, and SAR), and the string
instructions (with the prefixes REP, REPE, and REPNE) all use the count register to
determine how many times they will repeat.

DX is the "data'' register; it is used together with AX for the word-


size MUL and DIV operations, and it can also hold the port number for
the IN and OUTinstructions, but it is mostly available as a convenient place to store
data, as are all of the other general-purpose registers.

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Buses: ''The set of wires used to travel signals to and from CPU and different
components of computer is called Bus.''
Bus is a group of parallel wires that is used as a communication path. As a wire
transmits a single bit so 8-bits bus can transfer 8 bits (1 byte) at a time and 16-bits bus
can transfer 16 bits (2 bytes) and so on. There are three types of buses according to
three types of signals, these are: alled Data Bus.''

 a) Data Bus: ''The buses which are used to transmit data between CPU, memory and
peripherals are c The data bus allows data to be transferred between the memory and the
processor.
 The data bus is bi-directional as data must go both ways.
 The data bus is made up of a set of wires or lines, each line takes one bit of the data.
 The width of the data bus usually matches the size of a memory location, processor registers
are also usually the same size.
 The width of the data bus is measured by the number of lines on the bus.
o A 32-bit data bus has 32 lines and can transfer 32-bit of data in one go.
 The width of the data bus is a factor in system performance.
o The wider the data bus the more data that can be transferred in one go.

b) Address Bus: ''The buses which are connecting the CPU with main memory and
used to identify particular locations (address) in main memory where data is stored
are called Address Buses.''

Address Bus
A memory location is identified by its unique address.

 The address bus holds the address of the memory location being accessed.
 The address bus is made up of a set of wires or lines, each line takes one bit of the address.
 The address bus is uni-directional as it is used by the processor to inform memory which
address it needs. (Memory can't "send" an address to processor!)
 The width of the address bus is measured by the number of lines on the bus.

A 32-bit address bus has 32 lines and can identify 2^32 memory locations.

Control Bus (Lines)

 The control bus is not really a bus but a group of separate lines that each
perform individual tasks. The lines on the control bus allow the processor to send or receive
(transmit) control signals.

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READ line and WRITE lines

 The READ line is activated during a memory read-operation. A read signal is transmitted on
the read line to let memory know that data is going to be read from it.
 The WRITE line is activated during a memory write-operation. A write signal is transmitted on
the write line to let memory know that data is going to be written to it.

 CLOCK line

 The CLOCK line is used to synchronise the operations of


the CPU. The clock signal is transmitted as a series of
regular pulses. The clock signal is used as a timing signal
to co-ordinate the activities of the processor and other
devices in the computer system. The devices refer to the
clock signal to mark the beginning and ending of events.
Devices wait for the next pulse to begin an event and
ensure that the event is completed within one or more
subsequent pulses.

 RESET line and INTERRUPT line

 A reset line is used to return the processor to its original state, (reboot).
 A signal on the interrupt line is transmitted tothe processor by another device (usually an
interface) to alert the processor that a significant event has taken place.
o An interrupt happens when the processor is needed to deal with a significant event
o for example
 a laptop battery starts to run low, a critical event
 the power management unit (PMU) in the laptop has to get a message to the user
 but the processor is busy playing a DVD movie for the user
 so the PMU sends an interrupt request (IRQ) signal to the processor
 the processor has to safely suspend what it is doing by saving all its current work (all
registers) to memory
 the processor analyses where the IRQ came from and loads the correct interrupt handler
program
 the interrupt handler program takes over and will take care of the PMU's request and finishes
by telling the processor
 the processor re-loads the work it had suspended and continues
 all this happens very quickly

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Fetch-Execute Cycle:
At its core, all the computer ever does is, execute one instruction in memory after
another, over and over. Although there are many
different possible (assembly language) instructions
that the computer can execute, the basic steps
involved in executing an instruction are always the
same, and they are called the instruction cycle.

Description of each stage

1.

Fetch the instruction (transfer the instruction from


main memory to the decoder)

2.

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2) Decode the instruction (from machine language)

3. Execute the instruction (e.g., add, divide, load, store. ..)

4.Store the result (for instructions like ADD, place the 'answer' in the specified register.)
The control unit guides the computer's components through this cycle to execute one
instruction.

See the following figures for information

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When that instruction is done, the cycle starts all over again with the next instruction.

Instructions are presented in assembly language in the upper right hand corner.)

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Begin the next instruction by fetching it from the memory and copying it to the decoder

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Summary

Throughout their brief history, the physical appearance of computers has changed dramatically, but
their basic function - to store and execute a series of instructions - has remained the same.The von
Neumann model of computer architecture characterizes computers as having four functional units: I/O,
Memory, Control Unit and ALU.Basically all the computer ever does is repeat the four steps of the
instruction cycle -- fetch, decode, execute and store -- over and over.

Instruction execution example

Exercise

What is Pipelining?
This is a method by which the processor can be involved in the execution of more than a single
instruction at one time. Understandably, this enables the execution of the program to be
completed with greater speed, but is not without complications and problems. These have to be
overcome by careful design.

What are CISC and RISC architectures


Over the course of the development of the modern day processor, two competing architectures
have emerged. CISC and RISC have several major differences in features and ideas, but both
were designed with the intention of improving CPU performance. Current processors tend not to
be strictly adherent to either architecture, instead being a mix of the two ideals.

Modern architectures
Outside of pipelining, RISC and CISC, many other improvements to the general architecture of
the microprocessor have been developed. These are in many differing areas such as cache
memory and specialised instruction set extensions. New advancements are added with each new
generation of processors.

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Sample Questions
Q) Match the following

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