ECE 0142 Computer Organization

Lecture 5 Multiplication and Division

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Multiplication

 More complicated than addition

– A straightforward implementation will involve shifts and
adds

 More complex operation can lead to

– More area (on silicon) and/or
– More time (multiple cycles or longer clock cycle time)

 Let’s begin from a simple, straightforward method

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Straightforward Algorithm

01010010 (multiplicand)
x 01101101 (multiplier)
01010010
00000000
01010010
01010010
00000000
01010010
01010010
00000000
010001011101010

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Implementation 1

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Example (Implementation 1)

 Let’s do 0010 x 0110 (2 x 6), unsigned

Iterati Implementation 1
on Step Multiplier Multiplicand Product
0 initial values 0110 0000 0010 0000 0000
1: 0 -> no op 0110 0000 0010 0000 0000
1 2: Multiplier shift right/ Multiplicand
shift left
011 0000 0100 0000 0000

1: 1 -> product = product +

multiplicand
011 0000 0100 0000 0100
2
2: Multiplier shift right/ Multiplicand
shift left
01 0000 1000 0000 0100

1: 1 -> product = product +

multiplicand
01 0000 1000 0000 1100
3
2: Multiplier shift right/ Multiplicand
shift left
0 0001 0000 0000 1100

1: 0 -> no op 0 0001 0000 0000 1100

4 2: Multiplier shift right/ Multiplicand
shift left
0010 0000

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Drawbacks

 The ALU is twice as wide as necessary

 The multiplicand register takes twice as many bits as needed
 The product register won’t need 2n bits till the last step
– Being filled
 The multiplier register is being emptied during the process

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 Implementation 2

Multiplicand stationary - Multiplier right - PP right

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Example (Implementation 2)

 Let’s do 0010 x 0110 (2 x 6), unsigned

Implementation 2
Iteration
Step Multiplier Multiplicand Product

0 initial values 0110 0010 0000 ××××

1: 0 -> no op 0110 0010 0000 ××××

1 2: Multiplier shift right/ Product shift
right ×011 0010 0000 0×××

1: 1 -> product = product +

multiplicand ×011 0010 0010 0×××
2
2: Multiplier shift right/ Product shift
right ××01 0010 0001 00××

1: 1 -> product = product +

multiplicand ××01 0010 0011 00××
3
2: Multiplier shift right/ Product shift
right ×x×0 0010 0001 100×

1: 0 -> no op ×××0 0010 0001 100×

4 2: Multiplier shift right/ Product shift
right ×××× 0010 0000 1100

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Implementation 3

Multiplier on right half

of PP reg

Multiplicand stationary -
Multiplier right - PP right

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Example (Implementation 3)

 Let’s do 0010 x 0110 (2 x 6), unsigned

Implementation 3
Iteration
Step Multiplier Multiplicand Product|Multiplier

0 initial values 0110 0010 0000 0110

1: 0 -> no op 0110 0010 0000 0110

1
2: Multiplier shift right/ Product shift right ×011 0010 0000 0011

1: 1 -> product = product + multiplicand ×011 0010 0010 0011

2
2: Multiplier shift right/ Product shift right ××01 0010 0001 0001

1: 1 -> product = product + multiplicand ××01 0010 0011 0001

3
2: Multiplier shift right/ Product shift right ××00 0010 0001 1000

1: 0 -> no op ×××0 0010 0001 1000

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2: Multiplier shift right/ Product shift right ×××× 0010 0000 1100

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Example (signed)

 Note:
– Sign extension of partial product
– If most significant bit of multiplier is 1, then subtract

+ + +
→ → →
+ → →
→ → →
+
→
→ → →

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Booth’s Encoding

 Three symbols to represent numbers: 1, 0, -1

 -1 in 8 bits
– 11111111 (two’s complement)
– 0000000-1 (Booth’s encoding)
 14 in 8 bits
– 00001110 (two’s complement)
– 000100-10 (Booth’s encoding)
 Bit transitions show Booth’s encoding
– 0 to 0: 0
– 0 to 1: -1
– 1 to 1: 0
– 1 to 0: 1
 Partial results are obtained by
– Adding multiplicand
– Adding 0
– Subtracting multiplicand

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 Booth’s Algorithm Example

 Let’s do 0010 x 1101 (2 x -3)

Implementation 3
Iteration
Step Multiplicand Product
0 initial values 0010 0000 1101 0
10 -> product = product – multiplicand 0010 1110 1101 0
1
shift right 1111 0110 1
01 -> product = product + multiplicand 0010 0001 0110 1
2
shift right 0000 1011 0
10 -> product = product – multiplicand 0010 1110 1011 0
3
shift right 1111 0101 1
11 -> no op 0010 1111 0101 1
4
shift right 1111 1010 1

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Why it works?

b × (a31a30….a0)  Booth's algorithm performs

an addition when it
encounters the first digit of a
= a0 × b × 20 + block of ones (0 1) and a
a1 × b × 21 + subtraction when it
… encounters the end of the
a31 × b × 231 block (1 0). When the ones in
a multiplier are grouped into
long blocks, Booth's
= ( 0 – a0 ) × b × 20 + algorithm performs fewer
( a0 – a1) × b × 21 + additions and subtractions
than the normal multiplication
…
algorithm.
(a30 – a31) × b × 231 +
a31 × b × 232
?

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Why it works?

 Works for positive multiplier coz a31 is 0

 What happens for negative multipliers? a31 is 1
– Remember that we are using 2’s complement binary

b × (a31a30….a0) = b × (- a31 × 231+a30 × 230+….a0 ×20)

Same derivation applies

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Division

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Integer Division

 Dividend = Quotient × Divisor + Remainder

Q? R?

 How to do it using paper and pencil?

7÷2 = 3 … 1
1001 11
1000 1001010 0010 00000111
-1000 -0010
10 00011
101 -0010
1010
-1000 0001
10

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 Implementation 1

64-bit wide

32-bit shift register

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Iteration Step Quotient Divisor Remainder
0 Initial values 0000 0010 0000 0000 0111
1: Rem=Rem-Div 0000 0010 0000 1110 0111
1 2b: Rem<0=>+Div, sll Q, Q0=0 0000 0010 0000 0000 0111
3: Shift Div right 0000 0001 0000 0000 0111
1: Rem=Rem-Div 0000 0001 0000 1111 0111
2 2b: Rem<0=>+Div, sll Q, Q0=0 0000 0001 0000 0000 0111
3: Shift Div right 0000 0000 1000 0000 0111
1: Rem=Rem-Div 0000 0000 1000 1111 1111
3 2b: Rem<0=>+Div, sll Q, Q0=0 0000 0000 1000 0000 0111
3: Shift Div right 0000 0000 0100 0000 0111
1: Rem=Rem-Div 0000 0000 0100 0000 0011
4 2a: Rem≥0=> sll Q, Q0=1 0001 0000 0100 0000 0011
3: Shift Div right 0001 0000 0010 0000 0011
1: Rem=Rem-Div 0001 0000 0010 0000 0001
5 2a: Rem≥0=> sll Q, Q0=1 0011 0000 0010 0000 0001
3: Shift Div right 0011 0000 0001 0000 0001 19
Implementation 2

2. Do the division

1. Place dividend in lower half

3. Get remainder here 4. Get quotient here

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