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Assignment#3: COMSATS University Islamabad Abbottabad Campus

This document discusses multi-cycle machine data-path architectures. It explains that multi-cycle architectures break instructions down into separate steps that each take one clock cycle. This reduces the amount of hardware needed compared to single-cycle architectures and reduces average instruction time. The document provides details on how multi-cycle architectures work, the differences between single-cycle and multi-cycle datapaths, and gives an example of a multi-cycle implementation for MIPS.

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68 views

Assignment#3: COMSATS University Islamabad Abbottabad Campus

This document discusses multi-cycle machine data-path architectures. It explains that multi-cycle architectures break instructions down into separate steps that each take one clock cycle. This reduces the amount of hardware needed compared to single-cycle architectures and reduces average instruction time. The document provides details on how multi-cycle architectures work, the differences between single-cycle and multi-cycle datapaths, and gives an example of a multi-cycle implementation for MIPS.

Uploaded by

INAM
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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COMSATS University Islamabad

Abbottabad Campus

Assignment#3

Subject: Computer Architecture


Instructor: Mr. Muhammad Faisal
Date: May 3rd, 2021
Submitted by: Hussain Ahmed
Reg no: FA19-BCS-074

1 | Page
Hussain Ahmed
FA19-BCS-074
COMSATS University Islamabad
Abbottabad Campus

MULTI-CYCLE MACHINE DATA-PATH ARCHITECTURE


Multi-cycle data paths break up instructions into separate steps. Each step takes a single clock
cycle Each functional unit can be used more than once in an instruction, as long as it is used in
different clock cycles. It reduces the amount of hardware needed. It reduces average
instruction time.
By definition, a multi-cycle path is one in which data launched from one flop is allowed (through
architecture definition) to take more than one clock cycle to reach to the destination flop . 
Why a Multiple Cycle CPU?
• The problem => single-cycle CPU has a cycle time long enough to complete
the longest instruction in the machine
• The solution => break up execution into smaller tasks, each task taking a
cycle, different instructions requiring different numbers of cycles or tasks

Multi-cycle implementation:

 Break up instructions into separate steps


 Each step takes a single clock cycle
 Each functional unit can be used more than once in an instruction,
 As long as it is used in different clock cycles
 Reduces amount of hardware needed
 Reduces average instruction time

2 | Page
Hussain Ahmed
FA19-BCS-074
COMSATS University Islamabad
Abbottabad Campus

Multi-cycle Datapath
 Control signals needed to select inputs, outputs
 Need write control:
 Programmer-visible units
 PC, memory, register file
 IR: needs to hold instruction until end of execution
Need read control:

 Memory
 ALU Control: can use same control as single-cycle

R-FORMAT STEPS
• An instruction is fetched from instruction memory and the PC is incremented.
• Read two source register values from the register file.
• Perform the ALU operation on the register data operands.
• Write the result of the ALU operation to the register file.

DIFFERENCES BETWEEN SINGLE-CYCLE AND MULTICYCLE DATAPATH


 A single memory unit is used for both instruction and data.
 There is a single ALU, rather than an ALU and two adders.
 One or more registers are added after every major functional unit to hold the output of
that unit until the value is used in a subsequent clock cycle
Disadvantages of the Single Cycle Processor

 Long cycle time


 Cycle time is too long for all instructions except the Load
 Multicycle implementations have the advantage of using a different number of cycles
for executing each instruction.
Multicycle Processor:

 Divide the instructions into smaller steps


 Execute each step (instead of the entire instruction) in one cycle
 Control is specified by finite state diagram
 (Microprogramming is used for complex instruction set)

3 | Page
Hussain Ahmed
FA19-BCS-074
COMSATS University Islamabad
Abbottabad Campus

 The most widely used machine implementation

MIPS Multicycle Implementation


The basic idea of the multicycle implementation is to divide the one long cycle of the single
cycle implementation into 3 to 5 shorter cycles. The number of cycles depends on the
instruction.

 Instruction fetch, program counter increment


 Partial instruction decodes and branch and jump target computation
 Source operand fetch, ALU operation, and program counter update for branches and
jumps
 Memory access, if needed
 Register writes, if needed

4 | Page
Hussain Ahmed
FA19-BCS-074

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