AN ADVANCED CMTS RECEIVER ARCHITECTURE FOR

DOCSIS 1.X/2.0 CABLE ACCESS NETWORKS

F. Buda, E. Lemois and H. Sari

Juniper Networks, France

ABSTRACT
This paper describes an advanced receiver structure for DOCSIS 1.x/2.0
cable modem termination systems. The receiver is based on direct
digitization of the entire upstream spectrum of the cable. The digitized signal
is passed to a digital front-end that performs baseband conversion, filtering
and decimation, and followed by synchronization and digital signal
processing functions. Not only this architecture increases the density and
lowers the cost of equipment, but also the receiver has quasi-ideal
performance, which makes high-level modulations usable in practice. In
addition, the receiver incorporates efficient channel equalization and ingress
noise cancellation functions, which make it possible to use the parts of the
spectrum that suffer from significant group-delay distortion and narrowband
ingress noise. Performance of the receiver is illustrated using different types
of signal constellations and is compared to that of legacy CMTS receivers.

INTRODUCTION
Data-Over-Cable System Interface Specifications (DOCSIS) [1] have become a popular
standard for data communications over hybrid fiber/coax (HFC) cable networks. The access
point that connects the HFC network to the core network is called cable modem termination
system (CMTS). The CMTS communicates with the cable modems (CMs) located at
subscriber premises. In DOCSIS specifications, the 5 – 42 MHz spectrum is reserved for the
upstream channel (from CMs to CMTS), while the 88 – 860 MHz spectrum is used for
downstream transmission (from CMTS to CMs). In the conventional CMTS receiver
architecture, the received upstream signal is fed to an analog front-end that selects the
desired channel, amplifies and converts it down to baseband. This implies that a separate
analog front-end and A/D converter are required for each upstream channel to be
demodulated. Furthermore, an analog front-end has practical inherent performance limits,
which make it more difficult to use high-level quadrature amplitude modulation (QAM)
schemes.
This paper describes a receiver architecture that is based on direct digitization of the entire 5
– 42 MHz upstream spectrum (5 – 65 MHz in Euro-DOCSIS). In this architecture, which was
first described in [2], a single A/D converter is needed per port irrespective of the number of
upstream channels on it. Using this concept, a 4-input/16-output receiver was integrated in a
single chip, which also includes 4 downstream modulators and critical medium access
control (MAC) functions. A software-controlled switch integrated in the chip allows sending to
each one of the 16 digital front-ends and demodulators the desired input port signal, and
then each digital front-end selects the desired upstream channel. In addition to the increased
CMTS density, this receiver architecture also offers cable operators full flexibility in network
planning and handling the evolution of their cable plants without human intervention at hubs
and cable head-ends.
Furthermore, the receiver has a number of other unique features, which include a powerful
ingress noise canceller and a very efficient adaptive equalizer. The noise canceller makes it
possible to use the very noisy regions of the upstream spectrum, and the equalizer eases
the use of its lower and upper edges that exhibit strong group-delay distortion. This
increases the number of usable upstream channels and the overall network capacity. A side
advantage of this architecture concerns spectrum monitoring, which is of paramount
importance to network operators. Whereas a spectrum analyzer or a purpose-built hardware
is needed for spectrum monitoring in conventional receivers, no additional hardware is
required in the described architecture. In addition to DOCSIS 1.x, the current version of the
chip also includes the advanced time-division multiple access (A-TDMA) mode of the
recently released DOCSIS 2.0 RF interface specification. With respect to DOCSIS 1.x, this
specification includes an increased channel bandwidth (6.4 MHz), several additional
modulations including 64-QAM, and an improved forward error correction scheme. A
forthcoming version of the chip (under development) will also integrate the synchronous
code-division multiple access (S-CDMA) mode of DOCSIS 2.0.
This paper describes the receiver architecture, gives a brief review of DOCSIS 2.0
specifications, and reports measurement results using quaternary phase-shift keying
(QPSK), 16-QAM and 64-QAM modulations. We also give some simulation results that
highlight the performance vs. data rate trade off in DOCSIS 2.0 and the performance of the
trellis code used in S-CDMA.

RECEIVER ARCHITECTURE
A general block diagram of the receiver is shown in Fig. 1. The received signal is first filtered,
amplified, and A/D converted using a clock generated by a free-running oscillator. The
nominal frequency of this clock is 102.4 MHz. The variable-gain amplifier used controls the
signal power of the entire carrier multiplex. After A/D conversion, the signal is sent to the fully
digital front-end which is followed by the digital demodulator.

102.4MHz

DIGITAL DIGITAL
A/D FRONT-END DEMODULATOR
To RS Decoder

Figure 1 - General block diagram of the CMTS receiver.

Digital Front-End
As shown in Fig. 2, the first function of the digital front-end is to convert the received signal to
baseband and generate in-phase and quadrature components. This is performed using a
numerically controlled oscillator (NCO) whose frequency is controlled by the CMTS. The
baseband signal is then passed to digital filtering and decimation stages, which select the
desired channel and provide 4 samples per nominal symbol duration. The final stage of the
digital front-end is the matched filter, which operates at 4 times the nominal symbol rate and
performs square-root raised-cosine Nyquist filtering. The matched filter output is delivered to
the digital demodulator.

Digital Demodulator
The basic function of the digital demodulator is to perform timing and carrier
synchronizations, channel equalization, ingress noise cancellation, and make symbol
decisions. First, a coarse timing function detects the beginning of each burst with the
required precision (typically a precision of a half-symbol period). The conventional approach
to coarse timing estimation is based on power estimation. Since the received signal level in
the absence of bursts is small compared to the signal level received during bursts, a power
estimation circuit followed by a threshold comparator can detect the start of bursts. This
technique has two problems: The first problem is that the precision of the burst start estimate
is a function of the power-averaging filter. A short filter memory is required to improve
precision, but then the estimator becomes very sensitive to additive noise.
The second problem is that the threshold is a function of the received signal power level. A
high threshold leads to the risk of missing bursts and leads to an estimation delay. A low
threshold reduces the delay, but creates the risk of false alarms. To avoid these problems,
we developed a new coarse timing detector that involves a correlator and the computation of
a contrast function that is independent of the received signal power [2]. The correlator
correlates the incoming signal with the preamble sequence stored in the receiver. With a
contrast function that is independent of the received signal power, a fixed threshold can be
used to detect the burst start. The threshold comparator determines a short time-window in
which the correlation maximum is to be searched. In the traffic mode, the CMTS has some a
priori knowledge of the burst position and knows the time window over which it must search
the correlation maximum.

Digital Front End

IF signal
from A/D Baseband Decimation Matched
Conversion Filter Filter

Digital Demodulator
To
Deinterleaver
Coarse Equalizer / Carrier / RS decoder
Threshold
Timing Interpolator Noise Phase
Detector
Recovery Canceller Correction

Fine Timing Frequency

Recovery Estimator

timing error estimation,

frequency error estimation,
preequalizer coefficients
to CM

Figure 2 - Block diagram of the digital front-end and the demodulator.

Fine Timing Recovery

The coarse timing recovery block is followed by a fine timing block that determines the right
sampling instant and passes this information to an interpolator that generates symbol-
spaced signal samples. A scaler placed before the interpolator controls the oversampled
signal power. The scaler is controlled by a power estimation function that is activated during
signal bursts. The symbol-spaced signal samples generated by the interpolator are passed
to subsequent receiver stages, which include an adaptive equalizer, an ingress noise
canceller, and a carrier phase recovery circuit.
Equalizer.
The equalizer is a linear equalizer optimized under the zero-forcing (ZF) criterion [3]. This
criterion is more appropriate than the more popular minimum mean-square error (MMSE)
criterion in the case at hand. The reason is that the computed equalizer coefficient values
must be sent to the CM to implement a pre-equalizer, which must invert the channel transfer
function. Unlike an equalizer at the receiver side, the pre-equalizer does not enhance noise
and does not need a criterion that trades off channel distortion against noise enhancement.

Ingress Noise Cancellation.

Ingress noise represents one of the major disturbances that affect upstream data
transmission in HFC networks [4], [5]. It is essentially due to local AM radio signals and other
types of disturbances that leak into the cable. Ingress noise is modeled as narrowband
interference that may be on or off and essentially constant over a period of time which can
be in excess of several minutes. Another characteristic of ingress noise is that, contrary to
channel distortion that is specific to each CM, it is common to all CMs sharing the same
upstream carrier.
For reliable data transmission on the upstream channel, the receiver must include an
efficient ingress noise canceller, particularly for 16-QAM and higher-level modulations. One
way to suppress ingress noise is to use a notch filter, and a decision-feedback equalizer
(DFE) to suppress the resulting intersymbol interference (ISI) [6]. The DFE can also
compensate for linear channel impairments, but the problem is that this solution does not
exploit the fact that channel distortion and ingress noise have different characteristics. An
alternative approach, adopted in our receiver design, consists of estimating ingress noise by
means of a prediction filter and subtracting this estimate from the received signal prior to
threshold detection [7]. The noise prediction filter is independent of channel distortion and
does not interact with the equalizer. Since ingress noise is the same for all CMs, the
prediction filter coefficients are saved from burst to burst, whereas the equalizer coefficients
are recomputed at each burst. In other words, channel equalization is on a burst-by-burst
basis, noise prediction is on a channel basis, and the two processes are decoupled.

Carrier Synchronization.
The final function before the threshold detector (which makes the symbol decisions) is the
carrier synchronization function. This includes a frequency estimator that estimates the
frequency offset between the CM and the CMTS and a phase recovery circuit that
synchronizes the carrier phase of the incoming signal. The estimated frequency offset is
used to derive a control signal, which is sent to the CM to synchronize its oscillator frequency
with that of the CMTS.

DOCSIS 2.0 SPECIFICATIONS

Working with the vendor community, CableLabs has recently released the interim DOCSIS
2.0 RF interface specifications [8], which aim at increasing the capacity and robustness to
various impairments of the upstream channel in cable plants. These specifications do not
affect the downstream channel, neither do they affect the MAC functions except for the
changes required to accommodate the new physical (PHY) layer.
The previous DOCSIS specifications (DOCSIS 1.0 and 1.1) were based on TDMA. For
DOCSIS 2.0, two different proposals were made for the multiple access scheme. One of
these is to keep the TDMA used in DOCSIS 1.0/1.1 specifications, and the other is S-CDMA,
previously used in some proprietary modems. The decision was made in August 2001 to
include both multiple access schemes in DOCSIS 2.0.
TDMA is a simple and popular multiple access technique used today in many international
standards and proprietary systems. It consists of assigning different time slots to different
users. During the time slot assigned to one user, all other CMs remain silent, and therefore,
there is no interference between users. Since DOCSIS 1.x is based on TDMA, the use of
this technique in DOCSIS 2.0 is natural and its implementation requires little effort.
Furthermore, since DOCSIS 2.0 requires backwards compatibility with DOCSIS 1.x,
implementation of TDMA in DOCSIS 2.0 equipment is unavoidable.
The upstream modulation schemes in DOCSIS 1.x are QPSK and 16-QAM. The second
modulation doubles the data rate with respect to the first. To these, DOCSIS 2.0 adds 8-
QAM, 32-QAM, and 64-QAM, but only the latter modulation is mandatory at the CMTS. With
respect to 16-QAM, this modulation increases the data rate by 50% but loses 6 dB in carrier-
to-noise ratio (C/N), where N designates the noise power in the Nyquist bandwidth. The
inclusion of 8-QAM and 32-QAM in the specifications allows reducing the granularity in the
trade-off between data rate and performance. DOCSIS 2.0 specifications also extend the
error correction capacity of the Reed-Solomon (RS) code from T = 10 to T = 16 bytes per
block. Furthermore, a byte interleaver is included in the TDMA specifications so as to break
the error events caused by burst noise and uniformly distribute the resulting symbol errors.
The interleaver is a block interleaver whose length is equal to the RS block length and depth
is a configurable parameter, which distributes the error bursts over a selected number of RS
blocks.
In S-CDMA, the mini-slots in which the incoming data is organized have two dimensions
(spreading codes and time). The time duration of mini-slots is one S-CDMA frame that spans
a programmable number of S-CDMA symbol intervals. (The maximum frame length is 32 S-
CDMA symbol intervals.) Symbol spreading is performed through multiplication by a
spreading code (spreading sequence) of 128 chips taken from a set of 128 orthogonal codes
that are generated by a quasi-cyclic shift. The number of spreading codes used may be
reduced in order to increase the power per code and improve S-CDMA performance. The
minimum number of codes is 64.
A mini-slot contains a programmable number of spreading codes, which can take all values
from 2 to 128. A mini-slot contains symbols from a single CM. Suppose that the number of
codes per mini-slot is 4 and that the frame length is 16. Then, the mini-slot contains 64
symbols, and a given code is assigned to the same user for a time duration of 16
consecutive S-CDMA symbols. The 4 symbols transmitted in parallel within the same mini-
slot in this example form a code-division multiplex (CDM). If all mini-slots of an S-CDMA
frame are assigned to the same CM, S-CDMA is reduced to pure CDM during that interval.
To the other extreme, if the mini-slots contain two codes only, and each mini-slot is assigned
to a different CM, then there is a true CDMA between 64 CM signals during that frame. The
spreading code orthogonality ensures that there is no interference between symbols
transmitted in parallel by the same CM, since these symbols are perfectly time synchronized.
But interference arises between signals generated by different CMs, due to non-ideal timing
synchronization. To limit the resulting degradation, DOCSIS 2.0 specifies that the maximum
timing error between a CM and the CMTS must not exceed 1% of the chip interval.
In addition to the RS code, S-CDMA specifications also include trellis-coded modulation
(TCM) as an option. Trellis coding reduces the number of information bits per symbol by one,
and so trellis-coded 64-QAM (referred to as 64-TCM) is equivalent to uncoded 32-QAM in
terms of spectral efficiency. Therefore, S-CDMA specifications also include 128-TCM, which
is strictly equivalent to uncoded 64-QAM as far as information bit rate is concerned. But the
S-CDMA specifications neglect to include an interleaver between the external RS code and
the internal trellis code, and this reduces the benefit of TCM. In contrast, S-CDMA
specifications include some interleaving after the trellis encoder to reduce the effect of burst
noise. This interleaver operates on subframes, and interleaving is different for uncoded bits
and coded bits. Subframes are independent of mini-slots, and a subframe is always
contained within a single frame. Finally, symbol spreading in S-CDMA is disabled during
initial ranging and possibly periodic station maintenance.

UPGRADE OF THE RECEIVER

The integrated receiver, which was initially designed for DOCSIS 1.x, was later upgraded to
include DOCSIS 2.0. Upgrading the receiver to include additional TDMA functionalities is
immediate and does not involve any significant changes. The only basic change of the
receiver to comply with DOCSIS 2.0 specifications is the requirement to include both TDMA
and S-CDMA modes in the demodulator. That is, the digital demodulator in Fig. 2 is no
longer a pure TDMA demodulator, but a combined TDMA/S-CDMA demodulator that can
demodulate TDMA and S-CDMA signals at consecutive bursts. Obviously, such a receiver
involves an increased complexity with respect to a TDMA demodulator. Inclusion of the S-
CDMA mode in the demodulator involves the implementation of S-CDMA despreading and
S-CDMA framing/deinterleaving functions.

AN ANALYSIS OF DOCSIS 2.0

DOCSIS 2.0 is a toolbox that gives operators substantial flexibility in trading off performance
against data rate. This can be achieved by selecting the most appropriate signal
constellation and RS code parameters for the network at hand. Another parameter in the S-
CDMA mode is the number of active spreading codes used. Fig. 3 shows the spectral
efficiency (number of information bits per symbol) vs. C/N for different constellations and
code parameters.

64 QAM with RS 64 QAM

6
32 QAM
5
Spectral efficiency

16 QAM
4
QPSK with RS and 8 QAM
3 reduced number of
codes
QPSK
2 64 QAM
with reduced
number of
1
codes

0
5 10 15 20 25 30
C/N (dB) for BER=10-8

Figure 3 - Performance vs. capacity trade-off in DOCSIS 2.0.

The dots in this figure indicate the uncoded signal constellations, and the curves departing
leftward from these dots indicate the performance of these constellations with different levels
of RS encoding. Note that 64-QAM is optimum above the spectral efficiency of 4.8, and 32-
QAM is optimum between 3.8 and 4.8 bits per symbol. The figure also shows the
performance of a 64-QAM S-CDMA system with a reduced number of spreading codes.
Reducing the number of spreading codes to 64 increases the transmitted power per code by
3 dB, which means that the resulting system can operate at a 3 dB lower C/N. But the cost of
this improvement is 50% reduction of the data rate (the spectral efficiency in Fig. 3 is
reduced from 6 to 3).
The QAM signal constellations and the coding parameters included in DOCSIS 2.0 give a
much better trade-off than the number of active codes of S-CDMA. If the C/N is not sufficient
to operate in the 64-QAM mode, switching to 32-QAM reduces by 3 dB the required C/N and
only loses 17% in data rate. If one is prepared to sacrifice half of the data rate, the
constellations alone can reduce by 9 dB the required C/N (by switching from 64-QAM to 8-
QAM). This example shows that constellation switching gains 6 dB over reducing the
number of spreading codes in S-CDMA. The figure also shows that the penalty associated to
spreading code reduction in S-CDMA is actually much larger when the effect of RS coding is
taken into account. Indeed, an RS-coded 16-QAM operating at a spectral efficiency of 3 bits
per symbol gains almost 10 dB over a (spectrally-equivalent) 64-QAM S-CDMA system with
64 spreading codes. The same performance gap holds for other signal constellations and
spectral efficiencies, for example between RS-coded 8-QAM system operating at 2.5
information bits per symbol and a 32-QAM S-CDMA system with 64 spreading codes.
The only case where reducing the number of spreading codes in S-CDMA could be of
interest is when the lowest level modulation (QPSK) together with T = 16 in the RS code are
not sufficient to get the desired performance. But the current S-CDMA specifications
constrain the number of codes to be higher than 64, which means that the associated gain is
limited to 3 dB. Furthermore, S-CDMA is constrained to operation on channels whose
bandwidth is no smaller than 1.6 MHz, while TDMA can operate on 200 kHz channels.
Therefore, if the C/N is not sufficient to operate a QPSK system on a 1.6 MHz channel,
TDMA can use a lower bandwidth. By switching to a 200 kHz channel, it actually increases
C/N by 9 dB, which largely offsets the 3-dB gain of S-CDMA. This means that on difficult
channels with excessive noise, TDMA can actually operate at 6 dB higher noise level than S-
CDMA. A final remark to make at this point is that the 3 dB gain of S-CDMA achieved by
reducing the number of active codes is only hypothetical, because symbol spreading is
disabled during initial ranging, which are most critical to overall system performance.
Another point that is worth highlighting is the performance of the optional TCM in the S-
CDMA mode. The trellis code used is an 8-state code, which gives an asymptotic coding
gain of 4 dB. But as shown in [9], the asymptotic gain of the trellis code is only 1.1 dB when it
is concatenated with an RS code whose correction capacity is 16 symbols per codeword (T
= 16). Furthermore, the 1.1 dB gain assumes an infinite interleaver between the RS encoder
and the trellis encoder, so that the deinterleaver on the receive side can break the error
events at the TCM decoder output and distribute them over a large number of RS blocks.
The number of RS symbol errors per block is then small, and these errors can be located
and corrected by the RS decoder. Unfortunately, the DOCSIS 2.0 specifications do not
include such an interleaver but instead a sub-frame interleaver that keeps a part of the
information bits non-interleaved. This significantly reduces the TCM gain. The simulation
results reported in [9] for 128-TCM and an RS code of length 255 show that TCM has an
asymptotic gain is 0.4 dB with the maximum subframe size (equal to one S-CDMA frame)
and it actually loses 0.5 dB with the nominal subframe size (equal to one RS block).
Not only optional trellis coding in the S-CDMA mode of DOCSIS 2.0 does not give any
significant improvement on additive white Gaussian noise (AWGN) channels, but it was also
found that it actually degrades performance in the presence of burst noise. Fig. 4 shows the
simulated bit error rate (BER) performance of 16-QAM and 32-TCM as a function of the
burst duration.
 1.E+00

16 QAM RS (240,16)
32 QAM tcm RS (240,16)
1.E-01

BER
1.E-02

1.E-03

1.E-04
0 100 200 300 400 500
burst duration (in chip periods)

Figure 4 - Performance of TCM in the presence of burst noise.

The burst noise power in these simulations was 0 dBc, the subframe height of S-CDMA was
15, and there was only one codeword per subframe. The results show that the BER is lower
with 16-QAM, which exhibits a very sharp drop when the burst duration gets shorter than
256 chips (2 S-CDMA symbols). In that case, the noise burst affects at most 2×15 = 30 S-
CDMA symbols (15 bytes or RS symbols), which are correctable by the RS. The higher BER
of 32-TCM is due to the behavior of the TCM decoder, which leads to error events of
increased length with respect to that of the noise burst.

RECEIVER PERFORMANCE
Simulated and measured BER performance of the receiver was previously reported in [2].
The results indicated that the receiver performance is 0.2 dB from theory in QPSK and 0.5
dB in 16-QAM. Here, we will report some additional results giving the measured packet error
rate (PER) performance with RS code parameters k = 80 and T = 3 and compare it to
theoretical performance.
Fig. 5 shows the results for an AWGN channel. For 16-QAM, it also shows the results of
measurements using a legacy CMTS that uses commercial burst demodulator chips. Note
that the degradation of the legacy CMTS receiver with respect to our receiver is over 9 dB at
the PER of 0.1%, and the performance degradation is even higher at lower PER values.
Even in the 64-QAM mode, our receiver achieves a gain of 3.5 dB over a legacy 16-QAM
receiver (at the PER of 0.1%). The poor performance of legacy receivers is perhaps the
main reason why 16-QAM is virtually not used in the field today.
Next, Fig. 6 shows the receiver performance in the presence of ingress noise. Specifically, it
gives the measured PER as a function of the carrier-to-interference ratio (C/I) in the
presence of two continuous-wave (CW) interferers. We can see that in the 16-QAM mode,
our receiver achieves a PER of 1% at the C/I of 1.5 dB, while the legacy receiver requires a
C/I of 22 dB to achieve this PER. Also note that the legacy receiver exhibits an irreducible
PER floor near the 0.1% PER. Furthermore, even in the 64-QAM mode, our receiver
achieves a PER of 1% at the C/I of 5 dB, still giving a tremendous improvement of 17 dB
over a legacy 16-QAM receiver in terms of robustness to narrowband ingress noise. The
excellent performance of our receiver is primarily due to the efficient ingress noise canceller
implemented. But even when the ingress noise canceller is disabled, our receiver still
achieves a 7-dB gain over a legacy receiver at the PER of 1%.
 1.E+00

1.E-01

Packet Error Rate 1.E-02

1.E-03
64QAM (measurements)
64QAM (theory)
16QAM (measurements)
1.E-04 16QAM (theory)
16QAM (legacy)
QPSK (theory)
QPSK (measurements)
1.E-05
5 10 15 20 25 30
C/N (dB)

Figure 5 - PER performance of the receiver on an AWGN channel.

1.E+00

1.E-01
Packet Error Rate

1.E-02

1.E-03

64QAM without ingress noise cancellation

1.E-04 64QAM with ingress noise cancellation
16QAM without ingress noise cancellation
16QAM with ingress noise cancellation
16QAM (legacy)
1.E-05
0 5 10 15 20 25
C/I (dB)

Figure 6 - PER performance in the presence of two CW interferers.

CONCLUSIONS
We have described an advanced CMTS receiver architecture for DOCSIS 1.x/2.0 cable
networks. The receiver is based on direct digitization of the upstream channel spectrum and
makes use of highly sophisticated algorithms for timing and carrier synchronization, channel
equalization, and ingress noise cancellation. This structure leads to a very compact CMTS
on one hand and gives quasi-ideal performance on the other hand. Measurement results
show that the presented receiver substantially outperforms legacy CMTS receivers based on
commercially available burst demodulator chips. The excellent performance achieved by our
receiver design makes it possible to use high-level modulation schemes on noisy cable
plants and also to use the parts of the spectrum which suffer from a significant amount of
group-delay distortion and narrowband ingress noise. We have also examined the
performance vs. data rate trade off in DOCSIS 2.0 and shown that reducing the number of
spreading codes in S-CDMA loses too much in data rate to be of practical interest. Finally,
the trellis code option of the S-CDMA mode does not significantly improve performance on
AWGN channels and actually degrades performance in the presence of burst noise.
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