Control and Protection of Wind Power Plants With V
Control and Protection of Wind Power Plants With V
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By
Sanjay K Chaudhary
A dissertation submitted to
The Faculty of Engineering, Science, and Medicine, Aalborg University
in partial fulfilment of the requirements for the degree of
Doctor of Philosophy
Web: http://www.et.aau.dk
Wind power plants are the fastest growing source of renewable energy. The
European Union expects to generate 230 GW wind power, in which the
offshore wind power is expected to contribute 40 GW. Offshore wind power
plants have better wind velocity profile leading to a higher energy yield.
Europe has a huge potential of offshore wind energy, which is a green and
sustainable resource. All these have led to the development of offshore wind
power plants.
i
HVDC transmission decouples the offshore grid frequency from the
onshore grid frequency. Three different methods have been evaluated here for
relaying the onshore grid frequency to the offshore grid, such that the wind
power plant can participate in the grid frequency control. One of the schemes
does not involve communication, while the other two depend upon
communication of onshore frequency signal. Similarly, three different methods
have been evaluated and compared for the fault ride through behaviour of this
system.
The current control capability of the converters in the offshore wind power
plant grid can be utilized to enhance the fault time behaviour of the whole
system. A novel approach has been proposed to allow a calculated amount of
negative sequence current injection from the VSC-HVDC converters as well as
the full scale converters in the wind turbine generators. The proposed approach
is demonstrated to have lower power oscillations, and hence, lower dc voltage
overshoots in the VSC-HVDC system.
I express my sincere gratitude to all the colleagues from the Vestas Power
Program and the Department of Energy Technology as a whole for their
friendship and support in various forms.
Sanjay K Chaudhary
Aalborg, Denmark,
September 2011
iii
4
Contents
Abstract .............................................................................................................. i
Abbreviations .................................................................................................... 9
1 Introduction .......................................................................................... 11
***
9
Abbreviations
***
11
1 Introduction
1.1 Background
Figure 1.1 shows the growth of both onshore and offshore wind power
plants from 1990 and it is projected till 2030. By 2030, the total installed wind
power capacity will be 400 GW, out of which 150 GW will be offshore wind
power installations. However, due to better capacity factor, the offshore wind
power will be contributing around approximately half of the total wind energy
production, as shown in Figure 1.2. By the year 2050, it is projected that there
will be 350 GW onshore and 250 GW offshore wind power installation.
Thereby, it will be able to meet 50% of the electricity demand in the European
Union [1].
400
Total Installed Capacity (MW) Onshore Offshore
350
300
250
200
150
100
50
0
1990 1995 2000 2005 2010 2015 2020 2025 2030
Year
Figure 1.1 Total installed wind power capacity in the EU, projected till 2030 [1].
1200
Offshore Onshore
Energy Production (TWh)
1000
800
600
400
200
0
2000 2005 2010 2015 2020 2025 2030
Year
Figure 1.2. Wind power energy production in the EU, projected till 2030 [1].
Power electronic converters are employed in the WTGs to provide them the
required flexibility and controllability; either by allowing them to align with
the grid frequency as is the case in doubly fed induction generators; or by
decoupling them from the grid frequency such as in the case of WTG’s with
full scale converters. On the transmission side, VSC-HVDC system provides an
asynchronous link with independently controllable active and reactive power.
Amid such a wide degree of controllability obtained from the power electronic
converters and the variable nature of WTG, their control and co-ordination for
efficient operation is very important.
1.3 State-of-the-Art
VSC-HVDC systems use fully controllable switches like IGBT and IGCT.
Their turning ‘ON’ and turning ‘OFF’ is controlled by the applied gate pulse.
These switches are usually assembled in a 3-phase, 2-level or 3-level converter
configuration. In VSC based HVDC, the IGBT switches are switched ‘ON’ and
‘OFF’ usually at a switching frequency of 1 to 2 kHz. The HVDC side voltage
is maintained higher than the grid side peak voltages. Hence, the VSC can
produce the desired voltage waveform at fundamental frequency. The output
voltage contains high frequency components, which can be filtered away using
passive filters. VSC can be controlled to produce the terminal voltage of
required magnitude and phase angle such that the desired current can flow
through the phase reactors at its terminals. This ability of the VSC to drive the
desired current waveform in the grid at power frequency enables fast control
and four-quadrant operation on the active-reactive power (PQ) plane [6].
Harnefors describes the control loops for the VSC HVDC transmission
connecting two areas in the power grid in [7]. One terminal regulates the dc
voltage and the reactive power exchange with the grid at one end, while the
other regulates the active and reactive power exchanges at the other end. In [8],
Iov et al present the control structure of the VSC-HVDC for the grid
connection of wind farms with active stall induction generators. The wind farm
side converter controls the wind farm grid voltage and frequency so as to
enable variable frequency operation of the wind farm while maintaining the
volts per Hertz ratio. The grid side VSC controls the dc line voltage and the
reactive power flow to the grid. Direct control of the wind farm side voltage
and its frequency without any inner current control loop is presented in [9]. In
ref [10], an inner current control loop of the VSC controller is used to control
15
the ac terminal voltage in the offshore grid. This controller is suitable for wind
power plant applications. Variable frequency control is described so as to take
advantage of the improved efficiency of the WPP. In all these studies, DFIG
based wind turbines have been considered.
With the emergence of large wind power plants, the grid operators are
concerned about their impact upon the power system. Therefore, the grid
operators have come up with the Grid Code Requirements (GCR) to be
complied with before the wind power plants can be connected to the grid. The
GCR specifies the operational conditions of voltage, frequency, and power
factor. In the beginning, the wind power penetration in the power system was
small, and they could disconnect during the grid disturbances. However, with
increasing penetration of the wind power in the power system and decreasing
proportion of the conventional synchronous generators, the grid operators
demand that the large wind power plants remain connected to the gird and
assist in its recovery. For instance, the German grid code [11] requires that the
WPP remain connected and supply the reactive current to the grid during low
voltage faults in the power system grid. It also specifies the power ramping rate
during the system recovery after the fault has been cleared. Although it asks for
±2% reserve to be made available within 30 seconds for ±200 mHz change in
frequency, the offshore grid code [12] over-rides this requirement by asking for
only downward regulation. In the Danish grid code [13], both options have
been specified.
Muyeen et al. [16] have described the use of energy capacitor system
(ECS) composed of power electronic devices and electric double layer
capacitor (EDLC) to enhance the LVRT capability of fixed speed wind turbine
generator system during network disturbances. Use of ECS using EDLC to
16
Reference [19] describes that the kinetic energy can be extracted from the
WTGs using power electronic converter controls to supply the active power
proportional to the frequency deviation, and thus inertia can be emulated. In
[20], Ullah et al. describes that a wind farm can provide a short-term active
power support utilizing the rotational energy of the turbine blades which is
particularly beneficial in a hydro-dominated power system grid. The
contribution from the wind turbines gives extra time for the hydro generators to
ramp up their generation. Reference [21] presents the primary frequency
regulation capability by maintaining the reserve power generation capability
through their de-loaded operation by pitch angle control of wind turbines.
Jensen and Fuchs [22] describe the methods of allocation the generation
reserve as well as the different ways to relay the grid frequency to the offshore
wind-farm when there is an asynchronous VSC-HVDC connection between
them.
Technical literature and statistics of the wind power growth shows the
enthusiasm in the development and grid connection of wind power plants.
However, there are very little publications in the field of the faults and
transients in the offshore grid, which does not have any directly connected
synchronous machinery. There are converters at all the terminals. Their control
and the network topology will determine the response to faults. There is a need
for investigating the system response to the faults in the offshore grid. This
project intends to investigate such faults in the offshore wind power plants
connected by VSC-HVDC.
Real Time Digital Simulation (RTDS) has been used as it facilitates the
hardware in loop simulation. An industrial overcurrent feeder protection relay,
REF615 from ABB, was interfaced with the real time simulation model of the
test system. Thus, the relay coordination was experimentally verified as a part
of validation exercise.
1.5 Limitations
Only ac collector grid layout has been considered here for the wind power
plant. The turbine generators are assumed to be permanent magnet synchronous
generators equipped with full scale converters. Moreover, a simplified model
has been used for the wind turbine generator and its full scale converter instead
of the detailed model. The turbine, generator, and the generator side converter
are collectively modelled as a power source with a first order transfer function.
The focus here is on the operational behaviour of the grid side converter of the
WTG-FSC, the collector grid network and the VSC-HVDC transmission to the
grid.
The onshore grid has been modelled here as Thévenin’s equivalent voltage
source.
WPP and VSC-HVDC have been considered here as a single system. This
implies that the VSC-HVDC control is used to facilitate the grid integration of
the wind power plant. The onshore grid terminal is assumed to be the point of
common coupling where the grid code requirements have to be fulfilled. These
assumptions are justified when the WPP and VSC-HVDC are owned and
operated by a single entity. When the transmission is provided by the grid
operator, the grid operator may impose the grid code requirements to be
fulfilled at the offshore terminal as envisaged in [12], or they may continue to
operate in tandem to optimize the overall system.
Chapter 2 gives a brief introduction of wind turbine generators and the grid
connection of wind power plants using VSC-HVDC.
Chapter 3 describes the layout and modelling of the test system being
studied. Main circuit parameters for the system components have been derived
and discussed. A collector grid layout and the aggregation of wind turbines
have been described here. An improved controller for the offshore VSC-HVDC
terminal is presented for the wind power applications followed by the overall
control structure of the system.
20
Chapter 7 describes the hardware in loop simulation of the test system with
an industrial over-current relay. Different fault cases have been simulated. The
performance of the relay coordination in terms of the detection of fault events
and subsequent tripping has been presented. It corroborates the observation for
the relay coordination settings.
Finally, chapter 8 summarizes the conclusions of this project and lists some
of the areas for future research.
21
Moving mass of wind possesses kinetic energy. For a long time wind mills
and sails have been used for harnessing the wind energy. Nevertheless,
conversion to electrical energy is a recent development of the twentieth
century. Depleting fossil fuel reserves and the focus on sustainable
development through the use of renewable energy sources have been the key
motivators for the rapid development of wind energy conversion systems
(WECS) in the last couple of decades. Large wind turbine generators of the
order of 2–6 MW have been developed and the units of 10 MW sizes are under
development [27].
(2.1)
The volume of wind passing through area swept by the turbine blades in
a second is, . Therefore, the total mechanical power is,
(2.2)
It is impossible to extract all the kinetic energy from the wind. The fraction
of power harnessed by the wind turbine is given by its coefficient of
performance, Cp.
(2.3)
( ) (2.4)
(2.5)
( ) ( ) ,
where, ( )
23
( ) ( )
(2.6)
where, .
1 de g
0.5
Performance Coefficient (C )
p
0.4
5 de g 2 de g
0.3
1 0 de g
0.2
1 5 de g
0.1
2 5 de g
0
0 2 4 6 8 10 12 14 16
Tipspeed ratio ()
Equations (2.2)–(2.7) reveal that the power absorbed by the wind turbines
depends upon the operational speed of the turbine and the blade pitch angle. In
a variable speed wind turbine, the turbine speed can be controlled to achieve an
optimal tip speed ratio ( ), and therefore maximum efficiency can be achieved
over a range of wind speed. When the wind speed varies, the turbine rotor and
generator speed vary, while the torque remains fairly constant. Thus, the
24
(2.7)
26
Mechanical Electrical
MSC GSC
WTG#3
Gear PMSG
Unit
Full Scale Converter LCL Filter Transformer
Turbine with braking resistor
Figure 2.2 Wind Turbine, PMSG, FSC, L-C-L output filter and unit transformer.
Mechanical power available in the wind and the power that can be
harnessed depend upon the wind velocity and the operating point of the wind
turbine (2.3). For simulation studies, a model of wind can be represented by a
sum of average, ramp, gust and noise components as given by,
(2.8)
27
As described in next chapter, the wind turbine, drive train, the generator,
and the generator side converter are not modelled in detail, but they are
collectively modelled as a power source with first order transfer function.
Large wind power plants can be connected to the high voltage power
system grid through high voltage ac (HVAC) or high voltage dc (HVDC)
connection. Most of the operational wind farms are close to the shore and
hence they are connected using HVAC connection. For instance, Horns Rev
Wind farm uses 21 km of submarine cable and 36 km of onshore cable for the
HVAC transmission of 160 MW at 150 kV [35].
Recently some large wind power plants are being developed in the North
Sea, far from the coast. They need long distance cable transmission for grid
connection. A high voltage submarine cable has a large shunt capacitance given
by [36],
28
(2.9)
( )
SylWin
BorWin
HelWin
DolWin
Figure 2.4. Offshore wind power plants with VSC-HVDC connection (Source: TenneT TSO
GmbH).
The advantages of HVDC systems are fast and reversible power flow,
asynchronous and decoupled connection of two grids, power flow control and
power oscillation damping capabilities. Though a large number of large line
commutated converter (LCC) based HVDC systems are operational for bulk
power transmission and/or asynchronous connection between two grids, none
of them is associated with wind farms.
1.5
Q
MVAmax
1
Vc=1.15pu
0.5
Vc=1.0pu
0
P
Vc=0.85pu
-0.5
-1
The advantages of VSC-HVDC over the LCC-HVDC are listed below [39]:
(2.10)
(2.11)
Multi-valve
Ia,up
Sub-Module (SM) SM1 SM1 SM1
IC
SM2 SM2 SM2
T1
+
ISM Vc C SMnp SMnp SMnp
-
Lc
T2 Va Ia Vb
Vdc
VSM Vc
Lc
Since the multi-level output ac voltage has a lower harmonic content, hence
the tuned filters, which are mandatory in a two-level or three-level converters,
are not required in an MMC. The converter sub-modules are switched at a low
frequency, but the effective frequency turns out to be very high due to the large
number of sub-modules connected in series. Due to low frequency switching,
the overall losses are lower [43]. On the flip side, the number of IGBT switches
required for a given converter is double of that required in a two-level
converter.
The multi-level output ac voltage has a lower harmonic content and hence
the tuned filters, which are mandatory in a two-level or three-level converters
are not required. The converter sub-modules are switched at a low frequency,
but the effective frequency turns out to be very high due to the number of sub-
34
2.6 Summary
Wind power plants have been briefly introduced in this chapter. VSC-
HVDC transmission has several advantages over the high voltage ac
transmission, especially for the grid integration of large and remote offshore
wind power plants. Consequently, all such plants have been proposed to have
the VSC-HVDC connection. MMC-HVDC is the latest development in VSC-
HVDC transmission. However, this project does not involve the actual
converter design, and the two-level VSC-HVDC will be used in this project.
***
35
170 kV
#1 Coll Bus #1 150 kV
MV feeder #2 HV feeder #1 Xph1
Vc1 Offshore
VSC
#2 36 kV Coll. FB
Bus#2
Vdc1
36 kV Coll.
MV feeder #3 150 kV
Bus#3
Coll Bus #2 ±150 kV,
#3 1400A,
HV feeder #2 200km
MV feeder #4 HVDC Cable
#4 FA
Vdc2
36 kV Coll.
170 kV
400MW offshore WPP Bus#4 Onshore Grid
(Th- Eqvt.)
Feeder circuit breaker (CB) Onshore
o/c relay current transformer (CT) Vg VSC
400 kV
Figure 3.1. Single line diagram (SLD) of the test system (a 400 MW WPP with VSC-HVDC
connection to the grid).
Two-level voltage source converters have been considered here for the
VSC-HVDC transmission system. Sine-triangle modulation at the 39th
harmonic (i.e. 1950 Hz for 50-Hz ac system) switching frequency has been
assumed, which represents the first generation of the VSC-HVDC converter.
with the sidebands around them. The harmonic components in the output is
given by the expression [44],
( ) ( ) ∑ ( ) ( ) { ( )}
( ) (3.1)
∑ ∑ ( ) ( ) { ( ) ( )}
The triplen harmonic voltage components constitute the zero sequence and
hence they do not appear in the expression for the line-to-line voltage. The
harmonic currents can, however flow at these frequencies, as the grounded
filters provide the path for the zero sequence currents.
The admittance function of the filter shown in Figure 3.3 is given by (3.2).
38
( ) (3.2)
Frequency Spectrum
0.9
Fundamental
0.8 Component
0.7 Component at
Switching Frequency
0.6
Magnitude (pu)
0.5
0.4
0.3
0.2
0.1
0
0 1000 2000 3000 4000 5000 6000 7000 8000
Frequency (Hz)
Figure 3.2 Frequency spectrum of a two level voltage source converter (Modulation index=0.9).
R L
Two such filters, tuned at the 39th and 78th harmonic frequencies, are used
at each of the two VSC-HVDC terminals in this test system. They have the
quality factors of 25 and 6 respectively, and they inject 0.06 pu and 0.03 pu of
reactive power respectively. From these data, the resistance, inductance and
capacitance are calculated as described in Appendix A. The admittance versus
frequency characteristics of these filters are shown in Figure 3.4 and Figure 3.5.
39
Admittance (dB)
-20
-40
-60
90
45
Phase (deg)
-45
-90
2 3 4
10 10 10
Frequency (Hz)
-10
-20
Admittance (dB)
-30
-40
-50
-60
-70
90
45
Phase (deg)
-45
-90
2 3 4
10 10 10
Frequency (Hz)
Phase reactors are required to interface the PWM converter with the grid. It
provides the attenuation of current ripples, as the maximum peak-to-peak ripple
current is given by,
( )( ) (3.3)
where, , and
0 Filter end
-100
0.1 0.104 0.108 0.112 0.116 0.12
Voltage across phase reactor
200
kV
-200
0.1 0.104 0.108 0.112 0.116 0.12
Current through the reactor
1
0
kA
-1
0.1 0.104 0.108 0.112 0.116 0.12
Time (s)
Figure 3.6. Phase reactor voltage and current waveforms
Figure 3.6 shows the ripple currents through a 19.3 mH phase reactor
driven by a VSC with 300 kV dc link voltage at the switching frequency of
1950 Hz. A large phase reactor would mean a higher impedance to the ripple
current, and hence, lower current ripples. However, too high value would slow
down the dynamics of the converter. In this project a phase reactor of 0.12 pu
size has been used.
41
(3.4)
In other words is the time taken to charge the capacitors to the nominal dc
voltage level, when they are charged by the rated current. For the VSC-HVDC
system in this project, a time constant of 2 ms has been used [45], [46]. This
gives the capacitor size of 35.5 µF from each of the dc lines to the ground.
The 400-MW wind power plant is divided into four clusters. Each cluster
has fifteen WTGs installed on three radial feeders as shown in Figure 3.7(a).
There are five 6.7 MW turbines on each feeder, referred to as a string. Thus, the
total capacity of feeder becomes 33.5MW. The IEEE Working Group Report
[47] states that the underground feeder strings are generally rated for around 25
to 30 MW due to soil thermal conditions and practical cable sizes. Three WTG
feeder strings are connected to the same collector bus in parallel combination.
Under rated power generation conditions, the radial feeder current will
increase as the number of turbine connections increase along the cable length
42
towards the collector bus. Hence, the cable cross-section near the collector bus
should be larger than the cable cross-section at the remote end. Here three
different cable cross sections, viz. 95 mm2, 240 sq. mm2, and 400 mm2 have
been used as shown in Figure 3.7(a).
36 kV collector bus
1B 2B 3B 4B 5B
C12b C23b C34b C45b C5Tb
WTG Feeder #B
1C 2C 3C 4C 5C
C12c C23c C34c C45c C5Tc
WTG Feeder #C
Figure 3.7. Layout of a wind power plant and its aggregate model.
∑
, ∑ (3.5)
where, is the series impedance and is the shunt susceptance of the mth
section. is the equivalent series impedance, and is the total shunt
susceptance of the equivalent feeder.
Equation (3.5) is based upon the assumption that there are m WTGs
connected to the cable section m, and each of them contribute the same nominal
current to the cable. As the three feeder strings appear in parallel at the
collector bus, the equivalent feeder impedance, and susceptance,
as shown in Figure 3.7(c) are given by their parallel combination [48]. These
are given by,
(3.6)
The WTG feeders are connected to the 36-kV terminals of the three-
winding step-up transformer as shown in Figure 3.1. Such a connection is
inspired from [49]. The collector grid voltage was selected as 36 kV, instead of
the more popular 33-kV systems, in order to optimize the cable size for the
adopted power ratings. The 150-kV terminals of the three-winding transformer
are connected to the converter transformer through 150-kV high voltage (HV)
cable feeders.
The WTG end of the 36-kV medium voltage (MV) cable feeders are
connected to the delta winding terminals of the unit transformer, which has the
YnD5 winding configuration. Even the other end of the MV feeder is connected
to the delta winding terminals of the plant step-up transformer at the collector
bus. Thus, both the ends of the MV feeders in the WPP collector grid are
terminated to the delta winding terminals of the transformers, which pose high
impedance to the flow of the zeros-sequence currents. Therefore, the MV
feeders remain ungrounded. When there is a single line to ground fault, zero-
sequence currents are produced which cannot flow in an ungrounded system.
Consequently, the fault current is low but over-voltages of the order of 1.73 pu
or even higher in the case of arcing faults are produced [50].
44
A
B
C B
c1
A1
a1 b1 c1
C
B1 N C1 b1
A1 B1 C1
a1
I0 I0 I0
N
3I0
A
RN
(b)
(a)
Figure 3.8. Neutral grounding zig-zag transformer. (a) Winding configuration; (b) Phasor
diagram.
LCL Filter
L1 L2
36 kV
Chopper
Resistor
Vdc.lk
LCL Filter
Vdc.lk
Figure 3.9 Model of an aggregated WTG with its LCL filter and step-up transformer.
The grid side converter (GSC) is controlled to maintain the dc link voltage
balance by evacuating the excess power to the offshore grid. It is equipped with
an L-C-L filter, and the unit transformer in grounded wye-delta connection.
The grounded wye is on the low voltage (LV) side towards the GSC, and the
delta connection is on the medium voltage (MV) side. Such a connection
46
isolates the zero sequence impedance of the MV grid from the individual WTG
LV circuit and provides a solid ground reference for the WTG [47]. There is a
load-break switch to disconnect the WTG when required.
Positive sequence current control approach has been considered here for the
grid side converter (GSC) of the WTG-FSC system. Accordingly, for a given
transfer of active power, and reactive power, the positive sequence
current references of WTG-GSC are given by,
( )
(3.7)
( )
}
Kp
i +
Ki
+
x
vwt .
- -
w
i vwt .
x
Kp
i +
Ki x
vwt .
+ +
- - +
i w
vwt .
x
Figure 3.10. Proportional resonant current controllers for the WTG GSC.
47
( )( ) (3.8)
( )( ) (3.9)
- to
+ +
- +
(a)
Unit
WTG-GSC
Transformer
(Average Model)
LCL Filter 3.3 kV 36 kV DSOGI
to
AFLL
to
(b) (c)
Figure 3.11. WTG GSC (a) controller, (b) schematics and (c) WTG current and voltage signal
transformations.
[ ] [ ] (3.10)
[ ]
The -axis is aligned with the axis of phase A, while the -axis leads the -
axis by 90º For a set of balanced three-phase positive sequence
voltages the positive sequence components and have
the same magnitude as that of . The component is in phase with the
phase A voltage , and lags by 90º. Likewise, for a set of balanced
three-phase negative sequence voltages, the negative
sequence components and have the same magnitude as that of .
The component is in phase with the phase A voltage ; while the
component leads by 90º.
[ ] [ ][ ] (3.11)
[ ] [ ][ ] (3.12)
[ ] [ ] [ ] (3.13)
49
-
+ +
-
-
+ +
-
By Mason’s loop gain formula, the transfer functions of the SOGI-QSG for
the in-phase component along the -axis, and its quadrature component,
are given by,
( )
(3.14)
( )
( )
(3.15)
( )
( ) ( )
( )
| and ( )
| (3.16)
Once the instantaneous voltage components along the -axes, and their
90° phase-shifted components are available, the positive and negative sequence
components can be calculated using (3.11) and (3.12). The curve #3 represents
the frequency response of the positive sequence component along the -axis in
Figure 3.13
10
2
0
3
Magnitude (dB)
-10 1
-20
-30
(1) (2) (3) 0.5
-40
90
45 1&3
Phase (deg)
0
-45 2
-90
-135
-180
10 50 100 400
Frequency (Hz)
Figure 3.13. Bode plot of SOGI-QSG (Curve #3 is for the positive sequence components).
A positive sequence PLL has been developed using the positive sequence
voltage components along the -axes. Since the voltage vector is aligned
along the d-axis, the q-axis component is applied to the proportional integral
(PI) controller to get the frequency ( ) and the phase angle ( ) as shown in
Figure 3.14.
to +
d-q +
The onshore VSC controller (VSCC#2) regulates the HVDC voltage and
the reactive power (or ac terminal voltage) exchanged with the onshore grid. Its
block diagram along with the terminal schematic is shown in Figure 3.15.
Conventional vector control of currents in the dq- axes in the rotating reference
frame has been applied here. The converter terminal voltage ( ) are
related to the grid voltatge ( ) at the filter bus by Kirchhoff’s Voltage
Law (KVL) in the rotating reference frame by,
(3.17)
(3.18)
where, is the frequency, and are the resistance and inductance of the
phase reactor. The grid voltage ( ) is measured at the filter bus. It is
shown by the vector symbol, ( ) in Figure 3.15(b). The phase
reactor current ( ) flows into the converter, as shown by the three phase
symbol, .
( ) ∫( ) (3.19)
( ) ∫( ) (3.20)
52
+
−
+ +
+ + −
− −
+
+
− V/Q
Control
(a)
Vg
Onshore VSC
(b)
Figure 3.15. Onshore VSC-HVDC; (a) Controller block diagram; (b) Circuit schematic
( ) ∫( ) (3.21)
( ) ∫( ) (3.22)
controller has been added in the d-axis current controller in order to improve
the transient performance.
The basic function of the offshore VSC controller is to maintain the voltage
and the frequency in the offshore WPP grid. Since the frequency is predefined
as external reference to this converter, a PLL is not required [8], [10]. Likewise
the onshore VSC controller, this controller, too, can be modelled in the
synchronously rotating reference frame (or the dq frame given by the Park’s
transformation) and then the PI controllers can be used. However, separate
controllers are required when the positive and negative sequence current
controllers have to be implemented. The positive sequence PI controller is
described here as the basic controller; and the negative sequence current
controller will be described in Chapter 6.
( ) ∫( ) (3.23)
( ) ∫( ) (3.24)
( ) ∫( ) (3.25)
( ) ∫( ) (3.26)
When the WPP is operating, it injects the active and reactive power to the
offshore VSC-HVDC terminal. The corresponding current can be measured
and added to the current reference as feed-forward terms as explained in [10].
When the currents were directly measured and applied as feed-forward terms,
54
[ ] [ ] (3.27)
This ensures that the advantage that the voltage is always aligned along the d-
axis in the positive sequence; thereby leading to improved performance during
transients and recovery from faults.
The power frequency current drawn by the tuned filters can be calculated
by,
[ ] [ ][ ] (3.28)
[ ] [ ] [ ] [ ] (3.29)
55
+ − + −
− − − −
(a)
Vdc1
Rpr, Lpr
VSC1
WPP
(b)
Figure 3.16. Offshore VSC controller.
V*ac_WPP f*ac_WPP
Pref_WPP VHVDC1
HVDC-Volt Vac
& fac control
WPPC
V1*ac_WPP
ax
f1*ac_WPP
m
ij _
ij
P
P
Vac_WPP
droop
VSCC#1
fWTG Iac_WPP
PLL 6 FP
VSC#1
Filters
VSC#2
Filters
Figure 3.17. Overall control structure of the WPP with VSC-HVDC connection.
This figure shows the overall control scheme for the participation of the
offshore wind power plant in the onshore grid frequency control as well as low
voltage ride through. No communication is envisaged here. The dc reference
voltage of the HVDC system is varied as a function of the measured grid
frequency. The dc voltage rise is sensed by the offshore grid converter, which
responds by changing the offshore grid frequency. Thus, the onshore grid
frequency can be conveyed to the offshore grid through a point to point VSC-
HVDC link. The scheme is described in detail in the next chapter.
57
3.17 Summary
***
59
In the beginning, the VSC-HVDC, as well as the offshore WPP grid, was in
de-energized state. When the circuit breaker (CB) is closed, the onshore VSC-
HVDC terminal got connected to the grid through the converter transformer.
Though the VSC was blocked, the anti-parallel diodes in the VSC conducted,
and a large inrush current flowed in to charge the HVDC capacitors. The cable
capacitance and the dc capacitors on the dc side of the rectifier were charged to
the peak line to ground voltage levels, i.e. ±138.8 kV or 277.6 kV pole-pole
voltage when the ac side was connected to the 170 kV (line–line, rms) grid as
shown in Figure 4.1.
The initial magnitude of inrush current was limited by the impedance of the
grid, converter transformers and the phase reactors. Even then, pre-insertion
resistors were required to avoid the sudden current surge flowing to the VSC.
In this simulation, pre-insertion resistors of 1 k was used for a period of 70
ms. Then the onshore VSC was de-blocked so that the dc line voltages got
regulated to the nominal dc voltage level of 300 kV.
60
Table 4.1. Event list for the demonstration of the normal operating modes of the WPP with
VSC-HVDC connection
Time Event
0.00s All CBs are open. All controllers are disabled
0.05s Onshore grid CB is closed. Pre-insertion resistance is 1 k. By pass
resistance remains in circuit for 70 ms.
0.20s The onshore VSC is de-blocked. Its controller is enabled.
0.40s The offshore VSC is de-blocked and its controller is enabled. The
offshore converter transformer is connected by the circuit breaker.
0.50s The WTG controllers are enabled.
0.60s The WTG #1 breaker is closed. Other WTG breakers get closed
sequentially.
1.40s Power reference is set to 400MW. This power order gets divided to
the four aggregated WTGs. Maximum rate of change of power is
250MW/sec.
4.5s A single line to ground fault is applied at the point ‘FA’ on the
feeder connecting WTG 4. (The fault is not a part of normal
operation. It is included here just to show that the complete control
system can withstand a transient fault).
5.40s Power order is set to 0. Power order falls at the rate of 250 MW/sec.
8.40s The WTG1 circuit breaker is opened.
9.60s The WTG voltages are set to 0. WPP circuit breaker is opened.
9.80s The offshore VSC is blocked.
10.40s Onshore VSC voltage reference is set to 0.
10.90s Onshore VSC is blocked and the onshore grid transformer is opened.
After the VSC-HVDC voltage was stabilized, the offshore VSC was de-
blocked. Its controller ramped up the ac reference voltage and the offshore
voltage gradually built up. After the nominal voltage level had been attained in
the offshore-grid, the WTG cable strings were sequentially connected to the
collector bus in order to avoid undue oscillations. At this point of time, the
WPP was fully energized, and the WTGs were ready for synchronization.
Figure 4.2 shows the voltage and current waveforms under these conditions. A
61
small power flowed from the onshore grid to meet the no load losses of the
system.
1
Vac (pu)
0
-1
0 0.05 0.1 0.15 0.2 0.25 0.3
0.5
Iac (pu)
0
-0.5
0 0.05 0.1 0.15 0.2 0.25 0.3
1
Vdc (pu)
0.5
0
0 0.05 0.1 0.15 0.2 0.25 0.3
Idc (pu)
0.4
0.2
0
-0.2
0 0.05 0.1 0.15 0.2 0.25 0.3
Time (s)
Figure 4.1. Energization of the VSC HVDC system. Vac is the filter bus voltage of the onshore
VSC-HVDC terminal, Iac is the current through the onshore phase reactors, Vdc is the dc link
voltage, and Idc is the dc line current.
In this case, the WTGs were running at rated voltage but with no load
generation. First they had to get synchronized to the offshore grid voltage. The
positive sequence voltage was estimated from the terminal voltage using dual
second order generalized integrator (DSOGI) filters, and synchronization was
achieved using the frequency locked loop (FLL) [53], [54]. When the power
generation picked up, the dc-link voltage regulation set the power reference for
the WTG-GSC. However, the actual power control lied with the WTG, and
machine side converter controls. The reactive power reference might have been
set by an auxiliary terminal voltage regulation loop or it could be externally set.
In the simulated case, it was set to zero. Positive sequence current references
were generated from the estimated positive sequence voltage, and the active
and reactive power orders as per (3.7). Then, they were controlled using the
62
1
Vac (pu)
0
-1
1.28 1.285 1.29 1.295 1.3 1.305 1.31
0.5 Iac (pu)
0
-0.5
1.28 1.285 1.29 1.295 1.3 1.305 1.31
1.01
Vdc (pu)
1
0.99
1.28 1.285 1.29 1.295 1.3 1.305 1.31
0.05
0
Idc (pu)
-0.05
1.28 1.285 1.29 1.295 1.3 1.305 1.31
Time (s)
Figure 4.2. Waveforms when the offshore collector grid was energized and the WTG units were
connected. Vac ‒ the filter bus voltage of the onshore VSC-HVDC terminal; Iac ‒ the current
through the onshore phase reactors; Vdc ‒ the dc link voltage; and Idc ‒ the dc line current.
1
Vac (pu)
0
-1
3.28 3.285 3.29 3.295 3.3 3.305 3.31
1
0
Iac (pu)
-1
3.28 3.285 3.29 3.295 3.3 3.305 3.31
1.02
Vdc (pu)
1
0.98
3.28 3.285 3.29 3.295 3.3 3.305 3.31
-0.9
-1
Idc (pu) Pg (pu)
-1.1
3.28 3.285 3.29 3.295 3.3 3.305 3.31
Time (s)
Figure 4.3. Steady state operation at full load. Vac ‒ the filter bus voltage of the onshore VSC-
HVDC terminal. Iac ‒ the current through the onshore phase reactors; Vdc ‒ the dc link voltage;
and Idc ‒ the dc line current.
63
Figure 4.3 shows the ac voltage and current waveform at the onshore VSC-
HVDC terminal when the WPP was generating nominal 1 pu power. The dc
link voltage ripple was less than 1%, while there was significant ripple in the
dc current even at nominal power ratings. The dc current was measured
between the HVDC cable and the dc capacitors.
Figure 4.4 shows that the WTGs had to absorb the reactive power
throughout the operating range as the collector grid is capacitive in nature. It
also shows the impact of a transient single line to ground fault of 150 ms
duration at a 36 kV collector bus (for WTG#4).
During the single line to ground fault, power flow got disturbed for some
time and power output from WTG #1 also got affected. High ripples were
observed on the HVDC system during the fault, but they settled down to
nominal levels soon after the fault was cleared.
1
Pg (pu)
0.5
0
0 2 4 6 8 10
1
Pwtg1 (pu)
0.5
Qwtg1 (pu)
0
-0.5
0 2 4 6 8 10
1.5
1
0.5
Vdc (pu)
0
0 2 4 6 8 10
1.5
1
Idc (pu)
0.5
0
-0.5
0 2 4 6 8 10
Time (s)
Figure 4.4. Full operating range (with a single line to ground fault at 4.5 s).
64
In this step the reference power to the WTGs was set to zero and the power
generation was ramped down as shown in Figure 4.4. Then the whole plant was
shut down in a controlled way. First the WTGs were shut down, and then the
offshore VSC-HVDC terminal was blocked. Then the onshore VSC was
blocked. The dc system had trapped dc voltage which would take a long time to
discharge by itself. Discharge resistors had to be connected to ensure a quicker
discharge.
Traditionally the conventional power plants have been providing the grid
frequency support in terms of inertial response, primary, secondary and tertiary
frequency regulation in the event of power unbalances. With the increase in the
penetration of wind power in the power system, grid operators are putting
regulations for the participation of wind power plants in frequency regulation.
The German and Danish grid codes are briefly discussed here and then a
simulation study of grid frequency control in the wind power plant with VSC-
HVDC connection is presented.
generation. Wind power plant generation can be brought down by varying the
operating point through the control of pitch angle, and tip speed ratio, .
There are problems when there is under-frequency and the power generation
has to be ramped up. Since wind energy is not a controllable source of power,
power cannot be ramped up if it is already operating under maximum power
point tracking regime. De-rated operation (i.e. less than maximum available
wind power) has been proposed to provide margin for eventual frequency
support [22]. Deviations and amendments were provided in the Grid code for
offshore wind [12], whereby offshore wind power plant has to reduce power
generation during over-frequency conditions in the grid as shown in Figure 4.5.
When the grid frequency exceeds 50.1 Hz, power has to be reduced at the rate
of 98% per Hz drop in the grid frequency, and 25% per second of the active
power available at the moment. The unit should be disconnected after 10
seconds if the frequency remains at or above 51.5 Hz.
50.1 Hz fGrid
DP=98% of PM /Hz
DP
50
Set-point value at
Downward regulation
47 48 49 50 51 52 53
Frequency (Hz)
Figure 4.6. Frequency regulation with and without previous downward regulation (Denmark grid
code [13])
modify the frequency reference for the offshore grid. Therefore, if there is an
increase in the onshore grid frequency, the dc voltage is raised and eventually
the offshore grid frequency is raised. The grid converters in the WTGs sense
the frequency increase, and therefore, decrease their generation as per the pre-
set droop characteristics. This is shown in Figure 4.7(a).
f*ac V*dc
P* fg2
LFC-1 PLL
LFC-2
WPPC
(1+k2DVdc)f*ac (1+k1Df)V*dc
Vdc
fWTG Vgrid
(1-k3Df)P* VSCC#1 VSCC#1
PLL
6 FP
Filters
Filters
f*ac
P* fg2
LFC-1 Delay, Td PLL
WPPC
(1+k2DVdc)f*ac V*dc
fWTG Vgrid
VSCC#1 VSCC#1
(1-k3Df)P* PLL
6 FP
Filters
Filters
Delay, Td
fg2 PLL
WPPC
f*ac V*dc
Vgrid
VSCC#1 VSCC#1
(1-k3Df)P*
6 FP
Filters
Filters
1.005
Fgrid2 wn2
1
0.995
13 14 15 16 17 18 19 20 21
1.06
Vcc1est
1.03
1
13 14 15 16 17 18 19 20 21
1.005
FRMF wn1
1
0.995
13 14 15 16 17 18 19 20 21
1.02
PMF
1
0.98
13 14 15 16 17 18 19 20 21
0.85
Ps1 Psg
0.8
0.75
13 14 15 16 17 18 19 20 21
Time (s)
Figure 4.8. Frequency regulation through VSC-HVDC using the dc voltage and offshore
frequency for relaying – change of dc voltage, offshore frequency and the power flows.
Figure 4.8 and Figure 4.9. show the simulation results for this case. A
frequency change was simulated by introducing the step changes in the
frequency (Fgrid2) voltage source model for the onshore grid. The onshore
grid PLL measured the grid frequency (wn2). It was used to change the dc
reference voltage of the onshore VSC-terminal using a multiplication factor
(DCVMF). Consequently the HVDC voltage on the onshore terminal changed
(Vdc2). The offshore HVDC terminal voltage (Vdc1) changed as well. It was
compared with the nominal offshore voltage estimated (Vdc1est) for the
measured load current and the offshore frequency (wn1) was changed. The
WTG-FSC then changed the power reference to the WTG-FSC as per the pre-
set droop and frequency regulation was achieved.
The power generated, (Ps1) and hence injected (Psg) to the grid, changes
are shown in the Figure 4.8. It is represented by the curve FRC1 in Figure 4.10.
69
1.005
Fgrid2 wn2
0.995
13 14 15 16 17 18 19 20 21
1.02 DCVMF
0.98
13 14 15 16 17 18 19 20 21
1.05
Vdc2 Vdc1
0.95
13 14 15 16 17 18 19 20 21
1.06
Vdc1est
1.04
1.02
1
13 14 15 16 17 18 19 20 21
Time (s)
Figure 4.9. Frequency regulation through VSC-HVDC using the dc voltage and offshore
frequency for relaying – change of dc voltage, and estimation of the voltage change.
In the simulation study, a filter with 100 ms time constant was used at the
onshore frequency measurement. It was assumed to account for both the
filtering delay and the communication delay. The resultant power flow for
frequency regulation is shown by the curve FRC2 in Figure 4.10. .
70 0.995
13 14 15 16 17 18 19 20 21
0.8
FRC1
FRC2
0.79 FRC3
0.78
0.77
0.76
13 14 15 16 17 18 19 20 21
Figure 4.10. Comparison of the power flow change as a result of frequency regulation using the
three methods.
Since frequency control involves relatively slow variation of power and the
full response has to be achieved in a period of 30s, all three methods are
equally suitable.
When there is a fault on the onshore ac grid, the ac grid voltage at the point
of common coupling (PCC) dips, thereby reducing the power transfer
capability from the onshore VSC-HVDC terminal. Power flow to the VSC-
HVDC can be rapidly controlled by the other terminal when it is connected to
two strong power system grids. However, when it is connected to a wind power
plant, it is not so convenient. The rating of the VSC-HVDC is almost the same
as that of the wind power plant rating. Since the WPP power generation cannot
be brought down instantaneously, the excess power gets accumulated in the
VSC-HVDC system capacitance, thereby, leading to over-voltage in the dc
system.
71
According to the E.ON Netz Grid Code [11], large generating stations of
sizes 100 MW or larger must stay connected and provide voltage support to the
grid in the event of nearby faults for a period of up to 150 ms as shown in
Figure 4.11. The generating unit must remain connected as long as the
operating point (voltage and duration) remains above the limit Line 2. A
conditional disconnection is allowed if it the operating point lies between Line
1 and Line 2. Further the generating plant should be capable of providing
voltage support during grid disturbances.
Limit Line 1
Highest value of thethree L-L grid
Limit Line 2
100%
voltages
70%
45%
15%
Figure 4.11. Fault Ride Through (FRT) requirement of E.ON Netz Grid Code [11].
Reqd. Additional
reactive current
D IB/I n
Dead band
Slope ≥ 2.0 pu
-100%
Figure 4.12. Reactive current injection requirement for voltage support during grid disturbances.
Chopper controlled resistor is used to dissipate the excess power, and thus
limit DC voltage rise within safe levels; while the WTGs are signaled to reduce
their generation as quickly as possible [46]. It is installed in HVDC Nord E.ON
1 (now referred to as BorWin 1) to prevent dc over-voltages by temporarily
dissipating the excess power [55]. In variable frequency drives, it is referred to
as braking resistor and is used to dissipate the braking energy [56]. A similar
arrangement is provided in the WTG-FSC to limit the dc link over-voltages
[57]. In this section the performance of the chopper resistor in the FSC is
evaluated for controlling the HVDC system over-voltage during low voltage
faults in the onshore grid.
( ) (4.1)
where, is the power transferred from the converter to the grid and is the
reactance between the converter and the grid. and indicate the voltage and
the voltage phase angle at the converter and the grid terminals, which are
73
√ ∫( ) (4.2)
( )
(4.3)
The operation of chopper controlled resistor is similar in the case of the full
scale converters of the WTGs and the VSC-HVDC. Hence the equations (4.2) –
(4.4) are applicable to all of them, with their respective ratings and limits.
A simulation study was carried out on the test system to observe the
overvoltage during a severe fault in the onshore grid. The onshore grid voltage
drop to 0.01 pu was simulated. Due to the transformer impedance between the
74
fault point and the filter bus and the reactive current injection from the VSC-
HVDC, the filter bus voltage showed a higher residual value.
The rms voltage profile at the VSC-HVDC terminal filter bus is shown in
Figure 4.13(a).
1
AC voltage (pu)
0
4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8
(a)
2
HVDC voltage (pu)
1.5
DC voltage at onshore VSC-HVDC terminal
1
0.5
4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8
1
To offshore VSC-HVDC
Power-flow (pu)
To onshore grid
0.5
0
4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8
(b)
Figure 4.13. FRT using fast communication to block the WTG-FSCs during the fault in the
onshore grid. (a) AC voltage at the HVDC filter bus; (b) DC voltage rise and power flow during
the fault.
Because of the fault, there was a rapid increase in the dc voltage. The dc
overvoltage was detected and a power ramp down command was
communicated to the WTG-GSCs. A discrete delay of 8 ms was assumed for
communication delay in this study. Therefore, the power injection from the
offshore grid could not be stopped immediately, but only after the
communication delay, as shown in Figure 4.13 (b). As a result of this, the peak
transient dc voltage was 1.51 pu. When the communication time delay was
increased to 10 ms, the overvoltage was 1.55 pu.
Apart from the FRT using fast communication, two additional methods
have been described in literature. In one of them, the offshore grid frequency is
raised fast and the power reduction by the WTGs depend upon their controls
similar to the droop control to reduce the power output as the terminal
frequency increases. The WTGs have to sense the frequency rise, and
accordingly, ramp down the power reference to the WTG-GSCs. Thus, this
depends very much upon the times taken by the PLLs in the WTG-GSCs to
note the changed frequency, and then the time taken by the WTG-GSC
controllers to reduce the output power. The WTG-GSC is assumed to be
capable of fast power reduction, by virtue of chopper resistors on their dc link.
In the long term, the turbine operating point is changed to reduce the
generation.
2
HVDC voltage (pu)
1.5
DC voltage at onshore VSC-HVDC terminal
1
0.5
4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8
1
To offshore VSC-HVDC
Power-flow (pu)
To onshore grid
0.5
0
4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8
Figure 4.14. FRT of WPP with VSC-HVDC connection using offshore grid frequency increase.
76
In the other method, the offshore grid voltage is ramped down fast such
that the power-flow in the offshore grid is impaired and the WTG-FSCs cannot
inject power into the offshore grid.
In the simulation for this case, the offshore grid voltage was rapidly
ramped down when the offshore VSC recorded the voltage rise. Power-flow to
the HVDC terminal decreased rapidly and the maximum dc over-voltage was
limited to be 1.26 pu as shown in Figure 4.15. Even the power recovery after
the onshore grid voltage recovered was fast in comparison to the previous two
cases.
1.5
DC voltage at onshore VSC-HVDC terminal
1
0.5
4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8
1
To offshore VSC-HVDC
To onshore grid
0.5
0
4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8
Figure 4.15. FRT of WPP with VSC-HVDC connection using offshore grid voltage reduction.
4.4 Discussion
In all these cases, it was presumed that the WTG-FSC had some means,
like the chopper resistors or energy storage, which could absorb the excess
energy that could not get evacuated by the WTG-GSC.
4.5 Summary
This chapter described the different operating modes of the WPP with
VSC-HVDC connection under normal conditions. Later the control modes for
providing frequency regulation support to the grid and the fault ride through
during low voltage faults in the grid are demonstrated.
***
79
This chapter analyses faults in the offshore collector system grid. First a
simple numerical method is proposed to get approximate values of the fault
current levels under different operating conditions. Then the EMT simulation is
run to ascertain the actual fault currents and test the coordination of the over-
current relays at the strategic locations in the collector system.
5.1 Introduction
Most of the studies on WPP protection are focused on their response to grid
disturbances and low voltage fault ride through requirements imposed by the
80
grid operators [15], [60]–[62]. Several other studies address the impact of
distributed generation on the protection and relay coordination in the
distribution system [63], [64]. Reference [65] describes a protection scheme
using IEC-61850 process bus communication for the adaptive setting and
coordination of protective devices in smart grids with inverter connected
distributed power generation. An integrated protection and control system for
wind farms is presented in [66] using the IEC-61850 communication and a
centralized relaying unit with parallel-processing ability.
Apart from the limited short circuit current capability of the inverters, their
dependence upon the controller, PLL, and terminal voltage for synchronization
affect their response to short circuit faults. If the converter current exceeds
permissible limits the converter switching gate pulses are momentarily blocked.
The harmonic levels in the terminal voltage and current waveforms increase
due to the transients and disturbances as well as the non-linear response from
the converters.
When there is a short circuit fault in a feeder, the over-current relay should
trip the circuit breaker and isolate the faulted section. The following points are
particularly helpful in the relay coordination procedure:
III. All the power electronic converters are capable of limiting their
current output to their over-current limits, which is assumed here to be
1.10 pu for the WTG-GSC’s and 1.15 for the VSC-HVDC converter.
Relay co-ordination studies are done to set the pick-up current (Ipick-up) and
time dial setting such that proper discrimination is attained for the different
types and strengths of faults. As per, IEEE Std. C37-112 [68], the over-current
relay trip time, t(I), for the relay current transformer (CT) current ‘I’ is given
by (5.1),
( ) ( )
(5.1)
( )
4
3.5
Pick-up Current Ratio (M)
3
2.5
2
1.5
1
0.5
0
0 0.1 0.2 0.3 0.4 0.5
Relay Pick-up Time (s)
Figure 5.1. Very inverse characteristics of the over-current relay (IEEE Std. C37-112) [69].
The results for these six cases are summarized in Table 5.1 and Figure 5.3.
Fault currents are given in per unit values with the base current defined
corresponding to the MVAs of their respective sections, as shown in Figure
5.2. Therefore, 1-pu current in the converter transformer section will be
equivalent to 2-pu current in the high voltage (HV) feeder section and 4-pu
current in the medium voltage (MV) feeder section. Consequently, the per unit
fault current appears to be higher for the faults in the MV feeder, compared to
those for the faults in the HV feeder.
83
Transformer
Conv.
R IHVCT
WTG#3
R VSC_HVDC
Iw4 IMVCT FB
R
FA
WTG#4
Table 5.1. Fault Current and its components through different sources and CTs.
0
1 2 3 4 5 6
0
1 2 3 4 5 6
Figure 5.3. Estimated fault and CT currents for the short-circuit faults at FA and FB.
Theoretically, the HV feeder will carry the same fault currents for both the
fault locations. Though the fault currents are more than twice the nominal
currents, there is no discrimination between the three-phase faults on the MV
feeder and those on the HV feeder. Therefore, additional information like the
pick-up of the MV feeder relay might be used to block the tripping of HV
feeder relay for the faults detected on the MV feeder. In absence of such
information, time grading of the HV and MV feeder relays might be used. The
HV feeder might be set with higher time multiplier setting such that it trips in a
longer duration, with a margin long enough to ensure that the MV feeder relay
would have tripped its circuit breaker and the fault would have been isolated if
it were on the MV feeder. However, it would be a slow relay for the faults on
the HV feeder.
In the fault simulation studies for the relay coordination, the over-current
relay pick-up current was heuristically set at 1.25-pu levels for both the MV
and HV feeder sections .The trip time was multiplied by 50 ms.
85
Out of these, the triple line to ground (LLLG) fault and triple line (LLL)
fault are the symmetrical faults. They would be identical in the cases where the
zero sequence components are completely absent.
The studies were carried out with fault resistance of 0.01 pu (1%) and 0.20
pu (20%). The faults were separately applied at the points FA on the MV feeder
for WTG #4, and at the point FB on the HV feeder #2. Since the objective was
to demonstrate the relay performance, breaker tripping operation was not
simulated.
A single line to ground (SLG) fault was applied for 150 ms at FA on the
MV feeder. The fault current waveforms along with the pick-up and trip of the
relays are shown in Figure 5.4. The MV relay picked up (i.e. its internal output
is greater than 0.95) at 4ms, and the HV feeder relay picked up at 27ms. In the
simulated period of 150 ms, it reached a maximum of 0.308. This implied that
it would have tripped in 487 ms, if the fault had been persistent.
The peak fault current was 11.59 pu, while the MV feeder relay observed a
peak fault current of 10.55 pu. However, Fourier analysis shows that the
fundamental component was only 8.77 pu for the fault current, and 7.93 pu for
the current through the MV feeder relay CT. The peak fault current in the HV
feeder relay was 3.61 pu, and its fundamental component was 2.39 pu.
86
10
I_fault (pu)
-10
3.95 4 4.05 4.1 4.15 4.2 4.25
10
I_MV (pu)
-10
3.95 4 4.05 4.1 4.15 4.2 4.25
4
2
I_HV (pu)
0
-2
-4
3.95 4 4.05 4.1 4.15 4.2 4.25
1.5
MVR_trip
1
OC Relay
MVR_pk_up
0.5 HVR_pk_up
0
3.95 4 4.05 4.1 4.15 4.2 4.25
Time (s)
Figure 5.4. Fault current and relay trip signal corresponding to a SLG fault at FA for 150 ms.
Table 5.2. Comparison of estimated* and simulated fault currents for LLLG Faults
Figure 5.5 shows the HVDC voltage and power oscillations during the SLG
fault. The peak voltage is recorded at 1.49 pu, and the minimum power at 0.37
pu during the fault. The power outputs from the four WTGs are shown as well.
Even though the fault is on the feeder containing WTG #4, all other WTGs get
adversely affected. The system recovered only after the fault had been cleared.
87
1.5
Vdc2 (pu)
1.2
1
0.8
0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1
0.8
Phvdc
0.6
0.4
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
P_wtg (pu)
1
0.8
Figure 5.5. HVDC voltage, power and WTG power generation during the SLG fault at FA.
The fault current and the current through the MV feeder CT for a three-
phase to ground fault at FA on the MV feeder #4 are shown in Figure 5.6.
The LLLG fault was applied for 300 ms. The peak fault current was 8.4 pu,
while the MV feeder relay observed a peak fault current of 6.8 pu. The peak
fault current in the HV feeder relay was 3.3 pu as shown in Figure 5.7. The
maximum dc overvoltage was recorded at 1.22 pu, which is much lower than
1.48 pu in the case of SLG fault. The power flow however dropped down to 0.
Even the WTG power generation recovery was found to be slower than that in
the case of the SLG fault described earlier.
(i) Fault Currents (in p.u.) (ii) Current through MV CT (in pu)
10 10
Ph. A Ph. A
5 5
0 0
-5 -5
-10 -10
4 4.1 4.2 4.3 4 4.1 4.2 4.3
10 10
Ph. B Ph. B
5 5
0 0
-5 -5
-10 -10
4 4.1 4.2 4.3 4 4.1 4.2 4.3
10 10
Ph. C Ph. C
5 5
0 0
-5 -5
-10 -10 4.
4 4.1 4.2 4.3 4 4.1 4.2
3
Time(s) Time(s)
Figure 5.6. LLLG fault at FA. (i) Fault currents; (ii) Fault current through the MV CT.
(i) Current through HV CT (in pu) (ii) Voltage and Power (in pu)
4 1.4
Ph. A (a) Vdc2
2 1.2
0 1
-2 0.8
-4
4 4.1 4.2 4.3 4 4.1 4.2 4.3 4.4
4 1
Ph. B
(b) Phvdc
2
0.5
0
0
-2
-4 -0.5
4 4.1 4.2 4.3 4 4.1 4.2 4.3 4.4
4 1.5
Ph. C (c) Pwtg
2 1
0 0.5
-2 0
-4 -0.5
4 4.1 4.2 4.3 4 4.1 4.2 4.3 4.4
Time(s) Time(s)
Figure 5.7. LLLG fault at FA. (i) Fault currents through the HV CT; (ii) HVDC voltage; power
and WTG power generation curves.
89
The fault and CT current waveforms during the SLG fault and the LLLG
fault separately applied at FB on the HV feeder #2 are shown in Figure 5.8.
Their peak amplitudes during the fault and the corresponding fundamental
component values have been compiled in Table 5.2.
Even though the peak amplitudes of the fault current were of the order of
8.6 pu for the SLG fault and 7.1 pu the for the LLLG fault, the low
fundamental component content implied the high amount of harmonic
components, which was also obvious from the waveforms in Figure 5.8. The
low fundamental component affected the fault detection and the relay trip times
were observed as 273 ms, and 343 ms after the fault incidence for the SLG and
LLLG faults respectively.
I_fault (pu)
4
0 0
-5 -4
-8
4 4.02 4.04 4.06 4.08 4 4.02 4.04 4.06 4.08
2 2
I_MV (pu)
I_MV (pu)
0 0
-2 -2
4 4.02 4.04 4.06 4.08 4 4.02 4.04 4.06 4.08
5
5
I_HV (pu)
I_HV (pu)
0 0
-5
-5
4 4.02 4.04 4.06 4.08 4 4.02 4.04 4.06 4.08
Time (s) Time (s)
Figure 5.8. Fault and CT current waveforms for the SLG and LLLG faults at FB. Only Phase A
waveform is shown for the LLLG fault.
All different types of faults at FA and FB were simulated for the different
cases. The trip time response of the relays were recorded and plotted as shown
in Figure 5.9 for the fault resistance of 1% (i.e. 0.01 pu) and in Figure 5.10 for
the fault resistance of 20% (i.e. 0.20 pu). In both the cases, the SLG faults,
which are the most common faults in the power system, got detected fastest of
all. The timings for the different faults are tabulated in Tables 5.3 and 5.4.
90
250
50 Case - 5
Case - 6
0
SLG LLG LLLG LL LLL
Type of Fault
300 Case - 1
250 Case - 2
200 Case - 3
150 Case - 4
100
Case - 5
50
Case - 6
0
SLG LLG LLLG LL LLL
Type of Fault
Figure 5.9. Relay trip times for the different faults at FA and FB in different cases when the fault
resistance was 1%.
300
Case - 1
250
Case - 2
200
Case - 3
150
Case - 4
100
Case - 5
50
Case - 6
0
SLG LLG LLLG LL LLL
Type of Fault
600 Case - 1
500 Case - 2
400 Case - 3
300 Case - 4
200
Case - 5
100
Case - 6
0
SLG LLG LLLG LL LLL
Type of Fault
Figure 5.10. Relay trip times for the different faults at FA and FB in different cases when the
fault resistance was 20%.
91
Table 5.3 Over-current relay trip time (in ms) for different faults in different cases with 1% fault
resistance.
Fault Relay Case #1 Case #2 Case #3 Case #4 Case #5 Case #6
MV 46 45 47 46 46 58
SLG
HV 174 160 150 160 147 140
MV 72 91 86 63 71 62
LLG
HV 192 226 202 198 212 205
MV 278 236 228 219 247 196
LLLG
HV 328 360 313 382 365 394
MV 135 135 125 133 126 134
LL
HV 363 361 314 308 299 354
MV 233 236 284 215 257 201
LLL
HV 325 388 322 410 374 388
HV Relay Over-reach (Times greater than 500 ms are projected values)
SLG HVx 467 386 648 397 739 1134
LL HVx 486 1250 367 663 666 759
Table 5.4 Over-current relay trip time (in ms) for different faults in different cases with 20%
fault resistance.
Fault Relay Case #1 Case #2 Case #3 Case #4 Case #5 Case #6
MV 53 222 225 215 218 217
SLG
HV 273 273 211 283 214 242
MV 71 154 157 163 165 196
LLG
HV 231 295 220 501 321 458
MV 185 281 297 335 364 375
LLLG
HV 343 372 252 809 561 824
MV 136 146 153 137 142 144
LL
HV 479 494 468 452 469 557
MV 236 159 294 149 150 207
LLL
HV 418 554 456 674 559 594
HV Relay Over-reach (Times greater than 500 ms are projected values)
SLG HVx 467 x x x x x
LL HVx 486 1022 712 929 704 728
Table 5.5 Mean trip time of the over-current relay (in ms) and the corresponding standard
deviation as a percentage of mean for the different faults in different cases.
Fault at FA, Rf=1% Fault at FB, Rf=1% Fault at FA, Rf=20% Fault at FB, Rf=20%
Mean
Std Dev. Mean Std Dev. Mean Std Dev. Mean Std Dev.
(ms)
SLG 48 9% 155 7% 192 32% 249 12%
LLG 74 15% 206 5% 151 25% 338 32%
LLLG 234 11% 357 8% 306 21% 527 43%
LL 131 3% 333 8% 143 4% 486 7%
LLL 238 11% 368 9% 199 27% 543 16%
92
Table 5.5 shows the mean and the standard deviation of the trip times for
the faults in different cases. The low standard deviation indicates that the relay
trip times do not vary much in the different cases. Moreover, the trip times are
longer in the symmetrical fault cases due to low magnitude of the fundamental
component as was observed in the previous cases.
Table 5.3 and 5.4 reveal some of the cases when the HV feeder relay
tripped unduely. SLG and LL faults are listed here, as these two faults had a
strong influence on the HV feeder relay getting excited. When the fault
resistance was 0.01 pu, the HV feeder relay tripped within 367 ms for an LL
fault in case #3. Though the the over-reach tendency of the HV feeder relay
was reduced when the fault resistance was 0.2 pu, it picked up within 467 ms
for an SLG fault in case #1.
The tabulated results show the HV feeder relay trip times for the cases
when they were tripping within the fault simulation time of 500 ms. For other
cases, the internal output of the relay has been projected to estimate the
probable trip time of the relay if the fault had been persistent.
The relay may also be made slower by increasing the time multiplier
setting. However, such changes will increase the relay trip time for all the fault
cases.
The algebraic addition of the current contribution from all the converters
gave an approximate estimate of the fault current levels. Table 5.2 compares
the estimated and simulated results. There were significant differences between
them. Moreover, the fundamental components of the fault currents were
significantly lower than their peak components, due to the presence of
harmonics. For instance, in the case of an SLG fault at FA, the fundamental
components were approximately matching the estimated values, with a
maximum error of 17%. The maximum instantaneous values were following
the trend, but they were on the higher side by an error of up to 55%.
On the other hand, for the symmetrical LLLG fault case, the maximum
instantaneous values were matching with the maximum error being 16%. The
fundamental component was much lower as the error varied in the range of 52-
72%. Further analysis revealed that the fundamental component of the current
from the VSC-HVDC converter was in the range of 0.58 to 0.69 pu against the
1.15 pu as assumed in the simplified calculations. This error itself would
introduce an error of about 1 pu in the HV feeder CT and 2 pu in the MV
feeder CT as the current bases change.
The comparison was worse for the faults on at FB the HV feeder. On one
one hand, the maximum instantaneous peak values of the fault currents were
higher by 91-121% for the SLG fault, and by 58-82% for the LLLG fault. On
the other hand the maximum fundamental components were lower by 45-53%
for the SLG faults. For the LLLG fault at FB, the fundamental component of
the fault current and the HV feeder CT current were lower by 60% and 50%
respectively, while that of the MV feeder CT was lower by 90%. Moreover, in
this case, the fundamental component was very low at only 0.11 pu while the
peak was on the higher side at 1.9 pu against the estimated value of 1.1 pu for
the MV feeder CT
situation. The harmonic analysis of the currents during the fault and the role of
the VSCs as well as other components were not investigated further.
The results were, thus, very much different from those of the synchronous
machines. The latter are typically characterized by the sub-transient and
transient time constants, which indicate their response to short circuit
conditions. Simulation results, thus, emphasize that conventional fault analysis
techniques would not be applicable as the converter current response was very
different from those of the rotating machines. Therefore, a detailed EMT
simulation analysis with proper representation of the converter PLL and
controller dynamics is necessary for the thorough analysis of fault currents and
relay co-ordination.
5.6 Summary
The relay coordination in this study was achieved on the basis of nominal
current levels as the offshore grid had a radial network topology. The relay trip
times were quite long in some cases, which could be improved on the basis of
the EMT simulation results. The low standard deviation of the relay trip times
in different operating cases indicate the critical role of the VSC-HVDC
converter in the relay coordination.
***
95
This chapter presents the use of the power electronic converters to control
the injection of negative sequence currents in the offshore grid such that the
power oscillations can be minimized. The WTG-FSCs are controlled to inject a
constant active power using both the current sequences depending upon the
terminal voltage. The VSC-HVDC converters control the negative sequence
currents to minimize the power oscillations in the HVDC system, thereby
minimizing the dc voltage oscillations.
6.1 Introduction
maintain the voltage reference like an infinite bus, such that the generated
power can be collected [75].
[ ] [ ][ ]
( ) ( ) (6.1)
[ ] [ ][ ]
( ) ( ) (6.2)
( ) ( ) (6.3)
and,
( ) ( ) (6.4)
Then, in terms of the sequence components of the voltage and the current,
the expression for the instantaneous active and reactive power ( )
can be written as,
( )( ) (6.5)
(( ) ( ) ) (( )
( ) )
[( )( ) ( )( )
( )( )
( )( ) ] (6.6)
Thus, under unbalanced operating conditions when both the positive and
negative sequence voltages and currents are present, the expression for the
active power, which is the real part of (6.6), comprises of an average power
, and oscillatory cosine and sine terms ( ) as given below,
( ) ( ) (6.7)
where,
( )
( )
( )
98
[ ] [ ] [ ] (6.8)
[ ]
[ ] [ ] [ ][ ]
Or,
( ) ( )
[ ] [ ][ ] (6.9)
( ) ( )
Thus, the active and reactive power references are not required in this
formulation. It is an advantage as the offshore VSC-HVDC does not have
information about instantaneous active and reactive power at the point of
common coupling (PCC). This converter is merely controlled to maintain the
positive sequence voltage at the specified nominal value at the PCC, under
normal operating conditions, irrespective of the power-flow levels.
When the negative sequence controllers are enabled, the negative sequence
current references are generated as per (6.9). A separate negative sequence
current control loop is written (in the rotating reference fame) as follows,
99
( )
(6.10)
∫( )
( )
(6.11)
∫( )
The terms for the voltage drop across phase reactor ( ) are negative
in (6.10)–(6.11) as compared to those in (3.20)–(3.21) for the positive sequence
current control. This is due to the fact that negative angle ( ) is used in the
Park’s transformation and the negative sequence current has apparently
negative frequency. The phase angle ( ) is the one obtained from the positive
sequence PLL.
Separate current controller loops are employed for the positive and
negative sequence current control in the rotating reference frame (dq- axes)
used for the VSC-HVDC converter control as shown in Figure 6.1. The
positive sequence controller is essentially the same as the one in Figure 3.16, as
only positive sequence is being controlled in the normal operating mode. When
the negative sequence controller is enabled, the negative sequence current
references are generated, and they are added to the positive sequence current
references. The positive and negative sequence voltage references for the
converter cannot be added directly as the two reference frames are rotating in
opposite directions. Hence, the two sets of voltage references are converted into
the phase variables by using inverse Park’s transformation and then added
together.
+ d-q
to
+ − + −
- − − − abc
+
d-q
to
+ −
− − abc
Vdc1
Rpr, Lpr
VSC1
WPP
(b)
Figure 6.1. Offshore VSC-HVDC controller with negative sequence current (a) Controller block
diagram; (b) Schematic.
( ) (6.12)
( ) (6.13)
(6.14)
(6.15)
The denominator in (6.12) and (6.13) is the difference between the squared
magnitudes of the positive and negative sequence voltages. During a fault, the
positive sequence voltage tends to decrease while there is significant amount of
negative sequence voltage. Thus, the denominator may be very small; thereby
101
(6.16)
( )
(6.17)
It should be noted here that (6.16) and (6.17) replace (6.12) and (6.13) only
for the duration while the NSCC is blocked due to high proportion of the
negative sequence components ( ) in the terminal voltage as described
above. With this replacement, (6.14) and (6.15) are used to get the overall
current references.
(W1H0).
3. Negative sequence controller was enabled only in the VSC-HVDC
(W0H1).
4. All the negative sequence controllers are disabled (W0H0).
Figure 6.2 shows the effect of the negative sequence current controllers on
the dc over voltage in the VSC-HVDC transmission system.
The peak DC line voltage overshoot was reduced to 1.15 pu for the case
W1H1, while it was 1.46 pu, 1.22 pu, and 1.52 pu for the cases W1H0, W0H1,
and W0H0 respectively.
1
0.75
0.5
3.95 4 4.05 4.1 4.15 4.2 4.25
1.5
W1H0
1.25
Vdc (pu)
1
0.75
0.5
3.95 4 4.05 4.1 4.15 4.2 4.25
1.5
W0H1
1.25
Vdc (pu)
1
0.75
0.5
3.95 4 4.05 4.1 4.15 4.2 4.25
1.5
W1H1
1.25
Vdc (pu)
1
0.75
0.5
3.95 4 4.05 4.1 4.15 4.2 4.25
Time (s)
Figure 6.2 DC link voltage over-shoot in the VSC-HVDC system for SLG fault at FA for the
cases: W0H0, W1H0, W0H1, and W1H1.
were enabled. However, it was observed that the average power transferred to
the VSC-HVDC during the fault was higher in W0H1 than that in W1H1. The
reason is that the WTG-GSCs went into current limit control mode, and the
current references given by NSCC were scaled down, thereby limiting the
output power during the fault.
The excess power which could not be evacuated to the VSC-HVDC would
have to be dissipated in the WTG-FSC chopper resistors. Power and voltage
oscillations were higher and the damping was poor when the NSCCs in the
WTG-GSCs were disabled.
0.8
0.6
0.4
0.2
3.95 4 4.05 4.1 4.15 4.2
1 W1H0
0.8
Ps1 (pu)
0.6
0.4
0.2
3.95 4 4.05 4.1 4.15 4.2
W0H1
1
0.8
Ps1 (pu)
0.6
0.4
0.2
3.95 4 4.05 4.1 4.15 4.2
W1H1
1
Ps1 (pu)
0.8
0.6
0.4
0.2
3.95 4 4.05 4.1 4.15 4.2
Time (s)
Figure 6.3. Power flow to the offshore VSC-HVDC terminal during the SLG fault at FA for the
cases: W0H0, W1H0, W0H1, and W1H1.
Figure 6.4 shows the three-phase voltage waveforms at the filter bus of the
offshore VSC-HVDC for the four cases during the SLG fault at FA. A
comparison of the cases W1H1 and W0H1 against W1H0 and W0H0 reveals
that the NSCC on the VSC-HVDC was more effective in reducing the high
104
AC voltage waveform
2 W0H0
Vs1 (pu)
-2
3.95 4 4.05 4.1 4.15 4.2
2 W1H0
Vs1 (pu)
-2
3.95 4 4.05 4.1 4.15 4.2
2 W0H1
Vs1 (pu)
-2
3.95 4 4.05 4.1 4.15 4.2
2 W1H1
Vs1 (pu)
-2
3.95 4 4.05 4.1 4.15 4.2
Time (s)
Figure 6.4. Grid voltage at the offshore VSC-HVDC terminal during the SLG fault at FA for the
cases: W0H0, W1H0, W0H1 and W1H1.
Table 6.1. Effect of NSCC on the peak values of voltages, currents and power flow during SLG
fault at FA
W1H1 W1H0 W0H1 W0H0
Case
Min Max Min Max Min Max Min Max
DC line voltageVDC 0.79 1.15 0.67 1.46 0.80 1.22 0.59 1.52
Power-flow to VSC-HVDC 0.51 0.97 0.30 0.97 0.66 1.07 0.34 0.99
AC voltage (at HVDC filters), Ph. A −1.31 1.35 −2.20 2.36 −1.42 1.46 −2.49 2.37
AC voltage (at HVDC filters), Ph. B −1.26 1.29 −1.75 1.63 −1.47 1.35 −1.61 1.46
AC voltage (at HVDC filters), Ph. C −1.14 1.14 −2.37 2.32 −1.01 1.49 −2.40 2.40
Neg. Seq. d-axis current −0.15 0.52 −0.08 0.78 0.00 0.59 −0.05 0.83
Neg. Seq. q-axis current −0.28 0.30 −0.04 0.21 −0.36 0.06 −0.48 0.22
0
Idn ref
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1
W0H0
0.5
Idn (pu)
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1
W1H1
0.5 Iqn ref
Idn (pu)
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1
W0H0
0.5
Idn (pu)
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
Time (s)
Figure 6.5. Negative sequence d and q axes currents during the SLG fault at FA for the cases:
W1H1 and W0H0.
Figure 6.5 shows the negative sequence current flows during the SLG fault
at FA in the cases W1H1 and W0H0.
106
0.5
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1
W0H0
0.5
Idp (pu)
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1
W1H1
0.5
Iqp (pu)
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1
W0H0
0.5
Iqp (pu)
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
Time (s)
Figure 6.6. Positive sequence d and q axes currents during the SLG fault at FA for the cases:
W1H1 and W0H0.
NSCC brought down the d-axis negative sequence current to a level less
than 0.52 pu compared to 0.83 pu when it was disabled. Although the NSCC
had only a small impact on the q-axis negative sequence current, it showed less
oscillation during the fault and during post fault recovery. Without the NSCC,
the negative oscillations continued for some time even after the fault had been
cleared.
Though the same positive sequence controllers were used in both cases,
enabling the negative sequence components led to a reduced level of
oscillations in the positive sequence current as shown in Figure 6.6. This
signified an overall improvement in the system performance.
107
W1H1
0.5
0
Vdn
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1 Vdp W0H0
0.5
Vdp , Vdn (pu)
0
Vdn
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1 W1H1
Vqp
0.5
Vqp , Vqn (pu)
0
Vqn
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
1 W0H0
Vqp , Vqn (pu)
Vqp
0.5
0
Vqn
-0.5
3.95 4 4.05 4.1 4.15 4.2 4.25 4.3
Time (s)
Figure 6.7. Positive and negative sequence d- and q axes voltage components for the SLG fault
at FA for the cases: W1H1 and W0H0.
108
The dc voltage overshoots for the different fault cases, namely LLG, LLLG
and LL faults at the point FA are shown in Figure 6.8. The NSCCs were most
effective during an LL fault as the peak dc voltage overshoot was restricted to
1.20 pu in W1H1 as compared to 1.31 pu in W0H0. For all other faults, there
was no significant improvement in minimizing the dc over-voltage.
Nevertheless, the over-voltages were observed to be lower than the one which
appeared in the case of SLG fault described earlier. During the LLG fault, the
dc voltage overshoot increased from 1.12 pu to 1.17 pu. During the LLLG
fault, the dc voltage overshoot was 1.19 pu in W1H1 against 1.22 pu in W0H0.
Still, there was an overall reduction in peak-to-peak oscillation levels as the
minimum dc voltage was higher in W1H1. The NSCCs were not expected to
have any significant effect during the LLLG fault because of its symmetric
fault characteristic. It was studied just to confirm that the NSCCs did not
deteriorate the fault.
DC overvoltages
LLG - W1H1 LLG – W0H0
1.2 1.2
Vdc (pu)
Vdc (pu)
1 1
0.8 0.8
0.6 0.6
3.95 4 4.05 4.1 4.15 3.95 4 4.05 4.1 4.15
Vdc (pu)
1 1
0.8 0.8
0.6 0.6
3.95 4 4.05 4.1 4.15 3.95 4 4.05 4.1 4.15
1.4 1.4
LL - W1H1 LL – W0H0
1.2 1.2
Vdc (pu)
Vdc (pu)
1 1
0.8 0.8
0.6 0.6
3.95 4 4.05 4.1 4.15 3.95 4 4.05 4.1 4.15
Time (s) Time (s)
109
Figure 6.8. DC voltage overshoots in the VSC-HVDC lines for different faults at FA for the
cases: W1H1 and W0H0.
Figure 6.9 shows the power flow to the offshore VSC-HVDC terminal
during the different faults in the offshore collector grid at FA. In the case of LL
fault, there was some improvement in power-flow as the minimum power-flow
level was 0.44 pu in W1H1, which was remarkably high in comparison to the
minimum power-flow level of 0.08 pu in W0H0. However, there was only a
small change in power-flow level during the LLG and LLLG faults.
0.75 0.75
Ps1 (pu)
0.25 0.25
0 0 LLG – W0H0
LLG - W1H1
4 4.1 4.2 4.3 4 4.1 4.2 4.3
1 1
0.75 0.75
Ps1 (pu)
Ps1 (pu)
0.5 0.5
0.25 0.25
0.75 0.75
Ps1 (pu)
Ps1 (pu)
0.5 0.5
0.25 0.25
0 LL - W1H1 0 LL – W0H0
Figure 6.9. Power flow to the offshore VSC-HVDC terminal during different faults at FA for the
cases: W1H1 and W0H0.
Table 6.2. Effect of NSCC on the Peak Values of dc Voltage Overshoot and Power-flow During
Different Faults
SLG LLG LLLG LL
Parameter Case
Min Max Min Max Min Max Min Max
Fault at FA
DC line voltage W1H1 0.79 1.15 0.73 1.17 0.75 1.19 0.79 1.15
(p.u.) W0H0 0.59 1.52 0.66 1.12 0.67 1.22 0.59 1.31
Power-flow to VSC- W1H1 0.51 0.97 −0.08 0.96 −0.09 0.96 0.51 0.97
HVDC (p.u.) W0H0 0.34 0.99 −0.03 0.96 −0.01 0.96 0.08 0.96
Fault at FB
DC line voltage W1H1 0.75 1.28 0.64 1.12 0.68 1.10 0.75 1.28
(p.u.) W0H0 0.68 1.34 0.74 1.09 0.69 1.06 0.70 1.39
Power-flow to VSC- W1H1 0.46 1.02 −0.11 0.97 −0.11 0.97 0.46 1.02
HVDC (p.u.) W0H0 0.19 0.97 −0.13 0.97 −0.09 0.97 0.28 0.96
Table 6.2 gives a summary of the minimum and maximum values of the dc
voltage and power flow to the VSC-HVDC during the different types of faults
at FA.
6.4.3 Faults at FB
The effect of the NSCCs was studied for the different faults on the HV
cable feeder at FB (Figure 3.1) in the offshore grid, close to the converter
transformer terminal. Soon after the fault event, the NSCCs in WTG-GSCs got
blocked as described in Section 6.3. Hence, only the positive sequence currents
were injected in this case (similar to W0H1).
Figure 6.10 shows that, during the SLG fault, the dc voltage overshoot
reduced to 1.28 pu in W1H1 from 1.34 pu in W0H0. Similarly, during the LL
fault, it reduced to 1.24 pu in W1H1 from 1.39 pu in W0H0. As the NSCCs in
the WTG-GSCs got de-blocked after fault clearance, the post fault oscillations
were lower in W1H1 than in W0H0.
DC overvoltage
1.2 1.2
Vdc (pu)
1 1
0.8 0.8
SLG - W1H1 SLG – W0H0
0.6 0.6
5 5.1 5.2 5 5.1 5.2
1.2 1.2
Vdc (pu)
Vdc (pu)
1 1
0.8 0.8
LL - W1H1 LL – W0H0
0.6 0.6
5 5.1 5.2 5 5.1 5.2
1.4 1.4
1.2 1.2
Vdc (pu)
Vdc (pu)
1 1
0.8 0.8
LLG - W1H1 LLG – W0H0
0.6 0.6
5 5.1 5.2 5 5.1 5.2
Time (s) Time (s)
Figure 6.10. DC link voltage over-shoot in the VSC-HVDC system during the SLG, LL and
LLG faults at FB for the cases: W1H1 and W0H0.
112
Ps1 (pu)
0.5 0.5
Ps1 (pu)
0.5 0.5
0 LL - W1H1 0 LL – W0H0
5 5.1 5.2 5.3 5 5.1 5.2 5.3
1 1
Ps1 (pu)
Ps1 (pu)
0.5 0.5
Figure 6.12 shows the ac voltage waveforms at the VSC-HVDC filter bus
during the SLG and LL faults at FB for the two cases W1H1 and W0H0. By
allowing the negative sequence current control, the converter generated the
unbalanced ac voltage waveform with a low harmonic content. The ac current
was unbalanced, but it allowed the flow of power transfer. When the NSCC
was disabled, a lot of harmonics were generated as the converter attempted to
maintain a balanced sinusoidal voltage profile in the network with
asymmetrical fault.
113
-2
5 5.05 5.1 5.15 5.2 5.25
2 SLG - W1H1
Vac (pu)
-2
5 5.05 5.1 5.15 5.2 5.25
2 LL – W0H0
Vac (pu)
-2
5 5.05 5.1 5.15 5.2 5.25
2 LL - W1H1
Vac (pu)
-2
5 5.05 5.1 5.15 5.2 5.25
Time (s)
Figure 6.12. Filter bus voltage of the offshore VSC-HVDC terminal during the SLG and LL
faults at FB.
6.5 Discussion
The simulation results show that maximum over-voltages appear during the
SLG and LL faults. Incidentally, the proposed NSCC method (W1H1) was
most effective in reducing the dc voltage oscillations in these very faults.
Moreover, SLG fault is the most common fault of all the faults in a typical
power system. When the faults were applied at FB, the reduction in dc over-
voltage was less in comparison to the reduction observed during the faults at
FA. Nonetheless, in case of SLG fault at FB, it was accompanied by a marked
increase in the power-flow during the fault event.
For the SLG and LL faults at FB, the NSCCs in the WTG-GSCs got
blocked soon after the fault inception due to high proportion of the negative
sequence component in the WTG terminal voltage. Consequently, the power
transfer was higher, but it was accompanied with relatively higher dc voltage
oscillations in the VSC-HVDC system.
Besides when the positive and negative sequence current references are
generated as per (6.12) and (6.13) or (6.16) and (6.17), the WTG-GSC cannot
control the reactive power. A different strategy might be used such that the
WTG-GSC may control active and reactive power injection using positive
sequence current control under normal operating conditions. The NSCCs may
be enabled only during faults and other unbalanced operating conditions.
-1
4 4.05 4.1 4.15 4.2
1 Ph. B
Vac (pu)
-1
4 4.05 4.1 4.15 4.2
1 Ph. C
Vac (pu)
-1
4 4.05 4.1 4.15 4.2
Time (s)
Figure 6.13. AC voltage reference (to the VSC) and actual voltage (measured at the filter bus)
during the SLG fault at FA in case W1H1.
0
-1
-2
4.98 5 5.02 5.04 5.06 5.08 5.1 5.12 5.14 5.16 5.18
2
Ph. B
1
Vac (pu)
0
-1
-2
4.98 5 5.02 5.04 5.06 5.08 5.1 5.12 5.14 5.16 5.18
2
Ph. C
1
Vac (pu)
0
-1
-2
4.98 5 5.02 5.04 5.06 5.08 5.1 5.12 5.14 5.16 5.18
Time (s)
Figure 6.14. AC voltage reference (to the VSC) and actual voltage (measured at the filter bus)
during the SLG fault at FB and case W1H1.
116
6.6 Summary
***
117
RTDS® simulation has been used to verify the proposed relay coordination
for the protection of the offshore WPP grid. The test system model has been
developed in RTDS, and then interfaced with a physical over-current relay
through an amplifier. This chapter shows that the faults are detected, when
they lie within the zone of protection and the associated circuit breaker is
tripped to isolate the fault.
7.1 Introduction
Physical hardware devices like relays or controllers can be interfaced with the
simulation, and their performance can be simulated under variuos operating
conditions.
This chapter describes the real time simulation of the offshore grid with a
physical relay to assess the performance of the relay coordination and grid
protection. In Chapter 5, a coordination method based on nominal current was
proposed and simulated in PSCAD/EMTDC. Here the same system is tested
using an industrial over-current relay for feeder protection (REF615 from
ABB) connected to the system simulation in the RTDS platform
The relay IED supports the IEC 61850 standard for GOOSE (Generic
Object Oriented Sub-station Event) communication. The relay settings can be
programmed using the PCM600 relay interface software and CCT600 for the
horizontal communication configuration. The relay communicates the pick-up
(start) and trip (operate) signals and it can read the blocking signal from the
network.
The test system has several converters. They were described in Chapter 3.
Again, they are mentioned here in order to highlight the simplifications.
119
In this study, the grid side inverters in the WTG were modelled as PWM
switching inverters supplied by the constant dc voltage sources. The positive
sequence terminal voltage is extracted using the SOGI filters and then a
positive sequence PLL is used as shown in Figure 3.14 [53]. Vector control in
rotating reference frame is used to control the inverter for the specified active
power. The reactive power is controlled so as to maintain the nominal voltage
across the capacitor of the LCL filter.
which generates the d-axis voltage reference. The q-axis reference voltage was
set to 0. Inverse Park’s transformation was applied to get the phase voltage
references for the modulation of the VSC-HVDC converter.
Active current limits are imposed by blocking the converter gate pulses for
brief periods when the measured RMS current exceeds the pre-defined
converter current limits (Figure 7.3). Their PI controllers are disabled during
the periods when the converter is blocked.
+ S + S Inverse
Park’s
− + Transform
Ia
RMS Irms Block
Ib Irms > Imax
Calculation VSC
Ic
Imax
The IED REF615 was configured using the proprietary tool CCT600 to
broadcast the following signals —
1. PHIPTOC1.Str, PHIPTOC1.Op
2. PHLPTOC1.Str, PHLPTOC1.Op
3. EFHPTOC1.Str, EFHPTOC1.Op
4. DEFHPTOC1.Str, DEFHPTOC1.Op
Apart from this, the GTNET-GSE card in the RTDS is configured to send
the blocking signal to prevent the relay from picking up when the MV feeder
relay has picked up.
Figure 7.4 shows the dc voltage, power and current waveforms during the
steady state operation of the wind power plant and VSC-HVDC. While the
total harmonic distortion for the dc voltage was 6.5%, the peak to peak ripple
was within ±3% of the nominal. The four aggregated WTGs were generating
0.85, 0.86, 0.87 and 0.88 pu active power (on 100 MW base).
123
VDC1
310
305
kV
300
295
VDC2
310
305
kV
300
295
290
-84
MW
-86
-88
-90
PHVDC1
342
340
MW
338
336
PHVDC2
-318
-320
-322
MW
-324
-326
-328
Figure 7.4. Steady state results (in pu) (i)HVDC voltage at offshore terminal (ii) HVDC voltage
at the onshore terminal (iii) Power generated by the 4 WTGs (v) Power transmitted to the
offshore VSC-HVDC terminal (vi) Power transmitted by the onshore VSC-HVDC terminal
Figure 7.5 shows the voltage signal acquired from the RTDS simulation. It
represents the current passing through the MV feeder relay CT in steady state.
Considering the CT ratio of 400:1, and the scaling factor in the GTAO of
100:5, 260-mV-peak voltage signal corresponded to the 1.47 kA primary
current in the steady state. It was amplified to the overlapping IED current
124
Figure 7.5 Voltage signal at the GTAO output and the overlapping current signal output of the
amplifier.
First of all the RTDS simulation set-up was compared with the PSCAD
simulations carried out earlier for the sake of validation. A single line to ground
(SLG) fault was applied on the MV feeder at FA. The sudden disturbance
resulted in power unbalance. A transient over-voltage of 1.54 pu peak was
observed in the HVDC transmission as shown in Figure 7.6. In PSCAD
simulation, 1.52 pu DC link over-voltage had been observed in similar
simulations in Chapter 6. Power injected into the VSC-HVDC system dropped
to a minimum of 0.38 pu in RTDS simulation whereas it was 0.34 pu in
PSCAD simulation (as given in Table 6.1). The corresponding PSCAD curves
have been included here (from Figure 6.8, Figure 6.9) for a quick comparison
and validation of the RTDS model. Similar power and voltage oscillations were
observed during the fault events, though the oscillation amplitudes appear to be
lower in the RTDS simulation. The oscillations died out after the fault got
cleared.
125
1.5
Vdc2 (pu)
1
RTDS
0.5
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
1.5
Vdc2 (pu)
1
PSCAD
0.5
3.96 4.01 4.06 4.11 4.16 4.21 4.26 4.31 4.36
0.8
Ps1 (pu)
0.6
0.4 RTDS
0.2
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
0.8
Ps1 (pu)
0.6
0.4 PSCAD
0.2
3.96 4.01 4.06 4.11 4.16 4.21 4.26 4.31 4.36
Time (s)
Figure 7.6 DC voltage and power flow during SLG fault on MV feeder. Corresponding curves
from PSCAD simulation is included for comparison.
It must be noted here that the PSCAD simulations were carried out with a
time step of 8 s, while the RTDS simulation have a fixed time step of 50s
for the power system components and 2 s for the small time step power
converter switching simulations.
126
I_fault (pu) 10
RTDS
0
-10
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
10
I_fault (pu)
PSCAD
0
-10
3.96 4.01 4.06 4.11 4.16 4.21 4.26 4.31 4.36
10
I_MVCT (pu)
RTDS
0
-10
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
10
I_MVCT (pu)
PSCAD
0
-10
3.96 4.01 4.06 4.11 4.16 4.21 4.26 4.31 4.36
I_HVCT (pu)
2 RTDS
0
-2
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
2
I_HVCT (pu)
PSCAD
0
-2
3.96 4.01 4.06 4.11 4.16 4.21 4.26 4.31 4.36
Time (s)
Figure 7.7. Comparison of the RTDS and PSCAD current waveforms during SLG fault at FA.
The RTDS simulation output data were saved as comtrade files, so that
they could be recovered later. Since, the fault instant was used as the trigger,
the fault instant is recorded as time 0 s. As shown in Figure 7.9, the maximum
127
absolute peak fault current was 7.99 pu (i.e. 20.38 kA) at 1.04s. The maximum
absolute peak currents passing through the MV CT was 45.18 A (7.08 pu) at
0.054 s. (The fault current through the MV CT, in Figure 7.10, is inverted from
the one shown in Figure 7.8). Due to the transformer connection, the fault
appeared as an LL fault on the HV side. The maximum absolute peak currents
through the HV feeder CT was recorded as 12.25 A (2.00 pu) at 0.046 s in
phase A and 13.33 A (2.18 pu) at 0.014 s in phase B.
Figure 7.8. Voltage signal from the RTDS simulation and the corresponding amplified current
signal (the blue curve under the yellow curve).
The variations in the dc voltage and the power-flow during the fault are
shown in Figure 7.10. The dc voltage as well as the healthy section of the WPP
recovered to their normal operation soon after the fault was cleared. The WTG
#4 got isolated by the opening of the circuit breaker. Consequently, the power-
flow to the HVDC dropped to 0.75 pu from the pre-fault level of 0.98 pu.
128
I_fault (pu) 5
0
-5
-0.05 0 0.05 0.1 0.15 0.2
5
I_MVCT
(pu)
0
-5
-0.05 0 0.05 0.1 0.15 0.2
2
I_HVCT (pu)
0
-2
-0.05 0 0.05 0.1 0.15 0.2
IED_Trip
IED & CB
1 CB_Open
Signals
IED_St
HV - Start
0
-0.05 0 0.05 0.1 0.15 0.2
Time (s)
Figure 7.9. Fault currents, the relay signals, and the breaker opening during SLG fault at FA.
1.5
1.25
Vdc2 (pu)
1
0.75
0.5
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
1
To HVDC
0.75
Ps1 (pu)
0.5
0.25
0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
1
WTG #1, 2, & 3
Pwtg (pu)
0.5
WTG #4
0
-0.5
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
Time (s)
Figure 7.10. Dc voltage and power during SLG fault at FA.
129
The fault time current waveforms captured by the relay IED are shown in
Figure 7.11. These waveforms are similar to those captured on the oscilloscope
(Figure 7.8, phase A only) and in the RTDS scopes (Figure 7.9); except that the
waveform in the oscilloscope is inverted. Thus, the real time simulation set-up
with the relay gets validated. The current data computed by the relay is given in
Table 7.1. Nevertheless, the numerical data captured in the IED appears to be
lower than the recorded waveforms. For instance, the maximum current peak in
the relay is recorded as 7.45 A. Considering the net gain of the analog output
card ( ) and the amplifier ( ), it implies a peak fault current of 29.8A in
the secondary of the feeder CT, and therefore, 16.86 kA (or 6.61 pu) in the
primary winding of the MV feeder CT. As per Figure 7.9, it should be 7.08 pu.
The difference could be attributed to the fault current estimation algorithm used
in the relay software.
Figure 7.11. Fault current waveforms recorded by REF615 during SLG fault at FA..
130
Table 7.1 Fault Report Summary for SLG fault at FA from the ABB REF615 Relay
Fault Number: 628 / Time and Date: 19.10.2011 22:40:51.694
Start duration...............100%
Setting group..................1.
Max current IL1..............7.453...xInà16.86kA,pk
Max current IL2..............0.956...xInà 2.16kA,pk
Max current IL3..............1.204...xInà 2.72kA,pk
Current IL1..................6.677...xInà15.11kA,pk
Current IL2..................0.738...xInà 1.67kA,pk
Current IL3..................0.711...xInà 1.61kA,pk
Current Io......................0...xIn
Current Io-Calc..............7.564...xInà17.12kA,pk
Current Ps-Seq...............2.218...xInà 5.02kA,pk
Current Ng-Seq...............1.984...xInà 4.49kA,pk
The results captured in the relay IED are given in Table 7.2. Likewise the
SLG fault data, these currents are lower than the current observed in the RTDS
plots.
131
I_fault (pu)
0
-5
0 0.05 0.1 0.15 0.2
5
I_MVCT
(pu)
0
-5
0 0.05 0.1 0.15 0.2
2
I_HVCT (pu)
0
-2
0 0.05 0.1 0.15 0.2
CB_Open
IED_Trip
IED & CB
Signals
1 IED_St
HV - Start
0
0 0.05 0.1 0.15 0.2
Time (s)
Figure 7.12 Fault currents, relay signals and circuit breaker state during an LLG fault at FA.
Table 7.2 Fault Report Summary for LLG fault at FA from the ABB REF615 Relay
Fault Number: 629 / Time and Date: 19.10.2011 22:43:29.884
Start duration..............100%
Setting group..................1
Max current IL1..............5.2 ...xInà 11.77kA,pk
Max current IL2..............7.246...xInà 16.40kA,pk
Max current IL3..............1.106...xInà 2.50kA,pk
Current IL1..................3.854...xInà 8.72kA,pk
Current IL2..................5.759...xInà 13.03kA,pk
Current IL3..................0.662...xInà 1.50kA,pk
Current Io......................0...xIn
Current Io-Calc..............5.867...xInà 13.28kA,pk
Current Ps-Seq...............3.351...xInà 7.58kA,pk
Current Ng-Seq...............1.041...xInà 2.36kA,pk
132
The current waveforms and the relay signals of a triple line to ground fault
applied at FA on the MV feeder are shown in Figure 7.13 and the data recorded
by the relay IED are given in Table 7.3. It is a case of symmetric fault as all the
three phases are involved. The maximum amplitudes of the fault current are
16.33 kA (6.40 pu) in phase A, 14.79 kA (5.80 pu) in phase B, and 15.60 kA
(6.12 pu) in phase C. The MV feeder CT secondary currents were recorded as
38.42 A (6.02 pu) in phase A at 17 ms, 31.12 A (4.88 pu) in phase B at 14 ms
and 35.62 A (5.584 pu) in phase C at 19 ms.
The relay IED started at 11.2s, but it tripped at 196 ms. Therefore, the fault
got isolated only at 246 ms. The symmetrical fault case resulted in a lower
amplitude of the fault current and hence the relay took a longer time to operate.
The HV relay picked up at 17.6ms, but it is prevented from tripping by the
blocking signal from the MV relay.
5
0
I_fault (pu)
-5
-0.05 0 0.05 0.1 0.15 0.2 0.25 0.3
5
I_MVCT (pu)
0
-5
-0.05 0 0.05 0.1 0.15 0.2 0.25 0.3
2
I_HVCT (pu)
0
-2
-0.05 0 0.05 0.1 0.15 0.2 0.25 0.3
1.5
IED & CB Signals
IED_Trip CB_Open
1 IED_St
HV - Start
0.5
0
-0.05 0 0.05 0.1 0.15 0.2 0.25 0.3
Time (s)
Figure 7.13 Fault currents, relay signals and circuit breaker state during an LLLG fault at FA.
133
Table 7.3 Fault Report Summary for LLLG fault at FA from the ABB REF615 Relay
The maximum value of the fault current peak was 11.1 kA (4.35 pu) during
the SLG fault. By virtue of transformer connection, it appeared as the LL fault
on the MV feeder. During the fault, the MV feeder CT currents were 8.49 A
(1.33 pu) in phase B and 11.25 A (1.76 pu) in phase C. A transient peak of
10.6 A (1.66 pu) was observed in phase A at 3 ms.
The IED on the HV feeder picked up at 10.4 ms and it tripped at 157.6 ms,
thereby opening the MV circuit breaker at 207.2 ms. The fault current
continued for some more time as the WTG#3 and WTG#4 were not
disconnected immediately. The recording from the relay IED is given in Table
7.4. Since it was an SLG fault, there was a strong presence of the negative and
zero sequence components.
134
I_fault (pu) 10
5
0
-5
-10
0 0.1 0.2 0.3 0.4 0.5 0.6
2
I_MVCT (pu)
1
0
-1
-2
0 0.1 0.2 0.3 0.4 0.5 0.6
10
I_HVCT (pu)
5
0
-5
-10
0 0.1 0.2 0.3 0.4 0.5 0.6
IED_Trip HV CB_Open
IED & CB
1
Signals
IED_St
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Figure 7.14 Fault currents, relay signals and circuit breaker state during an SLG fault at FB.
Table 7.4 Fault Report Summary for SLG fault at FA from the ABB REF615 Relay
The trip times taken by the REF615 relay IED for the different faults at FA
on the MV feeder and at FB on the HV feeder are presented in Figure 7.15. The
results from the PSCAD simulations, described earlier in Chapter 5, are
included for the sake of comparison. The two results are closely matching with
a deviation of less than 20 ms in most of the cases. Nevertheless, there are
higher differences in some cases; like 51 ms (22%) for the LLL fault at FA, 60
ms (31%) for the LLG fault at FB, and the highest difference of 164 ms (45%)
for the LL fault at FB. In general, there was a good match between the
simulated and practically observed cases; and the exact cause of the variation
was not investigated in this project.
(a) Fault at FA
250
RTDS-IED PSCAD
IED/Relay Trip Time (ms)
200
150
100
50
0
SLG LLG LLLG LL LLL
Fault Type
(b) Fault at FB
400
RTDS-IED PSCAD
350
IED/Relay Trip Time (ms)
300
250
200
150
100
50
0
SLG LLG LLLG LL LLL
Fault Type
Figure 7.15 Trip times for the different faults. (a) at FA on the MV feeder; (b) at FB on the HV
feeder.
136
In both the PSCAD and the RTDS simulations, it was found that the relay
took longer time to trip for symmetrical faults (LLL and LLLG) compared to
the asymmetric faults. In case of symmetric faults, the fault current had a high
amplitude in the first cycle, but soon it had a low content of the fundamental
component as shown in Table 5.4.
Apart from this, the HV feeder relay took longer time to trip for the faults
on the HV feeder in comparison to the time taken by the MV feeder relay for
the faults in the MV feeder. It is so because the HV feeders are rated for twice
the power rating of the MV feeders. The slow response of the HV feeder relay
was advantageous in the sense that the undesirable tripping of the HV feeder
relay for the faults on the MV feeder was delayed. This allowed for the
communication based interlocking of the HV feeder relay by the relay pick-up
signal from the MV feeder relay.
7.5 Summary
The experimental set-up for the testing of the offshore grid relay
coordination has been described in this chapter. The relay tripping behaviour
for the faults on the MV feeder has been recorded and compared with the
results obtained from PSCAD simulations. The relay coordination on the basis
of nominal current ratings along with the inter-locking mechanism has been
demonstrated to work satisfactorily in all the cases.
***
137
This chapter summarizes the thesis and highlights some areas for further
research in the domain of grid integration of offshore wind power using VSC-
HVDC transmission.
8.1 Conclusions
A test system for the study of wind power plants with VSC-HVDC
connection to the onshore grid has been proposed. It is elaborate enough to
include the detailed switching model of the VSC-HVDC transmission system.
The offshore grid is modelled in terms of four aggregated wind turbine
generators, the associated filters, and the ac collector grid network. The system
is suitable for the simulation study of faults and other transients in the offshore
WPP grid as well as steady state response analyses.
A new controller for the offshore VSC-HVDC converter terminal has been
proposed. It is an adaptation of the standard vector control by adding the feed-
forward WPP current terms calculated from the measured active and reactive
power injection to the VSC-HVDC terminal. Its robustness is evident from the
numerous fault studies done on the test system.
Several different faults in the offshore WPP collector grid have been
investigated through EMT simulations in PSCAD. A detailed layout of the test
wind power plant system with collector grid and VSC-HVDC connection the
onshore grid is developed in Chapters 3 and 4. The use of simple over-current
relays has been proposed along with their coordination scheme for the
protection of the offshore WPP and their performance is demonstrated through
138
PSCAD simulations. The results are further corroborated through a real time
simulation in RTDS with an industrial relay from ABB. The RTDS simulation
model and hardware in loop configuration with IEC 61850 process bus
communication set-up can be used to investigate the different control and
protective features of modern numerical relays.
A simple numerical method has been presented for the estimation of fault
current levels in the event of offshore grid faults in the collector grid. The
limitations and the shortcomings of the proposed method has been highlighted.
The scheme is demonstrated through EMT simulations in PSCAD. Later, these
are compared with those of an industrial relay connected with the real time
simulation.
been proposed to reduce the power, and hence, the dc voltage oscillations in the
VSC-HVDC transmission. It does not depend upon the instantaneous power
references. Simulation studies have been carried out to demonstrate the efficacy
of having the negative sequence current control in the VSC-HVDC system and
the WTG converters.
This thesis is focussed upon the offshore grid. The work can be extended to
investigate the impact of wind power plants with VSC-HVDC connection on
the onshore grid, especially with regard to inertia emulation, frequency
regulation and fault ride through in the multi-terminal VSC-HVDC systems
with multiple inter-connections between the offshore wind power plants and ac
power grid networks.
***
143
References
[1] European Wind Energy Association, “Pure Power Wind Energy Targets for
2020 and 2030,” 2009 update. Available at: http://www.ewea.org
[2] Global Wind Energy Council, “Global Wind Report – Annual market
update 2010,”, April 2010. Available at: http://www.gwec.net
[3] P. Bresesti, W. L. Kling, R. L. Hendriks, and R. Vailati, “HVDC
Connection of Offshore Wind Farms to the Transmission System,” IEEE
Transactions on Energy Conversion, vol. 22, no. 1, pp. 37-43, Mar. 2007.
[4] S. K. Chaudhary, R. Teodorescu and P. Rodriguez, "Wind Farm Grid
Integration Using VSC Based HVDC Transmission - An Overview,"
Energy 2030 Conference, 2008. ENERGY 2008. IEEE, pp. 1-7, 2008.
[5] N. Flourentzou, V. G. Agelidis and G. D. Demetriades, "VSC-Based
HVDC Power Transmission Systems: An Overview," Power Electronics,
IEEE Transactions on, vol. 24; 24, pp. 592-602, 2009.
[6] K. Eriksson, C. Liljegren and K. Sobrink, "HVDC light experiences
applicable for power transmission from offshore wind power parks," in
42nd AIAA Aerospace Sciences Meeting and Exihibit, Reno, Nevada. 2004.
[7] L. Harnefors, "Control of VSC-HVDC transmission," in Tutorial Presented
at the IEEE PESC, Rhodos, Greece, Jun 15-19, 2008. 2008.
[8] F. Iov, P. Sorensen, A. -. Hansen and F. Blaabjerg, "Grid connection of
active stall wind farms using a VSC based DC transmission system,"
Power Electronics and Applications, 2005 European Conference on, pp. 10
pp., 2005.
[9] C. Feltes and I. Erlich, "Variable Frequency Operation of DFIG based
Wind Farms connected to the Grid through VSC-HVDC Link," Power
Engineering Society General Meeting, 2007. IEEE, pp. 1-7, 2007.
[10] L. Xu, B.W. Williams, and L. Yao, “Multi-terminal DC transmission
systems for connecting large offshore wind farms,” 2008 IEEE PES
General Meeting - Conversion and Del. of Electrical Energy in the 21st
Century, IEEE, 2008, pp. 1-7.
[11] Grid Code for High and Extra High Voltage, E.ON Netz GmbH
Bayreuth,April 1, 2006.
[12] Requirements for Offshore Grid Connections in the E.ON Netz
Network, E.ON Netz GmbH Bayreuth, April 1, 2008.
[13] Wind Turbines Connected to Grids with Voltages above 100kV –
Technical regulation for the properties and the regulation of wind turbines,
144
Chapter 2
Chapter 3
Chapter 4
Chapter 5
[59] S. Patel, “GLOBAL MONITER”, Power;, Vol. 154 Issue 11, pp. 8-15,
Nov. 2010.
[60] D. Turcotte and F. Katiraei, “Fault contribution of grid-connected
inverters,” in 2009 IEEE Electrical Power & Energy Conference (EPEC),
2009, pp. 1-5.
[61] G. Ramtharan, A. Arulampalam, J. B. Ekanayake, F. M. Hughes, and
N. Jenkins, “Fault ride through of fully rated converter wind turbines with
AC and DC transmission systems,” IET Renewable Power Generation, vol.
3, no. 4, p. 426, 2009.
[62] A. D. Hansen and G. Michalke, “Multi-pole permanent magnet
synchronous generator wind turbines’ grid support capability in
uninterrupted operation during grid faults,” IET Renewable Power
Generation, vol. 3, no. 3, p. 333, 2009.
[63] E. J. Coster, J. M. A. Myrzik, B. Kruimer, and W. L. Kling,
“Integration Issues of Distributed Generation in Distribution Grids,”
Proceedings of the IEEE, vol. 99, no. 1, pp. 28-39, Jan-2011.
[64] S. M. Brahma and A. A. Girgis, “Development of Adaptive Protection
Scheme for Distribution Systems With High Penetration of Distributed
Generation,” IEEE Transactions on Power Delivery, vol. 19, no. 1, pp. 56-
63, Jan. 2004.
[65] H. J. Laaksonen, “Protection Principles for Future Microgrids,” Power
Electronics, IEEE Transactions on, vol. 25, no. 12, pp. 2910-2918, 2010.
[66] J. Cardenas, V. Muthukrishnan, D. McGinn, and R. Hunt, “Wind farm
protection using an IEC 61850 process bus architecture,” in 10th IET
149
Chapter 6
Chapter 7
***
151
Angular Frequency,
Grid Impedance, ( )
( ) ( )
No load losses=0.005 pu
Copper losses=0.005 pu
Table A.1 Filter Impedance at the fundamental, 3rd harmonic and resonance
( )
153
Copper cable with 1.2 A per sq. mm current density is assumed. XLPE
insulation thickness of 12 mm is assumed for ±150kV DC cables.
( )
( )
Considering shielding by sheath at a radius of 30.8mm, the inductance is given by,
( )
There are two 2-km long 150-kV cables connecting the converter
transformer to the two plant step-up transformers at the collector bus. The
nominal power rating of the plant is 400 MW implies that each cable should
handle 200 MW. Further assuming a power factor of 0.9, each cable has to be
rated for,
Single core copper cable with 1200 mm2 cross section has been selected
from Table 4 of ABB XLPE cables data sheet. Cross bonded cable layout in
flat formation gives a maximum current carrying capacity of 850 A and 1050 A
for a temperature rise of 65°C and 90°C respectively. As per table 21, the
154
The LCL filter was designed for the GSC of a 6.6 MVA WTG-FSC
operating at the 3.3kV rms ac line-line voltage. The LCL parameters were:
The unit transformer for the aggregated WTG have been selected with the following ratings:
( )
( )
The cable selection is based upon the underground cable datasheet [A-2].
Considering a temperature rise of 65°C in cross-bonding and trefoil layout, the
current carrying capacities are 270A and 6590 A for the selected cables. It
should be updated with the submarine cable datasheet.
156
Cable parameters:
( )
( )
( )
For the equivalent cable string shown in Error! Reference source not found.(b), the
able parameters are given by,
∑
References:
***
.
157
q
V
Vr
B Vd
Vq d
g
q V
A
Fig. B. 1 Three phases, and space vectors in stationary and rotating reference frames.
(B.1)
(B.2)
( ) ( )
(B.3)
( ) ( ) ( )
(B.4)
158
( ) ( )
( ) ( )
(B.5)
[ ] [ ]
[ ]
or, [ ] [ ][ ]
[ ] [ ] [ ]
( ) ( )
(B.6)
[ ] [ ( ) ( ) ][ ]
{( ) } (B.7)
( )
{( ) } (B.8)
( )
{( ) } (B.9)
The coefficient 2/3 ensures that the magnitudes of and remain the
same as the peak magnitude of , for a balanced three phase system. This
transformation is not power invariant. The instantaneous power is given by,
[ ][ ] [ ][ ]
Or,
([ ] [ ]) ([ ] [ ])
[ ] [ ]
[ ] [ ] ( ) (B.10)
(B.11)
[ ] [ ]
[ ]
(B.12)
[ ] [ ][ ]
( ) ( )
Or, [ ] [ ][ ] (B.13)
( ) ( )
(B.14)
Or, [ ] [ ][ ]
160
[ ] [ ] [ ][ ] (B.15)
[ ]
[ ] ( )[ ] [ ] (B.16)
[ ] [ ][ ] [ ][ ] (B.17)
[ ] [ ][ ] [ ][ ] (B.18)
[ ] [ ] [ ][ ] (B.19)
[ ]
From (B.18) and (B.19), we get
[ ] [ ][ ][ ] (B.20)
[ ] ( )[ ][ ][ ] [ ]
[ ] [ ][ ] (B.21)
where,
[ ] ( )[ ][ ][ ] [ ]
[ ] [ ][ ] (B.22)
***
162
Inner Loop
Outer Loop
The plant comprises of a VSC connected to the filter bus through a phase
reactor with the inductance ( ) and resistance ( ) as given below,
(C.1)
163
After the open loop poles get cancelled, the remaining open loop transfer
function is ( ). In this implementation, the controller gain, G, is
considered as unity. This means the VSC output is same as the controller
reference. The closed loop transfer function becomes,
( )
(C.2)
(C.3)
( )
(C.4)
( ) (C.5)
( )
For the reactive power control loop, the open loop transfer function is
Neglecting the current injection from the WPP, the filter bus voltage and the
current are related by the phase equation,
If the cross coupling terms are ignored, and the current is considered
( )
Table C. 1 PI controller parameters : Calculated values, and the values used in PSCAD
simulation.
Calculated
Control Loop Parameters Parameters used
Kp Ti Kp Ti
Current Control 60.1 0.0068 47.3 0.0068
Negative Sequence Current
controller 60.1 0.0068 60 1.0
Dc voltage controller 0.0094 0.0433 0.0056 0.0721
Reactive power controller 0.0005 0.850 0.0005 0.850
AC voltage controller 0.001 0.476 0.001 0.349
***