Department of Electrical & Computer Engineering CSE231L Digital Logic Design Lab

Lab 1: Digital Logic Gates and Boolean Functions

A. Objectives

 Study the basic logic gates - AND, OR, NOT, NAND, NOR, XOR.
 Get acquainted with the representation of Boolean functions using truth tables, logic diagrams and Boolean
Algebra.
 Prove the extension of inputs of AND and OR gates using the associate law.
 Become familiarized with combinational logic circuits.

B. Theory

Logic Gates

Logic gates are the elementary building blocks of digital circuits. They perform logical operations of one or more
logical inputs to produce a single output. Digital logic gates operate at two discrete voltage levels representing
the binary values 0 (logical LOW) and 1 (logical HIGH). Table B.1 provides a brief description of the basic
digital logic gates, their corresponding IC numbers and circuit symbols.

Gate Description IC # Symbol

AND Multi-input circuit producing an output of 1 if all inputs are 1. 7408

Multi-input circuit producing an output of 1 when any of its inputs is

OR 7432
1.

Single-input circuit that inverts the input (also called an Inverter).

NOT 7404
The output is 0 if the input is 1 and vice versa.

NAND AND followed by an Inverter 7400

NOR OR followed by an Inverter 7402

The Exclusive-OR or Ex-OR is a two-input circuit that produces an

XOR 7486
output of 0 is both inputs are same and 1 if the inputs are different.

Table B.1: Logic gates

Truth Tables

𝑨𝑩 𝑭= 𝑨∙𝑩
00 0
01 0
10 0
11 1

Table B.2: Truth table for an AND gate

A truth table shows all output logic levels of a logic circuit for every possible combination of inputs. For example,
Table B.2 shows the truth table for a two-input AND gate.

Boolean Algebra

Boolean algebra is a branch of mathematical logic that formalizes the relation between variables that take the
truth values of true and false, denoted by 1 and 0 respectively. It is fundamental in the development of digital
electronics. Digital electronics networks are generally expressed as Boolean functions. Discrete voltage levels
are used to represent the truth values. Postulates and theorems of Boolean algebra are given in Table B.3.

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Department of Electrical & Computer Engineering CSE231L Digital Logic Design Lab

Postulates and Theorems Name

𝐴+0=𝐴 𝐴∙1=𝐴 Identity
′
𝐴+𝐴 =1 𝐴 ∙ 𝐴′ = 0
𝐴+𝐴 =𝐴 𝐴∙𝐴=𝐴
𝐴+1=1 𝐴∙0=0
(𝐴′ )′ = 𝐴 Involution
𝐴+𝐵 =𝐵+𝐴 𝐴𝐵 = 𝐵𝐴 Commutative
𝐴 + (𝐵 + 𝐶) = (𝐴 + 𝐵) + 𝐶 𝐴(𝐵𝐶) = (𝐴𝐵)𝐶 Associative
𝐴(𝐵 + 𝐶) = 𝐴𝐵 + 𝐴𝐶 𝐴 + 𝐵𝐶 = (𝐴 + 𝐵)(𝐴 + 𝐶) Distributive
′
(𝐴 + 𝐵) = 𝐴′𝐵′ (𝐴𝐵)′ = 𝐴′ + 𝐵′ De Morgan
𝐴 + 𝐴𝐵 = 𝐴 𝐴(𝐴 + 𝐵) = 𝐴 Absorption

Table B.3: Laws of Boolean algebra

Combinational Logic

Combination logic refers to digital networks where the output is solely dependent on the current input(s) and is
not affected by previous states. The analysis of combination logic requires writing the Boolean functions for
each element of the circuit, producing their truth tables, and subsequently combining each function for the final
output and truth table.

Integrated Circuit (IC)

Figure B.1 illustrates an example IC. The basic rule for most ICs is that there is polarity mark, such as the half-
moon notch shown in the figure. Another common polarity mark is a small dot, triangle or tab by pin 1. The rule
is to move counter-clockwise around the chip from the polarity mark while numbering the pins starting at 1.
Sometimes no direct mark may be present, in which case the pin numbers can be inferred simply from the
orientation of the text inscribed on the IC.

Figure B.1: Example IC configuration

7400 Series Integrated Circuits

TTL - Transistor-Transistor Logic

The 7400 series of digital logic ICs represents the most popular family of TTL ICs. Most such modern ICs have
been replaced with CMOS. To find the IC number on the chip, simply read the numbers off it ignoring the
letters. For example, 74HC04N is the 7404 Hex Inverter IC where the HC denotes it is a high-speed CMOS
variant of the TTL circuit.

Figure B.2 shows the pin configurations of the basic logic gate ICs. Figure B.2 (a) shows the pin configuration
of IC 7400 quadruple 2-input NAND gates. The pin configurations of ICs 7408 AND, 7432 OR and 7486 XOR
are same as IC 7400 NAND. Figure B.2 (b) and (c) show the pin configurations of ICs 7404 hex inverters and
7402 quadruple 2-input NOR gates respectively. Note that the input and output pins of the NOR gates are
reversed compared to the NAND gates. For all of the above ICs, pin 7 is designated GND (logical LOW) and pin
14 is connected to +5 V as VCC (logical HIGH).

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Department of Electrical & Computer Engineering CSE231L Digital Logic Design Lab

(a) (b) (c)

Figure B.2 Schematic of commonly used ICs
(a) 7400 NAND, 7408 AND, 7432 OR and 7486 XOR,
(b) 7404 NOT, and
(c) 7402 NOR

C. Apparatus

 IC 7400 Quadruple 2-input NAND gates

 IC 7402 Quadruple 2-input NOR gates
 IC 7404 Hex Inverters (NOT gates)
 IC 7408 Quadruple 2-input AND gates
 IC 7432 Quadruple 2-input OR gates
 IC 7486 Quadruple 2-input XOR gates
 Trainer Board
 Wires

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Department of Electrical & Computer Engineering CSE231L Digital Logic Design Lab
Experiment 1: Introduction to Basic Logic Gates
D.1 Procedure

1. Place the 7408 AND IC on the breadboard. Make sure that every pin of the IC is on a separate node on the
breadboard. Carefully note the location of the polarity mark of the IC. It will allow you to identify the different
pins of the IC.

2. Connect the VCC and GND pins of the IC to the +5 V and GND ports of the trainer board respectively.

3. Label the pin numbers of the inputs and output of the gate in Figure F.1.1, using the pin configurations in
Figure B.2.

4. Connect the logic gate:

a. Connect each input of the gate to a toggle switch on the trainer board.
b. Connect the output of the gate to an LED on the trainer board.

5. Apply all combinations of inputs by turning the toggle switches on (1) and off (0), and record if the LED is on
(1) or off (0) as the output of the gate. Record your results in Table F.1.1.

6. Replace the AND IC with OR, NAND and XOR ICs without changing the connections and repeat step 5 for
each.

7. Repeat steps 1-5 for the NOT and NOR ICs.

E.1 Report

E.1.1 Simulation: N/A

E.1.2 Questions:
1) What are the names of the ICs that you would need if you wanted to use 13 AND gates, 12 NOT gates and
15 NOR gates in a circuit? How many of each IC would you need?
2) How can you power your logic ICs if the +5V port of your trainer board stops working?

Experiment 2: Constructing 3-input AND & OR gates from 2-input AND & OR gates
D.2 Procedure

1. Complete the truth table for the 3-input AND gate in Table F.2.1.

2. Using the associative law given in Table B3, express the 3-input function using two 2-input AND gates in
Table F.2.2.

3. Label the pin numbers in Figure F.2.1, using the pin configurations in.

4. Connect the circuit.

5. Connect the output to an LED and verify it using the truth table.

6. Repeat steps 1-5 for the 3-input OR gate.

E.2 Report

E.2.1 Simulation: Simulate a 6-input AND gate in Logisim using only 2-input AND gates.

E.2.1 Questions: N/A

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Department of Electrical & Computer Engineering CSE231L Digital Logic Design Lab

Experiment 3: Implementation of Boolean Functions

D.3 Procedure

Consider the following Boolean Equation:

𝐹 = 𝐴′ 𝐶 + 𝐴𝐵 ′ + 𝐵𝐶

1. Complete the truth table for the implicants, 𝐼1 = 𝐴′𝐶, 𝐼2 = 𝐴𝐵′ and 𝐼3 = 𝐵𝐶 in Table F.3.1.

2. Using the values of the implicants, complete the truth table for the function 𝐹 in Table F.3.1.

3. Label the pin numbers for the NOT, AND and OR gates of the function 𝐹 in Figure F.3.1, using the pin
configurations in Figure B.2.

4. Connect the input 𝐴 to a NOT gate using the pins assigned in step 3 and check the output via an LED.
5. Wire up implicant 𝐼1 .
6. Connect the output of 𝐼1 to an LED and verify it using the truth table.

7. Connect the input 𝐵 to a NOT gate using the pins assigned in step 3 and check the output via an LED.
8. Wire up implicant 𝐼2 .
9. Connect the output of 𝐼2 to an LED and verify it using the truth table.

10. Wire up implicant 𝐼3 .

11. Connect the output of 𝐼3 to an LED and verify it using the truth table.

12. Connect the outputs of the three implicants as inputs to the OR gates (using the associative law).

13. Connect the output 𝐹 to an LED and verify the function using the truth table.

E.3 Report

E.3.1 Simulation: Simulate the combinational logic circuit constructed in this experiment in Logisim and attach
the circuit in your lab report, showing only the instance when the input ABC = 010.

E.3.1 Questions:
1) Draw the IC diagram for the first implicant I1. In place of the logic gates, draw the ICs and all the
connections required to make the circuit work.

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F. Data Sheet

F.1 Introduction to Basic Logic Gates

Figure F.1.1: Pin configurations of gates in ICs

Input AND OR NAND XOR NOR Input NOT

𝑨𝑩 𝑭= 𝑨∙𝑩 𝑭= 𝑨+𝑩 𝑭 = ̅̅̅̅̅̅
𝑨∙𝑩 𝑭 = 𝑨⨁𝑩 𝑭 = ̅̅̅̅̅̅̅̅
𝑨+𝑩 𝑨 ̅
𝑭=𝑨
00 0

01 1

10

11

Table F.1.1: Truth Table of Logic Gates

F.2 Constructing 3-input AND & OR gates from 2-input AND & OR gates

𝑨𝑩𝑪 𝑭 = 𝑨𝑩𝑪 𝑭= 𝑨+𝑩+𝑪

000

001

010

011

100

101

110

111

Table F.2.1: Truth Tables for 3-input AND and OR

𝐹 = 𝐴𝐵𝐶 =

𝐹 =𝐴+𝐵+𝐶 =

Table F.2.2: Expressing 3-input gates as 2-input gates using associative law.

Figure F.2.1: Extension of inputs of AND and OR gates

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Department of Electrical & Computer Engineering CSE231L Digital Logic Design Lab

F.3 Implementation of Boolean Functions

𝑨𝑩𝑪 𝑰𝟏 = 𝑨′𝑪 𝑰𝟐 = 𝑨𝑩′ 𝑰𝟑 = 𝑩𝑪 𝑭 = 𝑰𝟏 + 𝑰𝟐 + 𝑰𝟑

000

001

010

011

100

101

110

111

Figure F.3.1: Truth Table for the given Boolean Function

Figure F.3.1: Logic Diagram for the given Boolean Function