5 4 3 2 1

U101E U101F

MT6735-SBS MT6735-SBS
VOCRE VPROC GND AVDD & MD_A
T11 AL4 VIO18_PMU
T21 DVSS AVDD18_MD AK11
K8 M12 T23 DVSS AVDD18_AP AL9 VTCXO_0_PMU
D L7 DVDD_CORE DVDD_CPU M13 U21 DVSS AVDD28_DAC D
L8 DVDD_CORE DVDD_CPU M15 V7 DVSS AE11
DVDD_CORE DVDD_CPU DVSS AVSS18_MD C144 C145

2
L9 M16 V8 AG6
L10 DVDD_CORE DVDD_CPU M17 V9 DVSS AVSS18_MD AG7
VCORE_PMU VPROC_PMU 1uF 100nF
L11 DVDD_CORE DVDD_CPU M18 V10 DVSS AVSS18_MD AG8
DVDD_CORE DVDD_CPU DVSS AVSS18_MD

1
L12 M19 V11 AG9 0201 0201
L15 DVDD_CORE DVDD_CPU M20 V12 DVSS AVSS18_MD AH3
SH100 SH102
1 2 L16 DVDD_CORE DVDD_CPU N12 1 2 V13 DVSS AVSS18_MD AH6
[4] VCORE_PMIC_FB VPROC_PMIC_FB_6328
[4]
L19 DVDD_CORE DVDD_CPU N13 V15 DVSS AVSS18_MD AH9
L20 DVDD_CORE DVDD_CPU N14 V16 DVSS AVSS18_MD AJ1

C107 1uF

C108 1uF

C109 1uF

C110 1uF

C111 1uF

C112 1uF

C136 4.7uF

C137 4.7uF

C163 22uF

C162 22uF

C133 22uF

C134 22uF

C135 22uF
C101 22uF

C103 22uF

C104 22uF

C105 4.7uF

C106 4.7uF

C138 1uF

C139 1uF

C140 1uF

C141 1uF

C142 1uF

C143 1uF
DVDD_CORE DVDD_CPU DVSS AVSS18_MD

2
L21 N15 V17 AJ2
0603 0603 0603 0402 0402 0201 0201 0201 0201 0201 0201 L22 DVDD_CORE DVDD_CPU N16 0402 0402 0201 0201 0201 0201 0201 0201 0603 0603 0603 0603 0603 V18 DVSS AVSS18_MD AJ3
M8 DVDD_CORE DVDD_CPU N17 V21 DVSS AVSS18_MD AJ4
DVDD_CORE DVDD_CPU DVSS AVSS18_MD

1
SH101 M10 N18 SH103 V22 AJ5
1 2 M22 DVDD_CORE DVDD_CPU N19 1 2 V23 DVSS AVSS18_MD AJ6
[4] GND_VCORE_FB GND_VPROC_PMIC_FB_6328
[4]
N8 DVDD_CORE DVDD_CPU N20 W7 DVSS AVSS18_MD AJ9
N10 DVDD_CORE DVDD_CPU T12 W8 DVSS AVSS18_MD AK5
N22 DVDD_CORE DVDD_CPU T13 W9 DVSS AVSS18_MD AK9
T8 DVDD_CORE DVDD_CPU T14 W10 DVSS AVSS18_MD AL5
T10 DVDD_CORE DVDD_CPU T15 W11 DVSS AVSS18_MD AL8
4 mil GND trace with good shielding to PMIC T22 DVDD_CORE
DVDD_CORE
DVDD_CPU
DVDD_CPU
T16 4 mil GND trace with good shielding to PMIC W12 DVSS
DVSS
AVSS18_MD
U7 T17 W13
(Differential) U8
U9
DVDD_CORE
DVDD_CORE
DVDD_CPU
DVDD_CPU
T18
T19
(Differential) W15
Y13
DVSS
DVSS PLL
U10 DVDD_CORE DVDD_CPU T20 Y15 DVSS
U11 DVDD_CORE DVDD_CPU U12 AA7 DVSS AG16
DVDD_CORE DVDD_CPU DVSS AVDD18_PLLGP VIO18_PMU
U22 U13 AA9
U23 DVDD_CORE DVDD_CPU U14 AA11 DVSS E1 150mils
DVDD_CORE DVDD_CPU DVSS AVDD18_MEMPLL VIO18_PMU
Y7 U15 AA13
Y8 DVDD_CORE DVDD_CPU U16 AA15 DVSS AE14
DVDD_CORE DVDD_CPU DVSS AVSS18_PLLGP C146 C147

2
Y9 U17 AA17 AG15
Y10 DVDD_CORE DVDD_CPU U18 AA19 DVSS AVSS18_PLLGP AH15 C147 close to AVDD18_MEMPLL(E1 ball) & DVDD18_MC1(F3 ball)
DVDD_CORE DVDD_CPU DVSS AVSS18_PLLGP 100nF 100nF
Y11 U19 AA21 AJ15 and keep trace length < 150mils
DVDD_CORE DVDD_CPU DVSS AVSS18_PLLGP

1
Y12 U20 AA23 AK15 0201 0201
AA8 DVDD_CORE DVDD_CPU V14 AB7 DVSS AVSS18_PLLGP
AA10 DVDD_CORE DVDD_CPU W14 AB9 DVSS E3
AA12 DVDD_CORE DVDD_CPU Y14 AB11 DVSS AVSS18_MEMPLL
AB8 DVDD_CORE DVDD_CPU AA14 AB13 DVSS
AB10 DVDD_CORE DVDD_CPU AB14 AB15 DVSS
AB12 DVDD_CORE
DVDD_CORE
DVDD_CPU
DVDD_CPU
AC14 AB17 DVSS
DVSS
PERI_D
AB19
AB21 DVSS C28
DVSS DVDD18_CONN VIO18_PMU
AB23 AB29
AC7 DVSS DVDD18_EFUSE AD3
AC8 DVSS DVDD18_IORB K27
DVSS DVDD18_IOLT VIO18_PMU
AC9
VLTE AC10 DVSS

C149 100nF

C150 100nF

C151 100nF

C152 100nF

C148 100nF
DVSS

2
W16 AC11 AA29
W17 DVDD_LTE AC12 DVSS DVDD18_IOLB AL20 0201 0201 0201 0201 0201
W18 DVDD_LTE AC13 DVSS DVDD18_IOLB AL26
VLTE_PMU DVDD_LTE DVSS DVDD18_IOLB

1
C W19 AC15 FSOURCE_P 1 2 VEFUSE C
W20 DVDD_LTE AC17 DVSS W30 R100 0
DVDD_LTE DVSS FSOURCE_P FSOURCE_P 0402

2
SH104 W21 AC18
1 2 W22 DVDD_LTE AC19 DVSS C27 20161020修改 R101
[4] VLTE_PMIC_FB DVDD_LTE DVSS DVDD18_MC0
W23 AC21 F3 VIO18_PMU NC 20161020由GND改改VEFUSE
W24 DVDD_LTE AC22 DVSS DVDD18_MC1
GND
C116 1uF

C117 1uF

C118 1uF

C119 1uF
C113 22uF

C114 22uF

C115 NC/22u

C120 4.7uF

C121 4.7uF

DVDD_LTE DVSS
1

Y16 AC23 G1 0402

DVDD_LTE DVSS DVDD28_MC1 VMC_PMU

1
0603 0603 0603 0201 0201 0201 0201 0402 0402 Y17 A27
DVDD_LTE DVSS C156 C155

2
Y18 B5 C155 close to DVDD18_MC0 and keep trace length < 150mils
DVDD_LTE DVSS
2

SH105 Y19 B7 C156 close to DVDD28_MC1 and keep trace length < 150mils
DVDD_LTE DVSS 4.7uF 100nF
[4] GND_VLTE_FB 1 2 Y20 B9 L31
DVDD_LTE DVSS DVDD28_MC2

1
Y21 B14 0402 0201
Y22 DVDD_LTE DVSS B18
Y23 DVDD_LTE DVSS B23
Y24 DVDD_LTE DVSS C6 H1
DVDD_LTE DVSS DVDD28_SIM1 VSIM1_PMU
AA16 C15
4 mil GND trace with good shielding to PMIC AA18 DVDD_LTE
DVDD_LTE
DVSS
DVSS
C22
AA20 C26 L2
(Differential) AA22 DVDD_LTE
DVDD_LTE
DVSS
DVSS
D3 DVDD28_SIM2
C153 C154
VSIM2_PMU

2
AA24 D5
AB16 DVDD_LTE DVSS D8
DVDD_LTE DVSS 100nF 100nF
AB18 D10
DVDD_LTE DVSS PERI_A

1
AB20 D11 0201 0201
AB22 DVDD_LTE DVSS D18
AB24 DVDD_LTE DVSS E24 N30
DVDD_LTE DVSS G10 AVDD18_MIPIRX0 W31
DVSS AVDD18_MIPIRX1 VIO18_PMU
G13 T1 VIO18_PMU
DVSS G15 AVDD18_MIPITX
DVSS G17
DVSS C157 C158

2
H10
VLTE_PMU
VLTE_SRAM DVSS
DVSS
H13
220nF 220nF
H15
DVSS

1
H17 N27 0201 0201
AC16 DVSS K7 AVSS18_MIPIRX0 L3
AC20 VLTE_SRAM DVSS K9 AVSS18_MIPITX
AC24 VLTE_SRAM DVSS L13
VLTE_SRAM DVSS
2

C122 L17
DVSS L18
100nF DVSS L23
DVSS
1

0201 M7 W1 VIO18_PMU
DVSS M9 AVDD18_USB T2
DVSS AVDD33_USB VUSB33_PMU
M11
DVSS M21
DVSS C160 C159

2
M23
DVSS N7
DVSS 1uF 100nF
N9 W2
DVSS AVSS33_USB

1
N11 0201 0201
DVSS N21
VSRAM_PMU DVSS N23
SRAM DVSS
DVSS
P7
B P8 B
16mil L14 DVSS P9 B30 VCN18_PMU
V19 DVDD_SRAM DVSS P10 AVDD18_WBG
V20 DVDD_SRAM DVSS P11
C125 C124 DVDD_SRAM DVSS C161
2

2
P12
DVSS P13
4.7uF 100nF DVSS 100nF
P14 C29
DVSS AVSS18_WBG
1

1
0402 0201 P15 D29 0201
DVSS P16 AVSS18_WBG E28
DVSS P17 AVSS18_WBG E31
DVSS P18 AVSS18_WBG F27
DVSS P19 AVSS18_WBG F28
DVSS P20 AVSS18_WBG L30
VDDQ DVSS
DVSS
P21 AVSS18_WBG
R7
DVSS R8
DVDD12_EMI DVSS R9
G9 DVSS R10
G12 DVDD12_EMI DVSS R11
G14 DVDD12_EMI DVSS R12
G16 DVDD12_EMI
DVDD12_EMI
DVSS
DVSS
R13 GND
G18 R14
C126 2.2uF

C127 2.2uF

C128 100nF

C129 100nF

C130 100nF

C131 100nF

C132 100nF

DVDD12_EMI DVSS
1

H9 R15
0402 0402 0201 0201 0201 0201 0201 H12 DVDD12_EMI DVSS R16
H14 DVDD12_EMI DVSS R17
DVDD12_EMI DVSS
2

H16 R18
H18 DVDD12_EMI DVSS R19
DVDD12_EMI DVSS R20
DVSS R21
DVSS T7
DVSS T9
DVSS
Schematic design notice of "10_BB_POWER"
page.
Note 10-1: 4 mil GND trace with good shielding to PMIC
U / IC-MT6735-LP3-E1-SBS_MAP0827
(Differential)
U / IC-MT6735-LP3-E1-SBS_MAP0827

Note 10-3: FSOURCE_P(EFUSE)

(1)FSOURCE_P EFUSE power(VEFUSE) should be
only for EFUSE usage(not share with other application)
A
(2)W/I EFUSE program, VEFUSE need 1uF bypass cap A
(pls refer to ¨LDO output voltage/current table〃)
(3)W/O EFUSE program, VEFUSE bypass cap should be
NC.

硕硕硕硕（深深）有有有有
Title 01 BB_POWER

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 1 of 18

5 4 3 2 1
 5 4 3 2 1

U101B
U101A

1
R203
NC
TP204
MT6735-SBS MT6735-SBS
D 0201 0.2mm SIM ABB_IF D
PMU_IF DRAM_IF
2

[11] SIM1_SCLK K4 AE13

AC2 J2 SIM1_SCLK C2KX26M_IN
[4] SYSRSTB SYSRSTB [11] SIM1_SIO SIM1_SIO
[11] SIM1_SRST J4
U4 SIM1_SRST AK14
[4] WATCHDOG WATCHDOG C2K_TX_BBIP
[11] SIM2_SCLK L4 AK13
K1 SIM2_SCLK C2K_TX_BBIN
[11] SIM2_SIO SIM2_SIO
[4] SRCLKENA0 V4 [11] SIM2_SRST K2 AL12
SRCLKENA0 SIM2_SRST C2K_TX_BBQP AK12
AC30 C2K_TX_BBQN
[4] SRCLKENA1 SRCLKENA1 AJ13
BPI-L/C C2K_RX1_BBIP AH13
C2K_RX1_BBIN
AK20 AG13
BPI_BUS20 C2K_RX1_BBQP AG14
AH19 C2K_RX1_BBQN
AC1 BPI_BUS19 AL15
[4] RTC32K1V8 RTC32K_CK C2K_RX2_BBIP
AK21 AL14
BPI_BUS18 C2K_RX2_BBIN
[4] PWRAP_SPI0_CSN Y4 AL21 AH14
Y3 PWRAP_SPI0_CSN BPI_BUS17 C2K_RX2_BBQP AJ14
[4] PWRAP_SPI0_CK PWRAP_SPI0_CK C2K_RX2_BBQN
[4] PWRAP_SPI0_MO AB2 AF20
AB1 PWRAP_SPI0_MO BPI_BUS16
[4] PWRAP_SPI0_MI PWRAP_SPI0_MI AG20 AH10 APC1 [9]
E2 EXTDN 1 2 BPI_BUS15 APC1
Y1 REXTDN R201 36 ohm/ 1% AF21 AJ10
[4] AUD_CLK_MOSI AUD_CLK_MOSI 0201 BPI_BUS14 APC2
[4] AUD_DAT_MOSI_1 Y2
W3 AUD_DAT_MOSI AG21
[4] AUD_DAT_MISO_1 AUD_DAT_MISO BPI_BUS13
AF22
AA2 BPI_BUS12
PWRAP_INT AH21
BPI_BUS11
AK22
BPI_BUS10
[10] BPI_BUS9 AG22
BPI_BUS9 AE10
LTEX26M_IN LTE_LTEX26M_IN[7]
AH22
C
PLLs Test Pin F16 EVREF [2,12]
[10] BPI_BUS8 BPI_BUS8
C

VREF AJ22 AK2

[10] BPI_BUS7 BPI_BUS7 LTE_TX_BBIP RF_TX_BBIP [7]
AK3 RF_TX_BBIN [7]
AK23 LTE_TX_BBIN
BPI_BUS6 AL3
LTE_TX_BBQP RF_TX_BBQP [7]
AL23 AK4 RF_TX_BBQN [7]
BPI_BUS5 LTE_TX_BBQN

DVDD12_EMI RFI_C AH7 RF_RX1_BBIP [7]

AG17 LTE_RX1_BBIP AJ7
[7] LTE_RFIC0_BSI_EN RFIC0_BSI_EN LTE_RX1_BBIN RF_RX1_BBIN [7]

[7] LTE_RFIC0_BSI_CK AG18 AK6 RF_RX1_BBQP [7]

RFIC0_BSI_CK LTE_RX1_BBQP AL6
LTE_RX1_BBQN RF_RX1_BBQN [7]

1
[7] LTE_RFIC0_BSI_D2 AK16
RFIC0_BSI_D2

2
R200 C202 AK7 RF_RX2_BBIP [7]
AL17 LTE_RX2_BBIP AK8
8K/1% 100nF [7] LTE_RFIC0_BSI_D1 RFIC0_BSI_D1 LTE_RX2_BBIN RF_RX2_BBIN [7]

1
0201 0201 AK17 AJ8
[7] LTE_RFIC0_BSI_D0 RFIC0_BSI_D0 LTE_RX2_BBQP RF_RX2_BBQP [7]
2

[2,12] EVREF AH8 RF_RX2_BBQN [7]

LTE_RX2_BBQN
1

AG19
2 C2K_TXBPI

2
R202 C203 C204
8K/1% AH5
100nF 1uF RFIC_ET_P
AH18 AH4
RFIC1_BSI_EN RFIC_ET_N
1

1
0201 0201 0201
2

AJ19
RFIC1_BSI_CK
AL18
RFIC1_BSI_D0
JTAG
AK19
AJ31 AK18 RFIC1_TX_BSI_EN
JTMS AJ18 RFIC1_TX_BSI_CK
AJ30 RFIC1_TX_BSI_D0 MISC BSI
JTCK
AJ29 BPI - L AD2 MIPI0_SCLK [8]
B JTDI AH1 RFIC_MIPI0_SCLK AB5 B
[7] LTE_TXBPI LTE_TXBPI RFIC_MIPI0_SDATA MIPI0_SDATA [8]
AK28
JTDO AD5 AC3
BPI_BUS27 RFIC_MIPI1_SCLK MIPI1_SCLK [9]
AB4 MIPI1_SDATA [9]
AG3 RFIC_MIPI1_SDATA
BPI_BUS26 AD4
Misc LTE_PAVM0

1
AG4 AC4
AK30 R207 BPI_BUS25 LTE_PAVM1
TESTMODE AE5
R204: 47K, R207: NC Ext. Buck for LTE VSRAM: Enable 47K BPI_BUS24
R204: NC, R207: 47K Ext. Buck for LTE VSRAM: Disable 0201 AF5
BPI_BUS23

2
AG5
BPI_BUS22 AUX IN
AF2
NC BPI_BUS21 AH11 AUX_IN2_NTC [4]
A1 AUXIN2 AG12 BOARD TEMPERATURE
NC AUXIN1 AP TEMPERATURE AUX_IN1_NTC [8]
A2 AF1 AG11 AUX_IN0_NTC [11]
A30 NC BPI_BUS4 AUXIN0
NC

2
A31 AE2 C205 C200 C201
B1 NC BPI_BUS3
B31 NC AG2 REF POWER 100nF 100nF 100nF C200/C201
close to BB
NC BPI_BUS2

1
AK1 0201 0201 0201
AL1 NC AE1 AL10 REFP
AL2 NC BPI_BUS1 REFP AK10
NC AVSS_REFN

2
AL30 AH2 C206
AL31 NC BPI_BUS0
NC 100nF

1
U / IC-MT6735-LP3-E1-SBS_MAP0827 0201
U / IC-MT6735-LP3-E1-SBS_MAP0827

Close to AP IC.

A A

硕硕硕硕（深深）有有有有
Title 02_BB_1

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 2 of 18

5 4 3 2 1
 5 4 3 2 1

U101C U101D

MT6735-SBS MT6735-SBS
CSI DSI USB MSDCs
[5] RCP P28 N2 TCP [5] [15] USB_DP U2 D26 MSDC0_RSTB [12]
N28 RCP TCP N1 V2 USB_DP MSDC0_RSTB
[5] RCN RCN TCN TCN [5] [15] USB_DM USB_DM B24 MSDC0_CMD [12]
MSDC0_CMD
[5] RDP0 N29 R2 TDP0 [5] C23 MSDC0_CLK [12]
P29 RDP0 TDP0 P2 USB_VRT_P0 V1 MSDC0_CLK E25
[5] RDN0 RDN0 TDN0 TDN0 [5] USB_VRT MSDC0_DSL MSDC0_DSL [12]

1
D25 MSDC0_DAT7 [12]
P30 R3 R303 MSDC0_DAT7 D23
[5] RDP1 RDP1 TDP1 TDP1 [5] MSDC0_DAT6 MSDC0_DAT6 [12]
[5] RDN1 P31 P3 TDN1 [5] 5K1 / 1% A24 MSDC0_DAT5 [12]
D RDN1 TDN1 MSDC0_DAT5 A23 D
0201 BC MSDC0_DAT4 E23
MSDC0_DAT4
MSDC0_DAT3
[12]
[12]
MSDC0_DAT3

2
[5] RDP2 T30 N3 B25 MSDC0_DAT2 [12]
R30 RDP2 TDP2 M3 MSDC0_DAT2 B26
[5] RDN2 RDN2 TDN2 MSDC0_DAT1 MSDC0_DAT1 [12]
A26 MSDC0_DAT0 [12]
T3 MSDC0_DAT0
[4] CHD_DP CHD_DP
[5] RDP3 T31 M1
U31 RDP3 TDP3 M2 T4
[5] RDN3 RDN3 TDN3 [4] CHD_DM CHD_DM H3 MSDC1_CLK MSDC1_CLK [11]
MSDC1_CLK
F2 MSDC1_CMD MSDC1_CMD [11]
T28 MSDC1_CMD
[5] RCP_A RCP_A
R28 G2 MSDC1_DAT3
[5] RCN_A RCN_A KEYPAD MSDC1_DAT3 H2 MSDC1_DAT2
MSDC1_DAT3
MSDC1_DAT2
[11]
[11]
MSDC1_DAT2 H4 MSDC1_DAT1
MSDC1_DAT1 MSDC1_DAT1 [11]
[5] RDP0_A T29 G4 MSDC1_DAT0 MSDC1_DAT0 [11]
R29 RDP0_A AG23 MSDC1_DAT0
[5] RDN0_A RDN0_A KPROW2
R1 MIPI_VRT AJ23
VRT AH23 KPROW1 L29
[11] KPROW0 KPROW0 MSDC2_CLK

1
[5] RDP1_A V30
U30 RDP1_A R302 Note: 12-1 K28
[5] RDN1_A RDN1_A MSDC2_CMD
1K5/ 1%
M30
V29 0201 MSDC2_DAT3 M31
RDP2_A MSDC2_DAT2

2
U29 AG24 L27
RDN2_A AK24 KPCOL2 MSDC2_DAT1 M27
[11] KPCOL1 KPCOL1 MSDC2_DAT0
[11] KPCOL0 AL24
V28 KPCOL0
U28 RDP3_A AH31
RDN3_A DISP_PWM DISP_PWM0 [5]
CONN_IF
F29 WB_CTRL0 WB_CTRL0 [13]
W4 WB_CTRL0 G29 WB_CTRL1
LCM_RST LCM_RST [5] WB_CTRL1 WB_CTRL1 [13]
W29 G28 WB_CTRL2 WB_CTRL2 [13]
CMDAT0 AA5 WB_CTRL2 H29 WB_CTRL3
DSI_TE DSI_TE [5] WB_CTRL3 WB_CTRL3 [13]
[5] GPIO43_Flash_EN W28 H28 WB_CTRL4 WB_CTRL4 [13]
CMDAT1 WB_CTRL4 J29 WB_CTRL5
[5] GPIO44_CAMERA_RESET Y31 I2C WB_CTRL5 WB_CTRL5 [13]
CMPCLK R304
1 2 4K7 0201
C C
R305
1 2 4K7 0201 B27 CONN_SCLK
VCAM_IO_PMU WB_SCLK CONN_SCLK [13]
[5] SCL0 AA30 B28 CONN_SDATA CONN_SDATA [13]
Y30 SCL0 WB_SDATA A29 CONN_SEN
[5] SDA0 SDA0 WB_SEN CONN_SEN [13]
R306
1 24K7 0201
R307
1 24K7 0201 E27 CONN_XO_IN
VIO18_PMU XIN_WBG CONN_XO_IN [13]
[5] SCL1 AB31
AB30 SCL1
[5] SDA1 SDA1 B29 CONN_RSTB CONN_RSTB [13]
Y27 WB_RSTB
[5] CMMCLK CMMCLK R308
Note: 1 24K7 0201
Y28 R309
1 24K7 0201 J28
CMMCLK1 12-2 VIO18_PMU ANT_SEL0
[11] SCL2 AA28 M28
AB28 SCL2 ANT_SEL1 L28
[11] SDA2 SDA2 ANT_SEL2

PCM (ext MD)

SPI
AB27 AE27 GPIO61_FLASH_EN[5]
AH28 AC27 SCL3 PCM_CLK
[11] EINT_ALPS SPI_CS SDA3 AD29 GPIO62_CTP_RSTB[5]
PCM_SYNC
[11] EINT_ACC AH29 AD28
SPI_CK PCM_TX
UART AD27
AG30 PCM_RX
SPI_MO AJ28
1.0mm TP205
1.0mm TP206 AJ27 UTXD0 GPIO
AH30 URXD0
SPI_MI AG27 AC31
AH27 UTXD1 SRCLKENAI
URXD1
AD30
AE29 UTXD2 AF28
I2S URXD2 EINT0
AE30 AE28 GPIO1_APA_EN [14]
AE31 UTXD3 EINT1
B URXD3 AF27 B
AK26 EINT2
I2S_BCK AF30
AL27 EINT3
[13] GPIO_GPS_LNA_EN I2S_LRCK WCN 6625 AF31
AK27 GPS_RX_IP E30 EINT4
I2S_DATA_IN [13] GPS_RX_IP GPS_RXIP
[13] GPS_RX_IN GPS_RX_IN D30 AL29
GPS_RX_QP C30 GPS_RXIN EINT5
[13] GPS_RX_QP GPS_RXQP
[13] GPS_RX_QN GPS_RX_QN C31 AK29 EINT_EAR [14]
GPS_RXQN EINT6
[13] F2W_CLK F2W_CLK D28 AJ26 CAM_PDN0 [5]
F2W_DATA D27 F2W_CLK EINT7
[13] F2W_DATA F2W_DATA AH26
WB_RX_IP K30 EINT8
[13] WB_RX_IP WB_RXIP
[13] WB_RX_IN WB_RX_IN J30 AG26
WB_RX_QP J31 WB_RXIN EINT9
[13] WB_RX_QP WB_RXQP
[13] WB_RX_QN WB_RX_QN H31 AH25 EINT_CTP [5]
U / IC-MT6735-LP3-E1-SBS_MAP0827 WB_TX_IP H30 WB_RXQN EINT10
[13] WB_TX_IP WB_TXIP
[13] WB_TX_IN WB_TX_IN G30 AG25 CAM_RST1 [5]
WB_TX_QP F30 WB_TXIN EINT11
[13] WB_TX_QP WB_TXQP
[13] WB_TX_QN WB_TX_QN F31 AK25 CAM_PDN1 [5]
WB_TXQN EINT12

U / IC-MT6735-LP3-E1-SBS_MAP0827

A Schematic design notice of "12_BB_2" A

page.
Note 12-1: MSDC2 Pin should be NC (No Connection) for MT6735M

Note 12-2: MT6735M does Not have CMMCLK1

function 硕硕硕硕（深深）有有有有
Please refer to MT6735M Design Notice for details Title 03_BB_2

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 3 of 18

5 4 3 2 1
 5 4 3 2 1

U401A 有限1.0mm
2 1
C448 100nF
CONTROL SIGNAL BUCK OUTPUT L406
[11] PWRKEY 0201 E2 A7 VPROC_SW 125mil VPROC_PMU
PWRKEY VPROC B7 0.33uH >5.5A <35mΩ 252010
HOMEKEY N6 VPROC C7
[11] HOMEKEY HOMEKEY VPROC D7
D3 VPROC B8
[2] SYSRSTB RESETB VPROC
D2
EXT_PMIC_EN
C16 VPROC_PMIC_FB_6328
[1]
VPROC_FB B15
AVSS45_VPROC_FB GND_VPROC_PMIC_FB_6328
[1]
[2] WATCHDOG M7
WDTRSTB_IN
1 2 N2 L405
R400 200K UVLO_VTH A12 VLTE_SW 1 2
0201 VLTE
75mil VLTE_PMU
P4 B12 0.47uH >3.5A <40mΩ 201610
UVLO_VTH R RANGE: FSOURCE VLTE C12
200KOHM ~ 250KOHM D4 VLTE
PMU_TESTMODE
[2,4] SRCLKENA0 P8 4 mil GND trace with
SRCLKEN_IN0 good shielding (Differential)
[2] SRCLKENA1 R5 C14 VLTE_PMIC_FB [1]
SRCLKEN_IN1 VLTE_FB E13
AVSS45_VLTE_FB GND_VLTE_FB [1]
[2] PWRAP_SPI0_CSN M6
D SPI_CSN D
[2] PWRAP_SPI0_CK K6
SPI_CLK L404
[2] PWRAP_SPI0_MO L6 A5 VCORE_SW 1 2 90mil VCORE_PMU
SPI_MOSI VCORE1 A6 0.47uH >4.5A <35mΩ 201610
N5 VCORE1 B5
[2] PWRAP_SPI0_MI SPI_MISO VCORE1
B1301 AUX ADC
[7] AUXADC_REF_RF 2 1 R15 C2 VCORE_PMIC_FB[1]
VAUX18 VCORE1_FB C1
SZ1005K182TF AVSS45_VCORE1_FB GND_VCORE_FB[1]

1 2 0402
[7] AUXADC_GND C442 1uF M12
C400 AVDD18_AUXADC

1
0201
1nF N13
AVSS18_AUXADC

2
[7] THERM_SENSE 0201 P14 L403
AUXADC_VIN A2 VSYS_SW 1 2
SH106 50mil VSYS_PMU
1 2 VSYS22 B2 0.47uH >2.5A <45mΩ 201610
VBAT INPUT VSYS22 C441
A11
B10 AVDD45_VPROC C3
VBAT VBAT 50mil
AVDD45_VPROC VSYS22_FB 10uF
B11
C10 AVDD45_VPROC 0603
D10 AVDD45_VPROC
AVDD45_VPROC L402
100mil VBAT 30mil B13 A15 VPA_SW 30mil VPA_PMU
C13 AVDD45_VLTE VPA 2.2uH >1.5A <140mΩ 201610
AVDD45_VLTE C440
2

1
D13 B14
D402 D400 C401 C4 AVDD45_VLTE VPA_FB
VBAT 30mil
AVDD45_VCORE1 2.2uF
PTVSHC3D4V5B PZ3D4V2H 22uF C5
AVDD45_VCORE1

2
B4 0402
AVDD45_VCORE1
1

0603
A1 LDO OUTPUT
B1 AVDD45_VSYS22 J1
VBAT 30mil
AVDD45_VSYS22 VM
1000mA DVDD12_EMI
Close to PMU
VBAT 30mil A16 P9 40mA VTCXO_0_PMU
1 2 4mil C15 AVDD45_VPA VTCXO_0 T16
VBAT R401 1R AVDD45_SMPS VTCXO_1 VTCXO_1_PMU
F10 400mA VRF18_0_PMU
C406 C407 0201 C402 VRF18_0
2

1
Close to PMU C403 C404 C405 F9
VRF18_1 R11
4.7uF 2.2uF 2.2uF 4.7uF 4.7uF 1uF VSIM1
50mA VSIM1_PMU
N11 50mA VSIM2_PMU
VSIM2
1

2
0402 0402 0402 0402 0402 0201

F3 150mA VCN18_PMU
20mil T13 VCN18 R13
Please refer to latest MMD design VBAT 120mil
AVDD45_LDO1 VCN28
50mA VCN28_PMU
20mil T8 R12 400mA VCN33_PMU
C408 2.2uF

C409 2.2uF

C410 2.2uF

C411 2.2uF

C412 2.2uF
AVDD45_LDO2 VCN33
1

1
20mil K1
20mil T11 AVDD45_LDO3 F2
0402 0402 0402 0402 0402
AVDD45_LDO4 VIO18
600/20mil VIO18_PMU
20mil M2 P11 20/6mil VUSB33_PMU
AVDD45_LDO5 VUSB33
2

1. VBAT_Buck input cap should connect to its individual GND first, then 2 K2 200/10mil VIO28_PMU
VIO28 P13
go to main GND. TREF VBATREF
2. Buck controller power trace (AVDD45_SMPS) must use single trace T15 200/10mil VEFUSE
VEFUSE
connected to system (battery) power directly, and canˇt merge with others.
3. Please refer to latest MMD design
VSYS_PMU
C413
20mil
20mil
20mil
J2
H3
E1
AVDD22_LDO1
AVDD22_LDO1 VMC
K4
R9
200/10mil
800/20mil
VMC_PMU
VMCH_PMU U401B
Audio
F1 AVDD22_LDO2 VMCH R10
C413 close to PMU 22uF 20mil
AVDD22_LDO3 VEMC_3V3
400/16mil VEMC_3V3_PMU
20mil G1 [7] MT6169_XO4_CLK J12 N15 MICBIAS1
0603 AVDD22_LDO4 T14 CLK26M AU_MICBIAS1
VCAMA
200/10mil VCAMA_PMU
C H5 M8 N16 C
DIG Power VCAMAF
200/10mil VCAM_AF_PMU [2] AUD_CLK_MOSI AUD_CLK AU_MICBIAS0 MICBIAS0
VIO18_PMU T2 H2 500/18mil VCAMD_PMU
DVDD18_IO VCAMD C423 C424

1
T3 E3 200/10mil VCAM_IO_PMU [2] AUD_DAT_MOSI_1 N8 G15 1 2
T5 DVDD18_DIG VCAMIO AUD_DAT_MOSI AU_FLYP C427 2.2uF
DVSS18_IO 1uF 1uF
H4 200/10mil VGP1_PMU [2] AUD_DAT_MISO_1 M10 F15 0402
VGP1 AUD_DAT_MISO AU_FLYN

2
C414 C416
2

VREF 0201 0201

C414/415/416 Close to PMU E4 400/16mil VSRAM_PMU D14 20mil 20mil VBAT
100nF 1uF VSRAM AVDD45_SPK
L4
VREF
1

C449 C436 C439 C438 C437 C425

2

1
0201 0201 C415 [14] SPKP_CON F16 E14
L3 SPK_P AVSS45_SPK
100nF AVSS45_VREF 1uF/NC 1uF 1uF 1uF 1uF 1uF
[14] SPKN_CON E16 R14
SPK_N VAUD28
1

2
0201 GND 0201 0201 0201 0201 0201 0201
Vibrator Driver [14] AU_HSP K15
A9 AU_HSP K16
AVSS45_VPROC AVDD28_AUD C426

1
B9 J4 15mil VIBR_PMU [14] AU_HSN J14
GND_VPROC C8 AVSS45_VPROC VIBR AU_HSN
C9 AVSS45_VPROC
VRTC [14] AU_HPL H15 K12
1uF single via to
AVSS45_VPROC AU_HPL AVSS28_AUD

2
D9 0201
AVSS45_VPROC
[14] AU_HPR H16 G13 GND plane
R8 1 2 AU_HPR AVDD18_AUD
RTC AVDD28_RTC
VRTC
R409 1K directly
B6 [14] ACCDET M14
GND_VCORE1 C6 AVSS45_VCORE1 R7
0201 ACCDET G14
AVSS45_VCORE1 AVSS28_RTC AVSS18_AUD VIO18_PMU
C435

2
D6 C434 [14] AU_VIN0_P M16
C11 AVSS45_VCORE1 T6 32K_IN M15 AU_VIN0_P
Please refer to latest MMD design AVSS45_VLTE XIN X400 100nF 22uF [14] AU_VIN0_N AU_VIN0_N
GND_VLTE D11 [14] AU_VIN1_P K13 F13
AVSS45_VLTE AU_VIN1_P AVSS18N_AUD C427/ C428/ C429 flying cap & holding cap

1
C428

1
D12 R6 32K_OUT 1 2 0201 0603 [14] AU_VIN1_N L13
AVSS45_VLTE XOUT 1 2 AU_VIN1_N C429

1
K14
GND_VSYS A3 R3 NC/SC-32S L14 AU_VIN2_P 2.2uF :
AVSS45_VSYS22 ENBB AU_VIN2_N 2.2uF

2
C433

2
B3 C432 H14 0402
AVSS45_VSYS22 AU_REFN 4.7uF for 16ohm reciver

2
T1 XOSC_EN_6169 [7] 0402
GND_VPA XOSC_EN NC/22 pF 0R/22pF
A14 U / MT6328E1 2.2uF for 32ohm reciver
AVSS45_VPA

1
0201 0201
B16 M9
AVSS45_SMPS RTC32K_2V8
P5 RTC32K1V8 [2] Close to MT6328 Pole4_J [14]
RTC32K_1V8_0
R4
E5 RTC32K_1V8_1
2
Pole4_J 包包
E12 AVSS45_LDO R410 1 2
AVSS45_LDO R471 0R OUT32K [7]
D5 100K
E10 AVSS45_LDO 20161020增增 0201 To improve noise level, connect to audio jack
G7 AVSS45_LDO 0402
AVSS45_LDO first,
1

E11 [2,4] SRCLKENA0 1 2 ENBB_6169 [7]

G8 AVSS45_LDO H12 R469 0R
E6 AVSS45_LDO AVSS45_LDO G12
0201 and then connect to GND
G9 AVSS45_LDO AVSS45_LDO F12
H10 AVSS45_LDO AVSS45_LDO G10
H7 AVSS45_LDO AVSS45_LDO F11
E7 AVSS45_LDO AVSS45_LDO G6
H8 AVSS45_LDO AVSS45_LDO L7 20161020删删R468
H9 AVSS45_LDO AVSS45_LDO L8
E8 AVSS45_LDO AVSS45_LDO L9
AVSS45_LDO AVSS45_LDO VBUS
E9 J6
J10 AVSS45_LDO AVSS45_LDO H6
AVSS45_LDO AVSS45_LDO
VCDT rating: 1.268V
J7 H11
J8 AVSS45_LDO AVSS45_LDO J11 1 2
AVSS45_LDO AVSS45_LDO R406 330K VCDT
J9 K11
AVSS45_LDO AVSS45_LDO C431 0201

1
K7 L12
B K8 AVSS45_LDO AVSS45_LDO L10 0603 25V 1 2 B
AVSS45_LDO AVSS45_LDO 1uF R407 39K
K9 L11
AVSS45_LDO AVSS45_LDO

2
0201
K10 0603 80mil
G11 AVSS45_LDO
AVSS45_LDO

1 2 CHR_LDO
R404 1.5K
0402
U / MT6328E1

80mil

1
Q400
1 3 2 VDRV [4]
Q401 WNM4002-3/TR
WPT2E33-3/TR

2
80mil

SH400
1 2 ISENSE [4]

2
C2K Version 6 Mode does NOT support 32K-less VIO18_PMU TP402
R405
1.0mm
0.2R 1% 差差

2
1206
TP400 SH401
TP403

1
R408 1 2 BATSNS [4]
1.0mm 1.0mm
100K
CON401 0201

1
4 125mil VBAT
VBAT+
7 3 2 1 BAT_ON [4]
NC NTC R467 1K
0201
2 2 1 AUX_IN2_NTC [2] 1 2 VBATREF
ID R470 1K R402 16.9K
0201 0201
1 BAT_ON_TP TP401

C430 22uF

C417 2.2uF

C418 100nF

C419 33PF
GND- D401 D403

3
1.0mm
4 mil trace with good shielding (Differential) 8 5 0603 0402 0201 0201

3
NC NC T402 T400 T401

2
U401C

1
6

2
NC
Charger BC1.1/1.2

ESD9N5V-2/TR

ESD9N5V-2/TR
PTVSHC3N4V5B

PTVSHC3N4V5B
From MT6328

1
2 1 J5 11900167/PAN25-04102-S100
C420 100nF FCHR_ENB M1
CHG_DM CHD_DM [3] ESD suggest <5pf on BAT_ON
[4] BATSNS 0201 N3
BATSNS

2
N1 CHD_DP [3]
N4 CHG_DP R403
[4] ISENSE SH403
ISENSE E15 1 2
Gauge CS_N
CS_N 合合合合0.01R±1%
VBAT M4 D15 CS_P 1 2
VSYSSNS CS_P 0805
SH402

1
C421
1

[4] BAT_ON P2 ISINK 4 mil trace with good shielding (Differential)

BATON R16
1uF ISINK0
VCDT R1
VCDT
2

0201 P15 1 2 ISINK1 [15]

R2 ISINK1 R337 18 ohm
[4] VDRV VDRV 0201
A A

CHR_LDO P3 N14
CHRLDO AVSS45_ISINK
C422
1

U / MT6328E1
1uF
2

0201

Close to PMIC

硕硕硕硕（深深）有有有有
Title 04_POWER_MT6328

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 4 of 18

5 4 3 2 1
 5 4 3 2 1

Sub
VIO18_PMU
CTP Connector Camera J504
1 24
GND1 AGND

2
[3] RDP0_A 2 23 VCAMA_PMU
R500 3 RDP0 VCMA 22 VCAMA VCAMIO VCAMD(NC)
[3] RDN0_A RDN0 VCMAF
NC 4 21 VCAM_IO_PMU 摄摄摄摄
5 GND2 VCMIO 20 合电合电
0201 J502 [3] RCP_A RCP VCMD VCAMD_PMU
[3] RCN_A 6 19 2.8V 1.8V 1.2V
RCN GND8

1
7 18 CMMCLK [3,5]
1 TP27 1.0MM 8 GND3 CMCLK 17
VGP1_PMU VGP1_PMU [3] RDP1_A

C528 100nF

C529 2.2uF

C530 100nF

C532 2.2uF

C533 2.2uF

C534 22uF
C531 100nF
VDD RDP1 GND7

1
[3,5] EINT_CTP 2 [3,5] EINT_CTP TP28 1.0MM [3] RDN1_A 9 16 SDA0 [3,5] 2M，IC：OV02680-H47A，IIC包地：0X6C
D
3 INT TP29 1.0MM 10 RDN1 SDA1 15 D
[3,5] SDA1 SDA [3,5] SDA1 GND4 SCL1 SCL0 [3,5] 0201 0402 0201 0402 0201 0402 0603
[3,5] SCL1 4 [3,5] SCL1 TP30 1.0MM 14
SCL GND6

2
[3,5] GPIO62_CTP_RSTB 5 [3,5] GPIO62_CTP_RSTB TP31 1.0MM 13 CAM_PDN1 [3]
6 RST CMPDN2 12
GND CMRST2 CAM_RST1 [3]
7 11
GND GND5 C502

1
8
C500 C501 T500 T501 T502 T503 GND
2

2
NC
2.2uF 25
100nF GND9

2
11900111/BL509-06G31-TAH1 26 27 0201
GND11GND10
1

1
0201 0402
CON_BL125-25RL-TAGF together then single via to main GND
25pin ZIF

VCAMA_PMU

Main VCAMA VCAMIO VCAMD

摄摄摄摄

Camera

2
合电合电
J501 R529 2.8V 1.8V 1.2V
0R
J503 0402 5M，IC：S5K5E8YX13-FGX2，
21
GND

1
IIC包地：0X20(W), 0X21(R)
[3] TDN0 20 31 1 30
19 DSI_D0- GND 30 2 GND1 AGND 29 VCAMA1
C [3] TDP0 DSI_D0+ SPK+ SPK1P [14] [3] RDP0 RDP0 VCMA
C
18 29 [3] RDN0 3 28 VCAM_AF_PMU
17 GND SPK+ 28 4 RDN0 VCMAF 27
[3] TCN CLK_STB- SPK- SPK1N [14] GND2 VCMIO VCAM_IO_PMU
[3] TCP 16 27 [3] RDP1 5 26 VCAMD_PMU
15 CLK_STB+ SPK- 26 6 RDP1 VCMD 25
GND GND [3] RDN1 RDN1 GND10
[3] TDN1 14 25 MICP0_CON [14] 7 24
13 DSI_D1- MIC+ 24 8 GND3 GND9 23
[3] TDP1 DSI_D1+ MIC- MICN0_CON [14] [3] RCP RCP CMCLK CMMCLK [3,5]
12 23 [3] RCN 9 22
GND GND 22 10 RCN GND8 21
VIBR_PMU SDA0 [3,5]

C522 2.2uF

C520 NC/2.2uF

C524 2.2uF
C521 100nF

C517 2.2uF

C518 100nF

C519 NC/100nF

C523 22uF

C526 100nF
VIB GND4 SDA

2
[3] RDP2 11 20 SCL0 [3,5]
12 RDP2 SCL 19 0201 0402 0201 0402 0603 0402
[3] RDN2 RDN2 GND7
0402 0201 0201
13 18 CAM_PDN0 [3]
GND5 CMPDN

1
[3] LCM_RST 11 [3] RDP3 14 17 GPIO44_CAMERA_RESET
[3]
10 RESET 15 RDP3 CMRST 16
[3] DSI_TE TE [3] RDN3 RDN3 GND6 C538

1
VIO18_PMU 9 31
8 IOVCC GND13
VIO28_PMU VCI NC
7 33 32
GND GND15GND14

2
0201
32 BL125-31RL-TAGF
6 GND 33
VLED_N LED- GND together then single via to main GND
5 31pin ZIF
4 LED-
3 NC
2 NC
1 LED+
VLED_P LED+

FH26-31S-0.3SHW
C503

C504

C505
1

31pin ZIF
0402 0201 0201
4.7uF\6.3V

100nF±20%

100nF±20%
2

LCD Connector VBAT

VBAT
B
LED500 LED501 B

2 A K 1 2 A K 1

T509
C543
T508

2
C560
2 A-SL686W1D-A01-4T T511

2
0201
1uF/6.3V A-SL686W1D-A01-4T
1uF

1
0201
PESDNC2FD5VB

PESDNC2FD5VB
1

1
2
R501

2
0402
33R_5% R537
33R

1
0402

3 1
3
Q501 Q500
1 WNM4002-3/TR 1 WNM4002-3/TR
[3] GPIO43_Flash_EN [3] GPIO61_FLASH_EN

2
1

1
R502 R562

0201
47K_5%

背背IC SWPA3012S4R7MT
2
47K
0402

2
L503
D501 1 2
VBAT R526 0R VLED_P
10uH±20%_1A_252010
Rohm RB160M-60 C514 C525 C516
Front
0603
2

C513
2

10uF 1uF 1uF 33pF

R525
Back
1

0603 22R 0603 50V 0603 50V 0201

0402
U502 FlashLED
1

6
VIN SW
4 FlashLED
A A
[3] DISP_PWM0 1 2 5 1 VLED_N
R530 0R CTRL FB
0201
1

3
GND1
2

R524 C515 2 7
NC GND2 R527
47K 4.7uF C527
1

SGM3756YTDI6G/TR 5.1R
1

0201 0402
NC/47nF
2

0402
2

0201

硕硕硕硕（深深）有有有有
贴ET5123/EUP2961A时，C527 NC
贴SGM3749时，C527 47nF Title 05_LCD/CAM/CTP/FLASH LED

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 5 of 18

5 4 3 2 1
 5 4 3 2 1

U101G

MT6735-SBS
EMI_IF
D D
[12] DQ[0..31] B4 CS0_N [12]
RCS_B B3
RCS1_B CS1_N [12]
DQ0 A12
DQ1 C10 RDQ0 D4
RDQ1 RCKE CKE [12]
DQ2 B12
DQ3 C11 RDQ2 D14
RDQ3 RDQM0 DQM0 [12]
DQ4 B13 C14 DQM1 [12]
DQ5 D12 RDQ4 RDQM1 D7
RDQ5 RDQM2 DQM2 [12]
DQ6 A14 C19 DQM3 [12]
DQ7 A15 RDQ6 RDQM3
DQ8 B15 RDQ7 E15
RDQ8 RDQS0 DQS0_T [12]
DQ9 B16 E17 DQS1_T [12]
DQ10 D15 RDQ9 RDQS1 E12
RDQ10 RDQS2 DQS2_T [12]
DQ11 B17 F20 DQS3_T [12]
DQ12 D17 RDQ11 RDQS3
DQ13 C18 RDQ12 F15
RDQ13 RDQS0_B DQS0_C [12]
DQ14 A17 F17 DQS1_C [12]
DQ15 A18 RDQ14 RDQS1_B F12
C
RDQ15 RDQS2_B DQS2_C [12] C
DQ16 A9 E20 DQS3_C [12]
DQ17 A8 RDQ16 RDQS3_B
DQ18 B8 RDQ17
DQ19 B11 RDQ18 F9
RDQ19 RCLK0 CLK0_T [12]
DQ20 B10 E9 CLK0_C [12]
DQ21 C7 RDQ20 RCLK0_B
DQ22 A11 RDQ21
RDQ22 CA[0..9] [12]
DQ23 D9 D6 CA0
DQ24 D20 RDQ23 RA0 B6 CA1
DQ25 B19 RDQ24 RA1 A3 CA2
DQ26 D21 RDQ25 RA2 A6 CA3
DQ27 A20 RDQ26 RA3 A5 CA4
DQ28 B20 RDQ27 RA4 D2 CA5
DQ29 B22 RDQ28 RA5 C3 CA6
DQ30 B21 RDQ29 RA6 C2 CA7
DQ31 A21 RDQ30 RA7 B2 CA8
RDQ31 RA8 D1 CA9
B RA9 B

U / IC-MT6735-LP3-E1-SBS_MAP0827

A A
硕硕硕硕（深深）有有有有
Title 06_BB_3

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 6 of 18

5 4 3 2 1
 5 4 3 2 1

[8] RF_HB2_TX_MT6169 RF_HB2_TX_MT6169 1

RF_TXDET_MT6169 2 RF_TXDET RF_TXDET [9]
R708 62R
0201

2
R710 R709
[9] RF_MB2_TX_MT6169 RF_MB2_TX_MT6169 105R 105R
RF_MB1_TX_MT6169 0201 0201
[8] RF_MB1_TX_MT6169

1
RF_TX_BBIP [2]
[9] RF_LB3_TX_MT6169 RF_LB3_TX_MT6169 RF_TX_BBIN [2]

[8] RF_LB2_TX_MT6169 RF_LB2_TX_MT6169 RF_TX_BBQN RF_TX_BBQN [2]

RF_TX_BBQP RF_TX_BBQP [2]
RF_RX1_BBIP RF_RX1_BBIP [2]
RF_RX1_BBIN RF_RX1_BBIN [2]

D D
RF_RX1_BBQN RF_RX1_BBQN[2]
[9] RF_B40B41_PRX_MT6169_RFIP1_HB1 RF_RX1_BBQP RF_RX1_BBQP[2]
RF_RX2_BBIP RF_RX2_BBIP [2]
RF_RX2_BBIN RF_RX2_BBIN [2]
[9] RF_B40B41_PRX_MT6169_RFIN1_HB1
RF_RX2_BBQN RF_RX2_BBQN[2]
RF_RX2_BBQP RF_RX2_BBQP[2]

M13

M15
G14

G13
C15

C14

D14

H15

H14

N15

N14

N13

H13
B15

K14

K13

E13
E14
E15
F15

F14

F13
L13

L14
J14

J15

J13
M7

M6

M5

M4
N8

N7

N5

N4
H12

RFIN1_HB1

RFIP1_HB1

RFIN1_LB1

RFIP1_LB1

TX_LB1

TX_LB2

TX_LB3

TX_LB4

TX_MB1

TX_MB2

TX_HB1

TX_HB2

TXDET

TX_BBIP

TX_BBIN

TX_BBQN

TX_BBQP

RX1_BBIP

RX1_BBIN

RX1_BBQN

RX1_BBQP

RX2_BBIP

RX2_BBIN

RX2_BBQN

RX2_BBQP

DET_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TST4 M12
TST3 K10 LTE_TXBPI
TXBPI LTE_TXBPI [2]
N10 VRT
VRT
根根PCB选选选分分分PIN TST2
M10
M9
only 5% resistor

B14 TMEAS K6 LTE_RFIC0_BSI_CK

[9] RF_B3_PRX_MT6169_RFIP1_MB1 RFIP1_MB1 BSI_CK LTE_RFIC0_BSI_CK[2]

2
J7 LTE_RFIC0_BSI_EN LTE_RFIC0_BSI_EN[2]
B13 BSI_EN J6 LTE_RFIC0_BSI_D0 R700
[9] RF_B3_PRX_MT6169_RFIN1_MB1 RFIN1_MB1 BSI_D0 LTE_RFIC0_BSI_D0[2]
J5 LTE_RFIC0_BSI_D1 LTE_RFIC0_BSI_D1[2] 2K 1%
A15 BSI_D1 K4 LTE_RFIC0_BSI_D2
[9] RF_B5_PRX_MT6169_RFIP1_LB2 RFIP1_LB2 BSI_D2 LTE_RFIC0_BSI_D2[2] 0201

1
[9] RF_B5_PRX_MT6169_RFIN1_LB2 A14
RFIN1_LB2
[9] RF_B40_PRX_MT6169_RFIP1_HB2 B12
RFIP1_HB2 L12
A12 GND L11
[9] RF_B40_PRX_MT6169_RFIN1_HB2 RFIN1_HB2 GND L10
A11 GND L9
[9] RF_B8_PRX_MT6169_RFIP1_LB3 RFIP1_LB3 GND L8
B11 GND L7
[9] RF_B8_PRX_MT6169_RFIN1_LB3 RFIN1_LB3 GND L6
B10 GND L3
[9] RF_B1_PRX_MT6169_RFIP1_MB2 RFIP1_MB2 GND K12
B9 GND K9
[9] RF_B1_PRX_MT6169_RFIN1_MB2 RFIN1_MB2 GND K8
A9 GND K7
[9] RF_B7_PRX_MT6169_RFIP1_HB3 RFIP1_HB3 U701 GND K3
U / MT6169
C C
A8 GND J12
[9] RF_B7_PRX_MT6169_RFIN1_HB3 RFIN1_HB3 GND J11
B8 GND J10
RFIP2_LB1 GND
RFIN2 差分分分 B7
MT6169/VFBGA175/P0.4/B0.25/6.2X5.4
GND
J9
J8
RFIN2_LB1 GND J4
B6 GND J3
[10] RF_B40B41_DRX_MT6169_RFIP2_HB1 RFIP2_HB1 GND
[10] RF_B40B41_DRX_MT6169_RFIN2_HB1 A6
RFIN2_HB1
A5 H11
RFIP2_LB2 GND H10
B5 GND H9
RFIN2_LB2 GND H8
B4 GND H7
[10] RF_B3_DRX_MT6169_RFIP2_HB2 RFIP2_HB2 GND H6
B3 GND H5
[10] RF_B3_DRX_MT6169_RFIN2_HB2 RFIN2_HB2 GND H4
A3 GND H3
[10] RF_B1_DRX_MT6169_RFIP2_MB1 RFIP2_MB1 GND G12
A2 GND G11
[10] RF_B1_DRX_MT6169_RFIN2_MB1 RFIN2_MB1 GND G10
A1 GND G9
[10] RF_B8_DRX_MT6169_RFIP2_LB3 RFIP2_LB3 GND G8
B1 GND G7
[10] RF_B8_DRX_MT6169_RFIN2_LB3 RFIN2_LB3 GND G6
GND G5

VDCXO_DIG
EN_26M_BB
RFIN2_MB2
RFIP2_MB2

RFIN2_HB3

GND
RFIP2_HB3

V28_ESD1
G4
OUT_32K

CLK_SEL
GND

VRXHF2
VRXHF1
G3
32K_EN

XMODE

VTCXO
VTXHF

VRXLF
GND

VTXLF
XTAL2
XTAL1
G2
TST1

GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XO3
XO4
XO2
XO1

VIO
C1

C2

D2

E2

F1
J2
F3

G1
H2
H1
M1

K1
K2

L2
N1
N2

C8
D13
M11
N11
K11
M8
L4
M3
J1

C3
C4
C5
C6
C7
C9
C10
C11
C12

D3
D4
D5
D6
D7
D8
D9
D10
D11
D12

E1
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12

F2
F4
F5
F6
F7
F8
F9
F10
F11
F12
VRF18_0_PMU
32K_EN

VTCXO_0_PMU
VIO18_PMU

VTCXO_0_PMU VTCXO_0_PMU
B 1 2 1 2 B
R703 NC/0R R704 0R
[10] RF_B7_DRX_MT6169_RFIP2_HB3 0201 0201 VIO18_PMU

2
C701 C700
1

2
[10] RF_B7_DRX_MT6169_RFIN2_HB3 C702
100nF 100nF
1

2
R702 C706 C705 C704 C703
100nF

1
[4] OUT32K NC/1K R706 R705 0201 0201
100nF 100nF 100nF 100nF

1
0R NC/0R 0201

1
0201 0201 0201 0201 0201
[4] XOSC_EN_6169
2

0201 0201
2

XMODE VRF18_0_PMU VRF18_0_PMU

1 2 VIO18_PMU
R707 NC/0R
0201
1

R711 0R VTCXO_0_PMU
R701
0201 C710

1
NC/0R
0201 2.2uF
[4] MT6169_XO4_CLK
2

2
0402

[13] CLK_WCN CLK_WCN ENBB_6169 ENBB_6169 [4,7]

ENBB_6169 ENBB_6169 [4,7]

[2] LTE_LTEX26M_IN
Far end Cap. For PMIC stability
Xtal2 1 2
X701 R712 NC/0R
0201
[4] AUXADC_REF_RF 1 2 4 3
R714 100K THERM HOT
0201
[4] THERM_SENSE 1 2
R715 0R
0201
Xtal1 1 2 TSX_G
HOT GND
Xtal / 26 / MHz
2

C711

2
C707
1uF
NC/100nF
1

0201

1
[4] AUXADC_GND 1 2 TSX_G
R716 0R
1

0201
R713

1
A A
NC/0R
X700NC

GND

NC

Vcon
0201 VTCXO / 26 / MHz / KT2520F26000DCW28QAK
2

TCXO/SMD/2.5X2.0/KT2520F
OUT

Vcc
NC
VTCXO_0_PMU
4

6
1.Route AUXADC_REF_RF/THERM_SENSE with 4mil trace width
2.Route AUXADC_REF_RF/THERM_SENSE as differential trace with well GND shielding
2

2
C709 C708
3.Route AUXADC_GND with 24mil trace width under NC NC/100nF 硕硕硕硕（深深）有有有有
THERM_SENSE/AUXADC_REF trace to provide
1

1
0201 0201 Title 07_RF_MT6169_PIN_OUT
return current path.
设设 审审 Board Name Rev
甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 7 of 18

5 4 3 2 1
 5 4 3 2 1

D D

B5 TX
[9] RF_B5_PA_DPX 2 1 RF_B5_PA_PA
L802 0201 8.2pF
C828 C827

1
9.1nH 10nH

2
0201 0201

LTE_VMIPI 2 1 VIO18_PMU
R806 0R
B8 TX 0402

[9] RF_B8_PA_DPX 2 1 RF_B8_PA_PA

L803 0201 6.2nH
C830 C829

1
1pF NC For power LTE_VMIPI star connection

2
0201 0201

B3 TX
[9] RF_B3_PA_DPX 2 1 RF_B3_PA_PA
C831 3.9pF
C833 C832

1
0201
NC 7.5nH

2
0201 0201

4G PA input need LPF for harmonic rejection

3/4G_PAIN_LB
C B1 TX
RF_LB2_TX_PA 2
L813 0201
1
9.1nH
RF_LB2_TX_1 1 2
C873 33 pF
0201
RF_LB2_TX_MT6169 RF_LB2_TX_MT6169
[7]
C
C871 C872

1
3.3pF 3.3pF
[9] RF_B1_PA_DPX 2 1 RF_B1_PA_PA
L805 0201 3.6pF

2
0201 0201
C836 C837

1
NC 3.0nH
20161020修改修修
3/4G_PAIN_MB

2
0201 0201
U800

21
20
19
18
17
16
AP7219M RF_MB1_TX_PA 2 1 RF_MB1_TX_1 1 2 RF_MB1_TX_MT6169
L812 0201 4.7nH C870 33 pF RF_MB1_TX_MT6169
[7]

MB1
LB5
LB1
LB2
LB3
LB4
VPA_PMU 0201
C868 C869

1
22 15
C839 C838 GND GND

2
23 14 1pF 1pF
24 MB2 GND 13
470nF 100pF GND RFIN_L
Power Net Connection

2
25 12 0201 0201
MB3 RFIN_M

1
0201 0201 26 11
27 MB4 NC 10
28 GND NC 9

L/M/H PA
29 VCC2_2 NC 8
VPA_VCC1 VCC1 VBAT VBAT
30 7 LTE_VMIPI
C841 VCC2 VIO

2
C840 31 6 MIPI0_SCLK [2]
32 GND SCLK 5
1uF 100pF B34/39 SDATA MIPI0_SDATA [2] T801
C861 C867 C866

2
VPA_VCC1 1 2 10mil 33 4
R801 0R HB1 GND

1
0201 0201 34 3 RF_HB2_TX_PA 1nF 100pF
0201 GND RFIN_H 100nF
35 2
HB2 GND

1
VPA_PMU 36 1 0201 0201 0201
GND GND
C843 C842

2
VPA_PMU 50mil VPA_PMU

GND

GND

GND
GND
GND
GND
GND
GND
GND
GND
HB3

HB4

RX1
RX2
470nF 100pF

1
2

C844 0201 0201

37
38
39
40
41
42

43
44
45
46
47
48
49
50
1uF
1

0201

TXM_RX1
VPA_VCC1 and VPA PMU need to be connected after Cap 3/4G_PAIN_HB

2
R802 2 1 RF_HB2_TX_1 1 2 RF_HB2_TX_MT6169 RF_HB2_TX_MT6169
[7]
R805 3.3nH C864 8.2pF
NC 0201 0201
C862 C863

1
U801 0201

B40 TRX

1
5

B B
1.2pF 1.2pF
3
G

2
1 2
RF_B40_TRX_BAW_IN 1 RF_B40_TRX_PA 0201 0201
1 2 2 1 4 IN L806 0201 1nH
[9] RF_B40_TRX_TXM C849 12pF L807 0201 6.8pF OUT C846 C845
G

C848 C847
1

0201 SAFEA2G35MF0F0A 10nH NC

2

NC 10nH
2

0201 0201 LPF for more margin

2

0201 0201 on Tx spurious

B7 TX
[9] RF_B7_PA_DPX RF_B7_PA_DPX 1 2 RF_B7_PA_PA
C850 2.7nH RF_B40B41_PRX_PA 2 1
R803 0 ohm RF_B40B41_PRX_PA_1
[9]
C852 C851
1

0201
0201
NC 1pF
2

0201 0201

U802
B41 TRX
5

3
G

G 1 2
RF_B41_TRX_BAW_IN 1 RF_B41_TRX_PA
2 1 4 IN L809 0201 1nH
[9] RF_B41_TRX_TXM L808 0201 6.8pF OUT C853 C856
G

C854 C855
Thermistor / To sense board
1

SAFFB2G60MA0F0A 10nH NC
2

NC 10nH
2

0201 0201
2

0201 0201
level temperature VIO18_PMU

2
R804
390K1%
0201

1
AUX_IN1_NTC RF PA TEMPERATURE
[2] AUX_IN1_NTC

2
NTC801
NTC801 close to PA , and located in the same layer NTC / NTCG064EF104F / 0201

A 0201
A

1
硕硕硕硕（深深）有有有有
Title 08_RF_MT6169_RF_TX

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 8 of 18

5 4 3 2 1
 5 4 3 2 1
RF_TXDET RF_TXDET [7]

VBAT
T901
SP10T C910 C911 C912

1
22uF 10pF 1nF

2
20161020 修改修修 0603 0201 0201
U900
ASM_Main B5 TRX

19

18

17

16

15

14

13

12
AP6716M-31

[8] RF_B5_PA_DPX

NC

GND

CPL_O

GND

GND

GND

GND

GND
APC1_TXM 1 2 APC1 APC1 [2]
R908 10K 1
RF_B5_PRX_DPX_RFIP1 2
0201 L919 6.2nH RF_B5_PRX_MT6169_RFIP1_LB2
[7]
C909

2
20 11 SAYEY836MCA0F0A
GND GND 0201

1
CON901 R905
220pF
21 10 24K [9] RF_B5_TRX_TXM 2 1 RF_B5_TRX_DPX
6 3 L917 L918
GND VBAT C928 4.3nH ANT TX

1
2 0201 1 NC NC
RX

1
3 1 2 1 RF_Ant_TRX_carkit 1 2 RF_Ant_TRX_TXM 22 9 0201 0201 8
C903 33 pF ANT VCC C938 RX

2
4 20161020 NC->220pF L916 0201 0201

D D

G
G
G
G
1

1
0201 23 8 9.1nH
GND VRAMP NC

2
10020032 L900 L901 U905 1
RF_B5_PRX_DPX_RFIN1 2 RF_B5_PRX_MT6169_RFIN1_LB2
[7]
CON900 L920 6.2nH

7
5
4
2
NC NC 24 7 LTE_VMIPI 0201 0201
ECT818000291 TRX14 VIO

3
0201

2
0201 0201 25 6 MIPI1_SDATA MIPI1_SDATA [2]
TRX13 SDATA

2
26 5 MIPI1_SCLK MIPI1_SCLK [2]
TRX12 SCLK
C908

1
27 4
TRX11 GND
10nF
[8] RF_B41_TRX_TXM 28 3 RF_MB2_TX_PA
TRX10 RFIN_H

2
0201
[8] RF_B40_TRX_TXM 29 2 RF_LB3_TX_PA
TRX9 RFIN_L
[9] RF_B7_TRX_TXM 30 1
TRX8 GND
39

TRX7

TRX6

TRX5

TRX4

TRX3

TRX2

TRX1

GND
GND

B8 TRX

31

32

33

34

35

36

37

38
[8] RF_B8_PA_DPX

[9] RF_B1_TRX_TXM MT6169 TX Ouput need a DC block(MUST). 1

RF_B8_PRX_DPX_RFIP1 2 RF_B8_PRX_MT6169_RFIP1_LB3
[7]
L913 6.2nH
[9] RF_B8_TRX_TXM SAYEY897MCA0B0A 0201

1
[9] RF_B40_RX
[9] RF_B3_TRX_TXM [9] RF_B8_TRX_TXM 2 6
1 RF_B8_TRX_DPX 3 L912 L915
C920 33pF ANT TX
[9] RF_B5_TRX_TXM
2G_PAIN_HB RX
1 NC NC

1
0201 8
L935 L911 RX 0201 0201

G
G
G
G
NC 4.7nH

2
1 2 1
RF_MB2_TX_1 2 RF_MB2_TX_MT6169 RF_MB2_TX_MT6169
[7] U908 1
RF_B8_PRX_DPX_RFIN1 2 RF_B8_PRX_MT6169_RFIN1_LB3
[7]
R903 0R C905 33 pF L914 6.2nH

7
5
4
2
0201 0201
0201 0201

2
0201

2
R904
NC
0201

1
2G_PAIN_LB
1 2 RF_LB3_TX_11 2 RF_LB3_TX_MT6169 RF_LB3_TX_MT6169
[7]
R902 12R C904 33pF
0201

1
0201

C C
R900 R901
430R 430R
0201 0201 B3 TRX

2
[8] RF_B3_PA_DPX

2
RF_B3_PRX_DPX_RFIP1 1 RF_B3_PRX_MT6169_RFIP1_MB1
[7]
C919 18pF
Pi attenuation for LB 8PSK TX in RX band noise B8656

2
0201
[9] RF_B3_TRX_TXM 2 1 RF_B3_TRX_DPX
6 3 L909 L910
C913 1.0nH ANT TX 1 NC 4.7nH
RX

1
0201 8
C914 RX

1
L902 0201 0201

G
G
G
G
1pF 3.3nH

1
U903 2
RF_B3_PRX_DPX_RFIN1 1 RF_B3_PRX_MT6169_RFIN1_MB1
[7]
C918 18pF

7
5
4
2
0201 0201
0201

2
B1 TRX B41 PRX
[8] RF_B1_PA_DPX
U941 1
RF_B40B41_PRX_balun_RFIP1 2 RF_B40B41_PRX_MT6169_RFIP1_HB1
[7]
1
RF_B1_PRX_DPX_RFIP1 2 C926 9.5pF
C930 18pF RF_B1_PRX_MT6169_RFIP1_MB2
[7]
C924

2
SAYEY1G95HA0F0A 1 4 0201 C927
GND Diff2
1

0201
NC 3nH
[9] RF_B1_TRX_TXM 1 2 RF_B1_TRX_DPX
6 3 L923 L924 [8] RF_B40B41_PRX_PA_1 1 2RF_B40B41_PRX_balun
2 3
L921 3.0nH ANT TX C923 3nH SE Diff1

1
1 3.6nH NC 0201 0201
0201 RX C921 0201 C922
2

1
8 LDM0Q2G5010BE005 1
RF_B40B41_PRX_balun_RFIN1 2 RF_B40B41_PRX_MT6169_RFIN1_HB1
[7]
RX C925 9.5pF
2

C935 L922 0201 0201

NC 0.9pF
G
G
G
G

2.2nH 0201
1pF
2

2
U901 1
RF_B1_PRX_DPX_RFIN1 2 RF_B1_PRX_MT6169_RFIN1_MB2
[7] 0201 0201
C929 18pF
1

7
5
4
2

0201 0201
0201
1

B B

B40 RX B7 TRX
[8] RF_B7_PA_DPX

2
RF_B40_PRX_SAW_RFIP1 1 RF_B40_PRX_MT6169_RFIP1_HB2
[7] 1 2 RF_B7_PRX_MT6169_RFIP1_HB3
[7]
C906 2.7pF C931 2.2pF
U940 B39272B8674P810
2

1
0201 0201
4 L903 L904 [9] RF_B7_TRX_TXM 2 1 RF_B7_TRX_DPX
6 3 L929 L928
G

2 1 1
RF_B40_PRX_SAW OUT L926 0201 1.8nH ANT TX 1
[9] RF_B40_RX C901 1.0nH IN NC 12nH RX 2.0nH NC

2
3 8
C915 0201 C902 OUT RX
G
1

0201 0201 L927 0201 0201

G
G
G
G
NC NC SAFFB2G35FB0F0A L925 1.5nH
5

2
2
RF_B40_PRX_SAW_RFIN1 1 RF_B40_PRX_MT6169_RFIN1_HB2
[7] 1pF U907 1 2 RF_B7_PRX_MT6169_RFIN1_HB3
[7]
C907 2.7pF C932 2.2pF
2

7
5
4
2
0201 0201 0201 0201
0201 0201

1
1

U1047
U1048 1 3 RF_B40_DRX_Balun_RFIN2

A A
SAW_LF1608-A1R7-ACX GND BAL
2 1RF_B40_DRX_SAW_IN1 3 RF_B40_DRX_SAW_OUT 2 1 RF_B40_DRX_SAW_switch 2 4 RF_B40_DRX_Balun_RFIP2
C1039 12 pF IN OUT C1040 10 pF UNBAL BAL
G

G
1

0201 0201 LDM0Q2G5010BE005

L1030 L1037 L1038
4

4.7nH 3.9nH NC
0201 0201
2

硕硕硕硕（深深）有有有有
Title 09_RF_MT6169_RF_PRX

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 9 of 18

5 4 3 2 1
 5 4 3 2 1

15
DRX Car Kit

GND
3
RF1
ANT1001 ANT1002 9 RF_B7_DRX_SWITCH
[10]
AW9108 RF2
U1009 2 RF_B41B_DRX_SWITCH
[10]
RF3
1

4
10 RF_B8_DRX_SWITCH
[10]
RF4
1 Feed

Feed

1 RF_B3_DRX_SWITCH
[10]
2 1 2 1 1 2 RF_Ant_DRX_switch
13 RF5
R1003 0 ohm C1024 33pF ANT
0201 RF6
11 RF_B1_DRX_SWITCH
[10] B3 DRX

1
L1025 0201
C1025 C1026
1

NC L1023 L1024 14 RF_B3_DRX_SAW_RFIP22 1 RF_B3_DRX_MT6169_RFIP2_HB2

[7]
CON1001 RF7 C1002 5.6pF
NC NC NC 47nH

D D
ECT818000291

1
0201 12 VTCXO_1_PMU
VTCXO_0_PMU 0201
RF8
2

0201 0201 0201 0201 VTCXO2 4 L1005 L1000

G
VDD
OUT
2

2 1 RF_B3_DRX_SAW
1

NC
[10] RF_B3_DRX_SWITCH 7.5nH NC

V1
V2
V3
C1000 2.2nH IN

2
3
C1001 OUT

G
1 2 0201 0201 0201
R907 0R

8
7
6
5
4
1.2pF U1003

2
0201
1 2 RF_B3_DRX_SAW_RFIN22 1 RF_B3_DRX_MT6169_RFIN2_HB2
[7]
R906 NC C1003 5.6pF

2
[2] BPI_BUS7 0201
0201
[2] BPI_BUS8 SAFFB1G84FL0F0A 0201
C1020 C875 C874

1
[2] BPI_BUS9
10pF 1uF NC/1uF
C1023 C1022

2
C1021

1
0201 0201 0201
18 pF 18 pF 18 pF

2
0201 0201 0201
R906 For power VTCXO2 star connection

B7 DRX B40/41 DRX

2 1
RF_B40B41_DRX_Balun_RFIP2
C1033 5 pF RF_B40B41_DRX_MT6169_RFIP2_HB1 [7]

1
U1045
RF_B7_DRX_SAW_RFIP22 1 RF_B7_DRX_MT6169_RFIP2_HB3
[7] L1033 L1032
C1005 4.7pF U1046 1 3RF_B40B41_DRX_Balun_RFIN2
GND BAL 2.4nH NC
2

1
0201 SAW_LF1608-A1R7-ACX
4 L1002 [10] RF_B41B_DRX_SWITCH 2 1RF_B41B_DRX_SAW_IN
1 3 RF_B41B_DRX_SAW_OUT 2 1 RF_B41B_DRX_SAW_switch 2 4
G

OUT C1037 12 pF IN OUT C1038 10 pF UNBAL BAL

1
[10] RF_B7_DRX_SWITCH 2 1 RF_B7_DRX_SAW
1 2.0nH 2 1 RF_B40B41_DRX_MT6169_RFIN2_HB1 [7]
C1004 18pF IN C1034 5 pF

2
1

1
3 L1017
0201 0201 LDM0Q2G5010BE005
OUT
1

0201 0201 NC L1029 L1036

2
L1003 U1007 4.7nH 3.9nH
5

2
NC RF_B7_DRX_SAW_RFIN22 1 RF_B7_DRX_MT6169_RFIN2_HB3
[7] 0201
C1006 4.7pF 0201 0201

2
0201 SAFFB2G65FB0F0A 0201

2
2

C C

B1 DRX RF_B1_DRX_SAW_RFIP2 2 1
C1014 2.2pF RF_B1_DRX_MT6169_RFIP2_MB1
[7]
2

0201
4 L1007
G

2 1 RF_B1_DRX_SAW
1 OUT
[10] RF_B1_DRX_SWITCH C1011 2.2nH IN 3.3nH
3
C1017 OUT
1

0201 0201
NC U1001
5

RF_B1_DRX_SAW_RFIN2 2 1 RF_B1_DRX_MT6169_RFIN2_MB1
[7]
C1015 2.2pF
2

0201
SAFFB2G14FA0F0A 0201

B8 DRX RF_B8_DRX_SAW_RFIP22 1
C1007 2.7pF RF_B8_DRX_MT6169_RFIN2_LB3
[7]
5

0201
3 L1004
G

2 1 RF_B8_DRX_SAW
1 OUT
[10] RF_B8_DRX_SWITCH C1008 1.0nH IN 12nH
4
C1010 OUT
1

0201 0201
NC U1008
2

RF_B8_DRX_SAW_RFIN22 1 RF_B8_DRX_MT6169_RFIP2_LB3
[7]
C1009 2.7pF
2

B B
0201
SAFFB942MFM0F0AR1X 0201

硕硕硕硕（深深）有有有有
Title 10_RF_MT6169_RF_DRX

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 10 of 18

A A

5 4 3 2 1
 5 4 3 2 1

SIM1
1.0MM 1.0MM 1.0MM 1.0MM

TP1104TP1106TP1105TP1107
Side Key
VSIM1_PMU
CARD
J1107

G3

G4
J1101
[4] PWRKEY 2 1 1 C1 C8

G
R1119 1K 0201 2 Power CA1 VCC RE C7
R1111 1K 0201 GND VCC I/O SIM1_SIO [2]
[3] KPCOL0 3 [2] SIM1_SRST C2 C6
R1117 1K 0201 KCOL0 RST VPP T1124

2
[3] KPROW0 4 CA2 C5
2 1 5 KROW1 C3 RST GND CA4
D
[3] KPCOL1 R1116 NC/1K0201 KROW0 [2] SIM1_SCLK CLK RE D
6 CA3 C4
GND T1126 T1129 T1131 CLK RE

1
C1120

2
[4] HOMEKEY 2 1 7
R1109 1K 0201 GND

G
8
T1118 T1105 T1104 T1103 GND 1uF
2

2
CAF99-08153-0106

G1

G2
R1118 0201
NC 11900111/BL509-06G31-TAH1

1
0201
1

SIM2
VSIM2_PMU CARD

G3

G4
J1103
C1 C8

G
CA1 VCC RE C7
VCC I/O SIM2_SIO [2]
[2] SIM2_SRST C2 C6
RST VPP T1111

2
CA2 C5
RST GND
G-SENSOR [2] SIM2_SCLK C3
CA3 CLK
CLK
RE
RE
CA4
C4

1
T1132 T1128 T1122

G
C1121
U1100 1uF CAF99-08153-0106

G1

G2
VIO18_PMU VIO18_PMU VIO28_PMU

1
0201
2 1 1 4
R1105 0R ADDR RSVD
C C
0201
2

[3,11] SDA2 2 3
R1115 SDA VDDIO 11
12 VDDIO
4.7K [3,11] SCL2 SCL 0201
10 2 1
0201 VDD 7 R1108 0R
VDD
1

[3,11] EINT_ACC 5
2 1 6 INT 8
R1107 0R GND GND
2

2
9 C1106 C1105
0201 GND
100nF 100nF
KXTJ2-1009
T-Flash
1

0201 1 0201 J1102

[3] MSDC1_DAT2 2 1 T1
R1106 33R DAT2
[3] MSDC1_DAT3 2 1 T2 G2
R1120 33R CD/DAT3
G
[3] MSDC1_CMD 2 1 T3 G3
R1121 33R CMD G
VMCH_PMU T4 G4
2 1 T5 VDD G G5
[3] MSDC1_CLK R1122 33R CLK G
T6 G1
2 1 T7 VSS SW
[3] MSDC1_DAT0 R1123 33R DATA0
[3] MSDC1_DAT1 2 1 T8
R1124 33R DATA1
TF-T11-BB09FXX0

T1127

T1123

T1130

T1121

T1125

T1120

T1133
2

2
C1122
20161008增增
4.7uF

1
U1101 0402

[3,11] SCL2 1 4 EINT_ACC [3,11]

SCL INT

2 5 SDA2 [3,11]
NC SDA

3 6 VIO28_PMU
GND VDD
B B
2

MXC4005XC C1123
1uF
1

0201 VIO28_PMU

VIO18_PMU

C1110
2

1
R1114 R1113 R1112 2.2uF
4.7K 22Ω 0R

2
0402
0201 0201 0201
U1102
1

1
2 1 8 5
C1109 2.2uF0402 VCC LEDA
[3,11] SCL2 7 4
SCL LEDC

Thermistor / To sense board [3,11]

[3]
SDA2

EINT_ALPS
1

2
SDA

INT
LDR

GND
3

level temperature VIO18_PMU STK3311-A

MARK点
HOLE
2

R1110 TP26 TP20 TP21 TP22 TP23 TP24 MARK1 MARK2 MARK3
390K / 1%
0201 ALS 1
1
1
1
1
1

1
AP TEMPERATURE
1

[2] AUX_IN0_NTC

+PS

1
MARK4
1
2

1
A NTC1100 close to BB ,and located in the same layer NTC1100 A
(can refer to thermal design notice) NTCG104EF104F
0402
Sensor
1

硕硕硕硕（深深）有有有有
Title 11_SIM_SD Card_Sensor

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 11 of 18

5 4 3 2 1
 5 4 3 2 1

Connect to AP
D
DQ[0..31] DQ[0..31] eMMC+LPDDR3 8GB eMMC + 8Gb LPDDR3 D

CA[0..9] CA[0..9] 221 Ball, 0.5mm

pitch
Hynix/H9TQ64A8GTMCUR-KUM
CS0_N CS0_N
CS1_N CS1_N
CKE CKE VDD1=1.8V
DQM0 DQM0 VDD2=1.20V
DQM1 DQM1
VDDCA=1.2V
DQM2 DQM2 VDD1 :
VDDQ= 1.20V DVDD18_EMI
DQM3 DQM3 Core 1 VIO18_PMU 2 1 DVDD18_EMI
R1203 0R
DQS0_C DQS0_C 0402
[6] CA[0..9]
DQS1_C DQS1_C U1200
CA0 Y2 F3
CA1 Y3 CA0 VDD1 F4
DQS2_C DQS2_C CA1 VDD1

2
C1201

2
CA2 W2 F9 C1200
CA3 W3 CA2 VDD1 G5
DQS3_C DQS3_C CA3 VDD1 1uF 100nF
CA4 V3 AA3
CA4 VDD1

1
DQS0_T DQS0_T CA5 L3 AA5 0201 0201
CA6 K3 CA5 VDD1 AB3 VDD2 :
CA7 J3 CA6 VDD1 AB4
DQS1_T DQS1_T CA7 VDD1 DVDD12_EMI
Core 2
CA8 J2 AB9
CA9 H2 CA8 VDD1
DQS2_T DQS2_T CA9
[6] DQ[0..31] F5
DQ0 W12 VDD2 F8
DQS3_T DQS3_T DQ0 VDD2
DQ1 V11 J5
DQ2 V13 DQ1 VDD2 K5
CLK0_T CLK0_T DQ2 VDD2
DQ3 U11 L2
DQ4 U13 DQ3 VDD2 L5
CLK0_C CLK0_C DQ4 VDD2
DQ5 T11 M5
DQ6 T13 DQ5 VDD2 N5
VREF_CA VREF_CA DQ6 VDD2
DQ7 R12 P5
DQ8 N12 DQ7 VDD2 P8
VREF_DQ VREF_DQ DQ8 VDD2
DQ9 M13 P11
DQ10 M11 DQ9 VDD2 R5
DQ11 L13 DQ10 VDD2 T5
DQ12 L11 DQ11 VDD2 U5
MSDC0_RSTB MSDC0_RSTB DQ12 VDD2
DQ13 K11 V5
DQ14 K13 DQ13 VDD2 W5
MSDC0_CMD MSDC0_CMD DQ14 VDD2
C DQ15 J12 AB5 C
DQ16 AB12 DQ15 VDD2 AB8
MSDC0_CLK MSDC0_CLK DQ16 VDD2
DQ17 AB11
DQ18 AB10 DQ17 G9
MSDC0_DSL MSDC0_DSL DQ18 VDDQ
DQ19 AA13 H8
DQ19 VDDQ C1207 C1206 C1205 C1204 C1203 C1202

2
MSDC0_DAT0 MSDC0_DAT0 DQ20 AA12 H12
DQ21 AA10 DQ20 VDDQ J11
DQ21 VDDQ 2.2uF 2.2uF 100nF 100nF 100nF 100nF
MSDC0_DAT1 MSDC0_DAT1 DQ22 Y13 K10
DQ22 VDDQ

1
DQ23 Y11 K12 0402 0402 0201 0201 0201 0201
MSDC0_DAT2 MSDC0_DAT2 DQ24 H11 DQ23 Power VDDQ L8
DQ25 H13 DQ24 VDDQ L9
DQ26 G10 DQ25 VDDQ M10
MSDC0_DAT3 MSDC0_DAT3 DQ26 VDDQ
DQ27 G12 M12
DQ28 G13 DQ27 VDDQ N11
MSDC0_DAT4 MSDC0_DAT4 DQ28 VDDQ
DQ29 F10 R11 1. VCC : Core Voltage 2.7v ~ 3.6v
DQ30 F11 DQ29 VDDQ T10
MSDC0_DAT5 MSDC0_DAT5 DQ30 VDDQ 2. VCCQ : IO Voltage 1.7v~1.95v (low voltage range)
DQ31 F12 T12
DQ31 VDDQ U8
MSDC0_DAT6 MSDC0_DAT6 R12001 2 240ohm0201 G2 VDDQ U9
R12011 2 240ohm0201 G3 ZQ0 VDDQ V10
MSDC0_DAT7 MSDC0_DAT7 ZQ1 VDDQ V12
F13 VDDQ W11
G11 VSSQ VDDQ Y8
H10 VSSQ VDDQ Y12
J8 VSSQ VDDQ AA9
J13 VSSQ VDDQ
K8 VSSQ K2
K9 VSSQ VDDCA N2
L10 VSSQ VDDCA U2
Power I/F L12 VSSQ
VSSQ
VDDCA
VDDCA
V2
M8
N13 VSSQ B3
VSSQ VCC VEMC_3V3_PMU
VIO18_PMU VIO18_PMU P9 B12
R13 VSSQ VCC B13
T8 VSSQ VCC C4
U10 VSSQ VCC D8
VEMC_3V3_PMU VEMC_3V3_PMU VSSQ VCC
U12 A4 VIO18_PMU
V8 VSSQ VCCQ B6
V9 VSSQ VCCQ B9
DVDD12_EMI DVDD12_EMI VSSQ VCCQ
W8 C7
VSSQ VCCQ C1231 C1230 C1209 C1208

2
W13 C11
Y10 VSSQ VCCQ A11
VSSQ VCCI 4.7uF 220nF 4.7uF 100nF
AA11
VSSQ

1
A7 MSDC0_DSL [3] 0402 0201 0402 0201
F2 DSL B8
VSS CLKm MSDC0_CLK [3]
C1210 C1232

1
G4 C2 MSDC0_RSTB [3]
G8 VSS RST A6 MSDC0_CMD [3]
H3 VSS eMMC CMD 100nF 1uF
VSS

2
H5 B4 MSDC0_DAT7 [3] 0201 0201
L4 VSS DAT7 A5 MSDC0_DAT6 [3]
B M3 VSS DAT6 A10 B
VSS DAT5 MSDC0_DAT5 [3]
M4 C9 MSDC0_DAT4 [3]
N4 VSS DAT4 B5
VSS DAT3 MSDC0_DAT3 [3]
N8 C6 MSDC0_DAT2 [3]
P4 VSS DAT2 B10 MSDC0_DAT1 [3] Close to Memory
P12 VSS DAT1 A9
VSS DAT0 MSDC0_DAT0 [3]
R3
R4 VSS
R8 VSS The eMMC VCC/VCCQ/VDDI bypass cap recommand value,
T4 VSS
Y4 VSS U3
please refer to vendor datasheet or
VSS CS0# CS0_N [6]
Y5
VSS CS1#
T3 CS1_N [6] MT6735 Design Notice (eMMC power capacitor value reference)
AA2
AA4 VSS LP-DDR3 T2 CKE [6,12]
AA8 VSS CKE0 R2 CKE [6,12]
VSS CKE1
H4 P3 CLK0_T [6]
J4 VSSCA CLK N3 CLK0_C [6]
K4 VSSCA CLK#
P2 VSSCA T9
VSSCA DQS0 DQS0_T [6]
U4 R9 DQS0_C [6]
V4 VSSCA DQS0# M9
VSSCA DQS1 DQS1_T [6]
W4 N9 DQS1_C [6]
VSSCA DQS1# Y9
DQS2 DQS2_T [6]
A3 W9 DQS2_C [6]
A8 VSSm DQS2# H9
VSSm DQS3 DQS3_T [6]
A12 J9 DQS3_C [6]
B2 VSSm DQS3#
B7 VSSm R10 DQM0 [6]
B11 VSSm DM0 N10
VSSm DM1 DQM1 [6]
C3 W10 DQM2 [6]
C5 VSSm DM2 J10
VSSm DM3 DQM3 [6]
C8
C10 VSSm M2
VSSm VREFCA EVREF [2,12]
C12 P13 EVREF [2,12]
C13 VSSm VREFDQ
D7 VSSm
VSSm C1233 C1211

2
AB14
A2 DNU AB13
VSF DNU 1uF 100nF
A13 AB2
VSF DNU

1
B1 AB1 0201 0201
B14 VSF DNU AA14
D2 VSF DNU AA1
D3 VSF DNU A14
D4 VSF DNU A1
D5 VSF DNU
D6 VSF
VSF
P10
ODT
A A

U / H9TP32A4GDCCPR-KGMx
FBGA221/P0.5/B0.27/11.5X13/SAMSUNG

硕硕硕硕（深深）有有有有
Title 12_Memory_eMMC_LPDDR3

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 12 of 18

5 4 3 2 1
 5 4 3 2 1

GPS co-VCTCXO: Suggest to reserve this option circuit,

since MTK will confirm if itˇs ok to implement this near MT6735 MP
Reserve Keep out region from L1 to Main GND
layer

D D

Close to Antenna
Same layer as Antenna, 50ohm trace reference to 3rd layer GND(2nd Layer clean) [3,13] CONN_XO_IN

U1306

[7] CLK_WCN 2 1 2 1 3 4 VCN28_PMU

50 Ohm R1318 0R R1319 NC OUT VCC
RF_WBT [13] 0201 0201

2
2 1 C1313
GND NC
ANT1301 ANT1302 1uF
TCXO/SMD/2.5X2.0/IT2205BE

1
8
0201
1

MB
1 7
GND GND
Feed

Feed

2 1 50 Ohm 2 6 50 Ohm RF_WF_5G [13]

R1314 0R COM HB
0402
2

3 5 [3] WB_CTRL4
R1312 R1313 GND GND
WB_CTRL3 [3]

LB
NC NC U1304
TP2012-A1255DA [3] WB_CTRL5

4
0201 0201
WB_CTRL2 [3]
1

50 Ohm GPS_RF_LNA [13] WB_AVDD18 WB_CTRL1 [3]

WB_CTRL0 [3]
2 1
C1312 100nF
0201 WB_RX_IP [3]
C C
2 1
C1311 100pF
WB_RX_IN [3]
0201

<Critical!!> U1302

30

29

28

27

26

25

24

23

22

21
5G PCB loss is higher and

WB_RX_IP
WB_AVDD18

WB_CTRL5

WB_CTRL4

WB_CTRL3

WB_CTRL2

WB_CTRL1

WB_CTRL0
NC

WB_RX_IN
Trace must kept short and 50-Ohm
No layer transition
U1303 FILTER/SMD/ACPF-7124

[13] RF_WBT 50 Ohm 2 1 4 1 2 1 50 Ohm WB_ANT 31 20 WB_RX_QP [3]

R1311 0R OUT IN R1308 0R WB_RF_2G WB_RX_QP
G
G
G

0201 0201
2

2
5
3
2

R1310 R1309 R1306 R1307

NC NC NC NC 32 19 WB_RX_QN [3]
VCN33_PMU NC WB_RX_QN
B1300
0201 0201 0201 0201 2 1
FM_AVDD28 VCN28_PMU
1

1
SZ1005K182TF
2 1 33 18 WB_TX_IP [3]
C1309 4.7uF WB_AVDD33 WB_TX_IP 0402
0402
Close to 2 1
C1310 100pF 34 17
MT6625 0201 WIFI5G_RF WB_TX_IN WB_TX_IN [3]

2 1

U / MT6625L / QFN40
[13] RF_WF_5G RF_WF_5G
R1305 0R 35 16
0201 NC WB_TX_QP WB_TX_QP [3]
2

R1327 R1304
NC NC
FM_AVDD28 36 15 WB_TX_QN [3]
0201 0201 AVDD28_FM WB_TX_QN 2 1
GPS_AVDD18 R1300 0R VCN18_PMU
1

2 1
B C1308 10nF 0402 B

2
C1300
[14] FM_RX_N_6625 0201 37 14 GPS_RX_IP [3]
FM_LANT_N GPS_RX_IP 1uF

1
0201

[14] FM_ANT 1 2 38 13 GPS_RX_IN [3] WB_AVDD18 2 1

L1316 0201 82nH FM_LANT_P GPS_RX_IN R1301 0R
0402
2

R1303 R1302
NC NC [13] GPS_ANT 50 Ohm 39 12 GPS_RX_QP [3]
GPS_RFIN GPS_RX_QP
0201 0201
1

GPS_AVDD18 40 11 GPS_RX_QN [3]

AVDD18_GPS GPS_RX_QN
2 1
AVDD28_FSOURCE

C1304 4.7nF
0201 41

GPS xLNA
DVSS F2W_DATA

F2W_CLK
Close to ANT
FM_DBG
HRST_B

SDATA

XO_IN
CEXT
SCLK

SEN
1

10
VCN28_PMU MT6625 IPD

CONN_XO_IN [3,13]
1

[3] CONN_RSTB

2
R1328 C1302 C1303
0 ohm 1uF 100pF
matching value depends on

1
0402 0201 0201
[3] F2W_DATA
2

LNA selected 2 1
C1305 1uF
U1308 0201
B39162B8813P810 U1307 [3] F2W_CLK
A A
[13] GPS_RF_LNA 1
50 Ohm 4 3 4
IN OUT L1303 5.6nH 2 RFIN VCC 5
GND SHDN GPIO_GPS_LNA_EN[3]
G
G
G

0201 1 6 GPS_ANT [13] [3] CONN_SCLK

GND RFOUT
2

C1307 C1306 50 Ohm

5
3
2

AW5005DNR
NC NC
[3] CONN_SDATA
1

0201 0201

[3] CONN_SEN

硕硕硕硕（深深）有有有有
Title 13_WIFI_BT_FM

设设 审审 Board Name Rev

Same layer as Antenna, 50ohm trace reference to 3rd layer GND(2nd Layer clean) 甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 13 of 18

5 4 3 2 1
 5 4 3 2 1

3.5mm AUDIO
C1415
JACK

1
U1400 C1423 单单单选包
4.7uF 100nF
D2
C1P

2
C1410

1
VDD0
A3 0402 0201 Pole4_J 包包
Speaker1 0402
2.2uF
C1
C1N
VDD1
B3 VBAT
[4,14] Pole4_J

2
D D
D3 1 2 [13] FM_RX_N_6625 2 1
D1 PVDD C1426 4.7uF R1417 0 ohm
C1411 C2P 0201

2
0402
0402 B4 2 1 SPK1P [5] L1404 B1410
2.2uF VOP R1429 NC
0201 B1 100nH 3.3K
C2N0

2
0603
1 2 B2
C1414 220pF C2N1 D4 2 1 0201 0402
0201
VON R1430 NC SPK1N [5] same power domain
[4,14] AU_HPR 1 2 2 1 A1 J1403
C1412 15nF R1426 10K INP

1
0603
0201 VIO18_PMU
[4,14] Pole4_J 1 2 2 1 A2 C1435 C1436 [13] FM_ANT 2 1 2
C1413 15nF R1427 10K INN R1416 0 ohm GND

GND0
GND1
GND2
0201 33pF 33pF 0201
0201 A4 [14] XMP3_R 1 2 3
SHDN 0201 0201 B1406 0402 1800ohm@100M Right
[3] GPIO1_APA_EN R1415
BGA_AW8736FCR

C2
C3
C4
1

470K
R1428 [14] XMP3_L 1 2 5
2 1 0201 B1407 0402 1800ohm@100M L_DET
NC/4.7K R1436 0 ohm SPKP_CON [4]
[3] EINT_EAR 2 1 1 2 4
0201 2
0603
1 R1414 47K B1408 0402 1800ohm@100M Left
R1437 0 ohm SPKN_CON [4]
2

0201
[4,14] ACCDET 2 1 [14] XMIC 1 2 1
0603 R1423 NC/47K B1409 0402 1800ohm@100M MIC
0201

2
AUDIO_JACK_JAF00-05152-0149
C1422 L1405
T1408 T1407 T1409 T1420 T1421

2
100nF 600ohm@100M
0201 0402

1
C <= 1pF

C C

Earphone
Audio C1424 C1425

1
33 pF 33 pF

2
0201 0201
[4] AU_HPL 1 2 XMP3_L [14]
R1412 51 ohm
0402
[4,14] AU_HPR 1 2 XMP3_R [14]
R1413 51 ohm
0402

2
Close to BB
close to connector R1419 R1420
Receiver 470R
0201
470R
0201

1
close to IC
C1405
1

T1400
1

33 pF
2

0201 RECEIVER
2

[4] AU_HSP 2 1
R1402 0 ohm
0402 J1400
C1406
100pF
B 0201 B

[4] AU_HSN 2
R1403
0402
1
0 ohm
T1401
Earphone MICBIAS1
2

C1407
1

33 pF
MICPHONE
1

1
2

0201 Close to BB Close to MIC R1409 R1425

1K NC 20161020增增
0201 0201

2
[4] AU_VIN1_N 1 2 AU_VIN1_N1 2 1
C1417 1uF C1421 4.7uF
MICBIAS0 0201 0402
C1419

1
20161020 100nF->1uF C1421靠靠靠靠靠靠靠
33 pF

2
1

C1418 0201 R1410 C1419/C1420/C1421包地地地分单地地地单单单选包

R1407 1.5K
100pF
1K
Handset Microphone 1 0201
C1420
0201

1
0201
2

Close to Close to 33 pF
BB MIC

2
0201
R1404 [4] AU_VIN1_P 1 2 XMIC [14]
C1416 1uF
1.5K
0201 TP14011.0mm 0201

[4] AU_VIN0_P 2 1 1 2 MICP0_CON [5] 20161020 100nF->1uF

R1405 0 ohm C1408 100nF 1 2
0402 ACC mode DCC mode [4,14] ACCDET R1411 0
0201
0201
2

C716
C1417 1uF 0 ohm
4.7uF 20161020 1K->0
TP14021.0mm C1416 1uF 0 ohm
1

0402
[4] AU_VIN0_N 2 1 1 2 MICN0_CON [5]
R1406 0 ohm C1409 100nF R1409 1K NC
A A
0402
0201
R1424
R1410 1.5K NC
1.5K
2.49K(for muti-key)
0201 R1425 NC
使使使使MIC时C1408/C1409改1.0uF /NC(for single key)

C1421 4.7uF 0 ohm

1

R1408
R1411 0 ohm NC
1K
0201 硕硕硕硕（深深）有有有有
2

Title
单单单选包 14_AUDIO

设设 审审 Board Name Rev

20161020增增 甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 14 of 18

5 4 3 2 1
 5 4 3 2 1

VBUS_IN VBUS

2 1
D R1510 NC/0 D
0603
U1501 1.0mmTP1501
1.0mmTP1501 VBUS_IN
1.0mmTP1502
1.0mmTP1502 USB_DP [3,15]
C1507
1

C2 A2 1.0mmTP1503
1.0mmTP1503 USB_DM [3,15]
IN1 OUT1
2

1uF C3 A3
R1508 B3 IN2 OUT2 B2
IN3 OUT3
2

0603 220K
0201 #ACOK
B1
USB
1

C1 A4 1.0mmTP1509
1.0mmTP1509
OVLO GND C4 J1500
GND2
HS IF
2

A1 B4 USB_3.2.01.0181A
R1509 #EN GND3
47K ET9539L
VBUS_IN 1
0201 1
1

[3,15] USB_DM 2
2
[3,15] USB_DP 3
3
4
4
5
5

T1501

T1502
C C

10
2

6
7
8
9
3

6
7
8
9
10
PESDNC2FD5VB

PESDNC2FD5VB
1

2
D1501 D1502
C<3pF

2
PTVSHC3N7VU
PTVSHC3N7VU

I/O CONNECTOR

Indicator
VBAT
LED
B LED301 B

1 A K 2 ISINK1 [4]

45-21SCUM2C-L1720NE6-TR8-T

A A

硕硕硕硕（深深）有有有有
Title 15_OVP_USB_LED

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 15 of 18

5 4 3 2 1
 5 4 3 2 1

Project : MT6735 REF_SCH TOP

LEVEL BPI, APC
MSDC 8-bit
MSDC0 / eMMC RXD / C2K ANT
eMMC5.1
RXD
+ LPDDR3 EMI 32-bit RxD FEM
RF IQ
DRAM IF
D
BSI ctrl MT6158 D
RX
micro SD
MSDC 4-bit
MSDC1 &
+ hot-plug LTE ANT
ABB MT6169
Connectivity ANT TX FEM
26M_BB
CONN IQ
GPI VTCXO
CLK Ctrl
26M
MT6625L CONN ctrl
26M_AUD
26M_NFC
TCXO CONN IF

LCD LCD IF LCD

module (MIPI DSI)

C
Camera
Modules
Camera IF

I2C
Camera
(MIPI CSI)
I2C_0
MT6735 C

CTP
controller
I2C
I2C_1
(SBS)
MEMs & ALS/PS
I2C
32K_BB
MT6328 ENBB/XOSC_EN
I2C_2
RTC 32K
LDOs LDOs
I2C_3
Vibrator VIB

Headset
Bucks (HPL, HPR, AU_VIN1)
SIM1
SIM1 SIM1 Receiver

AUD I/F
Audio AU_VIN0
Audio I/F Speech
B SIM2 SIM2 Speaker B
SIM2 SPI
PWRAP I/F

Fast Pulse
Charger
BC 1.1
Keypad Keypad

JTAG

UART JTAG
Debug port
UART

micro USB Battery

USB
A A

USB 2.0

USB 2.0
硕硕硕硕（深深）有有有有
Title 16_Block_Diagram

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 16 of 18

5 4 3 2 1
 5 4 3 2 1

D D

I2C Function I2C Spec. Budget I2C Slave Address (7-bit

Timing mode)
Rear camera (IMX135) I2C address: 0X10 (Write:0x20, Read:0x21)
Rear Camera - 13M 400 Kbps Yes. AF driver (DW9714A) I2C address: 0x0C (Write:0x18 , Read:0x19)
I2C-0
Front Camera 400 Kbps Yes. Front camera (GC2355) I2C address: 0x3C (Write:0x78, Read:0x79)

CTP 400 Kbps Yes. GT1151 / CTP I2C address: 0X5D (Write:0xBA, Read:0xBB) or 0x14 (Write:0x28, Read:0x29)

I2C-1

C C

M Sensor 2.5 Mbps AK09911 / M-Sensor I2C Address: 0x0D (Write:0x1A, Read:0x1B)

Gyro Sensor 400 Kbps Yes. ITG1010 / Gyro I2C Address: 0x68 (Write:0xD0, Read:0xD1)

I2C-2 Accelerometer 400 Kbps MC3410 / Accelerometer I2C address: 0x4C (Write:0x98, Read:0x99)

RGB / PS Sensor 400 Kbps CM36652 / RGB+PS I2C address: 0X60 (Write:0xC0, Read:0xC1)

NFC 1.2 Mbps Yes. MT6605 / NFC I2C address: 0X28 (Write:0x50, Read:0x51)

Flashlight Driver 400 Kbps LM3642 / Flashlight Driver I2C address: 0X63 (Write:0xC6, Read:0xC7)

I2C-3

Note : I2C Spec. : Standard mode (100 kbps) and Fast mode (400 kbps), Fast mode Plus (1 Mbps) and High-speed mode (3.4
B B
Mbps)

A A

硕硕硕硕（深深）有有有有
Title 17_I2C_ID_Overview

设设 审审 Board Name Rev

甘甘 肖肖肖 OP53_MB_V1.0 V1.0

Date: Wednesday, August 16, 2017 Sheet 17 of 18

5 4 3 2 1
 5 4 3 2 1

在SP510_MB_V1_0_20161210‐162基基基修改
D 2017/02/22修改点： D

1. 修改合修地分修修修修
2. 修改地摄摄摄修修修修修修
3. 修改LCD修修修修修修，把把把把修增把LCD地分修基
4. 去删选FPC
5. 修改T卡靠修修修，去删去去去去去
6. 修改SIM卡靠修修修，去删去去去去去
7. 增增地增增增去靠增增增增增
8. 修改靠靠靠修修修

2017/02/23修改点：
1. 增增USB合增
2. 修改背修修修修
3. 修改修增设设，增增RF PA修TVS
C
2017/02/24修改点： C

1. 修改背修修修修
2. 去删C937，改C910改22uF

2017/2/27修改点：
1. 去删去去去修去去点
2. 调调地调调调修修修
3. 修改修增设设
4. 修改U1303修修修
5. 修改LCD修修修

2017/3/2修改点：
1. 修改U802修修修改改1109
2. 修改T卡修修修
B
3. 修改修修修修修修修 B

2017/3/7修改点：
1. 去删地去增增去靠，增增单增增
2. 修改LCD地分修修修修修修修

2017/3/13修改：
1. 修改U1020修甘的修修
2. R404改改0402修修

2017/3/16修改点：
1. 修改T卡修修修

2017/3/17修改点：
1. 调调修增修增
A A

2017/3/20修改点：
1. 修改修修修修修

2017/3/21修改点：
1. 将增增去靠将把差差包改改POLE4_J Title
硕硕硕硕（深深）有有有有
18_Change_Notice

2. 修改修修修修修 设设
甘甘
审审
肖肖肖
Board Name
OP53_MB_V1.0
Rev
V1.0

Date: Wednesday, August 16, 2017 Sheet 18 of 18

5 4 3 2 1