HAS_PLH (FDD CPRI)

• Joseph Felipe
• 11-06-2019

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Overview
Acronyms

• HAS – Hardware Abstraction Layer

- Superset of Domains that provide abstraction for Management layer from HW.
• PLH – Physical Layer Handler
- Generic name given to Domains which manages L1/L2 connectivity to Fronthaul
Network. These are *BBC(OBSAI), TDD_PLH(TDD CPRI), FDD_PLH(FDD CPRI)
• FDD – Frequency Division Duplexing
- Technology used to divide signals over air. Doesn’t really matter heavily on L1/L2
connectivity. But FDD RM has certain HW characteristic different from TDD RMs.
• CPRI – Common Public Radio Interface

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Overview
CPRI

The Common Public Radio Interface (CPRI) is an

industry cooperation aimed at defining a publicly
available specification for the key internal
interface of radio base stations between the Radio
Equipment Control (REC) and the Radio Equipment
(RE).

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Overview
CPRI

The specification has the following scope (with reference to Figure 1):
1. A digitized and serial internal radio base station interface that establishes a connection between ‘Radio Equipment Control’ (REC) and
‘Radio Equipment’ (RE) enabling single-hop and multi-hop topologies is specified.1
2. Three different information flows (User Plane data, Control and Management Plane data, and Synchronization Plane data) are
multiplexed over the interface.
3. The specification covers layers 1 and 2.
3a. The physical layer (layer 1) supports both an electrical interface (e.g., what is used in traditional radio base stations), and an optical
interface (e.g. for radio base stations with remote radio equipment).
3b. Layer 2 supports flexibility and scalability.

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CPRI Interface Specification
Protocol Overview

CPRI defines the layer 1 and layer 2 protocols for the transfer of user plane, C&M as well as
synchronization information between REC and RE as well as between two REs. The interface
supports the following types of information flows:
- IQ Data: User plane information in the form of in-phase and quadrature modulation
data (digital baseband signals).
- Synchronization: Synchronization data used for frame and time alignment.
- L1 Inband Protocol: Signalling information that is related to the link and is directly
transported by the physical layer. This information is required, e.g. for system start-
up, layer 1 link maintenance and the transfer of time critical information that has a
direct time relationship to layer 1 user data.
- C&M data: Control and management information exchanged between the control
and management entities within the REC and the RE. This information flow is given to
the higher protocol layers.
- Protocol Extensions: This information flow is reserved for future protocol
extensions. It may be used to support, e.g., more complex interconnection
topologies or other radio standards.
- Vendor Specific Information: This information flow is reserved for vendor specific
information.
*The CPRI protocol may be reused for any internal radio base station interfaces.

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L1/L2

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CPRI Interface Specification
Layer 1

Line coding 8b/10b - As the scheme name suggests, eight bits of

data are transmitted as a 10-bit entity called a symbol, or character.

Line rate/link rate/line bit rate/link speed – Refers to the

volume of data a link can transfer.

Optical Transmition – OBSAI and CPRI mandate the use of SFP

(Small Form-factor Pluggable) and SFP+ transceivers for line rates up to
3072 Mbps and above 3072 Mbps respectively.

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CPRI Interface Specification
Supported link rates (Rel4)

• CPRI line bit rate option 1: 614.4 Mbit/s, 8B/10B line coding (1 x 491.52 x 10/8 Mbit/s)
• CPRI line bit rate option 2: 1228.8 Mbit/s, 8B/10B line coding (2 x 491.52 x 10/8 Mbit/s)
• CPRI line bit rate option 3: 2457.6 Mbit/s, 8B/10B line coding (4 x 491.52 x 10/8 Mbit/s)
• CPRI line bit rate option 4: 3072.0 Mbit/s, 8B/10B line coding (5 x 491.52 x 10/8 Mbit/s)
• CPRI line bit rate option 5: 4915.2 Mbit/s, 8B/10B line coding (8 x 491.52 x 10/8 Mbit/s)
• CPRI line bit rate option 6: 6144.0 Mbit/s, 8B/10B line coding (10 x 491.52 x 10/8 Mbit/s)
• CPRI line bit rate option 7: 9830.4 Mbit/s, 8B/10B line coding (16 x 491.52 x 10/8 Mbit/s)
• CPRI line bit rate option 7A: 8110.08 Mbit/s, 64B/66B line coding (16 x 491.52 x 66/64 Mbit/s)
• CPRI line bit rate option 8: 10137.6 Mbit/s, 64B/66B line coding (20 x 491.52 x 66/64 Mbit/s)
• CPRI line bit rate option 9: 12165.12 Mbit/s, 64B/66B line coding (24 x 491.52 x 66/64 Mbit/s)
• CPRI line bit rate option 10: 24330.24 Mbit/s, 64B/66B line coding (48 x 491.52 x 66/64 Mbit/s)

491.52 Mbit/s value derived from total payload (in bits) a 1x CPRI frame can hold per second.

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CPRI Interface Specification
Layer 1 to Layer 2

Time division multiplex - is a method of transmitting and receiving independent

signals over a common signal path by means of synchronized switches at each
end of the transmission line so that each signal appears on the line only a
fraction of time in an alternating pattern

Done via CPRI frames. A message frame of 10ms in length with index of BFN
(eNodeB Frame Number).

BFN, more commonly known as SFN (System Frame Number) in NOKIA specs, is
the major part of the SYNC clock called N1. length of it is 10ms.

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CPRI Interface Specification
CPRI frame

And depending on line rate, byte (Y) and bit(B) increases.

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CPRI Interface Specification
CPRI frame

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CPRI Interface Specification
Layer 2
Basic frame consist of 2
generic part. IQ data block
and Control word
Layer 2
IQ data block would hold,
U-Plane info
Layer 1
Control world would hold
Ethernet, VSB, L1 Inband
Protocol info
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CPRI Interface Specification
IQ data block
IQ data block is the preceding words (w>0) in each basic frame.
An AxC Container is a sub-part of the IQ data block of a basic frame.
The following mapping rules apply for both, uplink and downlink:
• Each AxC Container is sent as a block.
• Overlap of AxC Containers is not allowed.
• The position of each AxC Container in the IQ data block is decided by one
of the following options:
• Option 1 (packed position): Each AxC Container in a basic frame is
sent consecutively (without any reserved bits in between) and in
ascending order of AxC number.
• Option 2 (flexible position): For each AxC Container, the application
shall decide at what address (W, B – for W>0) in the IQ data block
the first bit of the AxC Container is positioned. The first bit of an
AxC Container shall be positioned on an even bit position in the IQ
data block (B shall be even).
• The bits not used by AxC Containers in the IQ data block in the basic
frame shall be treated as reserved bits (“r”).

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CPRI Interface Specification
Control Word

Control word is the first word (w=0) on each basic

frame.

The 256 control words of a hyperframe are organized

into 64 subchannels (Ns) of 4 control words each (Xs).
One subchannel contains 4 control words per
hyperframe.

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CPRI Interface Specification
Subchannels Purposes

See Cpri public specs, 4.2.7

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CPRI Interface Specification
Some topics not discuss which are not discussed yet.

CPRI link startup

Timing and
Synchronization for
links

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CPRI Interface Specification
References

SM-RM CPRI L1L2 Interface Specification

http://www.cpri.info/spec.html - Download Interface

Specification V 7.0

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HAS_PLH (FDD_CPRI)
Domain responsibility

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HAS_PLH
Domain Responsibility

• https://confluence.int.net.nokia.com/pages
/viewpage.action?pageId=807512948

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CPRI Interface Specification
Start-up Procedure

The term “link” is used to indicate the bidirectional interface in between two
directly connected ports, either between REC and RE, or between two nodes,
using one transmission line per direction. A working link consists of a master
port, a bidirectional cable, and a slave port.

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