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VEML6075: Vishay Semiconductors

The VEML6075 is a UV light sensor with integrated UV photodiode and signal conditioning circuitry. It senses both UVA and UVB light intensities using a single chip and provides the measurements digitally over an I2C interface. The sensor operates from 1.7V to 3.6V, consumes low power, and provides 16-bit measurements of UVA and UVB light levels with excellent temperature compensation from -40°C to +85°C.

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0% found this document useful (0 votes)
102 views11 pages

VEML6075: Vishay Semiconductors

The VEML6075 is a UV light sensor with integrated UV photodiode and signal conditioning circuitry. It senses both UVA and UVB light intensities using a single chip and provides the measurements digitally over an I2C interface. The sensor operates from 1.7V to 3.6V, consumes low power, and provides 16-bit measurements of UVA and UVB light levels with excellent temperature compensation from -40°C to +85°C.

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yaumil akbar
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VEML6075

www.vishay.com
Vishay Semiconductors
UVA and UVB Light Sensor with I2C Interface
FEATURES
• Package type: surface mount
• Dimensions (L x W x H in mm): 2.0 x 1.25 x 1.0
• Integrated modules: ultraviolet sensor (UV), and
signal conditioning IC
• Converts solar UV light intensity to digital data
• Excellent UVA and UVB sensitivity
• Reliable performance of UV radiation
measurement under long time solar UV
exposure
• 16-bit resolution per channel
DESCRIPTION • UVA and UVB individual channel solution

The VEML6075 senses UVA and UVB light and incorporates • Low power consumption I2C protocol (SMBus compatible)
photodiode, amplifiers, and analog / digital circuits into a interface
single chip using a CMOS process. When the UV sensor is • Package: OPLGA
applied, it is able to detect UVA and UVB intensity to provide • Temperature compensation: -40 °C to +85 °C
a measure of the signal strength as well as allowing for UVI
• Output type: I2C bus
measurement.
• Operation voltage: 1.7 V to 3.6 V
The VEML6075 provides excellent temperature compensation
capability for keeping the output stable under changing • Material categorization: for definitions of compliance
temperature. VEML6075’s functionality is easily operated via please see www.vishay.com/doc?99912
the simple command format of I2C (SMBus compatible)
interface protocol. VEML6075’s operating voltage ranges APPLICATIONS
from 1.7 V to 3.6 V. VEML6075 is packaged in a lead (Pb)-free • Handheld device
4 pin OPLGA package which offers the best market-proven • Notebook
reliability.
• Consumer device
• Industrial and medical application

PRODUCT SUMMARY
OPERATING I2C BUS PEAK SENSITIVITY RANGE OF SPECTRAL
PART NUMBER VOLTAGE RANGE VOLTAGE RANGE UVA, UVB BANDWIDTH UVB λ0.5 OUTPUT CODE
(V) (V) (nm) (nm)
VEML6075 1.7 to 3.6 1.7 to 3.6 365, 330 ± 10 16 bit, I2C
Note
(1) Adjustable through I2C interface

ORDERING INFORMATION
ORDERING CODE PACKAGING VOLUME (1) REMARKS
VEML6075 Tape and reel MOQ: 2500 pcs 2.0 mm x 1.25 mm x 1.0 mm
Note
(1)
MOQ: minimum order quantity

Rev. 1.0, 18-Dec-15 1 Document Number: 84304


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
This datasheet has been downloaded from http://www.digchip.com at this page
VEML6075
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Vishay Semiconductors

ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)


PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT
Supply voltage VDD 0 3.6 V
Operation temperature range Tamb -40 +85 °C
Storage temperature range Tstg -40 +85 °C

RECOMMENDED OPERATING CONDITIONS (Tamb = 25 °C, unless otherwise specified)


PARAMETER TEST CONDITION SYMBOL MIN. MAX. UNIT
Supply voltage VDD 1.7 3.6 V
Operation temperature range Tamb -40 +85 °C
I2C bus operating frequency f(I2CCLK) 10 400 kHz

PIN DESCRIPTIONS
PIN ASSIGNMENT SYMBOL TYPE FUNCTION
1 GND I Ground
2 SDAT I / O (open drain) I2C data bus data input / output
3 SCLK I I2C digital bus clock input
4 VDD I Power supply input

BLOCK DIAGRAM
VEML6075

GND VDD
UV-PD
VEML6075 pin-out assignment
State machine
I2C interface

1 GND
VDD
2 SDAT

Timing 3 SCLK
controller
SDA SCL 4 VDD

Oscillator

BASIC CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)


PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. UNIT
Supply operation voltage VDD 1.7 - 3.6 V
Supply current VDD = 1.8 V IDD - 480 - μA
Logic high VIH 1.5 - -
I2C signal input VDD = 3.3 V V
Logic low VIL - - 0.8
Logic high VIH 1.4 - -
I2C signal input VDD = 2.6 V V
Logic low VIL - - 0.6
Operating temperature Tamb -40 - +85 °C
Light condition = dark;
Shutdown current IDD (SD) - 800 - nA
VDD = 1.8 V, Tamb = 25 °C
UVA sensitivity IT = 50 ms (1) - 0.93 - counts/μW/cm2
UVB sensitivity IT = 50 ms (2) - 2.1 - counts/μW/cm2
Notes
(1) Nichia NCSU033X (365 nm)
(2) UVTOP310TO39HS (315 nm)

Rev. 1.0, 18-Dec-15 2 Document Number: 84304


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VEML6075
www.vishay.com
Vishay Semiconductors

I2C TIMING CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)


STANDARD MODE FAST MODE
PARAMETER SYMBOL UNIT
MIN. MAX. MIN. MAX.
Clock frequency f(SMBCLK) 10 100 10 400 kHz
Bus free time between start and stop condition t(BUF) 4.7 - 1.3 - μs
Hold time after (repeated) start condition;
t(HDSTA) 4.0 - 0.6 - μs
after this period, the first clock is generated
Repeated start condition setup time t(SUSTA) 4.7 - 0.6 - μs
Stop condition setup time t(SUSTO) 4.0 - 0.6 - μs
Data hold time t(HDDAT) - 3450 - 900 ns
Data setup time t(SUDAT) 250 - 100 - ns
I2C clock (SCK) low period t(LOW) 4.7 - 1.3 - μs
I2C clock (SCK) high period t(HIGH) 4.0 - 0.6 - μs
Clock / data fall time t(F) - 300 - 300 ns
Clock / data rise time t(R) - 1000 - 300 ns

t(LOW) t(R) t(F)

2 VIH
I C bus
clock
(SCLK) VIL

t(HDSTA) t(HIGH) t(SUSTA)


t(SUSTO)
t(BUF)
t(HDDAT) t(SUDAT)

I2C bus VIH


data
(SDAT) VIL
{

{
{
{

P S S P
Stop Condition Start Condition

Start Stop

t(LOSEXT)
SCL ACK SDAACK

t(LOWMEXT) t(LOWMEXT) t(LOWMEXT)


2
I C bus
clock
(SCLK)

I2C bus
data
(SDAT)

Fig. 1 - I2C Bus Timing Diagram

Rev. 1.0, 18-Dec-15 3 Document Number: 84304


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VEML6075
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PARAMETER TIMING INFORMATION

I2C bus
clock
(SCLK)

I2C bus
data SA7 SA6 SA5 SA4 SA3 SA2 SA1
W SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
(SDAT)

Start by ACK by ACK by


master VEML6075 VEML6075
I2C bus slave address byte Command code

I2C bus
clock
(SCLK)

I2C bus
SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
data
(SDAT)

ACK by ACK by Stop by


VEML6075 VEML6075 master
Data byte low Data byte high

Fig. 2 - I2C Bus Timing for Sending Word Command Format

I2C bus
clock
(SCLK)

I2C bus
data SA7 SA6 SA5 SA4 SA3 SA2 SA1
W SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
(SDAT)

Start by ACK by ACK by


master VEML6075 VEML6075
I2C bus slave address byte Command code

I2C bus
clock
(SCLK)

I2C bus
data SA7 SA6 SA5 SA4 SA3 SA2 SA1 R SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
(SDAT)
Start by ACK by ACK by
master VEML6075 master
I2C bus slave address byte Data byte low

I2C bus
clock
(SCLK)

I2C bus
data SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0

(SDAT)

ACK by Stop by
master master
Data byte high

Fig. 3 - I2C Timing for Receive Word Command Format

Rev. 1.0, 18-Dec-15 4 Document Number: 84304


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VEML6075
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TYPICAL PERFORMANCE CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Axis Title Axis Title
100 10000 100 10000
90 UVB 90 Cosine

80 80
Normalized Output (%)

Normalized Output (%)


70 70
1000 1000
60 60 UV-V

2nd line
2nd line
1st line

1st line
2nd line

2nd line
50 50 UV-H
40 UVA 40
100 100
30 30
20 UVcomp2 20
UVcomp1
10 10
0 10 0 10
300 350 400 450 500 550 600 -90 -60 -30 0 30 60 90
λ - Wavelength (nm) Angle (deg)
2nd line 2nd line

Fig. 4 - Normalized Spectral Response Fig. 5 - Normalized Output vs. View Angle

APPLICATION INFORMATION
Pin Connection with the Host
The configuration and data registers of the VEML6075 are accessed via the I2C interface. The hardware schematic is shown
below in fig. 6.
The 0.1 μF capacitor near the VDD pin is used for power supply noise rejection. The 2.2 kΩ is suitable for the pull high resistor
of I2C.

1.7 V to 3.6 V

R1 R2

GND (1)
1.7 V to 3.6 V Host
VDD (4)
C1 Micro Controller
100 nF VEML6075

SDA (2) I2C bus data SDA

SCL (3) I2C bus clock SCL

Fig. 6 - Hardware Pin Connection Diagram

Rev. 1.0, 18-Dec-15 5 Document Number: 84304


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VEML6075
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Digital Interface
The VEML6075 contains a CONF register (00h) used for operation control and parameter setup. Measurement results are stored
in four separate registers, one each for UVA, UVD, UVB, UVcomp1, and UVcomp2 (07h to 0Bh respectively). All registers are
accessible via I2C communication. Fig. 7 shows the basic I2C communication with the VEML6075. Each of the registers in the
VEML6075 are 16 bit wide, so 16 bit should be written when a write command is sent, and 16 bit should be read when a read
command is sent.
The built in I2C interface is compatible with I2C modes “standard” and “fast”: 100 kHz to 400 kHz
Send Word ɦġWrite Command to VEML6075
1 7 1 1 8 1 8 1 8 1 1

S Slave address Wr A Command code A Data byte low A Data byte high A P

Receive Word ɦġRead Data from VEML6075


1 7 1 1 8 1 1 7 1 1 8 1 8 1 1

S Slave address Wr A Command code A S Slave address Rd A Data byte low A Data byte high A P

S = start condition
P = stop condition
A = acknowledge
Shaded area = VEML6075 acknowledge
Fig. 7 - Command Protocol Format
Note
• Please note the repeat start condition when data is read from the sensor. A stop condition should not be sent here.

Slave Address and Function Description


VEML6075 uses 0x10 slave address for 7-bit I2C addressing protocol. VEML6075 has 16-bit resolution for each channel (UVA,
UVB, UVcomp1, UVcomp2, and UVD).

TABLE 1 - VEML6070 SLAVE ADDRESS AND FUNCTION DESCRIPTION


COMMAND DATE BYTE
REGISTER NAME R/W DEFAULT VALUE FUNCTION DESCRIPTION
CODE LOW / HIGH
L UV_CONF R/W 0x00 UV integration time, function enable and disable
00h
H Reserved R/W 0x00 Reserved
L Reserved R/W 0x00 Reserved
01h
H Reserved R/W 0x00 Reserved
L Reserved R/W 0x00 Reserved
02h
H Reserved R/W 0x00 Reserved
L Reserved R/W 0x00 Reserved
03h
H Reserved R/W 0x00 Reserved
L Reserved R/W 0x00 Reserved
04h
H Reserved R/W 0x00 Reserved
L Reserved R/W 0x00 Reserved
05h
H Reserved R/W 0x00 Reserved
L Reserved R/W 0x00 Reserved
06h
H Reserved R/W 0x00 Reserved
L UVA_Data R 0x00 UVA LSB output data
07h
H UVA_Data R 0x00 UVA MSB output data
L Dummy R 0x00 UVD
08h
H Dummy R 0x00 UVD
L UVB_Data R 0x00 UVB LSB output data
09h
H UVB_Data R 0x00 UVB MSB output data
L UVCOMP1_Data R 0x00 UVcomp1 LSB output data
0Ah
H UVCOMP1_Data R 0x00 UVcomp1 MSB output data
L UVCOMP2_Data R 0x00 UVcomp2 LSB output data
0Bh
H UVCOMP2_Data R 0x00 UVcomp2 MSB output data
L ID R 0x26 Device ID LSB
0Ch
H ID R 0x00 Device ID MSB

Rev. 1.0, 18-Dec-15 6 Document Number: 84304


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VEML6075
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Vishay Semiconductors
Command Register Format
The VEML6075 has 16-bit registers used to set up the measurements as well as pick up the measurement results. The
description of each command format is shown in the following tables.

TABLE 2 - REGISTER UV_CONF DESCRIPTION


REGISTER NAME COMMAND CODE: 0x00_L (0x00 DATA BYTE LOW) OR 0x00_H (0x00 DATA BYTE HIGH)
COMMAND BIT 7 6 5 4 3 2 1 0
REGISTER: UV_CONF COMMAND CODE: 0x00_L (0x00 DATA BYTE LOW)
COMMAND BIT Description
Reserved 7 0
(0 : 0 : 0) = 50 ms, (0 : 0 : 1) = 100 ms, (0 : 1 : 0) = 200 ms, (0 : 1 : 1) = 400 ms, (1 : 0 : 0) = 800 ms,
UV_IT 6:4
(1 : 0 : 1) = reserved, (1 : 1 : 0) = reserved, (1 : 1 : 1) = reserved.
HD 3 0 = normal dynamic setting, 1 = high dynamic setting
0 = no active force mode trigger, 1 = trigger one measurement
UV_TRIG 1 With UV_AF = 1 the VEML6075 conducts one measurement every time the host writes UV_Trig = 1. This bit
returns to “0” automatically.
UV_AF 0 0 = active force mode disable (normal mode), 1 = active force mode enable
SD 0 0 = power on, 1 = shut down

TABLE 3 - REGISTER 00_H DESCRIPTION


REGISTER: reserved COMMAND CODE: 0x00_H (0x00 DATA BYTE HIGH)
COMMAND BIT Description
Reserved 7:0 Default = (0 : 0 : 0 : 0 : 0 : 0 : 0 : 0)

TABLE 4 - REGISTER 01_L TO 06_L AND 01_H TO 06_L DESCRIPTION


COMMAND CODE: 0x01_L TO 0x06_L (0x01 TO 0x06 DATA BYTE LOW)
REGISTER: reserved
COMMAND CODE: 0x01_H TO 0x06_H (0x01 TO 0x06 DATA BYTE HIGH)
REGISTER BIT Description
Reserved 7:0 Default = (0 : 0 : 0 : 0 : 0 : 0 : 0 : 0)
Reserved 7:0 Default = (0 : 0 : 0 : 0 : 0 : 0 : 0 : 0)

TABLE 5 - READ OUT COMMAND CODES DESCRIPTION


REGISTER COMMAND CODE BIT DESCRIPTION
0x07_L (0x07 data byte low) 07:00 0x00 to 0xFF, UVA LSB output data
UVA_DATA
0x07_H (0x07 data byte high) 07:00 0x00 to 0xFF, UVA MSB output data
0x08_L (0x08 data byte low) 07:00 0x00 to 0xFF, UVD
DUMMY
0x08_H (0x08 data byte high) 07:00 0x00 to 0xFF, UVD
0x09_L (0x09 data byte low) 07:00 0x00 to 0xFF, UVB LSB output data
UVB_DATA
0x09_H (0x09 data byte high) 07:00 0x00 to 0xFF, UVB MSB output data
0x0A_L (0x0A data byte low) 07:00 0x00 to 0xFF, UVcomp1 LSB output data
UVCOMP1_DATA
0x0A_H (0x0A data byte high) 07:00 0x00 to 0xFF, UVcomp1 MSB output data
0x0B_L (0x0B data byte low) 07:00 0x00 to 0xFF, UVcomp2 LSB output data
UVCOMP2_DATA
0x0B_H (0x0B data byte high) 07:00 0x00 to 0xFF, UVcomp2 MSB output data
0x0C_L (0x0C data byte low) 07:00 Default = 0x26, device ID LSB byte
07:06 Company code = 00,
ID 05:04 (0 : 0) Slave address = 0x20
0x0C_H (0x0C data byte high)
03:00 Version code (0 : 0 : 0 : 0) = VEML6075 CS
Device ID MSB byte

Rev. 1.0, 18-Dec-15 7 Document Number: 84304


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VEML6075
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Data Access
VEML6075 has 16-bit high resolution sensitivity for each UV channel. One byte is the LSB and the other byte is the MSB. The
host needs to follow the read word protocol as shown in fig. 7. The data format shows as below.

TABLE 6 - 16-BIT DATA FORMAT


VEML6075 16-BIT DATA FORMAT
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Data byte low
Data byte high

Note
Receive byte Read data from VEML6075

S Slave address Wr A Command code A S Slave address Rd A Data byte (LSB) A Data byte (MSB) N P

S = start condition
Host action
P = stop condition
A = acknowledge
VEML6075 response
N = no acknowledge
• Data byte low represents LSB and data byte high represents MSB.

Data Auto-Memorization
VEML6075 keeps the last results read. These values will remain in the registers, and can be read from these registers, until the
device wakes up and a new measurement is made.

UV-Index Calculation
In order to use the result data to calculate the UV-Index, please refer to the “Designing the VEML6075 into an Application”
application note (www.vishay.com/doc?84339).

PACKAGE INFORMATION in millimeters


TOP VIEW
2.00 ± 0.15 0.45 ± 0.05 1.10

0.35 ± 0.05

0 to 0.06
1 4 4 1
1.25 ± 0.15

0 to 0.05
0.70
0.25

X X’ X’ X’
0 to 0.02
0.625 ± 0.15

0 to 0.04

2 3 3 2

0.1
1.00 ± 0.15
0.55 ± 0.05 1.0

SIDE VIEW DIE PAD AND CIRCUIT LAYOUT REFERENCE


Package edge to edge
2 ± 0.15
30 μm ± 10 μm

0.45

0.1
1 ± 0.10

0.35

1 4
0.56

0.7

0.1
2 3
3

0.5 0.6 0.4

Fig. 8 - VEML6075 A3OP Package Dimensions

Rev. 1.0, 18-Dec-15 8 Document Number: 84304


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VEML6075
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RECOMMENDED STORAGE AND REBAKING CONDITIONS


PARAMETER CONDITIONS MIN. MAX. UNIT
Storage temperature 5 50 °C
Relative humidity - 60 %
Open time - 168 h
Total time From the date code on the aluminized envelope (unopened) - 12 months
Tape and reel: 60 °C - 22 h
Rebaking
Tube: 60 °C - 22 h

RECOMMENDED INFRARED REFLOW


Soldering conditions which are based on J-STD-020 C.

IR REFLOW PROFILE CONDITION


PARAMETER CONDITIONS TEMPERATURE TIME
Peak temperature 255 °C + 0 °C / - 5 °C (max.: 260 °C) 10 s
Preheat temperature range and timing 150 °C to 200 °C 60 s to 180 s
Timing within 5 °C to peak temperature - 10 s to 30 s
Timing maintained above temperature / time 217 °C 60 s to 150 s
Timing from 25 °C to peak temperature - 8 min (max.)
Ramp-up rate 3 °C/s (max.) -
Ramp-down rate 6 °C/s (max.) -

Recommend Normal Solder Reflow is 235 °C to 255 °C

Max. Temperature
Temperature (°C)

(260 °C + 5 °C / - 5 °C)/10 s
255

Ramp-Up Rate Ramp-Down Rate


217 3 °C/s (max.) 6 °C/s (max.)

200 Soldering Zone


60 s to 150 s
Ramp-Up Rate
3 °C/s (max.)
150

Pre-Heating Time
t2 - t1 = 60 s to 180 s

t1 t2 Time (s)
Fig. 9 - VEML6075 OPLGA Solder Reflow Profile Chart

RECOMMENDED IRON TIP SOLDERING CONDITION AND WARNING HANDLING


1. Solder the device with the following conditions:
1.1. Soldering temperature: 400 °C (max.)
1.2. Soldering time: 3 s (max.)
2. If the temperature of the method portion rises in addition to the residual stress between the leads, the possibility that an
open or short circuit occurs due to the deformation or destruction of the resin increases.
3. The following methods: VPS and wave soldering, have not been suggested for the component assembly.
4. Cleaning method conditions:
4.1. Solvent: methyl alcohol, ethyl alcohol, isopropyl alcohol
4.2. Solvent temperature < 45 °C (max.)
4.3. Time: 3 min (min.)
Rev. 1.0, 18-Dec-15 9 Document Number: 84304
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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TAPE PACKAGING INFORMATION in millimeters

DIMENSION OF CARRIER TAPE PIN 1

0.28 ± 0.02
SIDE VIEW

1.75 ± 0.10
TOP VIEW 2.0 ± 0.05
4.0 ± 0.1 4.0 ± 0.1
Ø 1.5 ± 0.1
+ 0.30
- 0.10
12.00

5.50 ± 0.05
Ø 1.0 ± 0.05
1.25 ± 0.10

R9 max. R9 max.
2.03 ± 0.10 2.58 ± 0.10

Fig. 10 - VEML6070 A3OP Package Carrier Tape Fig. 11 - Taping Direction

Fig. 12 - Reel Dimension

Rev. 1.0, 18-Dec-15 10 Document Number: 84304


For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
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Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please
contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.

Material Category Policy


Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.

Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.

Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.

Revision: 02-Oct-12 1 Document Number: 91000

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