USB1T11A Universal Serial Bus Transceiver

November 1999
Revised March 2005

USB1T11A
Universal Serial Bus Transceiver
General Description Features
The USB1T11A is a one chip generic USB transceiver. It is ■ Complies with Universal Serial Bus specification 1.1
designed to allow 5.0V or 3.3V programmable and stan- ■ Utilizes digital inputs and outputs to transmit and receive
dard logic to interface with the physical layer of the Univer- USB cable data
sal Serial Bus. It is capable of transmitting and receiving
■ Supports 12Mbit/s “Full Speed” and 1.5Mbit/s
serial data at both full speed (12Mbit/s) and low speed
“Low Speed” serial data transmission
(1.5Mbit/s) data rates.
■ Compatible with the VHDL “Serial Interface Engine”
The input and output signals of the USB1T11A conform
from USB Implementers' Forum
with the “Serial Interface Engine”. Implementation of the
Serial Interface Engine along with the USB1T11A allows ■ Supports single-ended data interface
the designer to make USB compatible devices with off-the- ■ Single 3.3V supply
shelf logic and easily modify and update the application. ■ ESD Performance: Human Body Model
! 9.5 kV on D, D pins only
! 4 kV on all other pins
■ 16-lead Pb-Free MLP package saves space

Ordering Code:
Package
Order Number Package Description
Number
USB1T11AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
(Note 1)
USB1T11AM_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
(Note 2)
USB1T11ABQX MLP16C Pb-Free 16-Terminal Molded Leadless Package (MLP), JEDEC MO-220, 3mm square
USB1T11AMTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
(Note 1)
USB1T11AMTC_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 2) Wide
USB1T11AMTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 2) Wide
Pb-Free package per JEDEC J-STD-020B.
Note 1: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Note 2: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Please use order number as indicated.

The USB-IF Logos are trademarks of Universal Serial Bus Implementers Forum, Inc.

© 2005 Fairchild Semiconductor Corporation DS500234 www.fairchildsemi.com

USB1T11A
Connection Diagrams Logic Diagram
Pin Assignments for SOIC and TSSOP

Pin Assignments for MLP

Pin Descriptions
Pin Name I/O Description
RCV O Receive data. CMOS level output for USB differential input
OE I Output Enable. Active LOW, enables the transceiver to transmit data on the bus. When not
active the transceiver is in receive mode.
MODE I Mode. When left unconnected, a weak pull-up transistor pulls it to VCC and in this GND, the
VMO/FSEO pin takes the function of FSEO (Force SEO).
VPO, VMO/FSEO I Inputs to differential driver. (Outputs from SIE).
MODE VPO VMO/FSEO RESULT
0 0 0 Logic “0”
0 1 SE0
1 0 Logic “1”
1 1 SEO
1 0 0 SE0
0 1 Logic “0”
1 0 Logic “1”
1 1 Illegal code
VP, VM O Gated version of D and D. Outputs are logic “0” and logic “1”. Used to detect single ended
zero (SE0), error conditions, and interconnect speed. (Input to SIE).
VP VM RESULT
0 0 SE0
0 1 Low Speed
1 0 Full Speed
1 1 Error
D, D AI/O Data, Data. Differential data bus conforming to the Universal Serial Bus standard.
SUSPND I Suspend. Enables a low power state while the USB bus is inactive. While the suspend pin is
active it will drive the RCV pin to a logic “0” state. Both D and D are 3-STATE.
SPEED I Edge rate control. Logic “1” operates at edge rates for “full speed”.
Logic “0” operates edge rates for “low speed”.
VCC 3.0V to 3.6V power supply
GND Ground reference

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 USB1T11A
Functional Truth Table
Input I/O Outputs
Mode VPO VMO/FSEO OE SUSPND D D RCV VP VM Result
0 0 0 0 0 0 1 0 0 1 Logic 0
0 0 1 0 0 0 0 U 0 0 SEO
0 1 0 0 0 1 0 1 1 0 Logic 1
0 1 1 0 0 0 0 U 0 0 SEO
1 0 0 0 0 0 0 U 0 0 SEO
1 0 1 0 0 0 1 0 0 1 Logic 0
1 1 0 0 0 1 0 1 1 0 Logic 1
1 1 1 0 0 1 1 U U U Illegal Code
X X X 1 0 Z Z U U U D/D Hi-Z
X X X 1 1 Z Z U U U D/D Hi-Z
X Don’t Care
Z 3-STATE
U Undefined State

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USB1T11A
Absolute Maximum Ratings(Note 3) Recommended Operating
DC Supply Voltage (VCC) 0.5V to 7.0V Conditions
DC Input Diode Current (IIK) Supply Voltage VCC 3.0V to 3.6V
VI  0 50 mA Input Voltage (VI) 0V to 5.5V
Input Voltage (VI) Input Range for AI/O (VAI/O) 0V to VCC
(Note 4) 0.5V to 5.5V Output Voltage (VO) 0V to VCC
Input Voltage (VI/O) 0.5V to VCC  0.5V Operating Ambient Temperature
Output Diode Current (IOK) in free air (Tamb) 40qC to 85qC
VO ! VCC or VO  0 r50 mA
Output Voltage (VO)
(Note 4) 0.5V to VCC  0.5V
Output Source or Sink Current (IO)
VP.VM, RCV pins
VO 0 to VCC r15 mA
Output Source or Sink Current (IO) Note 3: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
D/D pins
operated at these limits. The parametric values defined in the Electrical
VO 0 to VCC r50 mA Characteristic tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
VCC or GND Current (ICC, IGND) r100 mA for actual device operation.
Storage Temperature (TSTO) 60qC to  150qC Note 4: The input and output voltage ratings may be exceeded if the input
and output clamp current ratings are observed.

DC Electrical Characteristics (Digital Pins)

Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC 3.0V to 3.6V
Limits
Symbol Parameter Test Conditions Temp 40qC to 85qC Unit
Min Typ Max
INPUT LEVELS:
VIL LOW Level Input Voltage 0.8 V
VIH HIGH Level Input Voltage 2.0 V
OUTPUT LEVELS:
VOL LOW Level Output Voltage IOL 4 mA 0.4
V
IOL 20 PA 0.1
VOH HIGH Level Output Voltage IOH 4 mA 2.4
V
IOH 20 PA VCC – 0.1
LEAKAGE CURRENT:
IL Input Leakage Current VCC 3.0 to 3.6 r5 PA
ICCFS Supply Current (Full Speed) VCC 3.0 to 3.6 5 mA
ICCLS Supply Current (Low Speed) VCC 3.0 to 3.6 5 mA
ICCQ Quiescent Current VCC 3.0 to 3.6
5 mA
VIN VCC or GND
ICCS Supply Current in Suspend VCC 3.0 to 3.6; Mode VCC 10 PA

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 USB1T11A
DC Electrical Characteristics (D/D Pins)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC 3.0V to 3.6V
Limits
Symbol Parameter Test Conditions Temp 40qC to 85qC Units
Min Typ Max
INPUT LEVELS:
VDI Differential Input Sensitivity |(D) – (D)| 0.2 V
VCM Differential Common Mode Range Includes VDI Range 0.8 2.5 V
VSE Single Ended Receiver Threshold 0.8 2.0 V
OUTPUT LEVELS:
VOL Static Output LOW Voltage RL of 1.5 k: to 3.6V 0.3 V
VOH Static Output HIGH Voltage RL of 15 k: to GND 2.8 3.6 V
VCR Differential Crossover 1.3 2.0 V
LEAKAGE CURRENT:
IOZ High Z State Data Line Leakage Current 0V  VIN  3.3V r5 PA
CAPACITANCE:
CIN(Note 6) Transceiver Capacitance Pin to GND 10 pF
Capacitance Match 10 %
OUTPUT RESISTANCE:
ZDRV (Note 5) Driver Output Resistance Steady State Drive 4 20 :
Resistance Match 10 %
Note 5: Excludes external resistor. In order to comply with USB Specification 1.1, external series resistors of 24: r 1% each on D and D are recom-
mended. This specification is guaranteed by design and statistical process distribution.
Note 6: This specification is guaranteed by design and statistical process distribution.

AC Electrical Characteristics (D/D Pins, Full Speed)

Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC 3.0V to 3.6V
CL 50 pF; RL 1.5 k: on D to VCC
Limits
Symbol Parameter Test Condition Temp 40qC to 85qC Units
Min Typ Max
DRIVER CHARACTERISTICS:
10% and 90% ns
tR Rise Time Figure 1 4 20
tF Fall Time Figure 1 4 20
tRFM Rise/Fall Time Matching (tr/tf) 90 110 %
VCRS Output Signal Crossover Voltage 1.3 2.0 V
DRIVER TIMINGS:
tPLH Driver Propagation Delay Figure 2 18 ns
tPLH (VPO, VMO/FSEO to D/D) Figure 2 18 ns
tPHZ Driver Disable Delay Figure 4 13 ns

tPLZ (OE to D/D) Figure 4 13 ns

tPZH Driver Enable Delay Figure 4 17 ns

tPZL (OE to D/D) Figure 4 17 ns

RECEIVER TIMINGS:
tPLH Receiver Propagation Delay Figure 3 16 ns
tPHL (D, D to RCV) Figure 3 19 ns
tPLH Single-ended Receiver Delay Figure 3 8 ns
tPHL (D, D to VP, VM) Figure 3 8 ns

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USB1T11A
AC Electrical Characteristics (D/D Pins, Low Speed)
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC 3.0V to 3.6V
CL 200 pF to 600 pF; RL 1.5k: on D to VCC
Limits
Symbol Parameter Test Conditions Tamb 40qC to 85qC Unit
Min Typ Max
DRIVER CHARACTERISTICS:
10% and 90%
tLR Rise Time Figure 1 75 300 ns
tLF Fall Time Figure 1 75 300
tRFM Rise/Fall Time Matching (tr/tf) 80 120 %
VCRS Output Signal Crossover Voltage 1.3 2.0 V
DRIVER TIMINGS:
tPLH Driver Propagation Delay Figure 2 300 ns
tPHL (VPO, VMO/FSEO to D/D) Figure 2 300 ns
tPHZ Driver Disable Delay Figure 4 13 ns

tPLZ (OE to D/D) Figure 4 13 ns

tPZH Driver Enable Delay Figure 4 205 ns

tPZL (OE to D/D) Figure 4 205 ns

RECEIVER TIMINGS:
tPLH Receiver Propagation Delay Figure 3 18 ns
tPHL (D, D to RCV) Figure 3 18 ns
tPLH Single-ended Receiver Delay Figure 3 28 ns
tPHL (D, D to VP, VM) Figure 3 28 ns

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 USB1T11A
AC Waveforms
VOL and VOH are the typical output voltage drops that occur with the output load. (VCC never goes below 3.0V)

FIGURE 1. Rise and Fall Times FIGURE 2. VPI, VMO/FSEO to D/D

FIGURE 3. D/D to RCV, VP/VM

FIGURE 4. OE to D/D

Test Circuits and Waveforms

Load for VM/VP and RCV

Load for Enable and Disable Times
Note:
V 0 for tPZH, tPHZ
V VCC for t PZL, tPLZ

Load for D/D

Test S1
CL 50 pF, Full Speed D/LS Close
CL 200 pF, Low Speed (Min Timing) D/LS Open
CL 600 pF, Low Speed (Max Timing) D/FS Open
1.5 k: on D (Low Speed) or D (Full Speed) only D/FS Close

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USB1T11A
Tape and Reel Specification
Tape Format for MLP
Package Tape Number Cavity Cover Tape
Designator Section Cavities Status Status
Leader (Start End) 125 (typ) Empty Sealed
BQX Carrier 2500 Filled Sealed
Trailer (Hub End) 75 (typ) Empty Sealed

TAPE DIMENSIONS inches (millimeters)

REEL DIMENSIONS inches (millimeters)

A N W1 W2
Tape Size (mm) (Typical) (mm) (Max)
(mm) (mm)
12 mm 330 178 12.4 18.4

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 USB1T11A
Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A

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USB1T11A
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Pb-Free 16-Terminal Molded Leadless Package (MLP), JEDEC MO-220, 3mm square
Package Number MLP16C

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 USB1T11A Universal Serial Bus Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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