 Objective:

The objectives of this experiment were:

 Realization of logic functions with the help of universal gates-NAND Gate.

 Realization of logic functions with the help of universal gates-NOR Gate.
Table of Contents

1. Introduction.........................................................................................................................................3

2. Apparatus.............................................................................................................................................3

3. Procedure.............................................................................................................................................3

4. Theory.................................................................................................................................................4

2.1. NAND Gate.................................................................................................................................4

2.1.1. NAND gates as NOT gate....................................................................................................4

2.1.2. NAND gates as AND gate...................................................................................................4

2.1.3. NAND gates as OR gate......................................................................................................5

2.1.4. NAND gates as X-OR gate..................................................................................................5

2.1.5. NAND gates as X-NOR gate...............................................................................................6

2.1.6. NAND gates as NOR gate...................................................................................................6

2.2. NOR Gate....................................................................................................................................6

2.2.1. NOR gates as NOT gate.......................................................................................................7

2.2.2. NOR gates as OR gate.........................................................................................................7

2.2.3. NOR gates as AND gate......................................................................................................7

2.2.4. NOR gates as X-NOR gate..................................................................................................8

2.2.5. NOR gates as X-OR gate.....................................................................................................9

2.2.6. NOR gates as NAND gate...................................................................................................9

 Abstract
In this lab report I studied about universal logic gates. A universal gate is a gate which can
implement any Boolean function without need to use any other gate type. The NAND
and NOR gates are universal gates. In practice, this is advantageous since NAND
and NOR gates are economical and easier to fabricate and are the basic gates used
in all IC digital logic families. In fact, an AND gate is typically implemented as
a NAND gate followed by an inverter not the other way around. Likewise, an OR gate is
typically implemented as a NOR gate followed by an inverter not the other way around.
 1. Introduction

The NAND gate represents the complement of the AND operation. Its name is an abbreviation of
NOT and AND Gates. The graphic symbol for the NAND gate consists of an AND symbol with
a bubble on the output, denoting that a complement operation is performed on the output of the
AND gate. The NOR gate represents the complement of the OR operation. Its name is an
abbreviation of NOT OR. The graphic symbol for the NOR gate consists of an OR symbol with a
bubble on the output, denoting that a complement operation is performed on the output of the OR
gate.

2. Apparatus

 Logic Gate (NAND Gate)

 Logic Gate (NOR Gate)
 Resister
 LED
 Wires
 Battery
 Power Supply

3. Procedure

1. Collect all the required material to conduct the lab.

2. Cut the wires of equal length.
3. Prepare the wires by ply off the unwanted coating by using nose plier.
4. By using the diagram and the procedure, construct the logic gates.
5. While using the LED make sure that positive end is in the slot under the right end of the
resistor, which the usually the longer end is used.
6. Typically, logic gate with 14-pin is used for one input and logic gate with 16-pin is used
for two inputs. For NOR gate 14-pin logic gate was used.
7. Make sure that pin-7 is grounded.
 8. Once the circuit on the breadboard is complete the connect the breadboard socket to the
power supply.
9. Create the truth table and record the inputs and their corresponding outputs.
10. Repeat the same procedure for the remaining logic gate.

4. Theory

In this lab report I studies Universal gates and converted them to other gates. These are explained
as follows:

2.1. NAND Gate

NAND gate is actually a combination of two logic gates: AND gate followed by NOT
gate. So its output is complement of the output of an AND gate.
 
This gate can have minimum two inputs, output is always one. By using only NAND
gates, we can realize all logic functions: AND, OR, NOT, X-OR, X-NOR, NOR. So this gate is
also called universal gate.
 
2.1.1. NAND gates as NOT gate

A NOT produces complement of the input. It can have only one input, tie the inputs of a NAND
gate together. Now it will work as a NOT gate. Its output is
Y = (A.A)’
=>                                            Y = (A)’
2.1.2. NAND gates as AND gate

A NAND produces complement of AND gate. So, if the output of a NAND gate is inverted,
overall output will be that of an AND gate.
                                                Y = ((A.B)’)’
=>                                            Y = (A.B)

2.1.3. NAND gates as OR gate

From DeMorgan’s theorems: (A.B)’ = A’ + B’

=>                                            (A’.B’)’ = A’’ + B’’ = A + B
So, give the inverted inputs to a NAND gate, obtain OR operation at output.

2.1.4. NAND gates as X-OR gate

The output of a to input X-OR gate is shown by: Y = A’B + AB’. This can be achieved with the
logic diagram shown in the left side.
Gate No.          Inputs                                       Output
1                      A, B                                         (AB)’
2                      A, (AB)’                                  (A (AB)’)’
3                      (AB)’, B                                   (B (AB)’)’
4                      (A (AB)’)’, (B (AB)’)’ A’B + AB’
Now the ouput from gate no. 4 is the overall output of the configuration.
Y         =          ((A (AB)’)’ (B (AB)’)’)’
            =          (A(AB)’)’’ + (B(AB)’)’’
            =          (A(AB)’) + (B(AB)’)
            =          (A(A’ + B)’) + (B(A’ + B’))
=          (AA’ + AB’) + (BA’ + BB’)
=          ( 0 + AB’ + BA’ + 0 )
=          AB’ + BA’
=>                                            Y         =          AB’ + A’B

2.1.5. NAND gates as X-NOR gate

X-NOR gate is actually X-OR gate followed by NOT gate. So give the output of X-OR gate to a
NOT gate, overall ouput is  that of an X-NOR gate.
                                                Y = AB+ A’B’
2.1.6. NAND gates as NOR gate

A NOR gate is an OR gate followed by NOT gate. So connect the output of OR gate to a NOT
gate, overall output is that of a NOR gate.
                                                Y = (A + B)’

 
2.2.  NOR Gate

NOR gate is actually a combination of two logic gates: OR gate followed by NOT gate.
So its output is complement of the output of an OR gate.
 
This gate can have minimum two inputs, output is always one. By using only NOR gates,
we can realize all logic functions: AND, OR, NOT, X-OR, X-NOR, NAND. So this gate is also
called universal gate.

2.2.1. NOR gates as NOT gate

A NOT produces complement of the input. It can have only one input, tie the inputs of a NOR
gate together. Now it will work as a NOT gate. Its output is
Y = (A+A)’
=>                                            Y = (A)’

2.2.2. NOR gates as OR gate

A NOR produces complement of OR gate. So, if the output of a NOR gate is inverted, overall
output will be that of an OR gate.
                                                Y = ((A+B)’)’
=>                                            Y = (A+B)

                                  
2.2.3. NOR gates as AND gate

From DeMorgan’s theorems: (A+B)’ = A’B’

=>                                            (A’+B’)’ = A’’B’’ = AB
So, give the inverted inputs to a NOR gate, obtain AND operation at output.
2.2.4.    NOR gates as X-NOR gate

The output of a two input X-NOR gate is shown by: Y = AB + A’B’. This can be achieved with
the logic diagram shown in the left side.

 
Gate No.          Inputs                                                   Output
1                      A, B                                                     (A + B)’
2                      A, (A + B)’                                          (A + (A+B)’)’
3                      (A + B)’, B                                          (B + (A+B)’)’
4                      (A + (A + B)’)’, (B + (A+B)’)’            AB + A’B’

Now the ouput from gate no. 4is the overall output of the configuration.
Y         =          ((A + (A+B)’)’ (B +( A+B)’)’)’
            =          (A+(A+B)’)’’.(B+(A+B)’)’’
             =          (A+(A+B)’).(B+(A+B)’)
            =          (A+A’B’).(B+A’B’)
=          (A + A’).(A + B’).(B+A’)(B+B’)
=          1.(A+B’).(B+A’).1
=          (A+B’).(B+A’)
                                                            =          A.(B + A’) +B’.(B+A’)
                                                            =          AB + AA’ +B’B+B’A’
                                                            =          AB + 0 + 0 + B’A’
                                                            =          AB + B’A’
=>                                            Y         =          AB + A’B’

2.2.5. NOR gates as X-OR gate

X-OR gate is actually X-NOR gate followed by NOT gate. So give the output of X-NOR gate to
a NOT gate, overall ouput is that of an X-OR gate.
                                                Y = A’B+ AB’

                                               
2.2.6. NOR gates as NAND gate

A NAND gate is an AND gate followed by NOT gate. So connect the output of AND gate to a
NOT gate, overall output is that of a NAND gate.
                                                Y = (AB)’