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DLD Course Outline Spring 2021

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Syed Ali Ahsan
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0% found this document useful (0 votes)
303 views5 pages

DLD Course Outline Spring 2021

Uploaded by

Syed Ali Ahsan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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University of Central Punjab

Faculty of Information Technology

PROGRAM (S) TO BE

BS (CS)

EVALUATED

A. Course Description

1 NCEAC.FORM.001.C
and Log

Course Code CSCS 2523


Course Title Digital Logic and Design
Credit Hours 4(3+1)
Prerequisites by Course(s) and
Basic Electronics
Topics
Assessment Instruments with
Weights (homework, quizzes, Quizzes (20%), Assignments (15%), Class Participation (5%), Mid
midterms, final, programming Term (20%), Final Term (40%),
assignments, lab work, etc.)
Semester SPRING 2021
Course Instructor Asad Umar Khan, Nisar Balti, Dr. Musharraf A. Hanif, Dr. Adnan
Ghafoor, Irfan Anjum, Dr. Tahira Shuja, Abdul Munim,
Course Coordinator Dr. Farhan Dawood
Lab Instructor
Office Hours
Plagiarism Policy All the parties involved will be awarded Zero in first instance. Repeat of
the same offense will result in (F) grade.
Current Catalog Description Digital Electronics is the foundation of Computers and Microprocessor
based systems found in automobiles, Embedded systems, Industrial
Control systems, and home entertainment systems. The material
presented in this course is appropriate for Digital Logic and
Design as applied both in Computer Science and Computer
Engineering. This course has been designed in such a way that
computer science students who do not have in depth knowledge of
digital Electronics will also be able to cover the Theoretical ,
Practical and Technical Aspects which are important for Quality
education. Hands on training is given on self-designed prototypes
/Digital logic Trainers and latest SPICE (Virtual Electronics Lab).
Participants will be able to make digital circuits on self
designed modules like Adder, ALU, MUX, DEMUX, Decoder, Encoder,
RAM, ROM, and Parity Checker and also display decimal digits on
Seven segment Indicators or State Monitors.

Textbook (or Laboratory Manual  Digital Fundamentals by Floyd 11th edition,


for Laboratory Courses)  Digital Logic and Computer Design by M. Morris Mano 3 rd Edition
Reference Material
Course Goals  To introduce the basics of digital system.
 To make students understand, design, Simulate and
Implement digital systems.
 To equip students with techniques to solve complex logical
problems , design digital systems and State Machine
Topics Covered in the Course,
with Number of Lectures on Each
Attached
Topic (assume 15-week instruction
and 1.5 hour lectures)
Programming Assignments Done
in the Course
Class Time Spent on (in hours) Theory Practical/Lab
3 3

2 NCEAC.FORM.001.C
Oral and Written
Communications

Evaluation
Week Lecture Topics Covered References
Instrument
Digital and Analog quantities, Signals
1 Sampling using ADC&DAC, Binary digits, Logic Levels, Floyd
Digital waveforms
1 Introduction to Logic Gates, Truth tables for 2,3,and 4
inputs, Logic symbols, Boolean expressions,
2 Floyd
Fundamental Gates AND, OR and NOT gates.
Importance of XOR, XNOR gates.

Boolean Variables, Boolean Algebra, Basic Theorems,


3 Quiz 1 Floyd
Laws and rules of Boolean algebra, Boolean Functions,

2 Complement of a function, Demorgan’s Theorems (Two,


4 Three variables) Floyd
Logic Simplification using Boolean Algebra

Min terms and Max terms, Sum of Product terms (SOP),


Floyd and
5 Product of Sum terms (POS), Conversion Between
Morris
Canonical/ Standard Forms.
3 Boolean Minimization using Karnaugh Map up to 4
Variable for SOP and POS. Don’t Care Conditions Quiz 2
6 Floyd
Verification by using Binary Testing Techniques for
standard and Minimized form.
Introduction to Number systems, Binary, Octal, Decimal
and Hexadecimal.
Number system conversions,
7 Assignment 1 Floyd
Octal to Binary, Octal to Decimal, Octal to Hexadecimal,
Hexadecimal to Binary, Hexadecimal to Decimal,
4 Hexadecimal to Octal
1’S complement, 2’S complement ,Binary addition, Binary
subtraction, Binary multiplication, Binary Division ,Digital
8 codes (ASCII, Binary Coded Decimal), BCD addition, Floyd
Gray Code, 4 Bit Binary to Gray code convertor, Gray to
Binary code converters by using XOR gates.
NAND & NOR as Universal gates, Implementation of
9 Combinational logic circuits using NAND or NOR gates Quiz 3 Floyd
only.

5 Half –Adder combinational logic design, Full-Adder


combinational logic design and Expressions of Sum and
10 Carry in XOR, Morris
Implementation by using K-maps for Sigma and Carry
output.
6 Half subtractor, Full subtractor, 4 Bit Parallel binary
11 Morris
Adder, Controlled Inverter
Combinational logic design for Decoders Active High / Floyd
12 Active low

3 NCEAC.FORM.001.C
 2 lines to 4 lines decoder
 3 lines to 8 lines decoder
 4 lines to 16 lines decoder
 BCD to Decimal Decoder
 BCD to 7 Segment decoder with Table
implementation.
Combinational logic design for Encoders
 4 lines to 2 lines encoder
 8 lines to 3 lines encoder
 16 lines to 4 lines encoder
 Decimal to BCD encoder (Key Pad) Assignment 2
13 Floyd
 Priority Encoder (Morris Mano)
Example( Full adder implementation with decoder and
OR gate)
7
Example (Importance of Encoders and Decoders in
Digital communication systems)
Combinational logic design for Multiplexers (PISO)
 4 line to 1 line MUX or (1-Of-4 MUX)
 8 line to 1 line MUX or (1-Of-8 MUX) Quiz 4
14 Floyd
 16 line to 1 line MUX or (1-Of-16 MUX)
 10 line to 1 line MUX or (1-Of-10 MUX)
Canonical function implementation with MUX
Combinational logic design for DEMultiplexers (SIPO).
 1 line to 4 lines DEMUX
 1 line to 8 lines DEMUX
15  1 line to 16 line DEMUX Floyd
8  1 line to 10 line DEMUX
Combinational logic implementation using MUX Folding
Technique & DEMUX with active high and active low
enable inputs
16 Review
MID TERM WEEK
BCD Adder design, 2 bit, 3 bit and 4 bit Magnitude
17 Morris
Comparator design
9 Sequential circuits, Function of Latch, SR latch using
18 NAND and NOR gates, Active high and active low latch Morris
design,
Quiz 5
SR Flip-Flop, D Flip-Flop, JK Flip-Flop and T Flip Flop,
19 Project Morris
Clocking
10 Proposal
Flip- Flop Applications (Counters, Frequency divider,
20 Floyd
Registers and Memory)
Excitation tables for SR, JK, T and D Flip-Flops using Quiz 6
21 Morris
11 their characteristics tables
22 Flip Flop conversions SR to D, JK to D Morris

4 NCEAC.FORM.001.C
Sequential logic design process, State diagram and State Assignment 3
23 Floyd
tables, Steps to design sequential circuit.
12
4 Bit Up/Down Synchronous Counters design with clock
24 Floyd
diagram
4 Bit Asynchronous Counters design with clock diagram, Quiz 7
25 Up/Down and Auto reset operations using NAND gate Floyd
13 (Truncated sequence)
Design 2 bit,3 bit up-down counter with gray code Quiz 8
26 Floyd
sequence,

Registers, Serial in serial out, Serial in parallel out,


27 Assignment 4 Floyd
Parallel in serial out and parallel in Parallel out
14
Write and Read Operations in memory, Sizes of Address
28 Floyd
bus and Data bus,
Design of Binary Cell using SR Flip Flop, Design of 4X4
29 Floyd
and 8 X 8 RAM
15
30 Review

5 NCEAC.FORM.001.C

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