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UCB CS61C: Machine Structures: Motivation For Input/Output

The document discusses input/output in computer systems. It covers I/O device examples and speeds, the processor-I/O speed mismatch, polling versus interrupt-driven I/O, and how interrupt-driven data transfer works by saving the program counter and jumping to the interrupt handler when an I/O device is ready.

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Rgen Al Vill
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0% found this document useful (0 votes)
76 views5 pages

UCB CS61C: Machine Structures: Motivation For Input/Output

The document discusses input/output in computer systems. It covers I/O device examples and speeds, the processor-I/O speed mismatch, polling versus interrupt-driven I/O, and how interrupt-driven data transfer works by saving the program counter and jumping to the interrupt handler when an I/O device is ready.

Uploaded by

Rgen Al Vill
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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inst.eecs.berkeley.

edu/~cs61c 

UCB CS61C : Machine Structures
Lecture 35 – Input / Output
2010-04-21

Lecturer SOE We’ve merged 3 lectures into 1…


Dan Garcia See 2008Sp for full slides (few Qs plz)

Chris Harrison has developed a


system that allows you to touch
your skin and control a computer.
He shows examples, combined
with a pico projector, of dialing a
phone number on your hand, etc.

www.chrisharrison.net/projects/skinput/

Recall : 5 components of any Computer Motivation for Input/Output


  I/O is how humans interact with computers
Earlier Lectures" Current Lecture"
  I/O gives computers long-term memory.
Computer" Keyboard, 
   I/O lets computers do amazing things:
Mouse!
Processor" Memory" Devices"   Read pressure of synthetic hand and control
(active)" (passive)" Input" synthetic arm and hand of fireman
Control" Disk,"   Control propellers, fins, communicate
(“brain”)" (where ! in BOB (Breathable Observable Bubble)
Network !
programs, ! Output"
Datapath" data live !   Computer without I/O like a car w/no wheels;
(“brawn”)" when! Display, 
 great technology, but gets you nowhere
running)"
Printer!

CS61C L35 Input / Output (3) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (4) Garcia, Spring 2008 © UCB

I/O Device Examples and Speeds Instruction Set Architecture for I/O
  I/O Speed: bytes transferred per second   What must the processor do for I/O?
(from mouse to Gigabit LAN: 7 orders of mag!)   Input: reads a sequence of bytes
  Output: writes a sequence of bytes
  Device Behavior Partner Data Rate (KB/s)
  Some processors have special input and
Keyboard Input Human 0.01
Mouse Input Human 0.02
output instructions
Voice output Output Human 5.00   Alternative model (used by MIPS):
Floppy disk Storage Machine 50.00   Use loads for input, stores for output address!
Laser Printer Output Human 100.00   Called “Memory Mapped Input/Output” 0xFFFFFFFF!
Magnetic Disk Storage Machine 10,000.00
  A portion of the address space 0xFFFF0000!
Wireless Network I or O Machine 10,000.00
dedicated to communication paths
Graphics Display Output Human 30,000.00
to I/O devices (no mem there) cntrl reg.!
Wired LAN Network I or O Machine 125,000.00 data reg.!
  Instead, they correspond to registers 0!
When discussing transfer rates, use 10x in I/O devices
CS61C L35 Input / Output (5) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (6) Garcia, Spring 2008 © UCB
Processor-I/O Speed Mismatch Processor Checks Status before Acting
  1GHz microprocessor can execute 1 billion   Path to device generally has 2 registers:
load or store instructions per second, or   Control Register, says it’s OK to read/write
4,000,000 KB/s data rate (I/O ready) [think of a flagman on a road]
  Data Register, contains data
  I/O devices data rates range from 0.01 KB/s to
125,000 KB/s   Processor reads from Control Register in loop,
spins while waiting for device to set Ready bit in
  Input: device may not be ready to send data
Control reg (0 ⇒ 1) to say its OK
as fast as the processor loads it
  Processor then loads from (input) or writes to
  Also, might be waiting for human to act
(output) data register
  Output: device not be ready to accept data   Load from or Store into Data Register resets Ready bit (1
as fast as processor stores it ⇒ 0) of Control Register
  What to do?   This is called “Polling”
CS61C L35 Input / Output (7) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (8) Garcia, Spring 2008 © UCB

What is the alternative to polling? I/O Interrupt


  Wasteful to have processor spend most of   An I/O interrupt is like overflow exceptions
its time “spin-waiting” for I/O to be ready except:
  An I/O interrupt is “asynchronous”
  Would like an unplanned procedure call
  More information needs to be conveyed
that would be invoked only when I/O
device is ready   An I/O interrupt is asynchronous with respect
to instruction execution:
  Solution: use exception mechanism to help
  I/O interrupt is not associated with any instruction,
I/O. Interrupt program when I/O ready,
but it can happen in the middle of any given
return when done with data transfer instruction
  I/O interrupt does not prevent any instruction from
completion

CS61C L35 Input / Output (9) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (10) Garcia, Spring 2008 © UCB

Interrupt-Driven Data Transfer Administrivia


Memory"   Project 2 graded face-to-face,
check web page for scheduling
(1) I/O" add"
interrupt" sub" user"   Project 3 (Cache simulator) out
and" program"   You may work in pairs for this project
(2) save PC" or"
  Try the performance competition!
(3) jump to   You may work in pairs for this too
interrupt"   Do it for fun!
service   Do it to shine!
routine" (5)" read" interrupt"
store" service"   Do it to test your metttle!
(4) ..." routine"   Do it for EPA!
perform jr"
transfer"
CS61C L35 Input / Output (11) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (12) Garcia, Spring 2008 © UCB
Upcoming Calendar
Week # Mon Wed Thu Lab Fri
#13 I/O
P3 out VM Performance
This week
#14 Summary, Intra-machine
Inter-machine Review, Parallel Parallelism
Last week Parallelism (Scott)
o’ classes Evaluation P3 due
#15 Perf comp
RRR Week due 11:59pm

#16
Finals Week Final Exam
8-11am in
Review Sun Hearst Gym
May 9 3-6pm
10 Evans

CS61C L35 Input / Output (13) Garcia, Spring 2008 © UCB

www.computerhistory.org/internet_history
The Internet (1962) Why Networks?
  Founders   Originally sharing I/O devices between
  JCR Licklider, as head of ARPA,
writes on “intergalactic network”
computers
  1963 : ASCII becomes first   E.g., printers
universal computer standard
  1969 : Defense Advanced
  Then communicating between computers
Research Projects Agency “Lick”   E.g., file transfer protocol
(DARPA) deploys 4 “nodes” @
UCLA, SRI, Utah, & UCSB   Then communicating between people
  1973 Robert Kahn & Vint Cerf   E.g., e-mail
invent TCP, now part of the
Internet Protocol Suite   Then communicating between networks of
  Internet growth rates Revolutions like this don't computers
Vint Cerf come along very often
  Exponential since start!   E.g., file sharing, www, …
www.greatachievements.org/?id=3736
en.wikipedia.org/wiki/Internet_Protocol_Suite
CS61C L35 Input / Output (16) Garcia, Spring 2008 © UCB

!!
en.wikipedia.org/wiki/History_of_the_World_Wide_Web
The World Wide Web (1989) Shared vs. Switched Based Networks
  “System of interlinked

!
Shared
hypertext documents on   Shared vs. Switched:
the Internet” Node! Node! Node
  Switched: pairs (“point-to-
  History point” connections)
  1945: Vannevar Bush communicate at same time
describes hypertext system World’s First web Node!
called “memex” in article Tim Berners-Lee server in 1990   Shared: 1 at a time (CSMA/CD) Crossbar"
  1989: Tim Berners-Lee   Aggregate bandwidth (BW) Switch
proposes, gets system up ’90
in switched network is
  ~2000 Dot-com entrepreneurs Node!
rushed in, 2001 bubble burst many times shared: Node!
www.archive.org
  Wayback Machine   point-to-point faster since no
  Snapshots of web over time arbitration, simpler interface
  Today : Access anywhere! Node!

CS61C L35 Input / Output (18) Garcia, Spring 2008 © UCB


What makes networks work?
  links connecting switches to each other and
to computers or devices
Computer!
switch!
switch!

switch!
network!
interface!
• ability to name the components and to route
packets of information - messages - from a
source to a destination"

• Layering, redundancy, protocols, and


encapsulation as means of 

"abstraction (61C big idea)"
CS61C L35 Input / Output (19) Garcia, Spring 2008 © UCB

Magnetic Disk – common I/O device Photo of Disk Head, Arm, Actuator
  A kind of computer memory
  Information stored by magnetizing ferrite material on surface of
rotating disk Arm! Spindle!
  similar to tape recorder except digital rather than analog data
  Nonvolatile storage
Head!
  retains its value without applying power to disk.
  Two Types
  Floppy disks – slower, less dense, removable.
  Hard Disk Drives (HDD) – faster, more dense, non-removable.
Actuator! { Platters (1-12)!
  Purpose in computer systems (Hard Drive):
  Long-term, inexpensive storage for files
  “Backup” for main-memory. Large, inexpensive, slow level in the
memory hierarchy (virtual memory)

CS61C L35 Input / Output (21) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (22) Garcia, Spring 2008 © UCB

Disk Device Terminology Disk Device Performance (1/2)


Inner Outer Inner Sector Head Arm Controller
Arm Head Sector Outer Spindle
Track Track Track
Platter Track

Platter Actuator
Actuator

  Disk Latency = Seek Time + Rotation Time + Transfer


  Several platters, with information recorded magnetically Time + Controller Overhead
on both surfaces (usually)   Seek Time? depends on no. tracks to move arm, speed of actuator
  Rotation Time? depends on speed disk rotates, how far sector is
  Bits recorded in tracks, which in turn divided into sectors from head
(e.g., 512 Bytes)   Transfer Time? depends on data rate (bandwidth)
  Actuator moves head (end of arm) over track (“seek”), of disk (f(bit density,rpm)), size of request
wait for sector rotate under head, then read or write
CS61C L35 Input / Output (23) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (24) Garcia, Spring 2008 © UCB
Disk Device Performance (2/2) Where does Flash memory come in?
  Average distance of sector from head?   Microdrives and Flash memory (e.g.,
  1/2 time of a rotation CompactFlash) are going head-to-head
  7200 Revolutions Per Minute ⇒ 120 Rev/sec   Both non-volatile (no power, data ok)
  1 revolution = 1/120 sec ⇒ 8.33 milliseconds   Flash benefits: durable & lower power
(no moving parts, need to spin µdrives up/down)
  1/2 rotation (revolution) ⇒ 4.17 ms
  Flash limitations: finite number of write cycles (wear on
  Average no. tracks to move arm? the insulating oxide layer around the charge storage
  Disk industry standard benchmark: mechanism). Most ≥ 100K, some ≥ 1M W/erase cycles.
  Sum all time for all possible seek distances
from all possible tracks / # possible
  How does Flash memory work?
  Assumes average seek distance is random   NMOS transistor with an additional conductor between
gate and source/drain which “traps” electrons. The
  Size of Disk cache can strongly affect perf!
presence/absence is a 1 or 0.
  Cache built into disk system, OS knows nothing
en.wikipedia.org/wiki/Flash_memory
CS61C L35 Input / Output (25) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (26) Garcia, Spring 2008 © UCB

en.wikipedia.org/wiki/Ipod www.apple.com/ipod
What does Apple put in its iPods? RAID : Redundant Array of Inexpensive Disks
Toshiba flash Samsung flash Toshiba 1.8-inch HDD Toshiba flash
1, 2GB 4, 8GB 80, 160GB 8, 16, 32GB
  Invented @ Berkeley (1989)
  A multi-billion industry
80% non-PC disks sold in RAIDs
  Idea:
  Files are “striped” across multiple disks
  Redundancy yields high data availability
  Disks will still fail
  Contents reconstructed from data
redundantly stored in the array
  ⇒ Capacity penalty to store redundant info
  ⇒ Bandwidth penalty to update redundant info
shuffle, nano, classic, touch
CS61C L35 Input / Output (27) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (28) Garcia, Spring 2008 © UCB

Common RAID configurations “And in conclusion…”


  I/O gives computers their 5 senses
RAID 0 RAID 1
No redundancy, Fast access Mirror Data, most expensive sol’n
  I/O speed range is 100-million to one
  Processor speed means must synchronize
with I/O devices before use
  Polling works, but expensive
  processor repeatedly queries devices
RAID 3 RAID 5
Parity drive protects against 1 failure Rotated parity across all drives   Interrupts works, more complex
  devices causes an exception, causing
OS to run and deal with the device
  I/O control leads to Operating Systems

CS61C L35 Input / Output (29) Garcia, Spring 2008 © UCB CS61C L35 Input / Output (30) Garcia, Spring 2008 © UCB

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