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Verification of Full Subtractor Circuit

This lab manual document describes the verification of a full subtractor circuit using logic gates. It contains: 1) An overview of the objective, components, tools, and theory of operation of a full subtractor circuit. 2) A description of the procedure to test a full subtractor circuit using an ETS-7000 trainer board, breadboard, and logic gates. 3) The truth table and block/logic diagrams of a full subtractor circuit. 4) Simulation results of a full subtractor circuit in Proteus software for 8 different input cases.

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0% found this document useful (0 votes)
335 views5 pages

Verification of Full Subtractor Circuit

This lab manual document describes the verification of a full subtractor circuit using logic gates. It contains: 1) An overview of the objective, components, tools, and theory of operation of a full subtractor circuit. 2) A description of the procedure to test a full subtractor circuit using an ETS-7000 trainer board, breadboard, and logic gates. 3) The truth table and block/logic diagrams of a full subtractor circuit. 4) Simulation results of a full subtractor circuit in Proteus software for 8 different input cases.

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LAB MANUAL Digital Logic Design Name: Sameer Ahmed

CMS ID: 50246

Lab No. 12
VERIFICATION OF FULL SUBTRACTOR CIRCUIT
 Objective:
To analyze the operation of Full Subtractor Circuit using IC 74HCT86 (X-OR), 7432 (OR), 7404
(NOT) and 7408 (AND).

 Components:
- IC 74HCT86 (The device containing four independent XOR gates).
- IC 7408 (The device containing four independent AND gates).
- IC 7432 (The device containing four independent OR gates).
- IC 7404 (The device containing six independent NOT gates)

 Tools:
- ETS-7000 Trainer
- Breadboard
- Jumpers
- Proteus Software

 Theory:
Full Subtractor is a combinational arithmetic circuit of X-OR gates, OR gate, NOT gate and AND
gates, that adds three inputs and produces two outputs. The first two inputs are A and B and the
third input is known as Borrow (B-IN). The output carry is designated as B-OUT and the normal
output is designated as D which is Difference. A Full Subtractor circuit can be constructed by using
two half subtractor circuits. The first half-Subtractor circuit is provided with two single bit binary
inputs A and B. As we have proved with half-Subtractor circuit, it will produce two
outputs, Difference and Borrow. Left half-Subtractor circuit’s Difference output is further
provided to the Right half Subtractor circuit’s input. We provided the Borrow in bit across the
other input of second half order circuit. Again it will provide Difference out and Borrow out bit.
This Difference output is the final output of the Full Subtractor circuit, On the other hand the
Borrow out of Left half Subtractor circuit and the Borrow out of Right Subtractor circuit is further
provided into OR logic gate. After processing OR logic for two Borrow output bit, we get the final
Borrow out of full Subtractor circuit.

 Procedure:
The Trainer Board uses LEDs as an indicator for the logical behavior of the Circuit. One LED for
Difference and the other LED for Borrow output Thus, by connecting any of the input of these legs
to the input switch on the trainer, making the connection between these gates as shown in circuit
diagram, the output leg of these gates with the LEDs on the trainer, the 7th leg with the ground
and the 14th leg with the supply of all gates, we can check the behavior of a Full Subtractor Circuit.
The ON condition (1) of Borrow OUT LED will be indicated in the form of radiation of light only
when the first input is OFF (0) and the others are ON (1) or all of the inputs are ON (1), similarly
The ON condition (1) of Difference LED will be indicated in the form of radiation of light only if all
of the inputs are HIGH (1) or any one of the three input is HIGH (1).

1
LAB MANUAL Digital Logic Design Name: Sameer Ahmed
CMS ID: 50246

 Truth Table:

INPUTS OUTPUTS
A B BORROW IN DIFFERENCE “D” BORROW OUT
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

 Block Diagram of FULL SUBTRACTOR Circuit:

Figure 1: Block Diagram of the Full Subtractor Circuit

 Logic Diagram of FULL SUBTRACTOR Circuit:

Figure 2: Circuit of Full Subtractor Circuit.

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LAB MANUAL Digital Logic Design Name: Sameer Ahmed
CMS ID: 50246

 Circuit Simulation Using Proteus Software:


 Case 1:
o A=0, B=0, C=0

Figure 3: Case 1 of the Full Subtractor Circuit.

 Case 2:
o A=0, B=0, C=1

Figure 4: Case 2 of the Full Subtractor Circuit.

 Case 3:
o A=0, B=1, C=0

Figure 5: Case 3 of the Full Subtractor Circuit.

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LAB MANUAL Digital Logic Design Name: Sameer Ahmed
CMS ID: 50246

 Case 4:
o A=0, B=1, C=1

Figure 6: Case 4 of the Full Subtractor Circuit.

 Case 5:
o A=1, B=0, C=0

Figure 7: Case 5 of the Full Subtractor Circuit.

 Case 6:
o A=1, B=0, C=1

Figure 8: Case 6 of the Full Subtractor Circuit.

4
LAB MANUAL Digital Logic Design Name: Sameer Ahmed
CMS ID: 50246

 Case 7:
o A=1, B=1, C=0

Figure 9: Case 7 of the Full Subtractor Circuit.

 Case 8:
o A=1, B=1, C=1

Figure 10: Case 8 of the Full Subtractor Circuit.

 Precautions:
1- Check all the VCC and GND at the pins 14 and 7 of the IC.
2- Check all the wires and connections.
3- Properly check all the gates if one gate is not working.

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