RESTRICTED DEC3033 Computer Architecture and Organization

POLYTECHNICS
MINISTRY OF EDUCATION MALAYSIA
DEPARTMENT OF ELECTRICAL ENGINEERING

COURSE : DEC3033 COMPUTER ARCHITECTURE AND

ORGANIZATION

CREDIT(S) : 3

PREREQUISITE(S) : NONE

SYNOPSIS

COMPUTER ARCHITECTURE AND ORGANIZATION introduces students to the

concepts and principles of computer hardware operation and computer’s component
logic design. This course enables students to correctly design typical logic computer,
connection between computer components and use PLD/FPGA technologies to
implement their logic circuit. This course provides students with the knowledge and
skills to design basic computer logic circuit that is use in computer hardware system.

COURSE LEARNING OUTCOMES (CLO)

Upon completion of this course, students should be able to:

1. apply the digital circuit in Arithmetic Logic Unit (ALU) and various functional
modules in computer architecture. (C3, PLO1)

2. analyze architecture and organization structure of a computer and the

behaviour of various functional modules in a standard computer. (C4, PLO3)

3. construct arithmetic logic and interfacing circuit into the digital circuit using

Programmable Logic Devices (PLD) to simulate and implement logic

computer design based on schematic entry. (P4, PLO5)

4. display the ability to work in a team during in practical work sessions. (A3,
PLO11)

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SUMMARY (LECTURE : PRACTICAL)

SST RTA

1.0 COMPUTER OPERATION (02 : 00)

History of computer system, basic computer logic architecture and

operation of computer.

2.0 LOGIC DESIGN AND COMPUTER ARCHITECTURE (04 : 06)

Basic logic component in computer design, PLD technology,

design and produces input/output signal.

3.0 BASIC OF COMPUTER ARCHITECTURE AND NUMBER (06 : 10)

SYSTEMS

Architecture and organization, number systems, pipeline computer

techniques and how to improve CPU speed.

4.0 ARITHMETIC LOGIC UNIT (ALU) (06 : 14)

Basic logic circuit in Arithmetic Logic Unit (ALU), function of

various logic circuits.

5.0 MEMORY ELEMENT (06 : 00)

Type of physical memory, virtual memory, cache memory and

memory performance.

6.0 BUSES AND INTERFACING (06 : 00)

Component in bus system, input and output Addressing

techniques, input and output interfacing.

DEPENDENT LEARNING COURSEWORK ASSESSMENT (04)

RTA - Recommended Time Allocation

SST - Suggested Sequence of Topics

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REFERENCES

Main:

William Stallings, Computer Organization and Architecture – Designing for

Performance, Pearson Education; 8th edition (1 April 2009). (ISBN: 978-
013506417).

Additional:

David A. Patterson and John L. Hennessy, Computer Organization and Design: The
Hardware/Software Interface, Morgan Kaufmann; 4th edition (November 10,
2008). (ISBN-13: 978-0123744937).

David Money Harris and Sarah L. Harris, Digital Design and Computer Architecture,
4th Edition, Morgan Kaufmann (March 16, 2007). (ISBN-13: 978-
0123704979).

John D. Carpinelli, Computer System Organization and Architecture, 2001 by

Addison Wesley Longman, Inc. (ISBN: 0321-210808).

Thomas C. Bartee, Computer Architecture and Logic Design, McGraw-Hill

International Editions 1991. (ISBN-13: 978-0070039094).

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MATRIX OF COURSE LEARNING OUTCOMES (CLO) VS PROGRAMME LEARNING OUTCOMES (PLO)

Compliance to PLO
Recommended
Course Learning Outcome (CLO) PLO1 PLO2 PLO3 PLO4 PLO5 PLO6 PLO7 PLO8 PLO9 PLO10 PLO11 Delivery Assessment
Methods
LD1 LD4 LD1 LD1 LD2 LD3 LD5 LD6 LD7 LD8 LD9

√ Quiz,
1 apply the digital circuit in Arithmetic Logic Unit Interactive
Theory test,
(ALU) and various functional modules in Lecture,
End of
computer architecture. C3 Discussion.
Chapter

2 analyze architecture and organization structure √

Discussion, Quiz,
of a computer and the behaviour of various
Lecture. Theory Test
functional modules in a standard computer. C4

construct arithmetic logic and interfacing circuit √

3 Discussion,
into the digital circuit using Programmable Logic Practical
Laboratory
Devices (PLD) to simulate and implement logic Work
P4 Activity
computer design based on schematic entry.

4 √ Discussion,
display the ability to work in a team during Practical
Laboratory
practical work sessions. Work
A3 Activity.

Remark:
LD1 Knowledge
LD 2 Practical Skills
LD 3 Communication Skills
LD 4 Critical Thinking and Problem Solving Skills
LD 5 Social Skills and Responsibilities
LD 6 Continuous Learning and Information Management Skills
LD 7 Management and Entrepreneurial Skills
LD 8 Professionalism, Ethics and Moral
LD 9 Leadership and Teamwork Skills

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ASSESSMENT

The course assessment comprises two components, namely:

i. Coursework Assessment (CA) - 50%

Coursework assessments that measures knowledge, practical skills and generic skills are carried out in the form of continuous
assessment. Coursework assessments total score comprises the knowledge and practical marks ONLY. It does not include the mark of
generic skills.

ii. Final Examination Assessment (FE) - 50%

Final examination is carried out at the end of the semester.

ASSESSMENT SPECIFICATION TABLE (AST)

TOPICS ASSESSMENT TASKS FOR COURSEWORK

COURSE LEARNING OUTCOMES (CLO) Theory Test Quiz Practical Work End of Chapter
1 2 3 4 5 6
*(1) 10% *(2) 10% *(6) 25% *(1) 5%
   √
1. apply the digital circuit in Arithmetic Logic Unit (ALU) and
 √
various functional modules in computer architecture.
 √
    √
2. analyze architecture and organization structure of a computer and the
behaviour of various functional modules in a standard computer.  √

3. construct arithmetic logic and interfacing circuit into the digital circuit
using Programmable Logic Devices (PLD) to simulate and implement    √
logic computer design based on schematic entry.

4. display the ability to work in a team during practical work sessions.  **√

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Remark:

Remark
Topic 1 : Computer Operation √ Refers to the CLO to be assessed through the indicated assessment
task.
Topic 2 : Logic Design and Computer Architecture. *(#) # refers to the quantity of assessment

Topic 3 : Basic of Computer Architecture and Number Systems  Indicates the topic(s) to be covered under the assigned/identified
assessment tasks. For merged topics, lecturers have the options of
Topic 4 : Arithmetic Logic Unit (ALU) choosing the preferred topic (s).

Topic 5 : Memory Element ** The generic skills are to be assessed separately. The total score for
generic skills is 100%. However, it is NOT PART of the coursework
Topic 6 : Buses and Interfacing assessment mark.

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DISTRIBUTION OF STUDENT LEARNING TIME

ACCORDING TO COURSE LEARNING - TEACHING ACTIVITY

No. Learning and Teaching Activity SLT

DEPENDENT LEARNING
1.0 Delivery Method
1.1 Lecture 30

1.2 Practical 30

1.3 Tutorial 0

2.0 Coursework Assessment (CA)

2.1 Lecture-hour-assessment 2
- Theory Test [1]
30 min/ Test 0.5
2.2 Practical-hour-assessment 2
- Quiz [2] 24 min/ Lab Exe 2

INDEPENDENT LEARNING
3.0 Coursework Assessment (CA)
- End of Chapter [1] 7

4.0 Preparation and Review

4.1 Lecture 15
- Preparation before theory class eg.: download lesson notes.
- Review after theory class eg.: additional references, discussion group,discussion

4.2 Practical 20
- Preparation before practical class/field work/survey eg.: review notes, checklist/labsheets
and/or tools and equipment.
- Post practical activity eg.: lab report, additional references and discussion session
- Preparation before studio work presentation/critique.

4.3 Tutorial 0
- Preparation for tutorial

4.4 Assessment
- Preparation for Theory Test [1] 4
- Preparation for Final Exam 8

Final Examination 2
Total 120
Credit = SLT/40 3
Remark:
1. Suggested time for
Quiz : 10 - 15 minutes
Test (Theory) : 30 - 60 minutes

2. 40 hours is equivalent to 1 credit

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