SOLA2060

Introduction to Electronic Devices

Semester 1, 2019
School of Photovoltaic and Renewable Energy Engineering

Metal-Semiconductor Junctions

A/Prof Stephen Bremner

[email protected]
 Metal-Semiconductor Junctions

Learning Objectives:
• Describe what happens when a metal is placed against a
semiconductor in terms of depletion of carriers near the
surface of the semiconductor
• Be able to draw simple band diagrams to explain behaviour
• Describe and calculate current flows in a Schottky junction
• Describe how ohmic contact to a semiconductor can be
made

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 Introduction
• We have looked at a number of different devices that all consisted of the same
material in the device, but with different doping types and levels in different regions
• There are some important situations we haven’t looked at:
• Heterojunctions: combining different semiconductors together to obtain
enhanced device properties, high electron mobility transistors (HEMTs), even
HIT solar cells are examples of this approach.
• Metal on semiconductor: obvious application here is making contact to our
device, ideally we want a contact that is ohmic (i.e. not rectifying) and has a
low resistance associated with it.
• We are going to look at the case of a metal being in contact with a semiconductor
and what happens in terms of electrostatics and carrier transport at this interface
• This will lead us to devices like Schottky diodes (and even JFETs and MESFETs)
• We will also see what we have to do to get ohmic contact to semiconductors
• First, though to understand what happens we have to step back a bit and re-visit
the properties of metals in comparison to semiconductors
• We also need to define some parameters that until now we have been able to
ignore….

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 Band Diagram Re-visited
Q: What are the energies with
reference to?
A: The vacuum energy level, which
represents the energy of an
electron that is completely free and
in a vacuum

Work Function, qφ
This is difference between vacuum
energy and Fermi energy. Energy
released when electron goes from
vacuum level to Fermi level.

Electron Affinity, qχ
This is difference between vacuum
energy and conduction band edge.
Energy released when electron goes
from vacuum level to bottom of CB.
Remember metals have plenty of carriers free
to conduct

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 Metals Re-visited
We know metals have a Fermi level sitting within a band
and often the valence band and conduction band overlap.
6

What does this mean in the real world? Metals have a

high density of carriers available for conduction (heat and
electric).
This means they have low resistivity. Shown here are
some metals widely used in electronics.
Notice the scale of the resistivity being in the 10-6 range.
By comparison silicon needs doping levels of ~ 1020 cm-3
to reach 10-3 Ω.cm. But this is at the solubility limit for the
dopant and the silicon is degenerate.
Take Al as an example, typically it has 1022 cm-3 electrons
participating in current flow. Given it’s resistivity of 2.7 x
10-6 Ω.cm and using our previous expression for the
resistivity of a material as a function of electron density
and mobility we have:
𝜇𝜇 = 1�𝑞𝑞𝑞𝑞𝑞𝑞 ≅ 240 cm2/V.s
This is very low when compared to a material like GaAs (μ ≈8000 cm2/V.s, but the high density
of electrons for conduction make it a non-issue.
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 Work Functions, Electron Affinities
Work functions for metals are readily
available from a number of sources

Note Pt with a very high work function,

Au, Ni and Pd are high as well.

For semiconductors the electron affinity

makes more sense since the work
function will be dependent on the
doping level (since this determines
where the Fermi level sits relative to the
band edges).

The relative electron affinities can be

used to estimate band diagrams for
combinations of semiconductors (called
heterojunctions or heterostructures) –
very useful for estimating properties.

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 Metal and n-Semiconductor Band Diagram

• Let’s look at the case of a metal

being brought together with an n
type semiconductor
• Assume ϕm > ϕs so Fermi energy in
metal is lower than that in
semiconductor

• The metal has a much higher density of free carriers than the semiconductor
• When we bring them together in thermal equilibrium a number of requirements must be
met:
 Fermi energy must be flat across the junction
 Vacuum energy must be continuous – must be equal at the junction

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 Metal and n-Semiconductor Band Diagram
• Fermi levels must line up between metal
and semiconductor
• Vacuum energy level must be continuous
across junction
• Bands need to bend to accommodate
these conditions
We get something like this. But how?
• Electrons will move from the
semiconductor into the metal to bring the
Fermi level down in the semiconductor
• For the metal this relatively small number
of electrons does nothing to its Fermi level
• Far away from the junction, everything returns to ‘normal’ and the Fermi level distance
from the band edge remains the same
• At the junction we have stripped out electrons, so the ionised donor dopants are left
exposed meaning there is a positive charge density in the semiconductor near the
surface – we should expect an electric field (this should be obvious because of another
feature of the band diagram) Figures taken from “Semiconductor Devices” by Jasprit Singh

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 Metal and n-Semiconductor Band Diagram
The electrons coming from the
semiconductor to the metal face an
energy barrier (this ensures no
current flow in equilibrium). This
built-in potential, Vbi, is defined as:

𝑉𝑉𝑏𝑏𝑏𝑏 = 𝜙𝜙𝑚𝑚 − 𝜙𝜙𝑠𝑠

We have a depletion region near the

surface of the semiconductor of width,
W, given by:
1�
2𝜀𝜀 𝑉𝑉𝑏𝑏𝑏𝑏 − 𝑉𝑉 2
Notice the energy barrier here. 𝑊𝑊 =
𝑞𝑞𝑁𝑁𝐷𝐷
This is called the Schottky barrier,
ϕb, defined as:
There is no electric field or depletion region
for the metal – can you think of why?
𝜙𝜙𝑏𝑏 = 𝜙𝜙𝑚𝑚 − 𝜒𝜒𝑠𝑠
Figures taken from “Semiconductor Devices” by Jasprit Singh

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 Metal and p-Semiconductor Band Diagram

• Now look at the case of a metal

being brought together with a p
type semiconductor
• Assume ϕs > ϕm so Fermi energy in
metal is higher than that in
semiconductor

• The metal is also able to take in and give out a lot of holes (more readily than the
semiconductor)
• In thermal equilibrium same requirements must be met:
 Fermi energy must be flat across the junction
 Vacuum energy must be continuous – must be equal at the junction

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 Metal and p-Semiconductor Band Diagram
• Fermi levels must line up
• Vacuum energy level must be continuous
• Bands need to bend to accommodate
these conditions
We get something different, but similar to
the n-case. What has happened?
• Holes will move from the semiconductor
into the metal to raise the Fermi level in
the semiconductor (remember which way
energy goes for holes)
• This addition of holes (or loss of electrons)
for the metal is relatively minor so its
Fermi level is unaffected.
• Far away from the junction, we are back to ‘normal’
• At the junction we have stripped out holes, so the ionised acceptor dopants are left
exposed meaning there is a negative charge density in the semiconductor near the
surface and an electric field
Figures taken from “Semiconductor Devices” by Jasprit Singh

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 Metal and p-Semiconductor Band Diagram
The situation is slightly different as
we are now thinking about holes
and where they go and what barriers
they see.
The holes coming from the
semiconductor to the metal face an
energy barrier. The built-in potential,
Vbi, in this case is defined as:

𝑉𝑉𝑏𝑏𝑏𝑏 = 𝜙𝜙𝑠𝑠 − 𝜙𝜙𝑚𝑚

We again have a depletion region near
the surface of the semiconductor of
width, W, this time given by:
There is a Schottky barrier present
1�
for holes, ϕb, again defined as: 2𝜀𝜀 𝑉𝑉𝑏𝑏𝑏𝑏 − 𝑉𝑉 2
𝑊𝑊 =
𝑞𝑞𝑁𝑁𝐴𝐴
𝜙𝜙𝑏𝑏 = 𝜙𝜙𝑚𝑚 − 𝜒𝜒𝑠𝑠
Figures taken from “Semiconductor Devices” by Jasprit Singh

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 Forward Bias: Metal on n type
Look at Metal-n type case
First establish which way the Fermi
levels go:
Positive bias, +V, on metal means
potential energy of electrons in metal
goes down. So metal Fermi level goes
down relative to semiconductor EF.
Difference between the Fermi levels of
the metal and semiconductor is qV
This means the barrier to flow of
electrons from the semiconductor to the
metal is reduced to Vbi-V. This current
will therefore rise with increased
forward bias
The electrons that can move from the semiconductor to the metal do so by a process
called thermionic emission where the electrons with energy above the barrier have a
non-zero probability of getting across, whilst electrons with energy below the barrier
are stranded.

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 Thermionic Emission: SC to Metal
Look at Metal-n type case
Now we head off outside the scope of
this course, but the average flux that will
be flow to the barrier is given by:
𝑣𝑣 𝑛𝑛𝑏𝑏 /4
Where 𝑣𝑣 is the average speed of the
electrons, for a Boltzmann distribution:
1�
8𝑘𝑘𝑘𝑘 2
𝑣𝑣 =
𝜋𝜋𝑚𝑚∗
We can now come up with an equation
that will tell us the thermionic emission
current from the semiconductor to the
metal, Jsm.
𝑉𝑉𝑏𝑏𝑖𝑖 −𝑉𝑉 𝑞𝑞 𝐸𝐸𝐶𝐶 −𝐸𝐸𝐹𝐹𝐹𝐹
−𝑞𝑞 −
𝑛𝑛𝑏𝑏 = 𝑛𝑛0 𝑒𝑒 𝑘𝑘𝑘𝑘 where 𝑛𝑛0 = 𝑁𝑁𝐶𝐶 𝑒𝑒 𝑘𝑘𝑘𝑘

Looking from the metal side we see: 𝜙𝜙𝑏𝑏 −𝑉𝑉

−𝑞𝑞 𝑘𝑘𝑘𝑘
𝑛𝑛𝑏𝑏 = 𝑁𝑁𝐶𝐶 𝑒𝑒
𝑞𝑞𝜙𝜙𝑏𝑏 = 𝑞𝑞𝑉𝑉𝑏𝑏𝑏𝑏 + 𝐸𝐸𝐶𝐶 − 𝐸𝐸𝐹𝐹𝐹𝐹
SOLA2060 2019
 Thermionic Emission: SC to Metal
Look at Metal-n type case
Now we head off outside the scope of
this course, but the average flux that will
be flow to the barrier is given by:
𝑣𝑣 𝑛𝑛𝑏𝑏 /4
Where 𝑣𝑣 is the average speed of the
electrons, for a Boltzmann distribution:
1�
8𝑘𝑘𝑘𝑘 2
𝑣𝑣 =
𝜋𝜋𝑚𝑚∗
We can now come up with an equation
3� that will tell us the thermionic emission
2𝜋𝜋𝑚𝑚𝑛𝑛∗ 𝑘𝑘𝑘𝑘 2
current from the semiconductor to the
𝑁𝑁𝐶𝐶 = 2
ℎ2 metal, Jsm.

𝑣𝑣 −𝑞𝑞
𝜙𝜙𝑏𝑏 −𝑉𝑉
𝑘𝑘𝑘𝑘
𝑚𝑚∗ 𝑘𝑘 2 2 −
𝑞𝑞𝜙𝜙𝑏𝑏
𝑘𝑘𝑘𝑘
𝑞𝑞𝑞𝑞
𝐽𝐽𝑠𝑠𝑠𝑠 = 𝑞𝑞 𝑁𝑁𝐶𝐶 𝑒𝑒 = 𝑞𝑞 2 3
𝑇𝑇 𝑒𝑒 𝑒𝑒 𝑘𝑘𝑘𝑘
4 2𝜋𝜋 ℏ
Notice the dependence on the Schottky barrier height and on temperature

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 Thermionic Emission: Metal to SC
Look at Metal-n type case
But wait!
electrons
Surely electrons can flow from metal to
semiconductor?
Yes, they can, and it is useful to consider
that in equilibrium with no applied bias
the current flows will balance exactly.
We use this to get an expression for Jms:
𝐽𝐽𝑚𝑚𝑚𝑚 = 𝐽𝐽𝑠𝑠𝑠𝑠 𝑉𝑉 = 0

𝑚𝑚∗ 𝑘𝑘 2 2 −
𝑞𝑞𝜙𝜙𝑏𝑏
𝑘𝑘𝑘𝑘
𝐽𝐽𝑚𝑚𝑠𝑠 = 𝑞𝑞 2 3
𝑇𝑇 𝑒𝑒
2𝜋𝜋 ℏ
Note the lack of V dependence
This electron flow is in the opposite direction so the total current flow for a given bias is:
𝑞𝑞𝑞𝑞� 𝑚𝑚∗ 𝑘𝑘 2 2 𝑒𝑒 −
𝑞𝑞𝜙𝜙𝑏𝑏
𝐽𝐽 = 𝐽𝐽𝑠𝑠𝑠𝑠 − 𝐽𝐽𝑚𝑚𝑚𝑚 = 𝐽𝐽𝑆𝑆 𝑒𝑒 𝑘𝑘𝑘𝑘 − 1 , where 𝐽𝐽𝑆𝑆 = 𝑞𝑞 𝑇𝑇 𝑘𝑘𝑘𝑘
2𝜋𝜋 2 ℏ3

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 Reverse Bias
Does this explain what happens in reverse
bias?
Reverse bias means we raise the potential of
the electrons in the metal so metal Fermi level
goes up.
This increases the barrier seen by the
semiconductor electrons to Vbi + V
For electrons in the metal, however, the
barrier remains exactly the same. So metal to
semiconductor flow unaffected by bias.
So if we use our equation:
qV
J = J S (e kT
− 1)

We see that for a reasonable reverse bias we get that the current is simply –JS
So it can be seen that our equation does make physical sense.

Figures taken from “Semiconductor Devices” by Jaspat Singh

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 Schottky Diode Equation
𝑞𝑞𝑞𝑞�
𝐽𝐽 = 𝐽𝐽𝑆𝑆 𝑒𝑒 𝑘𝑘𝑘𝑘 −1
Very similar to pn junction ideal diode equation, but form of the ‘saturation’ current is
quite different. Generally speaking the saturation current value for a Schottky diode is
much higher than for a pn junction diode with similar built-in voltage – turn-on voltage is
much lower.
The saturation current expression has a bundle of constants that we can replace by a
number, we find it only depends on the effective mass in the following way, assuming we
are at 300 K: ∗ 2 𝑞𝑞𝜙𝜙 𝑞𝑞𝜙𝜙
𝑚𝑚 𝑘𝑘 2 − 𝑘𝑘𝑘𝑘𝑏𝑏 ∗ 𝑇𝑇 2 𝑒𝑒 −
𝑏𝑏
𝑘𝑘𝑘𝑘
𝐽𝐽𝑚𝑚𝑠𝑠 = 𝑞𝑞 𝑇𝑇 𝑒𝑒 = 𝑅𝑅
2𝜋𝜋 2 ℏ3
𝑚𝑚∗
Richardson Constant
∗
𝑅𝑅 ≅ 120 A.cm−2 K −2
𝑚𝑚0
Just like a pn junction diode, there are non-idealities, however for a Schottky diode the
ideality factor, n, is typically close to 1 since we don’t have significant minority carrier
effects and the recombination is therefore low.
𝑞𝑞𝑞𝑞�
𝐽𝐽 = 𝐽𝐽𝑆𝑆 𝑒𝑒 𝑛𝑛𝑛𝑛𝑛𝑛 −1

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 Non-idealities - Fermi Level ‘Pinning’
The surface of a semiconductor has a
large density of defect levels and when
we put metal on top we can get a large
number of interface states
These defect levels can be characterized
by a neutral level, φ0, where states with
energy below are neutral if filled, while
states with energy above are neutral if
empty.
When the density of the states near the
neutral level is large the occupation or
vacancy of these levels does not impact
the Fermi level at the surface.

This phenomena is referred to as Fermi level pinning

This means the Schottky barrier height is almost independent of the metal used
Obviously this will have a big impact on the behavior of a metal-semiconductor junction

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 Non-idealities - Fermi Level ‘Pinning’
The surface of a semiconductor has a
large density of defect levels and when
we put metal on top we can get a large
number of interface states
These defect levels can be characterized
by a neutral level, φ0, where states with
energy below are neutral if filled, while
states with energy above are neutral if
empty.
When the density of the states near the
neutral level is large the occupation or
vacancy of these levels does not impact
the Fermi level at the surface.

This phenomena is referred to as Fermi level pinning

This means the Schottky barrier height is almost independent of the metal used
Obviously this will have a big impact on the behavior of a metal-semiconductor junction

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 Non-idealities - Image Force Barrier Lowering
Look at the case for n type.
As electrons approach the interface there
is a force between the electron and the
metal charges
The electric field established is the same
as if there is a charge in the metal the
same distance from the interface and of
opposite charge – the image charge
Taking the distance between the charges
as 2x we have:
−𝑞𝑞 2
𝑞𝑞𝜙𝜙𝑖𝑖𝑖𝑖 =
16𝜋𝜋𝜀𝜀𝑠𝑠 𝑥𝑥
When this is included into the potential
profile near the interface we get the
following adjustment:
where 𝑉𝑉𝑚𝑚𝑚𝑚𝑚𝑚 = 𝑞𝑞𝜙𝜙𝑏𝑏 − 𝑞𝑞Δ𝜙𝜙𝑏𝑏
𝑞𝑞𝑁𝑁𝐷𝐷 2 𝑉𝑉𝑏𝑏𝑏𝑏 − 𝑉𝑉 Depends on the bias
𝜉𝜉𝑚𝑚𝑚𝑚𝑚𝑚 = 𝑞𝑞𝜉𝜉𝑚𝑚𝑚𝑚𝑚𝑚
𝜀𝜀 Δ𝜙𝜙𝑏𝑏 =
4𝜋𝜋𝜀𝜀𝑠𝑠

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 Ohmic Contacts
We have an issue here. We want to be
Notice this is linear able to connect our devices to each
other to form circuits.
Ideal candidate is to use metal, but we
have just seen that these junctions can
be rectifying.
We assumed in the n type case the
metal work function should be larger
than the semiconductor electron
affinity. But why not just get a low work
function metal?
This is rectifying That should work, but in reality the
Fermi level pinning undoes this
approach.

What can be done?

The answer is lying in plain sight once we realise that electrons behave as particle and
waves, so quantum mechanics applies. We can get tunnelling through thin energy
barriers - so let’s make one.
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 Ohmic Contacts
Returning to the n type case we saw for the
depletion region at zero bias:
1�
2𝜀𝜀𝑉𝑉𝑏𝑏𝑏𝑏 2
𝑊𝑊 =
𝑞𝑞𝑁𝑁𝐷𝐷
The depletion region sees a triangular barrier
formed at the metal-semiconductor interface
that is a barrier to flow both ways.
So increase the dopant density and W gets
thinner. Do it heavy enough and it can be very
thin, making tunnelling easy.

We characterise the quality of an ohmic

contact by its specific contact resistance, rc

It can be shown that the specific contact resistance is determined by the tunnelling
probability, T, which relates to Vbi and eventually the doping density, i.e.
𝑙𝑙𝑙𝑙 𝑟𝑟𝑐𝑐 ∝ 1�𝑙𝑙𝑙𝑙 𝑇𝑇 ∝ 𝑉𝑉𝑏𝑏𝑏𝑏 ∝ 1�
𝑁𝑁𝐷𝐷
In summary get a low Schottky barrier and dope as heavily as you can.

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 Summary
• Metal-semiconductor junctions behaviour depends on the work function of the
metal and semiconductor and the electron affinity of the latter
• A Schottky barrier is established to current flow for both the metal to n type and
p type cases. A depletion layer and resulting electric field are also established
within the semiconductor close to the interface.
• The result can be a rectifying “Schottky” junction that can be the basis for
Schottky diodes. Schottkky diodes have similar characteristics to a pn junction
diode, but with much higher saturation current values and so much lower turn
on voltages. They also rely on only one type of carrier (the majority carrier of
the semiconductor).
• In order to make “ohmic” contact to a semiconductor a lower work function
metal should be chosen and the semiconductor region immediately under the
metal should be doped as heavy as technically feasible. This will ensure a
narrow energy barrier at the interface and increased tunnelling of carriers.
• The Fermi level tends to be pinned in real junctions due to interface defect
levels and the Schottky barrier is further lowered due to the image charge
effect.

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