Balanced Faults

By
Dr. E. Matlotse
 Introduction
• Fault studies are a fundamental instance of
power system analysis.
• Problem entails determining of bus voltages and
line currents during different types of faults.
• Faults are segregated into 3-φ balanced faults
and unbalanced faults
• Various types of unbalanced faults are line-to-
ground fault, line-to-line fault and double line-to-
ground fault.
 Introduction
• Information sourced from fault studies are
utilised for proper relay setting and
coordination.
• 3-φ balanced fault information is used to
select and set phase relays, while the line-to-
ground fault information is used for ground
relays.
• Also, fault studies are used to obtain the
rating of the protective switchgears.
 Balanced Three-Phase Fault
• This fault is the simultaneous short circuit
across all the three phases.
• It occurs less often, but it is the most severe
type of fault.
• Since the network remains balanced during
this type of fault, the problem is solved on a
per-phase basis.
• Other 2 phases carry identical currents except
for the phase shift.
 Balanced Three-Phase Fault
• A fault represent a structural network change
equivalent with that caused by the addition of
an impedance at the place of fault.

• If the fault impedance is zero, the fault is

called a solid fault.

• Faulted network can be solved using the

Thevenin’s method
 Example

Fig.1: Impedance diagram of a simple power system

 Example
The one-line diagram of a simple three-phase
power system is shown in fig. 1. Each
generator is represented by an emf behind the
transient reactance. All impedances are
expressed in per unit on a common 100 MVA
base and, for simplicity, resistances are
neglected. The following assumptions are
made:
 Example
(i) shunt capacitances are neglected and the
system is considered on no-load.
(ii) All generators are running at their rated
voltage and rated frequency with their emfs in
phase.
Determine the fault current, the bus voltages
and the line currents during the fault when a
balanced three-phase fault with a fault
impedance Zf = 0.16 per unit occurs on bus 3.
 Solution
The resulting network during the fault
 Solution
The fault current at bus 3 is
V3 (0)
I3 (F ) 
Z 33  Z f

Z 33 is the Thevenin’s impedance viewed from the

faulted bus.

V3 (0) is the Thevenin’s Voltage or the prefault bus

voltage.
 Solution
Since the generators’ emfs are equal to the
rated value and loads are neglected and then
V3 (0)  1 pu
Converting the Δ formed by buses 1, 2 and 3
to an equivalent Y, becomes
( j 0.4)( j 0.8)
Z1  Z 2   j 0.2 pu
j1.6

( j 0.4)( j 0.4)
Z3   j 0.1 pu
j1.6
 Solution
The Y network is
 Solution
Combining the parallel branches, Thevenin’s
impedance is
( j 0.4)( j 0.6)
Z 33   j 0.1  j 0.34 pu
j 0.4  j 0.6
The resulting circuit becomes,
 Solution
Therefore, the fault current is
V3 ( F ) 1
I3 (F )     j 2.0 pu
Z 33  Z f j 0.34  j 0.16
Current divisions between the two generators
are
j 0.6
I G1  ( j 2.0)   j1.2 pu
j 0.4  j 0.6

j 0.4
IG2  ( j 2.0)   j 0.8 pu
j 0.4  j 0.6
 Solution
Bus Voltage Changes

V1  0  ( j 0.2)( j1.2)  0.24 pu

V2  0  ( j 0.4)( j 0.8)  0.32 pu

V3  ( j 0.16)( j 2.0)  1.0  0.68 pu

 Solution
Bus Voltages

V1 ( F )  V1 (0)  V1  1.0  0.24  0.76 pu

V2 ( F )  V2 (0)  V2  1.0  0.32  0.68 pu

V3 ( F )  V3 (0)  V3  1.0  0.68  0.32 pu

 Solution
The short-circuit currents in the lines are
V1 ( F )  V2 ( F ) 0.76  0.68
I12 ( F )     j 0.1 pu
z12 j 0.8

V1 ( F )  V3 ( F ) 0.76  0.32
I13 ( F )     j1.1 pu
z13 j 0.4

V2 ( F )  V3 ( F ) 0.68  0.32
I 23 ( F )     j 0.9 pu
z 23 j 0.4
 Short-Circuit Capacity (SSC)
• SCC at a bus is a common measure of the
strength of a bus.
• SCC or the short-circuit MVA at bus k is
defined as the product of the magnitudes of
the rated bus voltage and the fault current.
• SCC is used to determine the dimension of a
busbar and the interrupting capacity of a
circuit breaker.
 Short-Circuit Capacity (SSC)
based on the above definitions, the SCC at bus
k is given by
SCC  3VLK I K ( F ) x10 3 MVA (1)
where: line-to-line VLK is in kV
I K (F ) is in Amperes
The symmetrical 3-φ fault current in pu is
VK (0)
I K (F )  (2)
X KK
 Short-Circuit Capacity (SSC)
where: VK (0) is the per unit prefault bus voltage
and X KK is the per unit reactance to the point
of fault. The base current3 is given by
S x10
IB  B (3)
3VB
where: S B is the base MVA and VB is the line-
to-line base voltage in kV. The fault current in
amps is I (F )  I (F ) I
K K pu B

VK (0) S B x10 3
 (4)
X KK 3VB
 Short-Circuit Capacity (SSC)
Substituting for IK(F) in (4) into (1) yields
V (0) S BVL
SCC  K (5)
X KK VB
If the base voltage is equal to the rated
voltage, i.e. VL = VB
V (0) S B
SCC  K (6)
X KK
The prefault bus voltage is usually assumed to
be 1 per-unit and we therefore obtain from (6)
 Short-Circuit Capacity (SSC)
the following approximate formula for the
short-circuit capacity

SB
SCC  MVA (7)
X KK
 Systematic Fault Analysis Using Bus
Impedance Matrix

• This approach is efficient and applicable when

dealing with large networks.

• In this regard, by utilizing the elements of the

bus impedance matrix, the fault current as
well as the bus voltages during fault are
readily and easily calculated.
 Systematic Fault Analysis Using Bus
Impedance Matrix

Figure 1:
 Systematic Fault Analysis Using Bus
Impedance Matrix
• Consider a typical bus of an n-bus power system
network as shown in figure 1.
• System is assumed to be operating under
balanced condition and, therefore, a per-phase
circuit model is used.
• Each machine is represented by a constant
voltage source behind a proper reactance.
• Transmission lines are represented by their
equivalent π model and all impedances are
expressed in per-unit on a common MVA base.
 Systematic Fault Analysis Using Bus
Impedance Matrix
• A balanced 3-φ fault is to be applied at bus K
through impedance Zf.
• Prefault bus voltages are obtained from the
power flow solution and are represented by
the column vector

(1)
 Systematic Fault Analysis Using Bus
Impedance Matrix
The bus load is represented by a constant
impedance evaluated at the prefault bus
voltage 2
Vi (0)
Z iL  (2)
S L*
• Changes in the network voltage caused by the
fault with impedance Zf is equivalent to those
caused by the added voltage VK(0) with all
other sources short-circuited.
 Systematic Fault Analysis Using Bus
Impedance Matrix
• Zeroing all voltage sources and representing
components and loads by their appropriate
impedances, we obtain the Thevenin’s circuit as
shown in figure 2.

Figure 2
Systematic Fault Analysis Using Bus
Impedance Matrix
The bus voltage changes caused by the fault in
this circuit are represented by the column vector

(3)

Using Thevenin’s theorem, bus voltages during

fault are obtained by superposition of the
prefault bus voltages and the changes in the bus
voltages given by
Vbus ( F )  Vbus (0)  Vbus (4)
 Systematic Fault Analysis Using Bus
Impedance Matrix
• Injected bus currents are expressed in terms
of the bus voltages and they are
I bus  YbusVbus (5)
where I bus is the bus current vector entering
the bus andYbus is the bus admittance matrix.
The diagonal elements of each bus is the sum
of admittances connected to it
m
Yii   yij j  i (6)
j 0
 Systematic Fault Analysis Using Bus
Impedance Matrix
• Off-diagonal element is equal to the –ve of the
admittance between the buses
Yij  Y ji   yij (7)
where yij is the actual admittance of the line i-j .
• In the Thevenin’s circuit of fig. 2, current entering
every bus is zero except at the faulted bus. Since
the current at faulted bus is leaving the bus, it’s
taken as a –ve current entering bus k.
 Systematic Fault Analysis Using Bus
Impedance Matrix
• Thus, the nodal equation applied to the
Thevenin’s circuit becomes

(8)

or

I bus  Ybus Vbus (9)

 Systematic Fault Analysis Using Bus
Impedance Matrix
• Solving for Vbus , we get
Vbus  Zbus I bus (F ) (10)

where Z bus  Ybus1 is the bus admittance matrix.

Substituting (10) into (4), the bus voltage
vector during the fault becomes

Vbus ( F )  Vbus (0)  Zbus I bus ( F ) (11)

 Systematic Fault Analysis Using Bus
Impedance Matrix
• Expressing the above matrix formulation in
terms of its elements, we get

(12)
• Since we have only one single non-zero
element in the current vector, the Kth
equation in (12) becomes
V ( F )  V (0)  Z I ( F ) (13)
K K KK K
 Systematic Fault Analysis Using Bus
Impedance Matrix
• Also, from the Thevenin’s circuit shown in
fig.2, we have
VK ( F )  Z f I K ( F ) (14)
• For a solid fault, Z f  0 and VK ( F )  0 .
Substituting for VK (F ) from (14) into (13) and
solving for the faulted current, we get
VK (0)
IK 
Z Z
(15)
KK f
 Systematic Fault Analysis Using Bus
Impedance Matrix
• Thus, for a fault at bus K, we need only the ZKK
element of the bus impedance matrix.
• This element is the Thevenin’s impedance as
viewed from the faulted bus.
• Also, writing the ith equation in (12) in terms
of its elements, we have
Vi ( F )  Vi (0)  ZiK I K ( F ) (16)
 Systematic Fault Analysis Using Bus
Impedance Matrix
• Substituting for IK(F), bus voltage during the
fault at bus i becomes

Z iK
Vi ( F )  Vi (0) 
Z KK  Z f
VK (0) (17)

• Having calculated the bus voltages during the

fault, then the fault currents in all the lines
can be calculated.
 Systematic Fault Analysis Using Bus
Impedance Matrix
• For the line connecting buses i and j with
impedance Zij ,the short-circuit current in this
line is
Vi ( F )  V j ( F )
I ij ( F )  (18)
ij Z