Top 21 Computer Architecture Interview Questions & Answers
Top 21 Computer Architecture Interview Questions & Answers
Top 21 Computer Architecture Interview Questions & Answers
com/
Computer architecture is a specification detailing about how a set of software and hardware
standards interacts with each other to form a computer system or platform.
System Design: It includes all the hardware component in the system, including data
processor aside from the CPU like direct memory access and graphic processing unit
Instruction Set Architecture (ISA): It is the embedded programming language of the
central processing unit. It determines the CPU’s functions and capabilities based on
programming it can process.
Microarchitecture: It defines the data path, storage element, and data processing as
well as how they should be implemented in the ISA.
A CPU architecture is defined by the set of machine language which can be defined as a
4) Mention what are the different types of fields that are part of an instruction?
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Operation Code Field or OP Code field: This field is used to determine the operation to
be performed for the instruction
Address Field: This field is used to determine various addresses such as memory
address and register address
Mode Field: This field determines how operand is to perform or how effective address is
derived
External Interrrupts:
Internal Interrupts:
These types of interrupts are caused due to any exception caused by the program itself. For
example, division by zero or an invalid opcode, etc.
Software Interrupts:
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Only during the execution of an instruction such type of interruption can occur. The primary
purpose of such interrupts is to switch from user mode to supervisor mode.
I/O Units
Control Unit
Arithmetic Logic Unit (ALU)
Registers
Cache
Snooping Cache is the process where individual caches monitor address lines for accesses to
memory locations that they have cached.
9) Mention what is the simplest way to determine cache locations in which to store
memory blocks?
Direct Mapping is the simplest way to define cache locations in which to store memory blocks.
Associative memories are expensive in comparison to random-access memories due to the
added logic associated with each cell.
10) What digital functions should be used to convert the octal code to binary code?
To convert the octal code to binary code multiplexers is used. It is also referred as Data
Selector, where dynamic memory uses the same address lines for both row and column.
11) What technique is used to automatically move program and data blocks into the
physical main memory when they are required for execution?
Virtual Memory technique is used. It provides a mechanism for translating program generated
address into correct main memory locations. By means of mapping table translation or mapping
is handled.
The use of RAID system is to increase the disk storage capacity and availability.
13) Explain what type of memory that can be erased with the electric discharge?
With the passage of electric discharge, EEPROM is the type of memory whose content is
erased.
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The horizontal micro code contains the control signal without any intermediary. It contains a lot
of signals and hence due to that the number of bits also increases.
In direct mapping, the RAM is used to store data and some of the data is stored in the Cache.
The address space is divided into two parts index field and tag field. The tag field is used to
store the tag field whereas the rest is stored in the main memory.
18) When large number of registers are included in the CPU, what is the most efficient
way to connect them?
When large number of registers are included in the CPU, the most efficient way to connect them
is through an ALU.
19) Explain if the internal bus connects only register within the CPU, how would you get
data to and from memory?
The AR or Address Register is used to select a memory address, and the Data Register is used
to send and receive the data. Both these register are connected to the internal BUS, and the
Data Register acts as a bridge between the memory data BUS and internal BUS.
So first we load AR with the desired memory address and then transfer to or from Data
Register.
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A WAIT state plays a key role in preventing CPU speed incompatibilities. Many times the
processor is at ready state to accept data from a device or location, but there might be no input
available. In such case there will be wastage of CPU time, and the system gets into WAIT state.
The one way to deal with WAIT state is increasing the microprocessor clock period by reducing
the clock frequency
The second way is by using special control input READY. It allows the memory to set its own
memory cycle time.
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