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    EDMOSFET Switching Device Using Metal Field Plate Design

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    EDMOSFET Switching Device Using Metal Field Plate Design

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    張碩仁
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    59 views3 pages

    EDMOSFET Switching Device Using Metal Field Plate Design

    Uploaded by

    張碩仁

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    © All Rights Reserved
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    EDMOSFET Switching Device using Metal Field Plate Design

    Ashvini Gyanathan1,*, Yunpeng Xu1, Amitha Susan Eapen1, Appu Mathew Varkey1, Ming Li1
    and Jeoung Mo Koo.1
    1
    Technology Development (TD-VAS), GLOBALFOUNDRIES Singapore Pte. Ltd.
    *
    Phone: +65 66704216, Email: [email protected]

    Abstract Device Performance


    This paper explores a low-cost method to improve Figure 2 a) shows the RDSON versus the BV
    the Breakdown Voltage (BV) of a Switching trend for the EDMOSFETs with and without
    Device without compromising on the Source- MFPs. These points were plotted against the
    Drain Resistance (RDSON). This can be achieved theoretical Silicon limit of the RDSON versus BV
    by introducing a metal field plate over the Gate curve [6]. The NMOS MFP with implant tuning
    and the extended Drain region of the EDMOSFET. design was also investigated and used for
    This switching device shows negligible comparison in this paper, since a further BV
    degradation in current-voltage performance (i.e. improvement was observed. The increase in BV
    Drain Current in the linear region and saturation does not significantly increase the RDSON for the
    region). MFP design scheme. Figure 2 b) depicts the BV
    (Keywords: CMOS, High Voltage, EDMOSFET, improvement trend using a MFP design for the
    Metal Field Plate) NMOS and PMOS devices.

    Introduction Figure 3 a) and b) depicts the improved BV


    The compromise between a sufficiently high BV performance of the MFP devices as compared to
    and a low RDSON is the primary design challenge the devices without the MFPs. There is a marked
    afflicting High Power Metal-Oxide- improvement in BV with the inclusion of the
    Semiconductor Field Effect Transistor (MOSFET) MFPs (i.e. NMOS ~ 5V; PMOS ~ 3V). The MFP
    devices [1]. One method to improve the BV while result in a reduced electric field below the gate, on
    retaining low RDSON is to include a metal field the surface of the channel and along the drain
    plate (MFP) which reduces the electric field in the region of the EDMOSFET; thus, less ionic charges
    channel/drain region of the device [2]-[5]. In this are accumulated on the surface of the device,
    paper, the electrical performance associated with leading to an increase in the BV [2]-[3].
    the implementation of the MFP design, thereby
    enabling a device with switching characteristics, is The device with the MFP has similar Current-
    explored. Voltage (IV) characteristics as that without the
    MFP. Figure 4 shows the drain current (ID) when
    Device Fabrication the drain voltage (VD) is biased at 0.1V, in the
    The cross-sectional schematic of the switching linear operating region for both the a) NMOS
    device is illustrated in Fig 1 ai) and aii). The devices, as well as the b) PMOS devices. The
    device structure is similar to that of a typical threshold voltages for both devices are similar.
    Extended Drain MOSFET (EDMOSFET) with an The NMOS and PMOS devices with MFPs also
    additional MFP on top of the gate. This MFP show similar IDLIN (ID at maximum VG with
    encroaches on part of the drain region. Fig 1 b) Drain Voltage at 0.1V) values. This further attests
    shows the Scanning electron microscopy (SEM) to the robust design of the MFP which increases
    image of the EDMOSFET switching device. The the BV without affecting the electrical
    MFP overhang is annotated in the SEM image. performance of the device. The IDLIN for the

    978-1-5386-6508-4/19/$31.00 ©2019 IEEE 2019 Electron Devices Technology and Manufacturing Conference (EDTM)
    NMOS device without MFP, on the other hand, is other current-voltage parameters of the NMOS
    about 4% higher than the NMOS device with the devices. This concept of introducing a MFP can be
    MFP and Implant tuning. This could be attributed translated to most high voltage devices as a
    to the higher doping levels in the drain-side of the feasible solution for BV improvement.
    NMOS device to further enhance the BV.
    References
    Figure 5 depicts the electrical performance of ID [1] M.-R. Lee and O.-K. Kwon, “High Performance
    in the saturation region (IDSAT) with the VG Extended Drain MOSFETs (EDMOSFETs) with
    biased at 3.3V. In Figure 5 a) the IDSAT curve of Metal Field Plate,” International Symposium On
    the NMOS device with and without the MFP dips Power Semiconductor Devices & ICs 1999, 249-
    when it saturates at higher Drain Voltage (VD). 252, doi: 10.1109/ISPSD.1999.764110.
    This slight dip in the IDSAT curve is associated [2] J. S. Fu, H.-C. Chiu, P.-Y. Ke, T.-H. Chen and
    with the self-heating effect within the transistor at W.-S. Feng, “High-Performance 90-nm Dual-
    Gate nMOSFETs With Field-Plate Technology,”
    higher VD. This self-heating effect is eliminated in
    IEEE Electron Device Letters 2011 Vol. 32,
    the device with the MFP and Implant tuning. The
    Issue No. 3, 291-293, doi:
    slightly larger difference in the IDSAT values of
    10.1109/LED.2010.2102738.
    the NMOS devices (i.e. with/without MFPs versus
    [3] X. Luo J. Wei, X. Shi, K. Zhou, R. Tian, B.
    with MFP and Implant tuning) can be attributed to Zhang and Z. Li, “Novel Reduced ON-
    the larger doping concentrations in the drain Resistance LDMOS With an Enhanced
    region of the NMOS switching device. Breakdown Voltage,” IEEE Transactions on
    Electron Devices 2014 Vol. 61, Issue No. 12,
    The snapback performance of the switching device 4304-4308, doi: 10.1109/TED.2014.2364842.
    shown in Figure 6, is measured at room [4] N. Fujishima, M. Saito, A. Kitamura, Y. Urano,
    temperature (i.e. 25C). The optimal switching G. Tada and Y. Tsuruta, “A 700V Lateral Power
    functionality of the device with the MFP can be MOSFET with Narrow Gap Double Metal Field
    determined from this snapback measurement Plates Realizing Low On-resistance and Long-
    (highlighted in orange). At lower VG, the device term Stability of Performance,” International
    can operate at higher VD; whereas at higher VG, Symposium On Power Semiconductor Devices
    the device exhibits similar operational & ICs 2011, 255-258, doi:
    functionality as the device without MFP. This 10.1109/ISPSD.2001.934603.
    snapback performance defines the switching [5] Z. Lin and X. Chen, “A New Solution for
    characteristics of the device. Superjunction Lateral Double Diffused
    MOSFET by Using Deep Drain Diffusion and
    Conclusion Field Plates,” IEEE Electron Device Letters
    This paper has demonstrated the distinct 2015 Vol. 36, Issue No. 6, 588-590, doi:
    improvements in BV with the metal field plate 10.1109/LED.2015.2421972.
    [6] B. J. Baliga, “Modern Power Devices,” Wiley-
    design, while ensuring comparable electrical
    Interscience: New York, ISBN: 978-0471819868
    performance to devices without the metal field
    (1987).
    plates. A slight Implant tuning could also further
    improve the BV without significant degradation of

    2019 Electron Devices Technology and Manufacturing Conference (EDTM)


    Fig. 1 – a) Cross-sectional schematic of both (i) NMOS and (ii) Fig. 2 – a) BV vs RDSON curve; b) Breakdown Voltage (BV)
    PMOS switching devices; b) SEM cross-sectional images of the values of different NMOS and PMOS device schemes
    EDMOSFET switching device

    Fig. 3 – BV characteristics of typical EDMOSFETs with/without Fig. 4 – IDLIN characteristics of typical EDMOSFETs
    MFPs for a) NMOS, and b) PMOS devices with/without MFPs for a) NMOS, and b) PMOS devices

    Fig. 5 – IDSAT characteristics of typical EDMOSFETs Fig. 6 – Snapback performance of the EDMOSFET switching
    with/without MFPs for a) NMOS, and b) PMOS devices device at 25C. The operating region for the device is
    highlighted in orange.

    2019 Electron Devices Technology and Manufacturing Conference (EDTM)

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