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Objective:: To Verify The Balanced Condition of A Bridge Circuit

This document describes an experiment to verify the balanced condition of a bridge circuit using PSPICE. It provides the objective, balanced condition definition, procedure steps, lab task, and calculations. The lab task is to design the given circuit in PSPICE and check if it satisfies the balanced condition, where the net current through the 5Ω resistor is zero. Nodal analysis is performed and the calculations show that the current I2 through the 5Ω resistor is 2.67A in one direction and 2.67A in the other, yielding a net current of 0A, indicating the circuit is balanced.

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Imaad Khan
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52 views4 pages

Objective:: To Verify The Balanced Condition of A Bridge Circuit

This document describes an experiment to verify the balanced condition of a bridge circuit using PSPICE. It provides the objective, balanced condition definition, procedure steps, lab task, and calculations. The lab task is to design the given circuit in PSPICE and check if it satisfies the balanced condition, where the net current through the 5Ω resistor is zero. Nodal analysis is performed and the calculations show that the current I2 through the 5Ω resistor is 2.67A in one direction and 2.67A in the other, yielding a net current of 0A, indicating the circuit is balanced.

Uploaded by

Imaad Khan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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LAB NO.

4
TO VERIFY THE BALANCED CONDITION OF A BRIDGE CIRCUIT

OBJECTIVE:
• Analysis of Bridge circuit.
• To obtain the balanced condition of bridge circuit using ORCAD PSPICE
BALANCED CONDITION OF BRIDGE CIRCUIT:

• The Bridge network is said to be balanced when the condition of I=0A, and V=0v exists. If
V=0v (short circuit between a and b) then

And

Or
In addition when V
Then
And
If we set I=0A, then With
the result that the above equation becomes

Substituting for from the above yields

Or rearranging we have
This conclusion states that if the ratio of is equal to the ratio of to the bridge is
balanced and I=0A or V=0V.
PROCEDURE STEPS:
• Click on the Get New parts icon to select parts from the parts list or type the name
identifier for each part in the shortcut box.
• Type r for resistance, VDC for DC voltage source.
• Change the orientation of part r with CTRL+R.
• Connect the elements according to the circuit diagram with the help of draw wire
option.
• Assign numerical values to the elements by double click on that element and change the
VALUE attribute.
• Connect ground by typing EGND.
• Name the nodes according to the circuit diagram (optional)  Go to the file menu and
save the circuit.
• Now using the analysis menu click on setup and select bias point detail for DC analysis (it
is enabled by default)
For displaying current and voltage on schematics click on the Display result on
schematics under Analysis menu

LAB TASK

 Using Bias point detail design the given circuit in PSPICE and illustrate whether it verify the
balanced condition for bridge circuit or not?
Hint: For balanced bridge must be zero.
CALCULATION:
(3Ω+ 4Ω+ 2Ω )I1 - (4Ω )I2 - (2Ω )I3 = 20 V
(4 Ω+ 5Ω + 2Ω )I2 - (4Ω )I1 - (5Ω )I3 =0
(2 Ω+ 5Ω + 1I3Ω)I3- (2Ω ) I1- (5Ω ) I2= 0
and
9I1- 4I2- 2I3= 20
-4I1+11I2-5I3 = 0
-2I1-5I2+8I3 =0
with the result that
I1= 4 A
I2=2.67 A
I3= 2.67 A
The net current through the 5Ω resistor is
I5 Ω =I2- I3= 2.67 A - 2.67 A = 0 A
Nodal analysis yields
(1/3Ω + 1/4Ω+ 1/2Ω) V1 - (1/4 Ω) V2 – ( 1/2Ω) V3=20/3 A
(1/4Ω + 1/2Ω + 1/5Ω ) V2 – (1/4Ω) V1 – (1/5Ω)V3 = 0
(1/5Ω+ 1/2Ω + 1/1Ω)V3 – (1/2Ω)V1 – (1/5Ω)V2= 0
And
(1/3Ω+1/4Ω + 1/2Ω)V1 – (1/4Ω) V2 – (1/2Ω)V3 = 6.67 A
-(1/4Ω)V1 + (1/4Ω + 1/2Ω + 1/5Ω)V2 – (1/5Ω)V3 = 0
-(1/2Ω)V1 – (1/5Ω) V2 + (1/5Ω + 1/2Ω + 1/1Ω)V3 = 0
CONCLUSION:
In this lab we will learn about bridge network this type of network is used in both
dc and ac meters. Electronics courses introduce these in the discussion of rectifying circuits
used in converting a varying signal to one of a steady nature (such as dc).

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