Mechatronics

MME205: Advanced Microprocessor and

Microcontroller
Lecture #4: Instruction Set of 8085 -II

Prepared by:
Dr. Ahmed Hassan M. Hassan
Associate Professor
[email protected]

www.mashreq.edu.sd
Lecture #4: Instruction Set of 8085 -II
 Main Contents
Architecture
 Internal Register Organization and Pin Configuration
 Instruction Set of 8085
 addressing modes
 instruction machine cycles with states and timing
diagram.
 8085 assembly language programming
 Examples

Lecture #4: Instruction Set of 8085 -II

 Introduction

Microprocessor-based system

Lecture #4: Instruction Set of 8085 -II

 Classification based on functionality:
 Data transfer operations: This group of instructions copies
data from source to destination. The content of the source is not
altered.

 Arithmetic operations: Instructions of this group perform

operations like addition, subtraction, increment & decrement. One
of the data used in arithmetic operation is stored in accumulator and
the result is also stored in accumulator.

 Logical operations: Logical operations include AND, OR,

EXOR, NOT. The operations like AND, OR and EXOR uses
two operands, one is stored in accumulator and other can be any
register or memory location. The result is stored in accumulator.
NOT operation requires single operand, which is stored in
accumulator.

Lecture #4: Instruction Set of 8085 -II

 Branching operations: Instructions in this group can be used to
transfer program sequence from one memory location to another
either conditionally or unconditionally.

 Machine control operations: Instruction in this group control

execution of other instructions and control operations like interrupt,
halt etc.

Lecture #4: Instruction Set of 8085 -II

 4. Branching instructions
 The branch group instructions allows the
microprocessor to change the sequence of program
either conditionally or under certain test
conditions. The group includes,
(1) Jump instructions
(2) Call and Return instructions
(3) Restart instructions
Lecture #4: Instruction Set of 8085 -II
 Jump Un-Conditionally
Opcode Operand Description
JMP 16-bit Jump unconditionally
address
 The program sequence is transferred to the memory
location specified by the 16-bit address given in the
operand.
 Example: JMP 2034 H.

Lecture #4: Instruction Set of 8085 -II

 Jump Conditionally
Opcode Operand Description

Jx 16-bit address Jump conditionally

 The program sequence is transferred to the memory

location specified by the 16-bit address given in the
operand based on the specified flag of the PSW.
 Example: JZ 2034 H.

Lecture #4: Instruction Set of 8085 -II

 Jump Conditionally
Opcode Description Status Flags
JC Jump if Carry CY = 1
JNC Jump if No Carry CY = 0
JZ Jump if Zero Z =1
JNZ Jump if No Zero Z =0
JPE Jump if Parity Even P= 1
JPO Jump if Parity Odd P= 0

Lecture #4: Instruction Set of 8085 -II

 Call Un-Conditionally
Opcode Operand Description
CALL 16-bit Call unconditionally
address
 The program sequence is transferred to the memory location
specified by the 16-bit address given in the operand.
 Before the transfer, the address of the next instruction after
CALL (the contents of the program counter) is pushed onto the
stack.
 Example: CALL 2034 H.

Lecture #4: Instruction Set of 8085 -II

 Call Conditionally
Opcode Description Status Flags
CC Call if Carry CY = 1
CNC Call if No Carry CY = 0
CP Call if Positive S=0
CM Call if Minus S=1
CZ Call if Zero Z =1
CNZ Call if No Zero Z =0
CPE Call if Parity Even P= 1
CPO Call if Parity Odd P= 0

Lecture #4: Instruction Set of 8085 -II

 Return Un-Conditionally
Opcode Operand Description
RET None Return unconditionally

 The program sequence is transferred from the

subroutine to the calling program.
 The two bytes from the top of the stack are copied
into the program counter, and program execution
begins at the new address.
 Example: RET

Lecture #4: Instruction Set of 8085 -II

 Return Conditionally
Opcode Description Status Flags
RC Return if Carry CY = 1

RNC Return if No Carry CY = 0

RP Return if Positive S= 0

RM Return if Minus S= 1

RZ Return if Zero Z =1

RNZ Return if No Zero Z =0

RPE Return if ParityEven P= 1

RPO Return if ParityOdd P= 0

Lecture #4: Instruction Set of 8085 -II

 Restart Conditionally
Opcode Operand Description
RST 0– 7 Restart (Software Interrupts)

 The RST instruction jumps the control to one of eight

memory locations depending upon the number.
 These are used as software instructions in a program to
transfer program execution to one of the eight locations.
 Example: RST 1 or RST 2 ….

Lecture #4: Instruction Set of 8085 -II

Instruction Code Vector Address
RST 0 0*8=0000H
RST 1 1*8=0008H
RST 2 2*8=0010H
RST 3 3*8=0018H
RST 4 4*8=0020H
RST 5 5*8=0028H
RST 6 6*8=0030H
RST 7 7*8=0038H

Lecture #4: Instruction Set of 8085 -II

 5. Control Instructions

 The control instructions control the

operation of microprocessor.

Ex.: NOP, HLT, DI, EI, RIM and SIM

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Opcode Operand Description
NOP None No operation

 No operation is performed.
 The instruction is fetched and decoded but no
operation is executed.
 Example: NOP

Lecture #4: Instruction Set of 8085 -II

 Opcode Operand Description
HLT None Halt

 The CPU finishes executing the current instruction and

halts any further execution.
 An interrupt or reset is necessary to exit from the halt
state.
 Example: HLT

Lecture #4: Instruction Set of 8085 -II

Opcode Operand Description
DI None Disable interrupt

 The interrupt enable flip-flop is reset and all the

interrupts except the TRAP are disabled.
 No flags are affected.
 Example: DI

Lecture #4: Instruction Set of 8085 -II

Opcode Operand Description
EI None Enable interrupt

 The interrupt enable flip-flop is set and all interrupts

are enabled.
 No flags are affected.
 This instruction is necessary to re-enable the interrupts
(except TRAP).
 Example: EI

Lecture #4: Instruction Set of 8085 -II

 RIM Instruction
Opcode Operand Description
RIM None Read Interrupt Mask

 This is a multipurpose instruction used to read the

status of interrupts 7.5, 6.5, 5.5 and read serial data
input bit.
 The instruction loads eight bits in the accumulator
with the following interpretations.
 Example: RIM

Lecture #4: Instruction Set of 8085 -II

Lecture #4: Instruction Set of 8085 -II
 SIM Instruction
Opcode Operand Description
SIM None Set Interrupt Mask

 This is a multipurpose instruction and used to

implement the 8085 interrupts 7.5, 6.5, 5.5, and serial
data output.
 The instruction interprets the accumulator contents as
follows.
 Example: SIM

Lecture #4: Instruction Set of 8085 -II

Lecture #4: Instruction Set of 8085 -II
 Addressing Modes in
Instructions
 The process of specifying the data to be operated on by the
instruction is called addressing.
 The various formats for specifying operands are called
addressing modes. The 8085 has the following five types of
addressing:
I. Immediate addressing
II. Memory direct addressing
III. Register direct addressing
IV. Indirect addressing
V. Implicit addressing

Lecture #4: Instruction Set of 8085 -II

Immediate Addressing:

In this mode, the operand given in the instruction -

a byte or word – transfers to the destination register
or memory location.

 Ex: MVI A, 9AH

o The operand is a part of the instruction.

o The operand is stored in the register mentioned in the
instruction.

Lecture #4: Instruction Set of 8085 -II

Memory Direct Addressing:

Memory direct addressing moves a byte or word

between a memory location and register.
The memory location address is given in the instruction.

 Ex: LDA 850FH

o This instruction is used to load the content of

memory address 850FH in the accumulator.

Lecture #4: Instruction Set of 8085 -II

 Register Direct Addressing:

Register direct addressing transfer a copy of a byte

or word from source register to destination register.

 Ex: MOV B, C
o It copies the content of register C to register B.

Lecture #4: Instruction Set of 8085 -II

Indirect Addressing:

Indirect addressing transfers a byte or word between a

register and a memory location.

 Ex: MOV A, M

o Here the data is in the memory location pointed to

by the contents of HL pair. The data is
o moved to the accumulator.

Lecture #4: Instruction Set of 8085 -II

Implicit Addressing

In this addressing mode the data itself specifies the

data to be operated upon.

 Ex: CMA
o The instruction complements the content of the
accumulator. No specific data or operand is
mentioned in the instruction.

Lecture #4: Instruction Set of 8085 -II