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Chapter 2 - History of Verilog

Verilog was initially developed privately in 1984 and went through several revisions in the 1980s without standardization. In the early 1990s it was promoted by Cadence and Synopsys, and Cadence formed the Open Verilog International organization to develop an open standard. This led to the IEEE 1364 Verilog standard being developed and approved in 1995, establishing Verilog as the dominant hardware description language. The standard has since been revised with additional features as Verilog 2001.

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155 views9 pages

Chapter 2 - History of Verilog

Verilog was initially developed privately in 1984 and went through several revisions in the 1980s without standardization. In the early 1990s it was promoted by Cadence and Synopsys, and Cadence formed the Open Verilog International organization to develop an open standard. This led to the IEEE 1364 Verilog standard being developed and approved in 1995, establishing Verilog as the dominant hardware description language. The standard has since been revised with additional features as Verilog 2001.

Uploaded by

Danh ZEUS49
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© © All Rights Reserved
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VERILOG HDL

Chapter 2

History of Verilog
History of Verilog

• Verilog was started initially as a proprietary


hardware modeling language by Gateway
Design Automation Inc. around 1984.
• It is rumored that the original language was
designed by taking features from the most
popular HDL language of the time, called HiLo,
as well as from traditional computer languages
such as C.
• At that time, Verilog was not standardized and
the language modified itself in almost all the
revisions that came out within 1984 to 1990.

2
History of Verilog

• Verilog simulator was first used beginning in


1985 and was extended substantially through
1987.
• The implementation was the Verilog simulator
sold by Gateway.
• The first major extension was Verilog-XL,
which added a few features and implemented
the infamous "XL algorithm" which was a very
efficient method for doing gate-level simulation.

3
History of Verilog
• In 1990, Cadence became the owner of the Verilog
language, and continued to market Verilog as both a
language and a simulator.
• At the same time, Synopsys was marketing the top-down
design methodology, using Verilog. This was a powerful
combination.
• Cadence recognized that if Verilog remained a closed
language, the pressures of standardization would
eventually cause the industry to shift to VHDL.
Consequently, Cadence organized the Open Verilog
International (OVI), and in 1991 gave it the
documentation for the Verilog Hardware Description
Language. This was the event which "opened" the
language.
4
History of Verilog

• OVI did a considerable amount of work to improve the


Language Reference Manual (LRM), clarifying things and
making the language specification as vendor-independent
as possible
• Soon it was realized that if there were too many companies
in the market for Verilog, potentially everybody would like to
do what Gateway had done so far - changing the language
for their own benefit.
• As a result in 1994, the IEEE 1364 working group was
formed to turn the OVI LRM into an IEEE standard. This
effort was concluded with a successful ballot in 1995, and
Verilog became an IEEE standard in December 1995.
5
History of Verilog

• When Cadence gave OVI the LRM, several companies


began working on Verilog simulators.
• In 1992, the first of these were announced, and by
1993 there were several Verilog simulators available
from companies other than Cadence. The most
successful of these was VCS, the Verilog Compiled
Simulator, from Chronologic Simulation.
• This was a true compiler as opposed to an interpreter,
which is what Verilog-XL was. As a result, compile time
was substantial, but simulation execution speed was
much faster

6
History of Verilog

• In the meantime, the popularity of Verilog and


Programming Language Interface (PLI) was rising
exponentially. Verilog as a HDL found more admirers than
well-formed and federally funded VHDL.
• It was only a matter of time before people in OVI realized
the need of a more universally accepted standard.
• Accordingly, the board of directors of OVI requested
Institute of Electrical and Electronics Engineers (IEEE) to
form a working committee for establishing Verilog as an
IEEE standard. The working committee 1364 was formed
in mid 1993 and on October 14, 1993, it had its first
meeting

7
History of Verilog

• The standard, which combined both the Verilog language


syntax and the PLI in a single volume, was passed in May
1995 and now known as IEEE Std. 1364-1995.
• After many years, new features have been added to
Verilog, and the new version is called Verilog 2001. This
version seems to have fixed a lot of problems that Verilog
1995 had. This version is called 1364-2001.

8
The End

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