Lecture 5:

The 80x86 Microprocessor

Dara Rahmati

Microprocessors and Assembly 1

 80x86 Addressing Modes
• The CPU can access operands (data) in various
ways, called addressing modes
• The 80x86 provides a total of 7 distinct
addressing modes:
– register
– immediate
– direct
– register indirect
– based relative
– indexed relative
– based indexed relative

Microprocessors and Assembly 2

 Register Addressing Mode
sarrast tarin rah

• This mode involves

– The use of registers to hold the data
– Memory is not accessed
– It is relatively fast

Microprocessors and Assembly 3

 Immediate Addressing Mode
age machine code ro bbinim mibinim in adad b surate imidiate tu machine code has

• The source operand is a constant

• The operand comes immediately after the
opcode
• Executes quickly
• Except Segment registers and Flag register

Microprocessors and Assembly 4

 Direct Addressing Mode
yani boro bbin tu 2400 hageze chi zakhire shode uno bzr tu DL
hal baste b in k DL chan bite mikhanad masln vase ax chon 2 byte az 2400 shoru mikone 2 byte mirize

• The data is in some memory location(s)

• The address of the data in memory comes
immediately after the opcode

Microprocessors and Assembly 5

 Register Indirect Addressing Mode
aval BX ro negah kon bbin b kojaye hafeze eshare mikone bad mohtaviate un addresso copy kon

• The address of the memory location where

the operand resides is held by a register
• The registers used for this purpose are SI, DI,
and BX

save
mitunes si ya di ba ds jam beshe
load

ds ba 4 sefre hidden b tahesh eshare

mikonee ama kari nadarim chon cpu vaghti
bx migim mifahme tu DS e
Microprocessors and Assembly 6
 Based Relative Addressing Mode
• Base registers BX and BP, as well as a
displacement value, are used to
calculate the effective address

• Alternative codings are

"MOV CX,[BX+10]" or "MOV CX,10[BX]“

• alternative codings are

"MOV AL,[BP+5]" or "MOV AL,5[BP]"

Microprocessors and Assembly 7

 Index Relative Addressing Mode
• Works the same as the based relative
addressing mode, except that registers DI and
SI hold the offset address

Microprocessors and Assembly 8

 Based Indexed Relative Addressing Mode
• By combining based and indexed addressing modes,
a new addressing mode is derived called the based
indexed addressing mode

Microprocessors and Assembly 9

80x86 Addressing Modes:
Default Segment

Microprocessors and Assembly 10

Addressing modes:
Summary

Microprocessors and Assembly 11

8086 ASSEMBLY LANGUAGE
PROGRAMMING

Microprocessors and Assembly 12

 Assembly Language Programs
• A series of statements (lines)
– Assembly language instructions (ADD, MOV, etc.)
• Perform the real work of the program
– Comments
• Indicates the comments from the programmer
– Directives (pseudo-instructions)
• Give instructions for the assembler program about how
to translate the program into machine code

Microprocessors and Assembly 13

 Instruction Format
• [label:] mnemonic [operands] [;comment]
– Brackets indicate that the field is optional
– The label field allows the program to refer to a line of code by
name
• Rules for names: each label must be unique; letters, 0-9, (?), (.), (@),
(_), and ($); first character cannot be a digit; max 31 characters
• “:” is needed if it is an instruction
• Examples
Loop0: ADD AL,BL
MOV AX,6764 ;16 bit operation

• Loop0 is an instruction label

• ADD and MOV are the mnemonic opcodes
• "AL,BL" and "AX,6764" are the operands
• ;16 bit operation is a comment

Microprocessors and Assembly 14

 Comments
• The comment field begins with a";“
• Comments may be at the end of a line or on a
line by themselves.
• The assembler ignores comments, but they
are indispensable to programmers
• Comments are optional but are highly
recommended to make it easier for someone
to read and understand the program

Microprocessors and Assembly 15

 Directives

• Directives are used like instructions but do not

generate any machine code
• They are used only by the assembler as opposed to
instructions
• For example:
– The MODEL directive selects the size of the memory model
• Among the options for the memory model are SMALL, MEDIUM,
COMPACT, and LARGE
MODEL SMALL ;this directive defines the model as small
– The commands DB, END, and ENDP are other examples of
directives

Microprocessors and Assembly 16

 Model Definition
• The MODEL directive selects
the size of the memory
model
– SMALL: code <= 64KB
data <= 64KB
– MEDIUM: data <= 64KB
code > 64KB
– COMPACT:code <= 64KB
data > 64KB
– LARGE: data > 64KB
(single set of data such as array<64KB)
code> 64KB
– HUGE: data > 64KB
code > 64KB
– TINY: code + data < 64KB
Microprocessors and Assembly 17
 Segment definition
• The 80x86 CPU has four segment registers:
– CS (code segment)
– DS (data segment)
– SS (stack segment)
– ES (extra segment)
• The simplified segment definition format uses three
simple directives:
• ".CODE", ".DATA'', and ".STACK'', which correspond to
the CS, DS, and SS registers
.STACK ;marks the beginning of the stack segment
.DATA ;marks the beginning of the data segment
.CODE ;marks the beginning of the code segment

Microprocessors and Assembly 18

 Example of an Assembly Program
• Full segment definition
– See an example later
• Simple segment definition

64 byte b onvane stack ghabele estefade ast

Microprocessors and Assembly 19

 Segments, All at a Glance
• Stack segment
• Data segment
– Data definition
• Code segment
– Write your statements
– Procedures definition
label PROC [FAR|NEAR]
label ENDP
– Entrance proc should be FAR

Note: On program start, the OS

assigns CS and SS, the program must
initialize DS.

Microprocessors and Assembly 20

 Simplified Segment Definition
• Simplified segment definition
– .CODE, .DATA, .STACK
– Only three segments can be defined
– Automatically correspond to the CPU’s CS, DS, SS

mostaghimn b ds nmishe immidiate

dad vase hami aval rikhte ru ax

Microprocessors and Assembly 21

Sample Shell of an Assembly Program

Microprocessors and Assembly 22

 Full Segment Definition
• Full segment definition
label SEGMENT
label ENDS
– You name those labels
– as many as needed
– DOS assigns CS, SS
– Program assigns DS (manually
load data segments) and ES

Microprocessors and Assembly 23

 Program Execution
• Program starts from the
entrance
– Ends whenever calls 21H
interruption with AH = 4CH
• Procedure caller and callee
– CALL procedure
– RET

Microprocessors and Assembly 24

 Build up Your Program
• .asm: the source file
• .obj: object file created by
assembler
• .lst: lists opcodes, offset
addresses and detected
errors
• .crf: cross reference file lists
references and lables and
their addresses
• .map: name of the
segments, their address and
size

Microprocessors and Assembly 25

List (.LST) file sample

Microprocessors and Assembly 26

MAP file sample

Microprocessors and Assembly 27

 Control Transfer Instructions
• Range
– SHORT, intrasegment
• IP changed: one-byte range (within -128 to + 127 bytes of
the IP)
– Near, intrasegment
• IP changed: two-bytes range
• If control is transferred within the same code segment
– FAR, intersegment
• CS and IP all changed
• If control is transferred outside the current code segment
• Jumps
• CALL statement
Microprocessors and Assembly 28
 Conditional Jumps
• Jump according to the value of the flag
register
• All Conditional
jumps are Short
• Example:

Note: If label displacement out of -128,+127, the assembler

generates "relative jump out of range" message 29
Microprocessors and Assembly
 Unconditional Jumps
• JMP [SHORT|NEAR|FAR PTR] label
• Near by default
• Short:
– JMP SHORT label
• Near:
– JMP [Near] label (Direct, disp. between -32768,32767)
– JMP BX (Register Indirect)
– JMP [DI] (Memory indirect)
• FAR
– JMP FAR PTR label (both IP and CS should change)

Microprocessors and Assembly 30

 end

Microprocessors and Assembly 31