Lesson 4

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Lesson 2: MOS electrostatics

2.1 The MOS Capacitor in thermal Equilibrium

Figure 2.20 MOS transistor cross section

 Since the oxide is a near-perfect insulator, the gate and the bulk metal
layers are shorted to enable the charge exchange needed to reach
equilibrium.
 For the pn junction, VD = 0V is also necessary condition for equilibrium.
 The boundary condition on the potential in the silicon, far from the oxide,
is
𝑵𝒂
𝝓𝒑 𝑽𝒕𝒉
𝒏𝒊
 The electric field E0 is positive (points from gate to bulk). Therefore, a
positive charge must be present on the bottom of the polysilicon gate and
there must be a balancing negative charge in th ep-type silicon underlying
the gate oxide.
 The oxide is assumed to be a charge-free prefect insulator.

Figure 2.21 Qualitative picture of charge distribution in a MOS capacitor with p-


type substrate in thermal equilibrium.
 As with the pn junction, there is a charged store on the MOS capacitor in
thermal equilibrium.
 The potential drop across the capacitor is divided into the sum of the drop
across the oxide Vox,0 and the drop across the depletion region VB0
𝝓𝒏 𝝓𝒑 𝑽𝒐𝒙,𝟎 𝑽𝑩𝟎
 The potential at x = 0 (on the SiO2-silicon interface) is defined as the
thermal equilibrium surface potential, φS0.

2.2 MOS Capacitor under Applied Bias


 The effect of the gate charge of an applied voltage VGB is rather
complicated. Thus, a voltage I applied that is equal and opposite to the
“built-in” potential across the MOS capacitor in thermal equilibrium. This
is defined as the flatband voltage, VFB:
𝐕𝐅𝐁 𝛟𝐧 𝛟𝐩
 Therefore, there is no internal potential drop across the MOS capacitor
when VGB = VFB and as a result, the gate charge is zero:
𝑸𝑮 𝑽𝑮𝑩 𝑽𝑭𝑩 = 0

 If the applied voltage is more negative than the flatband voltage, VGB < VFB,
then the gate potential drops below that of the substrate. The gate charge
then becomes negative and the nature of the charge in the substrate
changes.
 The MOS capacitor is said to be in accumulation for VGB < VFB.

Figure 2.22 Charge distribution in a MOS capacitor biased into accumulation.

 The gate charge in accumulation is linearly related to the difference


between the applied voltage and the flatband voltage
𝑸𝑮 𝑪𝒐𝒙 𝑽𝑮𝑩 𝑽𝑭𝑩 𝒇𝒐𝒓 𝑽𝑮𝑩 𝑽𝑭𝑩

where Cox = εox/tox is the capacitance per unit area


tox is the gate oxide thickness
 No consider an applied voltage VGB > VFB and since VGB = 0 > VFB.
 The gate charge is positive and increases with increasing applied bias
𝑸𝑮 𝑽𝑮𝑩 𝑸𝑩 𝒒𝑵𝒂 𝑿𝒅 𝒒𝑵𝒂 𝑿𝒅 𝑽𝑮𝑩
 The MOS capacitor is said to be in depletion for VGB > VFB.

Figure 2.23 MOS capacitor biased into depletion

 If the gate-bulk voltage (VGB) is increased further, the surface potential will
continue to rise and eventually, there will be a significant electron
concentration at the surface.
 When the surface potential becomes equal and opposite to the potential of
the substrate, the substrate is considered inverted.
𝜙 𝜙
 The surface electron concentration at the onset of inversion is

𝑛 𝑛𝑒 𝑛𝑒 𝑁

 The surface electron concentration is equal to the hole concentration in


the undepleted p-type substrate, when the surface has just inverted.
 The applied voltage at which the surface inverts is called the threshold
voltage VTn (the n refers to the n-type surface after inversion)
𝟏
𝑽𝑻𝒏 𝑽𝑭𝑩 𝟐𝝓𝒑 𝟐𝒒𝜺𝒔 𝑵𝒅 𝟐𝝓𝒑
𝑪𝒐𝒙
 The surface potential is φs = -φp, which means that the bulk voltage VB has
reached its maximum value
𝑽𝑩 𝑽𝑩,𝒎𝒂𝒙 𝝓𝒔,𝒎𝒂𝒙 𝝓𝒑 𝛟𝒑 𝝓𝒑 𝟐𝝓𝒑
 The oxide voltage is
𝑽𝒐𝒙 𝑽𝑮𝑩 𝝓𝒏 𝝓𝒔 𝑽𝑮𝑩 𝝓𝒏 𝝓𝒔 𝒇𝒐𝒓 𝑽𝑮𝑩 𝑽𝑻𝒏
 The gate balances the bulk charge QB,max in the depletion region and the
electron charge QN in the surface inversion layer
𝑸𝑮 𝑽𝑮𝑩 𝑸𝑵 𝑸𝑩,𝒎𝒂𝒙 𝒇𝒐𝒓 𝑽𝑮𝑩 𝑽𝑻𝒏

 For VGB = VTn, we consider that the electron charge QN = 0 since the MOS
capacitor is at the onset of inversion, which implies that
𝑸𝑮 𝑽𝑻𝒏 𝑸𝑩,𝒎𝒂𝒙
 The gate charge in inversion is
𝑸𝑮 𝑽𝑮𝑩 𝑪𝒐𝒙 𝑽𝑮𝑩 𝑽𝑻𝒏 𝑸𝑩,𝒎𝒂𝒙

 In summary, the MOS is said to be in:


o Surface accumulation when (VGB < VFB)
𝑵𝑨
𝝓𝒔 𝝓𝑭 𝟐𝟔𝒎𝑽 𝐥𝐧
𝒏𝒊
𝟐𝜺𝒔𝒊 𝝓𝑭
𝒙𝒅
𝒒𝑵𝑨

𝜙 is the Fermi potential

o Surface Depletion when (VTn > VGB > VFB)


o Surface inversion when (VGB > VTn)

If a reverse-bias voltage vBS is applied then: 𝑄 2𝑞𝜀 𝑁 | 2𝜙 𝑣 |


2.3 MOS Capacitor on an n-type substrate

Figure 2.24 MOS capacitor with n-type substrate.


 In thermal equilibrium, the flatband voltage is
𝝓𝒏 𝝓𝒏 𝑽𝑭𝑩

 The gate charge in the accumulation region is


𝑸𝑮 𝑪𝒐𝒙 𝑽𝑮𝑩 𝑽𝑭𝑩 𝒇𝒐𝒓 𝑽𝑮𝑩 𝑽𝑭𝑩
 The threshold voltage is
𝟏
𝑽𝑻𝒑 𝑽𝑭𝑩 𝟐𝝓𝒏 𝟐𝒒𝜺𝒔 𝑵𝒅 𝟐𝝓𝒏
𝑪𝒐𝒙

 The maximum depletion charge is


𝑸𝑮 𝑸𝒑 𝑸𝑩,𝒎𝒂𝒙 𝑪𝒐𝒙 𝑽𝑮𝑩 𝑽𝑻𝒑 𝑸𝑩,𝒎𝒂𝒙 𝒇𝒐𝒓 𝑽𝑮𝑩 𝑽𝑻𝒑

Example 2.9
Consider a MOS capacitor with tox = 200 Ǻ on a p-type substrate with acceptor
concentration Na = 5x1016 cm-3. Assuming the maximum possible potential for
silicon in thermal equilibrium is 𝜙 550 𝑚𝑉 (a) Find the electric field in the
oxide and the charge per unit area in the silicon substrate for VGB = -2.5 V. (b)
Find the depletion width and depletion charge when the capacitor is biased in
the inversion region. (c) Find the electric field in the oxide and the inversion-
layer electron charge for VGB = 2.5 V. (d) Find the permissible range of gate-bulk
voltages for electric field of 5x106 V/cm.

Solution 2.9
(a) Determine whether the capacitor is in the accumulation, depletion, or
inversion regions.
𝑽𝑭𝑩 𝝓𝒏 𝝓𝒑 𝟓𝟓𝟎 𝟑𝟗𝟎 𝒎𝑽 𝟗𝟒𝟎 𝒎𝑽
𝟏
𝑽𝑻𝒏 𝑽𝑭𝑩 𝟐𝝓𝒑 𝟐𝒒𝜺𝒔 𝑵𝒅 𝟐𝝓𝒑
𝑪𝒐𝒙
𝟏 𝟏. 𝟎𝟒𝒙𝟏𝟎 𝟏𝟐 𝑭
𝑽𝑻𝒏 𝟗𝟒𝟎𝒎𝑽 𝟐 𝟒𝟒𝟎𝒎𝑽 𝟐 𝟏. 𝟔𝒙𝟏𝟎 𝟏𝟗 𝑪 𝟓𝒙𝟏𝟎𝟏𝟔 𝒄𝒎 𝟑 𝟐 𝟒𝟒𝟎𝒎𝑽 𝟔𝟒𝟎 𝒎𝑽
𝟏. 𝟕𝟑𝒙𝟏𝟎 𝟕 𝑭 𝒄𝒎
𝒄𝒎𝟐

Since VGB = -2.5 V < VFB = -0.95 V the p-type substate is in accumulation
region.
The electric field is
𝑽𝒐𝒙 𝑽𝑮𝑩 𝝓𝒏 𝝓𝒑 𝟐. 𝟓 𝟎. 𝟓𝟓 . 𝟒𝟒
𝑬𝒐𝒙 𝟔
𝟕𝟓𝟓 𝒌𝑽/𝒄𝒎
𝒕𝒐𝒙 𝒕𝒐𝒙 𝟐𝒙𝟏𝟎 𝒄𝒎
The charge is
𝟏. 𝟕𝟑𝒙𝟏𝟎 𝟕 𝑭 𝟐. 𝟔𝟗𝒙𝟏𝟎 𝟕 𝑪
𝑸𝒑 𝑸𝑮 𝑪𝒐𝒙 𝑽𝑮𝑩 𝑽𝑭𝑩 𝟐. 𝟓 . 𝟗𝟒𝟎
𝒄𝒎𝟐 𝒄𝒎𝟐

(b) In inversion, the potential drop across the depletion region is


𝑽𝑩,𝒎𝒂𝒙 𝝓𝒔 𝝓𝒑 𝝓𝒑 𝝓𝒑 𝟐 𝟒𝟒𝟎𝒎𝑽 𝟖𝟖𝟎 𝒎𝑽

The relationship between the depletion region width and the potential drop
is
𝟏 𝝆𝟎 𝟐 𝟏 𝒒𝑵𝒂 𝟐
𝑽𝑩,𝒎𝒂𝒙 𝑿 𝑿𝒅𝒎𝒂𝒙
𝟐 𝜺𝒔 𝒅 𝟐 𝜺𝒔
𝟐𝜺𝒔 𝑽𝑩,𝒎𝒂𝒙 𝟐 𝟏𝟏. 𝟕 𝟖. 𝟖𝟓𝟒𝒙𝟏𝟎 𝟏𝟒 𝟎. 𝟖𝟖
𝑿𝒅,𝒎𝒂𝒙 𝟏𝟓𝟎𝟗. 𝟔 𝑨
𝒒𝑵𝒂 𝟏. 𝟔𝒙𝟏𝟎 𝟏𝟗 𝟓𝒙𝟏𝟎𝟏𝟔

(c) Since VGB = 2.5 > VTn = 0.64V, the capacitor is in inversion region. The
electric field is
𝟐. 𝟓 𝟎. 𝟓𝟓 𝟎. 𝟒𝟒
𝑬𝒐𝒙 𝟏𝟑𝟎𝟓 𝒌𝑽/𝒄𝒎
𝟐𝒙𝟏𝟎 𝟔 𝒄𝒎
Using Gauss’ Law, we can relate the electric field in the oxide to the
substrate charge
𝑸𝑩,𝒎𝒂𝒙 𝑸𝑵
𝑬𝒐𝒙
𝜺𝒐𝒙
Solving for the inversion layer charge
𝑸𝑵 𝜺𝒐𝒙 𝑬𝒐𝒙 𝑸𝑩,𝒎𝒂𝒙 𝟒. 𝟓𝟏𝒙𝟏𝟎 𝟕 𝟏. 𝟐𝟏𝒙𝟏𝟎 𝟕 𝟑. 𝟑𝒙𝟏𝟎 𝟕 𝑪/𝒄𝒎𝟐

(d) In accumulation the electric field in the oxide is


𝑽𝒐𝒙 𝑽𝑮𝑩 𝝓𝒏 𝝓𝒑
𝑬𝒐𝒙
𝒕𝒐𝒙 𝒕𝒐𝒙
Solving for the most negative gate-bulk voltage using -5x106 V/cm
𝑽𝑮𝑩,𝒎𝒊𝒏 𝑬𝒐𝒙 𝒕𝒐𝒙 𝝓𝒏 𝝓𝒑 𝟓𝒙𝟏𝟎𝟔 𝟐𝒙𝟏𝟎 𝟔 𝟎. 𝟓𝟓 𝟎. 𝟒𝟒 𝟏𝟎. 𝟗𝟗 𝑽
In inversion, the electric field in the oxide is
𝑽𝒐𝒙 𝑽𝑮𝑩 𝝓𝒏 𝝓𝒑
𝑬𝒐𝒙
𝒕𝒐𝒙 𝒕𝒐𝒙
𝑽𝑮𝑩,𝒎𝒂𝒙 𝑬𝒐𝒙 𝒕𝒐𝒙 𝝓𝒏 𝝓𝒑 𝟓𝒙𝟏𝟎 𝟐𝒙𝟏𝟎 𝟔
𝟔
𝟎. 𝟓𝟓 𝟎. 𝟒𝟒 𝟗. 𝟎𝟏 𝑽

2.4 MOS Electrostatics in Thermal Equilibrium


 The bulk charge QB0 in the depletion region must be equal in magnitude
and opposite in sign to the gate charge
𝑸𝑩𝟎 𝒒𝑵𝒂 𝑿𝒅𝟎 𝑸𝑮𝟎
 The boundary condition on electric field
𝜺𝒐𝒔 𝑬𝟎 𝒙 𝟎 𝜺 𝒔 𝑬𝟎 𝒙 𝟎

Figure 2.25 MOS capacitor with p-substrate with the charge distribution
 Applying KCL to the MOS capacitor in Figure 2.25
𝝓𝒎𝒏 𝑽𝒐𝒙,𝟎 𝑽𝑩𝟎 𝝓𝒑𝒎 𝟎
𝑽𝒐𝒙,𝟎 𝑽𝑩𝟎 𝝓𝒎𝒏 𝝓𝒑𝒎
 For the MOS capacitor, the internal potential drop is known to be the
difference in the thermal equilibrium potentials of the n+ gate and the p-
type bulk:
𝑽𝒐𝒙,𝟎 𝑽𝑩𝟎 𝝓𝒏 𝝓𝒑

 Thus, the sum of the contact potentials is equal to the difference in the
potentials of the gate and the bulk
𝝓𝒏 𝝓𝒑 𝝓𝒎𝒏 𝝓𝒑𝒎
 We can also get the drop across the diode
𝒒𝑵𝒂 𝑿𝒅𝟎 𝑸𝑮𝟎
𝑽𝒐𝒙,𝟎 𝝓𝒏 𝝓𝟎 𝟎
𝑪𝒐𝒙 𝑪𝒐𝒙

 The thermal equilibrium built0in potential across the polysilicon-oxide-


silicon sandwich
𝒒𝑵𝒂 𝑿𝟐𝒅𝟎 𝒒𝑵𝒂 𝑿𝟐𝒅𝟎
𝝓𝒏 𝝓𝒑
𝑪𝒐𝒙 𝟐𝜺𝒔
From here we can find the width of the depletion region
𝜺𝒔 𝟐𝑪𝟐𝒐𝒙 𝝓𝒏 𝝓𝒑
𝑿𝒅𝟎 𝒕𝒐𝒙 𝟏 𝟏
𝜺𝒐𝒙 𝒒𝜺𝒔 𝑵𝒂
Thus, the thermal equilibrium surface potential is
𝒒𝑵𝒂 𝑿𝒅𝟎
𝝓𝒔𝟎 𝝓𝟎 𝒙 𝟎 𝝓𝒏
𝑪𝒐𝒙

2.5 MOS Electrostatics under Applied Bias


 The built-in voltage drops across the MOS capacitor, 𝜙 𝜙 , has setup
electric field that have affected the electrical properties of the silicon
underlying the gate oxide. This is known as the field effect, controllable
through an applied voltage.

Figure 2.26 p-type MOS capacitor under bias


 Flatband
o The contact potential is unchanged by the applied bias.
 Accumulation
o The surface potential is pulled lower, due to the surface hole
concentration, ps, exceeding the bulk doping concentration:
𝒑𝒔 𝑵𝑮
𝝓𝒔 𝑽𝒕𝒉 𝐥𝐧 𝑽𝒕𝒉 𝐥𝐧
𝒏𝒊 𝒏𝒊
o However, the logarithmic function is weak, and it is a reasonable
approximation that 𝜙 𝜙 in accumulation.
 The threshold voltage
o The onset of inversion is defined to be when the surface potential is
equal and opposite to the potential of the bulk p-type substrate
𝝓𝒔 𝝓𝒑
o The potential drop across the depletion region is
𝑽𝑩 𝝓𝒔 𝝓𝒑 𝟐𝝓𝒑
o Integration of the constant charge density in the depletion region
leads to
𝟐𝒒𝑵𝒂 𝟐
𝑽𝑩 𝑿𝒅,𝒎𝒂𝒙 𝟐𝝓𝒑
𝟐𝜺𝒔
o The charge density in the region at the onset of inversion
𝑸𝑩,𝒎𝒂𝒙 𝒒𝑵𝒂 𝑿𝒅,𝒎𝒂𝒙 𝟐𝒒𝜺𝒔 𝑵𝒂 𝟐𝝓𝒑
o The threshold voltage for p-type substrate
𝟏
𝑽𝑻𝒏 𝑽𝑭𝑩 𝟐𝝓𝒑 𝟐𝒒𝜺𝒔 𝑵𝒅 𝟐𝝓𝒑
𝑪𝒐𝒙
 Inversion
o Using the delta-depletion approximation
𝝓𝒔 𝝓𝒔 𝝓𝒑 𝒇𝒐𝒓 𝑽𝑮𝑩 𝑽𝑻𝒏
o The surface potential is sad to be pinned at 𝝓𝒑 in inversion.
o The inversion layer charge is
𝑸𝑩,𝒎𝒂𝒙
𝑸𝑵 𝑪𝒐𝒙 𝑽𝑮𝑩 𝑽𝑭𝑩 𝟐𝝓𝒑 𝑪𝒐𝒙 𝑽𝑮𝑩 𝑽𝑻𝒏 𝒇𝒐𝒓 𝑽𝑮𝑩 𝑽𝑻𝒏
𝑪𝒐𝒙

 The gate charge as a function of the applied gate-bulk bias in


accumulation, depletion, and inversion
𝑸𝑮 𝑪𝒐𝒙 𝑽𝑮𝑩 𝑽𝑭𝑩 𝒇𝒐𝒓 𝑽𝑮𝑩 𝑽𝑭𝑩

𝒒𝜺𝒔 𝑵𝒂 𝟐𝑪𝟐𝒐𝒙 𝑽𝑮𝑩 𝑽𝑭𝑩


𝑸𝑮 𝑸𝑩 𝑽𝑮𝑩 𝟏 𝟏 𝒇𝒐𝒓 𝑽𝑭𝑩 𝑽𝑮𝑩 𝑽𝑻𝒏
𝑪𝒐𝒙 𝒒𝜺𝒔 𝑵𝒂

𝒒𝜺𝒔 𝑵𝒂 𝟐𝑪𝟐𝒐𝒙 𝑽𝑮𝑩 𝑽𝑭𝑩


𝑸𝑮 𝑪𝒐𝒙 𝑽𝑮𝑩 𝑽𝑻𝒏 𝟏 𝟏 𝒇𝒐𝒓 𝑽𝑮𝑩 𝑽𝑻𝒏
𝑪𝒐𝒙 𝒒𝜺𝒔 𝑵𝒂
Example 2.10
Given a MOS capacitor on an n-type substrate with an n+ poly gate (φn+ = 550
mV, a donor concentration Nd = 1016 cm-3, and oxide thickness tox = 500 Ǻ. The
contact potential s have values = φmn+ = -400mV anf φnm = 220 mV. (a) Find the
flatband voltage. (b) Find the threshold voltage.

Solution 2.10
(a)
Type equation here.
𝑽𝑭𝑩 𝝓𝒏 𝝓𝒏 𝟓𝟓𝟎 𝒎𝑽 𝟑𝟒𝟕 𝒎𝑽 𝟐𝟎𝟏 𝒎𝑽
(b)
𝟏
𝑽𝑻𝒑 𝑽𝑭𝑩 𝟐𝝓𝒏 𝟐𝒒𝜺𝒔 𝑵𝒅 𝟐𝝓𝒏
𝑪𝒐𝒙

𝟒. 𝟕𝟗𝟔𝟒𝒙𝟏𝟎 𝟖 𝑪
𝑽𝑻𝒑 𝟐𝟎𝟏 𝒎𝑽 𝟔𝟗𝟒 𝒎𝑽 𝒄𝒎𝟐 𝟏. 𝟓𝟗𝑽
𝑭
𝟔. 𝟗𝟏𝒙𝟏𝟎 𝟖
𝒄𝒎

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