Ch 02: Programming with 8085

microprocessor

Er. Hari K.C.

Department of Electronics and Computer Engineering
Pashchimanchal Campus , IOE, TU
8085 microprocessor
• The Intel 8085 A is a complete 8 bit parallel central processing unit.
• It is an 8-bit microprocessor i.e. it can accept, process, or provide 8-bit
data simultaneously.
• It operates on a single +5V power supply connected at Vcc; power supply
ground is connected to Vss.
• It operates on clock cycle with 50% duty cycle.
• It has on chip clock generator. This internal clock generator requires tuned
circuit like LC, RC or crystal. The internal clock generator divides oscillator
frequency by 2 and generates clock signal, which can be used for
synchronizing external devices.
• It can operate with a 3 MHz clock frequency. The 8085A-2 version can
operate at the maximum frequency of 5 MHz.
• It has 16 address lines, hence it can access (216) 64 Kbytes of memory.
• It provides 8 bit I/O addresses to access (28 ) 256 I/O ports.
• In 8085, the lower 8-bit address bus (A0 – A7) and data bus (D0 – D7)
are Multiplexed to reduce number of external pins. But due to this,
external hardware (latch) is required to separate address lines and
data lines.
• It supports 74 instructions with the following addressing modes :
Immediate
Register
Direct
Indirect
Implied
• The Arithmetic Logic Unit (ALU) of 8085 performs :
8 bit binary addition with or without carry
16 bit binary addition
2 digit BCD addition.
8-bit binary subtraction with or without borrow
8-bit logical AND, OR, EX-OR, complement (NOT), and bit shift operations.
• It has 8-bit accumulator, flag register, instruction register, six 8-bit general
purpose registers (B, C, D, E, H and L) and two 16-bit registers. (SP and PC).
• Getting the operand from the general purpose registers is more faster than
from memory.
• Hence skilled programmers always prefer general purpose registers to store
program variables than memory.
• It provides five hardware interrupts : TRAP, RST 7.5, RST 6.5, RST 5.5 and
INTR.
• It has serial I/O control which allows serial communication.
• It provides control signals (IO/M, RD, WR) to control the bus cycles, and
hence external bus controller is not required.
• The external hardware (another microprocessor or equivalent master) can
detect which machine cycle microprocessor is executing using status
signals (IO/M, S0, S1). This Features of 8085 Microprocessor is very useful
when more than one processors are using common system resources
(memory and I/O devices).
• It has a mechanism by which it is possible to increase its interrupt handling
capacity.
• The 8085 has an ability to share system bus with Direct Memory Access
controller. This Features of 8085 Microprocessor allows to transfer large
amount of data from I/O device to memory or from memory to I/O device
with high speeds.
Pin diagram and signals of 8085 microprocessor
1. Address Bus and Data Bus:
• The address bus is a group of sixteen lines
i.e. A0-A15.
• The address bus is unidirectional,
i.e., bits flow in one direction from the microprocessor unit to the
peripheral devices and uses the high order address bus.
2. Control and Status Signals:
• ALE – It is an Address Latch Enable signal. It goes high during first T state of a machine cycle and
enables the lower 8-bits of the address, if its value is 1 otherwise data bus is activated.
• IO/M’ – It is a status signal which determines whether the address is for input-output or memory.
When it is high(1) the address on the address bus is for input-output devices. When it is low(0) the
address on the address bus is for the memory.
• SO, S1 – These are status signals.
They distinguish the various types of operations such as halt, reading, instruction fetching or
writing.
• RD’ – It is a signal to control READ operation. When it is low the selected memory or input-output
device is read.
• WR’ – It is a signal to control WRITE operation. When it goes low the data on the data bus is
written into the selected memory or I/O location.
• READY – It senses whether a peripheral is ready to transfer data or not. If READY is high(1) the
peripheral is ready. If it is low(0) the microprocessor waits till it goes high. It is useful for
interfacing low speed devices.
3. Power Supply and Clock Frequency:
• Vcc – +5v power supply
• Vss – Ground Reference
• XI, X2 – A crystal is connected at these two pins. The frequency is
internally divided by two, therefore, to operate a system at 3MHZ the
crystal should have frequency of 6MHZ.
• CLK (OUT) – This signal can be used as the system clock for other
devices.
4. Interrupts and Peripheral Initiated Signals:
• The 8085 has five interrupt signals that can be used to interrupt a program
execution.
i)INTR
(ii) RST 7.5
(iii) RST 6.5
(iv) RST 5.5
(v) TRAP
• The microprocessor acknowledges Interrupt Request by INTA’ signal. In
addition to Interrupts, there are three externally initiated signals namely
RESET, HOLD and READY. To respond to HOLD request, it has one signal
called HLDA.
• INTR – It is an interrupt request signal.
• INTA’ – It is an interrupt acknowledgment sent by the microprocessor after
INTR is received.
5. Reset Signals:
• RESET IN’ – When the signal on this pin is low(0), the program-
counter is set to zero, the buses are tristated and the microprocessor
unit is reset.
• RESET OUT – This signal indicates that the MPU is being reset.
The signal can be used to reset other devices.
6. DMA Signals:
• HOLD – It indicates that another device is requesting the use of the
address and data bus.
Having received HOLD request the microprocessor relinquishes the use
of the buses as soon as the current machine cycle is completed.
Internal processing may continue. After the removal of the HOLD
signal the processor regains the bus.
• HLDA – It is a signal which indicates that the hold request has been
received after the removal of a HOLD request, the HLDA goes low.
7. Serial I/O Ports:
• Serial transmission in 8085 is implemented by the two signals,
• SID and SOD – SID is a data line for serial input where as SOD is a data
line for serial output.
Internal Architecture of 8 bit microprocessor
Arithmetic and Logical Unit
• The arithmetic logic unit performs the computing functions,
• it includes the accumulator, the temporary register, the arithmetic
and logic circuits and five flags.
• The temporary register is used to hold data during an arithmetic/logic
operation.
• The result is stored in the accumulator; the flags (flip-flops) are set or
reset according to the result of the operation.
Accumulator (register A)

• It is an 8 bit register that is the part of ALU.

• This register is used to store the 8-bit data and to perform arithmetic
and logic operations and 8085 microprocessor is called accumulator
based microprocessor.
• When data is read from input port, it first moved to accumulator and
when data is sent to output port, it must be first placed in
accumulator.
• Temporary registers(W & Z): They are 8 bit registers not accessible to the
programmer.
During program execution, 8085A places the data into it for a brief period.
• Instruction register(IR): It is a 8 bit register not accessible to the
programmer.
It receives the operation codes of instruction from internal data bus and
passes to the instruction decoder which decodes so that microprocessor
knows which type of operation is to be performed.
• Register Array: (Scratch pad registers B, C, D, E): It is a 8 bit register
accessible to the programmers.
Data can be stored upon it during program execution. These can be used
individually as 8-bit registers or in pair BC, DE as 16 bit registers.
The data can be directly added or transferred from one to another.
Their contents may be incremented or decremented and combined logically
with the content of the accumulator.
• Register H & L: - They are 8 bit registers that can be used in same
manner as scratch pad registers.
• Stack Pointer (SP): - It is a 16 bit register used as a memory pointer.
It points to a memory location in R/W memory, called the stack.
The beginning of the stack is defined by loading a 16- bit address in the
stack pointer.
• Program Counter (PC): - Microprocessor uses the PC register to
sequence the execution of the instructions.
The function of PC is to point to the memory address from which the
next byte is to be fetched.
When a byte is being fetched, the PC is incremented by one to point to
the next memory location.
Flags

• Register consists of five flip flops, each holding the status of different states separately is known
as flag register and each flip flop are called flags.

• 8085A can set or reset one or more of the flags and are sign(S), Zero (Z), Auxiliary Carry (AC)
and Parity (P) and Carry (CY).

• The state of flags indicates the result of arithmetic and logical operations, which in turn can be
used for decision making processes.
• Carry: - If the last operation generates a carry its status will 1
otherwise 0. It can handle the carry or borrow from one word to
another.
• Zero: - If the result of last operation is zero, its status will be 1
otherwise o. It is often used in loop control and in searching for
particular data value.
• Sign: - If the most significant bit (MSB) of the result of the last
operation is 1 (negative), then its status will be 1 otherwise 0.
• Parity: - If the result of the last operation has even number of s
even parity), its status will be 1 otherwise 0.
• Auxiliary carry: - If the last operation generates a carry from the
lower half word (lower nibble), its status will be 1 otherwise 0. Used
for performing BCD arithmetic.
Example 1
MVI A 30 (load 30H in register A) 00110000
MVI B 40 (load 40H in register B). - 01000000
SUB B (A = A – B) = 11000000. with borrow 1
These set of instructions will set the sign flag to 1 as 30 – 40 is a
negative number.
Example 2
MVI A 40 (load 40H in register A)
MVI B 30 (load 30H in register B)
SUB B (A = A – B)
These set of instructions will reset the sign flag to 0 as 40 – 30 is a
positive number.
Example 3

MVI A 10 (load 10H in register A)

SUB A (A = A – A)
These set of instructions will set the zero flag to 1 as 10H – 10H is 00H
Example 4
MOV A 2B (load 2BH in register A)
MOV B 39 (load 39H in register B)
ADD B (A = A + B)
These set of instructions will set the auxiliary carry flag to 1, as on
adding 2B and 39, addition of lower order nibbles B and 9 will generate
a carry.
Example 5
MVI A 05 (load 05H in register A)
This instruction will set the parity flag to 1 as the BCD code of 05H is
00000101, which contains even number of ones i.e. 2.
Example 6
MVI A 30 (load 30H in register A)
MVI B 40 (load 40H in register B)
SUB B (A = A – B)
These set of instructions will set the carry flag to 1 as 30 – 40 generates a
carry/borrow.
Example 7
MVI A 40 (load 40H in register A)
MVI B 30 (load 30H in register B)
SUB B (A = A – B)
These set of instructions will reset the sign flag to 0 as 40 – 30 does not
generate any carry/borrow.
Timing and Control Unit:

• This unit synchronizes all the microprocessor operations with the

clock
• And generates the control signals necessary for communication
between the microprocessor and peripherals.
• The control signals are similar to the sync pulse in an oscilloscope.
• The RD’ and WR’ are sync pulses indicating the availability of data on
data bus.
• Interrupt controls:
The various interrupt controls signals (INTR, RST 5.5, RST 6.5, RST 7.5
and TRAP) are used to interrupt a microprocessor.
• Serial I/O controls: Two serial I/O control signals (SID and SOD) are
used to implement the serial data transmission.
Instructions in 8085 microprocessor
• The computer can be used to perform a specific task, only by specifying the
necessary steps to complete the task
• The collection of such ordered steps forms a program of a computer These
ordered steps are the instructions .
So, Instruction are the command given to the processor to perform the
specified task.
• Computer instructions are stored in central memory locations and are
executed sequentially one at a time.
• The control reads an instruction from a specific address in memory and
executes it.
• It then continues by reading the next instruction in sequence and executes
it until the completion of the program.
Instruction cycle
• Instruction contains in the program and is pointed by the program
counter.
• It is first moved to the instruction register and is decoded in binary
form and stored as an instruction in the memory.
• The computer takes a certain period to complete this task i.e.,
instruction fetching, decoding and executing on the basis of clock
speed.
• Such a time period is called Instruction cycle and consists three cycles
namely fetch and decode and Execute cycle
• In the fetch cycle the central processing unit obtains the instruction
code the memory for its execution.
• Once the instruction code is fetched from memory, it is then
executed.
• The execution cycle consists the calculating the address of the
operands, fetching them, performing operations on them and finally
outputting the result to a specified location.
Instruction description and format
• An instruction manipulates the data and a sequence of instructions
constitutes a program.
• Generally each instruction has two parts: one is the task to be
performed, called the operation code (Op-Code) field, and the
second is the data to be operated on, called the operand or address
field.
• The operand (or data) can be specified in various ways. It may include
8-bit (or 16-bit) data, an internal register, a memory location, or an 8-
bit (or 16-bit) address.
• The Op-Code field specifies how data is to be manipulated and
address field indicates the address of a data item.
For example:

ADD R1, R0 Op-code address

• Here R0 is the source register and R1 is the destination register. The
instruction adds the contents of R0 with the content of R1 and stores
result in R1.
• 8085 A can handle at the maximum of 256 instructions (28)(246
instructions are used) . The sheet which contains all these instructions
with their hex code, mnemonics, descriptions and function is called
an instruction sheet.
• Depending on the number of address specified in instruction sheet,
the instruction format can be classified into the categories.
Instruction format in 8085
• One address format (1 byte instruction): Here 1 byte will be Op-code
and operand will be default. E.g. ADD B, MOV A,B
• Two address format (2 byte instruction) :Here first byte will be Op-
code and second byte will be the operand/data.
E.g. IN 40H, MVI A, 8-bit Data
• Three address format (3 byte instruction): Here first byte will be Op-
code, second and third byte will be operands/data. That is 2nd byte-
lower order data.
3rd byte higher order data E.g. LXI B, 4050 H
• Micro operation specifies the transfer of data into or out of a register.
Instruction Set/ Group in 8085 microprocessor
• An instruction is a binary pattern designed inside a microprocessor to perform a
specific function (task).
• The entire group of instructions(74 types, 256 instructions) called the instruction set.
The 8085 instruction set can be classified in to 5- different groups.
• Data transfer group: The instructions which are used to transfer data from one
register to another register or register to memory.
• Arithmetic group: The instructions which perform arithmetic operations such as
addition, subtraction, increment, decrement etc.
• Logical group: The instructions which perform logical operations such as AND, OR,
XOR, COMPARE etc.
• Branching group: The instructions which are used for looping and branching are
called branching instructions like jump, call etc.
• Miscellaneous group: The instructions relating to stack operation, controlling
purposes such as interrupt operations are fall under miscellaneous group including
machine control like HLT, NOP.
Data transfer group instructions:

• It is the longest group of instructions in 8085.

• This group of instruction copy data from a source location to
destination location without modifying the contents of the source.
• The transfer of data may be between the registers or between
register and memory or between an I/O device and accumulator.
• None of these instructions changes the flag.
1) MOV Rd, Rs (move register instruction)
• 1 byte instruction
• Copies data from source register to destination register.
• Rd & Rs may be A, B, C, D, E, H &L
• E.g. MOV A, B

2) MVI R, 8 bit data (move immediate instruction)

• 2 byte instruction
• Loads the second byte ( 8 bit immediate data) into the register specified.
• R may be A, B, C, D, E, H & L
• E.g. MVI C, 53H
Cß53H
3) MOV M, R (Move to memory from register)
• Copy the contents of the specified register to memory. Here memory is the
location specified by contents of the HL register pair.
• E.g. MOV M, B

4) MOV R, M (move to register from memory)

• Copy the contents of memory location specified by HL pair to specified
register.
• E. g. MOV B, M
Write a program to load memory locations 7090 H and 7080 H
with data 40H and 50H and then swap these data.
Solution :
MVI H, 70H
MVI L, 90H
MVI A, 40H
MOV M, A
MOV C, M
MVI L, 80H
MVI B, 50H
MOV M, B
MOV D, M
MOV M, C
MVI L, 90H
MOV M, D
HLT
5.) LXI RP, 2 bytes (load register pair)
• 3-byte instruction
• Load immediate data to register pair
•Also point to the specified address.
• Register pair may be BC, DE, HL & SP(Stack pointer)
• 1st byte- Op-code
• 2nd byte lower order data
• 3rd byte- higher order data
• E.g. L X I B, 4532H; B <- 45, C <- 32H

6. MVI M, data (load memory immediate)

• 2 byte instruction.
• Loads the 8-bit data to the memory location whose address is specified by
the contents of HL pair. E.g. MVI M , 35H. ; [HL] <- 35H
7) LDA 4035H (Load accumulator directly)
• 3-byte instruction
• Loads the accumulator with the contents of memory location whose address
is specified by 16 bit address.
• Aß [4035H]

8) LDAX RP (Load accumulator indirectly)

• 1 byte instruction.
• Loads the contents of memory location pointed by the contents of
register pair to accumulator.
• E. g. LDAX B [A] <-- [[BC]]

LXI B, 9000H
LDAX B
B= 90, C= 00 A= [9000]
9) STA 16-bit address (store accumulator contents direct)
•– 3-byte instruction.
•– Stores the contents of accumulator to specified address
•– E.g. STA FA00H

[FA00] ß [A]

10) STAX RP [RP] <-- A

– Store s the contents of accumulator to memory location specified by
the contents of register pair.
1 byte instruction
E.g. STAX B

LXI B, 9500H output [9500] = 32 [9501] = 7A

LXI D, 9501H
MVI A, 32H
STAX B
MVI A, 7AH
STAXD [DE] ßA
11) IN 8-bit address
• 2-byte instruction
• Read data from the input port address specified in the second byte
and loads data into the accumulator i. e. input port content to
accumulator:
• E. g. IN 40H A ß [40H]

12) OUT 8-bit address

• 2-byte instruction
• Copies the contents of the accumulator to the output port address specified
in
the 2nd byte. That means accumulator to output port:
E. g. OUT 40H [40] ß A
13) LHLD 16-bit address ( Load HL directly)
• 3-byte instruction.
• Loads the contents of specified memory location to L register and contents of next
higher location to H-register.

• E.g: LHLD 4050H

Let us consider one example instruction LHLD 4050H .

This instruction will occupy 3-Bytes and so 3 memory locations.
First Byte will contain opcode 2AH,
second Byte will contain the low order address Byte 50H
and last Byte will contain high order address Byte 40H.
Let us suppose, 4050H and 4051H memory locations are holding values AAH and BBH
respectively.
Also HL register pair is containing initial value like CCH and DDH.
Now after execution of LHLD 4050H instruction,
the updated content of H and L register will become AAH and BBH.
14) SHLD 16-bit address (store HL directly)
• Opposite to LHLD.
• Stores the contents of L-register to specified memory location and
contents of H- register to next higher memory location.
• E .g. LXI H, 9500H
SHLD 8500H [8500]=00 [8501]=95

15) XCHG (Exchange)

• Exchanges DE pair with HL pair.
E. g.
LXI H, 7500H
LXI D, 9532H
XCHG H= 75, L=00 ,D=95, E=32
H=95, L=32 D=75 E=00
Assignment
1) Write a program to store 49 H in 2058H memory location
2) Write a program to store 50 H in Accumulator from output port
34H.
3) Write a program to exchange the data .
D = 20H
E= 78H
H = 76H
L = 34H
Addressing modes

• Instructions are command to perform a certain task in microprocessor.

• The instruction consists of op-code and data called operand. The operand
may be the source only, destination only or both of them.
• In these instructions, the source can be a register, a memory or an input
port. Similarly, destination can be a register, a memory location, or an
output port.
• The various format (way) of specifying the operands are called addressing
mode. So addressing mode specifies where the operands are located rather
than their nature.
• The 8085 has 5 addressing modes:
Direct addressing mode:
• The instruction using this mode specifies the effective address as part of
instruction.
• The instruction size either 2-bytes or 3-bytes with first byte op-code followed
by 1 or 2 bytes of address of data.
• LDA 9500H
• IN80H

Register Direct addressing mode:

• This mode specifies the register or register pair that contains the data.
• MOV A, B, Here register B contains data rather than address of the data.
• Other examples are: ADD, XCHG etc.
• Register Indirect addressing mode:
In this mode the address part of the instruction specifies the memory whose contents are the address of the
operand.
So in this type of addressing mode, it is the address of the address rather than address itself. (One operand is
register)
MOV R, M
MOV M, R
STAX, LDAX etc.
• Immediate addressing mode:
In this mode, the operand position is the immediate data.
For 8-bit data, instruction size is 2 bytes and for 16 bit data, instruction size is 3 bytes.
MVI A, 32H
LXI B, 4567H
• Implied or Inherent addressing mode:
The instructions of this mode do not have operands. E.g. NOP: No operation
HLT: Halt
EI: Enable interrupt
DI: Disable interrupt
Arithmetic group Instructions

• The 8085 microprocessor performs various arithmetic operations

such as addition, subtraction, increment and decrement.
• They effect the flags. After the result of arithmetic operations, the
contents of flags are changed.
• These arithmetic operations have the following mnemonics.
1) ADD R/M
– 1 byte add instruction.
– Adds the contents of register/memory to the contents of the accumulator and
stores the result in accumulator.
– E. g. Add B; A ß [A] + [B]
2) ADI 8 bit data
• 2 byte add immediate instruction.
• Adds the 8 bit data with the contents of accumulator and stores result
in accumulator .
E g. ADI 9BH ; A ß A+9BH

3) SUB R/M
• 1 byte subtract instruction.
• Subtracts the contents of specified register / m with the contents of
accumulator and stores the result in accumulator.
• SUB D ; Aß A-D
4) SUI 8 bit data
• 2 byte subtract immediate instruction.
• Subtracts the 8 bit data from the contents of accumulator stores
result in accumulator.

SUI D3H ; A ß A - D3H

5) INR R/M, DCR R/M
• 1 byte increment and decrement instructions.
• Increase and decrease the contents of R(register) or M(memory) by 1
respectively.
6) INX Rp, DCX RP
• Increase and decrease the register pair by 1.
• Acts as 16 bit counter made from the contents of 2 registers (1 byte
instruction)

• No flags affected
7) ADC R/M and ACI 8-bit data ( addition with carry (1 byte))
• ACI 8-bit data= immediate (2 byte).
• Adds the contents of register or 8 bit data whatever used suitably
with the previous carry.
8) SBB B/M
• 1 byte instruction.
• Subtracts the contents of register or memory from the contents of
accumulator and stores the result in accumulator.
• SBB D
• A<-- A-D-burrow

9) SBI 8 bit data

• 2 byte instruction.
• Subtracts the 8-bit immediate data from the content of the
accumulator and stores the result in accumulator.
• SBI 70H ; A<-- A-70H-burrow
9) DAD Rp(double addition)
• 1 byte instruction.
• Adds register pair with HL pair and store the 16 bit result in HL pair.

10) DAA (Decimal adjustment accumulator)

• Used only after addition.
• 1 byte instruction.
• The content of accumulator is changed from binary to two 4-bit BCD
digits.
• The arithmetic operation add and subtract are performed in relation
to the contents of accumulator.
The features of these instructions are
1) They assume implicitly that the accumulator is one of the operands.
2) They modify all the flags according to the data conditions of the
result.
3) They place the result in the accumulator.
4) They do not affect the contents of operand register or memory.
But the INR and DCR operations can be performed in any register or
memory. These instructions
1) Affect the contents of specified register or memory.
2) Affect the flag except carry flag.
Addition operation in 8085:
• 8085 performs addition with 8-bit binary numbers and stores the
result in accumulator.
• If the sum is greater than 8-bits (FFH), it sets the carry flag.
Subtraction operation in 8085:
• 8085 performs subtraction operation by using 2’s complement and
the steps used are:
• 1) Converts the subtrahend ,the number to be subtracted into its 1’ss
complement
• 2) Adds 1 to 1’s complement to obtain 2’s complement of the
subtrahend.
• 3) Adds 2’s complement to the minuend (the contents of the
accumulator)
• 4) Complements the carry flag.
When cy = 0, then recomplement the result

11001110

00110001
+. 1
= 00110010
= 32H
=- 32 H ( placing negative sign infront of it)
BCD Addition:

• In many applications data are presented in decimal number. In such

applications, it may be convenient to perform arithmetic operations
directly in BCD numbers.
• The microprocessor cannot recognize BCD numbers; it adds any two
numbers in binary. In BCD addition, any number larger than 9 (from A
to F) is invalid and needs to be adjusted by adding 6 in binary.
• A special instruction called DAA performs the function of adjusting a
BCD sum in 8085.
• It uses the AC flag to sense that the value of the least four bits is
larger than 9 and adjusts the bits to BCD value.
• Similarly, it uses CY flag to adjust the most significant four bits.
Logical Group Instructions:
• A microprocessor is basically a programmable logic chip.
• It can perform all the logic functions of the hardwired logic through its
instruction set.
• The 8085 instruction set includes such logic functions as AND, OR, XOR and
NOT (Complement):
The following features hold true for all logic instructions:
1) The instructions implicitly assume that the accumulator is one of the
operands.
2) All instructions reset (clear) carry flag except for complement where flag
remain unchanged.
3) They modify Z, P & S flags according to the data conditions of the result.
4) Place the result in the accumulator.
5) They do not affect the contents of the operand register.
Branching Group Instructions:

• The microprocessor is a sequential machine; it executes machine

codes from one memory location to the next.
• The branching instructions instruct the microprocessor to go to a
different memory location and the microprocessor continues
executing machine codes from that new location.
• The branching instructions are the most powerful instructions
because they allow the microprocessor to change the sequence of a
program, either unconditionally or under certain test conditions.
• The branching instruction code categorized in following three groups:
• The branching instruction code categorized in following three groups:
1) Jump instructions
2) Call and return instruction
3) Restart instruction

Jump Instructions:
• The jump instructions specify the memory location explicitly.
• They are 3 byte instructions, one byte for the operation code followed
by a 16 bit (2 byte) memory address.
• Jump instructions can be categorized into unconditional and
conditional jump.
Unconditional Jump
• 8085 includes unconditional jump instruction to enable the
programmer to set up continuous loops without depending only type
of conditions.
• E.g. JMP 16 bit address: loads the program counter by 16 bit address
and jumps to specified memory location.
JMP 4000H
• Here, 40H is higher order address and 00H is lower order address. The
lower order byte enters first and then higher order.
• The jump location can also be specified using a label or name.
E.g.
Address. Label. Mnemonics. Hexcode
2000H. MVI A, 80H
2002H. OUT 43H
2004H. MVI A, 00H
2006H. L1: OUT 40H
2008H. INR A
2009H. JMP L1
200CH HLT
Conditional Jump

• The conditional jump instructions allow the microprocessor to make

decisions based on certain conditions indicated by the flags.
• After logic and arithmetic operations, flags are ser or reset to reflect
the condition of data.
• These instructions check the flag conditions and make decisions to
change or not to change the sequence of program.
• The four flags namely carry, zero, sign and parity used by the jump
instruction.
Write a program to ten bytes of data from starting
address 9500 H (table1) to 9600H (table 2)
Memory address label Mnemonics Hexcode
C005 H MVI B, 0AH
C006H 0AH
C007H LXI H, 9500H
C008H 00H
C009H 95H
C00AH LXI D, 9600H
C00BH 00H
C00CH 96H
C00DH UP : MOVA,M
C00EH STAX D
C00FH INX H
C010H INX D
C011H DCR B
C012H JNZ UP
C013H 0DH
C014H C0H
C015H HLT CFH
Memory label Mnemonics Hexcode
C005 H MVI B, 1EH
C006H 1EH
C007H LXI H, 8500H Write a program in 8080 to transfer 15 data's from 8500H to
C008H 00H
A500H if data is odd else store 00H.
C009H 85H
C00AH LXI D, A500H
C00BH 00H
C00CH A5H
C00DH L2 : MOVA,M ANI. 01 H
C00EH ANI 01H
C00FH 01H
C010H JNZ L1
C011H 18 H
for eg: A = 23 H = 00100011 (odd)
C012H C0 H
ANDing with 00000001
C013H MVI A, 00H
C014H 00H
= 00000001
C015H JMP L3 If A = 22 H (even)
C016H 19 H
C017H C0 H 0010 0010
C018H L1 : MOV A, M 00000001
C019H L3 : STAX D
C01AH INX H
= 00000000
DCR B
JNZ L2
OD H
C0H
HLT CF H
Call and return instructions: (Subroutine)

• Call and return instructions are associated with subroutine technique. A

subroutine is a group of instructions that perform a subtask.
• A subroutine is written as a separate unit apart from the main program and
the microprocessor transfers the program execution sequence from main
program to subroutine whenever it is called to perform a task.
• After the completion of subroutine task microprocessor returns to main
program.
• The subroutine technique eliminates the need to write a subtask
repeatedly, thus it uses memory efficiently.
• Before implementing the subroutine, the stack must be defined; the stack
is used to store the memory address of the instruction in the main program
that follows the subroutines call.
• To implement subroutine there are two instructions CALL and RET.
Restart Instruction:

• 8085 instruction set includes 8 restart instructions (RST).

• These are 1 byte instructions and transfer the program execution to a
specific location.
• When RST instruction is executed, the 8085 stores the contents of PC
on SP and transfers the program to the restart location.
• Actually these restart instructions are inserted through additional
hardware. These instructions are part of interrupt process.
 Miscellaneous Group Instructions:
STACK
The stack is defined as a set of memory location in R/W memory,
specified by a programmer in a main memory.
These memory locations are used to store binary information
temporarily during the execution of a program.
The beginning of the stack is defined in the program by using the
instruction LXI SP, 16 bit address.
Once the stack location is defined, it loads 16 bit address in the stack
pointer register. Storing of data bytes for this operation takes place at
the memory location that is one less than the address
• e.g. LXI SP, 2099H
• Here the storing of data bytes begins at 2098H and continuous in
reverse order i.e 2097H.
• Therefore, the stack is initialized at the highest available memory
location to prevent the program from being destroyed by the stack
information.
• The stack instructions are:
• A content of memory location indicated by SP is copied into low order
register and SP is incremented by 1.
• Then the content of next memory location is copied into high order
register and SP is incremented by 1.
• XTHL =exchanges top of stack (TOS) with HL
• SPHL =move HL to SP
• PCHL =move HL to PC

• Some instructions related to interrupt DI , disable interrupt

EI = Enable interrupt
SIM = set interrupt mask
RIM = read interrupt mask
WAP to sort 10 bytes of data from
1120 H in ascending order.
End of chapter 02