V 2

Feedback,
Nonlinear, and
Distributed
Circuits
The Circuits and Filters
Handbook
Third Edition
Edited by
Wai-Kai Chen
Fundamentals of Circuits and Filters
Feedback, Nonlinear, and Distributed Circuits

Analog and VLSI Circuits
Computer Aided Design and Design Automation
Passive, Active, and Digital Filters

The Circuits and Filters Handbook
Third Edition
Feedback,
Nonlinear, and
Distributed
Circuits
Edited by
Wai-Kai Chen
University of Illinois
Chicago, U. S. A.
CRC Press
Taylor & Francis Group
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Library of Congress Cataloging-in-Publication Data
Feedback, nonlinear, and distributed circuits / edited by Wai-Kai Chen.

p. cm.
Includes bibliographical references and index.
ISBN-13: 978-1-4200-5881-9
ISBN-10: 1-4200-5881-9
1. Electronic circuits. 2. Electric circuits, Nonlinear. I. Chen, Wai-Kai, 1936- II. Title.
TK7867.N627 2009
621.3815--dc22 2008048115
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Contents
Preface .................................................................................................................................................. vii

Editor-in-Chief .................................................................................................................................... ix
Contributors ........................................................................................................................................ xi
SECTION I Feedback Circuits

1 Feedback Amplifier Theory ................................................................................................ 1-1
John Choma, Jr.
2 Feedback Amplifier Configurations .................................................................................. 2-1
John Choma, Jr.
3 General Feedback Theory .................................................................................................... 3-1
Wai-Kai Chen
4 Network Functions and Feedback ..................................................................................... 4-1
Wai-Kai Chen
5 Measurement of Return Difference .................................................................................. 5-1
Wai-Kai Chen
6 Multiple-Loop Feedback Amplifiers ................................................................................. 6-1
Wai-Kai Chen
SECTION II Nonlinear Circuits

7 Qualitative Analysis .............................................................................................................. 7-1
Martin Hasler
8 Synthesis and Design of Nonlinear Circuits ................................................................... 8-1
Angel Rodríguez-Vázquez, Manuel Delgado-Restituto, Jose L. Huertas,
and F. Vidal
9 Representation, Approximation, and Identification ...................................................... 9-1
Guanrong Chen
v
vi Contents
10 Transformation and Equivalence .................................................................................... 10-1

Wolfgang Mathis
11 Piecewise-Linear Circuits and Piecewise-Linear Analysis ......................................... 11-1
Joos Vandewalle and Lieven Vandenberghe
12 Simulation ............................................................................................................................. 12-1
Erik Lindberg
13 Cellular Neural Networks and Cellular Wave Computers ........................................ 13-1
Tamás Roska, Ákos Zarándy, and Csaba Rekeczky
14 Bifurcation and Chaos ....................................................................................................... 14-1
Michael Peter Kennedy
SECTION III Distributed Circuits

15 Transmission Lines ............................................................................................................. 15-1
Thomas Koryu Ishii
16 Multiconductor Transmission Lines ............................................................................... 16-1
Daniël De Zutter and Luc Martens
17 Time and Frequency Domain Responses ...................................................................... 17-1
Luc Martens and Daniël De Zutter
18 Distributed RC Networks .................................................................................................. 18-1
Vladimír Székely
19 Synthesis of Distributed Circuits ..................................................................................... 19-1
Thomas Koryu Ishii
Index ................................................................................................................................................ IN-1
Preface
The purpose of this book is to provide in a single volume a comprehensive reference work covering the
broad spectrum of feedback amplifier design; analysis, synthesis, and design of nonlinear circuits; their
representation, approximation, identification, and simulation; cellular neural networks; multiconductor
transmission lines; and analysis and synthesis of distributed circuits. It also includes the design of
multiple-loop feedback amplifiers. This book is written and developed for the practicing electrical
engineers and computer scientists in industry, government, and academia. The goal is to provide the
most up-to-date information in the field.
Over the years, the fundamentals of the field have evolved to include a wide range of topics and a broad
range of practice. To encompass such a wide range of knowledge, this book focuses on the key concepts,
models, and equations that enable the design engineer to analyze, design, and predict the behavior of
feedback amplifiers, nonlinear and distributed systems. While design formulas and tables are listed,
emphasis is placed on the key concepts and theories underlying the processes.
This book stresses fundamental theories behind professional applications and uses several examples to
reinforce this point. Extensive development of theory and details of proofs have been omitted. The reader
is assumed to have a certain degree of sophistication and experience. However, brief reviews of theories,
principles, and mathematics of some subject areas are given. These reviews have been done concisely with
perception.
The compilation of this book would not have been possible without the dedication and efforts of
Professors Leon O. Chua and Thomas Koryu Ishii, and most of all the contributing authors. I wish to
thank them all.
Wai-Kai Chen
vii
Editor-in-Chief
Wai-Kai Chen is a professor and head emeritus of the Department

of Electrical Engineering and Computer Science at the University of
Illinois at Chicago. He received his BS and MS in electrical engin-
eering at Ohio University, where he was later recognized as a
distinguished professor. He earned his PhD in electrical engineer-
ing at the University of Illinois at Urbana–Champaign.
Professor Chen has extensive experience in education and indus-
try and is very active professionally in the fields of circuits and
systems. He has served as a visiting professor at Purdue University,
the University of Hawaii at Manoa, and Chuo University in Tokyo,
Japan. He was the editor-in-chief of the IEEE Transactions on
Circuits and Systems, Series I and II, the president of the IEEE
Circuits and Systems Society, and is the founding editor and the
editor-in-chief of the Journal of Circuits, Systems and Computers.
He received the Lester R. Ford Award from the Mathematical
Association of America; the Alexander von Humboldt Award from Germany; the JSPS Fellowship
Award from the Japan Society for the Promotion of Science; the National Taipei University of Science
and Technology Distinguished Alumnus Award; the Ohio University Alumni Medal of Merit for
Distinguished Achievement in Engineering Education; the Senior University Scholar Award and the
2000 Faculty Research Award from the University of Illinois at Chicago; and the Distinguished Alumnus
Award from the University of Illinois at Urbana–Champaign. He is the recipient of the Golden Jubilee
Medal, the Education Award, and the Meritorious Service Award from the IEEE Circuits and Systems
Society, and the Third Millennium Medal from the IEEE. He has also received more than a dozen
honorary professorship awards from major institutions in Taiwan and China.
A fellow of the Institute of Electrical and Electronics Engineers (IEEE) and the American Association
for the Advancement of Science (AAAS), Professor Chen is widely known in the profession for the
following works: Applied Graph Theory (North-Holland), Theory and Design of Broadband Matching
Networks (Pergamon Press), Active Network and Feedback Amplifier Theory (McGraw-Hill), Linear
Networks and Systems (Brooks=Cole), Passive and Active Filters: Theory and Implements (John Wiley),
Theory of Nets: Flows in Networks (Wiley-Interscience), The Electrical Engineering Handbook (Academic
Press), and The VLSI Handbook (CRC Press).
ix
Contributors
Guanrong Chen Daniël De Zutter Luc Martens

Department of Electronic Department of Information Department of Information
Engineering Technology Technology
City University of Ghent University Ghent University
Hong Kong Ghent, Belgium Ghent, Belgium
Hong Kong, China
Martin Hasler Wolfgang Mathis
Laboratory of Nonlinear Systems Department of Electrical
Wai-Kai Chen Swiss Federal Institute of Engineering and Information
Department of Electrical and Technology Technology
Computer Engineering Lausanne, Switzerland University of Hanover
University of Illinois Hanover, Germany
Chicago, Illinois Jose L. Huertas
Csaba Rekeczky
National Center of
Eutecus Inc.
Microelectronics
John Choma, Jr. Berkeley, California
Bureau of Science and
Ming Hsieh Department of and
Technology
Electrical Engineering
Seville, Spain Pázmány Péter Catholic
University of Southern
University
California, Los Angeles
Thomas Koryu Ishii Budapest, Hungary
Los Angeles, California
Department Electrical and
Computer Engineering Angel Rodríguez-Vázquez
Marquette University Electronics and Electromagnetism
Leon O. Chua
Milwaukee, Wisconsin University of Seville
Department of Electrical
Seville, Spain
Engineering and Computer
Sciences Michael Peter Kennedy
Tamás Roska
University of California, Department of Microelectronic
Computer and Automation
Berkeley Engineering
Research Institute
Berkeley, California University College Cork
Hungarian Academy of Sciences
Cork, Ireland
Budapest, Hungary
Manuel Delgado-Restituto Erik Lindberg and
National Center of Department of Information Department of Information
Microelectronics Technology Technology
Bureau of Science and Technical University of Pázmány Péter Catholic
Technology Denmark University
Seville, Spain Lyngby, Denmark Budapest, Hungary
xi
xii Contributors
Vladimír Székely Joos Vandewalle Ákos Zarándy

Department of Electron Devices Department of Electrical Computer and Automation
Budapest University of Engineering Research Institute
Technology and Economics Catholic University of Leuven Hungarian Academy of Sciences
Budapest, Hungary Leuven, Belgium Budapest, Hungary
Lieven Vandenberghe and

Electrical Engineering F. Vidal
Department of Electronics Pázmány Péter Catholic
Department
University of Málaga University
University of California, Los
Málaga, Spain Budapest, Hungary
Angeles
Los Angeles, California
I
Feedback Circuits
Wai-Kai Chen
University of Illinois at Chicago
1 Feedback Amplifier Theory John Choma, Jr. ........................................................................ 1-1

Introduction . Methods of Analysis . Signal Flow Analysis . Global Single-Loop
Feedback . Pole Splitting Open-Loop Compensation . Summary . References
2 Feedback Amplifier Configurations John Choma, Jr. ......................................................... 2-1
Introduction . Series–Shunt Feedback Amplifier . Shunt–Series Feedback Amplifier .
Shunt–Shunt Feedback Amplifier . Series–Series Feedback Amplifier .

Dual-Loop Feedback . Summary . References
3 General Feedback Theory Wai-Kai Chen .............................................................................. 3-1
Introduction . Indefinite-Admittance Matrix . Return Difference . Null Return
Difference . References
4 Network Functions and Feedback Wai-Kai Chen ............................................................... 4-1
Blackman’s Formula . Sensitivity Function
5 Measurement of Return Difference Wai-Kai Chen ............................................................ 5-1
Blecher’s Procedure . Impedance Measurements . References
6 Multiple-Loop Feedback Amplifiers Wai-Kai Chen ........................................................... 6-1
Multiple-Loop Feedback Amplifier Theory . Return Different Matrix . Null Return
Difference Matrix . Transfer-Function Matrix and Feedback . Sensitivity Matrix .
Multiparameter Sensitivity . References
I-1
1
Feedback Amplifier
Theory
1.1 Introduction ................................................................................ 1-1
1.2 Methods of Analysis.................................................................. 1-2
1.3 Signal Flow Analysis ................................................................. 1-4
1.4 Global Single-Loop Feedback.................................................. 1-6
Driving-Point I=O Resistances . Diminished
Closed-Loop Damping Factor . Frequency Invariant
Feedback Factor . Frequency Variant Feedback
Factor (Compensation)
1.5 Pole Splitting Open-Loop Compensation .......................... 1-11
Open-Loop Amplifier . Pole Splitting Analysis
John Choma, Jr. 1.6 Summary.................................................................................... 1-16
University of Southern California References ............................................................................................ 1-17
1.1 Introduction
Feedback, whether intentional or parasitic, is pervasive of all electronic circuits and systems. In general,
feedback is comprised of a subcircuit that allows a fraction of the output signal of an overall network to
modify the effective input signal in such a way as to produce a circuit response that can differ sub-
stantially from the response produced in the absence of such feedback. If the magnitude and relative
phase angle of the fed back signal decreases the magnitude of the signal applied to the input port of an
amplifier, the feedback is said to be negative or degenerative. On the other hand, positive (or regenerative)
feedback, which gives rise to oscillatory circuit responses, is the upshot of a feedback signal that increases
the magnitude of the effective input signal. Because negative feedback produces stable circuit responses,
the majority of all intentional feedback architectures is degenerative [1,2]. However, parasitic feedback
incurred by the energy storage elements associated with circuit layout, circuit packaging, and second-
order high-frequency device phenomena often degrades an otherwise degenerative feedback circuit into
either a potentially regenerative or severely underdamped network.
Intentional degenerative feedback applied around an analog network produces four circuit perform-
ance benefits. First, negative feedback desensitizes the gain of an open-loop amplifier (an amplifier
implemented without feedback) with respect to variations in circuit element and active device model
parameters. This desensitization property is crucial in view of parametric uncertainties caused by aging
phenomena, temperature variations, biasing perturbations, and nonzero fabrication and manufacturing
tolerances. Second, and principally because of the foregoing desensitization property, degenerative
feedback reduces the dependence of circuit responses on the parameters of inherently nonlinear active
devices, thereby reducing the total harmonic distortion evidenced in open loops. Third, negative feedback
1-1
1-2 Feedback, Nonlinear, and Distributed Circuits
broadbands the dominant pole of an open-loop amplifier, thereby affording at least the possibility of a
closed-loop network with improved high-frequency performance. Finally, by modifying the driving-point
input and output impedances of the open-loop circuit, negative feedback provides a convenient vehicle
for implementing voltage buffers, current buffers, and matched interstage impedances.
The disadvantages of negative feedback include gain attenuation, a closed-loop configuration that is
disposed to potential instability, and, in the absence of suitable frequency compensation, a reduction in
the open-loop gain-bandwidth product (GBP). In uncompensated feedback networks, open-loop amp-
lifier gains are reduced in almost direct proportion to the amount by which closed-loop amplifier gains
are desensitized with respect to open-loop gains. Although the 3 dB bandwidth of the open-loop circuit is
increased by a factor comparable to that by which the open-loop gain is decreased, the closed-loop GBP
resulting from uncompensated degenerative feedback is never greater than that of the open-loop
configuration [3]. Finally, if feedback is incorporated around an open-loop amplifier that does not
have a dominant pole [4], complex conjugate closed-loop poles yielding nonmonotonic frequency
responses are likely. Even positive feedback is possible if substantive negative feedback is applied around
an open-loop amplifier for which more than two poles significantly influence its frequency response.
Although the foregoing detail is common knowledge deriving from Bode’s pathfinding disclosures [5],
most circuit designers remain uncomfortable with analytical procedures for estimating the frequency
responses, I=O impedances, and other performance indices of practical feedback circuits. The purposes of
this section are to formulate systematic feedback circuit analysis procedures and ultimately, to demon-
strate their applicability to six specific types of commonly used feedback architectures. Four of these
feedback types, the series–shunt, shunt–series, shunt–shunt, and series–series configurations, are single-
loop architectures, while the remaining two types are the series–series=shunt–shunt and series–shunt=
shunt–series dual-loop configurations.
1.2 Methods of Analysis

Several standard techniques are used for analyzing linear feedback circuits [6]. The most straightforward
of these entails writing the Kirchhoff equilibrium equations for the small-signal model of the entire
feedback system. This analytical tack presumably leads to the idealized feedback circuit block diagram
abstracted in Figure 1.1. In this model, the circuit voltage or current response, XR, is related to the source
current or voltage excitation, XS, by
D XR Go Go
Gcl ¼ ¼ (1:1)
XS 1 þ fGo 1 þ T
+
Open-loop
XS (Go) XR
amplifier
–
Feedback
factor (f)
Feedback amplifier
FIGURE 1.1 Block diagram model of a feedback network.

Feedback Amplifier Theory 1-3
where
Gcl is the closed-loop gain of the feedback circuit
f, the feedback factor, is the proportion of circuit response fed back for antiphase superposition with
the source signal
Go represents the open-loop gain
The product fGo is termed the loop gain T.

Equation 1.1 demonstrates that, for loop gains with magnitudes that are much larger than one, the
closed-loop gain collapses to 1=f, which is independent of the open-loop gain. To the extent that the
open-loop amplifier, and not the feedback subcircuit, contains circuit elements and other parameters that
are susceptible to modeling uncertainties, variations in the fabrication of active and passive elements, and
nonzero manufacturing tolerances, large loop gain achieves a desirable parametric desensitization.
Unfortunately, the determination of Go and f directly from the Kirchhoff relationships is a nontrivial
task, especially because Go is rarely independent of f in practical electronics. Moreover, Equation 1.1 does
not illuminate the manner in which the loop gain modifies the driving-point input and output imped-
ances of the open-loop amplifier.
A second approach to feedback network analysis involves modeling the open loop, feedback, and
overall closed-loop networks by a homogeneous set of two-port parameters [7]. When the two-port
parameter model is selected judiciously, the two-port parameters for the closed-loop network derive from
a superposition of the respective two-port parameters of the open loop and feedback subcircuits. Given
the resultant parameters of the closed-loop circuit, standard formulas can then be exploited to evaluate
closed-loop values of the circuit gain and the driving-point input and output impedances.
Unfortunately, several limitations plague the utility of feedback network analysis predicated on two-
port parameters. First, the computation of closed-loop two-port parameters is tedious if the open-loop
configuration is a multistage amplifier, or if multiloop feedback is utilized. Second, the two-loop method
of feedback circuit analysis is straightforwardly applicable to only those circuits that implement global
feedback (feedback applied from output port to input port). Many single-ended feedback amplifiers
exploit only local feedback, wherein a fraction of the signal developed at the output port is fed back to
a terminal pair other than that associated with the input port. Finally, the appropriate two-port
parameters of the open-loop amplifier can be superimposed with the corresponding parameter set of
the feedback subcircuit if and only if the Brune condition is satisfied [8]. This requirement mandates
equality between the pre- and postconnection values of the two-port parameters of open loop and
feedback cells, respectively. The subject condition is often not satisfied when the open-loop amplifier is
not a simple three-terminal two-port configuration.
The third method of feedback circuit analysis exploits Mason’s signal flow theory [9–11]. The circuit
level application of this theory suffers few of the shortcomings indigenous to block diagram and two-port
methods of feedback circuit analysis [12]. Signal flow analyses applied to feedback networks efficiently
express I=O transfer functions, driving-point input impedances, and driving-point output impedances in
terms of an arbitrarily selected critical or reference circuit parameters, say P.
An implicit drawback of signal flow methods is the fact that unless P is selected to be the feedback factor
f, which is not always transparent in feedback architectures, expressions for the loop gain and the open-
loop gain of feedback amplifiers are obscure. However, by applying signal flow theory to a feedback circuit
model engineered from insights that derive from the results of two-port network analyses, the feedback
factor can be isolated. The payoff of this hybrid analytical approach includes a conventional block diagram
model of the I=O transfer function, as well as convenient mathematical models for evaluating the closed-
loop driving-point input and output impedances. Yet, another attribute of hybrid methods of feedback
circuit analysis is its ability to delineate the cause, nature, and magnitude of the feedforward transmittance
produced by interconnecting a certain feedback subcircuit to a given open-loop amplifier. This information
is crucial in feedback network design because feedforward invariably decreases gain and often causes
undesirable phase shifts that can lead to significantly underdamped or unstable closed-loop responses.
1.3 Signal Flow Analysis

Guidelines for feedback circuit analysis by hybrid signal flow methods can be established with the aid of
Figure 1.2 [13]. Figure 1.2a depicts a linear network whose output port is terminated in a resistance, RL.
The output signal variable is the voltage VO, which is generated in response to an input port signal whose
Thévenin voltage and resistance are respectively, VS and RS. Implicit to the linear network is a current-
controlled voltage source (CCVS) Pib, with a value that is directly proportional to the indicated network
branch current ib. The problem at hand is the deduction of the voltage gain Gv(RS, RL) ¼ VO=VS, the
driving-point input resistance (or impedance) Rin, and the driving-point output resistance (or impedance)
Rout, as explicit functions of the critical transimpedance parameter P. Although the following systematic
procedure is developed in conjunction with the diagram in Figure 1.2, with obvious changes in notation, it
is applicable to determine any type of transfer relationship for any linear network in terms of any type of
reference parameter [14].
1. Set P ¼ 0, as depicted in Figure 1.2b, and compute the resultant voltage gain Gvo(RS, RL), where the
indicated notation suggests an anticipated dependence of gain on source and load resistances.
Also, compute the corresponding driving-point input and output resistances Rin, and Rout,
respectively. In this case, the ‘‘critical’’ parameter P is associated with a controlled voltage source.
Accordingly, P ¼ 0 requires that the branch containing the controlled source be supplanted by a
ib ib
Rin Rout Rino Routo
+ +
RS RS
Linear Linear
+ VO RL + VO RL
network network
VS VS
– –
– –
Pib P=0
+ – + –
VO VO
= Gv (RS, RL) = Gvo (RS, RL)
(a) VS (b) VS
iy iy
+ +
RS RS
Linear Linear RL
+ VO RL + 0
network network
0 VS
– –
– –
vx vx
+ – + –
iy iy
(c) vx = Qs (RS, RL) (d) vx = Qr (RS, RL)
FIGURE 1.2 (a) Linear network with an identified critical parameter P. (b) Model for calculating the P ¼ 0 value
of voltage gain. (c) The return ratio with respect to P is PQs(RS, RL). (d) The null return ratio with respect to P is
PQr(RS, RL).
short circuit. If, for example, P is associated with a controlled current source, P ¼ 0 mandates the
replacement of the controlled source by an open circuit.
2. Set the Thévenin source voltage VS to zero, and replace the original controlled voltage source Pib by
an independent voltage source of symbolic value, vx. Then, calculate the ratio, iy=vx, where, as
illustrated in Figure 1.2c, iy flows in the branch that originally conducts the controlling current ib.
Note, however, that the reference polarity of iy is opposite to that of ib. The computed transfer
function iy=vx is denoted by Qs(RS, RL). This transfer relationship, which is a function of the source
and load resistances, is used to determine the return ratio Ts(P, RS, RL) with respect to parameter P
of the original network. In particular,
Ts (P, RS , RL ) ¼ PQs (RS , RL ) (1:2)
3. If P is associated with a controlled current source, the controlled generator Pib is replaced by a
current source of value ix. If the controlling variable is a voltage, instead of a current, the ratio vy=vx,
is computed, where vy is the voltage developed across the controlling branch and the polarity is
opposite to that of the original controlling voltage.
4. The preceding computational step is repeated, but instead of setting VS to zero, the output variable,
which is the voltage VO in the present case, is nulled, as indicated in Figure 1.2d. Let the computed
ratio iy=vx, be symbolized as Qr(RS, RL). In turn, the null return ratio Tr(P, RS, RL), with respect to
parameter P is
Tr (P, RS , RL ) ¼ PQr (RS , RL ) (1:3)
5. Desired voltage gain Gv(RS, RL), of the linear network undergoing study can be shown to be [5,12]

VO 1 þ PQr (RS , RL )
Gv (RS , RL ) ¼ ¼ Gvo (RS , RL ) (1:4)
VS 1 þ PQs (RS , RL )
6. Given the function Qs(RS, RL), the driving-point input and output resistances follow straightfor-
wardly from [12]

1 þ PQs (0, RL )
Rin ¼ Rino (1:5)
1 þ PQs (1, RL )

1 þ PQs (RS , 0)
Rout ¼ Routo (1:6)
1 þ PQs (RS , 1)
An important special case entails a controlling electrical variable ib associated with the selected parameter
P that is coincidentally the voltage or current output of the circuit under investigation. In this situation, a
factor P of the circuit response is fed back to the port (not necessarily the input port) defined by the
terminal pair across which the controlled source is incident. When the controlling variable ib is the
output voltage or current of the subject circuit Qr(RS, RL), which is evaluated under the condition of a
nulled network response, is necessarily zero. With Qr(RS, RL) ¼ 0, the algebraic form of Equation 1.4 is
identical to that of Equation 1.1, where the loop gain T is the return ratio with respect to parameter P;
that is,
PQs (RS , RL )jQr (RS , RL ) ¼ 0 ¼ T (1:7)

Moreover, a comparison of Equation 1.4 to Equation 1.1 suggests that Gv(RS, RL) symbolizes the closed-
loop gain of the circuit, Gvo(RS, RL) represents the corresponding open-loop gain, and the circuit feedback
factor f is
PQs (RS , RL )
f ¼ (1:8)
Gvo (RS , RL )
1.4 Global Single-Loop Feedback

Consider the global feedback scenario illustrated in Figure 1.3a, in which a fraction P of the output voltage
VO is fed back to the voltage-driven input port. Figure 1.3b depicts the model used to calculate the return
ratio Qs(RS, RL), where, in terms of the branch variables in the schematic diagram, Qs(RS, RL) ¼ vy=vx. An
inspection of this diagram confirms that the transfer function vy=vx, is identical to the P ¼ 0 value of the
gain VO=VS, which derives from an analysis of the structure in Figure 1.3a. Thus, for global voltage feedback
in which a fraction of the output voltage is fed back to a voltage-driven input port, Qs(RS, RL) is the open-
loop voltage gain; that is, Qs(RS, RL) þ Gvo(RS, RL). It follows from Equation 1.8 that the feedback factor f is
identical to the selected critical parameter P. Similarly, for the global current feedback architecture of
Figure 1.4a, a fraction P of the output current, IO, is fed back to the current-driven input port f ¼ P.
As implied by the model of Figure 1.4b, Qs(RS, RL) Gio(RS, RL), the open-loop current gain.
Rin Rout Rin Rout
+ –
RS RS
Linear Linear
+ VO RL vy RL
network + network
VS 0
– +
– –
+ +
PVO vx
– –
(a) (b)
FIGURE 1.3 (a) Voltage-driven linear network with global voltage feedback. (b) Model for the calculation of
loop gain.
Rin Rout
IS Linear RL Linear RL
RS PIO 0 RS ix
network network
IO iy
(a) (b)
FIGURE 1.4 (a) Current-driven linear network with global current feedback. (b) Model for the calculation
of loop gain.
1.4.1 Driving-Point I=O Resistances

Each of the two foregoing circuit architectures has a closed-loop gain where the algebraic form mirrors
(Equation 1.1). It follows that for sufficiently large loop gain (equal to either PGvo(RS, RL) or PGio
(RS, RL)), the closed-loop gain approaches (1=P) and is therefore desensitized with respect to open-loop
gain parameters. However, such a desensitization with respect to the driving-point input and output
resistances (or impedances) cannot be achieved. For the voltage feedback circuit in Figure 1.3a,
Qs(1, RL), is the RS ¼ 1 value, Gvo(RS, RL), of the open-loop voltage gain. This particular open-loop
gain is zero, because RS ¼ 1 decouples the source voltage from the input port of the amplifier. On the
other hand, Qs(0, RL) is the RS ¼ 0 value, Gvo(0, RL), of the open-loop voltage gain. This gain is at least as
large as Gvo(RS, RL), since a short-circuited Thévenin source resistance implies lossless coupling of the
Thévenin signal to the amplifier input port. Recalling Equation 1.5, the resultant driving-point input
resistance of the voltage feedback amplifier is
Rin ¼ Rino ½1 þ PGvo (0, RL ) Rino ½1 þ PGvo (RS , RL ) (1:9)
which shows that the closed-loop driving-point input resistance is larger than its open-loop counterpart
and is dependent on open-loop voltage gain parameters.
Conversely, the corresponding driving-point output resistance in Figure 1.3a is smaller than the open-
loop output resistance and approximately inversely proportional to the open-loop voltage gain. These
assertions derive from the facts that Qs(RS, 0) is the RL ¼ 0 value of the open-loop voltage gain Gvo(RS, RL).
Because RL ¼ 0 corresponds to the short-circuited load resistance, Gvo(RS, 0) ¼ 0. In contrast, Qs(RS, 1),
is the RL ¼ 1 value, Gvo(RS, 1), of the open-loop gain, which is a least as large as Gvo(RS, RL). By
Equation 1.6,
Routo Routo
Rout ¼ (1:10)
1 þ PGvo (RS , 1) 1 þ PGvo (RS , RL )
Similarly, the driving-point input and output resistances of the global current feedback configuration of
Figure 1.4a are sensitive to open-loop gain parameters. In contrast to the voltage amplifier of Figure 1.3a,
the closed loop, driving-point input resistance of current amplifier is smaller than its open-loop value,
while the driving-point output resistance is larger than its open-loop counterpart. Noting that the open-
loop current gain Gio(RS, RL) is zero for both RS ¼ 0 (which short circuits the input port), and RL ¼ 1
(which open circuits the load port), Equations 1.5 and 1.6 give
Rino
Rin ¼ (1:11)
1 þ PGio (1, RL )
Rout ¼ Routo ½1 þ PGio (RS , 0) (1:12)
1.4.2 Diminished Closed-Loop Damping Factor

In addition to illuminating the driving-point and forward transfer characteristics of single-loop feed-
back architectures, the special case of global single-loop feedback illustrates the potential instability
problems pervasive of almost all feedback circuits. An examination of these problems begins by returning
to Equation 1.1 and letting the open-loop gain, Go, be replaced by the two-pole frequency-domain
function,
Go (0)
Go (s) ¼ (1:13)
1 þ ps1 1 þ ps2
where Go(0) symbolizes the zero-frequency open-loop gain. The pole frequencies p1 and p2 in Equation
1.13 are either real numbers or complex conjugate pairs. Alternatively, Equation 1.13 is expressible as
Go (0)
Gs (s) ¼ 2zol
(1:14)
1þ vnol s þ v2nol
s2
where
pffiffiffiffiffiffiffiffiffi
vnol ¼ p1 p2 (1:15)
represents the undamped natural frequency of oscillation of the open-loop configuration, and
rffiffiffiffiffi rffiffiffiffiffi
1 p2 p1
zol ¼ þ (1:16)
2 p1 p2
is the damping factor of the open-loop circuit.

In Equation 1.1, let the feedback factor f be the single left-half-plane zero function,
s
f (s) ¼ fo 1 þ (1:17)
z
where
z is the frequency of the real zero introduced by feedback
fo is the zero-frequency value of the feedback factor
The resultant loop gain is

s
T(s) ¼ fo 1 þ Go (s) (1:18)
z
the zero-frequency value of the loop gain is
T(0) ¼ fo Go (0) (1:19)
and the zero-frequency closed-loop gain Gcl(0), is
Go (0) Go (0)
Gcl (0) ¼ ¼ (1:20)
1 þ fo Go (0) 1 þ T(0)
Upon inserting Equations 1.14 and 1.17 into Equation 1.1, the closed-loop transfer function is deter-
mined to be
Gcl (0)
Gcl (s) ¼ (1:21)
1 þ v2znclcl s þ vs2
2
ncl
where the closed-loop undamped natural frequency of oscillation vncl relates to its open-loop counter-
part vnol, in accordance with
pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
vncl ¼ vnol 1 þ T(0) (1:22)
Moreover, the closed-loop damping factor zcl is

zol T(0) vncl zol T(0) vnol
zcl ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi þ ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi þ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi (1:23)
1 þ T(0) 1 þ T(0) 2z 1 þ T(0) 1 þ T(0) 2z
A frequency invariant feedback factor f(s) applied to the open-loop configuration whose transfer function
is given by Equation 1.13 implies an infinitely large frequency, z, of the feedback zero. For this case,
Equation 1.23 confirms a closed-loop damping factor that is always less than the open-loop damping
factor. Indeed, for a smaller than unity open-loop damping factor (which corresponds to complex
conjugate open-loop poles) and reasonable values of the zero-frequency loop gain T(0), zcl 1. Thus,
constant feedback applied around an underdamped two-pole open-loop amplifier yields a severely
underdamped closed-loop configuration. It follows that the closed-loop circuit has a transient step
response plagued by overshoot and a frequency response that displays response peaking within the
closed-loop passband. Observe that underdamping is likely to occur even in critically damped (identical
real open-loop poles) or overdamped (distinct real poles) open-loop amplifiers, which correspond to
zol ¼ 1 and zol > 1, respectively, when a large zero-frequency loop gain is exploited.
Underdamped closed-loop amplifiers are not unstable systems, but they are nonetheless unacceptable.
From a practical design perspective, closed-loop underdamping predicted by relatively simple mathe-
matical models of the loop gain portend undesirable amplifier responses or even closed-loop instability.
The problem is that simple transfer function models invoked in a manual circuit analysis are oblivious to
presumably second-order parasitic circuit layout and device model energy storage elements with effects
that include a deterioration of phase and gain margins.
1.4.3 Frequency Invariant Feedback Factor

Let the open-loop amplifier be overdamped, such that its real satisfy the relationship
p2 ¼ k2 p1 (1:24)
If the open-loop amplifier pole p1 is dominant, k2 is a real number that is greater than the magnitude,
jGo(0)j, of the open-loop zero-frequency gain, which is presumed to be much larger than one. As a result,
the open-loop damping factor in Equation 1.16 reduces to zo1 k=2. With k2 > jGo(0)j 1, which
formally reflects the dominant pole approximation, the 3 dB bandwidth Bol of the open-loop amplifier is
given approximately by [15]

vnol 1 k2
Bol ¼ ¼ p1 (1:25)
2zol p11 þ p12 k2 þ 1
As expected, Equation 1.25 predicts an open-loop 3 dB bandwidth that is only slightly smaller than the
frequency of the open-loop dominant pole.
The frequency, z, in Equation 1.23 is infinitely large if frequency invariant degenerative feedback is
applied around an open-loop amplifier. For a critically damped or overdamped closed-loop amplifier,
zcl > 1. Assuming open-loop pole dominance, this constraint imposes the open-loop pole requirement,
p2
4½1 þ T(0) (1:26)
p1
Thus, for large zero-frequency loop gain, T(0), an underdamped closed-loop response is avoided if and
only if the frequency of the nondominant open-loop pole is substantially larger than that of the dominant
open-loop pole. Unless frequency compensation measures are exploited in the open loop, Equation 1.26
is difficult to satisfy, especially if feedback is implemented expressly to realize a substantive desensitiza-

tion of response with respect to open-loop parameters. On the chance that Equation 1.26 can be satisfied,
and if the closed-loop amplifier emulates a dominant pole response, the closed-loop bandwidth is, using
Equations 1.22, 1.23, and 1.25,
vncl
Bcl ½1 þ T(0)Bol ½1 þ T(0)p1 (1:27)
2zcl
Observe from Equations 1.26 and 1.27 that the maximum possible closed-loop 3 dB bandwidth is 2
octaves below the minimum acceptable frequency of the nondominant open-loop pole.
Although Equation 1.27 theoretically confirms the broadbanding property of negative feedback
amplifiers, the attainment of very large closed-loop 3 dB bandwidths is nevertheless a challenging
undertaking. The problem is that Equation 1.26 is rarely satisfied. As a result, the open-loop configur-
ation must be suitably compensated, usually by pole splitting methodology [16–18], to force the validity
of Equation 1.26. However, the open-loop poles are not mutually independent, so any compensation that
increases p2 is accompanied by decreases in p1. The pragmatic upshot of the matter is that the closed-loop
3 dB bandwidth is not directly proportional to the uncompensated value of p1 but instead, it is
proportional to the smaller, compensated value of p1.
1.4.4 Frequency Variant Feedback Factor (Compensation)

Consider now the case where the frequency, z, of the compensating feedback zero is finite and positive.
Equation 1.23 underscores the stabilizing property of a left-half-plane feedback zero in that a sufficiently
small positive z renders a closed-loop damping factor zcl that can be p
made
ffiffiffi acceptably large, regardless of
the value of the open-loop damping factor zol. To this end, zcl > 1= 2 is a desirable design objective in
that it ensures a monotonically decreasing closed-loop frequency response. If, as is usually a design goal,
pffiffiffi
the open-loop amplifier subscribes to pole dominance, Equation 1.23 translates the objective, zcl > 1= 2,
into the design constraint
h i
T(0)
1þT(0)vncl
z pffiffiffi vncl
(1:28)
2 ½1þT(0) Bol
where use is made of Equation 1.25 to cast zpinffiffiffi terms of the open-loop bandwidth Bol. When the closed-
loop damping factor is precisely equal to 1= 2 a maximally flat magnitude closed-loop response results
for which the 3 dB bandwidth is vncl. Equation 1.28 can then be cast into the more useful form
GBPol
zGcl (0) ¼ pffiffiffi (1:29)
2 GBPGBPcl 1
ol
where Equation 1.20 is exploited, GBPol is the gain-bandwidth product of the open-loop circuit, and
GBPcl is the gain-bandwidth product of the resultant closed-loop network.
For a given open-loop gain-bandwidth product GBPol, a desired low-frequency closed-loop gain,
Gcl(0), and a desired closed-loop gain-bandwidth product, GBPcl, Equation 1.29 provides a first-order
estimate of the requisite feedback compensation zero. Additionally, note that Equation 1.29 imposes an
upper limit on the achievable high-frequency performance of the closed-loop configuration. In particular,
because z must be positive to ensure acceptable closed-loop damping, Equation 1.29 implies
GBPcl
GBPol > pffiffiffi (1:30)
2
In effect, Equation 1.30 imposes a lower limit on the required open-loop GBP commensurate with
feedback compensation implemented to achieve a maximally flat, closed-loop frequency response.
1.5 Pole Splitting Open-Loop Compensation

Equation 1.26 underscores the desirability of achieving an open-loop dominant pole frequency response
in the design of a feedback network. In particular, Equation 1.26 shows that if the ultimate design goal is a
closed-loop dominant pole frequency response, the frequency, p2, of the nondominant open-loop
amplifier pole must be substantially larger than its dominant pole counterpart, p1. Even if closed-loop
pole dominance is sacrificed as a trade-off for other performance merits, open-loop pole dominance is
nonetheless a laudable design objective. This contention follows from Equations 1.16 and 1.23, which
combine to suggest that the larger p2 is in comparison to p1, the larger is the open-loop damping
factor. In turn, the unacceptably underdamped closed-loop responses that are indicative of small, closed-
loop damping factors are thereby eliminated. Moreover, Equation 1.23 indicates that larger, open-loop
damping factors impose progressively less demanding restrictions on the feedback compensation zero
that may be required to achieve acceptable closed-loop damping. This observation is important because
in an actual circuit design setting, small z in Equation 1.23 generally translates into a requirement of a
correspondingly large RC time constant, where implementation may prove difficult in monolithic circuit
applications.
Unfortunately, many amplifiers, and particularly broadbanded amplifiers, earmarked for use as open-
loop cells in degenerative feedback networks, are not characterized by dominant pole frequency
responses. The frequency response of these amplifiers is therefore optimized in accordance with a
standard design practice known as pole splitting compensation. Such compensation entails the connec-
tion of a small capacitor between two high impedance, phase-inverting nodes of the open-loop topology
[17,19–21]. Pole splitting techniques increase the frequency p2 of the uncompensated nondominant
open-loop pole to a compensated value, say p2c. The frequency, p1, of the uncompensated dominant open-
loop pole is simultaneously reduced to a smaller frequency, say plc. Although these pole frequency
translations complement the design requirement implicit to Equations 1.23 and 1.26, they do serve to
limit the resultant closed-loop bandwidth, as discussed earlier. As highlighted next, they also impose
other performance limitations on the open loop.
1.5.1 Open-Loop Amplifier

The engineering methods, associated mathematics, and engineering trade-offs underlying pole splitting
compensation are best revealed in terms of the generalized, phase-inverting linear network abstracted in
Figure 1.5. Although this amplifier may comprise the entire open-loop configuration, in the most general
case, it is an interstage of the open loop. Accordingly, Rst in this diagram is viewed as the Thévenin
equivalent resistance of either an input signal source or a preceding amplification stage. The response to
the Thévenin driver, Vst, is the indicated output voltage, Vl, which is developed across the Thévenin load
resistance, Rlt, seen by the stage under investigation. Note that the input current conducted by the
amplifier is Is, while the current flowing into the output port of the unit is denoted as Il. The dashed
branch containing the capacitor Cc, which is addressed later, is the pole splitting compensation element.
Because the amplifier under consideration is linear, any convenient set of two-port parameters can be
used to model its terminal volt–ampere characteristics. Assuming the existence of the short-circuit
admittance, or y parameters,

Is y y12 Vi
¼ 11 (1:31)
Il y21 y2 Vl
Cc
Vi Vl
Is Il
Rst Phase-
inverting Rlt
+ linear
Vst amplifier
–
FIGURE 1.5 Linear amplifier for which a pole splitting compensation capacitance Cc is incorporated.
Defining
D
yo ¼ y11 þ y12
D
yo ¼ y22 þ y12
(1:32)
D
yf ¼ y21 þ y12
D
yr ¼ y12
Equation 1.31 implies
Is ¼ yi Vi þ yr (Vi Vl ) (1:33)
Il ¼ yf Vi þ yo V1 þ yr (Vl Vi ) (1:34)
The last two expressions produce the y-parameter model depicted in Figure 1.6a, in which yi represents
an effective shunt input admittance, yo is a shunt output admittance, yf is a forward transadmittance, and
yr reflects voltage feedback intrinsic to the amplifier.
Amplifiers amenable to pole splitting compensation have capacitive input and output admittances;
that is, yi and yo are of the form
Vi Is Il Vl Vi Is Cr Il Vl
yr
Rst Rst
+ yi yf Vi yo Rlt + Ri Ci GfVi Ro Co Rlt
Vst Vst
– –
(a) (b)
FIGURE 1.6 y-Parameter equivalent circuit of the phase-inverting linear amplifier in Figure 1.5. (b) Approximate
form of the model in (a).
1
yi ¼ þ sCi
Ri
(1:35)
1
yo ¼ þ sCo
Ro
Similarly,
yf ¼ Gf sCf
1 (1:36)
yr ¼ þ sCr
Rr
In Equation 1.36, the conductance component Gf of the forward transadmittance yf positive in a phase-
inverting amplifier. Moreover, the reactive component –sCf of yf produces an excess phase angle, and
hence, a group delay, in the forward gain function. This component, which deteriorates phase margin,
can be ignored to first order if the signal frequencies of interest are not excessive in comparison to the
upper-frequency limit of performance of the amplifier. Finally, the feedback internal to many practical
amplifiers is predominantly capacitive so that the feedback resistance Rr can be ignored. These approxi-
mations allow the model in Figure 1.6a to be drawn in the form offered in Figure 1.6b.
It is worthwhile interjecting that the six parameters indigenous to the model in Figure 1.6b need not be
deduced analytically from the small-signal models of the active elements embedded in the subject
interstage. Instead, SPICE can be exploited to evaluate the y parameters in Equation 1.31 at the pertinent
biasing level. Because these y parameters display dependencies on signal frequency, care should be
exercised to evaluate their real and imaginary components in the neighborhood of the open loop, 3 dB
bandwidth to ensure acceptable computational accuracy at high frequencies. Once the y parameters in
Equation 1.31 are deduced by computer-aided analysis, the alternate admittance parameters in Equation
1.23, as well as numerical estimates for the parameters, Ri, Ci, Ro, Co, Cr, and Gf, in Equations 1.35 and
1.36 follow straightforwardly.
1.5.2 Pole Splitting Analysis

An analysis of the circuit in Figure 1.6b produces a voltage transfer function Av(s) of the form
2 3
Vl (s) 1 zsr
Av (s) ¼ ¼ Av (0)4 5 (1:37)
Vst (s) 1 þ ps1 1 þ ps2
Letting
Rll ¼ Rlt kRo (1:38)
an inspection of the circuit in Figure 1.6b confirms that

Ri
Av (0) ¼ Gf Rll (1:39)
Ri þ Rst
is the zero-frequency voltage gain. Moreover, the frequency, zr, of the right-half-plane zero is
Gf
zr ¼ (1:40)
Cr
The lower pole frequency, p1, and the higher pole frequency, p2, derive implicitly from
1 1
þ ¼ Rll (Co þ Cr ) þ Rss ½Ci þ (1 þ Gf Rll )Cr (1:41)
p1 p2
and

1 Co þ Ci
¼ Rss Rll Co Ci þ Cr (1:42)
p1 p2 Co
where
D
Rss ¼ Rst ¼ Ri (1:43)
Most practical amplifiers, and particularly amplifiers realized in bipolar junction transistor technology,
have very large forward transconductance, Gf, and small internal feedback capacitance, Cr. The combin-
ation of large Gf and small Cr renders the frequency in Equation 1.40 so large as to be inconsequential to
the passband of interest. When utilized in a high-gain application, such as the open-loop signal path of a
feedback amplifier, these amplifiers also operate with a large effective load resistance, Rll. Accordingly,
Equation 1.41 can be used to approximate the pole frequency p1 as
1
p1 (1:44)
Rss ½Ci þ (1 þ Gf Rll )Cr
Substituting this result into Equation 1.42, the approximate frequency p2 of the high-frequency pole is
Ci þ (1 þ Gf Rll )Cr
p2 h i (1:45)
Rll Co Ci þ CoCþC
o
i
Cr
Figure 1.7 illustrates asymptotic frequency responses corresponding to pole dominance and to a two-pole
response. Figure 1.7a depicts the frequency response of a dominant pole amplifier, which does not
|Av( jω)| |Av( jω)|
|Av(0)| |Av(0)|
Sl
op
e:
–2
Sl
op
0
dB
e:
–2
/d
ec
0
dB
/d
ec
P2
1 ω 1 ω
P1 ωu P1 P2 ωu
– 40
– 40
dB/
dec
dB/
dec
(a) (b)
FIGURE 1.7 (a) Asymptotic frequency response for a dominant pole amplifier. Such an amplifier does not require
pole splitting compensation because the two lowest frequency amplifier poles, p1 and p2, are already widely separated.
(b) Frequency response of an amplifier with high-frequency response that is strongly influenced by both of its lowest
frequency poles. The basic objective of pole splitting compensation is to transform the indicated frequency response
to a form that emulates that depicted in (a).
require pole splitting compensation. Observe that its high-frequency response is determined by a single
pole (p1 in this case) through the signal frequency at which the gain ultimately degrades to unity. In this
interpretation of a dominant pole amplifier, p2 is not only much larger than p1, but is in fact larger than
the unity gain frequency, which is indicated as vu in the figure. This unity gain frequency, which can be
viewed as an upper limit to the useful passband of the amplifier, is approximately, jAv(0)jp1. To the extent
that p1 is essentially the 3 dB bandwidth when p2 p1, the unity gain frequency is also the GBP of the
D
subject amplifier. In short, with jAv (jvu )j ¼ 1, p2 p1 in Equation 1.37 implies
vu jAv (0)jp1 GBP (1:46)
The contrasting situation of a response indigenous to the presence of two significant open-loop poles is
illustrated in Figure 1.7b. In this case, the higher pole frequency p2 is smaller than vu and hence, the
amplifier does not emulate a single-pole response throughout its theoretically useful frequency range. The
two critical frequencies, p1 and p2, remain real numbers, and as long as p2 6¼ p1, the corresponding
damping factor, is greater than 1. However, the damping factor of the two-pole amplifier (its response is
plotted in Figure 1.7b) is nonetheless smaller than that of the dominant pole amplifier. It follows that, for
reasonable loop gains, unacceptable underdamping is more likely when feedback is invoked around the
two-pole amplifier, as opposed to the same amount of feedback applied around a dominant pole
amplifier. Pole splitting attempts to circumvent this problem by transforming the pole conglomeration
of the two-pole amplifier into one that emulates the dominant pole situation inferred by Figure 1.7a.
To the foregoing end, append the compensation capacitance Cc between the input and the output ports
of the phase-inverting linear amplifier, as suggested in Figure 1.5. With reference to the equivalent circuit
in Figure 1.6b, the electrical impact of this additional element is the effective replacement of the internal
feedback capacitance Cr by the capacitance sum (Cr þ Cc). Letting
D
Cp ¼ Cr þ Cc (1:47)
it is apparent that Equations 1.40 through 1.42 remain applicable, provided that Cr in these relationships
is supplanted by Cp. Because Cp is conceivably significantly larger than Cc, however, the approximate
expressions for the resultant pole locations differ from those of Equations 1.44 and 1.45. In particular, a
reasonable approximation for the compensated value, say P1c, of the lower pole frequency is now
1
p1c (1:48)
½Rll þ (1 þ Gf Rll )Rss Cp
while the higher pole frequency, p2c, becomes
1
p2c (1:49)
Rss kRll k G1f (Co þ Ci )
Clearly, p1c < p1 and p2c > p2. Moreover, for large Gf, p2c is potentially much larger than p1c. It should also
be noted that the compensated value, say, zrc, of the right-half-plane zero is smaller than its uncompen-
sated value, zr, because Equation 1.40 demonstrates that

Gf Cr
zrc ¼ ¼ zr (1:50)
Cp Cr þ Cc
Although zrc can conceivably exert a significant influence on the high-frequency response of the
compensated amplifier, the following discussion presumes tacitly that zrc > p2c [2].
Assuming a dominant pole frequency response, the compensated unity gain frequency, vuc, is, using
Equations 1.39, 1.46, and 1.48,

1 1
vuc jAv (0)jp1c Gf Rss kRll k (1:51)
Rst Cp Gf
It is interesting to note that

1
vuc < (1:52)
Rst Cp
that is, the unity gain frequency is limited by the inverse of the RC time constant formed by the Thévenin
source resistance Rst and the net capacitance Cp appearing between the input port and the phase inverted
output port. The subject inequality comprises a significant performance limitation, for if p2c is indeed
much larger than pic, vuc is approximately the GBP of the compensated cell. Accordingly, for a given
source resistance, a required open-loop gain, and a desired open-loop bandwidth, Equation 1.52 imposes
an upper limit on the compensation capacitance that can be exploited for pole splitting purposes.
In order for the compensated amplifier to behave as a dominant pole configuration, p2c must exceed
vuc, as defined by Equation 1.51. Recalling Equation 1.49, the requisite constraint is found to be

1 2
Rst Cp > Gf Rss kRll k (Co þ Ci ) (1:53)
Gf
Assuming Gf (Rss=Rll) 1, Equation 1.53 reduces to the useful simple form
Co þ Ci
Cf Rst > (1:54)
Cp
which confirms the need for large forward transconductance Gf if pole splitting is to be an effective
compensation technique.
1.6 Summary
The use of negative feedback is fundamental to the design of reliable and reproducible analog electronic
networks. Accordingly, this chapter documents the salient features of the theory that underlies the
efficient analysis and design of commonly used feedback networks. Four especially significant points
are postulated in this section.
1. By judiciously exploiting signal flow theory, the classical expression, Equation 1.1, for the I=O
transfer relationship of a linear feedback system is rendered applicable to a broad range of
electronic feedback circuits. This expression is convenient for design-oriented analysis because it
clearly identifies the open-loop gain, Go, and the loop gain, T. The successful application of signal
flow theory is predicated on the requirement that the feedback factor, to which T is proportional
and that appears in the signal flow literature as a ‘‘critical’’ or ‘‘reference’’ parameter, can be
identified in a given feedback circuit.
2. Signal flow theory, as applied to electronic feedback architectures, proves to be an especially
expedient analytical tool because once the loop gain T is identified, the driving-point input and
output impedances follow with minimal additional calculations. Moreover, the functional depend-
ence of T on the Thévenin source and terminating load impedances unambiguously brackets the
magnitudes of the driving point I=O impedances attainable in particular types of feedback arrange-
ments.
3. Damping factor concept is advanced herewith as a simple way of assessing the relative stability of
both the open and closed loops of a feedback circuit. The open-loop damping factor derives
directly from the critical frequencies of the open-loop gain, while these frequencies and any zeros
appearing in the loop gain unambiguously define the corresponding closed-loop damping factor.
Signal flow theory is once again used to confirm the propensity of closed loops toward instability
unless the open-loop subcircuit functions as a dominant pole network. Also confirmed is the
propriety of the common practice of implementing a feedback zero as a means of stabilizing an
otherwise potentially unstable closed loop.
4. Pole splitting as a means to achieve dominant pole open-loop responses is definitively discussed.
Generalized design criteria are formulated for this compensation scheme, and limits of perform-
ance are established. Of particular interest is the fact that pole splitting limits the GBP of the
compensated amplifier to a value that is determined by a source resistance–compensation capaci-
tance time constant.
References
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Signal Process., 1, 33–44, Sept. 1991.
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2
Feedback Amplifier
Configurations
2.1 Introduction ................................................................................ 2-1
2.2 Series–Shunt Feedback Amplifier........................................... 2-2
Circuit Modeling and Analysis . Feed-Forward Compensation
2.3 Shunt–Series Feedback Amplifier......................................... 2-10
2.4 Shunt–Shunt Feedback Amplifier ........................................ 2-12
Circuit Modeling and Analysis . Design Considerations
2.5 Series–Series Feedback Amplifier ......................................... 2-16
2.6 Dual-Loop Feedback ............................................................... 2-20
Series–Series=Shunt–Shunt Feedback Amplifier .
Series–Shunt=Shunt–Series Feedback Amplifier

John Choma, Jr. 2.7 Summary.................................................................................... 2-28
University of Southern California References ............................................................................................ 2-29
2.1 Introduction
Four basic types of single-loop feedback amplifiers are available: the series–shunt, shunt–series, shunt–
shunt, and series–series architectures [1]. Each of these cells is capable of a significant reduction of the
dependence of forward transfer characteristics on the ill-defined or ill-controlled parameters implicit to
the open-loop gain; but none of these architectures can simultaneously offer controlled driving-point
input and output impedances. Such additional control is afforded only by dual global loops comprised of
series and=or shunt feedback signal paths appended to an open-loop amplifier [2,3]. Only two types of
global dual-loop feedback architectures are used: the series–series=shunt–shunt feedback amplifier and
the series–shunt=shunt–series feedback amplifier.
Although only bipolar technology is exploited in the analysis of the aforementioned four single-loop
and two dual-loop feedback cells, all disclosures are generally applicable to metal-oxide-silicon (MOS),
heterostructure bipolar transistor (HBT), and III–V compound metal-semiconductor field-effect tran-
sistor (MESFET) technologies. All analytical results derive from an application of a hybrid, signal
flow=two-port parameter analytical tack. Because the thought processes underlying this technical
approach apply to all feedback circuits, the subject analytical procedure is developed in detail for only
the series–shunt feedback amplifier.
2-1
2.2 Series–Shunt Feedback Amplifier

2.2.1 Circuit Modeling and Analysis
Figure 2.1a depicts the ac schematic diagram (a circuit diagram divorced of biasing details) of a series–
shunt feedback amplifier. In this circuit, the output voltage VO, which is established in response to a
single source represented by the Thévenin voltage VST, and the Thévenin resistance, RST, is sampled by
the feedback network composed of the resistances, REE and RF. The sampled voltage is fed back in such a
way that the closed-loop input voltage, VI, is the sum of the voltage, V1A, across the input port of the
amplifier and the voltage V1F, developed across REE in the feedback subcircuit. Because VI ¼ V1A þ V1F,
the output port of the feedback configuration can be viewed as connected in series with the amplifier
input port. On the other hand, output voltage sampling constrains the net load current, IO, to be the
algebraic sum of the amplifier output port current, I2A, and the feedback network input current, I2F.
Accordingly, the output topology is indicative of a shunt connection between the feedback subcircuit and
the amplifier output port. The fact that voltage is fed back to a voltage-driven input port renders the
driving-point input resistance, Rin, of the closed-loop amplifier large, whereas the driving-point output
resistance, Rout, seen by the terminating load resistance, RLT, is small. The resultant closed-loop amplifier
Rout
I2A VO
Rin IO
Q2 I2F
I1A VI
Q1 R RLT
+
RST V1A
+ – I1F
VST
+ RF
–
V1F REE
–
Feedback
(a) network
Rin
rb Rout
VI rb I2A VO
I1A IV
RST + IO
rπ βI1A R rπ βIV
+
I2F RLT
VST V1A re
– re
(β + 1)I1A = I1F
–
+ RF
V1F REE
– Feedback
network
(b)
FIGURE 2.1 (a) AC schematic diagram of a bipolar series–shunt feedback amplifier. (b) Low-frequency small-
signal equivalent circuit of the feedback amplifier.
Feedback Amplifier Configurations 2-3
is therefore best suited for voltage amplification, in the sense that the closed-loop voltage gain, VO=VST,
can be made approximately independent of source and load resistances. For large loop gain, this voltage
transfer function is also nominally independent of transistor parameters.
Assuming that transistors Q1 and Q2 are identical devices that are biased identically, Figure 2.1b is the
applicable low-frequency equivalent circuit. This equivalent circuit exploits the hybrid-p model [4] of a
bipolar junction transistor, subject to the proviso that the forward Early resistance [5] used to emulate
base conductivity modulation is sufficiently large to warrant its neglect. Because an infinitely large
forward Early resistance places the internal collector resistance (not shown in the figure) of a bipolar
junction transistor in series with the current-controlled current source, this collector resistance can be
ignored as well.
The equivalent circuit of Figure 2.1b can be reduced to a manageable topology by noting that the ratio
of the signal current, IV, flowing into the base of transistor Q2 to the signal current, I1A, flowing into the
base of transistor Q1 is
IV D bR aR
¼ Kb ¼ ¼ (2:1)
I1A R þ rb þ rp þ (b þ 1)re rib þ (1 a)R
where
b
a¼ (2:2)
bþ1
is the small-signal, short-circuit common base current gain, and
rp þ rb
rib ¼ re þ (2:3)
bþ1
symbolizes the short-circuit input resistance of a common base amplifier. It follows that the current
source bIv in Figure 2.1b can be replaced by the equivalent current (bKbI1A).
A second reduction of the equivalent circuit in Figure 2.1b results when the feedback subcircuit is
replaced by a model that reflects the h-parameter relationships

V1F hif hrf I1F
¼ (2:4)
I2F hff hof VO
where
V1F(VO) represents the signal voltage developed across the output (input) port of the feedback
subcircuit
I1F(I2F) symbolizes the corresponding current flowing into the feedback output (input) port
Although any homogeneous set of two-port parameters can be used to model the feedback subcircuit,
h-parameters are the most convenient selection herewith. In particular, the feedback amplifier undergo-
ing study is a series–shunt configuration. The h-parameter equivalent circuit represents its input port as a
Thévenin circuit and its input port as a Norton configuration, therefore, the h-parameter equivalent
circuit is likewise a series–shunt structure.
For the feedback network at hand, which is redrawn for convenience in Figure 2.2a, the h-parameter
equivalent circuit is as depicted in Figure 2.2b. The latter diagram exploits the facts that the short-circuit
input resistance hif is a parallel combination of the resistance REE and RF, and the open-circuit output
conductance hof, is 1=(REE þ RF). The open-circuit reverse voltage gain hrf is
REE
hrf ¼ (2:5)
REE þ RF
I1F I2F
V1F VO
RF
REE
(a)
I1F REE //RF I2F

V1F VO
= (β + 1)I1A +
hrf VO hff I1F REE + RF
–
(b)
I1F REE//RF I2F

V1F VO
= (β + 1)I1A +
f VO f (β + 1)I1A REE +RF
–
(c)
FIGURE 2.2 (a) Feedback subcircuit in the series–shunt feedback amplifier of Figure 2.1a. (b) h-Parameter
equivalent circuit of the feedback subcircuit. (c) Alternative form of the h-parameter equivalent circuit.
while the short-circuit forward current gain hff is
REE
hff ¼ ¼ hrf (2:6)
REE þ RF
Figure 2.2c modifies the equivalent circuit in Figure 2.2b in accordance with the following two argu-
ments. First, hrf in Equation 2.5 is recognized as the fraction of the feedback subcircuit input signal that is
fed back as a component of the feedback subcircuit output voltage, V1F. But this subcircuit input voltage
is identical to the closed-loop amplifier output signal VO. Moreover, V1F superimposes with the Thévenin
input signal applied to the feedback amplifier to establish the amplifier input port voltage, V1A. It follows
that hrf is logically referenced as a feedback factor, say f, of the amplifier under consideration; that is,
REE D
hrf ¼ ¼f (2:7)
REE þ RF
and by Equation 2.6,
REE
hff ¼ ¼ f (2:8)
REE þ RF
Second, the feedback subcircuit output current, I1F, is, as indicated in Figure 2.1b, the signal current,
(b þ 1)I1A. Thus, in the model of Figure 2.2b,
hff I1F ¼ f (b þ 1)I1A (2:9)

Rin Rout
VI rb IN VO
I1A
RST rπ Kβ β I1A f (β + 1)I1A REE + RF RLT

+
VST
re
–
(β + 1)I1A
β I1A
REE//RF
+
f VO
–
FIGURE 2.3 Modified small-signal model of the series–shunt feedback amplifier.
If the model in Figure 2.2c is used to replace the feedback network in Figure 2.1b the equivalent circuit
of the series–shunt feedback amplifier becomes the alternative structure offered in Figure 2.3. In arriving
at this model, care has been exercised to ensure that the current flowing through the emitter of transistor
Q1 is (b þ 1)I1A. It is important to note that the modified equivalent circuit delivers transfer and driving-
point impedance characteristics that are identical to those implicit to the equivalent circuit of Figure 2.1b.
In particular, the traditional analytical approach to analyzing a series–shunt feedback amplifier tacitly
presumes the satisfaction of the Brune condition [6] to formulate a composite structure where the
h-parameter matrix is the sum of the respective h-parameter matrices for the open loop and feedback
circuits. In contrast, the model of Figure 2.3 derives from Figure 2.1b without invoking the Brune
requirement, which is often not satisfied. It merely exploits the substitution theorem; that is, the feedback
network in Figure 2.1b is substituted by its h-parameter representation.
In addition to modeling accuracy, the equivalent circuit in Figure 2.3 boasts at least three other
advantages. The first is an illumination of the vehicle by which feedback is implemented in the series–
shunt configuration. This vehicle is the voltage-controlled voltage source, fVO, which feeds back a
fraction of the output signal to produce a branch voltage that algebraically superimposes with, and
thus modifies, the applied source voltage effectively seen by the input port of the open-loop amplifier.
Thus, with f ¼ 0, no feedback is evidenced, and the model at hand emulates an open-loop configuration.
But even with f ¼ 0, the transfer and driving-point impedance characteristics of the resultant open-loop
circuit are functionally dependent on the feedback elements, REE and RF, because appending the feedback
network to the open-loop amplifier incurs additional impedance loads at both the input and the output
ports of the amplifier.
The second advantage of the subject model is its revelation of the magnitude and nature of feed-
forward through the closed loop. In particular, note that the signal current, IN, driven into the effective
load resistance comprised of the parallel combination of (REE þ RF) and RLT, is the sum of two current
components. One of these currents, bKbI1A, materializes from the transfer properties of the two
transistors utilized in the amplifier. The other current, f(b þ 1)I1A, is the feed-forward current resulting
from the bilateral nature of the passive feedback network. In general, negligible feed-forward through the
feedback subcircuit is advantageous, particularly in high-frequency signal-processing applications. To
this end, the model in Figure 2.3 suggests the design requirement,
f aKb (2:10)
When the resistance, R, in Figure 2.1a is the resistance associated with the output port of a PNP current
source used to supply biasing current to the collector of transistor Q1 and the base of transistor Q2, Kb
approaches b, and Equation 2.10 is easily satisfied; however, PNP current sources are undesirable in
broadband low-noise amplifiers. In these applications, the requisite biasing current must be supplied by a
passive resistance, R, connected between the positive supply voltage and the junction of the Q1 collector and
the Q2 base. Unfortunately, the corresponding value of Kb can be considerably smaller than b, with the result
that Equation 2.10 may be difficult to satisfy. Circumvention schemes for this situation are addressed later.
A third attribute of the model in Figure 2.3 is its disposition to an application of signal flow theory. For
example, with the feedback factor f selected as the reference parameter for signal flow analysis, the open-
loop voltage gain Gvo(RST, RLT), of the series–shunt feedback amplifier is computed by setting f to zero.
Assuming that Equation 2.10 is satisfied, circuit analysis reveals this gain as

(REE þ RF )kRLT
Gvo (RST , RLT ) ¼ aKb (2:11)
rib þ (1 a)RST þ (REE kRF )
The corresponding input and output driving-point resistances, Rino and Routo, respectively, are
Rino ¼ rB þ rp þ (b þ 1)(rE þ REE kRF ) (2:12)
and
Routo ¼ REE þ RF (2:13)
It follows that the closed-loop gain Gv(RST, RLT) of the series–shunt feedback amplifier is
Gvo (RST , RLT )

Gv (RST , RLT ) ¼ (2:14)
1þT
where the loop gain T is

REE
T ¼ fGvo (RST , RLT ) ¼ Gvo (RST , RLT )
REE þ RF

REE RLT
¼ aKb (2:15)
REE þ RF þ RLT rib þ (1 a)RST þ (REE kRF )
For T 1, which mandates a sufficiently large Kb in Equation 2.11, the closed-loop gain collapses to
1 RF
Gv (RST , RLT ) ¼1þ (2:16)
f REE
which is independent of active element parameters. Moreover, to the extent that T 1 the series–shunt
feedback amplifier behaves as an ideal voltage-controlled voltage source in the sense that its closed-loop
voltage gain is independent of source and load terminations. The fact that the series–shunt feedback
network behaves approximately as an ideal voltage amplifier implies that its closed-loop driving-point
input resistance is very large and its closed-loop driving-point output resistance is very small. These facts
are confirmed analytically by noting that
Rin ¼ Rino ½1 þ fGvo (0, RL ) fRino Gvo (0, RL )

REE
¼ bKb RLT (2:17)
REE þ RF þ RLT
and
Routo Routo
Rout ¼
1 þ fGvo (RS , 1) fGvo (RS , 1)

RF rib þ (1 a)RST þ REE kRF
¼ 1þ (2:18)
REE aKb
To the extent that the interstage biasing resistance, R, is sufficiently large to allow Kb to approach b,
observe that Rin in Equation 2.17 is nominally proportional to b2, while Rout in Equation 2.18 is inversely
proportional to b.
2.2.2 Feed-Forward Compensation

When practical design restrictions render the satisfaction of Equation 2.10 difficult, feed-forward problems
can be circumvented by inserting an emitter follower between the output port of transistor Q2 in the circuit
diagram of Figure 2.1a and the node to which the load termination and the input terminal of the feedback
subcircuit are incident [2]. The resultant circuit diagram, inclusive now of simple biasing subcircuits, is shown
in Figure 2.4. The buffer transistor Q3 increases the original short-circuit forward current gain, Kbb, of the
open-loop amplifier by a factor approaching (b þ 1), while not altering the feed-forward factor implied by the
feedback network in Figure 2.1a. In effect, Kb is increased by a factor of almost (b þ 1), thereby making
Equation 2.10 easy to satisfy. Because of the inherently low output resistance of an emitter follower, the buffer
also reduces the driving-point output resistance achievable by the original configuration.
The foregoing contentions can be confirmed through an analysis of the small-signal model for the
modified amplifier in Figure 2.4. Such an analysis is expedited by noting that the circuit to the left of the
current-controlled current source, KbbI1A, in Figure 2.3 remains applicable. For zero feedback, it follows
that the small-signal current I1A flowing into the base of transistor Q1 derives from

I1A 1a
¼ (2:19)
VST f ¼0 rib þ (1 a)RST þ (REE kRF )
The pertinent small-signal model for the buffered series–shunt feedback amplifier is resultantly the
configuration offered in Figure 2.5.
+VOC
R1
R Q3
Rin Q2
Rout
Q1
VO
RST
RF
+ REE R2
RLT
VST
–VEE
–
FIGURE 2.4 Series–shunt feedback amplifier that incorporates an emitter follower output stage to reduce the
effects of feed-forward through the feedback network.
Rin
VI rb
I1A
RST rπ
+
VST
re
–
(β + 1)I1A
βI1A
REE//RF
+
f VO
–
rb
Kβ β I1A R1 rπ βI
I
Rout
re
VO
f (β + 1)I1A R2 REE+RF RLT
FIGURE 2.5 Small-signal model of the buffered series–shunt feedback amplifier.
Letting
R0 ¼ R2 k(REE þ RF )kRLT (2:20)
an analysis of the structure in Figure 2.5 reveals

VO R0
¼ (b þ 1) 0 aKb R1 þ f ½rib þ (1 a)R1 (2:21)
I1A R þ rib þ (1 a)R1
which suggests negligible feed-forward for
aKb R1
f (2:22)
rib þ (1 a)R1
Note that for large R1, Equation 2.22 implies the requirement f bKb, which is easier to satisfy than is
Equation 2.10. Assuming the validity of Equations 2.19, 2.21, and 2.22 deliver an open-loop voltage gain,
Gvo(RST, RLT), of

R0 R1
Gvo (RST , RLT ) ¼ aKb (2:23)
rib þ (1 a)RST þ REE kRF R0 þ rib þ (1 a)R1
Recalling Equation 2.1, which demonstrates that Kb approaches b for large R, Equation 2.23 suggests an
open-loop gain that is nominally proportional to b2 if R1 is also large.
Using the concepts evoked by Equations 2.17 and 2.18, the driving-point input and output impedances
can now be determined. In a typical realization of the buffered series–shunt feedback amplifier, the
resistance, R2, in Figure 2.4 is very large because it is manifested as the output resistance of a common
base current sink that is employed to stabilize the operating point of transistor Q3. For this situation, and
assuming the resistance R1 is large, the resultant driving-point input resistance is larger than its
predecessor input resistance by a factor of approximately (b þ 1). Similarly, it is easy to show that for
large R1 and large R2, the driving-point output resistance is smaller than that predicted by Equation 2.18
by a factor approaching (b þ 1).
Although the emitter follower output stage in Figure 2.4 all but eliminates feed-forward signal
transmission through the feedback network and increases both the driving-point input resistance and
output conductance, a potential bandwidth penalty is paid by its incorporation into the basic series–
shunt feedback cell. The fundamental problem is that if R1 is too large, potentially significant Miller
multiplication of the base–collector transition capacitance of transistor Q2 materializes. The resultant
capacitive loading at the collector of transistor Q1 is exacerbated by large R, which may produce a
dominant pole at a frequency that is too low to satisfy closed-loop bandwidth requirements. The
bandwidth problem may be mitigated by coupling resistance R1 to the collector of Q2 through a common
base cascode. This stage appears as transistor Q4 in Figure 2.6.
Unfortunately, the use of the common base cascode indicated in Figure 2.6 may produce an open-loop
amplifier with transfer characteristics that do not emulate a dominant pole response. In other words, the
frequency of the compensated pole established by capacitive loading at the collector of transistor Q1 may
be comparable to the frequencies of poles established elsewhere in the circuit, and particularly at the base
node of transistor Q1. In this event, frequency compensation aimed toward achieving acceptable closed-
loop damping can be implemented by replacing the feedback resistor RF with the parallel combination of
RF and a feedback capacitance, say CF, as indicated by the dashed branch in Figure 2.6. The resultant
frequency-domain feedback factor f(s) is
+VOC
R1
Vbias
Q3
Q4
R
Rin Q2
Rout
Q1
CF
RST VO
+
VST –VEE
RF RLT
– REE R2
FIGURE 2.6 Buffered series–shunt feedback amplifier with common base cascode compensation of the common
emitter amplifier formed by transistor Q2. A feedback zero is introduced by the capacitance CF to achieve acceptable
closed-loop damping.
" #
1 þ zs
f (s) ¼ f (2:24)
1 þ fsz
where
f is the feedback factor given by Equation 2.7
z is the frequency of the introduced compensating zero
1
z¼ (2:25)
RF CF
The pole in Equation 2.24 is inconsequential if the closed-loop amplifier bandwidth Bcl satisfies the
restriction, f BclRFCF ¼ Bcl(REEjjRF)CF 1.
2.3 Shunt–Series Feedback Amplifier

Although the series–shunt circuit functions as a voltage amplifier, the shunt–series configuration (see the
ac schematic diagram depicted in Figure 2.7a) is best suited as a current amplifier. In the subject circuit,
IO
Ri Q2
Rout
V1F
Q1 R RLT
I1F I2F
IST RST
V2F
RF
REE
Feedback
network
(a)
Rin
rb rb Rout
V1F
IV IW
IO
IST RST β IV R rπ
rπ
βIW
RLT
I1F re
re
V2F
I2F
f IO REE + RF REE//RF
+
α f V1F
–
-
(b)
FIGURE 2.7 (a) AC schematic diagram of a bipolar shunt–series feedback amplifier. (b) Low-frequency small-
the Q2 emitter current, which is a factor of (1=a) of the output signal current, IO, is sampled by the
feedback network formed of the resistances, REE and RF. The sampled current is fed back as a current in
shunt with the amplifier input port. Because output current is fed back as a current to a current-driven
input port, the resultant driving-point output resistance is large, and the driving-point input resistance is
small. These characteristics allow for a closed-loop current gain, G1(RST, RLT) ¼ IO=IST, that is relatively
independent of source and load resistances and insensitive to transistor parameters.
In the series–shunt amplifier, h-parameters were selected to model the feedback network because the
topology of an h-parameter equivalent circuit is, similar to the amplifier in which the feedback network is
embedded, a series shunt, or Thévenin–Norton, topology. In analogous train of thought compels the use
of g-parameters to represent the feedback network in Figure 2.7a. With reference to the branch variables
defined in the schematic diagram,
" # " #" #
I1F
1
REE þRF REERþR
EE
V1F
¼
F
(2:26)
V2F REE
REE þRF REF kRF I2F
Noting that the feedback network current, I2F, relates to the amplifier output current, IO, in accordance
with
IO
I2F ¼ (2:27)
a
and letting the feedback factor, f, be

1 REE
f ¼ (2:28)
a REE þ RF
the small-signal equivalent circuit of shunt–series feedback amplifier becomes the network diagrammed
in Figure 2.7b. Note that the voltage-controlled voltage source, afV1F, models the feed-forward transfer
mechanism of the feedback network, where the controlling voltage, V1F, is
V1F ¼ ½rb þ rp þ (b þ 1)rc IV ¼ (b þ 1)rib IV (2:29)
An analysis of the model in Figure 2.7b confirms that the second-stage, signal-base current IW relates
to the first-stage, signal-base current Iv as
IW a(R þ frib )
¼ (2:30)
IV rib þ REE kRF þ (1 a)R
For
R
f (2:31)
rib
which offsets feed-forward effects,
IW aR D
¼ Kr (2:32)
IV rib þ REE kRF þ (1 a)R
Observe that the constant Kr tends toward b for large R, as can be verified by an inspection of Figure 2.7b.
Using Equation 2.32, the open-loop current gain, found by setting f to zero, is

IO ¼ aKr RST k(REE þ RF )
GIO (RST , RLT ) ¼ (2:33)
IST f ¼0 rib þ (1 a)½RST k(REE þ RF )
and recalling Equation 2.28, the loop gain T is

1 REE
T ¼ fGIO (RST , RLT ) ¼ GIO (RST , RLT )
a REE þ RF

(2:34)
REE RST
¼ Kr
REE þ RF þ RST rib þ (1 a)½RST k(REE þ RF )
By inspection of the model in Figure 2.7b, the open-loop input resistance, Rino, is
Rino ¼ (REE þ RF )k½(b þ 1)rib (2:35)
and, within the context of an infinitely large Early resistance, the open-loop output resistance, Routo, is
infinitely large.
The closed-loop current gain of the shunt–series feedback amplifier is now found to be

GIO (RST , RLT ) RF
G1 (RST , RLT ) ¼ a 1þ (2:36)
1þT REE
where the indicated approximation exploits the presumption that the loop gain T is much larger than
one. As a result of the large loop-gain assumption, note that the closed-loop gain is independent of the
source and load resistances and is invulnerable to uncertainties and perturbations in transistor param-
eters. The closed-loop output resistance, which exceeds its open-loop counterpart, remains infinitely
large. Finally, the closed-loop driving-point input resistance of the shunt–series amplifier is

Rino RF rib
Rin ¼ 1þ (2:37)
1 þ fGIO (1, RLT ) REE Kr
2.4 Shunt–Shunt Feedback Amplifier

2.4.1 Circuit Modeling and Analysis
The ac schematic diagram of the third type of single-loop feedback amplifier, the shunt–shunt triple, is
drawn in Figure 2.8a. A cascade interconnection of three transistors Q1, Q2, and Q3, forms the open
loop, while the feedback subcircuit is the single resistance, RF. This resistance samples the output voltage,
VO, as a current fed back to the input port. Output voltage is fed back as a current to a current-driven
input port, so both the driving-point input and output resistances are very small. Accordingly, the circuit
operates best as a transresistance amplifier in that its closed-loop transresistance, RM(RST, RLT) ¼ VO=IST,
is nominally invariant with source resistance, load resistance, and transistor parameters.
The shunt–shunt nature of the subject amplifier suggests the propriety of y-parameter modeling of the
feedback network. For the electrical variables indicated in Figure 2.8a,
" #
I1F
1
R1F V1F
¼ RF
(2:38)
I2F R1F 1
RF VO
Feedback
network I1F RF I2F
Rout
VO
Rin
Q1 Q2 Q3
V1F
IST RST R1 R2 RLT
(a)
Rin Rout
V1F VO
I1F IV I2F
KεβIV
IST RST
(β + 1)rib RLT
f VO RF f V1F RF
(b)
FIGURE 2.8 (a) AC schematic diagram of a bipolar shunt–shunt feedback amplifier. (b) Low-frequency small-
which implies that a resistance, RF, loads both the input and the output ports of the open-loop three-stage
cascade. The short-circuit admittance relationship in Equation 2.38 also suggests a feedback factor,
f, given by
1
f ¼ (2:39)
RF
The foregoing observations and the small-signal modeling experience gained with the preceding two
feedback amplifiers lead to the equivalent circuit submitted in Figure 2.8b. For analytical simplicity, the
model reflects the assumption that all three transistors in the open loop have identical small-signal
parameters. Moreover, the constant, Ke, which symbolizes the ratio of the signal-base current flowing
into transistor Q3 to the signal-base current conducted by transistor Q1, is given by

aR1 aR2
Ke ¼ (2:40)
rib þ (1 a)R1 rib þ (1 a)R2
Finally, the voltage-controlled current source, fV1F, accounts for feed-forward signal transmission
through the feedback network. If such feed-forward is to be negligible, the magnitude of this controlled
current must be significantly smaller than KebIv, a current that emulates feed-forward through the open-
loop amplifier. Noting that the input port voltage, V1F, in the present case remains the same as that
specified by Equation 2.29, negligible feed-forward through the feedback network mandates
rib
RF (2:41)
aKe
Because the constant Ke in Equation 2.40 tends toward b2 if R1 and R2 are large resistances, Equation 2.41
is relatively easy to satisfy.
With feed-forward through the feedback network ignored, an analysis of the model in Figure 2.8b
provides an open-loop transresistance, RMO(RST, RLT), of

RF kRST
RMO (RST , RLT ) ¼ aKe (RF kRLT ) (2:42)
rib (1 a)(RF kRST )
while the loop gain is
RMO (RST , RLT )

T ¼ fRMO (RST , RLT ) ¼
RF

RST RF kRST
¼ aKe (2:43)
RST þ RF rib (1 a)(RF kRST )
For T 1, the corresponding closed-loop transresistance RM(RST, RLT) is
RMO (RST , RLT )

RM (RST , RLT ) ¼ RF (2:44)
1þT
Finally, the approximate driving-point input and output resistances are, respectively,

rib RF
Rin 1þ (2:45)
aKe RLT

rib þ (1 a)(RF kRST ) RF
Rout 1þ (2:46)
aKe RST
2.4.2 Design Considerations

Because the shunt–shunt triple uses three gain stages in the open-loop amplifier, its loop gain is
significantly larger than the loop gains provided by either of the previously considered feedback cells.
Accordingly, the feedback triple affords superior desensitization of the closed-loop gain with respect to
transistor parameters and source and load resistances; but the presence of a cascade of three common
emitter gain stages in the open loop of the amplifier complicates frequency compensation and limits
the 3 dB bandwidth. The problem is that, although each common emitter stage approximates a dominant
pole amplifier, none of the critical frequencies in the cluster of poles established by the cascade inter-
connection of these units is likely to be dominant. The uncompensated closed loop is therefore predisposed
to unacceptable underdamping, thereby making compensation via an introduced feedback zero difficult.
At least three compensation techniques can be exploited to optimize the performance of the shunt–
shunt feedback amplifier [3,7–9]. The first of these techniques entail pole splitting of the open-loop
interstage through the introduction of a capacitance, Cc, between the base and the collector terminals of
transistor Q2, as depicted in the ac schematic diagram of Figure 2.9. In principle, pole splitting can be
invoked on any one of the three stages of the open loop; but pole splitting of the interstage is most
desirable because such compensation of the first stage proves effective only for large source resistance.
Moreover, the resultant dominant pole becomes dependent on the source termination. On the other
hand, pole splitting of the third stage produces a dominant pole that is sensitive to load termination.
In conjunction with pole splitting, a feedback zero can be introduced, if necessary, to increase closed-loop
damping by replacing the feedback resistance, RF, by the parallel combination of RF and a feedback
CF
Rout
CC RF
VO
Rin
Q1 Q2 Q3
IST RST R1 R2 RLT
FIGURE 2.9 AC schematic diagram of a frequency-compensated shunt–shunt triple. The capacitance, Cc, achieves
open-loop pole splitting, while the capacitance, CF, implements a compensating feedback network zero.
capacitance, CF, as illustrated in Figure 2.9. This compensation produces left-half-plane zero in the
feedback factor at s ¼ (1=RF).
A second compensation method broadbands the interstage of the open-loop amplifier through local
current feedback introduced by the resistance, RX, in Figure 2.10. Simultaneously, the third stage is
broadbanded by way of a common base cascode transistor Q4. Because emitter degeneration of the
interstage reduces the open-loop gain, an emitter follower (transistor Q5) is embedded between the
feedback network and the output port of the open-loop third stage. As in the case of the series–shunt
feedback amplifier, the first-order effect of this emitter follower is to increase feed-forward signal
transmission through the open-loop amplifier by a factor that approaches (b þ 1).
VO
RF
Rout
Q5
CF
Q4 RLT
Rin
Q1 Q2 Q3
IST RST R1 RX R2
FIGURE 2.10 AC schematic diagram of an alternative compensation scheme for the shunt–shunt triple. Transistor
Q2 is broadbanded by the emitter degeneration resistance RX and transistor Q3 is broadbanded by the common base
cascode transistor Q4. The emitter follower transistor, Q5, minimizes feed-forward signal transmission through the
feedback network.
RF
Rout
Q3A
CF
Rin Q2A R2
Q1A R1
+
IST RST VO RLT
–
Q1B R1
Q2B R2
CF
Q3B
RF
FIGURE 2.11 AC schematic diagram of a differential realization of the compensated shunt–shunt feedback
amplifier. The balanced stage boasts improved bandwidth over its single-ended counterpart because of its use of
only two high-gain stages in the open loop. The emitter follower pair Q3A and Q3B diminishes feed-forward
transmission through the feedback network composed of the shunt interconnection of resistor RF with capacitor CF.
A final compensation method is available if shunt–shunt feedback is implemented as the balanced

differential architecture (see the ac schematic diagram offered in Figure 2.11). By exploiting the antiphase
nature of opposite collectors in a balanced common emitter topology, a shunt–shunt feedback amplifier
can be realized with only two gain stages in the open loop. The resultant closed-loop 3 dB bandwidth is
invariably larger than that of its three-stage single-ended counterpart, because the open loop is now
characterized by only two, as opposed to three, fundamental critical frequencies. Because the forward
gain implicit to two amplifier stages is smaller than the gain afforded by three stages of amplification, a
balanced emitter follower (transistors Q3A and Q3B) is incorporated to circumvent the deleterious
relative effects of feed-forward signal transmission through the feedback network.
2.5 Series–Series Feedback Amplifier

Figure 2.12a is the ac schematic diagram of the series–series feedback amplifier. Three transistors, Q1, Q2,
and Q3, are embedded in the open-loop amplifier, while the feedback subcircuit is the wye configuration
formed of the resistances RX, RY, and RZ. Although it is possible to realize series–series feedback via
emitter degeneration of a single-stage amplifier, the series–series triple offers substantially more loop gain
and thus better desensitization of the forward gain with respect to both transistor parameters and source
and load terminations.
In Figure 2.12a, the feedback wye senses the Q3 emitter current, which is a factor of (1=a) of the output
signal current IO. This sampled current is fed back as a voltage in series with the emitter of Q1. Because
output current is fed back as a voltage to a voltage-driven input port, both the driving-point input and
output resistances are large. The circuit is therefore best suited as a transconductance amplifier in the
sense that for large loop gain, its closed-loop transconductance, GM(RST, RLT) ¼ IO=VST, is almost
independent of the source and load resistances.
The series–series topology of the subject amplifier conduces z-parameter modeling of the feedback
network. Noting the electrical variables delineated in the diagram of Figure 2.12a,

V1F RX þ R Z RZ I1F
¼ (2:47)
V2F RZ RY þ RZ I2F
Equation 2.47 suggests that the open-circuit feedback network resistances loading the emitters of
transistors Q1 and Q3 are (RX þ RZ) and (RY þ RZ), respectively, and the voltage fed back to the emitter
of transistor Q1 is RZI2F. Because the indicated feedback network current I2F is (IO=a), this fed back
voltage is equivalent to (RZIO=a), which suggests a feedback factor, f, of
RZ
f ¼ (2:48)
a
Finally, the feed-forward through the feedback network if RZI1F. Because I1F relates to the signal-base
current IV flowing into transistor Q1 by I1F ¼ (b þ 1)IV, this feed-forward voltage is also expressible
IV IO
Q1 Q2 Q3
Rout
RST R1 R2 RLT
+ I1F I2F
Rin
VST
–
RX RY
V1F RZ V2F
Feedback
(a) network
rb Rout
IV
IW
RST (β+1)rib rπ IO
K1 β IV R2 βIW
+ Rin
V1F RLT
VST
– I1F re
RX +RZ V2F
β IV I2F
+
RY + RZ
f IO
– –
f β IV
+
-
(b)
FIGURE 2.12 (a) AC schematic diagram of a bipolar series–series feedback amplifier. (b) Low-frequency, small-
as (f bIV). The foregoing observations and the hybrid-p method of a bipolar junction transistor
produce the small-signal model depicted in Figure 2.12b. In this model, all transistors are presumed to
have identical corresponding small-signal parameters, and the constant, K1, is
aR1
K1 ¼ (2:49)
rib þ (1 a)R1
An analysis of the model of Figure 2.12b confirms that the ratio of the signal current, IW, flowing into the
base of transistor Q3 to the signal-base current, IV, of transistor Q1 is

IW aK1 R2 1 þ K1fR2
¼ (2:50)
IV rib þ RY þ RZ þ (1 a)R2
This result suggests that feed-forward effects through the feedback network are negligible if jfj K1R2,
which requires
RZ aK1 R2 (2:51)
In view of the fact that the constant, K1, approaches b for large values of the resistance, R1, Equation 2.51
is not a troublesome inequality. Introducing a second constant, K2, such that
D aR2
K2 ¼ (2:52)
rib þ RY þ RZ þ (1 a)R2
the ratio IW=IV in Equation 2.50 becomes
IW
K1 K2 (2:53)
IV
assuming Equation 2.51 is satisfied.

Given the propriety of Equation 2.50 and using Equation 2.53 the open-loop transconductance,
GMO(RST, RLT) is found to be

aK1 K2
GMO (RST , RLT ) ¼ (2:54)
rib þ RX þ RZ þ (1 a)RST
and recalling Equation 2.48, the loop gain T is

RZ K1 K2 RZ
T¼ GMO (RST , RLT ) ¼ (2:55)
a rib þ RX þ RZ þ (1 a)RST
It follows that for T 1, the closed-loop transconductance is
GMO (RST , RLT ) a

GM (RST , RLT ) ¼ (2:56)
1þT RZ
The Early resistance is large enough to justify its neglect, so the open loop, and thus the closed-loop,
driving-point output resistances are infinitely large. On the other hand, the closed-loop driving-point
input resistance Rin can be shown to be
Rin ¼ Rino ½1 þ fGMO (0, RLT ) (b þ 1)K1 K2 RZ (2:57)

Cc Rout
Rin
IO
Q1 Q2 Q3
RST R1 R2 RLT
+
VST
– CF
RX RY
RZ
FIGURE 2.13 AC schematic diagram of a frequency-compensated series–series feedback triple. The capacitance,
Cc, achieves pole splitting in the open-loop configuration, while the capacitance, CF, introduces a zero in the feedback
factor of the closed-loop amplifier.
Similar to its shunt–shunt counterpart, the series–series feedback amplifier uses three open-loop gain
stages to produce large loop gain. However, also similar to the shunt–shunt triple, frequency compen-
sation via an introduced feedback zero is difficult unless design care is exercised to realize a dominant
pole open-loop response. To this end, the most commonly used compensation is pole splitting in the
open loop, combined, if required, with the introduction of a zero in the feedback factor. The relevant ac
schematic diagram appears in Figure 2.13 where the indicated capacitance, Cc, inserted across the base–
collector terminals of transistor Q3 achieves the aforementioned pole splitting compensation. The
capacitance, CF, in Figure 2.13 delivers a frequency-dependent feedback factor, f(s) of
2 3
1þs
f (s) ¼ f 4 z 5 (2:58)
1 þ zs RZ
RZ þRX kRY
where the frequency z of the introduced zero derives from

1 RX kRY
¼ (RX þ RY ) 1 þ CF (2:59)
z RZ
The corresponding pole in Equation 2.58 is insignificant if the closed-loop amplifier is designed for a
bandwidth, Bcl that satisfies the inequality, Bc1(RX þ RY)CF 1.
As is the case with shunt–shunt feedback, an alternative frequency compensation scheme is available if
series–series feedback is implemented as a balanced differential architecture. The pertinent ac schematic
diagram, inclusive of feedback compensation, appears in Figure 2.14. This diagram exploits the fact that
the feedback wye consisting of the resistances, RX, RY, and RZ as utilized in the single-ended configur-
ations of Figures 2.12a and 2.13 can be transformed into the feedback delta of Figure 2.15. The terminal
volt–ampere characteristics of the two networks in Figure 2.15 are identical, provided that the delta
subcircuit elements, RF, RU, and RV, are chosen in accordance with
Rin Q2A
Rout
Q1A
R
RF
IO
CF
RST RU RLT
RV
+
VST
– RU RV
CF
RF
Q1B
R
Q2B
FIGURE 2.14 AC schematic diagram of a balanced differential version of the series–series feedback amplifier.
The circuit utilizes only two, as opposed to three, gain stages in the open loop.
I1F RX RY I2F I1F RF I2F

V1F V2F V1F V2F
RZ RU RV
FIGURE 2.15 Transformation of the wye feedback subcircuit used in the amplifier of Figure 2.13 to the delta
subcircuit exploited in Figure 2.14. The resistance transformation equations are given by Equations 2.60 through 2.62.

RX kRY
RF ¼ (RX þ RY ) 1 þ (2:60)
RZ
RU RZ
¼ (2:61)
RF RY
RV RZ
¼ (2:62)
RF RX
2.6 Dual-Loop Feedback

As mentioned previously, a simultaneous control of the driving-point I=O resistances, as well as the
closed-loop gain, mandates the use of dual global loops comprised of series and shunt feedback signal
paths. The two global dual-loop feedback architectures are the series–series=shunt–shunt feedback
amplifier and the series–shunt=shunt–series feedback amplifier. In Sections 2.6.1 and 2.6.2, both of
these units are studied by judiciously applying the relevant analytical results established earlier for
pertinent single-loop feedback architectures. The ac schematic diagrams of these respective circuit
realizations are provided, and engineering design considerations are offered.
2.6.1 Series–Series=Shunt–Shunt Feedback Amplifier

Figure 2.16 is a behavioral abstraction of the series–series=shunt–shunt feedback amplifier. Two port
z parameters are used to model the series–series feedback subcircuit, for which feed-forward is tacitly
ignored and the feedback factor associated with its current-controlled voltage source is fss. On the other
hand, y parameters model the shunt–shunt feedback network, where the feedback factor relative to its
voltage-controlled current source is fpp. As in the series–series network, feed-forward in the shunt–shunt
subcircuit is presumed negligible. The four-terminal amplifier around which the two feedback units are
connected has an open loop (meaning fss ¼ 0 and fpp ¼ 0, but with the loading effects of both feedback
circuits considered) transconductance of GMO(RST, RLT).
With fpp set to zero to deactivate shunt–shunt feedback, the resultant series–series feedback network is
a transconductance amplifier with a closed-loop transconductance, GMS(RST, RLT), is
IO GMO (RST , RLT ) 1

GMS (RST , RLT ) ¼ ¼ (2:63)
VST 1 þ fss GMO (RST , RLT ) fss
where the loop gain, fssGMO(RST, RLT), is presumed much larger than one, and the loading effects of both
the series–series feedback subcircuit and the deactivated shunt–shunt feedback network are incorporated
into GMO(RST, RLT). The transresistance, RMS(RST, RLT), implied by Equation 2.63, which expedites the
study of the shunt–shunt component of the feedback configuration, is
VO IO RST RLT
RMS (RST , RLT ) ¼ ¼ RST RLT (2:64)
IST VST fss
Shunt–shunt feedback
fppVO
Amplifier
RST +
VO RLT
+ –
VST
–
+
IO
fss IO
–
Series–series feedback
FIGURE 2.16 System-level diagram of a series–series=shunt–shunt dual-loop feedback amplifier. Note that
feed-forward signal transmission through either feedback network is ignored.
The series–series feedback input and output resistances Rins and Routs, respectively, are large and given by
Rins ¼ Rino ½1 þ fss GMO (0, RLT ) (2:65)
and
Routs ¼ Routo ½1 þ fss GMO (RST , 0) (2:66)
where the zero feedback ( fss ¼ 0 and fpp ¼ 0) values, Rino and Routo, of these driving-point quantities are
computed with due consideration given to the loading effects imposed on the amplifier by both feedback
subcircuits.
When shunt–shunt feedback is applied around the series–series feedback cell, the configuration
becomes a transresistance amplifier. The effective open-loop transresistance is RMS(RST, RLT), as defined
by Equation 2.64. Noting a feedback of fpp, the corresponding closed-loop transresistance is
RST RLT
fss
RM (RST , RLT ) (2:67)
1 þ fpp RST RLT
fss
which is independent of amplifier model parameters, despite the unlikely condition of an effective loop
gain fppRSTRLT=fss that is much larger than 1. It should be interjected, however, that Equation 2.67
presumes negligible feed-forward through the shunt–shunt feedback network. This presumption may be
inappropriate owing to the relatively low closed-loop gain afforded by the series–series feedback
subcircuit. Ignoring this potential problem temporarily, Equation 2.67 suggests a closed-loop voltage
gain AV(RST, RLT) of
VO RM (RST , RLT ) RLT

AV (RST , RLT ) ¼ ¼ (2:68)
VS RST fss þ fpp RST RLT
The closed-loop, driving-point output resistance Rout, can be straightforwardly calculated by noting
that the open circuit (RLT ! 1) voltage gain, AVO, predicted by Equation 2.68 is AVO ¼ 1=fpp RST.
Accordingly, Equation 2.68 is alternatively expressible as
0 1
RLT
AV (RST , RLT ) AVO @ A (2:69)
RLT þ fppfRss ST
Because Equation 2.69 is a voltage divider relationship stemming from a Thévenin model of the output
port of the dual-loop feedback amplifier, as delineated in Figure 2.17, it follows that the driving-point
output resistance is
fss
Rout (2:70)
fpp RST
Observe that, similar to the forward gain characteristics, the driving-point output resistance is nominally
insensitive to changes and other uncertainties in open-loop amplifier parameters. Moreover, this output
resistance is directly proportional to the ratio fss=fpp of feedback factors. As illustrated in preceding
sections, the individual feedback factors, and thus the ratio of feedback factors, is likely to be proportional
to a ratio of resistances. In view of the fact that resistance ratios can be tightly controlled in a monolithic
fabrication process, Rout in Equation 2.70 is accurately prescribed for a given source termination.
RST 1 3
+ Series–series/ +
VST shunt–shunt VO RLT
– amplifier
–
2 4
Rin
1 Rout 3
I
RST + +
Rins fppVO AVOVS VO RLT
+
– –
VST
–
2 4
FIGURE 2.17 Norton equivalent input and Thévenin equivalent output circuits for the series–series=shunt–shunt
dual-loop feedback amplifier.
The driving-point input resistance Rin can be determined from a consideration of the input port
component of the system-level equivalent circuit depicted in Figure 2.17. This resistance is the ratio of
VST to I, under the condition of RS ¼ 0. With RS ¼ 0, Equation 2.68 yields VO ¼ RLTVST=fss and thus,
Kirchhoff’s voltage law (KVL) applied around the input port of the model at hand yields
Rins fss
Rin ¼ fpp RLT Rins
(2:71)
1þ fss
fpp RLT
where the ‘‘open-loop’’ input resistance Rins, defined by Equation 2.65, is presumed large. Similar to the
driving-point output resistance of the series–series=shunt–shunt feedback amplifier, the driving-point
input resistance is nominally independent of open-loop amplifier parameters.
It is interesting to observe that the input resistance in Equation 2.71 is inversely proportional to the
load resistance by the same factor ( fss=fpp) that the driving-point output resistance in Equation 2.70 is
inversely proportional to the source resistance. As a result,
fss
Rin RLT Rout RST (2:72)
fpp
Thus, in addition to being stable performance indices for well-defined source and load terminations,
the driving-point input and output resistances track one another, despite manufacturing uncertainties
and changes in operating temperature that might perturb the individual values of the two feedback
factors fss and fpp.
The circuit property stipulated by Equation 2.72 has immediate utility in the design of wideband
communication transceivers and other high-speed signal-processing systems [10–14]. In these and
related applications, a cascade of several stages is generally required to satisfy frequency response,
distortion, and noise specifications. A convenient way of implementing a cascade interconnection
is to force each member of the cascade to operate under the match terminated case of
D
RST ¼ Rin ¼ RLT ¼ Rout ¼ R. From Equation 2.72 match terminated operation demands feedback
factors selected so that
sffiffiffiffiffiffi
fss
R¼ (2:73)
fpp
which forces a match terminated closed-loop voltage gain AV of
1 1
AV ¼ pffiffiffiffiffiffiffiffiffiffi (2:74)
2fpp R 2 fpp fss
The ac schematic diagram of a practical, single-ended series–series=shunt–shunt amplifier is submitted in

Figure 2.18. An inspection of this diagram reveals a topology that coalesces the series–series and shunt–
shunt triples studied earlier. In particular, the wye network formed of the three resistances, RXx, RY, and
RZ, comprises the series–series component of the dual-loop feedback amplifier. The capacitor, Cc,
narrowbands the open-loop amplifier to facilitate frequency compensation of the series–series loop
through the capacitance, CF1. Compensated shunt feedback of the network is achieved by the parallel
combination of the resistance, RF and the capacitance, CF2. If CF1 and Cc combine to deliver a dominant
pole series–series feedback amplifier, CF2 is not necessary. Conversely, CF1 is superfluous if CF2 and Cc
interact to provide a dominant pole shunt–shunt feedback amplifier. As in the single-ended series–series
configuration, transistor Q3 can be broadbanded via a common base cascode. Moreover, if feedback
through the feedback networks poses a problem, an emitter follower can be inserted at the port to which
the shunt feedback path and the load termination are incident.
A low-frequency analysis of the circuit in Figure 2.18 is expedited by assuming high-b transistors
having identical corresponding small-signal model parameters. This analysis, which in contrast to the
CF2
RF
Rout
Cc VO
Rin
IO
Q1 Q2 Q3
RST R1 R2 RLT
+
VST
– CF1
RX RY
RZ
FIGURE 2.18 AC schematic diagram of a frequency-compensated, series–series=shunt–shunt, dual-loop feedback

amplifier. The compensation is affected by the capacitances CF1 and CF2, while Cc achieves pole splitting in the open-
loop amplifier.
simplified behavioral analysis, does not ignore the electrical effects of the aforementioned feed-forward
through the shunt–shunt feedback network, yields a voltage gain AV(RST, RLT), of

Rin RLT aRF
AV (RST , RLT ) 1 (2:75)
Rin þ RST RLT þ RF RZ
where the driving-point input resistance of the amplifier Rin is
RF þ RLT
Rin (2:76)
1 þ aRRZLT
The driving-point output resistance Rout is
RF þ RST
Rout (2:77)
1 þ aRRzST
As predicted by the behavioral analysis Rin, Rout, and AV(RST, RLT), are nominally independent of
transistor parameters. Observe that the functional dependence of Rin on the load resistance, RLT, is
identical to the manner in which Rout is related to the source resistance RST. In particular, Rin Rout if
D
RST RLT. For the match terminated case in which RST ¼ Rin ¼ RLT ¼ Rout ¼ R,
rffiffiffiffiffiffiffiffiffiffi
RF RZ
R (2:78)
a
The corresponding match terminated voltage gain in Equation 2.75 collapses to

RF R
AV (2:79)
2R
Similar to the series–series and shunt–shunt triples, many of the frequency compensation problems
implicit to the presence of three open-loop stages can be circumvented by realizing the series–series=
shunt–shunt amplifier as a two-stage differential configuration. Figure 2.19 is the ac schematic diagram of
a compensated differential series–series=shunt–shunt feedback dual.
2.6.2 Series–Shunt=Shunt–Series Feedback Amplifier

The only other type of global dual-loop architecture is the series–shunt=shunt–series feedback amplifier;
the behavioral diagram appears in Figure 2.20. The series–shunt component of this system, which is
modeled by h-parameters, has a negligibly small feed-forward factor and a feedback factor of fsp. Hybrid
g-parameters model the shunt–series feedback structure, which has a feedback factor of fps and a
presumably negligible feed-forward factor. The four-terminal amplifier around which the two feedback
units are connected has an open loop (meaning fsp ¼ 0 and fps ¼ 0, but with the loading effects of both
feedback circuits considered) voltage gain of AVO(RST, RLT).
For fps ¼ 0, the series–shunt feedback circuit voltage gain AVS(RST, RLT), is
VO AVO (RST , RLT ) 1

AVS (RST , RLT ) ¼ ¼ (2:80)
VST 1 þ fsp AVO (RST , RLT ) fsp
RF2
Rout
CF2
Rin Q2A
Q1A
R
RF1
+
CF1
RST RU VO RLT
RV
+ –
VST
– RU RV
IO
CF1
RF1
Q1B
R
Q2B
CF2
RF2
FIGURE 2.19 AC schematic diagram of the differential realization of a compensated series–series=shunt–shunt

feedback amplifier.
Shunt–shunt feedback
fps IO
+
VO RLT
–
Amplifier IO
RST
+
VST
– +
fspVO
–
Series–series feedback
FIGURE 2.20 System-level diagram of a series–shunt=shunt–series, dual-loop feedback amplifier. Note that feed-
forward signal transmission through either feedback network is ignored.
where the approximation reflects an assumption of a large loop gain. When the shunt–series component
of the feedback amplifier is activated, the dual-loop configuration functions as a current amplifier. Its
effective open-loop transfer function is the current gain, AIS(RST, RLT), established by the series–shunt
amplifier; namely,

IO RST VO RST
AIS (RST , RLT ) ¼ ¼ (2:81)
IST RLT VST fsp RLT
It follows that the current gain, AI(RST, RLT), of the closed loop is
RST
fsp RLT RST
AI (RST , RLT ) ¼ (2:82)
1þ fps fspRRSTLT fsp RLT þ fps RST
while the corresponding voltage gain, AV(RST, RLT), assuming negligible feed-forward through the shunt–
series feedback network, is
RLT RLT
AV (RST , RLT ) ¼ AI (RST , RLT ) (2:83)
RST fsp RLT þ fps RST
Repeating the analytical strategy employed to determine the input and output resistances of the series–
series=shunt–shunt configuration, Equation 2.83 delivers a driving-point input resistance of
fsp RLT
Rin (2:84)
fps
and a driving-point output resistance of
fps RST
Rout (2:85)
fsp
Similar to the forward voltage gain, the driving-point input and output resistances of the series–
shunt=shunt–series feedback amplifier are nominally independent of active element parameters. Note,
however, that the input resistance is directly proportional to the load resistance by a factor ( fsp=fps),
which is the inverse of the proportionality constant that links the output resistance to the source
resistance. Specifically,
fsp Rin RST

¼ ¼ (2:86)
fps RLT Rout
Thus, although Rin and Rout are reliably determined for well-defined load and source terminations, they
do not track one another as well as they do in the series–series=shunt–shunt amplifier. Using Equation
2.86, the voltage gain in Equation 2.83 is expressible as
1
AV (RST , RLT ) qffiffiffiffiffiffiffiffiffiffiffi (2:87)
fsp 1 þ Rout RST
Rin RLT
The simplified ac schematic diagram of a practical series–shunt=shunt–series feedback amplifier appears

in Figure 2.21. In this circuit, series–shunt feedback derives from the resistances, REE1 and RF1, and
Rout
VO
Rin Q2
Q1 RLT
R
RST RF2
+
VST RF1
–
REE1 REE2
FIGURE 2.21 AC schematic diagram of a series–shunt=shunt–series, dual-loop feedback amplifier.
shunt–series feedback is determined by the resistances, REE2 and RF2. Because this circuit topology
merges the series–shunt and shunt–series pairs, requisite frequency compensation, which is not shown
in the subject figure, mirrors the relevant compensation schemes studied earlier. Note, however, that a
cascade of only two open-loop gain stages renders compensation easier to implement and larger 3 dB
bandwidths easier to achieve in the series–series=shunt–shunt circuit, which requires three open-loop
gain stages for a single-ended application.
For high-b transistors having identical corresponding small-signal model parameters, a low-frequency
analysis of the circuit in Figure 2.21 gives a voltage gain of

aRin RF1
AV (RST , RLT ) 1þ (2:88)
Rin þ aRS REE1
where the driving-point input resistance, Rin, of the subject amplifier is

!
1 þ RREE2
F2
Rin aRLT (2:89)

1 þ RREE1
F1
þ REE1RkR
LT
EE2
The driving-point output resistance, Rout, is

!
1 þ RREE1
F1
Rout RST (2:90)

1 þ RREE2
F2
þ REE1RkR
ST
EE2
2.7 Summary
This section documents small-signal performance equations, general operating characteristics, and
engineering design guidelines for the six most commonly used global feedback circuits. These observa-
tions derive from analyses based on the judicious application of signal flow theory to the small-signal
model that results when the subject feedback network is supplanted by an appropriate two-port
parameter equivalent circuit.
Four of the six fundamental feedback circuits are single-loop architectures.

1. Series–shunt feedback amplifier functions best as a voltage amplifier in that its input resistance is
large, and its output resistance is small. Because only two gain stages are required in the open loop,
the amplifier is relatively easy to compensate for acceptable closed-loop damping and features
potentially large 3 dB bandwidth. A computationally efficient analysis aimed toward determining
loop gain, closed-loop gain, I=O resistances, and the condition that renders feed-forward through
the feedback network inconsequential is predicated on replacing the feedback subcircuit with its h-
parameter model.
2. Shunt–series feedback amplifier is a current amplifier in that its input resistance is small, and its
output resistance is large. Similar to its series–shunt dual, only two gain stages are required in the
open loop. Computationally efficient analyses are conducted by replacing the feedback subcircuit
with its g-parameter model.
3. Shunt–shunt feedback amplifier is a transresistance signal processor in that both its input and output
resistances are small. Although this amplifier can be realized theoretically with only a single open-loop
stage, a sufficiently large loop gain generally requires a cascade of three open-loop stages. As a result,
pole splitting is invariably required to ensure an open-loop dominant pole response, thereby limiting
the achievable closed-loop bandwidth. In addition compensation of the feedback loop may be required
for acceptable closed-loop damping. The bandwidth and stability problems implicit to the use of three
open-loop gain stages can be circumvented by a balanced differential realization, which requires a
cascade of only two open-loop gain stages. Computationally efficient analyses are conducted by
replacing the feedback subcircuit with its y-parameter model.
4. Series–series feedback amplifier is a transconductance signal processor in that both its input and
output resistances are large. Similar to its shunt–shunt counterpart, its implementation generally
requires a cascade of three open-loop gain stages. Computationally efficient analyses are conducted
by replacing the feedback subcircuit with its z-parameter model.
The two remaining feedback circuits are dual-loop topologies that can stabilize the driving-point input
and output resistances, as well as the forward gain characteristics, with respect to shifts in active element
parameters. One of these latter architectures, the series–series=shunt–shunt feedback amplifier, is par-
ticularly well suited to electronic applications that require a multistage cascade.
1. Series–series=shunt–shunt feedback amplifier coalesces the series–series architecture with its
shunt–shunt dual. It is particularly well suited to applications, such as wideband communication
networks, which require match terminated source and load resistances. Requisite frequency
compensation and broadbanding criteria mirror those incorporated in the series–series and
shunt–shunt single-loop feedback topologies.
2. Series–shunt=shunt–series feedback amplifier coalesces the series–shunt architecture with its
shunt–series dual. Although its input resistance can be designed to match the source resistance
seen by the input port of the amplifier, and its output resistance can be matched to the load
resistance driven by the amplifier, match terminated operating (Rin ¼ RST ¼ RLT ¼ Rout) is not
feasible. Requisite frequency compensation and broadbanding criteria mirror those incorporated
in the series–shunt and shunt–series single-loop feedback topologies.
References
1. J. Millman and A. Grabel, Microelectronics, 2nd edn., New York: McGraw-Hill, 1987, Chap. 12.
2. A. B. Grebene, Bipolar and MOS Analog Integrated Circuit Design, New York: Wiley-Interscience,
1984, pp. 424–432.
3. R. G. Meyer, R. Eschenbach, and R. Chin, A wideband ultralinear amplifier from DC to 300 MHz,
IEEE J. Solid-State Circuits, SC-9, 167–175, Aug. 1974.
4. A. S. Sedra and K. C. Smith, Microelectronic Circuits, New York: Holt, Rinehart Winston, 1987,
pp. 428–441.
5. J. M. Early, Effects of space-charge layer widening in junction transistors, Proc. IRE, 46, 1141–1152,
Nov. 1952.
6. A. J. Cote Jr. and J. B. Oakes, Linear Vacuum-Tube and Transistor Circuits, New York: McGraw-Hill,
1961, pp. 40–46.
7. R. G. Meyer and R. A. Blauschild, A four-terminal wideband monolithic amplifier, IEEE J. Solid-State
Circuits, SC-17, 634–638, Dec. 1981.
8. M. Ohara, Y. Akazawa, N. Ishihara, and S. Konaka, Bipolar monolithic amplifiers for a gigabit optical
repeater, IEEE J. Solid-State Circuits, SC-19, 491–497, Aug. 1985.
9. M. J. N. Sibley, R. T. Univin, D. R. Smith, B. A. Boxall, and R. J. Hawkins, A monolithic
transimpedance preamplifier for high speed optical receivers, Br. Telecommun. Tech. J., 2, 64–66,
July 1984.
10. J. F. Kukielka and C. P. Snapp, Wideband monolithic cascadable feedback amplifiers using silicon
bipolar technology, IEEE Microw. Millimeter-Wave Circuits Symp. Dig., 2, 330–331, June 1982.
11. R. G. Meyer, M. J. Shensa, and R. Eschenbach, Cross modulation and intermodulation in amplifiers
at high frequencies, IEEE J. Solid-State Circuits, SC-7, 16–23, Feb. 1972.
12. K. H. Chan and R. G. Meyer, A low distortion monolithic wide-band amplifier, IEEE J. Solid-State
Circuits, SC-12, 685–690, Dec. 1977.
13. A. Arbel, Multistage transistorized current modules, IEEE Trans. Circuits Syst., CT-13, 302–310,
Sept. 1966.
14. A. Arbel, Analog Signal Processing and Instrumentation, London: Cambridge University, 1980,
Chap. 3.
15. W. G. Beall, New feedback techniques for high performance monolithic wideband amplifiers,
Electron. Res. Group, University of Southern California, Tech. Memo., Jan. 1990.
3
General Feedback
Theory
3.1 Introduction ................................................................................ 3-1
3.2 Indefinite-Admittance Matrix ................................................. 3-1
3.3 Return Difference....................................................................... 3-7
Wai-Kai Chen 3.4 Null Return Difference ........................................................... 3-11
University of Illinois at Chicago References ............................................................................................ 3-13
3.1 Introduction
In Section 1.2, we used the ideal feedback model to study the properties of feedback amplifiers. The model is
useful only if we can separate a feedback amplifier into the basic amplifier m(s) and the feedback network b(s).
The procedure is difficult and sometimes virtually impossible, because the forward path may not be strictly
unilateral, the feedback path is usually bilateral, and the input and output coupling networks are often
complicated. Thus, the ideal feedback model is not an adequate representation of a practical amplifier. In the
remainder of this section, we shall develop Bode’s feedback theory, which is applicable to the general network
configuration and avoids the necessity of identifying the transfer functions m(s) and b(s).
Bode’s feedback theory [1] is based on the concept of return difference, which is defined in terms of
network determinants. We show that the return difference is a generalization of the concept of the
feedback factor of the ideal feedback model, and can be measured physically from the amplifier itself. We
then introduce the notion of null return difference and discuss its physical significance. Because the
feedback theory will be formulated in terms of the first- and second-order cofactors of the elements of
the indefinite-admittance matrix of a feedback circuit, we first review briefly the formulation of the
indefinite-admittance matrix.
3.2 Indefinite-Admittance Matrix

Figure 3.1 is an n-terminal network N composed of an arbitrary number of active and passive network
elements connected in any way whatsoever. Let V1, V2, . . . , Vn be the Laplace-transformed potentials
measured between terminals 1, 2, . . . , n and some arbitrary but unspecified reference point, and let
I1, I2, . . . , In be the Laplace-transformed currents entering the terminals 1, 2, . . . , n from outside the network.
The network N together with its load is linear, so the terminal current and voltages are related by the equation
2 3 2 32 3 2 3
I1 y11 y12 y1n V1 J1
6 I2 7 6 y21 y22 y2n 76 V2 7 6 J2 7
6 7 6 76 7 6 7
6 .. 7 ¼ 6 .. .. .. .. 76 .. 7 þ 6 .. 7 (3:1)
4 . 5 4 . . . . 54 . 5 4 . 5
In yn1 yn2 ynn Vn Jn
3-1
I1
V1
+ 1 I2
V2
+ 2 n-Terminal
network N
In
Vn
+ n
– – –
Reference-potential point
FIGURE 3.1 General symbolic representation of an n-terminal network.
or more succinctly as
I(s) ¼ Y(s)V(s) þ J(s) (3:2)
where Jk (k ¼ 1, 2, . . . , n) denotes the current flowing into the kth terminal when all terminals of N are
grounded to the reference point. The coefficient matrix Y(s) is called the indefinite-admittance matrix
because the reference point for the potentials is some arbitrary but unspecified point outside the network.
Notice that the symbol Y(s) is used to denote either the admittance matrix or the indefinite-admittance
matrix. This should not create any confusion because the context will tell. In the remainder of this
section, we shall deal exclusively with the indefinite-admittance matrix.
We remark that the short-circuit currents Jk result from the independent sources and=or initial
conditions in the interior of N. For our purposes, we shall consider all independent sources outside the
network and set all initial conditions to zero. Hence, J(s) is considered to be zero, and Equation 3.2
becomes
I(s) ¼ Y(s)V(s) (3:3)
where the elements yij of Y(s) can be obtained as

Ii
yij ¼ (3:4)
Vj vx ¼0, x6¼j
As an illustration, consider a small-signal equivalent model of a transistor in Figure 3.2. Its indefinite-
admittance matrix is found to be
C2
1 2
+
g1 C1 V gmV g2
–
3 3
FIGURE 3.2 Small-signal equivalent network of a transistor.

General Feedback Theory 3-3
2 3
g1 þ sC1 þ sC2 sC2 g1 sC1
Y(s) ¼ 4 gm sC2 g2 þ sC2 g2 gm 5 (3:5)
g1 sC1 gm g2 g1 þ g2 þ gm þ sC1
Observe that the sum of elements of each row or column is equal to zero. The fact that these properties
are valid in general for the indefinite-admittance matrix will now be demonstrated.
To see that the sum of the elements in each column of Y(s) equals zero, we add all n equations of
Equation 3.1 to yield
X
n X
n X
n X
n
yji Vi ¼ Im Jm ¼ 0 (3:6)
i¼1 j¼1 m¼1 m¼1
The last equation is obtained by appealing to Kirchhoff’s current law for the node corresponding to the
reference point. Setting all the terminal voltages to zero except the kth one, which is nonzero, gives
X
n
Vk yjk ¼ 0 (3:7)
j¼1
Because Vk 6¼ 0, it follows that the sum of the elements of each column of Y(s) equals zero. Thus, the
indefinite-admittance matrix is always singular.
To demonstrate that each row sum of Y(s) is also zero, we recognize that because the point of zero
potential may be chosen arbitrarily, the currents Jk and Ik remain invariant when all the terminal voltages
Vk are changed by the same but arbitrary constant amount. Thus, if V0 is an n-vector, each element of
which is v0 6¼ 0, then
I(s) J(s) ¼ Y(s)½V(s) þ V0 ¼ Y(s)V(s) þ Y(s)V0 (3:8)
which after invoking Equation 3.2 yields that
Y(s)V0 ¼ 0 (3:9)
or
X
n
yij ¼ 0, i ¼ 1, 2, . . . , n (3:10)
j¼1
showing that each row sum of Y(s) equals zero.

Thus, if Yuv denotes the submatrix obtained from an indefinite-admittance matrix Y(s) by deleting the
uth row and vth column, then the (first order) cofactor, denoted by the symbol Yuv, of the element yuv of
Y(s), is defined by
Yuv ¼ ( 1)uþv detYuv (3:11)
As a consequence of the zero-row-sum and zero-column-sum properties, all the cofactors of the elements
of the indefinite-admittance matrix are equal. Such a matrix is also referred to as the equicofactor matrix.
If Yuv and Yij are any two cofactors of the elements of Y(s), then
Yuv ¼ Yij (3:12)

for all u, v, i, and j. For the indefinite-admittance matrix Y(s) of Equation 3.5 it is straightforward to
verify that all of its nine cofactors are equal to
Yuv ¼ s2 C1 C2 þ sðC1 g2 þ C2 g1 þ C2 g2 þ gm C2 Þ þ g1 g2 (3:13)
for u, v ¼ 1, 2, 3.
Denote by Yrp,sq the submatrix obtained from Y(s) by striking out rows r and s and columns p and q.
Then the second-order cofactor, denoted by the symbol Yrp,sq of the elements yrp, and ysq of Y(s) is a
scalar quantity defined by the relation
Yrp,sq ¼ sgn(r s)sgn(p q)(1)rþpþsþq detYrp,sq (3:14)
where r 6¼ s and p 6¼ q, and
sgn u ¼ þ1 if u > 0 (3:15a)
sgn u ¼ 1 if u < 0 (3:15b)
The symbols Yuv and Yuv or Yrp,sq and Yrp,sq should not create any confusion because one is in boldface
whereas the other is italic. Also, for our purposes, it is convenient to define
Yrp,sq ¼ 0, r ¼ s or p ¼ q (3:16a)
or
sgn 0 ¼ 0 (3:16b)
This convention will be followed throughout the remainder of this section.

As an example, consider the hybrid-pi equivalent network of a transistor in Figure 3.3. Assume that
each node is an accessible terminal of a four-terminal network. Its indefinite-admittance matrix is
2 3
0:02 0 0:02 0
6 0 5 1012 s 0:2 5 1012 s 0:2 7
Y(s) ¼ 6
4 0:02 10 5
7 (3:17)
5 1012 s 12
0:024 þ 105 10 s 0:004 10 s
0 0 0:204 1010 s 0:204 þ 1010 s
The second-order cofactor Y31,42 and Y11,34 of the elements of Y(s) of Equation 3.17 are computed
as follows:
5 pF
1 50 Ω 3 2
+
250 Ω V 100 pF 0.2 V
–
4 4
FIGURE 3.3 Hybrid-pi equivalent network of a transistor.


0:02 0
Y31,42 ¼ sgn(3 4)sgn(1 2)(1) 3þ1þ4þ2
det
0:2 5 1012 s 0:2
¼ 0:004 (3:18a)

5 1012 s 0:2 5 1012 s
Y11,34 ¼ sgn(1 3)sgn(1 4)(1)1þ1þ3þ4 det
0 0:204 1010 s

¼ 5 1012 s 0:204 þ 1010 s (3:18b)
The usefulness of the indefinite-admittance matrix lies in the fact that it facilitates the computation of the
driving-point or transfer functions between any pair of nodes or from any pair of nodes to any other pair.
In the following, we present elegant, compact, and explicit formulas that express the network functions in
terms of the ratios of the first- and=or second-order cofactors of the elements of the indefinite-admittance
matrix.
Assume that a current source is connected between any two nodes r and s so that a current Isr is
injected into the rth node and at the same time is extracted from the sth node. Suppose that an ideal
voltmeter is connected from node p to node q so that it indicates the potential rise from q to p, as depicted
symbolically in Figure 3.4. Then the transfer impedance, denoted by the symbol zrp,sq, between the node
pairs rs and pq of the network of Figure 3.4 is defined by the relation
Vpq
zrp,sq ¼ (3:19)
Isr
with all initial conditions and independent sources inside N set to zero. The representation is, of course,
quite general. When r ¼ p and s ¼ q, the transfer impedance zrp,sq, becomes the driving-point impedance
zrr,ss between the terminal pair rs.
In Figure 3.4, set all initial conditions and independent sources in N to zero and choose terminal q to
be the reference-potential point for all other terminals. In terms of Equation 3.1, these operations are
equivalent to setting J ¼ 0, Vq ¼ 0, Ix ¼ 0 for x 6¼ r, s and Ir ¼ Is ¼ Isr. Because Y(s) is an equicofactor
matrix, the equations of Equation 3.1 are not linearly independent and one of them is superfluous. Let us
suppress the sth equation from Equation 3.1, which then reduces to
Is ¼ Ysq Vq (3:20)
where Is and Vq denote the subvectors obtained from I and V of Equation 3.3 by deleting the sth row
and qth row, respectively. Applying Cramer’s rule to solve for Vp yields
~ sq
detY
Vp ¼ (3:21)
detYsq
Isr Ipq
r p
Ideal voltmeter
+ +
Isr Vrs N Vpq
– s q –
FIGURE 3.4 Symbolic representation for the measurement of the transfer impedance.
where Y~ sq is the matrix derived from Ysq by replacing the column corresponding to Vp by Is. We
recognize that Is is in the pth column if p < q but in the (p 1)th column if p > q. Furthermore, the row
in which Isr appears is the rth row if r < s, but is the (r – 1)th row if r > s. Thus, we obtain
~ sq ¼ Isr Yrp,sq
(1)sþq detY (3:22)
In addition, we have
detYsq ¼ (1)sþq Ysq (3:23)
Substituting these in Equation 3.21 in conjunction with Equation 3.19, we obtain
Yrp,sq
zrp,sq ¼ (3:24)
Yuv
Yrr,ss
zrr,ss ¼ (3:25)
Yuv
in which we have invoked the fact that Ysq ¼ Yuv.

The voltage gain, denoted by grp,sq, between the node pairs rs and pq of the network of Figure 3.4 is
defined by
Vpq
grp,sq ¼ (3:26)
Vrs
again with all initial conditions and independent sources in N being set to zero. Thus, from Equations
3.24 and 3.25 we obtain
zrp,sq Yrp,sq
grp,sq ¼ ¼ (3:27)
zrr,ss Yrr,ss
The symbols have been chosen to help us remember. In the numerators of Equations 3.24, 3.25, and 3.27,
the order of the subscripts is as follows: r, the current injecting node; p, the voltage measurement node;
s, the current extracting node; and q, the voltage reference node. Nodes r and p designate the input and
output transfer measurement, and nodes s and q form a sort of double datum.
As an illustration, we consider the hybrid-pi transistor equivalent network of Figure 3.3. For this
transistor, suppose that we connect a 100 V load resistor between nodes 2 and 4, and excite the resulting
circuit by a voltage source V14, as depicted in Figure 3.5. To simplify our notation, let p ¼ 109s. The
indefinite-admittance matrix of the amplifier is
I41 5 pF I 24
50 Ω 3
1 2
+ +
+
V14 250 Ω V 100 pF 0.2 V V24 100 Ω
–
– –
4 4
FIGURE 3.5 Transistor amplifier used to illustrate the computation of grp,sq.

2 3
0:02 0 0:02 0
6 0 0:01 þ 0:005p 0:2 0:005p 0:21 7
Y(s) ¼ 6
4 0:02
7 (3:28)
0:005p 0:024 þ 0:105p 0:004 0:1p 5
0 0:01 0:204 0:1p 0:214 þ 0:1p
To compute the voltage gain g12,44, we appeal to Equation 3.27 and obtain
V24 Y12,44 p 40
g12,44 ¼ ¼ ¼ 2 (3:29)
V14 Y11,44 5p þ 21:7p þ 2:4
The input impedance facing the voltage source V14 is determined by
V14 Y11,44 Y11,44 50p2 þ 217p þ 24

z11,44 ¼ ¼ ¼ ¼ 2 (3:30)
I41 Yuv Y44 p þ 4:14p þ 0:08
To compute the current gain defined as the ratio of the current I24 in the 100 V resistor to the input
current I41, we apply Equation 3.24 and obtain
I24 V24 Y12,44 0:1p 4

¼ 0:01 ¼ 0:01z12,44 ¼ 0:01 ¼ 2 (3:31)
I41 I41 Y44 p þ 4:14p þ 0:08
Finally, to compute the transfer admittance defined as the ratio of the load current I24 to the input voltage
V14, we appeal to Equation 3.27 and obtain
I24 V24 Y12,44 p 40

¼ 0:01 ¼ 0:01g12,44 ¼ 0:01 ¼ (3:32)
V14 V14 Y11,44 500p2 þ 2170p þ 240
3.3 Return Difference

In the study of feedback amplifier response, we are usually interested in how a particular element of the
amplifier affects that response. This element is either crucial in terms of its effect on the entire system or
of primary concern to the designer. It may be the transfer function of an active device, the gain of an
amplifier, or the immittance of a one-port network. For our purposes, we assume that this element x is
the controlling parameter of a voltage-controlled current source defined by the equation
I ¼ xV (3:33)
To focus our attention on the element x, Figure 3.6 is the general configuration of a feedback amplifier in
which the controlled source is brought out as a two-port network connected to a general four-port
network, along with the input source combination of Is and admittance Y1 and the load admittance Y2.
We remark that the two-port representation of a controlled source Equation 3.33 is quite general. It
includes the special situation where a one-port element is characterized by its immittance. In this case,
the controlling voltage V is the terminal voltage of the controlled current source I, and x become the one-
port admittance.
The return difference F(x) of a feedback amplifier with respect to an element x is defined as the ratio of
the two functional values assumed by the first-order cofactor of an element of its indefinite-admittance
matrix under the condition that the element x assumes its nominal value and the condition that the
element x assumes the value zero. To emphasize the importance of the feedback element x, we express the
+
V xV
–
+ Vab – Ipq
a b d c
r p +
+
Is Y1 Vrs Vpq Y2
– s q
–
FIGURE 3.6 General configuration of a feedback amplifier.
indefinite-admittance matrix Y of the amplifier as a function of x, even though it is also a function of the
complex-frequency variable s, and write Y ¼ Y(x). Then, we have [2]
Yuv (x)
F(x) (3:34)
Yuv (0)
where
Yuv (0) ¼ Yuv (x)jx¼0 (3:35)
The physical significance of the return difference will now be considered. In the network of Figure 3.6, the
input, the output, the controlling branch, and the controlled source are labeled as indicated. Then, the
element x enters the indefinite-admittance matrix Y(x) in a rectangular pattern as shown next:
a b c d
2 3
a
b66
7
7 (3:36)
Y(x) ¼ 6 7
c4 x x 5
d x x
If in Figure 3.6 we replace the controlled current source xV by an independent current source of xA and
set the excitation current source Is to zero, the indefinite-admittance matrix of the resulting network is
0
simply Y(0). By appealing to Equation 3.24, the new voltage Vab appearing at terminals a and b of the
controlling branch is
0 Yda,cb (0) Yca,db (0)

Vab ¼x ¼ x (3:37)
Yuv (0) Yuv (0)
Notice that the current injecting point is terminal d, not c.

The preceding operation of replacing the controlled current source by an independent current source
and setting the excitation Is to zero can be represented symbolically as in Figure 3.7. Observe that the
controlling branch is broken off as marked and a 1 V voltage source is applied to the right of the breaking
mark. This 1 V sinusoidal voltage of a fixed angular frequency produces a current of x A at the controlled
– F(x) +
+ + +
1V V xV
V 'ab
–
– –
– T +
a b d c
r p
Y1 Y2
s q
FIGURE 3.7 Physical interpretation of the return difference with respect to the controlling parameter of a voltage-
controlled current source.
current source. The voltage appearing at the left of the breaking mark caused by this 1 V excitation is
0 0
then Vab as indicated. This returned voltage Vab has the same physical significance as the loop
transmission mb defined for the ideal feedback model in Chapter 1. To see this, we set the input
excitation to the ideal feedback model to zero, break the forward path, and apply a unit input to the
right of the break, as depicted in Figure 3.8. The signal appearing at the left of the break is precisely the
loop transmission.
For this reason, we introduce the concept of return ratio T, which is defined as the negative of the
voltage appearing at the controlling branch when the controlled current source is replaced by an
independent current source of x A and the input excitation is set to zero. Thus, the return ratio T is
0 0
simply the negative of the returned voltage Vab , or T ¼ Vab . With this in mind, we next compute the
0
difference between the 1 V excitation and the returned voltage Vab obtaining
0 Yca,db Yuv (0) þ xYca,db Ydb (0) þ xYca,db

1 Vab ¼1þx ¼ ¼
Yuv (0) Yuv (0) Ydb (0)
Ydb (x) Yuv (x)
¼ ¼ ¼ F(x) (3:38)
Ydb (0) Yuv (0)
in which we have invoked the identities Yuv ¼ Yij and
Ydb (x) ¼ Ydb (0) þ xYca,db (3:39)
+ μβ
0 ∑ 1 μ(s)
+
β(s)
FIGURE 3.8 Physical interpretation of the loop transmission.

+ 25 V
150 kΩ 10 kΩ 47 kΩ 4.7 kΩ
10 μF
5 μF
5 μF +
5 μF V2
+
47 kΩ 33 kΩ –
Vs
4.7 kΩ
4.7 kΩ
50 μF
50 μF
– 4.7 kΩ
100 Ω
FIGURE 3.9 Voltage-series feedback amplifier together with its biasing and coupling circuitry.
We remark that we write Yca,db(x) as Yca,db because it is independent of x. In other words, the return
0
difference F(x) is simply the difference of the 1 V excitation and the returned voltage Vab as illustrated in
Figure 3.7, and hence its name. Because
F(x) ¼ 1 þ T ¼ 1 mb (3:40)
we conclude that the return difference has the same physical significance as the feedback factor of the
ideal feedback model. The significance of the previous physical interpretations is that it permits us to
determine the return ratio T or mb by measurement. Once the return ratio is measured, the other
quantities such as return difference and loop transmission are known.
To illustrate, consider the voltage-series or the series-parallel feedback amplifier of Figure 3.9. Assume
that the two transistors are identical with the following hybrid parameters:
hie ¼ 1:1 kV, hfe ¼ 50, hre ¼ hoe ¼ 0 (3:41)
After the biasing and coupling circuitry have been removed, the equivalent network is presented in Figure
3.10. The effective load of the first transistor is composed of the parallel combination of the 10, 33, 47,
and 1.1 kV resistors. The effect of the 150 and 47 kV resistors can be ignored; they are included in the
equivalent network to show their insignificance in the computation.
To simplify our notation, let
hfe
~ k ¼ ak 104 ¼
a ¼ 455 104 , k ¼ 1, 2 (3:42)
hie
212.8 μmho
V13 α~1V13
1 + – 3 2
4
I25
909 μmho
+
+
+
212.8 μmho
1061 μmho
0.01 mho
28 μmho
Vs V45
V25
– α~2V45
–
–
5
FIGURE 3.10 Equivalent network of the feedback amplifier of Figure 3.9.
The subscript k is used to distinguish the transconductances of the first and the second transistors.
The indefinite-admittance matrix of the feedback amplifier of Figure 3.9 is
2 3
9:37 0 9:09 0 0:28
6 0 4:256 2:128 a2 2:128 a2 7
6 7
Y ¼ 104 6
6 9:09 a1 2:128 111:218 þ a1 0 100 7
7 (3:43)
4 a1 0 a1 10:61 10:61 5
0:28 2:128 100 10:61 a1 113:018 þ a1
By applying Equation 3.27, the amplifier voltage gain is computed as
V25 V12,25 211:54 107

g12,25 ¼ ¼ ¼ ¼ 45:39 (3:44)
Vs V11,25 4:66 107
To calculate the return differences with respect to the transconductances a ~ k of the transistors, we short
circuit the voltage source Vs. The resulting indefinite-admittance matrix is obtained from Equation 3.43 by
adding the first row to the fifth row and the first column to the fifth column and then deleting the first row
and column. Its first-order cofactor is simply Y11,55. Thus, the return differences with respect to a ~ k are
~ 1 Þ 466:1 109
Y11,55 ða
F ða
~1Þ ¼ ¼ ¼ 93:70 (3:45a)
Y11,55 (0) 4:97 109
~ 2 Þ 466:1 109
Y11,55 ða
F ða
~2Þ ¼ ¼ ¼ 18:26 (3:45b)
Y11,55 (0) 25:52 109
3.4 Null Return Difference

In this section, we introduce the notion of null return difference, which is found to be very useful in
measurement situations and in the computation of the sensitivity for the feedback amplifiers.
^ of a feedback amplifier with respect to an element x is defined to be the
The null return difference F(x)
ratio of the two functional values assumed by the second-order cofactor Yrp,sq of the elements of its
indefinite-admittance matrix Y under the condition that the element x assumes its nominal value and the
condition that the element x assumes the value zero where r and s are input terminals, and p and q are the
output terminals of the amplifier, or
Yrp,sq (x)
^ ¼
F(x) (3:46)
Yrp,sq (0)
Likewise, the null return ratio T,^ with respect to a voltage-controlled current source I ¼ xV, is the
negative of the voltage appearing at the controlling branch when the controlled current source is replaced
by an independent current source of xA and when the input excitation is adjusted so that the output of
the amplifier is identically zero.
Now, we demonstrate that the null return difference is simply the return difference in the network
under the situation that the input excitation Is has been adjusted so that the output is identically zero. In
the network of Figure 3.6, suppose that we replace the controlled current source by an independent
current source of xA. Then by applying Equation 3.24 and the superposition principle, the output current
Ipq at the load is

Yrp,sq (0) Ydp,cq (0)
Ipq ¼ Y2 Is þx (3:47)
Yuv (0) Yuv (0)
Setting Ipq ¼ 0 or Vpq ¼ 0 yields

Ydp,cq (0)
Is I0 ¼ x (3:48)
Yrp,sq (0)
in which Ydp,cq is independent of x. This adjustment is possible only if a direct transmission occurs from
the input to the output when x is set to zero. Thus, in the network of Figure 3.7, if we connect an
0
independent current source of strength I0 at its input port, the voltage Vab is the negative of the null
^
return ratio T. Using Equation 3.24, we obtain [3]
^ ¼ V 0 ¼ x Yda,cb (0) I0 Yra,sb (0)

T ab
Yuv (0) Yuv (0)

x Yda,cb (0)Yrp,sq (0) Yra,sb (0)Ydp,cq (0)
¼
Yuv (0)Yrp,sq (0)
xY_ rp,sq Yrp,sq (x)
¼ ¼ 1 (3:49)
Yrp,sq (0) Yrp,sq (0)
where
dYrp,sq (x)
Y_ rp,sq (3:50)
dx
This leads to
F(x) ^ ¼ 1 V0
^ ¼1þT (3:51)
ab
^
which demonstrates that the null return difference F(x) is simply the difference of the 1 V excitation
applied to the right of the breaking mark of the broken controlling branch of the controlled source and
I ´13
1 3
909 μmho α~2 V ´45 ~

α 1
0.01 mho
28 μmho
+ 4
212.8 μmho
I0
1061 μmho
V ´45
FIGURE 3.11 Network used to compute the null return difference F^ ða

~ 1 Þ by its physical interpretation.
0
the returned voltage Vab appearing at the left of the breaking mark under the situation that the input
signal Is is adjusted so that the output is identically zero.
As an illustration, consider the voltage-series feedback amplifier of Figure 3.9, an equivalent network of
which is presented in Figure 3.10. Using the indefinite-admittance matrix of Equation 3.43 in conjunc-
tion with Equation 3.42, the null return differences with respect to a ~ k are
~ 1 Þ 211:54 107
Y12,55 ða
F^ ða
~1Þ ¼ ¼ ¼ 103:07 103 (3:52a)
Y12,55 (0) 205:24 1012
Y12,55 ða
~2Þ 211:54 107
F^ða
~2Þ ¼ ¼ ¼ 2018:70 (3:52b)
Y12,55 (0) 104:79 1010
Alternatively, F^ ða
~ 1 Þ can be computed by using its physical interpretation as follows. Replace the
controlled source a ~ 1 V13 in Figure 3.10 by an independent current source of a ~ 1 A. We then adjust the
voltage source Vs so that the output current I25 is identically zero. Let I0 be the input current resulting
from this source. The corresponding network is presented in Figure 3.11. From this network, we obtain
0 0
F^ ða ^ ¼ 1 V 0 ¼ 1 100V35 þ a2 V45 a1 ¼ 103:07 103
~1Þ ¼ 1 þ T (3:53)
13
9:09
Likewise, we can use the same procedure to compute the return difference F^ða
~ 2 Þ.
References
1. H. W. Bode, Network Analysis and Feedback Amplifier Design, Princeton, NJ: Van Nostrand, 1945.
2. W.-K. Chen, Indefinite-admittance matrix formulation of feedback amplifier theory, IEEE Trans.
Circuits Syst., CAS-23, 498–505, 1976.
3. W.-K. Chen, On second-order cofactors and null return difference in feedback amplifier theory,
Int. J. Circuit Theory Appl., 6, 305–312, 1978.
4
Network Functions
and Feedback
Wai-Kai Chen 4.1 Blackman’s Formula.................................................................. 4-1

University of Illinois at Chicago 4.2 Sensitivity Function ................................................................... 4-6
We now study the effects of feedback on amplifier impedance and gain and obtain some useful relations
among the return difference, the null return difference, and impedance functions in general.
Refer to the general feedback configuration of Figure 3.6. Let w be a transfer function. As before, to
emphasize the importance of the feedback element x, we write w ¼ w(x). To be definite, let w(x) for the
time being be the current gain between the output and input ports. Then, from Equation 3.24 we obtain
Ipq Y2 Vpq Yrp,sq (x)

w(x) ¼ ¼ ¼ Y2 (4:1)
Is Is Yuv (x)
yielding
w(x) Yrp,sq (x) Yuv (0) ^

F(x)
¼ ¼ (4:2)
w(0) Yuv (x) Yrp,sq (0) F(x)
provided that w(0) 6¼ 0. This gives a very useful formula for computing the current gain:
^
F(x)
w(x) ¼ w(0) (4:3)
F(x)
Equation 4.3 remains valid if w(x) represents the transfer impedance zrp,sq ¼ Vpq=Is instead of the
current gain.
4.1 Blackman’s Formula

In particular, when r ¼ p and s ¼ q, w(x) represents the driving-point impedance zrr,ss(x) looking into the
terminals r and s, and we have a somewhat different interpretation. In this case, F(x) is the return
difference with respect to the element x under the condition Is ¼ 0. Thus, F(x) is the return difference for
the situation when the port where the input impedance is defined is left open without a source and we
^ is the return difference with respect
write F(x) ¼ F(input open circuited). Likewise, from Figure 3.6, F(x)
to x for the input excitation Is and output response Vrs under the condition Is is adjusted so that Vrs is
^
identically zero. Thus, F(x) is the return difference for the situation when the port where the input
4-1
^ ¼ F (input short circuited). Consequently, the

impedance is defined is short circuited, and we write F(x)
input impedance Z(x) looking into a terminal pair can be conveniently expressed as
F(input short circuited)

Z(x) ¼ Z(0) (4:4)
F(input open circuited)
This is the well-known Blackman’s formula for computing an active impedance. The formula is
extremely useful because the right-hand side can usually be determined rather easily. If x represents
the controlling parameter of a controlled source in a single-loop feedback amplifier, then setting x ¼ 0
opens the feedback loop and Z(0) is simply a passive impedance. The return difference for x when the
input port is short circuited or open circuited is relatively simple to compute because shorting out or
opening a terminal pair frequently breaks the feedback loop. In addition, Blackman’s formula can be used
to determine the return difference by measurements. Because it involves two return differences, only one
of them can be identified and the other must be known in advance. In the case of a single-loop feedback
amplifier, it is usually possible to choose a terminal pair so that either the numerator or the denominator
on the right-hand side of Equation 4.4 is unity. If F(input short circuited) ¼ 1, F(input open circuited)
becomes the return difference under normal operating condition and we have
Z(0)
F(x) ¼ (4:5)
Z(x)
On the other hand, if F(input open circuited) ¼ 1, F(input short circuited) becomes the return difference
under normal operating condition and we obtain
Z(x)
F(x) ¼ (4:6)
Z(0)
Example 4.1
The network of Figure 4.1 is a general active RC one-port realization of a rational impedance. We use
Blackman’s formula to verify that its input admittance is given by
Z3 Z4
Y ¼1þ (4:7)
Z1 Z2
1Ω
Z2
2V3
Z3 Z4
Y I
Z1 V3 Z3
1Ω +
FIGURE 4.1 General active RC one-port realization of a rational function.

Network Functions and Feedback 4-3
Y(0) Z1 + Z2 1+Z3 + Z4 I
1Ω
FIGURE 4.2 Network used to compute Y(0).
Appealing to Equation 4.4, the input admittance written as Y ¼ Y(x) can be written as

Y(x) ¼ Y(0) (4:8)
where x ¼ 2=Z3. By setting x to zero, the network used to compute Y(0) is shown in Figure 4.2. Its input
admittance is
Z1 þ Z2 þ Z3 þ Z4 þ 2
Y(0) ¼ (4:9)
Z1 þ Z2
When the input port is open circuited, the network of Figure 4.1 degenerates to that depicted in
Figure 4.3. The return difference with respect to x is
Z1 þ Z3 Z2 Z4
F(input open circuited) ¼ 1 V30 ¼ (4:10)
2 þ Z1 þ Z2 þ Z3 þ Z4
where the returned voltage V30 at the controlling branch is given by
2(1 þ Z2 þ Z4 )
V30 ¼ (4:11)
2 þ Z1 þ Z2 þ Z3 þ Z4
1Ω
Z2
2 Z4
Z3
Z1 V 3́ Z3
1Ω
+
FIGURE 4.3 Network used to compute F(input open circuited).

1Ω
Z2
Z4
2/Z3
I
–
Z1 V 3̋ Z3
1Ω +
FIGURE 4.4 Network used to compute F(input short circuited).
To compute the return difference when the input port is short circuited, we use the network of
Figure 4.4 and obtain
Z1 Z2
F(input short circuited) ¼ 1 V300 ¼ (4:12)
Z1 þ Z2
where the return voltage V300 at the controlling branch is found to be
2Z2
V300 ¼ (4:13)
Z1 þ Z2
Substituting Equations 4.9, 4.10, and 4.12 in Equation 4.8 yields the desired result.
Z3 Z4
Y ¼1þ (4:14)
Z1 Z2
To determine the effect of feedback on the input and output impedances, we choose the series-parallel
feedback configuration of Figure 4.5. By shorting the terminals of Y2, we interrupt the feedback loop,
Na
Z1
Y2
Vs
Nf
FIGURE 4.5 Series-parallel feedback configuration.

therefore, formula (Equation 4.5) applies and the output impedance across the load admittance
Y2 becomes
Zout (0)
Zout (x) ¼ (4:15)
F(x)
demonstrating that the impedance measured across the path of the feedback is reduced by the factor that
is the normal value of the return difference with respect to the element x, where x is an arbitrary element
of interest. For the input impedance of the amplifier looking into the voltage source Vs of Figure 4.5, by
open circuiting or removing the voltage source Vs, we break the feedback loop. Thus, formula (Equation
4.6) applies and the input impedance becomes
Zin (x) ¼ F(x)Zin (0) (4:16)
meaning that the impedance measured in series lines is increased by the same factor F(x). Similar
conclusions can be reached for other types of configurations discussed in Chapter 2 by applying Black-
man’s formula.
Again, refer to the general feedback configuration of Figure 3.6. If w(x) represents the voltage gain
Vpq=Vrs or the transfer admittance Ipq=Vrs. Then, from Equation 4.27 we can write
w(x) Yrp,sq (x) Yrr,ss (0)

¼ (4:17)
w(0) Yrp,sq (0) Yrr,ss (x)
^ with respect to x for

The first term in the product on the right-hand side is the null return difference F(x)
the input terminals r and s and output terminals p and q. The second term is the reciprocal of the null
return difference with respect to x for the same input and output port at terminals r and s. This reciprocal
can then be interpreted as the return difference with respect to x when the input port of the amplifier is
short circuited. Thus, the voltage gain or the transfer admittance can be expressed as
^
F(x)
w(x) ¼ w(0) (4:18)
Finally, if w(x) denotes the short circuit current gain Ipq=Is as Y2 approaches infinity, we obtain
w(x) Yrp,sq (x) Ypp,qq (0)

¼ (4:19)
w(0) Yrp,sq (0) Ypp,qq (x)
The second term in the product on the right-hand side is the reciprocal of the return difference with
respect to x when the output port of the amplifier is short circuited, giving a formula for the short circuit
current gain as
^
F(x)
w(x) ¼ w(0) (4:20)
F(output short circuited)
Again, consider the voltage-series or series-parallel feedback amplifier of Figure 3.9 an equivalent network
of which is given in Figure 3.10. The return differences F(~ ^ ak) and the
ak), the null return differences F(~
voltage gain w were computed earlier in Equations 3.45, 3.52, and 3.44, and are repeated next:
a1 ) ¼ 93:70, F(~
F(~ a2 ) ¼ 18:26 (4:21a)
^ a1 ) ¼ 103:07 103 ,
F(~ ^ a2 ) ¼ 2018:70
F(~ (4:21b)
V25
w¼ ¼ w(~
a1 ) ¼ w(~
a2 ) ¼ 45:39 (4:21c)
Vs
We apply Equation 4.18 to calculate the voltage gain w, as follows:
^ a1 )
F(~ 103:07 103
a1 ) ¼ w(0)
w(~ ¼ 0:04126 ¼ 45:39 (4:22)
F(input short circuited) 93:699
where

a1 )
Y12,55 (~ 205:24 1012
w(0) ¼ ¼ ¼ 0:04126 (4:23a)
a1 ) a~ 1 ¼0 497:41 1011
Y11,55 (~
a1 ) 466:07 109
Y11,55 (~
F(input short circuited) ¼ ¼ ¼ 93:699 (4:23b)
Y11,55 (0) 4:9741 109
and
^ a2 )
F(~ 2018:70
a2 ) ¼ w(0)
w(~ ¼ 0:41058 ¼ 45:39 (4:24)
F(input short circuited) 18:26
where
a2 )
Y12,55 (~ 104:79 1010
w(0) ¼ ja~ 2 ¼0 ¼ ¼ 0:41058 (4:25a)
a2 )
Y11,55 (~ 255:22 1010
a2 ) 466:07 109
Y11,55 (~
F(input short circuited) ¼ ¼ ¼ 18:26 (4:25b)
Y11,55 (0) 25:52 109
4.2 Sensitivity Function

One of the most important effects of negative feedback is its ability to make an amplifier less sensitive to
the variations of its parameters because of aging, temperature variations, or other environment changes.
A useful quantitative measure for the degree of dependence of an amplifier on a particular parameter is
known as the sensitivity. The sensitivity function, written as 6(x), for a given transfer function with
respect to an element x is defined as the ratio of the fractional change in a transfer function to the
fractional change in x for the situation when all changes concerned are differentially small. Thus, if w(x)
is the transfer function, the sensitivity function can be written as
Dw=w x @w @ ln w
6(x) ¼ lim ¼ ¼x (4:26)
Dx!0 Dx=x w @x @x
Refer to the general feedback configuration of Figure 3.6, and let w(x) represent either the current gain
Ipq=Is or the transfer impedance Vpq=Is for the time being. Then, we obtain from Equation 3.24
Yrp,sq (x) Yrp,sq (x)

w(x) ¼ Y2 or (4:27)
Yuv (x) Yuv (x)
As before, we write
@Yuv (x)
Y_ uv (x) ¼ (4:28a)
@x
@Yrp,sq (x)
Y_ rp,sq (x) ¼ (4:28b)
@x
obtaining
Yuv (x) ¼ Yuv (0) þ xY_ uv (x) (4:29a)
Yrp,sq (x) ¼ Yrp,sq (0) þ xY_ rp,sq (x) (4:29b)
Substituting Equation 4.27 in Equation 4.26, in conjunction with Equation 4.29, yields
Y_ rp,sq (x) Y_ uv (x) Yrp,sq (x) Yrp,sq (0) Yuv (x) Yuv (0)
6(x) ¼ x x ¼
Yrp,sq (x) Yuv (x) Yrp,sq (x) Yuv (x)
Yuv (0) Yrp,sq (0) 1 1
¼ ¼ (4:30)
Yuv (x) Yrp,sq (x) F(x) F(x) ^
Combining this with Equation 4.3, we obtain

1 w(0)
6(x) ¼ 1 (4:31)
F(x) w(x)
Observe that if w(0) ¼ 0, Equation 4.31 becomes
1
6(x) ¼ (4:32)
F(x)
meaning that sensitivity is equal to the reciprocal of the return difference. For the ideal feedback model,
the feedback path is unilateral. Hence, w(0) ¼ 0 and
1 1 1
6¼ ¼ ¼ (4:33)
F 1 þ T 1 mb
For a practical amplifier, w(0) is usually very much smaller than w(x) in the passband, and F 1=6 may
be used as a good estimate of the reciprocal of the sensitivity in the same frequency band. A single-loop
feedback amplifier composed of a cascade of common-emitter stages with a passive network providing
the desired feedback fulfills this requirements. If in such a structure any one of the transistors fails, the
forward transmission is nearly zero and w(0) is practically zero. Our conclusion is that if the failure of
any element will interrupt the transmission through the amplifier as a whole to nearly zero, the sensitivity
is approximately equal to the reciprocal of the return difference with respect to that element. In the case
of driving-point impedance, w(0) is not usually smaller than w(x), and the reciprocity relation is not
generally valid.
Now assume that w(x) represents the voltage gain. Substituting Equation 4.27 in Equation 4.26
results in
Y_ rp,sq (x) Y_ rr,ss (x) Yrp,sq (x) Yrp,sq (0) Yrr,ss (x) Yrr,ss (0)
6(x) ¼ x x ¼
Yrp,sq (x) Yrr,ss (x) Yrp,sq (x) Yrr,ss (x)
Yrr,ss (0) Yrp,sq (0) 1 1
¼ ¼ (4:34)
Yrr,ss (x) Yrp,sq (x) F(input short circuited) F(x) ^
Combining this with Equation 4.18 gives

1 w(0)
6(x) ¼ 1 (4:35)
F(input short circuited) w(x)
Finally, if w(x) denotes the short circuit current gain Ipq=Is as Y2 approaches infinity, the sensitivity
function can be written as
Ypp,qq (0) Yrp,sq (0) 1 1

6(x) ¼ ¼ (4:36)
^
Ypp,qq (x) Yrp,sq (x) F(output short circuited) F(x)
which when combined with Equation 4.20 yields

1 w(0)
6(x) ¼ 1 (4:37)
F(output short circuited) w(x)
We remark that Equations 4.31, 4.35, and 4.39 are quite similar. If the return difference F(x) is
interpreted properly, they can all be represented by the single relation Equation 4.31. As before, if
w(0) ¼ 0, the sensitivity for the voltage gain function is equal to the reciprocal of the return difference
under the situation that the input port of the amplifier is short circuited, whereas the sensitivity for the
short circuit current gain is the reciprocal of the return difference when the output port is short circuited.
Example 4.2
The network of Figure 4.6 is a common-emitter transistor amplifier. After removing the biasing circuit
and using the common-emitter hybrid model for the transistor at low frequencies, an equivalent
network of the amplifier is presented in Figure 4.7 with
Vs
Is0 ¼ (4:38a)
R1 þ rx
1 1 1
G01 ¼ ¼ þ (4:38b)
R01 R1 þ rx rp
1 1 1
G02 ¼ ¼ þ (4:38c)
R02 R2 Rc
VCC
RB1 Rc
C1 C2
R1
RB2 R2
+
Vs RE CE
–
FIGURE 4.6 Common-emitter transistor feedback amplifier.

Cμ I23
1 2
+ +
R1́ = (R1 + rx)||rπ
R2́ = R2 || Rc
I ś Cπ V gmV V23
– –
FIGURE 4.7 Equivalent network of the feedback amplifier of Figure 4.6.
The indefinite admittance matrix of the amplifier is

2 3
G01 þ sCp þ sCm sCm G01 sCp
Y¼4 gm sCm G02 þ sCm 0
G2 gm 5 (4:39)
G01 sCp gm G02 G01 þ G02 þ sCp þ gm
Assume that the controlling parameter gm is the element of interest. The return difference and the null
return difference with respect to gm in Figure 4.7 with Is0 as the input port and R02 , as the output port, are
0
Y33 (gm ) G þ sCp G02 þ sCm þ sCm G02 þ gm
F(gm ) ¼ ¼ 1 0 0 (4:40)
Y33 (0) ðG1 þ sCp Þ G2 þ sCm þ sCm G02
^F(gm ) ¼ Y12,33 (gm ) ¼ sCm gm ¼ 1 gm (4:41)

Y12,33 (0) sCm sCm
The current gain I23=Is0 as defined in Figure 4.7, is computed as
Y12,33 (gm ) sCm gm

w(gm ) ¼ ¼ (4:42)
R02 Y33 (gm ) R02 ðG01 þ sCp Þ G02 þ sCm þ sCm ðG02 þ gm Þ
Substituting these in Equations 4.30 or 4.31 gives

gm G01 þ sCp þ sCm G02 þ sCm
6(gm ) ¼ 0 0 (4:43)
sCm gm ðG1 þ sCp Þ G2 þ sCm þ sCm ðG02 þ gm Þ
Finally, we compute the sensitivity for the driving-point impedance facing the current source Is0 . From
Equation 4.31, we obtain

1 Z(0) sCm gm
6(gm ) ¼ 1 ¼ 0 (4:44)
F(gm ) Z(gm ) ðG1 þ sCp Þ G02 þ sCm þ sCm ðG02 þ gm Þ
where
Y11,33 (gm ) G0 þ sCm

Z(gm ) ¼ ¼ 0 0 2 (4:45)
Y33 (gm ) ðG1 þ sCp Þ G2 þ sCm þ sCm ðG02 þ gm Þ
5
Measurement of Return
Difference
5.1 Blecher’s Procedure ................................................................... 5-2
Wai-Kai Chen 5.2 Impedance Measurements ....................................................... 5-4
University of Illinois at Chicago References .............................................................................................. 5-7
The zeros of the network determinant are called the natural frequencies. Their locations in the complex-
frequency plane are extremely important in that they determine the stability of the network. A network is
said to be stable if all of its natural frequencies are restricted to the open left-half side of the complex-
frequency plane. If a network determinant is known, its roots can readily be computed explicitly with the
aid of a computer if necessary, and the stability problem can then be settled directly. However, for a
physical network there remains the difficulty of getting an accurate formulation of the network deter-
minant itself, because every equivalent network is, to a greater or lesser extent, an idealization of the
physical reality. As frequency is increased, parasitic effects of the physical elements must be taken into
account. What is really needed is some kind of experimental verification that the network is stable and
will remain so under certain prescribed conditions. The measurement of the return difference provides
an elegant solution to this problem.
The return difference with respect to an element x in a feedback amplifier is defined by
Yuv (x)
F(x) ¼ (5:1)
Yuv (0)
Because Yuv(x) denotes the nodal determinant, the zeros of the return difference are exactly the same as
the zeros of the nodal determinant provided that there is no cancellation of common factors between
Yuv(x) and Yuv(0). Therefore, if Yuv(0) is known to have no zeros in the closed right-half side of the
complex-frequency plane, which is usually the case in a single-loop feedback amplifier when x is set to
zero, F(x) gives precisely the same information about the stability of a feedback amplifier as does the
nodal determinant itself. The difficulty inherent in the measurement of the return difference with respect
to the controlling parameter of a controlled source is that, in a physical system, the controlling branch
and the controlled source both form part of a single device such as a transistor, and cannot be physically
separated. In the following, we present a scheme that does not require the physical decomposition of a
device.
Let a device of interest be brought out as a two-port network connected to a general four-port network
as shown in Figure 5.1. For our purposes, assume that this device is characterized by its y parameters, and
represented by its y-parameter equivalent two-port network as indicated in Figure 5.2, in which the
parameter y21 controls signal transmission in the forward direction through the device, whereas y12 gives
5-1
Two-port network
a b d c
r p
Is Y1 Four-port network Y2
s q
FIGURE 5.1 The general configuration of a feedback amplifier with a two-port device.
+ +
y11 V1 V2 y22
+ V 'ab y12V2 y21V1

– – –
– Vcd +
a b d c
r p
Is Y1 Four-port network Y2
s q
FIGURE 5.2 The representation of a two-port device in Figure 5.1 by its y parameters.
the reverse transmission, accounting for the internal feedback within the device. Our objective is to
measure the return difference with respect to the forward short circuit transfer admittance y21.
5.1 Blecher’s Procedure [1]

Let the two-port device be a transistor operated in the common-emitter configuration with terminals a,
b ¼ d, and c representing, respectively, the base, emitter, and collector terminals. To simplify our
notation, let a ¼ 1, b ¼ d ¼ 3, and c ¼ 2, as exhibited explicitly in Figure 5.3.
To measure F(y21), we break the base terminal of the transistor and apply a 1 V excitation at its input
as exhibited in Figure 5.3. To ensure that the controlled current source y21V13 drives a replica of what it
sees during normal operation, we connect an active one-port network composed of a parallel combin-
ation of the admittance y11 and a controlled current source y12V23 at terminals 1 and 3. The returned
voltage V13 is precisely the negative of the return ratio with respect to the element y21. If, in the frequency
band of interest, the externally applied feedback is large compared with the internal feedback of the
transistor, the controlled source y12V23 can be ignored. If, however, we find that this internal feedback
cannot be ignored, we can simulate it by using an additional transistor, connected as shown in Figure 5.4.
This additional transistor must be matched as closely as possible to the one in question. The one-port
Measurement of Return Difference 5-3
y12V23
+
y11
1V – V23 +
+ V13 – – y0
1 2
r 3 p
Y1 Four-port network Y2
s q
FIGURE 5.3 A physical interpretation of the return difference F(y21) for a transistor operated in the common-
emitter configuration and represented by its y parameters yij.
–y12
+ +
y11
yo – V23 +
1V
– – yo
1 2
r 3 p
s q
FIGURE 5.4 The measurement of return difference F(y21) for a transistor operated in the common-emitter
configuration and represented by its y parameters yij.
admittance yo denotes the admittance presented to the output port of the transistor under consideration
as indicated in Figures 5.3 and 5.4. For a common-emitter state, it is perfectly reasonable to assume that
jy0j jy12j and jy11j jy12j. Under these assumptions, it is straightforward to show that the Norton
equivalent network looking into the two-port network at terminals 1 and 3 of Figure 5.4 can be
approximated by the parallel combination of y11 and y12V23, as indicated in Figure 5.3. In Figure 5.4, if
the voltage sources have very low internal impedances, we can join together the two base terminals of the
transistors and feed them both from a single voltage source of very low internal impedance. In this way,
we avoid the need of using two separate sources. For the procedure to be feasible, we must demonstrate
the admittances y11 and y12 can be realized as the input admittances of one-port RC networks.
Consider the hybrid-pi equivalent network of a common-emitter transistor of Figure 5.5, the short
circuit admittance matrix of which is found to be

1 gx (gp þ sCp þ sCm ) gx sCm
Ysc ¼ (5:2)
gx þ gp þ sCp þ sCm gx (gm sCm ) sCm (gx þ gp þ sCp þ gm )
rx = 1/gx Cμ
B 1 B' 4 2 C
rπ = 1/gπ Cπ V gmV
–
E E
FIGURE 5.5 The hybrid-pi equivalent network of a common-emitter transistor.
rx rx (1 + Cπ/Cμ)
rπCμ/(rx+rπ)
Cπ + Cμ
y11 rπ –y12
(a) (b)
FIGURE 5.6 (a) The realization of y11 and (b) the realization of y12.
It is easy to confirm that the admittance y11 and y12 can be realized by the one-port networks of
Figure 5.6.
5.2 Impedance Measurements

In this section, we show that the return difference can be evaluated by measuring two driving-point
impedances at a convenient port in the feedback amplifier [2].
Refer again to the general feedback configuration of Figure 5.2. Suppose that we wish to evaluate the
return difference with respect to the forward short circuit transfer admittance y21. The controlling
parameters y12 and y21 enter the indefinite-admittance matrix Y in the rectangular patterns as
shown next:
a b c d
2 3
a y12 y12
b66 y12 y12 7
7 (5:3)
Y(x) ¼ 6 7
c 4 y21 y21 5
d y21 y21
To emphasize the importance of y12 and y21, we again write Yuv(x) as Yuv(y12, y21) and zaa,bb(x) as
zaa,bb(y12, y21). By appealing to Equation 3.25, the impedance looking into terminals a and b of
Figure 5.2 is
Yaa,bb (y12 , y21 )

zaa,bb (y12 , y21 ) ¼ (5:4)
Ydd (y12 , y21 )
The return difference with respect to y21 is given by
Ydd (y12 , y21 )

F(y21 ) ¼ (5:5)
Ydd (y12 , 0)
Combining these yields
Yaa,bb (y12 , y21 ) Yaa,bb (0, 0)

F(y21 )zaa,bb (y12 , y21 ) ¼ ¼
Ydd (y12 , 0) Ydd (y12 , 0)
Yaa,bb (0, 0) Ydd (0, 0) zaa,bb (0, 0)
¼ ¼ (5:6)
Ydd (0, 0) Ydd (y12 , 0) F(y12 )jy21 ¼0
obtaining a relation
zaa,bb (0, 0)
F(y12 )jy21 ¼0 F(y21 ) ¼ (5:7)
zaa,bb (y12 , y21 )
among the return differences and the driving-point impedances. F(y12)jy21 ¼ 0 is the return difference
with respect to y12 when y21 is set to zero. This quantity can be measured by the arrangement of
Figure 5.7. zaa,bb(y12, y21) is the driving-point impedance looking into terminals a and b of the network
of Figure 5.2. Finally, zaa,bb(0, 0) is the impedance to which zaa,bb(y12, y21) reduces when the controlling
parameters y12 and y21 are both set to zero. This impedance can be measured by the arrangement of
Figure 5.8. Note that, in all three measurements, the independent current source Is is removed.
Suppose that we wish to measure the return difference F(y21) with respect to the forward transfer
admittance y21 of a common-emitter transistor shown in Figure 5.2. Then, the return difference F(y12)
when y21 is set to zero, for all practical purposes, is indistinguishable from unity. Therefore, Equation 5.7
reduces to the following simpler form:
z11, 33 (0, 0)
F(y21 ) (5:8)
z11, 33 (y12 , y21 )
+ F (y12) –
+
Two-port device 1V y22
–
r a b d c p
s q
FIGURE 5.7 The measurement of the return difference F(y12) with y21 set to zero.
zaa,bb(0,0)
y11 Two-port device
a b d c
r p
s q
FIGURE 5.8 The measurement of the driving-point impedance zaa,bb(0, 0).
z11,33 (y12, y21)
1 3 2
r p
s q
FIGURE 5.9 The measurement of the driving-point impedance z11,33(y12, y21).
z11,33 (0,0)
y11
r 1 3 2 p
s q
FIGURE 5.10 The measurement of the driving-point impedance z11,33(0, 0).
showing that the return difference F(y21) effectively equals the ratio of two functional values assumed by
the driving-point impedance looking into terminals 1 and 3 of Figure 5.2 under the condition that the
controlling parameters y12 and y21 are both set to zero and the condition that they assume their nominal
values. These two impedances can be measured by the network arrangements of Figures 5.9 and 5.10.
References
1. F. H. Blecher, Design principles for single loop transistor feedback amplifiers, IRE Trans. Circuit
Theory, CT-4, 145–156, 1957.
2. S. S. Haykin, Active Network Theory, Reading, MA: Addison-Wesley, 1970.
6
Multiple-Loop
Feedback Amplifiers
6.1 Multiple-Loop Feedback Amplifier Theory ......................... 6-1
6.2 Return Different Matrix ........................................................... 6-5
6.3 Null Return Difference Matrix ............................................... 6-6
6.4 Transfer-Function Matrix and Feedback.............................. 6-7
6.5 Sensitivity Matrix ..................................................................... 6-10
Wai-Kai Chen 6.6 Multiparameter Sensitivity..................................................... 6-14
University of Illinois at Chicago References ............................................................................................ 6-17
So far, we have studied the single-loop feedback amplifiers. The concept of feedback was introduced in
terms of return difference. We found that return difference is the difference between the unit applied
signal and the returned signal. The returned signal has the same physical meaning as the loop trans-
mission in the ideal feedback mode. It plays an important role in the study of amplifier stability, its
sensitivity to the variations of the parameters, and the determination of its transfer and driving point
impedances. The fact that return difference can be measured experimentally for many practical amplifiers
indicates that we can include all the parasitic effects in the stability study, and that stability problem can
be reduced to a Nyquist plot.
In this section, we study amplifiers that contain a multiplicity of inputs, outputs, and feedback loops.
They are referred to as the multiple-loop feedback amplifiers. As might be expected, the notion of return
difference with respect to an element is no longer applicable, because we are dealing with a group of
elements. For this, we generalize the concept of return difference for a controlled source to the notion of
return difference matrix for a multiplicity of controlled sources. For measurement situations, we
introduce the null return difference matrix and discuss its physical significance. We demonstrate that
the determinant of the overall transfer function matrix can be expressed explicitly in terms of the
determinants of the return difference and the null return difference matrices, thereby allowing us to
generalize Blackman’s formula for the input impedance.
6.1 Multiple-Loop Feedback Amplifier Theory

The general configuration of a multiple-input, multiple-output, and multiple-loop feedback amplifier is
presented in Figure 6.1, in which the input, output, and feedback variables may be either currents or
voltages. For the specific arrangement of Figure 6.1, the input and output variables are represented by an
n-dimensional vector u and an m-dimensional vector y as
6-1
+– +– +– +–
φ1 φp θ1 θq
I1
Is1 1 Zl1
Ir
Isk k Zlr
+ N
+
Vs1 k +1 Vr +1 Zl(r +1)
– –
+ +
Vs(n–k) n Vm Zlm
– –
FIGURE 6.1 The general configuration of a multiple-input, multiple-output, and multiple-loop feedback amplifier.
2 3 2 3 2 3 2 3
u1 Is1 y1 I1
6 u2 7 6 7 Is2 6 y2 7 6 7 I2
6 7 6 7 6 7 6 7
6 .. 7 6 7 .. 6 ..7 6 7 ..
6 . 7 6 7 . 6 .7 6 7 .
6 7 6 7 6 7 6 7
6 uk 7 6 Isk 7 6 y r 7 6 Ir 7
u(s) ¼ 6 7¼6
6 ukþ1 7 6 Vs1 7,
7 y(s) ¼ 6 7¼6 7
6 yrþ1 7 6 Vrþ1 7 (6:1)
6 7 6 7 6 7 6 7
6 ukþ2 7 6 Vs2 7 6 yrþ2 7 6 Vrþ2 7
6 7 6 7 6 7 6 7
6 .. 7 6 .. 7 6 . 7 6 .. 7
4 . 5 4 . 5 4 .. 5 4 . 5
un Vs(nk) ym Vm
respectively. The elements of interest can be represented by a rectangular matrix X of order q 3 p relating
the controlled and controlling variables by the matrix equation
2 3 2 32 3
u1 x11 x12 x1p f1
6 u2 7 6 x21 x22 x2p 76 f2 7
6 7 6 76 7
Q ¼ 6 .. 7 ¼ 6 . .. .. .. 76 .. 7 ¼ XF (6:2)
4 . 5 4 .. . . . 54 . 5
uq xq1 xq2 xqp fp
where the p-dimensional vector F is called the controlling vector, and the q-dimensional vector Q is the
controlled vector. The controlled variables uk and the controlling variables Fk can either be currents or
voltages. The matrix X can represent either a transfer-function matrix or a driving-point function matrix.
If X represents a driving-point function matrix, the vectors Q and F are of the same dimension (q ¼ p)
and their components are the currents and voltages of a p-port network.
The general configuration of Figure 6.1 can be represented equivalently by the block diagram of
Figure 6.2 in which N is a (p þ q þ m þ n)-port network and the elements of interest are exhibited
Multiple-Loop Feedback Amplifiers 6-3
explicitly by the block X. For the

(p þ q þ m þ n)-port network Φ X Θ
N, the vectors u and are Q are
its inputs, and the vectors F and
y its outputs. Since N is linear,
the input and output vectors are
related by the matrix equations u N y
F ¼ AQ þ Bu (6:3a)
y ¼ CQ þ Du (6:3b)
FIGURE 6.2 The block diagram of the general feedback configuration of
Figure 6.1.
where A, B, C, and D are transfer-
function matrices of orders p 3 q, p 3 n, m 3 q, and m 3 n, respectively. The vectors Q and F are
not independent and are related by
Q ¼ XF (6:3c)
The relationships among the above three linear matrix equations can also be represented by a matrix
signal-flow graph as shown in Figure 6.3 known as the fundamental matrix feedback-flow graph. The
overall closed-loop transfer-function matrix of the multiple-loop feedback amplifier is defined by
the equation
y ¼ W(X)u (6:4)
where W(X) is of order m 3 n. As before, to emphasize the importance of X, the matrix W is written as
W(X) for the present discussion, even though it is also a function of the complex-frequency variable s.
Combining the previous matrix equations, the transfer-function matrix is
W(X) ¼ D þ CX(1p AX)1 B (6:5a)
or
W(X) ¼ D þ C(1q XA)1 XB (6:5b)
where 1p denotes the identity matrix of order p. Clearly, we have
W(0) ¼ D (6:6)
A
In particular, when X is square and nonsingular, Equation
6.5 can be written as
Φ Θ
X
W(X) ¼ D þ C(X1 A)1 B (6:7)
B C
D Example 6.1
u y
Consider the voltage-series feedback amplifier of
FIGURE 6.3 The fundamental matrix feed- Figure 3.9. An equivalent network is shown in Figure
back-flow graph. 6.4 in which we have assumed that the two transistors
212.8 μmho
–4
Ia = 455 × 10 V13
I51 V13
1 + – 3 2
4 I25
909 μmho +
Ib = 455 × 10–4V45
+
+
212.8 μmho
1061 μmho
0.01 mho
28 μmho
Vs V45 V25
–
–
–
5
FIGURE 6.4 An equivalent network of the voltage-series feedback amplifier of Figure 3.9.
are identical with hie ¼ 1.1 kV, hfe ¼ 50, hre ¼ hoe ¼ 0. Let the controlling parameters of the two
controlled sources be the elements of interest. Then we have

Ia 455 0 V13
Q¼ ¼ 104 ¼ XF (6:8)
Ib 0 455 V45
Assume that the output voltage V25 and input current I51 are the output variables. Then the seven-port
network N defined by the variables V13, V45, V25, I51, Ia, Ib, and Vs can be characterized by the matrix
equations

V13 90:782 45:391 Ia 0:91748
F¼ ¼ þ [Vs ]
V45 942:507 0 Ib 0
¼ AQ þ Bu (6:9a)

V25 45:391 2372:32 Ia 0:041260
y¼ ¼ þ [Vs ]
I51 0:08252 0:04126 Ib 0:000862
¼ CQ þ Du (6:9b)
According to Equation 6.4, the transfer-function matrix of the amplifier is defined by the matrix
equation

V25 w11
y¼ ¼ [V ] ¼ W(X)u (6:10)
I51 w21 s
Because X is square and nonsingular, we can use Equation 6.7 to calculate W(X):

1 1 45:387 w11
W(X) ¼ D þ C(X A) B¼ ¼ (6:11)
0:369 104 w21
where

4:856 10:029
(X1 A)1 ¼ 104 (6:12)
208:245 24:914
obtaining the closed-loop voltage gain w11 A

and input impedance Zin facing the voltage
source Vs as
Φ Θ
1p h g X
V25 Vs 1
w11 ¼ ¼ 45:387, Zin ¼ ¼
Vs I51 w21 B C
¼ 27:1 kV (6:13)
D
u=0 y
6.2 Return Different Matrix
FIGURE 6.5 The physical interpretation of the loop-
In this section, we extend the concept of return transmission matrix.
difference with respect to an element to the
notion of return difference matrix with respect to a group of elements.
In the fundamental matrix feedback-flow graph of Figure 6.3, suppose that we break the input of
the branch with transmittance X, set the input excitation vector u to zero, and apply a signal p-vector g
to the right of the breaking mark, as depicted in Figure 6.5. Then the returned signal p-vector h to the
left of the breaking mark is found to be
h ¼ AXg (6:14)
The square matrix AX is called the loop-transmission matrix and its negative is referred to as the return
ratio matrix denoted by
T(X) ¼ AX (6:15)
The difference between the applied signal vector g and the returned signal vector h is given by
g h ¼ (1p AX)g (6:16)
The square matrix 1p AX relating the applied signal vector g to the difference of the applied signal
vector g and the returned signal vector h is called the return difference matrix with respect to X and is
denoted by
F(X) ¼ 1p AX (6:17)
Combining this with Equation 6.15 gives
F(X) ¼ 1p þ T(X) (6:18)
For the voltage-series feedback amplifier of Figure 6.4, let the controlling parameters of the two
controlled current sources be the elements of interest. Then the return ratio matrix is found from
Equations 6.8 and 6.9a

90:782 45:391 455 104 0
T(X) ¼ AX ¼
942:507 0 0 455 104

4:131 2:065
¼ (6:19)
42:884 0
obtaining the return difference matrix as

5:131 2:065
F(X) ¼ 12 þ T(X) ¼ (6:20)
42:884 1
6.3 Null Return Difference Matrix

A direct extension of the null return difference for the single-loop feedback amplifier is the null return
difference matrix for the multiple-loop feedback networks.
Refer again to the fundamental matrix feedback-flow graph of Figure 6.3. As before, we break the
branch with transmittance X and apply a signal p-vector g to the right of the breaking mark, as illustrated
in Figure 6.6. We then adjust the input excitation n-vector u so that the total output m-vector y resulting
from the inputs g and u is zero. From Figure 6.6, the desired input excitation u is found:
Du þ CXg ¼ 0 (6:21)
or
u ¼ D1 CXg (6:22)
provided that the matrix D is square and nonsingular. This requires that the output y be of the same
dimension as the input u or m ¼ n. Physically, this requirement is reasonable because the effects at the
output caused by g can be neutralized by a unique input excitation u only when u and y are of the same
dimension. With these inputs u and g, the returned signal h to the left of the breaking mark in Figure 6.6
is computed as
h ¼ Bu þ AXg ¼ (BD1 CX þ AX)g (6:23)
obtaining
g h ¼ (1p AX þ BD1 CX)g (6:24)
The square matrix
^
F(X) ^
¼ 1p þ T(X)
^
¼ 1p AX þ BD1 CX ¼ 1p AX (6:25)
A
relating the input signal vector g to the difference

Φ Θ of the input signal vector g, and the returned
1p h g X
signal vector h is called the null return difference
matrix with respect to X, where
B C
^
T(X) ^
¼ AX þ BD1 CX ¼ AX (6:26a)
D ^ ¼ A BD1 C
u y=0 A (6:26b)
FIGURE 6.6 The physical interpretation of the null

^
The square matrix T(X) is known as the null
return difference matrix. return ratio matrix.
Example 6.2
Consider again the voltage-series feedback amplifier of Figure 3.9, an equivalent network of which is
illustrated in Figure 6.4. Assume that the voltage V25 is the output variable. Then from Equation 6.9

V13 90:782 45:391 Ia 0:91748
F¼ ¼ þ [Vs ]
V45 942:507 0 Ib 0
¼ AQ þ Bu (6:27a)

Ia
y ¼ [V25 ] ¼ [45:391 2372:32] þ [0:04126] [Vs ]
Ib
¼ CQ þ Du (6:27b)
Substituting the coefficient matrices in Equation 6.26b, we obtain

^ ¼ A BD1 C ¼ 1, 100:12
A
52, 797:6
(6:28)
942:507 0
giving the null return difference matrix with respect to X as

^ ^ 51:055 2402:29
F(X) ¼ 12 AX ¼ (6:29)
42:884 1
Suppose that the input current I51 is chosen as the output variable. Then, from Equation 6.9b we have

Ia
y ¼ [I51 ] ¼ [0:08252 0:04126] þ [0:000862] [Vs ] ¼ CQ þ Du (6:30)
Ib
The corresponding null return difference matrix becomes

F(X) ^ ¼ 1:13426 0:06713
^ ¼ 12 AX (6:31)
42:8841 1
where

^ ¼ 2:95085
A
1:47543
(6:32)
942:507 0
6.4 Transfer-Function Matrix and Feedback

In this section, we show the effect of feedback on the transfer-function matrix W(X). Specifically, we
express det W(X) in terms of the det X(0) and the determinants of the return difference and null return
difference matrices, thereby generalizing Blackman’s impedance formula for a single input to a multi-
plicity of inputs.
Before we proceed to develop the desired relation, we state the following determinant identity for two
arbitrary matrices M and N of order m 3 n and n 3 m:
det(1m þ MN) ¼ det(1n þ NM) (6:33)

a proof of which may be found in [1,2]. Using this, we next establish the following generalization of
Blackman’s formula for input impedance.
THEOREM 6.1
In a multiple-loop feedback amplifier, if W(0) ¼ D is nonsingular, then the determinant of the transfer-
function matrix W(X) is related to the determinants of the return difference matrix F(X) and the null
^
return difference matrix F(X) by
^
det F(X)
det W(X) ¼ det W(0) (6:34)
det F(X)
PROOF: From Equation 6.5a, we obtain

W(X) ¼ D 1n þ D1 CX(1p AX)1 B (6:35)
yielding

det W(X) ¼ ½det W(0)det 1n þ D1 CX(1p AX)1 B

¼ ½det W(0)det 1p þ BD1 CX(1p AX)1

¼ ½det W(0)det 1p AX þ BD1 CX (1p AX)1
^
det W(0)det F(X)
¼ (6:36)
det F(X)
The second line follows directly from Equation 6.33. This completes the proof of the theorem.
As indicated in Equation 4.4, the input impedance Z(x) looking into a terminal pair can be conveni-
ently expressed as
F(input short ciruited)

Z(x) ¼ Z(0) (6:37)
A similar expression can be derived from Equation 6.34 if W(X) denotes the impedance matrix of an
n-port network of Figure 6.1. In this case, F(X) is the return difference matrix with respect to X for the
situation when the n ports where the impedance matrix are defined are left open without any sources, and
^
we write F(X) ¼ F(input open-circuited). Likewise, F(X) is the return difference matrix with respect to X
for the input port-current vector Is and the output port-voltage vector V under the condition that Is is
^
adjusted so that the port-voltage vector V is identically zero. In other words, F(X) is the return difference
matrix for the situation when the n ports, where the impedance matrix is defined, are short-circuited, and
^ ¼ F (input short-circuited). Consequently, the determinant of the impedance matrix Z(X)
we write F(X)
of an n-port network can be expressed from Equation 6.34 as
det F (input short circuited)

det Z(X) ¼ det Z(0) (6:38) &
det F (input open circuited)
Example 6.3
Refer again to the voltage-series feedback amplifier of Figure 3.9, an equivalent network of which is
illustrated in Figure 6.4. As computed in Equation 6.20, the return difference matrix with respect to the
two controlling parameters is given by

5:131 2:065
F(X) ¼ 12 þ T(X) ¼ (6:39)
42:884 1
the determinant of which is
det F(X) ¼ 93:68646 (6:40)
If V25 of Figure 6.4 is chosen as the output and Vs as the input, the null return difference matrix is, from
Equation 6.29,

F(X) ^ ¼ 51:055 2402:29
^ ¼ 12 AX (6:41)
42:884 1
^ ¼ 103, 071
det F(X) (6:42)
By appealing to Equation 6.34, the feedback amplifier voltage gain V25=Vs can be written as
V25 ^
det F(X) 103, 071
w(X) ¼ ¼ w(0) ¼ 0:04126 ¼ 45:39 (6:43)
Vs det F(X) 93:68646
confirming Equation 3.44, where w(0) ¼ 0.04126, as given in Equation 6.27b.

Suppose, instead, that the input current I51 is chosen as the output and Vs as the input. Then, from
Equation 6.31, the null return difference matrix becomes

^ ¼ 1:13426
^ ¼ 12 A(X) 0:06713
F(X) (6:44)
42:8841 1
^ ¼ 4:01307
det F(X) (6:45)
By applying Equation 6.34, the amplifier input admittance is obtained as
I51 ^
det F(X)
w(X) ¼ ¼ w(0)
Vs det F(X)
4 4:01307
¼ 8:62 10 ¼ 36:92 mmho (6:46)
93:68646
or 27.1 kV, confirming Equation 6.13, where w(0) ¼ 862 mmho is found from Equation 6.30.
Another useful application of the generalized Blackman’s formula (Equation 6.38) is that it provides
the basis of a procedure for the indirect measurement of return difference. Refer to the general feedback
network of Figure 6.2. Suppose that we wish to measure the return difference F(y21) with respect to the
forward short circuit transfer admittance y21 of a two-port device characterized by its y parameters yij.
Choose the two controlling parameters y21 and y12 to be the elements of interest. Then, from Figure 5.2
we obtain

Ia y21 0 V1
Q¼ ¼ ¼ XF (6:47)
Ib 0 y12 V2
where Ia and Ib are the currents of the voltage-controlled current sources. By appealing to Equation 6.38,
the impedance looking into terminals a and b of Figure 5.2 can be written as
det F (input short circuited)

zaa,bb (y12 , y21 ) ¼ zaa,bb (0, 0) (6:48)
det F (input open circuited)
When the input terminals a and b are open-circuited, the resulting return difference matrix is exactly the
same as that found under normal operating conditions, and we have

F11 F12
F (input open circuited) ¼ F(X) ¼ (6:49)
F21 F22
Because
F(X) ¼ 12 AX (6:50)
the elements F11 and F21 are calculated with y12 ¼ 0, whereas F12 and F22 are evaluated with y21 ¼ 0.
When the input terminals a and b are short circuited, the feedback loop is interrupted and only the
second row and first column element of the matrix A is nonzero, and we obtain
det F (input short circuited) ¼ 1 (6:51)
Because X is diagonal, the return difference function F(y21) can be expressed in terms of det F(X) and the
cofactor of the first row and first column element of F(X):
det F(X)
F(y21 ) ¼ (6:52)
F22
Substituting these in Equation 6.48 yields
zaa,bb (0, 0)
F(y12 )jy21 ¼0 F(y21 ) ¼ (6:53)
zaa,bb (y12 , y21 )
where
F22 ¼ 1 a22 y12 jy21 ¼0 ¼ F(y12 )jy21 ¼0 (6:54)
and a22 is the second row and second column element of A. Formula (Equation 6.53) was derived earlier
in Equation 5.7 using the network arrangements of Figures 5.7 and 5.8 to measure the elements
F(y12)jy21 ¼ 0 and zaa,bb(0,0), respectively.
6.5 Sensitivity Matrix

We have studied the sensitivity of a transfer function with respect to the change of a particular element in
the network. In a multiple-loop feedback network, we are usually interested in the sensitivity of a transfer
function with respect to the variation of a set of elements in the network. This set may include either
Φo
u H1 X yo
FIGURE 6.7 The block diagram of a multivariable open-loop control system.
Φc X yc
u H
FIGURE 6.8 The general feedback structure.
elements that are inherently sensitive to variation or elements where the effect on the overall amplifier
performance is of paramount importance to the designers. For this, we introduce a sensitivity matrix and
develop formulas for computing multiparameter sensitivity function for a multiple-loop feedback
amplifier [3].
Figure 6.7 is the block diagram of a multivariable open-loop control system with n inputs and
m outputs, whereas Figure 6.8 is the general feedback structure. If all feedback signals are obtainable
from the output and if the controllers are linear, no loss of generality occurs by assuming the controller to
be of the form given in Figure 6.9.
Denote the set of Laplace-transformed input signals by the n-vector u, the set of inputs to the
network X in the open-loop configuration of Figure 6.7 by the p-vector Fo, and the set of outputs of
the network X of Figure 6.7 by the m-vector yo. Let the corresponding signals for the closed-loop
configuration of Figure 6.9 be denoted by the n-vector u, the p-vector Fc, and the m-vector yc,
respectively. Then, from Figures 6.7 and 6.9, we obtain the following relations:
y o ¼ XFo (6:55a)
Fo ¼ H1 u (6:55b)
y c ¼ XFc (6:55c)
Fc ¼ H2 (u þ H3 yc ) (6:55d)
+ Φc
u ∑ H2 X yc
+
H3
FIGURE 6.9 The general feedback configuration.

where the transfer-function matrices X, H1, H2, and H3 are of order m 3 p, p 3 n, p 3 n, and n 3 m,
respectively. Combining Equation 6.55c and d yields
(1m XH2 H3 )y c ¼ XH2 u (6:56)
or
y c ¼ (1m XH2 H3 )1 XH2 u (6:57)
The closed-loop transfer function matrix W(X) that relates the input vector u to the output vector yc is
defined by the equation
y c ¼ W(X)u (6:58)
identifying from Equation 6.57 the m 3 n matrix
W(X) ¼ (1m XH2 H3 )1 XH2 (6:59)
Now, suppose that X is perturbed from X to X þ dX. The outputs of the open-loop and closed-loop
systems of Figures 6.7 and 6.9 will no longer be the same as before. Distinguishing the new from the old
variables by the superscript þ, we have
yþ þ
o ¼ X Fo (6:60a)
þ þ
yþ
c ¼ X Fc (6:60b)

Fþ þ
c ¼ H2 u þ H3 y c (6:60c)
where Fo remains the same.

We next proceed to compare the relative effects of the variations of X on the performance of the open-
loop and the closed-loop systems. For a meaningful comparison, we assume that H1, H2, and H3 are such
that when there is no variation of X, yo ¼ yc. Define the error vectors resulting from perturbation of X as
Eo ¼ y o y þ
o (6:61a)
Ec ¼ y c y þ
c (6:61b)
A square matrix relating Eo to Ec is called the sensitivity matrix 6(X) for the transfer function matrix
W(X) with respect to the variations of X:
Ec ¼ 6(X)Eo (6:62)
In the following, we express the sensitivity matrix 6(X) in terms of the system matrices X, H2, and H3.
The input and output relation similar to that given in Equation 6.57 for the perturbed system can be
written as
1 þ
yþ þ
c ¼ (1m X H2 H3 ) X H2 u (6:63)
Substituting Equations 6.57 and 6.63 in Equation 6.61b gives

1 1 þ

Ec ¼ y c y þ þ
c ¼ (1m XH2 H3 ) XH2 (1m X H2 H3 ) X H2 u

¼ (1m Xþ H2 H3 )1 ½1m (X þ dX)H2 H3 (1m XH2 H3 )1 XH2 (X þ dX)H2 u

¼ (1m Xþ H2 H3 )1 XH2 dXH2 H3 (1m XH2 H3 )1 XH2 XH2 dXH2 u
¼ (1m Xþ H2 H3 )1 dXH2 ½1n þ H3 W(X)u (6:64)
From Equations 6.55d and 6.58, we obtain
Fc ¼ H2 ½1n þ H3 W(X)u (6:65)
Because by assuming that yo ¼ yc, we have
Fo ¼ Fc ¼ H2 ½1n þ H3 W(X)u (6:66)
yielding
Eo ¼ y o y þ þ
o ¼ (X X )Fo ¼ dXH2 ½1n þ H3 W(X)u (6:67)
Combining Equations 6.64 and 6.67 yields an expression relating the error vectors Ec and Eo of the
closed-loop and open-loop systems by
Ec ¼ (1m Xþ H2 H3 )1 Eo (6:68)
obtaining the sensitivity matrix as
6(X) ¼ (1m Xþ H2 H3 )1 (6:69)
For small variations of X, Xþ is approximately equal to X. Thus, in Figure 6.9, if the matrix triple product
XH2H3 is regarded as the loop-transmission matrix and XH2H3 as the return ratio matrix, then the
difference between the unit matrix and the loop-transmission matrix,
1m XH2 H3 (6:70)
can be defined as the return difference matrix. Therefore, Equation 6.69 is a direct extension of the
sensitivity function defined for a single-input, single-output system and for a single parameter. Recall
that in Equation 4.33 we demonstrated that, using the ideal feedback model, the sensitivity function of
the closed-loop transfer function with respect to the forward amplifier gain is equal to the reciprocal of its
return difference with respect to the same parameter.
In particular, when W(X), dX, and X are square and nonsingular, from Equations 6.55a, 6.55b, and
6.58, 6.61 can be rewritten as
Ec ¼ yc yþ þ
c ¼ ½W(X) W (X)u ¼ dW(X)u (6:71a)
Eo ¼ y o y þ þ
o ¼ ½XH1 X H1 u ¼ dXH1 u (6:71b)
If H1 is nonsingular, u in Equation 6.71b can be solved for and substituted in Equation 6.71a to give
1
Ec ¼ dW(X)H1
1 (dX) Eo (6:72)
As before, for meaningful comparison, we require that yo ¼ yc or
XH1 ¼ W(X) (6:73)
From Equation 6.72, we obtain
Ec ¼ dW(X)W1 (X)X(dX)1 Eo (6:74)
identifying that
6(X) ¼ dW(X)W1 (X)X(dX)1 (6:75)
This result is to be compared with the scalar sensitivity function defined in Equation 4.26, which can be
put in the form
6(x) ¼ (dw)w1 x(dx)1 (6:76)
6.6 Multiparameter Sensitivity

In this section, we derive formulas for the effect of change of X on a scalar transfer function w(X).
Let xk, k ¼ 1, 2, . . . , pq, be the elements of X. The multivariable Taylor series expansion of w(X) with
respect to xk is given by
Xpq Xpq Xpq

@w @ 2 w dxj dxk
dw ¼ dxk þ þ (6:77)
k¼1
@xk j¼1 k¼1
@xj @xk 2!
The first-order perturbation can then be written as
Xpq
@w
dw dxk (6:78)
k¼1
@x k
Using Equation 4.26, we obtain
dw X
pq
dxk
6(xk ) (6:79)
w k¼1
xk
This expression gives the fractional change of the transfer function w in terms of the scalar sensitivity
functions 6(xk).
Refer to the fundamental matrix feedback-flow graph of Figure 6.3. If the amplifier has a single input
and a single output from Equation 6.35, the overall transfer function w(X) of the multiple-loop feedback
amplifier becomes
w(X) ¼ D þ CX(1p AX)1 B (6:80)
When X is perturbed to Xþ ¼ X þ dX, the corresponding expression of Equation 6.80 is given by
w(X) þ dw(X) ¼ D þ C(X þ dX)(1p AX AdX)1 B (6:81)
or

dw(X) ¼ C (X þ dX)(1p AX AdX)1 X(1p AX)1 B (6:82)
As dX approaches zero, we obtain

dw(X) ¼ C (X þ dX) X(1p AX)1 (1p AX AdX) (1p AX AdX)1 B

¼ C dX þ X(1p AX)1 AdX (1p AX AdX)1 B
¼ C(1q XA)1 (dX)(1p AX AdX)1 B
C(1q XA)1 (dX)(1p AX)1 B (6:83)
where C is a row q vector and B is a column p vector. Write
C ¼ [c1 c2 cq ] (6:84a)
B0 ¼ [b1 b2 bp ] (6:84b)
~ ¼ X(1p AX)1 ¼ (1q XA)1 X ¼ [~

W wij ] (6:84c)
The increment dw(X) can be expressed in terms of the elements of Equation 6.84 and those of X. In the
case where X is diagonal with
X ¼ diag[x1 x2 xp ] (6:85)
where p ¼ q, the expression for dw(X) can be succinctly written as
Xp X p X p

~ ik
w ~ kj
w
dw(X) ¼ ci (dxk ) bj
i¼1 k¼1 j¼1
xk xk
Xp X p X p
~ ik w
ci w ~ kj bj dxk
¼ (6:86)
i¼1 k¼1 j¼1
x k xk
Comparing this with Equation 6.79, we obtain an explicit form for the single-parameter sensitivity
function as
Xp X p
~ ik w
ci w ~ kj bj
6(xk ) ¼ (6:87)
i¼1 j¼1
xk w(X)
Thus, knowing Equations 6.84 and 6.85, we can calculate the multiparameter sensitivity function for the
scalar transfer function w(X) immediately.
Example 6.4
Consider again the voltage-series feedback amplifier of Figure 3.9, an equivalent network of which is
shown in Figure 6.4. Assume that Vs is the input and V25 the output. The transfer function of interest is
the amplifier voltage gain V25=Vs. The elements of main concern are the two controlling parameters of
the controlled sources. Thus, we let

a
~1 0 0:0455 0
X¼ ¼ (6:88)
0 a
~2 0 0:0455
From Equation 6.27 we have

90:782 45:391
A¼ (6:89a)
942:507 0
B0 ¼ [0:91748 0] (6:89b)
C ¼ [45:391 2372:32] (6:89c)
yielding

~ ¼ X(12 AX)1 ¼ 104 4:85600 10:02904
W (6:90)
208:245 24:91407
Also, from Equation 6.13 we have
V25
w(X) ¼ ¼ 45:387 (6:91)
Vs
To compute the sensitivity functions with respect to a

~ 1 and a
~ 2, we apply Equation 6.87 and obtain
X2 X 2
~ i1 w
ci w ~ 1j bj c1 w
~ 11 w
~ 11 b1 þ c1 w
~ 11 w
~ 12 b2 þ c2 w
~ 21 w
~ 11 b1 þ c2 w
~ 21 w
~ 12 b2
a1 ) ¼
6(~ ¼
i¼1 j¼1
a~ 1 w(X) a~ 1 w
¼ 0:01066 (6:92a)
~ 12 w
c1 w ~ 21 b1 þ c1 w
~ 12 w
~ 22 b2 þ c2 w
~ 22 w
~ 21 b1 þ c2 w
~ 22 w
~ 22 b2
6(~
a2 ) ¼ ¼ 0:05426 (6:92b)
a~2w
As a check, we use Equation 4.30 to compute these sensitivities. From Equations 3.45 and 3.52, we have
F(~
a1 ) ¼ 93:70 (6:93a)
F(~
a2 ) ¼ 18:26 (6:93b)
_
a1 ) ¼ 103:07 103
F (~ (6:93c)
_
a2 ) ¼ 2018:70
F (~ (6:93d)
Substituting these in Equation 4.30 the sensitivity functions are
1 1
6(~
a1 ) ¼ ¼ 0:01066 (6:94a)
a1 ) ^F(~
F(~ a1 )
1 1
6(~
a2 ) ¼ ¼ 0:05427 (6:94b)
a2 ) ^F(~
F(~ a2 )
confirming Equation 6.92.

~ 1 is changed by 4% and a
Suppose that a ~ 2 by 6%. The fractional change of the voltage gain w(X) is
found from Equation 6.79 as
dw d~
a1 d~
a2
6(~
a1 ) þ 6(~
a2 ) ¼ 0:003683 (6:95)
w a~1 a~2
or 0.37%.
References
1. W.-K. Chen, Active Network and Feedback Amplifier Theory, New York: McGraw-Hill, 1980, Chaps. 2,
4, 5, 7.
2. W.-K. Chen, Active Network and Analysis, Singapore: World Scientific, 1991, Chaps. 2, 4, 5, 7.
3. J. B. Cruz Jr. and W. R. Perkins, A new approach to the sensitivity problem in multivariable feedback
system design, IEEE Trans. Autom. Control, AC-9, 216–223, 1964.
4. E. S. Kuh and R. A. Rohrer, Theory of Linear Active Networks, San Francisco: Holden-Day, 1967.
5. I. W. Sandberg, On the theory of linear multi-loop feedback systems, Bell Syst. Tech. J., 42, 355–382,
1963.
II
Nonlinear
Circuits
Leon O. Chua
University of California, Berkeley
7 Qualitative Analysis Martin Hasler ....................................................................................... 7-1

Introduction . Resistive Circuits . Autonomous Dynamic Circuits . Nonautonomous
Dynamic Circuits . References
8 Synthesis and Design of Nonlinear Circuits Angel Rodríguez-Vázquez,
Manuel Delgado-Restituto, Jose L. Huertas, and F. Vidal ................................................... 8-1
Introduction . Approximation Issues . Aggregation, Scaling, and Transformation
Circuits . Piecewise-Linear Circuitry . Polynomials, Rational, and Piecewise-Polynomial
Functions . Sigmoids, Bells, and Collective Computation Circuits . Extension to Dynamic
Systems . Appendix A: Catalog of Primitives . Appendix B: Value and Slope Hermite
Basis Functions . References
9 Representation, Approximation, and Identification Guanrong Chen ........................ 9-1
. . . .
Introduction Representation Approximation Identification References
10 Transformation and Equivalence Wolfgang Mathis ....................................................... 10-1
Transformation of Nonlinear Dynamical Circuit Equations . Normal Forms of Nonlinear
Dynamical Circuit Equations . Dimensionless Forms of Circuit Equations . Equivalence
of Nonlinear Resistive n-Ports . Equivalence of Nonlinear Dynamical n-Ports .
Equivalence of Reciprocal Nonlinear Dynamic Circuits . References
11 Piecewise-Linear Circuits and Piecewise-Linear Analysis Joos Vandewalle
and Lieven Vandenberghe ........................................................................................................ 11-1
Introduction and Motivation . Hierarchy of Piecewise-Linear Models and Their
Representations . Piecewise-Linear Models for Electronic Components . Structural
Properties of Piecewise-Linear Resistive Circuits . Analysis of Piecewise-Linear Resistive
Circuits . Piecewise-Linear Dynamic Circuits . Efficient Computer-Aided Analysis
of PWL Circuits . Acknowledgment . References
12 Simulation Erik Lindberg ....................................................................................................... 12-1
Numerical Solution of Nonlinear Algebraic Equations . Numerical Integration of
Nonlinear Differential Equations . Use of Simulation Programs . References
II-1
II-2 Feedback, Nonlinear, and Distributed Circuits
13 Cellular Neural Networks and Cellular Wave Computers Tamás Roska,

Ákos Zarándy, and Csaba Rekeczky ....................................................................................... 13-1
Introduction: Definition and Classification . Simple CNN Circuit Structure . Stored
Program CNN Universal Machine and the Analogic Supercomputer Chip .
Applications . Template Library: Analogical CNN Algorithms . Recent Advances .
Recent Developments and Outlook . References
14 Bifurcation and Chaos Michael Peter Kennedy ................................................................ 14-1
Introduction to Chaos . Chua’s Circuit: A Paradigm for Chaos . Chua’s Oscillator .
van der Pol Neon Bulb Oscillator . Synchronization of Chaotic Circuits . Applications
of Chaos . References . Further Information
7
Qualitative Analysis
7.1 Introduction ................................................................................ 7-1
7.2 Resistive Circuits ........................................................................ 7-1
Number of Solutions of a Resistive Circuit . Bounds
on Voltages and Currents . Monotonic Dependence
7.3 Autonomous Dynamic Circuits............................................ 7-13
Introduction . Convergence to DC-Operating Points
7.4 Nonautonomous Dynamic Circuits..................................... 7-19
Introduction . Boundedness of the Solutions . Unique
Martin Hasler Asymptotic Behavior
Swiss Federal Institute of Technology References ............................................................................................ 7-21
7.1 Introduction
The main goal of circuit analysis is to determine the solution of the circuit, i.e., the voltages and the currents
in the circuit, usually as functions of time. The advent of powerful computers and circuit analysis software
has greatly simplified this task. Basically, the circuit to be analyzed is fed to the computer through
some circuit description language, or it is analyzed graphically, and the software will produce the desired
voltage or current waveforms. Progress has rendered the traditional paper-and-pencil methods obsolete, in
which the engineer’s skill and intuition led the way through series of clever approximations, until the
circuits equations can be solved analytically.
A closer comparison of the numerical and the approximate analytical solution reveals, however, that
the two are not quite equivalent. Although the former is precise, it only provides the solution of the
circuit with given parameters, whereas the latter is an approximation, but the approximate solutions most
often is given explicitly as a function of some circuit parameters. Therefore, it allows us to assess the
influence of these parameters on the solution.
If we rely entirely on the numerical solution of a circuit, we never get a global picture of its behavior,
unless we carry out a huge number of analyses. Thus, the numerical analysis should be complemented by
a qualitative analysis, one that concentrates on general properties of the circuit, properties that do not
depend on the particular set of circuit parameters.
7.2 Resistive Circuits

The term ‘‘resistive circuits’’ is not used, as one would imagine, for circuits that are composed solely of
resistors. It admits all circuit elements that are not dynamic, i.e., whose constitutive relations do not involve
time derivatives, integrals over time, or time delays, etc. Expressed positively, resistive circuit elements are
described by constitutive relations that involve only currents and voltages at the same time instants.
7-1
Physical circuits can never be modeled in a

satisfactory way by resistive circuits, but
resistive circuits appear in many contexts as V I
auxiliary constructs. The most important
problem that leads to a resistive circuit is FIGURE 7.1 Symbols of the V- and the I-resistor.
the determination of the equilibrium points,
or, as is current use in electronics, the DC-operating points, of a dynamic circuit. The DC-operating
points of a circuit correspond in a one-to-one fashion to the solutions of the resistive circuit obtained by
removing the capacitors and by short circuiting the inductors. The resistive circuit associated with the
state equations of a dynamic circuit in discussed in Ref. [1].
Among the resistive circuit elements we find, of course, the resistors. For the purposes of this
introduction, we distinguish between, linear resistors, V-resistors, and I-resistors. V-resistors are voltage
controlled, i.e., defined by constitutive relations of the form
i ¼ g(v) (7:1)
In addition, we require that g is a continuous, increasing function of v, defined for all real v. Dually,
an I-resistor is current controlled, i.e., defined by a constitutive relation of the form
v ¼ h(i) (7:2)
In addition, we require that h is a continuous, increasing function of i, defined for all real i. We use the
symbols of Figure 7.1 for V- and I-resistor. Linear resistors are examples of both I- and V-resistors. An
example of a V-resistor that is not an I-resistor is the junction diode, modeled by its usual exponential
constitutive relation
i ¼ Is (ev=nVT 1) (7:3)
Although Equation 7.3 could be solved for v and thus the constitutive relation could be written in the
form of Equation 7.2, the resulting function h would be defined only for currents between Is and þ1,
which is not enough to qualify for an I-resistor. For the same reason, the static model for a Zener diode
would be an I-resistor, but not a V-resistor. Indeed, the very nature of the Zener diode limits its voltages
on the negative side.
A somewhat strange by-product of our definition of V- and I-resistors is that independent voltage
sources are I-resistors and independent current sources are V-resistors. Indeed, a voltage source of value
E has the constitutive relation
v¼E (7:4)
which clearly is of the form (Equation 7.2), with a constant function h, and a current source of value I has
the form
i¼I (7:5)
which is of the form (Equation 7.1) with a constant function g. Despite this, we shall treat the
independent sources as a different type of element.
Another class of resistive elements is the controlled sources. We consider them to be two-ports, e.g., a
voltage-controlled voltage source (VCVS). A VCVS is the two-port of Figure 7.2, where the constitutive
relations are
v1 ¼ av2 (7:6)
i1 ¼ 0 (7:7)
Qualitative Analysis 7-3
i1 i2 The other controlled sources have similar forms.

+ + Another useful resistive circuit element is the ideal
operational amplifier. It is a two-port defined by the
+ two constitutive relations
V1 V2
–
– –
v1 ¼ 0 (7:8)
i1 ¼ 0 (7:9)
FIGURE 7.2 VCVS as a two-port.
This two-port can be decomposed into the juxtaposition
of two singular one-ports, the nullator and the norator, as shown in Figure 7.3. The nullator has two
constitutive relations:
v ¼ 0, i¼0 (7:10)
whereas the norator has no constitutive relation.

For all practical purposes, the resistive circuit elements mentioned thus far are sufficient. By this we
mean that all nonlinear resistive circuits encountered in practice possess an equivalent circuit composed of
nonlinear resistors, independent and controlled sources, and nullator–norator pairs. Figure 7.4 illustrates
this fact. Here, the equivalent circuit of the bipolar transistor is modeled by the Ebers–Moll equations:
!
i1 1 þ b1F 1 g(v1 )
¼ (7:11)
i2 1 1 þ b1 g(v2 )
R
The function g is given by the right-hand side of Equation 7.3.

Actually, the list of basic resistive circuit elements given so far is redundant, and the nullator–norator
pairs render the controlled sources superfluous. An example of a substitution of controlled sources by
nullator–norator pairs is given in Figure 7.4. Equivalent circuits exist for all four types of controlled
sources with nullator–norator pairs. Figure 7.5 gives an equivalent circuit for a voltage-controlled current
source (VCCS), where the input port is floating with respect to the output port.
i1 i2
+ +
i1
+ + i2 V1 V2
V1 ∞ +
– V
– – 2 – –
FIGURE 7.3 Operational amplifier as a juxtaposition of a nullator and a norator.
βRi΄
βFi
i i΄
FIGURE 7.4 Equivalent circuit of a bipolar npn transistor.

V1/R
+
V1 R
–
FIGURE 7.5 Equivalent circuit for a floating VCCS.
The system of equations that describes a resistive circuit is the collection of Kirchhoff equations and
the constitutive relations of the circuit elements. It has the following form (if we limit ourselves to
resistors, independent sources, nullators, and norators):
Ai ¼ 0 (Kirchhoff ’s voltage law) (7:12)
Bv ¼ 0 (Kirchhoff ’s voltage law) (7:13)
ik ¼ g(vk ) (V-resistor) (7:14)
vk ¼ h(ik ) (I-resistor) (7:15)
vk ¼ Ek (independent voltage source) (7:16)
ik ¼ Ik (independent current source) (7:17)
vk ¼ 0
(nullators) (7:18)
ik ¼ 0
In this system of equations, the unknowns are the branch voltages and the branch currents
0 1 0 1
v1 i1
B v2 C B i2 C
B C B C
v ¼ B .. C, i ¼ B .. C (7:19)
@ . A @.A
vb ib
Kirchhoff equations [2],

where the b is the number of branches. Because we have b linearly independent
v
the system contains 2b equations and 2b unknowns. A solution j ¼ of the system is called a
i
solution of the circuit. It is a collection of branch voltages and currents that satisfy Equations 7.12
through 7.19.
7.2.1 Number of Solutions of a Resistive Circuit

As we found earlier, the number of equations of a resistive circuit equals the number of unknowns. One
may therefore expect a unique solution. This may be the norm, but it is far from being generally true. It is
not even true for linear resistive circuits. In fact, the equations for a linear resistive circuit are of the form
Hj ¼ e (7:20)
where the 2b 3 2b matrix H contains the resistances and elements of value 0, 1, whereas the vector e
contains the source values and zeroes. The solution of Equation 7.20 is unique if the determinant of H
differs from zero. If it is zero, then the circuit has either infinitely many solutions or no solution at all.
Is such a case realistic? The answer is yes and no. Consider two voltages sources connected as shown
in Figure 7.6.
i If E1 6¼ E2, the constitutive relations of the sources are in

contradiction with Kirchhoff’s voltage law (KVL), and thus the
circuit has no solution, whereas when E1 ¼ E2, the current i in
Figure 7.6 is not determined by the circuit equations, and thus
the circuit has infinitely many solutions. One may object that the
+ + problem is purely academic, because in practice wires as connec-
E1 E2 tions have a small, but positive, resistance, and therefore one
–
should instead consider the circuit of Figure 7.7, which has
–
exactly one solution.
Examples of singular linear resistive circuits exist that are much
more complicated. However, the introduction of parasitic elem-
ents always permits us to obtain a circuit with a single solution,
FIGURE 7.6 Circuit with zero or and thus the special case in which the matrix H in Equation 7.9 is
infinite solutions. singular can be disregarded. Within the framework of linear
circuits, this attitude is perfectly justified. When a nonlinear
circuit model is chosen, however, the situation changes. An
i example clarifies this point.
Consider the linear circuit of Figure 7.8. It is not difficult to see
that it has exactly one solution, except when
R1 R3 ¼ R2 R4 (7:21)
+ +
E1 E2
– – In this case, the matrix H in Equation 7.29 is singular and the
circuit of Figure 7.8 has zero or infinitely many solutions, depend-
ing on whether E differs from zero. From the point of view of linear
circuits, we can disregard this singular case because it arises only
when Equation 7.21 is exactly satisfied with infinite precision.
FIGURE 7.7 Circuit with exactly one
Now, replace resistor R4 by a nonlinear resistor, where the
solution.
characteristic is represented by the bold line in Figure 7.9. The
resulting circuit is equivalent to the connection of a voltage source, a linear resistor, and the nonlinear
resistor, as shown in Figure 7.10. Its solutions correspond to the intersections of the nonlinear resistor
characteristic and the load line (Figure 7.9). Depending on the value of E, either one, two, or three
solutions are available. Although we still need infinite precision to obtain two solutions, this is not the
case for one or three solutions. Thus, more than one DC-operating point may be observed in electronic
circuits. Indeed, for static memories, and multivibrators in general, multiple DC-operating points are an
essential feature.
R2 R3
R1
– +
R4
+
E
–
FIGURE 7.8 Circuit with one, zero, or infinite solutions.

v
E
Load line
Nonlinear
resistor characteristic
FIGURE 7.9 Characteristic of the nonlinear resistor and solutions of the circuit of Figure 7.10.
R2 R3
i
R1R3
R1 – +
– + R2
+ v
E –
+
E – –
FIGURE 7.10 Circuit with one, two, or three solutions.
The example of Figure 7.10 shows an important aspect of the problem. The number of solutions
depends on the parameter values of the circuit. In the example the value of E determines whether one,
two, or three solutions are available. This is not always the case. An important class of nonlinear resistive
circuits always has exactly one solutions, irrespective of circuit parameters. In fact, for many applications,
e.g., amplification, signal shaping, logic operations, etc., it is necessary that a circuit has exactly one
DC-operating point. Circuits that are designed for these functionalities should thus have a unique DC-
operating point for any choice of element values.
If a resistive circuit contains only two-terminal resistors with increasing characteristics and sources,
but no nonreciprocal element such as controlled sources, operational amplifiers, or transistors, the
solution is usually unique. The following theorem gives a precise statement.
THEOREM 7.1
A circuit composed of independent voltage and current sources and strictly increasing resistors without loop
of voltage sources and without cutset of current sources has at most one solution.
The interconnection condition concerning the sources is necessary. The circuit of Figure 7.6 is an
illustration of this statement. Its solution is not unique because of the loop of voltage sources. The loop is
no longer present in the circuit of Figure 7.7, which satisfies the conditions of Theorem 7.1, and which
indeed has a unique solution.
If the resistor characteristics are not strictly increasing but only increasing (i.e., if the v–i curves have
horizontal or vertical portions), the theorem still holds, if we exclude loops of voltage sources and
I-resistors, and cutsets of current sources and V-resistors.
Theorem 7.1 guarantees the uniqueness of the solution, but it cannot assure its existence. On the other
hand, we do not need increasing resistor characteristics for the existence.
THEOREM 7.2
Let a circuit be composed of independent voltage and current sources and resistors whose characteristics are
continuous and satisfy the following passivity condition at infinity:
v ! þ1 , i ! þ1 and v ! 1 , i ! 1 (7:22)
If no loop of voltage sources and no cutset of current sources exist, then we have at least one solution of the
circuit.
For refinements of this theorem, refer to Refs. [1,3].

If we admit nonreciprocal elements, neither Theorem 7.1 nor Theorem 7.2 remain valid. Indeed, the
solution of the circuit of Figure 7.10 may be nonunique, even though the nonlinear resistor has a strictly
increasing characteristic. In order to ensure the existence and uniqueness of a nonreciprocal nonlinear
resistive circuit, nontrivial constraints on the interconnection of the elements must be observed. The
theorems below give different, but basically equivalent, ways to formulate these constraints.
The first result is the culminating point of a series of papers by Sandberg and Wilson [3]. It is based on
the following notion.
Definition 7.1:
. The connection of the two bipolar transistors shown in Figure 7.11 is called a feedback structure. The
type of the transistors and the location of the collectors and emitters are arbitrary.
. A circuit composed of bipolar transistors, resistors, and independent sources contains a feedback
structure, if it can be reduced to the circuit of Figure 7.11 by replacing each voltage source by a
short circuit, each current source by an open circuit, each resistor and diode by an open or a short
circuit, and each transistor by one of the five short–open circuit combinations represented in
Figure 7.12.
FIGURE 7.11 Feedback structure.

FIGURE 7.12 Short-open-circuit combinations for replacing the transistors.
THEOREM 7.3
Let a circuit be composed of bipolar transistors, described by the Ebers–Moll model, positive linear resistors,
and independent sources. Suppose we have no loop of voltage sources and no cutset of current sources. If the
circuit contains no feedback structure, it has exactly one solution.
This theorem [4] is extended in Ref. [5] to MOS transistors.

The second approach was developed by Nishi and Chua [6]. Instead of transistors, it admits controlled
sources. In order to formulate the theorem, two notions must be introduced.
Definition 7.2: A circuit composed of controlled sources, resistors, and independent sources satisfies
the interconnection condition, if the following conditions are satisfied:
. No loop is composed of voltage sources, output ports of (voltage or current) controlled voltage
sources, and input ports of current-controlled (voltage or current) sources.
. No cutset is composed of current sources, outputs ports of (voltage or current) controlled current
sources, and input ports of voltage-controlled (voltage or current) sources.
Definition 7.3: A circuit composed exclusively of controlled sources has a complementary tree
structure if both the input and output ports each form a tree. The fundamental loop matrix of the input
port tree has the form
B ¼ [BT j1] (7:23)
The circuit is said to have a positive (negative) complementary tree structure, if the determinant of BT is
positive (negative).
THEOREM 7.4
Suppose a circuit composed of controlled sources, strictly increasing resistors satisfying (Equation 7.22), and
independent sources satisfies the interconnection condition. If, by replacing each resistor either by a short
circuit or an open circuit, all independent and some dependent voltage sources by short circuits, and all
independent and some dependent current sources by open circuits, one never obtains a negative comple-
mentary tree structure, the circuit has exactly one solution [6].
A similar theorem for circuits with operational amplifiers instead of controlled sources is proved
in Ref. [7].
The third approach is that of Hasler [1,8]. The nonreciprocal elements here are nullator–norator pairs.
Instead of reducing the circuit by some operations in order to obtain a certain structure, we must orient
the resistors in certain way. Again, we must first introduce a new concept.
Definition 7.4: Let a circuit be composed of nullator–norator pairs, resistors, and independent
voltage and current sources. A partial orientation of the resistors is uniform, if the following two
conditions are satisfied:
. Every oriented resistor is part of an evenly directed loop composed only of oriented resistors and
voltages sources.
. Every oriented resistor is part of an evenly directed cutset composed only of norators, oriented
resistors, and voltage sources.
THEOREM 7.5
Let a circuit be composed of nullator–norator pairs, V- and I-resistors, and independent voltage and
current sources. If the following conditions are satisfied, the circuit has exactly one solutions:
. Norators, I-resistors, and voltage sources together form a tree.
. Nullators, I-resistors, and voltage sources together form a tree.
. Resistors have no uniform partial orientation, except for the trivial case, in which no resistor is
oriented.
We illustrate the conditions of this theorem with the example of Figure 7.10. In Figure 7.13 the resistors
are specified as V- and I-resistors and a uniform orientation of the resistors is indicated. Note that the
nonlinear resistor is a V-resistor, but not an I-resistor, because its current saturates. The linear resistors,
however, are both V- and I-resistors. The choice in Figure 7.13 is made in order to satisfy the first two
conditions of Theorem 7.5. Correspondingly, in Figures 7.14 and 7.15 the norator–I-resistor–voltage
source tree and the nullator–I-resistor–voltage source tree are represented. Because the third condition is
not satisfied, Theorem 7.5 cannot guarantee a unique solution. Indeed, as explained earlier, this circuit
may have three solutions.
Theorem 7.5 has been generalized to controlled sources, to resistors that are increasing but neither voltage
nor current controlled (e.g., the ideal diode), and to resistors that are decreasing instead of increasing [9].
V I
FIGURE 7.13 Circuit of Figure 7.10 with nullator and norator.

+
–
FIGURE 7.14 Norator–I-resistor–voltage source tree.
Theorems 7.3, 7.4, and 7.5 have common features.

I
Their conditions concern the circuit structure—the
circuit graph that expresses the interconnection of
the elements and the type of elements that occupy
I the branches of the graph, but not the element
values. Therefore, the theorems guarantee the exist-
ence and uniqueness of the solution for whole
classes of circuits, in which the individual circuits
+
differ by their element values and parameters. In
–
this sense the conditions are not only sufficient, but
also necessary. This means, for example, in the case
of Theorem 7.5 if all circuits with the same struc-
FIGURE 7.15 Nullator–I-resistor–voltage source tree. ture have exactly one solution, then the three con-
ditions must be satisfied. However, by logical
contraposition, if one of the three conditions is not satisfied for a given circuit structure, a circuit with
this structure exists which has either no solution or more than one solutions.
On the other hand, if we consider a specific circuit, the conditions are only sufficient. They permit us to
prove that the solution exists and is unique, but some circuits do not satisfy the conditions and still have
exactly one solution. However, if the parameters of such a circuit are varied, one eventually falls onto a
circuit with no solution or more than one solution.
The main conditions of Theorems 7.3 and 7.4 have an evident intuitive meaning. The orientations to
look for in Theorem 7.5 are linked to the sign of the currents and the voltages of the difference of two
solutions. Because the resistors are increasing, these signs are the same for the voltage and current
differences. If we extend the analysis of the signs of solutions or solution differences to other elements, we
must differentiate between voltages and currents. This approach, in which two orientations for all
branches are considered, one corresponding to the currents and one corresponding to the voltages, is
pursued in Ref. [10].
The conditions of Theorems 7.3 through 7.5 can be verified by inspection for small circuits. For larger
circuits, one must resort to combinatorial algorithms. Such algorithms are proposed in Refs. [11,12]. As
can be expected from the nature of conditions, the algorithms grow exponentially with the number of
resistors. It is not known whether algorithms of polynomial complexity exist.
Some circuits always have either no solution or an infinite number of solutions, irrespective of the
element and parameter values. Figure 7.6 gives the simplest example. Such circuits clearly are not very
useful in practice. The remaining circuits are those that may have a finite number n > 1 of solutions if the
circuit parameters are chosen suitably. These are the circuits that are useful for static memories and for
multivibrators in general. This class is characterized by the following theorem.
THEOREM 7.6
Let circuit be composed of nullator–norator pairs, V- and I-resistors, and independent voltage and current
sources. If the following three conditions are satisfied, the circuit has more than one, but a finite number of
solutions for a suitable choice of circuit parameters:
. Norators, I-resistors, and voltage sources together form a tree.
. Nullators, I-resistors, and voltage sources together form a tree.
. A nontrivial, uniform partial orientation of the resistors occurs.
Can we be more precise and formulate conditions on the circuit structure that guarantee four solutions,
for example? This is not possible because changing the parameters of the circuit will lead to another
number of solutions. Particularly with a circuit structure that satisfies the conditions of Theorem 7.6,
there is a linear circuit that always has an infinite number of solutions. If we are more restrictive on the
resistor characteristics, e.g., imposing convex or concave characteristics for certain resistors, it is possible to
determine the maximum number of solutions. A method to determine an upper bound is given in Ref. [14],
whereas the results of Ref. [15] allow us to determine the actual maximum number under certain
conditions. Despite these results, however, the maximum number of solutions is still an open problem.
7.2.2 Bounds on Voltages and Currents

It is common sense for electrical engineers that in an electronic circuit all node voltages lie between zero
and the power supply voltage, or between the positive and the negative power supply voltages, if both are
present. Actually, this is only true for the DC-operating point, but can we prove it in this case? The
following theorems give the answer. They are based on the notion of passivity.
Definition 7.5: A resistor is passive if it can only absorb, but never produce power. This means that
for any point (v, i) on its characteristic we have
vi0 (7:24)
A resistor is strictly passive, if in addition to Equation 7.24 it satisfies the condition
vi¼0!v ¼i¼0 (7:25)
THEOREM 7.7
Let a circuit be composed of strictly passive resistors and independent voltage and current sources. Then, for
every branch k of the circuit the following bounds can be given:
X
jvk j jvj j (7:26)
source branches j
X
jik j jij j (7:27)
source branches j
If, in addition, the circuit is connected and all sources have a common node, the ground node, then the
maximum and the minimum node voltage are at a source terminal.
The theorem implies in particular that in a

circuit with a single voltage source, all branch +
voltages are bounded by the source voltage in –
+
magnitude, and all node voltages lie between +
zero and the source voltage. Similarly, if a circuit
E
has a single current source, all branch currents are R2 v
bounded by the source current in magnitude. – R1
Finally, if several voltage sources are present that –
are all connected to ground and have positive
value, then the node voltages lie between zero
and the maximum source voltage. If some sources FIGURE 7.16 Voltage amplifier.
have positive values and others have negative
values, then all node voltages lie between the maximum and the minimum source values.
This theorem and various generalizations can be found in Ref. [1]. The main drawback is that it does
not admit nonreciprocal elements. A simple counterexample is the voltage amplifier of Figure 7.16. The
voltage of the output node of the operational amplifier is
R1 þ R2
v¼ E (7:28)
R1
Thus, the output node voltage is higher than the source voltage. Of course, the reason is that the
operational amplifier is an active element. It is realized by transistors and needs a positive and a negative
voltage source as the power supply. The output voltage of the operational amplifier cannot exceed these
supply voltages. This fact is not contained in the model of the ideal operational amplifier, but follows
from the extension of Theorem 7.7 to bipolar transistors [1,16].
THEOREM 7.8
Let a circuit be composed of bipolar transistors modeled by the Ebers–Moll equations, of strictly passive
resistors, and of independent voltage and current sources. Then, the conclusion of Theorem 7.7 hold.
At first glance, Theorem 7.8 appears to imply that it is impossible to build an amplifier with bipolar
transistors. Indeed, it is impossible to build such an amplifier with a single source, the input signal. We
need at least one power supply source that sets the limits of dynamic range of the voltages according to
Theorem 7.8. The signal source necessarily has a smaller amplitude and the signal can be amplified
roughly up to the limit set by the power supply source.
Theorem 7.8 can be extended to MOS transistors. The difficulty is that the nonlinear characteristics of
the simplest model is not strictly increasing, and therefore some interconnection condition must be
added to avoid parts with undetermined node voltages.
7.2.3 Monotonic Dependence

Instead of looking at single solutions of resistive circuits, as done earlier in the chapter, we consider here a
solution as a function of a parameter. The simplest and at the same time the most important case is the
dependence of a solution on the value of a voltage or current source. To have a well-defined situation, we
suppose that the circuit satisfies the hypotheses of Theorem 7.5. In this case [1,8], the solution is a
continuous function of the source values.
As an example, let us consider the circuit of Figure 7.17. We are interested in the dependence of the
various currents on the source voltage E. Because the circuit contains only strictly increasing resistors, we
[A] i5
R1
i1 R3
1
R5 i5
E
E
R2 R4
–10 0 10 [V]
FIGURE 7.17 Circuit example for source dependence. FIGURE 7.18 Nonmonotonic dependence.
expect all currents to be strictly monotonic functions of E. This is not true. In Figure 7.18, the current i5(E)
is represented for R1 ¼ R2 ¼ R3 ¼ 2R4 ¼ R5 ¼ 1 V and for standard diode model parameters. Clearly, it is
nonmonotonic.
7.3 Autonomous Dynamic Circuits

7.3.1 Introduction
This section adds to the resistive elements of Section 7.2—the capacitors and the inductors. A nonlinear
capacitor is defined by the constitutive relation
v ¼ h(q) (7:29)
where the auxiliary variable q is the charge of the capacitor, which is linked to the current by
dq
i¼ (7:30)
dt
The dual element, the nonlinear inductor, is defined by
i ¼ g(w) (7:31)
where the auxiliary variable w, the flux, is linked to the voltage by
dw
v¼ (7:32)
dt
The symbols of these two elements are represented in Figure 7.19.
The system of equations that describes an autonomous dynamic circuit is composed of Equations 7.12
through 7.17, completed with Equations 7.29 and 7.30 for capacitor branches and Equations 7.31 and 7.32
for inductor branches. Hence, it becomes a mixed differential–nondifferential system of equations. Its
solutions are the voltages, currents, charges, and fluxes as functions of time. Because it contains differential
equations, we have infinitely many solutions, each one determined by some set of initial conditions.
FIGURE 7.19 Symbols of the nonlinear capacitor and the nonlinear inductor.
If all variables except the charges and fluxes are eliminated from the system of equations, one obtains a
reduced, purely differential system of equations
dq
¼ f(q,w) (7:33)
dt
dw
¼ g(q,w) (7:34)
dt
where q and w are the vectors composed of, respectively, the capacitor charges and the inductor fluxes.
These are the state equations of the circuit. Under mild assumptions on the characteristics of the
nonlinear elements (local Lipschitz continuity and eventual passivity), it can be shown that the solutions
are uniquely determined by the initial values of the charges and fluxes at some time t0, q(t0), and w(t0),
and that they exist for all times t0 t < 1 [1,17].
It cannot be taken for granted, however, that the circuit equations actually can be reduced to that state
Equations 7.33 and 7.34. On the one hand, the charges and fluxes may be dependent and thus their initial
values cannot be chosen freely. However, the state equations may still exist, in terms of a subset of charges
and fluxes. This means that only these charges and fluxes can be chosen independently as initial
conditions. On the other hand, the reduction, even to some alternative set of state variables, may be
simply impossible. This situation is likely to lead to impasse points, i.e., nonexistence of the solution at a
finite time. We refer the reader to the discussion in Ref. [1]. In the sequel we suppose that the solutions
exist from the initial time t0 to þ1 and that they are determined by the charges and fluxes at t0.
We are interested in the asymptotic behavior, i.e., the behavior of the solutions when the time t goes to
infinity. If the dynamic circuit is linear and strictly stable, i.e., if all its natural frequencies are in the open
left half of the complex plane, then all solutions converge to one and the same DC-operating (equili-
brium) point. This property still holds for many nonlinear circuits, but not for all by far. In particular, the
solutions may converge to different DC-operating points, depending on the initial conditions (static
memories), they may converge to periodic solutions (free-running oscillators), or they may even show
chaotic behavior (e.g., Chua’s circuit). Here, we give conditions that guarantee the solutions converge to a
unique solution or one among several DC-operating points.
7.3.2 Convergence to DC-Operating Points

The methods to prove convergence to one or more DC-operating points is based on Lyapunov functions.
A Lyapunov function is a continuously differentiable function W(j), where j is the vector composed of
the circuit variables (the voltages, currents, charges, and fluxes). In the case of autonomous circuits, a
Lyapunov function must have the following properties:
1. W is bounded below, i.e., there exists a constant W0 such that
W(j) W0 for all j (7:35)
2. The set of voltages, currents, charges, and fluxes of the circuit such that W(j) E is bounded for
any real E.
3. For any solution j(t) of the circuit
d
W(j(t)) 0 (7:36)
dt
4. If
d
W(j(t)) ¼ 0 (7:37)
dt
then j(t) is a DC-operating point.

If an autonomous circuit has a Lyapunov function and if it has at least one, but a finite number of
DC-operating points, then every solution converges to a DC-operating point. The reason is that the
Lyapunov function must decrease along each solution, and thus must result in a local minimum, a stable
DC-operating point. If more than one DC-operating point exists, it may, as a mathematical exception
that cannot occur in practice, end up in a saddle point, i.e., an unstable DC-operating point.
The problem with the Lyapunov function method is that it gives no indication as to how to find such a
function. Basically, three methods are available to deal with this problem:
1. Some standard candidates for Lyapunov functions, e.g., the stored energy.
2. Use a certain kind of function and adjust the parameters in order to satisfy points 2 and 3 in the
previous list. Often, quadratic functions are used.
3. Use an algorithm to generate Lyapunov functions [18–20].
The following theorems were obtained via approach 1, and we indicate which Lyapunov function was
used to prove them. At first glance, this may seem irrelevant from an engineering point of view. However,
if we are interested in designing circuits to solve optimization problems, we are likely to be interested in
Lyapunov functions. Indeed, as mentioned previously, along any solution of the circuit, the Lyapunov
function decreases and approaches a minimum of the function. Thus, the dynamics of the circuit solve a
minimization problem. In this case, we look for a circuit with a given Lyapunov function, however,
usually we look for a Lyapunov function for a given circuit.
THEOREM 7.9
Let a circuit be composed of capacitors and inductors with a strictly increasing characteristic, resistors with
a strictly increasing characteristic, and independent voltage and current sources. Suppose the circuit has a
DC-operating point j. By Theorem 7.1, this DC-operating point is unique. Finally, suppose the circuit has
no loop composed of capacitors, inductors, and voltage sources and no cutset composed of capacitors,
inductors, and current sources. Then, all solutions of the circuit converge to j.
The Lyapunov function of this circuit is given by a variant of the stored energy in the capacitors and
the resistors, the stored energy with respect to j [1,17]. If the constitutive relations of the capacitors
and the inductors are given by vk ¼ hk(qk) and ik ¼ gk(vk), respectively, then this Lyapunov function
becomes
X ð X ð
qk wk
W(j) ¼ (hk (q) hk (qk ))dq þ (gk (w) gk (

wk ))dw (7:38)
capacitor inductor
branches k qk branches k w
k
The main condition (Equation 7.36) for a Lyapunov function follows from the fact that the derivative of
the stored energy is the absorbed power, here in incremental form:
d X X
W(j) ¼ Dvk Dik ¼ Dvk Dik 0 (7:39)
dt capacitor resistor
and inductor branches k
branches k
Various generalizations of Theorem 7.9 have been given. The condition ‘‘strictly increasing resistor
characteristic’’ has been relaxed to a condition that depends on j in Refs. [1,17] and mutual inductances
and capacitances have been admitted in Ref. [17].
Theorem 7.10 admits resistors with nonmonotonic characteristics. However, it does not allow for both
inductors and capacitors.
THEOREM 7.10
Let a circuit be composed of capacitors with a strictly increasing characteristic, voltage-controlled resistors
such that
v ! þ1 ) i > Iþ > 0 and v ! 1 ) i < I < 0 (7:40)
and independent voltage sources. Furthermore, suppose that the circuit has a finite number of
DC-operating points. Then every solution of the circuit converges toward a DC-operating point.
This theorem is based on the then following Lyapunov function, called cocontent:
X ð
vk
W(j(t)) ¼ gk (v)dv (7:41)

resistor
branches k o
where ik ¼ gk(vk) is the constitutive relation of the resistor on branch k. The function W is decreasing
along a solution of the circuit because
d X dvk X dvk
W(j(t)) ¼ ik ¼ ik
dt resistor dt capacitor dt
branches k branches k
X dhk
¼ i2k 0 (7:42)
capacitor dq
branches k
where hk(qk) is the constitutive relation of the capacitor on branch k.

Theorem 7.10 has a dual version. It admits inductors instead of capacitors, current-controlled resistors,
and current sources. The corresponding Lyapunov function is the content:
X ð
ik
W(j) ¼ hk (i)di (7:43)

resistor
branches k o
where vk ¼ hk(ik) is the constitutive relation of the resistor on branch k.

The main drawback of the two preceding theorems is that they do not admit nonreciprocal elements
such as controlled sources, operational amplifiers, etc. In other words, no statement about the analog
neural network of Figure 7.20 can be made. In this network the nonreciprocal element is the VCVS with
the nonlinear characteristics v2 ¼ s(v1). However, Theorem 7.10 can be generalized to a reciprocal
voltage-controlled N-port resistor closed on capacitors and voltage sources. Such an N-port (Figure
7.21) is described by a constitutive relation of the form
ik ¼ gk (v1 , . . . , vN ) (7:44)
and it is reciprocal, if for all v, and all k, j we have
@gk @gj
(v) ¼ (v) (7:45)
@vj @vk
R1N R12 R11

σ
I1
R1 C
R2N R22 R21
σ
I2
R2 C
RNN RN2 RN 1
σ
IN RN
C
FIGURE 7.20 Analog neural network.
i1
+
v1
–
Resistive
N -port
iN
+
vN
–
FIGURE 7.21 Resistive N-port.
THEOREM 7.11
Let a circuit be composed of charge-controlled capacitors with a strictly increasing characteristic and
independent voltage sources that terminate a reciprocal voltage-controlled N-port with constitutive relation
(Equation 7.42) so that we find constants V and P > 0 such that
X
N
kvk V ) g v ¼ gk (v)vk P (7:46)
k¼1
If the number of DC-operating points is finite, then all solutions converge toward a DC-operating point.
The proof of this theorem is based on the Lyapunov function W(v) that satisfies
@W
(v) ¼ gk (v) (7:47)
@vk
Thanks to Equation 7.45, function W exists. The first two conditions for a Lyapunov function are a
consequence of Equation 7.46. Finally
d X dvk
W(j(t)) ¼ gk (v)
dt resistor dt
branchesk
X dvk
¼ ik
resistor dt
branches k
X dhk
¼ i2 0 (7:48)
capacitor
dq k
branches k
where hk(qk) is the constitutive relation of the capacitor on branch k.

To illustrate how Theorem 7.11 can be applied when Theorem 7.10 fails, consider the analog neural
network of Figure 7.20. If the capacitor voltages are denoted by ui and the voltages at the output of the
voltage sources by vi, the state equations for the network of Figure 7.1 become
dui ui XN
ui vj
Ci ¼ þ þ Ii (7:49)
dt Ri j¼1 Rij
Suppose that the nonlinear characteristic s(u) is invertible. The state equations can be written in terms of
the voltages vi:
ds1 dvi XN
vj
C (vi ) ¼ Gi s1 (vi ) þ Ii (7:50)
dv dt j¼1
R ij
where
1 X N
1
Gi ¼ þ (7:51)
Ri j¼1 Rij
Equations 7.40 can be reinterpreted as the equations of a resistive N-port with the constitutive relations
XN
vj
gi (v) ¼ Gi s1 (vi ) þ Ii (7:52)
j¼1
Rij
closed on nonlinear capacitors with the constitutive relation

q
v¼s (7:53)
C
If s is a sigmoidal function, as is most often supposed in this context (i.e., a strictly increasing function
with s(u) ! 1 for u ! 1), then the capacitors have a strictly increasing characteristic, as required by
Theorem 7.11. Furthermore, the resistive N-port is reciprocal if for i 6¼ j
@gi 1 @gj 1
¼ ¼ ¼ (7:54)
@vj Rij @vi Rji
In other words, if for all i, j
Rij ¼ Rji (7:55)

On the other hand, inequality Equation 7.46 must be modified because the sigmoids have values only
in the interval [1, þ1] and thus Equation 7.50 are defined only on the invariant bounded set
S ¼ {vj 1 < vi < þ1}. Therefore, inequality Equation 7.50 must be satisfied for vectors v sufficiently
close to the boundary of S. This is indeed the case, because s1(v) ! 1 as v ! 1, whereas the
other terms of the right-hand side of Equation 7.52 remain bounded.
It follows that all solutions of the analog neural network of Figure 7.20 converge to a DC-operating
point as t ! 1, provided s is a sigmoid function and the connection matrix Rij (synaptic matrix) is
symmetrical. The Lyapunov function can be given explicitly:
ðvi
X
N
1X N
vi vj X N
W(v) ¼ Gi s1 (v)dv þ vi Ii (7:56)
i¼1
2 i,j¼1 Rij i¼1
0
7.4 Nonautonomous Dynamic Circuits

7.4.1 Introduction
This section is a consideration of circuits that contain elements where constitutive relations depend
explicitly on time. However, we limit time dependence to the independent sources. For most practical
purposes, this is sufficient. A time-dependent voltage source has a constitutive relation
v ¼ e(t) (7:57)
and a time-dependent current source
i ¼ e(t) (7:58)
where e(t) is a given function of time which we suppose here to be continuous. In information processing
circuits, e(t) represents a signal that is injected into the circuit, whereas in energy transmission circuits
e(t) usually is a sinusoidal or nearly sinusoidal function related to a generator.
The time-dependent sources may drive the voltages and the currents to infinity, even if they only inject
bounded signals into the circuit. Therefore, the discussion begins with the conditions that guarantee the
boundedness of the solutions.
7.4.2 Boundedness of the Solutions

In electronic circuits, even active elements become passive when the voltages and currents grow large.
This is the reason that solutions remain bounded.
Definition 7.6: A resistor is eventually passive if, for sufficiently large voltages and=or currents, it
can only absorb power. More precisely, eventual passivity means that constants V and I exist such that,
for all points (v, i) on the resistor characteristic with jvj > V or jij > I, we have
vi0 (7:59)
Note that sources are not eventually passive, but as soon as an internal resistance of a source is taken into
account, the source becomes eventually passive. The notion of eventual passivity can be extended to time-
varying resistors.
Definition 7.7: A time-varying resistor is eventually passive if constants V and I are independent of
time and are such that all points (v, i), with jvj > V or jij > I that at some time lie on the characteristic of
the resistor, satisfy the passivity condition (Equation 7.59). According to this definition, time-dependent
sources with internal resistance are eventually passive if the source signal remains bounded.
Eventual passivity allows us to deduce bounds for the solutions. These bounds are uniform in the sense
that they do not depend on the particular solution. To be precise, this is true only asymptotically, as t ! 1.
Definition 7.8: The solutions of a circuit are eventually uniformly bounded if there exist constants
V, I, Q, and F such that, for any solution there exists a time T such that for any t > T, the voltages vk(t)
are bounded by V, the currents ik(t) are bounded by I, the charges qk(t) are bounded by Q, and the fluxes
wk(t) are bounded by F.
Another manner of expressing the same property is to say that an attracting domain exists in state
space [1].
THEOREM 7.12
A circuit composed of eventually passive resistors with v i ! þ1 as jvj ! 1 or jij ! 1, capacitors with
v ! 1 as q !6¼1, and inductors with i ! 1 as w ! 1 has eventually uniformly bounded solutions
if no loop or cutset exists without a resistor [1,17].
Again, this theorem is proved by using a Lyapunov function, namely the stored energy
X ð X ð
qk wk
W(j) ¼ hk (q)dq þ gk (w)dw (7:60)

capacitor capacitor
branches k 0 branches k 0
Inequality Equation 7.36 holds only outside of a bounded domain.
7.4.3 Unique Asymptotic Behavior

In the presence of signals with complicated waveforms that are injected into a circuit, we cannot expect
simple waveforms for the voltages and the currents, not even asymptotically, as t ! 1. However, we can
hope that two solutions, starting from different initial conditions, but subject to the same source, have the
same steady-state behavior. The latter term needs a more formal definition.
Definition 7.9: A circuit has unique asymptotic behavior if the following two conditions are
satisfied:
1. All solutions are bounded.
2. For any two solutions j1(t) and j2(t)
kj1 (t) j2 (t)k !t!1 0 (7:61)
In order to prove unique asymptotic behavior, it is necessary to extend the notion of the Lyapunov
function [1]. This does not lead very far, but at least it permits us to prove the following theorem.
THEOREM 7.13
Suppose a circuit is composed of resistors with a strictly increasing characteristic such that v i ! 1 as
jvj ! 1 or jij ! 1, positive linear capacitors, positive linear inductors, time-depending voltage (current)
sources with bounded voltage (current) and a positive resistor in series (parallel). If no loop or cutset is
composed exclusively of capacitors and inductors, the circuit has unique asymptotic behavior [1,17].
This theorem is unsatisfactory because linear reactances are required and real devices are never exactly
linear. It has been shown that slight nonlinearities can be tolerated without losing the unique asymptotic
behavior [21]. On the other hand, we cannot expect to get much stronger general results because
nonautonomous nonlinear circuits may easily have multiple steady-state regimes and even more com-
plicated dynamics, such as chaos, even if the characteristics of the nonlinear elements are all strictly
increasing.
Another variant of Theorem 7.13 considers linear resistors and nonlinear reactances [17].
References
1. M. Hasler and J. Neirynck, Nonlinear Circuits, Boston, MA: Artech House, 1986.
2. L.O. Chua, C.A. Desoer, and E.S. Kuh, Linear and Nonlinear Circuits, Electrical and Electronic
Engineering Series, Singapore: McGraw-Hill International Editors, 1987.
3. A.N. Willson, Ed., Nonlinear Networks: Theory and Analysis, New York: IEEE Press, 1974.
4. R.O. Nielsen and A.N. Willson, A fundamental result concerning the topology of transistor circuits
with multiple equilibria, Proc. IEEE, 68, 196–208, 1980.
5. A.N. Willson, On the topology of FET circuits and the uniqueness of their dc operating points, IEEE
Trans. Circuits Syst., 27, 1045–1051, 1980.
6. T. Nishi and L.O. Chua, Topological criteria for nonlinear resistive circuits containing controlled
sources to have a unique solution, IEEE Trans. Circuits Syst., 31, 722–741, Aug. 1984.
7. T. Nishi and L.O. Chua, Nonlinear op-amp circuits: Existence and uniqueness of solution by
inspection, Int. J. Circuit Theory Appl., 12, 145–173, 1984.
8. M. Hasler, Nonlinear nonreciprocal resistive circuits with a unique solution, Int. J. Circuit Theory
Appl., 14, 237–262, 1986.
9. M. Fosséprez, Topologie et Comportement des Circuits non Linéaires non Réciproques, Lausanne:
Presses Polytechnique Romands, 1989.
10. M. Hasler, On the solution of nonlinear resistive networks, J. Commun. (Budapest, Hungary), special
issue on nonlinear circuits, July 1991.
11. T. Parker, M.P. Kennedy, Y. Lioa, and L.O. Chua, Qualitative analysis of nonlinear circuits using
computers, IEEE Trans. Circuits Syst., 33, 794–804, 1986.
12. M. Fosséprez and M. Hasler, Algorithms for the qualitative analysis of nonlinear resistive circuits,
IEEE ISCAS Proc., 2165–2168, May 1989.
13. M. Fosséprez and M. Hasler, Resistive circuit topologies that admit several solutions, Int. J. Circuit
Theory Appl., 18, 625–638, Nov. 1990.
14. M. Fosséprez, M. Hasler, and C. Schnetzler, On the number of solutions of piecewise linear circuits,
IEEE Trans. Circuits Syst., CAS-36, 393–402, March 1989.
15. T. Nishi and Y. Kawane, On the number of solutions of nonlinear resistive circuits, IEEE Trans., E74,
479–487, 1991.
16. A.N. Willson, The no-gain property for networks containing three-terminal elements, IEEE Trans.
Circuits Syst., 22, 678–687, 1975.
17. L.O. Chua, Dynamic nonlinear networks: State of the art, IEEE Trans. Circuits Syst., 27, 1059–1087,
1980.
18. R.K. Brayton and C.H. Tong, Stability of dynamical systems, IEEE Trans. Circuits Syst., 26, 224–234,
1979.
19. R.K. Brayton and C.H. Tong, Constructive stability and asymptotic stability of dynamical systems,
IEEE Trans. Circuits Syst., 27, 1121–1130, 1980.
20. L. Vandenberghe and S. Boyd, A polynomial-time algorithm for determining quadratic Lyapunov
functions for nonlinear systems, Proc. ECCTD-93, 1065–1068, 1993.
21. M. Hasler and Ph. Verburgh, Uniqueness of the steady state for small source amplitudes in nonlinear
nonautonomous circuits, Int. J. Circuit Theory Appl., 13, 3–17, 1985.
8
Synthesis and Design
of Nonlinear Circuits
8.1 Introduction ................................................................................ 8-1
8.2 Approximation Issues ............................................................... 8-3
Unidimensional Functions . Piecewise-Linear
and Piecewise-Polynomial Approximants . Gaussian
and Bell-Shaped Basis Functions . Multidimensional
Functions
8.3 Aggregation, Scaling, and Transformation Circuits......... 8-11
Transformation Circuits . Scaling and Aggregation Circuitry
8.4 Piecewise-Linear Circuitry ..................................................... 8-18
Current Transfer Piecewise-Linear Circuitry . Transresistance
Piecewise-Linear Circuitry . Piecewise-Linear Shaping
of Voltage-to-Charge Transfer Characteristics
8.5 Polynomials, Rational, and Piecewise-Polynomial
Functions ................................................................................... 8-22
Concepts and Techniques for Polynomic and Rational
Functions . Multiplication Circuitry . Multipliers
Angel Rodríguez-Vázquez
Based on Nonlinear Devices
University of Seville
8.6 Sigmoids, Bells, and Collective Computation
Manuel Delgado-Restituto Circuits ....................................................................................... 8-29
National Center of Microelectronics Sigmoidal Characteristics . Bell-Like Shapes . Collective
Computation Circuitry
Jose L. Huertas 8.7 Extension to Dynamic Systems ............................................ 8-33
National Center of Microelectronics
Appendix A: Catalog of Primitives................................................ 8-34
F. Vidal Appendix B: Value and Slope Hermite Basis Functions .......... 8-35
University of Málaga References ............................................................................................ 8-35
8.1 Introduction
Nonlinear synthesis and design can be informally defined as a constructive procedure to interconnect
components from a catalog of available primitives, and to assign values to their constitutive parameters to
meet a specific nonlinear relationship among electrical variables. This relationship is represented as an
implicit integrodifferential operator, although we primarily focus on the synthesis of explicit algebraic
functions,
y ¼ f (x) (8:1)
8-1
where
y is voltage or current
f () is a nonlinear real-valued function
x is a vector with components that include voltages and currents
This synthesis problem is found in two different circuit-related areas: device modeling [8,76] and analog
computation [26]. The former uses ideal circuit elements as primitives to build computer models of real
circuits and devices (see Chapter 7). The latter uses real circuit components, available either off the shelf
or integrable in a given fabrication technology, to realize hardware for nonlinear signal processing tasks.
We focus on this second area, and intend to outline systematic approaches to devise electronic function
generators. Synthesis relies upon hierarchical decomposition, conceptually shown in Figure 8.1, which
encompasses several subproblems listed from top to bottom:
. Realization of nonlinear operators (multiplication, division, squaring, square rooting, logarithms,
exponentials, sign, absolute value, etc.) through the interconnection of primitive components
(transistors, diodes, operational amplifiers, etc.)
. Realization of elementary functions (polynomials, truncated polynomials, Gaussian functions, etc.)
as the interconnection of the circuit blocks devised to build nonlinear operators
. Approximation of the target as a combination of elementary functions and its realization as the
interconnection of the circuit blocks associated with these functions
Figure 8.1 illustrates this hierarchical decomposition of the synthesis problem through an example in
which the function is approximated as a linear combination of truncated polynomials [30], where
realization involves analog multipliers, built by exploiting the nonlinearities of bipolar junction transistors
(BJTs) [63]. Also note that the subproblems cited above are closely interrelated and, depending on the
availability of primitives and the nature of the nonlinear function, some of these phases can be bypassed.
For instance, a logarithmic function can be realized exactly using BJTs [63], but requires approximation
if our catalog includes only field-effect transistors whose nonlinearities are polynomic [44].
vbc ic
Primitives ic = Is (evbe / vt – evbe / vt )
for synthesis vbe
Nonlinear operators
Interconnection Approximation
law Elementary procedure Φ(x) = (x– E )r sgn(x – E )
functions
Nonlinear Q
Nonlinear
circuit task f (x) ≈ g(x) = Σ Wj Φj (x)
j=1
FIGURE 8.1 Hierarchical decomposition of the synthesis problem.

Synthesis and Design of Nonlinear Circuits 8-3
The technical literature contains excellent contributions to the solution of all these problems. These
contributions can hardly be summarized or even quoted in just one section. Many authors follow a block-
based approach which relies on the pervasive voltage operational amplifier (or op-amp), the rectification
properties of junction diodes, and the availability of voltage multipliers, in the tradition of classical analog
computation (e.g., Refs. [7,59,80]). Remarkable contributions have been made which focus on qualitative
features such as negative resistance or hysteresis, rather than the realization of well-defined approximat-
ing functions [9,20,67]. Other contributions focus on the realization of nonlinear operators in the form of
IC units. Translinear circuits, BJTs [23,62], and MOSFETs [79] are particularly well suited to realize
algebraic functions in IC form. This IC orientation is shared by recent developments in analog VLSI
computational and signal processing systems for neural networks [75], fuzzy logic [81], and other
nonlinear signal processing paradigms [56,57,71].
This chapter is organized to fit the hierarchical approach in Figure 8.1. We review a wide range of
approximation techniques and circuit design styles, for both discrete and monolithic circuits. It is based
on the catalog of primitives shown in Appendix A. In addition to the classical op-amp-based continuous-
time circuits, we include current-mode circuitry because nonlinear operators are realized simply and
accurately by circuits that operate in current domain [23,57,62,79]. We also cover discrete-time circuits
realized using analog dynamic techniques based on charge transfer, which is very significant for mixed-
signal processing and computational microelectronic systems [27,72]. Section 8.2 is devoted to approxi-
mation issues and outlines different techniques for uni- and multidimensional functions, emphasizing
hardware-oriented approaches. These techniques involve several nonlinear operators and the linear
operations of scaling and aggregation (covered in Section 8.3, which also presents circuits to perform
transformations among different kinds of characteristics). Sections 8.4 and 8.5 present circuits for piece-
wise-linear (PWL) and piecewise-polynomial (PWP) functions, Section 8.6 covers neural and fuzzy
approximation techniques, and Section 8.7 outlines an extension to dynamic circuits.
8.2 Approximation Issues

8.2.1 Unidimensional Functions
Consider a target function, f (x), given analytically or as a collection of measured data at discrete values
of the independent variable. The approximation problem consists of finding a multiparameter function,
g(x, w), which yields proper fitting to the target, and implies solving two different subproblems: (1) which
approximating functions to use, and (2) how to adjust the parameter vector, w, to render optimum
fitting. We only outline some issues related to this first point. Detailed coverage of both problems can be
found in mathematics and optimization textbooks [73,78]. Other interesting views are found in circuit-
related works [6,11,30], and the literature on neural and fuzzy networks [12,21,33,43,51].
An extended technique to design nonlinear electronic hardware for both discrete [63,80] and mono-
lithic [35,62,79] design styles uses polynomial approximating functions,
X
Q
g(x) ¼ aj x j (8:2)
j¼0
obtained through expansion by either Taylor series or orthogonal polynomials (Chebyshev, Legendre,
or Laguerre) [26]. Other related approaches use rational functions,
P
aj x j
j¼0,Q
g(x) ¼ P (8:3)
bj x j
j¼0,R
δ11
–
x
w11 Σ h( ) w21
+
δ12
Ф1(x) w1 –
x w12
+
Σ h( ) w22 g(x)
+ + + Σ h( )
Ф2(x) w2 g(x)
+ Σ + –
δ1Q
+
– δ2
ФQ(x) wQ w1Q Σ h( ) w2Q
+
(a) (b)
FIGURE 8.2 Block diagram for approximating function hardware. (a) Using linear combination of basis functions;
(b) using two layers of nested sigmoids.
to improve accuracy in the approximation of certain classes of functions [14]. These can be realized by
polynomial building blocks connected in feedback configuration [63]. In addition, Ref. [39] presents an
elegant synthesis technique relying on linearly controlled resistors and conductors to take advantage of
linear circuits synthesis methods (further extended in Ref. [28]).
From a more general point of view, hardware-oriented approximating functions can be classified into
two major groups:
1. Those involving the linear combination of basis functions
X
Q
g(x) ¼ wj Fj (x) (8:4)
j¼1
which include polynomial expansions. PWL and PWP interpolation and radial basis functions
(RBF). The hardware for these functions consists of two layers, as shown in Figure 8.2a. The
first layer contains Q nonlinear processing nodes to evaluate the basis functions; the second
layer scales the output of these nodes and aggregates these scaled signals in a summing node.
2. Those involving a multilayer of nested sigmoids [51]; for instance, in the case of two layers [82],
"( ) #
X
g(x) ¼ h w2j h w1j x d1j d2 (8:5)
j¼1,Q
with the sigmoid function given by
2
h(x) ¼ 1 (8:6)
1 þ exp (lx)
where l > 0 determines the steepness of the sigmoid. Figure 8.2b shows a hardware concept for
this approximating function, also consisting of two layers.
8.2.2 Piecewise-Linear and Piecewise-Polynomial Approximants

A drawback of polynomial and rational approximants is that their behavior in a small region determines
their behavior in the whole region of interest [78]. Consequently, they are not appropriate to fit functions
f (x) f (x)
Exponential Parabolic
x x
(a) Linear (b)
FIGURE 8.3 Example of nonuniform function. (a) A functions that is uniform throughout the whole region.
(b) Interpolating the function by its samples associated to infinitely small subintervals.
that are uniform throughout the whole region (see Figure 8.3a). Another drawback is their lack of
modularity, a consequence of the complicated dependence of each fitting parameter on multiple target
data, which complicates the calculation of optimum parameter values. These drawbacks can be overcome
by splitting the target definition interval into Q subintervals, and then expressing approximating function
as a linear combination of basis functions, each having compact support over only one subinterval,
i.e., zero value outside this subinterval. For the limiting case in which Q ! 1, this corresponds to
interpolating the function by its samples associated to infinitely small subintervals (Figure 8.3b). Such
action is functionally equivalent to expressing a signal as its convolution with a delta of Dirac [10].
This splitting and subsequent approximation can be performed ad hoc, by using different functional
dependences to fit each subregion. However, to support the systematic design of electronic hardware it is
more convenient to rely on well-defined classes of approximating functions. In particular, Hermite PWPs
provide large modularity by focusing on the interpolation of measured data taken from the target function.
Any lack of flexibility as compared to the ad hoc approach may be absorbed in the splitting of the region.
Consider the more general case in which the function, y ¼ f (x), is defined inside a real interval
[d0,dN þ 1] and described as a collection of data measured at knots of a given interval partition,
D ¼ {d0, d1, d2, . . . , dN, dN þ 1}. These data may include the function values at these points, as well as
their derivatives, up to the (M 1)th order,

dk
f (k) (di ) ¼ f (x) i ¼ 0, 1, 2, . . . , N, N þ 1 (8:7)
dx k
x¼di
where k denotes the order of the derivative and is zero for the function itself. These data can be
interpolated by a linear combination of basis polynomials of degree 2M 1,
X X
N þ1 M1
g(x) ¼ f (k) (di )Fik (x) (8:8)
i¼0 k¼0
where the expressions for these polynomials are derived from the interpolation data and continuity
conditions [78]. Note that for a given basis function set and a given partition of the interval, each
coefficient in Equation 8.8 corresponds to a single interpolation kust.
The simplest case uses linear basis functions to interpolate only the function values,
X
Nþ1
g(x) ¼ f (di )li (x) (8:9)
i¼0
with no function derivatives interpolated. Figure 8.4 shows the shape of the inner jth linear basis
function, which equals 1 at di and decreases to 0 at di1 and diþ1. Figure 8.5a illustrates the representation
li(x)
1.0
0.5
0.0
δi–1 δi δi+1 x
FIGURE 8.4 Hermite linear basis function.
g(x) g(x)
y1*
y2*
x x
(a) (b)
FIGURE 8.5 Decomposition of a PWL function using the extension operator. (a) Illustrating the representation in
Equation 8.9. (b) Fitting some pieces from left to right and others from right to left.
in Equation 8.9. By increasing the degree of the polynomials, the function derivatives also can be
interpolated. In particular, two sets of third-degree basis functions are needed to retain modularity in
the interpolation of the function and its first derivative at the knots
X
Nþ1 X
Nþ1
g(x) ¼ f (di )vi (x) þ f (1) (di )si (x) (8:10)
i¼0 i¼0
where Appendix B shows the shapes and expressions of the value, vi(x), and slope, si(x), basis functions.
The modularity of Hermite polynomials is not free; their implementation is not cheapest in terms of
components and, consequently, may not be optimal for application in which the target function is fixed.
These applications are more conveniently handled by the so-called canonical representation of PWP
functions. A key concept is the extension operator introduced in Ref. [6]; the basic idea behind this
concept is to build the approximating function following an iterative procedure. At each iteration, the
procedure starts from a function that fits the data on a subinterval, enclosing several pieces of the
partition interval, and then adds new terms to also fit the data associated to the next piece. Generally,
some pieces are fit from left to right and others from right to left, to yield
X
Nþ X
1
g(x) ¼ g 0 (x) þ Dþ gi (x) þ D gi (x) (8:11)
i¼1 i¼N
It is illustrated in Figure 8.5b. The functions in Equation 8.11 have the following general expressions
Dþ g(x) ¼ wuþ (x d) w(x d)sgn(x d)

D g(x) ¼ wu (x d) w(x d)sgn(d x) (8:12)
g (x) ¼ ax þ b
0
where sgn() denotes the sign function, defined as an application of the real axis onto the discrete set {0,1}.
This representation, based on the extension operator, is elaborated in Ref. [6] to obtain the following
canonical representation for unidimensional PWL functions:
X
N
g(x) ¼ ax þ b þ wi jx di j (8:13)
i¼1
which has the remarkable feature of involving only one nonlinearity: the absolute value function.
The extension operator concept was applied in Ref. [30] to obtain canonical representations for cubic
Hermite polynomials and B-splines. Consequently, it demonstrates that a PWP function admits a global
expression consisting of a linear combination of powers of the input variable, plus truncated powers of
shifted versions of this variable. For instance, the following expression is found for a cubic B-spline:
X
3 X
N
g(x) ¼ ar xr þ bi (x di )3 sgn(x di ) (8:14)
r¼0 i¼1
with ar and bi obtainable through involved operations using the interpolation data. Other canonical
PWP representations devised by these authors use
1
(x di )r sgn(x di ) ¼ fjx di j þ ðx di Þg(x di )r1 (8:15)
2
to involve the absolute value, instead of the sign function, in the expression of the function.
8.2.3 Gaussian and Bell-Shaped Basis Functions

The Gaussian basis function belongs to the general class of RBF [51,52], and has the following expression:

(x d)2
F(x) ¼ exp (8:16)
2s2
plotted in Figure 8.6. The function value is significant only for a small region of the real axis centered
around its center, d, and its shape is controlled by the variance parameter, s2. Thus, even though the
Φ(x)
1.0
0.5
0.0
δ x
FIGURE 8.6 Guassian basis function.

Φ(x) Φ(x)
1.0 Slope = –β/2σ 1.0 Slope = –β
0.5 0.5
0.0 x 0.0 x
δ δ
(a) 2σ (b) 2σ
FIGURE 8.7 Fuzzy membership functions: (a) polynomial; (b) PWL.
support of Gaussian functions is not exactly compact, they are negligible except for well-defined local
domains of the input values.
By linear combination of a proper number of Gaussians, and a proper choice of their centers and
variances, as well as the weighting coefficients, it is possible to approximate nonlinear functions to any
degree of accuracy [51]. Also, the local feature of these functions renders this adjustment process simpler
than for multilayer networks composed of nested sigmoids, whose components are global [43,50].
A similar interpolation strategy arises in the framework of fuzzy reasoning, which is based on local
membership functions whose shape resembles a Gaussian. For instance, in the ANFIS system proposed
by Jang [33]
1
F(x) ¼ h ib (8:17)
xd 2
1þ s
as plotted in Figure 8.7a where the shape is controlled by b and s, and the position is controlled by d.
Other authors, for instance, Yamakawa [81], use the PWL membership function shape of Figure 8.7b,
which is similar to the Hermite linear basis function of Figure 8.4. From a more general point of view,
cubic B-splines [78] used to build hardware [59] and for device modeling [76] also can be considered to
be members of this class of functions.
8.2.4 Multidimensional Functions

Approximation techniques for multidimensional functions are informally classified into five groups:
1. Sectionwise PWP functions [6,30]
2. Canonical PWL representations [11]
3. Neurofuzzy interpolation [33,81]
4. Radial basis functions [51,52]
5. Multilayers of nested sigmoids [82]
8.2.4.1 Sectionwise Piecewise-Polynomial Functions

This technique reduces the multidimensional function to a sum of products of functions of only one
variable:
X
M1 X
M2 X
MP Y
P
g(x) ¼ ... a(k1 , k2 , . . . , kP ) Fkj (xj ) (8:18)
k1 ¼1 k2 ¼1 kP ¼1 j¼1
where a(k1, k2, . . . , kP) denotes a constant coefficient. These function representations were originally
proposed by Chua and Kang for the PWL case [6] where

F1 (xj ) ¼ 1 F2 (xj ) ¼ xj F3 (xj ) ¼ xj dj1

FMP xj ¼ xj djMP 2 (8:19)
Similar to the unidimensional case, the only nonlinearity involved in these basis functions is the absolute
value. However, multidimensional functions not only require weighted summations, but also multipli-
cations. The extension of Equation 8.18 to PWP functions was covered in Ref. [30], and involves the same
kind of nonlinearities as Equations 8.14 and 8.15.
8.2.4.2 Canonical Piecewise Linear Representations

The canonical PWL representation of Equation 8.13 can be extended to the multidimensional case, based
on the following representation:
X
Q
g(x) ¼ aT x þ b þ ci w Ti x di (8:20)
i¼1
where
a and wi are P-vectors
b, ci, and di are scalars
Q represents the number of hyperplanes that divide the whole space RP into a finite number of polyhedral
regions where g() can be expressed as an affine representation.
Note that Equation 8.20 avoids the use of multipliers. Thus, g() in Equation 8.20 can be realized
through the block diagram of Figure 8.8, consisting of Q absolute value nonlinearities and weighted
summers.
aTx +
x a Σ
+
b
1x +
wT
x w1 Σ c1
–
δ1
2x +
wT
x w2 Σ c2
g(x)
– Σ
δ2
wQTx
+
x wQ Σ cQ
–
δQ
FIGURE 8.8 Canonical block diagram for a canonical PWL function.

8.2.4.3 Radial Basis Functions

The idea behind RBF expansion is to represent the function at each point of the input space as a linear
combination of kernel functions whose arguments are the radial distance of the input point to a selected
number of centers
X
Q
g(x) ¼ wj Fj (kx dj k) (8:21)
j¼1
where jjjj denotes a norm imposed on RP, usually assumed Euclidean. The most common basis function
is a Gaussian kernel similar to Equation 8.16,

kx dk2
F(x) ¼ exp (8:22)
2s2
although many other alternatives are available [51], for instance,
F(r) ¼ (s2 þ r 2 )a , F(r) ¼ r, a 1 (8:23)
where r is the radial distance to the center of the basis function, r jjx djj. Micchelli [42] demonstrated
that any function where the first derivative is monotonic qualifies as a RBF. As an example, as Equation
8.23 displays, the identity function F(r) ¼ r falls into this category, which enables connecting the
representation by RBF to the canonical PWL representation [40]. Figure 8.9 is a block diagram for the
hardware realization of the RBF model.
8.2.4.4 Neurofuzzy Interpolation

This technique exploits the interpolation capabilities of fuzzy inference, and can be viewed as the
multidimensional extension of the use of linear combination of bell-shaped basis functions to approximate
nonlinear functions of a single variable (see Equations 8.4 and 8.17). Apart from its connection to
approximate reasoning and artificial intelligence, this extension exhibits features similar to the sectionwise
PWP representation, namely, it relies on a well-defined class of unidimensional functions. However,
neurofuzzy interpolation may be advantageous for hardware implementation because it requires easy-
to-build collective computation operators instead of multiplications.
δ1 r1
... Φ( ) w1
x
δ2 r2
... Φ( ) w2
g(x)
x ∑
δQ rQ
... Φ( ) wQ
x
FIGURE 8.9 Concept of RBF hardware.

x1 s1
Φ( ) Г( ) N w1
x2 s2
Φ( ) Г( ) N w2
g (x)
∑
xP sQ
Φ( ) Г( ) N wQ
FIGURE 8.10 Conceptual architecture of a neurofuzzy interpolator.
Figure 8.10 depicts the block diagram of a neurofuzzy interpolator for the simplest case in which
inference is performed using the singleton algorithm [33] to obtain
X
Q
sj (x)
g(x) ¼ wj P (8:24)
j¼1
si (x)
i¼1, Q
where the functions si(x), called activities of the fuzzy rules, are given as

sj (x) ¼ G Fj1 (x1 ), Fj2 (x2 ), . . . , FjP (xP ) (8:25)
where
G() is any T-norm operator, for instance, the minimum
F() has a bell-like shape (see Figure 8.7)
8.2.4.5 Multilayer Perceptron

Similar to Equation 8.5, but consists of the more general case of several layers, with the input to each
nonlinear block given as a linear combination of the multidimensional input vector [82].
8.3 Aggregation, Scaling, and Transformation Circuits

The mathematical techniques presented in Section 8.2 require several nonlinear operators and the linear
operators of scaling and aggregation (covered for completeness in this section). This section also covers
transformation circuits. This is because in many practical situations we aim to exploit some nonlinear
mechanism which intrinsically involves a particular kind of characteristics. For instance, a MOS
transistor has inherent square-law transconductance, while a diode exhibits an exponential driving-
point. Similarly, many nonlinear operators are naturally realized in current-mode domain and involve
currents at both the input and the output. Thus, transformation circuits are needed to exploit these
mechanisms for other types of characteristics.
8.3.1 Transformation Circuits

Two basic problems encountered in the design of transformation circuits are how to convert a voltage
node into a current node and vice versa. We know no unique way to realize these functions. Instead, there
ii iy
+ Y
+ Z
vi vi
ix
–
–
ix
X
FIGURE 8.11 First-order models for voltage op-amps and CCIIs using nullators and norators.
are many alternatives which depend on which active component from Appendix A is used. The OTA can
be represented to a first-order model as a voltage-controlled current source (VCCS) with linear
transconductance parameter gm. Regarding the op-amp and CCII, it is convenient to represent them
by the first-order models of Figure 8.11, which contain nullators and norators.* A common appealing
feature of both models is the virtual ground created by the input nullator. It enables us to sense the
current drawn by nodes with fixed voltage—fully exploitable to design transformation circuits.
8.3.1.1 Voltage-to-Current Transformation

A straightforward technique for voltage-to-current conversion exploits the operation of the OTA as
a VCCS (see Figure 8.12a) to obtain i0 ¼ gmvi, where gm is the OTA transconductance parameter [22].
A drawback is that its operation is linear only over a limited range of the input voltage. Also, the
scaling factor is inaccurate and strongly dependent on temperature and technology. Consequently,
+ 1 io
vi + io
a ∑ Y
io
+ + G= R–1
+ + CCII Z
vi + X
– gmvi vi vo vi
1
vi – – – –
G = R–1
(a) (b) (c)
io io
G= R–1
G
+ +
+ +
vc
vi – vi –
– – G = β(vc – VT)
(d) (e)
FIGURE 8.12 Voltage-to-current transformation: (a) using an OTA; (b) using voltage feedback; (c) using a current
conveyor; (d) using virtual ground of an op-amp; (e) same as Figure 8.12d, but with active resistors.
* A nullator simultaneously yields a short circuit and an open circuit, while the voltage and the current at a norator are
determined by the external circuitry. The use of a nullator to model the input port of an op amp is valid only if the
component is embedded in a negative feedback configuration. With regard to the CCII, the required feedback is created by
the internal circuitry.
voltage-to-current conversion using this approach requires circuit strategies to increase the OTA linear
operation range [17,70], and tuning circuits to render the scaling parameter accurate and stable [70]. As
counterparts, the value of the scaling factor is continuously adjustable through a bias voltage or current.
Also, because the OTA operates in open loop, its operation speed is not restricted by feedback-induced
pole displacements.
The use of feedback attenuates the linearity problem of Figure 8.12a by making the conversion rely on
the constitutive equation of a passive resistor. Figure 8.12b illustrates a concept commonly found in op-
amp-based voltage-mode circuits [29,59]. The idea is to make the voltage at node A of the resistor change
linearly with vo, v1 ¼ vo þ avi, and thus render the output current independent of vo, to obtain io ¼ G
(vo þ avi vo) ¼ aGvi. The summing node in Figure 8.12b is customarily realized using op-amps and
resistors, which is very costly in the more general case in which the summing inputs have high
impedance. The circuits of Figure 8.12c and d reduce this cost by direct exploitation of the virtual
ground at the input of current conveyors (Figure 8.12c) and op-amps (Figure 8.12d). For both circuits,
the virtual ground forces the input voltage vi across the resistor. The resulting current is then sensed
at the virtual ground node and routed to the output node of the conveyor, or made to circulate through
the feedback circuitry of the op-amp, to obtain io ¼ Gvi.
Those implementations of Figure 8.12b through d that use off-the-shelf passive resistors overcome the
accuracy problems of Figure 8.12a. However, the values of monolithic components are poorly controlled.
Also, resistors may be problematic for standard VLSI technologies, where high-resistivity layers are not
available and consequently, passive resistors occupy a large area. A common IC-oriented alternative uses
the ohmic region of the MOS transistor to realize an active resistor [69] (Figure 8.12e). Tuning and
linearity problems are similar to those for the OTA. Circuit strategies to overcome the latter are ground
in Refs. [13,32,66,69].
8.3.1.2 Current-to-Voltage Transformation

The most straightforward strategy consists of a single resistor to draw the input current. It may be passive
(Figure 8.13a) or active (Figure 8.13b). Its drawback is that the node impedance coincides with the
resistor value, and thus makes difficult impedance matching to driving and loading stages. These
matching problems are overcome by Figure 8.13c, which obtains low impedances at both the input
and the output ports. On the other hand, Figure 8.13d obtains low impedance at only the input terminal,
but maintains the output impedance equal to the resistor value. All circuits in Figure 8.13 obtain vo ¼ Rii,
1
where R ¼ gm for the OTA.
ii
ii
+
–
R vo + gm
– vo +
–
(a) (b)
ii
R Y
– CCII Z
–1 X +
+ +
ii R vo
vo –
–
(c) (d)
FIGURE 8.13 Current-to-voltage transformation: (a) using a resistor; (b) using a feedback OTA; (c) using op-amps;
(d) using current conveyors.
C o
e Δq
vi– e
Δq
vi+
o
C e –
vo
o +
n n +1
(a) (b)
FIGURE 8.14 Transformations for sampled-data circuits: (a) voltage to charge; (b) charge to voltage.
8.3.1.3 Voltage=Charge Domain Transformations for Sampled-Data Circuits

The linearity and tuning problems of previous IC-related transformation approaches are overcome
through the use of dynamic circuit design techniques based on switched-capacitors [72]. The price is
that the operation is no longer asynchronous: relationships among variables are only valid for a discrete
set of time instants. Variables involved are voltage and charge, instead of current, and the circuits use
capacitors, switches, and op-amps.
Figure 8.14a is for voltage-to-charge transformation, while Figure 8.14b is for charge-to-voltage
transformation. The switches in Figure 8.14a are controlled by nonoverlapping clock signals, so that
the structure delivers the following incremental charge to the op-amp virtual ground node:
Dqe ¼ Cðviþ vi Þ ¼ Dqo (8:26)
where the superscript denotes the clock phase during which the charge is delivered. Complementarily,
the structure of Figure 8.14b initializes the capacitor during the even clock phase, and senses the
incremental charge that circulates through the virtual ground of the op-amp during the odd clock
phase. Thus, it obtains
v0o ¼ C(Dqo ) (8:27)
References [45,46,68] contain alternative circuits for the realization of the scaling function. Such circuits
have superior performance in the presence of parasitics of actual monolithic op-amps and capacitors.
8.3.1.4 Transformation among Transfer Characteristics

Figure 8.15 depicts the general architecture needed to convert one kind of transfer characteristics,
e.g., voltage transfer, into another, e.g., current transfer. Variables x0 and y0 of the original characteristics
can be either voltage or current, and the same occurs for x and y of the converted characteristic. The
figure depicts the more general case, which also involves a linear transformation of the characteristics
themselves:

0

x x a a12 x0
¼ A 0 ¼ 11 (8:28)
y y a21 a22 y0
For example, Figure 8.15 encloses the matrices to rotate the characteristics by an angle u, and to reflect
the characteristics with respect to an edge with angle u. This concept of linear transformation converters
and its applications in the synthesis of nonlinear networks was proposed initially by Chua [5] for driving-
point characteristics, and further extended by Glover [24] and Huertas [29].
In the simplest case, in which the nondiagonal entries in Equation 8.28 are zero, the transformation
performed over the characteristics is scaling, and the circuits of Figures 8.12 and 8.13 can be used directly
a12/a11
–
x΄
x 1/a11 Σ f( ) a22 Σ y
+ +
y΄ +
a21
cos θ – sin θ cos 2θ sin 2θ

A= sin θ cos θ A=
sin 2θ cos 2θ
FIGURE 8.15 Concept of linear transformation converter for transfer characteristics: general architecture, and
transformation matrices for rotation (left) and reflection (right).
to convert x into x 0 at the input front-end, and y 0 at the output front-end. Otherwise, aggregation
operation is also required, which can be realized using the circuits described elsewhere.
8.3.1.5 From Driving Point to Transfer and Vice Versa

Figure 8.16 illustrates circuits to transform driving-point characteristics into related transfer character-
istics. Figure 8.16a and b uses the same principle as Figure 8.12c and d to transform a voltage-controlled
driving-point characteristic, ii ¼ f (vi), into a transconductance characteristics. On the other hand Figure
8.16c operates similarly to Figure 8.13c to transform a current-controlled driving-point characteristic,
vi ¼ f (ii), into a transimpedance characteristic. If the resistance characteristics of the resistor in Figure
8.16a and b, or the conductance characteristic of the resistor in Figure 8.16c, is invertible, these circuits
serve to invert nonlinear functions [63]. For instance, using a common base BJT in Figure 8.16c obtains a
logarithmic function from the BJT exponential transconductance. Also, the use of a MOST operating in
the ohmic region serves to realize a division operation.
Lastly, let us consider how to obtain driving-point characteristics from related transfer characteristics.
Figure 8.17a and b corresponds to the common situation found in op-amp-based circuits, where the
transfer is between voltages. Figure 8.17a is for the voltage-controlled case and Figure 8.17b is for the
current-controlled case. They use feedback strategies similar to Figure 8.17b to render either the input
voltage or the input current independent of the linear contributions of the other port variable. A general
theory for this kind of transformation converter can be found in Ref. [29].
Note that these figures rely on a Thévenin representation. Similar concepts based on Norton repre-
sentations allow us to transform current transfer characteristics into driving-point characteristics.
However, careful design is needed to preserve the input current while sensing it.
io
f (ii)
ii = f (vi) + –
io R΄
Y
+ CCII Z ii
X + – R΄
vi
ii = f (vi) –
vi +
– vo = –f (ii)
– + vo = f (ii)
(a) (b) (c)
FIGURE 8.16 From driving point to transfer characteristics: (a) and (b) transconductance from voltage-controlled
driving-point; (c) transimpedance from current-controlled driving-point.
ii ii
R R +
+
–a Σ a
Σ +
+ –1 +
+
vi vi
1 + –1
– –
f( ) 1 Σ f( )
+ Rii
ii = aR–1f (vi) (b) vi = af (Rii)
(a)
ii ii f( )
ii ii
f( ) Y
+ vi + io + CCII Z
– ii X
vi vi
– – vo
(c) (d)
FIGURE 8.17 From transfer to driving-point characteristics. (a) Voltage-controlled case. (b) The current-controlled
case. (c) A transconductor. (d) A current-controlled resistor.
Other interesting transformation circuits are depicted in Figure 8.17c and d. The block in Figure 8.17c
is a transconductor that obtains io ¼ f (vi) with very large input impedance. Then, application of
feedback around it obtains a voltage-controlled resistor, io ¼ f (vi). Figure 8.17d obtains a current-
controlled resistor, vi ¼ f (ii), using a current conveyor to sense the input current and feedback the output
voltage of a transimpedance device with vo ¼ f (ii).
8.3.2 Scaling and Aggregation Circuitry

8.3.2.1 Scaling Operation
Whenever the weights are larger than unity, or are negatives, the operation of scaling requires active
devices. Also, because any active device acts basically as a transconductor, the scaling of voltages is
performed usually through the transformation of the input voltage into an intermediate current and the
subsequent transformation of this current into the output voltage. Figure 8.18 illustrates this for an op-
amp-based amplifier and an OTA-based amplifier. The input voltage is first scaled and transformed in io,
and then this current is scaled again and transformed into the output voltage. Thus, the scaling factor
depends on two design parameters. Extra control is achieved by also scaling the intermediate current.
R2
R1 vi +
gm 2 – vo
vi – gm1
– io +
io + vo
R2 gm2
vo = – v vo = g vi
R1 i m1
(a) (b)
FIGURE 8.18 Mechanisms for voltage scaling. (a) An op-amp-based amplifier. (b) An OTA-based amplifier.
ii io ii io
p2 p2
+ io ~ i p1
p1 M1 M2 p2 p1 i +
vi Q1 vi Q2
– –
(a)
ii io1 io2
+ – +
– + –
(b)
FIGURE 8.19 Current scaling using current mirrors. (a) Two matched transistors. (b) Noninverting amplification.
Let us now consider how to scale currents. The most convenient strategy uses a current mirror, whose
simplest structure consists of two matched transistors connected as shown in Figure 8.19a [25]. Its
operating principle relies on functional cancellation of the transistor nonlinearities to yield a linear
relationship

ii p2
io ¼ p2 f (vi ) ¼ p2 f f 1 ¼ ii (8:29)
p1 p1
where p1 and p2 are parameters with value that can be designer controlled; for instance, b of the MOST or
Is of the BJT (see Appendix A and Ref. [44]). The input and output currents in Figure 8.19a must be
positive. Driving the input and output nodes with bias currents IB and (p2=p1)IB, respectively, one obtains
ii ¼ ii0 þ IB and io ¼ Io0 þ (p2 þ p1)IB, and this enables bilateral operation on ii0 and i0o.
In practical circuits, this simple design concept must be combined with circuit strategies to reduce
errors due to nonnegligible input current of BJTs, DC voltage mismatch between input and output
terminals, finite input resistance, and finite output resistance. Examples of these strategies can be found
in Refs. [25,56,77]. On the other hand, sizing and layout strategies for other problems related to random
mismatches between input and output devices are found in Ref. [41,48], which are applicable to most
matching problems in MOS IC design.
The current mirror concept is extensible to any pair of matched transconductors, provided their
transconductance characteristics are invertible and parameterized by a designer-controlled scale
factor p, and that the dependence of the output current with the output voltage is negligible. In particular,
the use of differential transconductors enables us to obtain bilateral operation simply, requiring no
current-shifted biasing at the input and output nodes. It also simplifies achieving noninverting ampli-
fication (that is, positive scale factors), as Figure 8.19b illustrates. This figure also serves to illustrate
the extension of the mirror concept to multiple current outputs. Note that except for loading consider-
ations, no other limitations exist on the number of output transconductors that can share the input
voltage. Also, because fan-out of a current source is strictly one, this replication capability is needed
to enable several nodes to be excited by a common current. On the other hand, the fact that the
different current output replicas can be scaled independently provides additional adjusting capability
for circuit design.
i1
v1 v–i conversion
i2 io1
v2 v–i conversion X io2
p
CCII Z io1 = Σ ik (vk)
k =1
ip Y
vp v–i conversion
FIGURE 8.20 Aggregation of voltages through intermediate currents and current conveyor.
8.3.2.2 Signal Aggregation

As for the scaling operation, aggregation circuitry operates in current domain, based on Kirchhoff’s
current law (KCL). Thus, the aggregation of voltages requires that first they be transformed into currents
(equivalently, charge packets in the switched-capacitor circuitry) and then added through KCL, while
currents and incremental charges are added by routing all the components to a common node. If the
number of components is large, the output impedance of the driving nodes is not large enough, and=or
the input importance of the load is not small enough, this operation will encompass significant
loading errors due to variations of the voltage at the summing node. This is overcome by clamping the
voltage of this node using a virtual ground, which in practical circuits is realized by using either the
input port of an op-amp, or terminals X and Y of a current conveyor. Figure 8.20 illustrates the current
conveyor case.
8.4 Piecewise-Linear Circuitry

Consider the elementary PWL function that arise in connection with the different methods of represen-
tation covered in Section 8.2:
. Two-piece concave and convex characteristics (see Equation 8.12)
. Hermite linear basis function (see Figure 8.4 and Appendix B)
. Absolute value (see Equation 8.13)
where rectification is the only nonlinear operator involved. The circuit primitives in Appendix A exhibit
several mechanisms which are exploitable in order to realize rectification:
. Cutoff of diodes and transistors—specifically, current through a diode negligible for negative
voltage, output current of BJTs, and MOSTs negligible under proper biasing
.
Very large resistance and zero offset voltage of an analog switch for negative biasing of the control
terminal
. Digital encoding of the sign of a differential voltage signal using a comparator
Similar to scaling and aggregation operations, rectification is performed in current domain, using the
mechanisms listed previously to make the current through a branch negligible under certain conditions.
Three techniques are presented, which use current transfer in a transistor-based circuit, current-
to-voltage transfer using diodes and op-amp, and charge transfer using switches and comparators,
respectively.
8.4.1 Current Transfer Piecewise-Linear Circuitry

Figure 8.21a and b presents the simplest technique to rectify the current transferred from node A to
node B. They exploit the feature of diodes and diode-connected transistors to support only positive
ii 1 2 io
ii io
Source Load + Mo
1 2 vi
Mi 
(a) (b)
D
ii + 
+  ii
vi +
 + vi 
(c) (d)
FIGURE 8.21 (a) and (b) Circuit techniques for current rectification; (c) and (d) superdiodes.
currents. Figure 8.21a operates by precluding negative currents to circulate from node A to node B, while
Figure 8.21b also involves the nonlinear transconductance of the output transistor Mo; negative currents
driving the node A force vi to become smaller than the cut-in voltage and, consequently, the output
current becomes negligible. A drawback to both circuits is that they do not provide a path for negative
input currents, which accumulates spurious charge at the input node and forces the driving stage to
operate outside its linear operating regime. Solutions to these problems can be found in Refs. [57,61].
Also, Figure 8.21a produces a voltage displacement equal to the cut-in voltage of the rectifying device,
which may be problematic for applications in which the voltage at node A bears information. A common
strategy to reduce the voltage displacements uses feedback to create superdiodes (shown in Figure 8.21c
for the grounded case and Figure 8.21d for the floating case), and where the reduction of the voltage
displacement is proportional to the DC gain of the amplifier.
Figure 8.22a, called a current switch, provides paths for positive and negative currents entering
node A, and obtains both kinds of elementary PWL characteristics exploiting cutoff of either BJTs or
MOSTs. It consists of two complementary devices: npn (top) and pnp BJTs, or n-channel (top) and
p-channel MOSTs. Its operation is very simple: any positive input current increases the input voltage,
turning the bottom device ON. Because both devices share the input voltage, the top device becomes
OFF. Similarly, the input voltage decreases for negative input currents, so that the top device becomes ON
and the bottom OFF. In sum, positive input currents are drawn to the bottom device, while negative
currents are drawn to the top device.
An inconvenience of Figure 8.22a is the dead zone exhibited by its input driving-point characteristics,
which is very wide for MOSTs. It may produce errors due to nonlinear loading of the circuitry that drives
the input node. Figure 8.22b overcomes this by using a circuit strategy similar to that of the superdiodes.
The virtual ground at the op-amp input renders the dead zone centered around the voltage level E, and its
amplitude is reduced by a factor proportional to the amplifier DC gain. Some considerations related to
the realization of this amplifier are found in Ref. [58].
Proper routing and scaling of the currents ip and in in Figure 8.22a gives us the concave and convex
basic characteristics with full control of the knot and position and the slope in the conducting region.
Figure 8.22c is the associated circuit, in which the input bias current controls the knot position, and the
slope in the conducting region is given by the gain of the current mirrors. Note that this circuit also
obtains the absolute value characteristics, while Figure 8.22d obtains the Hermite linear basis function.
in
in in 0.0 ii
ii
+ 
A
E +
ii ii Vi

1 1 ip ii
+ + A
Vi Vi
  0.0 Vi — E
ip ip 0.0 ii
(a) (b)
io3
1 P 1 1 b
IB
ii ii
io4
δ io
1 P 1 P P 1 a 1 1
io2
(c) (d)
FIGURE 8.22 Current switch and its application for different basic PWL curves. (a) Dead zone exhibited by its
input driving-point characteristics. (b) A circuit strategy similar to that of the superdiodes. (c) The associated circuit
of (a). (d) A Hermite linear basis function circuit.
The way to obtain the PWL fuzzy membership function from this latter circuit is straightforward, and
can be found in Ref. [58].
8.4.2 Transresistance Piecewise-Linear Circuitry

The circuit strategies involved in PWL current transfer can be combined in different ways with the
transformation circuits discussed previously to obtain transconductance and voltage-transfer PWL
circuits. In many cases design ingenuity enables optimum merging of the components and consequently,
simpler circuits. Figure 8.23a depicts what constitutes the most extended strategy to realize the elemen-
tary PWL functions using off-the-shelf components [63,80]. The input current is split by the feedback
circuitry around the op-amp to make negative currents circulate across Dn and positive currents circulate
across Dp. Consequently, this feedback renders the input node of the op-amp a virtual ground and thus
reduces errors due to finite diode cut-in voltage in the transresistance characteristics. Similar to Figure
8.22, the position of the knot in these elementary characteristics is directly controlled by an input bias
current. Also note that the virtual ground can be exploited to achieve voltage-to-current transformation
using the strategy of Figure 8.12d and thus, voltage-transfer operation.
Algebraic combination of the elementary curves provided by Figure 8.23a requires transforming the
voltages von and vop into currents and then aggregating these currents by KCL. For example, Figure 8.23b
is the circuit for the absolute value and Figure 8.23c presents a possible implementation of the Hermite
basis function.
0.0 Rpii
Rp Dp R
vop R' R'
Rn Dn R

ii von ii + vo
  R'
+ Rnii + R'
0.0
(a) (b)
Rn
R' R'' R'''
vo
Rp R' 
ii
+
 R' 
+ R' +
(c)
FIGURE 8.23 PWL transimpedance circuits. (a) Circuit for algebraic combination of the elementary curves.
(b) Circuit for the absolute value. (c) Circuit for a possible implementation of the Hermite basis function.
Other related contributions found in the literature focus on the systematic realization of PWL driving-
point resistors, and can be found in Refs. [7,10].
8.4.3 Piecewise-Linear Shaping of Voltage-to-Charge

Transfer Characteristics
The realization of PWL relationships among sampled-data signals is based on nonlinear voltage-to-
charge transfer and uses analog switches and comparators. Figure 8.24a is a circuit structure, where one
of the capacitor terminals is connected to virtual ground and the other to a switching block. Assume that
nodes A and B are both grounded. Note that for (v d) > 0 the switch arrangement set node D to d,
while node E is set to v. For (v d) < 0, nodes D and E are both grounded. Consequently, voltage at
node C in this latter situation does not change from one clock phase to the next, and consequently, the
incremental charge becomes null for (v d) < 0. On the other hand, for (v d) > 0, the voltage at node
C changes from one clock phase to the next, and generates an incremental charge
Dqe ¼ Cðv dÞ ¼ Dqo (8:30)
e
C
1 4 e
Δq
б − 3 o
v +
o C
2 5
− +
(a) (b) б v
FIGURE 8.24 Circuits for rectification in voltage-to-charge domain. (a) Circuit structure where one of the capacitor
terminals is connected to virtual ground and the other to a switching block. (b) Circuitry using series rectification of
the circulating charge through a comparator-controlled switch.
which enables us to obtain negative and positive slopes using the same circuit, as shown in Figure 8.24a.
To make the characteristics null for (v d) > 0, it suffices to interchange the comparator inputs. Also,
the technique is easily extended to the absolute value operation by connecting terminal A to v, and
terminal B to d. The realization of the Hermite linear basis function is straightforward and can be found
in Ref. [55].
Other approaches to the realization of PWL switched-capacitor circuitry use series rectification of
the circulating charge through a comparator-controlled switch (Figure 8.24b), and can be found in
Refs. [16,31]. The latter also discusses exploitation of these switched-capacitor circuits to realize con-
tinuous-time driving-point characteristics, the associated transformation circuits, and the dynamic
problematics.
8.5 Polynomials, Rational, and Piecewise-Polynomial

Functions
These functions use rectification (required for truncation operation in the PWP case) and analog
multiplication,
xy
z¼ (8:31)
a
as basic nonlinear operators.* Joining the two inputs of the multiplier realizes the square function.
Analog division is realized by applying feedback around a multiplier, illustrated at the conceptual level in
Figure 8.25a; the multiplier obtains e ¼ (zy)=a, and for A ! 1, the feedback forces x ¼ e. Thus, if y 6¼ 0,
the circuit obtains z ¼ a(x=y). Joining y and z terminals, the circuit realizes the square root, z ¼ (ax)1=2.
This concept of division is applicable regardless of the physical nature of the variables involved. In the
special case in which e and x are current and z is a voltage, the division can be accomplished using KCL to
yield x ¼ e. Figure 8.25b shows a circuit for the case in which the multiplication is in voltage domain, and
Figure 8.25c is for the case in which multiplication is performed in transconductance domain. The
transconductance gain for input z in the latter case must be negative to guarantee stability.
R2
y io
x Σ A z R1
+ i2 i1
– x – x +
e gm1
y i1 + z – y z
io
z = α(x/y) z = –α(x/y)(R2/R1) z = α(x/y)gm1

(a) (b) (c)
FIGURE 8.25 Division operator using a feedback multiplier: (a) concept; (b) with voltage multiplier and op-amp;
(c) with transconductance multiplier and OTA.
* Scale factor a in Equation 1.31 must be chosen to guarantee linear operation in the full variation range of inputs
and outputs.
8.5.1 Concepts and Techniques for Polynomic and Rational Functions

Figure 8.26 illustrates conceptual hardware for several polynomials up to the fifth degree. Any larger
degree is realized similarly. Figure 8.27 uses polynomials and analog division to realize rational
functions
P
aj x j
i¼0,Q
g(x) ¼ P (8:32)
bj x j
j¼0,R
For simplicity, we have assumed that the internal scaling factors of the multipliers in Figures 8.26 and
8.27 equal one.
An alternative technique to realize rational functions is based on linearly controlled resistors, described
as v ¼ (Lx)i, and linearly controlled conductors, i ¼ (Cx)v, where L and C are real parameters. This
technique exploits the similarity between these characteristics and those which describe inductors and
capacitors in the frequency domain, to take advantage of the synthesis techniques for rational transfer
function in the s-plane through interconnection of these linear components [28,39] (Figure 8.28). As for
the previous cases, realization of linearly controlled resistors and conductors require only multipliers and,
α2 α0
α0 +
+ +
x x
α2 α4 Σ
Â + Σ
+ g (x)
Σ
+ g(x) +
+ +
α1 α3
α1
α0 α3
+ α0
x + +
α3 Σ x α5 +
+ + g(x) + Σ Σ
+ g (x)
+ +
α2 α4 +
α2
α1 α1
FIGURE 8.26 Conceptual hardware for polynomial functions.
x Q g(x)
∑ αj x j ∑ A
j=0 +
–
R
∑ βj x j
j=0
FIGURE 8.27 Rational function generation through feedback division.

i i
+ x + x Interconnecting these components

v v and controlled sources generates H(x)
– – rational network functions in x.
i = (Cx)v v = (Lx)i
I(s) I(s)
+ + Interconnecting these components

V(s) V(s) and controlled sources generates H(s)
C L rational network functions in s.
– –
I(s) = sC V(s) V(s) = sL I(s)
FIGURE 8.28 Usage of linearly controlled resistors to synthesize rational network functions.
depending upon the nature of the variables involved in the multipliers, voltage-to-current and current-
to-voltage transformation circuits.
8.5.2 Multiplication Circuitry

Two basic strategies realize multiplication circuitry: using signal processing and exploiting some non-
linear mechanism of the primitive components. Signal processing multipliers rely on the generation of a
pulsed signal whose amplitude is determined by one of the multiplicands and its duty cycle by the other,
so that the area is proportional to the result of the multiplication operation. Figure 8.29a presents an
implementation concept based on averaging. This is performed by a low-pass filter where the input is a
pulse train with amplitude proportional to x and duty cycle proportional to y. The latter proportionality
is achieved through nonlinear sampling by comparing y with a time reference sawtooth signal. Thus, the
vc
LP
x
vc
filter z
t
T 2T 3T
y ref(t)
– +
ref (t) y
t
(a) T 2T 3T
z(t) S
x hz(t) Sample and
hold z(τ)
– +
(b) α hy(t) y
FIGURE 8.29 Signal processing multipliers by (a) averaging; (b) shaping in time domain.
area under each pulse in the train is the product of x 3 y, extracted by the low-pass filter. This
implementation concept is discussed in further detail in classical texts on analog computation [63],
and applied more recently to analog VLSI signal processing [72].
Figure 8.29b is an alternative implementation concept based on signal shaping in the time domain.
It uses two linear blocks with normalized unit step response given as hz(t) and hy(t). The first is driven by
level x to obtain
z(t) ¼ xhz (t), 0t<t (8:33)
where t denotes the duration of the time interval during which the switch S remains closed. The other is
driven by a references level a, to render t given by
y
t ¼ h1 (8:34)
y
a
Assuming both linear blocks are identical and the time function invertible, one obtains the steady-state
value of z, z(t), as the product of levels x and y.
The simplest implementation of Figure 8.29 uses integrators, i.e., h(t) ¼ t, as linear blocks (see Figure
8.41b). Also note that the principle can be extended to the generation of powers of an input signal
by higher-order shaping in time domain. In this case, both linear blocks are driven by reference levels.
The block hy(t) consists of a single integrator, t ¼ y=a. The other consists of the cascade of P integrators,
and obtains z(t) ¼ btp. Thus, z(t) ¼ b(y=a)p. Realizations suitable for integrated circuits are found in
Refs. [34,55].
8.5.3 Multipliers Based on Nonlinear Devices

The primitives in Appendix A display several mechanisms that are exploitable to realize analog
multipliers:
. Exponential functionals associated to the large-signal transconductance of BJTS, and the possibility
of obtaining logarithmic dependencies using feedback inversion
. Square-law functionals associated to the large-signal transconductance of the MOS transistor
operating in saturation region
. Small-signal transconductance of a BJT in active region as a linear function of collector current
. Small-signal transconductance of a MOST in saturation as a linear function of gate voltage
. Small-signal self-conductance of a MOS transistor in ohmic region as a linear function of gate
voltage
These and related mechanisms have been explained in different ways and have resulted in a huge catalog
of practical circuits. To quote all the related published material is beyond the scope of this section. The
references listed at the end were selected because of their significance, and their cross-references contain a
complete view of the state of the art. Also, many of the reported structures can be grouped according to
the theory of translinear circuits, which provides a unified framework to realize nonlinear algebraic
functions through circuits [23,62,79].
8.5.3.1 Log–Antilog Multipliers

Based on the exponential large-signal transconductance of the BJT, and the following relationships,
z 0 ¼ ln(x) þ ln(y) ¼ ln(xy)

0 (8:35)
z ¼ ez ¼ eln(xy) ¼ xy
i1 i3
Q1 Q3
+ – – +
i2 i0
Q2 Q4
–
+
(a)
iα ix iα ix iy
– – – –
+ kR (1 – k)R + + +
iy
R (k – 1)R
for 0 < k < 1 iy for k > 1

iα ix
– –
+ +
for k < 0
–kR R
(b)
FIGURE 8.30 (a) Core block of a log–antilog multiplier; (b) circuits to elevate to a power.
which can be realized as illustrated in Figure 8.30a [65]. This circuit operates on positive terminal
currents to obtain i0 ¼ (i1i2)=i3, which can be understood from translinear circuit principles by noting
that the four base-to-emitter voltages define a translinear loop,
0 ¼vbe1 þ vbe2 vbe3 vbe4

i1 i2 i3 io
¼ln þ ln ln ln (8:36)
Is Is Is Is
The circuit can be made to operate in four-quadrant mode, though restricted to currents larger than IB,
by driving each terminal with a bias current source of value IB. Also, because all input terminals
are virtual ground the circuit can be made to operate on voltages by using the voltage-to-current
transformation concept of Figure 8.12d. Similarly, the output current can be transformed into a voltage
by using an extra op-amp and the current-to-voltage transformation concept of Figure 8.13c. Extension
of this circuit structure to generate arbitrary powers is discussed in Ref. [23]. Figure 8.30b [1] uses similar
techniques, based on introducing scaling factors in the translinear loop, to obtain
iy ¼ i1k
a ix
k
(8:37)
8.5.3.2 Square-Law Multipliers

Square-law multipliers are based on the algebraic properties of the square function, most typically
1
z¼ (x þ y)2 (x y)2 ¼ xy (8:38)
4
shown conceptually in Figure 8.31a, and the possibility of obtaining the square of a signal using circuits,
typically consisting of a few MOS transistors operating in saturation region. Figure 8.31b through f depict
some squarer circuits reported in the literature.
+
x ∑
+ +
xy
∑ 1/4
+
+
y
– ∑
(a)
IQ 2IQ IQ IQ 2IQ
io
io
ii i2i
io = i2i
8IQ ii io =
8IQ
(b) (c)
io
io io
v1 v1 v1 v2
v2 1 v2
β βEQ
io = 2 (v1 – v2 –vT)2 io = 2
(v1 – v2 – vTEQ)2 io =
β
(v1 – v2)2 + other terms
4
(d) (e) (f )
FIGURE 8.31 (a) Block diagram of the quarter-square multiplier; (b) current-mode squarer circuit in Ref. [3];
(c) current-mode squarer circuit in Ref. [79]; (d) voltage-mode squarer circuit in Ref. [36]; (e) voltage-mode squarer
circuit in Ref. [60]; (f) voltage-mode squarer circuit in Ref. [49].
The completeness of square-law operators for the realization of nonlinear circuits was demonstrated
from a more general point of view in Ref. [47], and their exploitation has evolved into systematic circuit
design methodologies to perform both linear and nonlinear functions [3].
8.5.3.3 Transconductance Multipliers

A direct, straightforward technique to realize the multiplication function exploits the possibility of
controlling the transconductance of transistors through an electrical variable (current or voltage).
Although this feature is exhibited also by unilateral amplifiers, most practical realizations use differential
amplifiers to reduce offset problems and enhance linearity [25]. Figure 8.32 presents a generic schematic
for a differential amplifier, consisting of two identical three-terminal active devices with common bias
current. The expressions on the right display its associated transconductance characteristics for npn-BJTs
and n-channel MOSTs, respectively [25]. These characteristics are approximated to a first-order model as
iy pffiffiffiffiffiffiffi
izBJT vx , izMOST biy vx (8:39)
4Ut
which clearly displays the multiplication operation, although restricted to a rather small linearity
range. Practical circuits based on this idea focus mainly on increasing this range of linearity, and follow
different design strategies. Figure 8.33 gives an example known as the Gilbert cell or Gilbert multiplier
[23]. Corresponding realizations using MOS transistors are discussed in Refs. [2,53]. Sánchez-Sinencio
et al. [61] present circuits to realize this multiplication function using OTA blocks. On the other
iz+ iz– vx
iz ≈ iy tanh
2Ut
vx+ vx–
iz = iz+– iz– √βiyvx √ 1 – v2x β/(4iy) |vx| ≤ √ 2iy/β

iy iz ≈
vx = vx+– vx– iy sgn vx |vx| ≥ √ 2iy/β
FIGURE 8.32 Differential amplifiers and their associated large-signal transconductances.
iz+ iz–
vx– vx+ vx–

vx vy
iz ≈ Is tanh tanh
vy+ 2Ut 2Ut
vy–
Is
FIGURE 8.33 Bipolar Gilbert cell.
hand, Ref. [17] presents a tutorial discussion of different linearization techniques for MOS differential
amplifiers.
8.5.3.4 Multiple Based in the Ohmic Region of MOS Transistors

The ohmic region of JFETs has been used to realize amplifiers with controllable gain for automatic gain
control [54]. It is based on controlling the equivalent resistance of the JFET transistor in its ohmic region
through a bias voltage. More recently, MOS transistors operating in the ohmic region were used to realize
linear [69,70] and nonlinear [35] signal processing tasks in VLSI chips. There exist many ingenious
circuits to eliminate second and higher-order nonlinearities in the equivalent resistance characteristics.
vy+ vy– vy– vz–

vx+
iz+ i΄z+
vx+ iz+ vy+ vz+
vx–
–
vo
+
iz– vx–
vy– vz–
vx– iz– i΄z–
vx+
vy+ vz+
(a) (b)
FIGURE 8.34 Four-quadrant multipliers based on MOS transistors in the ohmic region. (a) Circuit achieving very
good nonlinear cancellation through cross-coupling and fully differential operation. (b) A more general view showing
the conductance as well as the resistance of the MOS ohmic region used to obtain a versatile amplifier-divider
building block.
The circuit in Figure 8.34a achieves very good nonlinearity cancellation through cross-coupling and fully
differential operation, obtaining
izþ iz ¼ 2b(vxþ vx )(vyþ vy ) (8:40)
and its use in multiplication circuits is discussed in Refs. [35,66]. A more general view is presented
in Figure 8.34b [35], where the conductance as well as the resistance of the MOS ohmic region are used
to obtain a versatile amplifier-divider building block. Enomoto and Yasumoto [18] report another
interesting multiplier that combines the ohmic region of the MOS transistor and sampled-data circuits.
8.6 Sigmoids, Bells, and Collective Computation Circuits

8.6.1 Sigmoidal Characteristics
As Equation 8.5 illustrates, approximating a nonlinear function through a multilayer perceptron requires
the realization of sigmoidal functions, with arguments given as linear combinations of several variables.
The exact shape of the sigmodial is not critical for the approximation itself, although it may play an
important role in fitting [82]. Figure 8.35 depicts two shapes used in practice. Figure 8.35a, the hard
limiter, has an inner piece of large (ideally infinite) slope, while for Figure 8.35b, the soft limiter, this
slope is smaller and can be used as a fitting parameter.
Most amplifiers have large-signal transfer characteristics whose shape is a sigmoid or an inverted
sigmoid. We present only those circuits whose inputs are currents because this simplifies the circuitry
needed to obtain these inputs as linear combinations of other variables. The op-amp circuit of
Figure 8.36a realizes the soft limiter characteristics in transimpedance form. The center is set by the
input bias current and the slope through the resistor (b ¼ R). If the branch composed of the two Zener
diodes is eliminated, the saturation levels Eþ and E are determined through the internal op-amp
circuitry, inappropriate for accurate control. (Otherwise, they are determined through the Zener break-
down voltages.) On the other hand, Figure 8.36b also realizes the hard sigmoid in transimpedance
domain [58]. The output saturation levels for this structure are Eþ ¼ VTn and E ¼ jVTpj, where VTn and
VTp are the threshold voltages of the NMOS transistor and the PMOS transistor, respectively. To obtain
the output represented by a current, one can use voltage-to-current transformation circuits. References
[15,57,58] discuss simpler alternatives operating directly in current domain. For instance, Figure 8.36c
and d depicts circuits for the soft limiter characteristics and the hard limiter characteristics.
With regard to the calculation of the input to the sigmoid as a linear combination of variables, note
that the input node of all circuits in Figure 8.36 is virtual ground. Consequently, the input current can be
obtained as a linear combination of voltages or currents using the techniques for signal scaling and
aggregation presented in Section 8.3.
y y
Slope = β
E+ E+
0.0 δ x 0.0 x
δ
–E– –E–
(a) (b)
FIGURE 8.35 Typical sigmoidal shapes: (a) hard limiter; (b) soft limiter.
ii ii
R
– –
+ vo + vo
δ δ
(a) (b)
IB
IB IB IB IB
ii +– io –
A
ii +
io
IB
(c) (d)
FIGURE 8.36 Realization of sigmoidal characteristics with input current: (a) transimpedance soft limiter;
(b) transimpedance hard limiter; (c) and (d) soft and hard limiters in current transfer domain.
8.6.2 Bell-Like Shapes

The exact shapes of Equations 8.16 and 8.17 involve the interconnection of squarers, together with blocks
to elevate to power, and exponential blocks—all realizable using techniques previously discussed in this
chapter. However, these exact shapes are not required in many applications, and can be approximated
using simpler circuits. Thus, let us consider the differential amplifier of Figure 8.32, and define vi ¼ vx,
IB ¼ iy, and io ¼ iz for convenience. The expressions for the large-signal transconductance displayed along
with the figures show that they are sigmoids with saturation levels at IB and IB. They are centered at
vi ¼ 0, with the slope at this center point given by Equation 8.39. The center can be shifted by making
vi ¼ vxþ and d ¼ vx.
Similar to the differential amplifier, most OTAs exhibit sigmoid-like characteristics under large-signal
operation, exploitable to realize nonlinear functions [19,37,56,61,71]. This may rely on the mathematical
techniques behind multilayer perceptrons, or on those behind RBF and fuzzy interpolation.
Figure 8.37a obtains a bell-shaped transconductance through a linear, KCL combination of the two
sigmoidal characteristics, one of negative slope and the other of positive slope. The width and center of
the bell (see Figure 8.7) are given respectively by
d2 þ d1
2s ¼ d2 d1 , d¼ (8:41)
2
controlled by the designer. The slope of the bell at the cross-over points is also controlled through the
transconductance of the OTAs.
For simpler circuit realizations, this technique can be used directly with differential amplifiers, as
shown in Figure 8.37b. The differential output current provided by the circuit can be transformed into a
i2 i1
IB IB
δ2 0.0 0.0 δ1
kvi kvi
δ2 – i2 –IB –IB i1 + δ1
gm gm
vi + – vi
io = i1 + i2
(a)
io+ io–
i1+ i1– i2+ i2–
δ1 δ2
vi k
IB IB
(b)
FIGURE 8.37 Transconductance circuits for bell-shaped function: (a) using OTAs; (b) using differential amplifiers.
unilateral one using a p-channel current mirror. Equation 8.41 also applies for this circuit, and the slope
at the cross-overs is
pffiffiffiffiffiffiffi kIB
slopeMOST ¼ k bIB , slopeBJT ¼ (8:42)
4Ut
Note that the control of this slope through the bias current changes the height of the bell. It motivates the
use of a voltage gain block in Figure 8.37. Thus, the slope can be changed through its gain parameter k.
The slope can also be changed through b for the MOSTs. Practical realizations of this concept are found
in Refs. [4,71,74]. The voltage amplifier block can be realized using the techniques presented in this
chapter. Simpler circuits based on MOS transistors are found in Ref. [53].
8.6.3 Collective Computation Circuitry

RBF and fuzzy inference require multidimensional operators to calculate radial distances in the case of
RBF, and to normalize vectors and calculate T-norms in the case of fuzzy inference. These operators can
be expressed as the interconnection of the nonlinear blocks discussed previously, or realized in a simpler
manner through dedicated collective computation circuitry. Most of these circuits operate intrinsically in
current domain and are worth mentioning because of this simplicity and relevance for parallel informa-
tion processing systems.
8.6.3.1 Euclidean Distance

Figure 8.38 [38] presents a current-mode circuit to compute
sffiffiffiffiffiffiffiffiffiffiffiffiffiffi
X
iy ¼ i2xk (8:43)
k¼1,P
(1) (4/P)
(2(P + 1)/P)
iy
ix1 ix2 ixP
FIGURE 8.38 CMOS self-biased Euclidean distance circuit. (From Landolt, O., Vittoz, E., and Heim, P., Electr.
Lett., 28, 352, 1992. With permission.)
i1 i1 i2 i2 iP iP i1 i1 i2 i2 iP iP
1 1
IB IB
(a) (b)
FIGURE 8.39 Current-mode normalization circuits: (a) BJT; (b) CMOS.
based on the square-law of MOS transistors in the saturation region. If the current ik at each terminal is
shifted through a bias current of value dk, the circuit serves to compute the Euclidean distance between
the vector of input currents and the vector d.
8.6.3.2 Normalization Operation

Figure 8.39 depicts circuits to normalize an input current vector, for the BJT [23] and the CMOS [74] cases,
respectively. Their operation is based on KCL and the current mirror principle. Kirchhoff’s circuit law
forces the sum of the output currents at node A to be constant. On the other hand, the current mirror
operation forces a functional dependency between each pair of input and output currents. Thus, they obtain
ik
ik P (8:44)
ij
j¼1,P
for each current component.
8.6.3.3 T-Norm Operator

The calculation of the minimum of an input vector x is functionally equivalent to obtaining the
complement of the maximum of the complements of its components. Figure 8.40a illustrates a classical
approach used in analog computation to calculate the maximum of an input vector x. It is based on the
following steady-state equation:
X
y þ u1 (A(xk y)) ¼ 0 (8:45)
k¼1,P
–
x1 +
Σ A u–1
+ –
x2 Σ A u–1 Σ y
– ix1+IB ix2 + IB ixP + IB Vref

+
xP Σ A u–1
iy + IB
M12 M22 MP2
M11 vG
+
– M21 MP1
ID
(a) (b)
FIGURE 8.40 Concept for maximum operator and current-mode realization. (a) A classical approach used in
analog computation to calculate the maximum of an input vector. (b) A CMOS current-mode realization.
where A is large. This concept can be realized in practice using OTAs, op-amps, or diodes. Both of these
have voltage input and output. Alternatively, Figure 8.40b shows a CMOS current-mode realization [74].
In this circuit the maximum current determines the value of the common gate voltage, vG. The only input
transistor operating in the saturation region is that which is driven by maximum input current; the rest
operate in the ohmic region.
8.7 Extension to Dynamic Systems

A dynamic system with state vector x and dynamics represented as
dxk
Tk ¼ fk (X), 1kP (8:46)
dt
can be mapped on the block diagram of Figure 8.41a, and realized by the interconnection of nonlinear
resistive blocks and integrators. This approach is similar to that followed in classical analog computation
R
vi – τ = RC
io + vo
f1(·) ∫
vi +
gm vo
– io τ = C/gm
C
f2(·) ∫
io
≈
≈
Y
+ CCII Z vo
X C
fP(·) ∫ vi τ = RC
x1 x2 xP – G = R–1
(a) (b)
FIGURE 8.41 Conceptual state-variable block diagram of dynamic systems integrator circuits. (a) Block diagram
realized by the interconnection of nonlinear resistive blocks and integrators. (b) Several integrated circuits.
[26] and has integrators as key components. Figure 8.41b illustrates several integrator circuits. Combin-
ing these circuits with the circuitry for nonlinear functions provides systematic approaches to synthesize
nonlinear dynamic systems based on the approximations presented in this chapter [56]. On the other
hand, Rodríguez-Vázquez and Delgado-Restituto [57] discuss related techniques to synthesize nonlinear
systems described by finite-difference equations.
Appendix A: Catalog of Primitives

Figure 8.42 outlines our catalog of primitive components, all of which are available off-the-shelf, and,
depending on the fabrication technology, can be realized on a common semiconductor substrate [44].
Generally, the catalog differs between individual technologies; for instance, no npn-BJTs are available in a
CMOS n-well technology. The use of linear capacitors may appear surprising because we constrain
ourselves to cover only static characteristics. However, we will not exploit their dynamic i–v relationship,
but instead their constitutive equation in the charge–voltage plane, which is algebraic.
+ + +
i v v = Ri i v i = Is (ev/Ut – 1) v, q q = cv
– – –
C i
+
ic ic = Is (evbe /Ut – evbc /Ut) v=0 c = 1D
B
v
Is v /v I C i=0 c = 0D
ib = (e be t – 1) + s (evbc /vt – 1)
ib E βF βR –
iD = 0 |vGS| < |VT|

iD
D vDS
iD = β(vGS – VT – 2
)vDS |vDS| < |vGS| – |VT| |vGS| > |VT|
G
B iD =
β
(vGS – VT)2 |vDS| > |vGS| – |VT| |vGS| > |VT|
2
S
VT = VTo + γ (√2| p| + vSB – √2| p|)
i– i–
v+ = v–
v– – i+ = i– = 0 v– – vo
v+ i+ = i– = 0
v+
+ io = gm = (v+ – v–) +
io
io io ≠ f (vo)
i+ i+
Y 1D va > 0
iy –
Z 0 0 0 vy – vo
vx va vo =
CCII = 1 0 0 ix
+ +
iz 0 ±1 0 vz 0D va < 0
X
FIGURE 8.42 Section catalog of primitive circuit components.

Appendix B: Value and Slope Hermite Basis Functions
δ0 ≤ x ≤ δ1
(δ1 – x)/Δ0
I0(x) =
0 δ1 ≤ x ≤ δN+1
1.0
δ0 ≤ x ≤ δN+1
0
(x – δi–1)/Δi–1 δi–1 ≤ x ≤ δi
Ii(x) =
0.5 (δi+1 – x)/Δi δi ≤ x ≤ δi+1
0
δi+1 ≤ x ≤ δN+1
δN ≤ x ≤ δN+1
(x – δN)/ΔN
0.0 IN+1(x) =
0 δ0 ≤ x ≤ δN
δ0 δ1 δi–1 δi δi+1 δN δN+1 x
(a)
2
3 δ0 ≤ x ≤ δ1
v0(x) = 1 – 2β 0 + 3β 0
0 δ1 ≤ x ≤ δN+1
1.0
0 δ0 ≤ x ≤ δN+1
1 – 3α2i – 2α3i δi–1 ≤ x ≤ δi
vi(x) =
0.5 1 – 3β2i – 2β3i δi ≤ x ≤ δi+1
0 δi+1 ≤ x ≤ δN+1
2 3 δN ≤ x ≤ δN+1
0.0 vN+1(x) = 1 – 3α N+1 – 2α N+1 δ0 ≤ x ≤ δN
0
δ0 δ1 δi–1 δi δi+1 δN δN+1 x
0.5 2 δ0 ≤ x ≤ δ1
s0(x) = Δ0 β0 (1 – β0)
0 δ1 ≤ x ≤ δN+1
0 δ0 ≤ x ≤ δN+1
Δi–1αi (1 + αi)2 δi –1 ≤ x ≤ δi
0.0 δN+1 si(x) =
Δi βi (1 – βi)2 δi ≤ x ≤ δi+1
δ0 δ1 δi–1 δi δi+1 δN x 0
δi+1 ≤ x ≤ δN+1
ΔN αN+1(1 + αN+1)2 δN ≤ x ≤ δN+1

sN+1(x) =
0 δ0 ≤ x ≤ δN
–0.5
Δi = δi+1 – δi αi = (x – δi)/Δi –1 βi = (x – δi)/Δi

(b)
FIGURE 8.43 Hermite basis functions: (a) PWL case; (b) PWC case.
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9
Representation,
Approximation,
and Identification
9.1 Introduction ................................................................................ 9-1
9.2 Representation ............................................................................ 9-2
Differential Equation and State-Space Representations .
Input–Output Representation . Volterra Series Representation
9.3 Approximation ......................................................................... 9-10
Best Approximation of Systems (Operators) . Best (Uniform)
Approximation of Signals (Functions) . Best Approximation
of Linear Functionals . Artificial Neural
Network for Approximation
9.4 Identification ............................................................................. 9-26
Linear Systems Identification . Nonlinear Systems
Identification . Nonlinear Dynamic Systems
Guanrong Chen Identification from Time Series
City University of Hong Kong References ............................................................................................ 9-31
9.1 Introduction
Representation, approximation, and identification of physical systems, linear or nonlinear, deterministic
or random, or even chaotic, are three fundamental issues in systems theory and engineering. To describe
a physical system, such as a circuit or a microprocessor, we need a mathematical formula or equation
that can represent the system both qualitatively and quantitatively. Such a formulation is what we call
a mathematical representation of the physical system. If the physical system is so simple that the
mathematical formula or equation, or the like, can describe it perfectly without error, then the repre-
sentation is ideal and ready to use for analysis, computation, and synthesis of the system. An ideal
representation of a real system is generally impossible, so that system approximation becomes necessary
in practice. Intuitively, approximation is always possible. However, the key issues are what kind of
approximation is good, where the sense of ‘‘goodness’’ must first be defined, of course, and how to find
such a good approximation. On the other hand, when looking for either an ideal or a approximate
mathematical representation for a physical system, one must know the system structure (the form of the
linearity or nonlinearity) and parameters (their values). If some of these are unknown, then one must
identify them, leading to the problem of system identification.
This chapter is devoted to a brief description of mathematical representation, approximation, and
identification of, in most cases, nonlinear systems. As usual, a linear system is considered to be a special
case of a nonlinear system, but we do not focus on linear systems in this chapter on nonlinear circuits. It is
9-1
known that a signal, continuous or discrete, is represented by a function of time. Hence, a signal can be
approximated by other functions and also may be identified using its sampled data. These are within the
context of ‘‘representation, approximation, and identification,’’ but at a lower level—one is dealing
with functions. A system, in contrast, transforms input signals to output signals, namely, maps functions
to functions, and is therefore at a higher level—it can only be represented by an operator (i.e., a mapping).
Hence, while talking about representation, approximation, and identification in this chapter, we essentially
refer to operators. However, we notice that two systems are considered to be equivalent over a set of input
signals if and only if (iff) they map the same input signal from the set to the same output signal, regardless
of the distinct structures of the two systems. From this point of view, one system is a good approximation
of the other if the same input produces outputs that are approximately the same under certain measure.
For this reason, we also briefly discuss the classical function approximation theory in this chapter.
The issue of system representation is addressed in Section 9.2, while approximation (for both operators
and functions) is discussed in Section 9.3, leaving the system identification problem to Section 9.4.
Limited by space, we can discuss only deterministic systems. Topics on stochastic systems are hence
referred to some standard textbooks [13,17].
It is impossible to cover all the important subjects and to mention many significant results in the field
in this short and sketchy chapter. The selections made only touch upon the very elementary theories,
commonly used methods, and basic results related to the central topics of the chapter, reflecting the
author’s personal preference. In order to simplify the presentation, we elected to cite only those closely
related references known to us, which may or may not be the original sources. From our citations, the
reader should be able to find more references for further reading.
9.2 Representation
The scientific term ‘‘representation’’ as used here refers to a mathematical description of a physical
system. The fundamental issue in representing a physical system by a mathematical formulation, called a
mathematical model, is its correct symbolization, accurate quantization, and strong ability to illustrate
and reproduce important properties of the original system.
A circuit consisting of some capacitor(s), inductor(s), and=or resistors(s), and possibly driven by a
voltage source or a current source, is a physical system. In order to describe this system mathematically
for the purpose of analysis, design, and=or synthesis, a mathematical model is needed. Any mathematical
model, which can correctly describe the physical behavior of the circuit, is considered a mathe-
matical representation of the circuit. A lower level mathematical representation of a circuit can, for
instance, be a signal flow chart or a circuit diagram like the nonlinear Chua’s circuit shown in Figure 9.1,
which is discussed next.
A circuit, such as that shown in Figure 9.1, can be used to describe a physical system, including its
components and its internal as well as external connections. However, it is not convenient for carrying
out theoretical analysis or numerical computations. This is because no qualitative or quantitative
description exists about the relations among the
circuit elements and their dynamic behavior.
Hence, a higher level mathematical model is needed
R to provide a qualitative and quantitative represen-
iL
+ + tation of the real physical circuit.
Vc2 C2 L Vc1 C1 N Among several commonly used mathematical
– – modeling approaches for various physical systems,
differential equations, state-space formulations, I–O
mappings, and functional series (particularly, the
Volterra series) are the most important and useful,
FIGURE 9.1 Chua’s circuit. which have been very popular in the field of circuits
Representation, Approximation, and Identification 9-3
and systems engineering. In the following, we introduce these mathematical representation methods,
along with some brief discussions of other related issues. Limited by space, detailed derivations are
omitted.
9.2.1 Differential Equation and State-Space Representations

Mathematical modeling via differential equations and via state-space descriptions are the most basic
mathematical representation methods. We illustrate the concept of mathematical modeling and the two
representation methods by a simple, yet representative example: the nonlinear circuit in Figure 9.1. This
circuit consists of one inductor L, two capacitors C1 and C2, one linear resistor R, and one nonlinear
resistor, N, which is a nonlinear function of the voltage across its two terminals: N ¼ N(VC1(t)). Let iL(t)
be the current through the inductor L, and Vc1(t) and Vc2(t) be the voltages across C1 and C2, respectively.
For the time being, let us remove the nonlinear resistor N from Figure 9.1 and consider the remaining
linear circuit. This nonlinear resistor N is readded to the circuit with detailed discussions in Equation 9.6.
For this linear circuit without the resistor N, it follows from Kirchhoff’s laws that
d 1
C1 VC1 (t) ¼ ½VC2 (t) VC1 (t) (9:1)
dt R
d 1
C2 VC (t) ¼ ½VC1 (t) VC2 (t) þ iL (t) (9:2)
dt 2 R
d
L iL (t) ¼ VC2 (t) (9:3)
dt
By simple calculation we can eliminate both Vc2(t) and iL, leaving a single ordinary differential equation
on the unknown voltage Vc1(t) as follows:

d3 1 1 1 d2 1 d 1
VC (t) þ þ VC (t) þ VC (t) þ VC (t) ¼ 0 (9:4)
dt 3 1 R C1 C2 dt 2 1 C2 L dt 1 C1 C2 RL 1
Once Vc1(t) is obtained from Equation 9.4, based on certain initial conditions, the other two unknowns,
Vc2(t) and iL, can be obtained by using Equations 9.1 and 9.3, successively. Hence, this third-order
ordinary differential equation describes both qualitatively and quantitatively the circuit shown in
Figure 9.1 (without the nonlinear resistor N). For this reason, Equation 9.4 is considered to be a
mathematical representation, called a differential equation representation, of the physical linear circuit.
Very often, a higher-order, single-variable ordinary differential equation similar to Equation 9.4 is not
as convenient as a first-order multivariable system of ordinary differential equations as is the original
system of Equations 9.1 through 9.3, even when an analytic formulation of the solution is desired. Hence,
a more suitable way for modeling a physical system is to introduce the concept of system state variables,
which leads to a first-order higher dimensional system of ordinary differential equations.
If we introduce three state variables in Equations 9.1 through 9.3:
x1 (t) ¼ VC1 (t), x2 (t) ¼ VC2 (t), x3 (t) ¼ iL (t)
then we can rewrite those equations in the following vector form:

_ ¼ Ax(t) þ Bu(t),
x(t) t0
(9:5)
x(0) ¼ x0
with an initial value x0 (usually given), where
2 3
1 1
0
2 3 6 RC1 RC1 7
x1 (t) 6 7
6 1 1 7
x(t) ¼ 4 x2 (t) 5 and A¼6
6
1 7
x3 (t) 6 RC2 RC2 C2 7
7
4 1 5
0 0
L
in which x(t) is called the state vector of the system. Here, to be more general and for convenience in the
discussions following, we formally added the term Bu(t) to the system, in which B is a constant matrix
and u(t) is called the control input of the system. In the present case, of course, u ¼ 0 and it is not
important to specify B. However, note that u can be a nonzero external input to the circuit [19], which is
discussed in more detail below.
This first-order, vector-valued linear ordinary differential equation is equivalent to the third-order
differential equation representation (Equation 9.4) of the same physical circuit. A special feature of this
state vector formulation is that with different initial state vectors and with zero control inputs, all the
possible system state vectors together constitute a linear space of the same dimension [31]. Hence,
Equation 9.5 is also called a linear state-space representation (or, a linear state-space description) for the
circuit.
A few important remarks are in order. First, if the circuit is nonlinear, its state vectors do not constitute
a linear space in general. Hence, its mathematical model in the state vector form should not be called a
‘‘state-space’’ representation. Note, however, that some of the linear system terminology such as state
variables and state vectors usually make physical sense for nonlinear systems. Therefore, we use the term
nonlinear state-variable representation to describe a first-order, vector-valued nonlinear ordinary differ-
ential equation of the form x(t) ¼ f(x(t), u(t), t), where f(, , t) is generally a vector-valued nonlinear
function. This is illustrated in more detail shortly.
Second, a linear state-space representation for a given physical system is not unique because one can
choose different state variables. For example, in Equations 9.1 through 9.3 if we instead define x1 ¼ Vc2(t)
and x2 ¼ Vc1(t), we arrive at a different linear state-space representation of the same circuit. However, we
should note that if a linear nonsingular transformation of state vectors can map one state-space
representation to another, then these two seemingly different representations are actually equivalent in
the sense that the same initial values and control inputs will generate the same outputs (perhaps in
different forms) through these two representations. Also worth noting is that not every circuit element
can be used as a state variable, particularly for nonlinear systems. A basic requirement is that all the
chosen state variables must be ‘‘linearly independent’’ in that the first-order, vector-valued ordinary
differential equation has a unique solution (in terms of the control input) for any given initial values of
the chosen state variables.
Finally, because A and B in the state-space representation (Equation 9.5) are both constant (inde-
pendent of time), the representation is called a linear time-invariant system. If A or B is a matrix-valued
function of time, then it will be called a linear time-varying system. Clearly, a time-invariant system is a
special case of a time-varying system.
Now, let us return to the nonlinear circuit, with the nonlinear resistor N being connected to the
circuit, as illustrated in Figure 9.1. Similar to Equations 9.1 through 9.3, we have the following circuit
equations:
d 1
C1 VC (t) ¼ ½VC2 (t) VC1 (t) N ðVC1 (t)Þ (9:6)
dt 1 R
d 1
C2 VC (t) ¼ ½VC1 (t) VC2 (t) þ iL (t) (9:7)
dt 2 R
d
L iL (t) ¼ VC2 (t) (9:8)
dt
Note that if the nonlinear resistor N is given by
N ðVC1 (t)Þ ¼ N ðVC1 (t); m0 , m1 Þ

1
¼ m0 VC1 (t) þ ðm1 m0 Þ VC1 (t) þ 1 VC1 (t) 1 (9:9)
2
with m0 < 0 and m1 < 0 being two appropriately chosen constant parameters, then this nonlinear circuit
is the well-known Chua’s circuit [24].
It is clear that compared with the linear case, it would be rather difficult to eliminate two unknowns,
particularly Vc1(t), in order to obtain a simple third-order, nonlinear differential equation that describes the
nonlinear circuit. That is, it would often be inconvenient to use a higher-order, single-variable differential
equation representation for a nonlinear physical system in general. By introducing suitable state variables,
however, one can easily obtain a nonlinear state-variable representation in a first-order, vector-valued,
nonlinear differential equation form. For instance, we may choose the following state variables:
xðtÞ ¼ VC1 (t), y(t) ¼ VC2 (t), and z(t) ¼ RiL (t) with t ¼ t=RC2
where the new variable z(t) ¼ RiL(t) and the rescaled time variable t ¼ t=RC2 are introduced to simplify
the resulting representation of this particular circuit. Under this nonsingular linear transform, the
previous circuit equations are converted to the following state-variable representation:
8
> _ ~
¼ p x(t) þ y(t) N(x(t))
<x(t)
y_ (t) ¼ x(t) y(t) þ z(t) (9:10)
>
:
z_ (t) ¼ qy(t)
where
p ¼ C2=C1
q ¼ R2C2=L
and
~
N(x(t)) ~ 0, m
¼ N ðx(t); m ~ 1Þ
1

¼m~ 0 x(t) þ (m ~ 0 ) x(t) þ 1 x(t) 1
~1 m (9:11)
2
with m ~ 0 ¼ Rm0 and m ~ 1 ¼ Rm1.
It is easy to see that this state-variable representation can be written as a special case in the following
form, known as a canonical representation of Chua’s circuit family:
X
k
_
x(t) ¼ a þ Ax(t) þ hT xðtÞ bi ci þ BuðtÞ (9:12)
i
i¼1
~1m
namely, with a ¼ 0, k ¼ 2, h1 ¼ h2 ¼ [1 0 0]T, b1 ¼ b2 ¼ 1, c1 ¼ c2 ¼ H(m ~ 0), Bu(t) being a
possible control input to the circuit [19], and
2 3
~0 p p 0
m
A¼4 1 1 1 5
0 q 0
i (ξ, t) The canonical (piecewise-linear) representation

given by Equation 9.12 describes a large class of
+ +
R circuits that have very rich nonlinear dynamics
+ [25,55].
v (ξ, t) VC1 C1 N Now, we return to Equations 9.6 through 9.8 and
–
Figure 9.1. If we replace the L C2 part of Chua’s
– – circuit by a lossless transmission line (with the
spatial variable j) of length l terminated on its left-
0 ξ l
hand side (at j ¼ 0) by a short circuit, as depicted in
FIGURE 9.2 Time-delayed Chua’s circuit.
Figure 9.2, then we obtain a time-delayed Chua’s
circuit [89]. This circuit has a partial differential
equation representation of the form:
8
> @v=@j ¼ L@iðj, t Þ=@t
>
>
<@i(j, t)=@j ¼ C @vðj, t Þ=@t
1
(9:13)
>
> vð0, t Þ ¼ 0
>
:
iðl, t Þ ¼ N ðvðl, t Þ e Riðl, t ÞÞ þ C1 @ ½vðl, t Þ Riðl, t Þ=@t
where v(j, t) and i(j, t) are the voltage and current, respectively, at the point j 2 [0, l] at time t, and
Vc1 ¼ e > 0 is a constant, with the nonlinear resistor N satisfying

m0 ðVC1 eÞ VC e < 1
N ðVC1 eÞ ¼ 1
m1 ðVC1 eÞ ðm1 m0 ÞsgnðVC1 eÞ VC e 1
1
In general, systems that are described by (linear or nonlinear) partial differential equations, with initial-
boundary value conditions, are studied under a unified framework of (linear or nonlinear) operator
semigroup theory, and are considered to have an infinite-dimensional system representation [7].
9.2.2 Input–Output Representation

A state-variable representation of a nonlinear physical system generally can be written as

_ ¼ f ðx(t), u(t), t Þ, t 0
x(t)
(9:14)
x(0) ¼ x0
where
f(, , t) is a nonlinear, vector-valued function
x0 is a (given) initial value for the state vector x at t ¼ 0
u is a control input to the system
Because not all state variables in the state vector x can be measured (observed) in a physical system, let
us suppose that what can be measured is only part of x, or a mixture of its components, expressed by a
vector-valued function of x in the form
y(t) ¼ gðx(t), t Þ, t 0 (9:15)
where
y is called a (measurement or observation) output of the physical system
g is in general a lower dimensional vector-valued nonlinear function
.
u x x y
f (·, ·, t) ∫ g(·, t)
FIGURE 9.3 System I–O relationship.
As a particular case, g can be linear or, even more so, be g(x(t), t) ¼ x(t) when all the components of the
state vector are directly measurable.
If both f ¼ f(x(t), u(t)) and g ¼ g(x(t)) are not explicit functions of the independent time variable t, the
corresponding state-variable representation (Equations 9.14 and 9.15) is said to be autonomous.
It is clear that with both the system input u and output y, one can simply represent the overall physical
system by its input-output (I–O) relationship, as illustrated in Figure 9.3.
Now, under certain mild conditions on the nonlinear function f, for a given control input u, and an
initial value x0, the state-variable representation (Equation 9.14) has a unique solution, x, which depends
on both u and x0. If we denote the solution as
x(t) ¼ ^(t; u(t), x0 ) (9:16)
where ^ is called an input-state mapping, then the overall I–O relationship shown in Figure 9.3 can be
formulated as
y(t) ¼ g(^(t; u(t), x0 ), t) (9:17)
This is an I–O representation of the physical system having the state-variable representation (Equations
9.14 and 9.15).
As a simple example, let us consider the linear state-space representation (Equation 9.5), with a
special linear measurement equation of the form y(t) ¼ Cx(t), where C is a constant matrix. It is well
known [31] that
8 9
< ðt =
y(t) ¼ C^(t; u(t), x0 ) ¼ C etA x0 þ eðttÞA Bu(t)dt , t0 (9:18)
: ;
0
yielding an explicit representation formula for the I–O relationship of the linear circuit (together with the
assumed measurement equation).
Note that because the state-variable representation (Equation 9.14) is not unique, as mentioned
previously, this I–O representation is not unique in general. However, we note that if two state-variable
representations are equivalent, then their corresponding I–O relationships also will be equivalent.
It is also important to note that although the above I–O relationship is formulated for a finite-
dimensional open-loop system, it can also be applied to infinite-dimensional [7] and closed-loop systems
[39]. In particular, similar to linear systems, many finite-dimensional, closed-loop nonlinear systems
possess an elegant coprime factorization representation. The (left or right) coprime factorization repre-
sentation of a nonlinear feedback system is a general I–O relationship that can be used as a fundamental
framework, particularly suitable for studies of stabilization, tracking, and disturbance rejection. The
problem is briefly described as follows. Let a nonlinear system (mapping) P be given, not necessarily
stable, and assume that it has a right-coprime factorization P ¼ ND1, where both N and D are stable
(D1 usually has the same stability as P). One is looking for two stable, nonlinear subsystems (mappings),
+
B–1 P
–
FIGURE 9.4 Right-coprime factorization of a nonlinear feedback system.
A and B1, representing feedback and feed-forward controllers, respectively, satisfying the Bezout
identity
AN þ BD ¼ I
which are connected as shown in Figure 9.4, where B is also stable. If two controllers, A and B, can be
found to satisfy such conditions, then even with an unstable P, the resulting closed-loop control system
will be I–O, as well as internally, stable. In this sense, A and B together stabilize P.
For the left-coprime factorization, one simply uses formulas P ¼ D1N and NA þ DB ¼ I instead and
interchanges the two blocks of A and B1 in Figure 9.4.
Taking into account causality and well-posedness of the overall closed-loop system, it is a technical
issue as to how to construct the four subsystems A, B, D, and N, such that the preceding requirements can
be satisfied. Some characterization results and construction methods are available in the literature
[38,45,51,95].
9.2.3 Volterra Series Representation

Recall from the fundamental theory of ordinary differential equations that an explicit I–O representation
of the overall system still can be found, even if the linear state-space representation (Equation 9.5) is time
varying, via the state transition matrix F(t, t) determined by
8
>
< d Fðt, tÞ ¼ A(t)F(t, t), tt
dt (9:19)
>
:
F(t, t) ¼ I
where I is the identity matrix. The formula, for the simple case y(t) ¼ C(t)x(t), is
8 9
< ðt =
y(t) ¼ C(t) F(t, 0)x0 þ F(t, t)B(t)u(t)dt , t0 (9:20)
: ;
0
For linear time-invariant systems, we actually have F(t, t) ¼ e(tt)A, so that Equation 9.20 reduces to the
explicit formula (Equation 9.18).
For a nonlinear system, a simple explicit I–O representation with a single integral of the form
(Equation 9.18 or Equation 9.20) is generally impossible. A natural generalization of such an integral
formulation is the Volterra series representation. For simplicity, let us consider the one-dimensional case
in which y(t) ¼ g(x(t), t) ¼ x(t) below. A Volterra series representation for a nonlinear I–O relationship
^(), convergent in some measure, is an infinite sum of integrals in the following form:
ðt ðt tð2
^(t, u(t)) ¼ f0 (t; x0 ) þ f1 (t, t1 )u(t1 )dt1 þ þ fn (t, t1 , . . . , tn )u(t1 ) u(tn )dt1 dtn þ
0 0 0
(9:21)
where {fn}1 n ¼ 0 are called the Volterra kernels of the series. Here, we note that this Volterra series
representation can be extended easily to higher-dimensional systems.
For some representations ^, the corresponding Volterra series may have only finitely many nonzero
terms in the above infinite sum. In this case, it is called a Volterra polynomial, which does not have
convergence problem for bounded inputs, provided that all the integrals exist. In particular, when ^ is
affine (or linear, if initial conditions are zero, so that f0 ¼ 0), its Volterra series has at most two nonzero
terms, as given by Equations 9.18 and 9.20, and is called a first-order Volterra polynomial. In general,
however, the Volterra series (Equation 9.21) is an infinite sum. Hence, the convergence of a Volterra
series is a crucial issue in formulating such a representation for a given nonlinear I–O relationship
[5,12,59,85].
In order to state a fundamental result about the convergence of a Volterra series, we must first recall
that a mapping that takes a function to a (real or complex) value is called a functional and a mapping that
takes a function to another function is called an operator. A functional may be considered to be a special
operator if one views a value as a constant function in the image of the mapping. Clearly, the I–O
relationship (Equation 9.17) and the Volterra series (Equation 9.21), including Volterra polynomials, are
nonlinear operators. Recall also that an operator 7: X ! Y, where X and Y are normed linear spaces, is
said to be continuous at x 2 X if jjxn xjjx ! 0 implies jj7(xn) 7(x)jjy ! 0 as n ! 1. Note that for a
linear operator, if it is continuous at a point, then it is also continuous on its entire domain [34], but this
is not necessarily true for nonlinear operators.
As usual, we denote by C[0, T] and Lp[0, T], respectively, theÐ space of continuous functions
T
defined on [0, T] and the space of measurable functions f satisfying 0 j f(t)jpdt < 1 for 1 p < 1 or
supt2[0,T]jf(t)j < 1 for p ¼ 1. The following result [5] is an extension of the classical Stone–Weierstrass
theorem [22,36,40].
THEOREM 9.1
Let X be either C[0, T] or Lp[0, T], with 1 p < 1, and V be a compact subset in X. Then, for any
continuous operator ^: V ! Lq[0, T], where (1=p) þ (1=q) ¼ 1, and for any e > 0, a Volterra polynomial
Pn() exists, with n determined by e, such that
sup k^(x) Pn (x)jLq < «

x2V
In other words, Pn ! ^ uniformly on the compact subset V X as n ! 1.
In the literature, many variants of this fundamental convergence theorem exist under various condi-
tions in different forms, including the L1[0, T] case [45,59,84,85]. We may also find different methods
for constructing the Volterra kernels {fn}1n ¼ 0 for ^ [83]. In addition, specially structured Volterra series
representations abound for nonlinear systems, such as the Volterra series with finite memory [5],
approximately finite memory [86], and fading memory [10].
Finally, it should be mentioned that in a more general manner, a few abstract functional series
representations exist, including the generating power series representation for certain nonlinear systems
[48], from which the Volterra series can be derived. Briefly, an important result is the following theorem
[6,54,71,91].
THEOREM 9.2
Consider a nonlinear control system of the form

8
< Pm
_ ¼ g0 (x(t)) þ
x(t) gk (x(t))uk (t), t 2 [0, T]
: k¼1
y(t) ¼ h(x(t))
where h() and { gi()}im¼ 0 are sufficiently smooth functionals, with an initial state x0. If the control inputs
satisfy max0 t T juk(t)j < 1, then the corresponding output of this nonlinear system has a convergent
functional series of the form
X
1 X
m ðt
y(t) ¼ h(x0 ) þ Lgk0 Lgki h(x0 ) djki djk0 (9:22)
i¼0 k0 ,...,k1 ¼0
0
where Lgh(x0): ¼ [@h=@x]g(x)jx ¼ x0 and jk are defined by
ðt
j0 ðt Þ ¼ t jk ðt Þ ¼ uk ðtÞdt, k ¼ 1, . . . , m
0
with the notation
ðt ðt ðt
djki djk0 : ¼ djki (t) djki1 djk0
0 0 0
Note that in order to guarantee the convergence of the functional series (Equation 9.22), in many cases it
may be necessary for T to be sufficiently small.
Analogous to the classical Taylor series of smooth functions, a fairly general series representation for
some nonlinear systems is still possible using polynomial operators, or the like [90]. As usual, however,
the more general the presentation is, the less concrete the results. Moreover, a very general series
expansion is likely to be very local, and its convergence is difficult to analyze.
9.3 Approximation
The mathematical term ‘‘approximation’’ used here refers to the theory and methodology of function
(functional or operator) approximation. Mathematical approximation theory and techniques are import-
ant in engineering when one seeks to represent a set of discrete data by a continuous function, to replace
a complicated signal by a simpler one, or to approximate an infinite-dimensional system by a finite-
dimensional model, etc., under certain optimality criteria.
Approximation is widely used in system modeling, reduction, and identification, as well as in many
other areas of control systems and signal processing [32]. A Volterra polynomial as a truncation of the
infinite Volterra series (discussed earlier) serves as a good example of system (or operator) approxima-
tion, where the question ‘‘In what sense is this approximation good?’’ must be addressed further.
9.3.1 Best Approximation of Systems (Operators)

Intuitively, approximation is always possible. However, two key issues are the quality of the approxima-
tion and the efficiency of its computation (or implementation). Whenever possible, one would like to
have the best (or optimal) approximation, based on the available conditions and subject to all the
requirements.
A commonly used criterion for best (or optimal) approximations is to achieve a minimum norm
of the approximation error using a norm that is meaningful to the problem. Best approximations
of systems (operators) include the familiar least-squares technique, and various other uniform
approximations.
9.3.1.1 Least-Squares Approximation and Projections

Let us start with the most popular ‘‘best approximation’’ technique (the least-squares method), which can
also be thought of as a projection, and a special min–max approximation discussed in the Section 9.3.1.2.
Discrete data fitting by a continuous function is perhaps the best-known example of least-squares. The
special structure of Hilbert space, a complete inner-product space of functions, provides a general
and convenient framework for exploring the common feature of various least-squares approximation
techniques. Because we are concerned with approximation of nonlinear systems rather than functions, a
higher-level framework, the Hilbert space of operators, is needed. We illustrate such least-squares system
(or operator) approximations with the following two examples.
First, we consider the linear space, H, of certain nonlinear systems that have a convergent Volterra
series representation (Equation 9.21) mapping an input space X to an output space Y. Note that although
a nontrivial Volterra series is a nonlinear operator, together they constitute a linear space just like
nonlinear functions.
To form a Hilbert space, we first need an inner product between any two Volterra series. One way
to introduce an inner product structure into this space is as follows. Suppose that all the Volterra series,
^: X ! Y, where both X and Y are Hilbert spaces of real-valued functions, have bounded admissible
inputs from the set

V ¼ x 2 X kxkX g < 1g
For any two convergent Volterra series of the form (Equation 9.21), say ^ and &, with the corresponding
Volterra kernel sequences {fn} and {cn}, respectively, we can define an inner product between them via
the convergent series formulation
X1
rn
h^, &iH : ¼ fn cn
n¼0
n!
with the induced norm jj^jjH ¼ h^, î1=2

H , where the weights {rn} satisfy
X1
1 g2n
<1
r n!
n¼0 n
Recall also that a reproducing kernel Hilbert space H~ is a Hilbert space (of real-valued functions or
~ for each fixed x or y
operators) defined on a set S, with a reproducing kernel K(x, y), which belongs to H
in S and has the property
~ and 8x, y 2 S
hK(x, y), ^(y)iH~ ¼ ^(x) 8^ 2 H
Using the notation defined above, the following useful result was established [43,45] and is useful for
nonlinear systems identification (see Theorem 9.23).
THEOREM 9.3
The family of all the convergent Volterra series of the form (Equation 9.21) that maps the bounded input
set V to Y constitutes a reproducing kernel Hilbert space with the reproducing kernel
X1
1 1
K(x, y) ¼ hx, yinX , x, y 2 V X (9:23)
n¼0
n! rn
The reproducing kernel Hilbert space H defined above is called a generalized Fock space [46]. For the
special case in which rn 1, its reproducing kernel has a nice closed-form formula as an exponential
operator K(x, y) ¼ e(xy).
Now, suppose that a nonlinear system ^ is given, which has a convergent Volterra series represen-
tation (Equation 9.21) with infinitely many nonzero terms in the series. For a fixed integer n 0, if we
want to find an nth-order Volterra polynomial, denoted Vn*, from the Hilbert space H such that

^ Vn* ¼ inf V 2H ^ Vn k (9:24)
H n H
then we have a best approximation problem in the least-squares sense. To solve this optimization
problem is to find the best Volterra kernels {fk(t)}kn¼ 0 over all the possible kernels that define the
Volterra polynomial Vn, such that the minimization (Equation 9.24) is achieved.
Note that, if we view the optimal solution Vn* as the projection of ^ onto the (n þ 1)-dimensional
subspace of H, then this least-squares minimization is indeed a projection approximation. It is then clear,
even from the Hilbert space geometry (see Figure 9.5), that such an optimal solution, called a best
approximant, always exists due to the norm-completeness of Hilbert space and is unique by the convexity
of inner product space.
As a second example, let H be a Hilbert space consisting of all the linear and nonlinear systems that
have an nth-order Taylor series representation of the form
X
n
Pn ( ) ¼ ak (t)Mk () ¼ a0 (t) þ a1 (t)()(t) þ þ an (t)()n (t) (9:25)
k¼0
where
Mk() : ¼ ()k is the monomial operator of degree k
{ak}nk¼0 are continuous real-valued functions satisfying certain conditions arising from some basic
properties of both the domain and the range of the operator
Suppose that the monomial operators {Mk}1 k¼0
H F
are orthogonal under the inner product of H.
Given an lth-order polynomial operator Pl with
al(t) 6¼ 0 almost everywhere, if for a fixed integer
n < l we want to find an nth-order polynomial
0 operator Pn* of the form (Equation 9.25) from H,
such that

kPl Pn* H ¼ inf Pn 2H kPl Pn H (9:26)
Vn*
(n + 1)-dimensional subspace of H then we have a best approximation problem
in the least-squares sense. To solve this opti-
FIGURE 9.5 Projection in a Hilbert space. mization problem is to find the best coefficient
functions {ak(t)}nk¼0 over all possible functions that define the polynomial operator Pn. Again, because the
optimal solution is the projection of Pl onto the (n þ 1)-dimensional subspace H of a Hilbert space to
which Pl belongs, it always exists and is unique.
We now state a general result of least-squares approximation for systems, which is a straightforward
generalization of the classical result of least-squares approximation for functions [22,36].
THEOREM 9.4
Let H be a Hilbert space of nonlinear operators, and let Hn be its n-dimensional subspace. Then, given an
^ 2 H, the least-squares approximation problem

^1n* ¼ inf 1 2H ^ 1n
H n n H
is always uniquely solvable, with the optimal solution given by
X
n
1*() ¼ h^, hk iH hk ()
k¼1
where {hk)}kn ¼ 1 is an orthonormal basis of Hn.
A more general setting is to replace the Hilber space H by a Banach space (a complete normed linear
space, such as L1 and L1, which may not have an inner product structure). This extension includes the
Hilbert space setting as a special case, but generally does not have so many special features. Even
the existence and uniqueness of best approximants cannot be taken for granted in general—not even
for the simpler case of best approximation of real-valued functions—if a Banach (non-Hilbert) space is
considered [73]. Nevertheless, the following result is still convenient to use [22].
THEOREM 9.5
Let B be a uniformly convex Banach space and V be a closed convex set in B. Then, for any given ^ 2 B, the
optimal approximation problem

^ v* ¼ inf ^ v
B v2V B
has a unique solution.
Here, a space (or subset) B is said to be uniformly convex if, for any e > 0, there exists a
kf jjB ¼ jjgjjB ¼ 1 and jj1=2( f þ g)jjB > 1 d together imply k f gjjB < e. Geometrically, a disk is uni-
formly convex while a triangle is only convex, but not uniformly so. It is then intuitively clear that for a
given point outside (or inside) a disk, only a single point exists in the disk that has the shortest distance to
the given point. However, this is not always true for a nonuniform case. In fact, a best approximation
problem in the general Banach space setting has either a unique solution or has infinitely many solutions
(if it is solvable), as can be seen from the next result [32].
THEOREM 9.6
Let V be a closed convex set in a Banach space B, and v*1 and v*2 be two optimal solutions of the best
approximation problem

^ v* ¼ inf ^ v
B v2V B
Then, any convex combination of v1* and v*2 in the form
v* ¼ av1* þ ð1 aÞv2*, 0a1
is also an optimal solution of the problem.
Usually, a best approximant (if it exists) for an optimal approximation problem in a Banach space is
also called a (minimal) projection of the given operator from a higher-dimensional subspace onto a
lower-dimensional subspace. In this extension, the projection has no simple geometric meaning of
‘‘orthonormality’’ due to the lack of an inner product structure. However, a projection operator with a
unity norm in the Banach space setting is a natural generalization of the orthonormal projection in the
Hilbert space framework.
9.3.1.2 Min–Max (Uniform) Approximation

It is clear from the least-squares approximation formulation that if the given nonlinear representation
(operator) ^ and the lower-order approximant (used to approximate ^) do not have the same structure
(the same type of series), then the least-squares approximation cannot be applied directly or efficiently.
To introduce another approach, we first recall that for two given normed linear spaces X and Y and for
a given bounded subset V of X, with 0 2 V, the operator norm of a nonlinear operator 1: V ! Y
satisfying 1(0) ¼ 0, can be defined as

1(x) 1(y)
y
1 ¼ supx,y2V x y (9:27)
x6¼y
x
Thus, given a norm-bounded nonlinear operator ^, representing a given physical system, we may
consider the problem of finding another norm-bounded nonlinear operator 1* from a certain class 1
of desired nonlinear operators (systems), not necessarily having the same structure as ^, to best
approximate ^ in the sense that

^ 1* ¼ inf12N ^ 1 (9:28)
For example, N can be the family of nth-order Volterra polynomilas or nth-order polynomial operators
discussed previously. Commonly used function spaces X and Y include the space of all continuous
functions, the standard Lp space (or lp for the discrete case), and the Hardy space Hp (for complex-
variable functions [32]), with 1 p 1.
Because the nonlinear operator norm defined by Equation 9.27 is a sup (max) norm and this
optimization is an inf (min) operation, the best approximation problem (Equation 9.28) is called a
min–max approximation. Note also that because the nonlinear operator norm (Equation 9.27) is defined
over all the bounded inputs in the set V, this approximation is uniform, and thus independent of each
individual input function of the set V. For this reason, this approximation is also called a uniform
approximation, indicating that the best approximant is the optimal solution over all input functions.
It should be noted that both existence and uniqueness of best approximation solutions to the min–max
approximation problem (Equation 9.28) must be investigated according to the choice of the operator
family N and the I–O spaces X and Y, which generally cannot be taken for granted, as previously
discussed.
An important and useful class of nonlinear operators which can be put into a Banach space setting
with great potential in systems and control engineering is the family of generalized Lipschitz operators
[45]. To introduce this concept, we first need some notation. Let X be a Banach space of real-valued
functions defined on [0, 1) and, for any f 2 X and any T[0, 1), define

f (t), t<T
[f ]T (t) ¼
0, t>T
Then, form a normed linear space Xe, called the extended linear space associated with X, by
n o

Xe ¼ f 2 X [ f ]T < 1, 8T < 1
X
For a subset D Xe, any (linear or nonlinear) operator &: D ! Ye satisfying

[&(x1 )]T [&(x2 )]T L [x1 ]T [x2 ]T , 8x1 , x2 2 D, 8T 2 [0, 1)
Y X
for some constant L < 1, is called a generalized Lipschitz operator defined on D. The least of such
constants L is given by the seminorm of the operator &:

[&(x1 )]T [&(x2 )]T
& : sup sup Y
T2[0,1) x1 ,x2 2D [x1 ]T [x2 ]T
[x1 ]T 6¼[x2 ]T X
and the operator norm of & is defined via this seminorm by

& ¼ &(x0 ) þ &
Lip Y
for an arbitrarily chosen and fixed x0 2 D. The following result has been established [45].
THEOREM 9.7
The family of generalized Lipschitz operators

Lip(D,Y e ) ¼ {&: D X e ! Y e & Lip < 1 on D}
is a Banach space.
Based on this theorem, a best approximation problem for generalized Lipschitz operators can be
similarly formulated, and many fundamental approximation results can be obtained. In addition,
generalized Lipschitz operators provide a self-unified framework for both left and right coprime
factorization representations of nonlinear feedback systems. Under this framework, the overall closed-
loop system shown in Figure 9.4 can have a causal, stable, and well-posed coprime factorization
representation, which can be applied to optimal designs such as tracking and disturbance rejection [45].
We now discuss briefly a different kind of min–max (uniform) approximation: the best Hankel norm
approximation, where the norm (Equation 9.27) is replaced by the operator norm of a Hankel operator
defined as follows [32,77]. Consider, for instance, the transfer function
H ðz Þ ¼ a0 þ a1 z1 þ a2 z2 þ
of a discrete time linear time-invariant system. The Hankel operator associated with this series is defined
as the infinite matrix
2 3
a0 a1 a2

6 a1 7
6 a2 7
Ga :¼ a ¼ 6 a2 7
ij 4 5
..
.
which is a linear operator on a normed linear space of sequences. The operator norm of Ga over the l2
space is called the Hankel norm of Ga.
One important feature of the Hankel operators is reflected in the following theorem [32,77].
THEOREM 9.8
An infinite Hankel matrix has a finite rank iff its corresponding functional series is rational (it sums up to a
rational function); and this is true iff the rational series corresponds to a finite-dimensional bilinear system.
Another useful property of Hankel operators in system approximation is represented in the following
theorem [28].
THEOREM 9.9
The family of compact Hankel operators is an M-ideal in the space of Hankel operators that are defined on
a Hilbert space of real-valued functions.
Here, a compact operator is one that maps bounded sets to compact closures and an M-ideal is a closed
subspace X of a Banach space Z such that X?, the orthogonal complemental subspace of X in Z, is the
range of the projection P from the dual space Z* to X? that has the property

f ¼ P(f ) þ f P(f ) 8f 2 Z*
The importance of the M-ideal is that it is a proximinal subspace with certain useful approximation
characteristics, where the proximinal property is defined as follows. Let L(X) and C(X) be the classes of
bounded linear operators and compact operators, respectively, both defined on a Banach space X. If every
+ 2 L(X) has at least one best approximant from C(X), then C(X) is said to be proximinal in L(X).
A typical result would be the following: for any 1 < p < 1, C(lp) is proximinal in L(lp). However, C(X) is
not proximinal in L(X) if X ¼ C [a, b], the space of continuous functions defined on [a, b], or X ¼ Lp[a, b]
for all 1 < p < 1 except p ¼ 2.
9.3.2 Best (Uniform) Approximation of Signals (Functions)

Best approximations of signals for circuits and systems are also important. For example, two (different)
systems (e.g., circuits) are considered to be equivalent over a set V of admissible input signals iff the same
input from V yields the same outputs through the two systems. Thus, the problem of using a system to
best approximate another may be converted, in many cases, to the best approximation problem for their
output signals.
A signal is a function of time, usually real valued and one-dimensional. The most general formulation
for best approximation of functions can be stated as follows. Let X be a normed linear space of real-
valued functions and V be a subset of X. For a given f in X but not in V, find a g* 2 V such that

f g* ¼ inf f g (9:29)
X g2V X
In particular, if X ¼ L1, l1, or H1, the optimal solution is the best result for the worst case.
If such a g* exists, then it is called a best approximant of f from the subset V. In particular, if
V1 V2 is a sequence of subspaces in X, such that [Vn ¼ X, an important practical problem is
to find a sequence of best approximants gn* 2 Vn satisfying the requirement (Equation 9.29) for each
n ¼ 1, 2, . . . , such that jjgn* g*jjX ! 0 as n ! 1. In this way, for each n, one may be able to construct a
simple approximant gn* for a complicated (even unknown) function f, which is optimal in the sense of the
min–max approximation (Equation 9.29).
Existence of a solution is the first question about this best approximation. The fundamental result is
the following [22,36].
THEOREM 9.10
For any f 2 X, a best approximant g* of f in V always exists, if V is a compact subset of X; or V is a finite-

dimensional subspace of X.
Uniqueness of a solution is the second question in approximation theory, but it is not as important as
the existence issue in engineering applications. Instead, characterization of a best approximant for a
specific problem is significant in that it is often useful for constructing a best approximant.
As a special case, the preceding best approximation reduces to the least-squares approximation if X is a
Hilbert space. The basic result is the following (compare it with Theorem 9.4, and see Figure 9.5).
THEOREM 9.11
Let H be a Hilbert space of real-valued functions, and let Hn be its n-dimenstional subspace. Then, given an
f 2 H, the least-squares approximation problem

f hn* ¼ inf h 2H f hn
H n n H
is always uniquely solvable, with the optimal solution given by
X
n
hn*(t) ¼ hf , hk iH hk (t)
k¼1
where {hk}nk ¼ 1 is an orthonormal basis of Hn.

Here, the orthonormal basis of Hn is a Chebyshev system, a system of functions which satisfy the Haar
condition that the determinant of the matrix [hi (tj)] is nonzero at n distinct points t1 < < nn in the domain.
Chebyshev systems include many commonly used functions, such as algebraic and trigonometric polynomials,
splines, and radial functions. Best approximation by these functions is discussed in more detail below.
We remark that the least-squares solution shown in Theorem 9.11 is very general, which includes the
familiar truncations of the Fourier series [36] and the wavelet series [29] as best approximation.
9.3.2.1 Polynomial and Rational Approximations

Let pn be the space of all algebraic polynomials pn(t) of degree not greater than n. For any continuous
function f(t) defined on [a, b], one is typically looking for a best approximant gn*pn* 2 pn for a fixed n,
such that

f pn*
L1 [a,b]
¼ min f pn L1 [a,b] (9:30)
pn 2pn
This is a best (min–max and uniform) algebraic polynomial approximation problem. Replacing the
P
algebraic polynomials by the nth-order trigonometrix polynomials of the form nk ¼ 0(ak cos(kt) þ bk
sin(kt)) changes the problem to the best trigonometric polynomial approximation, in the same sense as
the best algebraic polynomial approximation, for a given function f 2 C[p, p]. This can be much further
extended to any Chebyshev system, such as the radial basis functions and polynomial spline functions,
which are discussed later. According to the second part of Theorem 9.10, the best uniform polynomial
approximation problem (Equation 9.30) always has a solution that, in this case, is unique. Moreover, this
best approximant is characterized by the following important sign-alternation theorem. This theorem is
also valid for the best uniform approximation from any other Chebyshev system [22,36].
THEOREM 9.12
The algebraic polynomial p*n is a best uniform approximant of f 2 C[a, b] from pn iff there exist n þ 2 points
a t0 < < tnþ1 b such that

f (tk ) ¼ pn*(tk ¼ c(1)k f pn* L1 [a,b] , k ¼ 0, 1, . . . , n þ 1
where c ¼ 1 or 1.
An efficient Remes (exchange) algorithm is available for constructing such a best approximant [79].
Another type of function is related to algebraic polynomials: the algebraic rational functions of the
form rn,m(t) ¼ pn(t)=qm(t), which has finite values on [a, b] with coprime pn 2 pn and qm 2 pm. We denote
by Rn,m the family of all such rational functions, or a subset of them, with fixed integers n 0 and m 1.
Although Rn,m is not a compact set or a linear space, the following result can be established [22].
THEOREM 9.13
For any given function f 2 C [a, b], there exists a unique rn,m
* (t)2 Rn,m such that

* L1 [a,b] ¼ inf rn,m «Rn,m f rn,m L1[a,b]
f rn,m (9:31)
* (t) of Equation 9.31 is called the best uniform rational approximant of f(t) on
The optimal solution rn,m
[a, b] from Rn,m.
Note that the unique best rational approximant may have different expressions unless it is coprime, as
assumed previously. The following theorem [22] characterizes such a best approximant, in which we use
d(pn) to denote the actual degree of pn, 0 d(pn) n.
THEOREM 9.14
* ¼ pn*=qm* is a best uniform approximant of f 2 C [a, b] from Rn,m iff there exist s
A rational function rn,m
points a t1 < < ts b, with s ¼ 2 þ min{n þ d(qm), m þ d(pn)}, such that

f (tk ) rn,m * L1[a,b] ,
* (tk ) ¼ c(1)k f rn,m k ¼ 1, . . . , s
where c ¼ 1 or 1.
The Remes (exchange) algorithm [79] also can be used for constructing a best rational approximant.
An important type of function approximation, which utilizes rational functions, is the Padé approxi-
mation. Given a formal power series of the form
f (t) ¼ c0 þ c1 t þ c2 t 2 þ , t 2 [1, 1]
not necessarily convergent, the question is to find a rational function pn(t)=qm(t), where n and m are both
fixed, to best approximate f(t) on [1, 1], in the sense that

f (t) pn (t) ct l , t 2 [1, 1] (9:32)
qm (t)
for a ‘‘largest possible’’ integer l. It turns out that normally the largest possible integer is l ¼ n þ m þ 1. If
such a rational function exists, it is called the [n, m]th-order Padé approximant of f(t) on [1, 1]. The
following result is important [22].
THEOREM 9.15
If f(t) is (n þ m þ 1) times continuously differentiable in a neighborhood of t ¼ 0, then the [n, m]th-order

Padé approximant of f(t) exists, with l > n. If l n þ m þ 1, then the coefficients {ak}nk¼0 and {bk}m k¼0
of pn(t) and qm(t) are determined by the following linear system of algebraic equations:
Xi
f j (0)
bij ¼ ai , i ¼ 0, 1, . . . , l 1
j¼0
j!
with anþj ¼ bmþj ¼ 0 for all j ¼ 1, 2, . . . . Moreover, if pn=qm is the [n, m]th-order Padé approximant
of f(t) ¼ S1{ak}nk ¼ 0 fktk, then the approximation error is given by
!
X
1 X
m
tk
f (t) pn (t) ¼ fkj bj , t 2 [1, 1]
qm (t) qm (t)
k¼nþ1 j¼0
Padé approximation can be extended from algebraic polynomials to any other Chebyshev sys-
tems [22].
9.3.2.2 Approximation via Splines and Radial Functions

Roughly speaking, spline functions, or simply splines, are piecewise smooth functions that are structur-
ally connected and satisfy some special properties. The most elementary and useful splines are polyno-
mial splines, which are piecewise algebraic polynomials, usually continuous, with a certain degree of
smoothness at the connections. More precisely, let
a ¼ t0 < t1 < < tn < tnþ1 ¼ b
be a partition of interval [a, b]. The polynomial spline of degree m with knots {tk}nk¼1 on [a, b] is defined
to be the piecewise polynomial gm(t) that is a regular algebraic polynomial of degree m on each
subinterval [tk, tk þ 1], k ¼ 0, . . . , n, and is (m 1) times continuously differentiable at all knots [41,88].
We denote the family of these algebraic polynomial splines by Sm(t1, . . . , tn), which is an (n þ m þ 1)-
dimensional linear space.
Given a continuous function f(t) on [a, b], the best uniform spline approximation problem is to find a
g*m 2 Sm(t1, . . . , tn) such that

f gm* ¼ inf gm 2Sm f gm L1 [a,b] (9:33)
L1 [a,b]
According to the second part of Theorem 9.10, this best uniform approximation problem always has a
solution. A best spline approximant can be characterized by the following sign-alteration theorem [72],
which is a generalization of Theorem 9.12, from polynomials to polynomial splines.
THEOREM 9.16
The polynomial spline gm*(t) is a best uniform approximant of f 2 C [a, b] from Sm(t1, . . . , tn) iff there
exists a subinterval [tr, trþs] [a, b], with integers r and s 1, such that the maximal number g of sign-
alteration points on this subinterval [tr, tr þ s], namely,

f (tk ) gm (tk ) ¼ c(1)k f gm L1 [a,b] , tk 2 [tr ,trþs ], k ¼ 1, . . . , g
satisfies g m þ s þ 1, where c ¼ 1 or 1.
Polynomial splines can be used for least-squares approximation, just like regular polynomials, if the
L1-norm is replaced by the L2-norm in Equation 9.33. For example, B-splines, i.e., basic splines with a
compact support, are very efficient in least-squares approximation. The spline quasi-interpolant provides
another type of efficient approximation, which has the following structure
X
gm (t) ¼ f (tk )fm
k (t) (9:34)
k
and can achieve the optimal approximation order, where {fm k } is a certain linear combination of
B-splines of order m [18].
Spline functions have many variants and generalizations, including natural splines, perfect splines,
various multivariate splines, and some generalized splines defined by linear ordinary or partial differntial
operators with initial-boundary conditions [27,41,42,44,88].
Splines are essentially local, in the sense of having compact supports, perhaps with the exception
perhaps of the thin-plate splines [94], where the domains do not have a boundary.
Radial functions are global, with the property f(r) ! 1 as r ! 1 and, normally, f(0) ¼ 0. Well-
conditioned radial functions include jrj2mþ1, r2m log(r), (r2 þ a2)
1=2, 0 < a ! 1, etc. [80]. Many radial
functions are good candidates for modeling nonlinear circuits and systems [63,64]. For example, for l
distinct points t1, . . . , tl in Rn, the radial functions {f(jt tkj)}lk ¼ 1 are linearly independent, and thus the
minimization
2
Xl

min f (t) ck f t tk (9:35)
{ck }
k¼1
at some scattered points can yield a best least-squares approximant for a given function f(t), with some
especially desirable features [81]. In particular, an affine plus radial function in the form
X
l
atþbþ ck f(t tk ), t 2 Rn (9:36)
k¼1
where a, b, {ck}lk ¼ 1 are constants, provides a good modeling framework for the canonical piecewise linear
representation (Equation 9.12) of a nonlinear circuit [63].
9.3.2.3 Approximation by Means of Interpolation

Interpolation plays a central role in function approximation theory. The main theme of interpolation is
this: suppose that an unknown function exists for which we are given some measurement data such as its
function values, and perhaps some values of its derivatives, at some discrete points in the domain. How
can we use this information to construct a new function that interpolates these values at the given points
as an approximant of the unknown function, preferably in an optimal sense? Constructing such a
function, called an interpolant, is usually not a difficult problem, but the technical issue that remains is
what kind of functions should be used as the interpolant so that a certain meaningful and optimal
objective is attained?
Algebraic polynomial interpolation is the simplest approach for the following Lagrange interpolation
problem [22,36].
THEOREM 9.17
For arbitrarily given n þ 1 distinct points 0 t0 < t1 < < tn 1 and n þ 1 real values v0, v1, . . . , vn, there
exists a unique polynomial pn(t) of degree n, which satisfies
pn (tk ) ¼ vk , k ¼ 0, 1, . . . , n
This polynomial is given by
X
n
pn (t) ¼ vk Lk (t)
k¼0
with the Lagrange basis polynomials
(t t0 ) (t tk1 )(t tkþ1 )(t tn )

Lk (t) :¼ , k ¼ 0, . . . , n
(tk t0 ) (tk tk1 )(tk tkþ1 )(tk tn )
Moreover, if f(t) is l (n þ 1) times continuously differentiable on [a, b], then the interpolation error is
bounded by

f pn 1
(l)
h
L1 [0,1]
f L1 [0,1]
n! L1 [0,1]
where h(t) ¼ Pn1

k¼0 (t tk), and jjhjjL1[0,[1]] attains its minimum at the Chebyshev points tk ¼ cos (2k þ 1)
p=2(n þ 1)), k ¼ 0, 1, . . . , n.
Note that the set {Lk(t)}nk¼0 is a Chebyshev system on the interval [t0, tn], which guarantees the
existence and uniqueness of the solution. This set of basis functions can be replaced by any other
Chebyshev system to obtain a unique interpolant.
If not only functional values, but also derivative values, are available and required to be interpolated by
the polynomial,
pn(ik ) (tk ) ¼ vk,ik ik ¼ 0, . . . , mk , k ¼ 0, 1, . . . , n
P
then we have a Hermite interpolation problem. An algebraic polynomial of degree d ¼ n þ nk¼0 mk
always exists as a Hermite interpolant. An explicit closed-form formula for the Hermite interpolant also
can be constructed. For example, if only the functional values {vk }nk¼0 and the first derivative values
{wk }nk¼0 are given and required to be interpolated, then the Hermite interpolant is given by
X
n
p2n (t) ¼ fvk Ak (t) þ wk Bk (t)g
k¼0
where, with notation L0k (tk) :¼ (d=dt)Lk(t)jt ¼ tk,

Ak (t) ¼ 1 2(t tk )L0k (tk ) L2k (t) and Bk (t) ¼ (t tk )L2k (t)
in which Lk(t) are Lagrange basis polynomials, k ¼ 0, 1, . . . , n.

However, if those derivative values are not consecutively given, we have a Hermite–Birkhoff interpol-
ation problem, which is not always uniquely solvable [61].
The preceding discussions did not take into consideration any optimality. The unique algebraic
polynomial interpolant obtained previously may not be a good result in many cases. A well-known
example is provided by Runge, in interpolating the continuous and smooth function f(t) ¼ 1=(1 þ 25t2) at
n þ 1 equally spaced points on the interval [1, 1]. The polynomial interpolant pn(t) shows extremely
high oscillations near the two end-points (jtj > 0.726, . . . ). Hence, it is important to impose an additional
optimality requirement (e.g., a uniform approximation requirement) on the interpolant. In this concern,
the following result is useful [36].
THEOREM 9.18
Given a continuous function f 2 C [1, 1], let {tk}nk ¼ 1 be the Chebyshev points on [1, 1]; namely, tk ¼ cos
((2k 1)p=(2n)), k ¼ 1, . . . , n. Let also P2n1(t) be the polynomial of degree 2n 1 that satisfies the
0
following special Hermite interpolation conditions: P2n1(tk) ¼ f(tk) and P2n1(tk) ¼ f(tk) and P2n1 (tk )
t(k) ¼ 0, k ¼ 1, . . . , n. Then, the interpolant P2n(t) has the uniform approximation property

f P2n1 !0 as n ! 1
L1 [1,1]
Because polynomial splines are piecewise algebraic polynomials, similar uniform approximation results
for polynomial spline interpolants may be established [41,72,88].
Finally, a simultaneous interpolation and uniform approximation for a polynomial of a finite (and
fixed) degree may be very desirable in engineering applications. The problem is that given and f 2 C [a, b]
with n þ 1 points a t0 < t1 < < tn b and a given e > 0, find a polynomial p(t) of finite degree
(usually, larger than n) that satisfies both

f p <e and p(tk ) ¼ f (tk ), k ¼ 0, 1, . . . , n
L 1 [a,b]
The answer to this question is the Walsh theorem, which states that this is always possible, even for
complex polynomials [36]. Note that natural splines can also solve this simultaneous interpolation and
uniform-approximation problem.
9.3.3 Best Approximation of Linear Functionals

As already mentioned, a functional is a mapping that maps functions to values. Definite integrals,
derivatives evaluated at some points, and interpolation formulas are good examples of linear functionals.
The best approximation problem for a given bounded linear functional, L, by a linear combination of
n independent and bounded linear functionals L1, . . . , Ln, all defined on the same normed linear space X
of functions, can be similarly stated as follows: determine n constant coefficients {ak*}nk¼1 such that

Xn Xn

L ak*Lk ¼ min{ak } L ak Lk (9:37)

k¼1 X* k¼1 X*
where X* is the dual space of X, which is also a normed linear space. A basic result is described by the
following theorem [36].
THEOREM 9.19
If X is a Hilbert space, then the best approximation problem (Equation 9.37) is uniquely solvable.
Moreover, if r and {rk }nk¼1 , are the functional representors of L and {Lk }nk¼1 , respectively, then

Xn Xn

r ak rk ¼ min ) L ak Lk ¼ min

k¼1 X* k¼1 X*
It is important to note that for linear functionals, we have an interpolation problem: given bounded
linear functionals L and {Lk}nk¼1, all defined on a normed linear space X, where the last n functionals are
linearly independent on X, and given also n points xk 2 X, k ¼ 1, . . . , n, determine n constant coefficients
{ak}nk¼1, such that
X
n
ak Lk (xi ) ¼ L(xi ), i ¼ 1, . . . , n
k¼1
Obviously, this problem is uniquely solvable. Depending on the specific formulation of the linear
functionals, a bulk of the approximation formulas in the field of numerical analysis can be derived
from this general interpolation formulation.
Finally, convergence problems also can be formulated and discussed for bounded linear func-
tionals in a manner similar to interpolation and approximation of functions. The following result is
significant [36].
THEOREM 9.20
Let L and {Lk }1

k¼1 be bounded linear functionals defined on a Banach space X. A necessary and sufficient
condition for

lim Lk L * ¼ 0
k!1 X
is that {Lk }1
k¼1 are uniformly bounded:

Lk M < 1 8k ¼ 1, 2, . . .
X*
and there is a convergent sequence {xi }1

i¼1 2 X, such that
lim Lk (xi ) ¼ L(xi ) for each i ¼ 1, 2, . . .

k!1
9.3.4 Artificial Neural Network for Approximation

Artificial neural networks offer a useful framework for signal and system approximations, including
approximation of continuous and smooth functions of multivariables. Due to its usually mutilayered
structure with many weights, an artificial neural network can be ‘‘trained,’’ and hence has a certain
‘‘learning’’ capability in data processing. For this reason, artificial neural networks can be very efficient in
performing various approximations. The main concern with a large-scale artificial neural network is its
demand on computational speed and computer memory.
Both parametrized and nonparametrized approaches to approximations use artificial neural networks.
In the parametrized approach the activation function, basic function, and network topology are all
predetermined; hence, the entire network structure is fixed, leaving only a set of parameters (weights) to
be adjusted to best fit the available data. In this way, the network with optimal weights becomes a best
approximant, usually in the least-squares sense, to a nonlinear system. Determining the weights from the
data is called a training process. Back-propagation multilayered artificial neural networks are a typical
example of the parametrized framework. The nonparametrized approach requires that the activation
and=or basic functions also be determined, which turns out to be difficult in general.
To illustrate how an artificial neural network can be used as a system or signal approximant, we first
describe the structure of a network. The term neuron used here refers to an operator or processing unit,
which maps R00 –R, with the mathematical expression
oi ¼ fa (fb (ii ,w i ÞÞ (9:38)
where ii ¼ [il, . . . , in]T is the input vector, wi ¼ [wi1, . . . , win]T is the weight vector associated with the
ith neuron, oi the output of the ith neuron, fa the activation function (usually sigmoidal or Gaussian), and
fb the basic function (which can be linear, affine, or radial). For example, if an affine basic function is
used, Equation 9.38 takes on the form
oi ¼ fa (ii wi þ bi Þ (9:39)
where bi is a constant.
A fully connected feed-forward artificial neural network is generally a multi-input=multi-output
network, where the output from each neuron of each layer is an input to each neuron of the next
layer. Such a network, arranged in one input layer, multiple hidden layers, and one output layer, can be
constructed as follows (see Figure 9.6). Suppose we have n-inputs, nL-outputs and L 1 hidden layers,
and a linear basic function is used with a sigmoidal activation function fa(t) ¼ s(t):

1 as t ! þ1
s(t) !
0 as t ! 1
Also, let ol,i be the output of the ith neuron at the lth layer and wl,i ¼ [wl,i,1 wl,i,s]T be the weight vector
associated with the same neuron connected to the neurons at the (l 1)st layer. Then, we have
!
X
nl
ol,i ¼ s 0l1,j wl,i,j þ wl,i,0 (9:40)
j¼1
Inductively, the output of the ith neuron in the last (the Lth) layer is given by
! ! !
X
nL1 X
ni
oL,i ¼ s wL,i,j s w1,p,q in0 þ w1,p,o þ w2,p,0 þ þ wL,i,o (9:41)
j¼1 q¼1
where i ¼ 1, . . . , nL.
The following best uniform approximation property of an artificial neural network is a fundamental
result in neural-network approximation [35].
Layer 3 (output layer) nL = n2 = 2
Layer 2 (second hidden layer) n2 = 2
Layer 1 (first hidden layer) n1 = 3
Input layer n=4
FIGURE 9.6 A two-hidden layer, feed-forward artificial neural network.

THEOREM 9.21
Let f(t) be a continuous function defined on a compact subset V Rn. Then, for any 2 > 0, there exists an
integer m 1 and real parameters {ck, wki, bk}m k¼1 such that using any nonconstant, bounded, and
monotonically increasing continuous function fa as the activation function, the artificial neural network
can uniformly approximate f on V, in the sense that

f N <e
L1 (V)
where the network has the form

!
X
m X
n
N(t) ¼ ck fa wk,i ti þ bk , t ¼ ½t1 tn T 2 V
k¼1 i¼1
Neural networks can also provide approximation for a mapping together with its derivatives [52]. On the
other hand, neural networks can provide localized approximation, which is advantageous in that if a
certain portion of the data is perturbed, only a few weights in the network need to be retrained. It was
demonstrated that a single hidden layered network cannot provide localized approximation of continu-
ous functions on any compact set of a Euclidean space with dimension higher than one; however, two
hidden layers are sufficient for the purpose [33].
As mentioned previously, the basic function fb in a network need not be linear. An artificial neural
network, using a radial function for fb, can also give very good approximation results [76]. Also, as a
system approximation framework, stability of a network is very important [68]. Finally, a major issue that
must be addressed in designing a large-scale network is the computer memory, which requires some
special realization techniques [67].
9.4 Identification
System identification is a problem of finding a good mathematical model, preferably optimal in some
sense, for an unknown physical system, using some available measurement data. These data usually
include system outputs and sometimes also inputs. Very often, the available data are discrete, but the
system to be identified is continuous [97].
A general formulation of the system identification problem can be described as follows. Let S be the
family of systems under consideration (linear or nonlinear, deterministic or stochastic, or even chaotic),
with input u and output g, and let R(u,y) be the set of I–O data. Define a mapping M: S ! R(u,y). Then, a
system ^ 2 S is said to be (exactly) identifiable if the mapping M is invertible, and the problem is to find
the ^ ¼ M1(~ u, ~y) 2 R(u,y). Here, how to define the mapping M, linear or
u,~y) using the available data (~
not, is the key to the identification problem. Usually, we also want M1 to be causal for the implemen-
tation purpose.
The first question about system identification is of course the identifiability [82]. Not all systems, not
even linear deterministic systems, are exactly identifiable [21]. Because many physical systems are not
exactly identifiable, system identification in a weaker sense is more realistic.
Suppose that some inputs and their corresponding outputs of an unknown system, 61, are given. We
want to identify this unknown system by an approximate model, 62, using the available I–O data, such
that the corresponding outputs produced by any input through 61 and 62, respectively, are ‘‘very close’’
under certain meaningful measure. If the structure of 61 (hence, 62) is known a priori, then what we
need is to identify some system parameters. If the structure of 61 is not clear, the task becomes much
more difficult because we must determine what kind of model to choose in approximating the unknown
system [50]. This includes many crucial issues such as the linearity and dimension (or order) of the
model used. In particular, if the system is nonlinear and contains uncertainties, special techniques from
set-valued mapping and differential inclusion theories may be needed [58].
Usually, the basic requirement is that 62 should be a best approximant of 61 from a desired class of
simple and realizable models under a suitably chosen criterion. For example, the least-squares operator
approximation discussed previously can be thought of as an identification scheme. For this reason,
identification in the weak sense is traditionally considered to be one of the typical best approximation
problems in mathematics. If a minimal, worst-case model-matching error bound is required, the
approximation is known as the optimal recovery problem, for either functions or functionals [65,66],
or for operators [15,45]. In system engineering it usually refers to system identification or reconstruction,
with an emphasis on obtaining an identified model or a reconstruction scheme.
Generally speaking, system identification is a difficult problem, often leading to nonunique solutions
when it is solvable. This is typically true for nonlinear circuits and systems. In systems and control
engineering, an unknown system is identified by a desired model such that they can produce ‘‘close
enough’’ outputs from the same input, measured by a norm in the signal space, such as Lp, lp, or Hp
(1 p 1). For dynamic systems, however, this norm-measure is generally not a good choice because
one is concerned with nonlinear dynamics of the unknown system, such as limit cycles, attractors,
bifurcations, and chaos. Hence, it is preferable to have an identified model that preserves the same
dynamic behavior. This is a very challenging research topic; its fundamental theories and methodologies
are still open for further exploration.
9.4.1 Linear Systems Identification

Compared to nonlinear systems, linear systems, either autoregressive with moving-average (ARMA) or
state-space models, can be relatively easily identified, especially when the system dimension (order) is
fixed. The mainstream theory of linear system identification has the following characteristics [37]:
1. The model class consists of linear, causal, stable, finite-dimensional systems with constant param-
eters.
2. Both system inputs and their corresponding outputs are available as discrete or continuous data.
3. Noise, if any, is stationary and ergodic (usually with rational spectral densities), white and
uncorrelated with state vectors in the past.
4. Criteria for measuring the closeness in model-matching are of least-squares type (in the deter-
ministic case) or of maximum likelihood type (in the stochastic case).
5. Large-scale linear systems are decomposed into lower-dimensional subsystems, and nonlinear
systems are decomposed into linear and simple (e.g., memoryless) nonlinear subsystems.
Because for linear systems, ARMA models and state-space models are equivalent under a nonsingular
linear transformation [17,32], we discuss only ARMA models here.
An (n, m, l)th-order ARMAX model (an ARMA model with exogenous noisy inputs) has the general
form

a z 1 y(t) ¼ b z 1 u(t)c z 1 e(t), t ¼ . . . , 1, 0, 1, . . . (9:42)
in which z1 is the time-delay operator defined by z1f(t) ¼ f(t l), and

X n
X m
X l
a z 1 ¼ Ai z i , b z1 ¼ Bj zj , c z 1 ¼ Ck zk
i¼0 j¼0 k¼1
with constant coefficient matrices {Ai}, {Bj}, {Ck} of appropriate dimensions, where A0 ¼ I (or, is
nonsingular). In the ARMAX model (Equation 9.42) u(t), y(t), and e(t) are considered to be system
input, output, and noise vectors, respectively, where the input can be either deterministic or random. In
particular, if l ¼ 0 and n ¼ 0 (or m ¼ 0), then Equation 9.42 reduces to a simple moving-average (MA) (or
autoregressive, AR) model. Kolmogorov [56] proved that every linear system can be represented by an
infinite-order AR model. It is also true that every nonlinear system with a Volterra series representation
can be represented by a nonlinear AR model of infinite order [53].
The system identification problem for the ARMAX model (Equation 9.42) can now be described as
follows. Given the system I–O data (u(t), y(t)) and the statistics of e(t), determine integers (n, m, l)
(system-order determination) and constant coefficient matrices {Ai}, {Bj}, {Ck} (system-parameter iden-
tification). While many successful methods exist for system parameter identification [3,23,49,60], system
order determination is a difficult problem [47].
As already mentioned, the identifiability of an unknown ARMAX model using the given I–O data is a
fundamental issue. We discuss the exact model identification problem here. The ARMAX model
(Equation 9.42) is said to be exactly identifiable if (ã(z1), ~b(z1), ~c(z1)) is an ARMAX model with
ñ n, m~ m, and ~l l, such that
1 1 1
½~aðz Þ ~bðz Þ ¼ ½aðz 1 Þ bðz 1 Þ
1
1 1
½~aðz1 Þ ~cðz 1 Þ ¼ ½aðz 1 Þ cðz1 Þ
Note that not all ARMAX models are exactly identifiable in this sense. A basic result about this
identifiability is the following [21].
THEOREM 9.22
The ARMAX model (Equation 9.42) (with t 0) is exactly identifiable iff a(z1), b(z1), and c(z1) have
no common left factor and the rank of the constant matrix [An, Bm, Cl], consisting of the highest-order
coefficient terms in a(z1), b(z1), c(z1), respectively, is equal to the dimension of the system output y.
Even if an unknown system is exactly identifiable and its identification is unique, how to find the
identified system is still a very technical issue. For simple AR models, the well-known Levinson–Durbin
algorithm is a good scheme for constructing the identified model; for MA models, one can use Trench–
Zohar and Berlekamp–Massey algorithms. There exist some generalizations of these algorithms in the
literature [23]. For stochastic models with significant exogenous noise inputs, various statistical criteria
and estimation techniques, under different conditions, are available [82]. Various recursive least-
squares schemes, such as the least-mean-square (LMS) algorithm [96], and various stochastic searching
methods, such as the stochastic gradient algorithm [49], are popular. Because of their simplicity and
efficiency, the successful (standard and extended) Kalman filtering algorithms [16,30] have also been
widely applied in parameters identification for stochastic systems [13,17,62], with many real-world
applications [92].
Finally, for linear systems, a new framework, called the behavioral approach, is proposed for mathe-
matical system modeling and some other related topics [2,98].
9.4.2 Nonlinear Systems Identification

Identifying a nonlinear system is much more difficult than identifying a linear system in general, whether
it is in the exact or in the weak sense, as is commonly known and can be seen from its information-based
complexity analysis [15,45].
For some nonlinear systems with simple Volterra series representations, the least-squares approxima-
tion technique can be employed for the purpose of identification in the weak sense [8]. As a simple
ε(t)
u(t) x(t) y(t) z(t)

h1(t) Vn(∙) h2(t)
FIGURE 9.7 A cascaded linear–nonlinear system with noise input.
illustrative example, consider the cascaded nonlinear system with noise input shown in Figure 9.7. In this
figure h1(t) and h2(t) are unit impulse responses of two linear subsystems, respectively, and Vn() is a
memoryless nonlinear subsystem which is assumed to have an nth-order Volterra polynomial in the
special form
X
n ðt ðt
y(t) ¼ ck . . . fk ðt1 , . . . , tk Þx(t1 ) x(tk )dt1 dtk (9:43)
k¼1 0 0
where all the Volterra kernels {fk }nk¼0 are assumed to be known, but the constant coefficients {ck }nk¼0
must be identified.
It is clear from Figure 9.7 that the output of the cascaded system can be expressed via convolution-type
integrals as
ð ð ð
z(t) ¼ c1 h2 f1 h1 u (t) þ þ cn h2 f1 h1 h2 u u (t) þ e(t) (9:44)
Now, because all the integrals can be computed if the input function u(t) is given, the standard least-
squares technique can be used to determine the unknown constant coefficients {ck }nk¼0 , using the
measured system output z(t).
A neural network implementation of Volterra series model identification is described in Ref. [1].
Neural network for system identification has been used in many different cases, as can also be seen from
Ref. [70].
Finally, we consider one approach to nonlinear systems identification which combines the special
structure of the generalized Fock space of Volterra series (Theorem 9.3) and the ‘‘training’’ idea from
neural networks discussed previously (Theorem 9.21). For simplicity, consider the scalar nonlinear
system
y(t) þ f ð y(t 1), y(t 2), . . . , y(t n)Þ ¼ u(t), t ¼ 0, 1, . . . (9:45)
where n is a fixed integer, with the given initial conditions y(1) ¼ y1, . . . , y(n) ¼ yn. Introducing a
simple notation
yt1 ¼ ð y(t 1), . . . , y(t n)Þ (9:46)
we first rewrite this system as

g(t) þ f gt1 ¼ u(t) (9:47)
Then, we denote by En as the n-dimensional Euclidean space of continuous functions and let u1, . . . ,
um 2 En, called the domain training samples, be given data vectors that are componentwise nonzero and
distinct, namely, uki 6¼ ukj if i 6¼ j for all k ¼ 1, . . . , m, 1 i, j n. Here, Equation 9.46 also has been used
for these domain training samples. Also, let r1, . . . , rm, be given real numbers, called the corresponding
range training samples. The identification problem is to find an approximate system, f *(), among all
Volterra series representations from the generalized Fock space formulated in Theorem 9.3, such that f *
maps all the domain training samples to their corresponding range training samples:
f *(uk ) ¼ rk , k ¼ 1, . . . , m (9:48)
and f * has the minimum operator-norm among all such candidates. The following theorem provides an
answer to this problem [45].
THEOREM 9.23
There is a unique element f * of minimum norm in the generalized Fock space defined in Theorem 9.3, with
the domain V ¼ En therein, that satisfies the constraint (Equation 9.48). Moreover, f * has the following
expression:
X
m

f *(v) ¼ ak K uk ,v 8v 2 En
k¼1
where K(, ) is the reproducing kernel defined in Theorem 9.3, and the system parameters are deter-
mined by
2 3 2 31 2 3
a1 K ðu1 , u1 Þ K ðu1 , um Þ r1
6 .. 7 6 . . 7 6 . 7
4 . 5¼4 .. .. 5 4 .. 5
am K ðum , u1 Þ K ðum , um Þ rm
Here, it should be noted that because K is a reproducing kernel, the set of functions {K(uk, )}mk¼1 are
linearly independent, so that the above inverse matrix exists.
Also, note that this system identification method can be applied to higher-dimensional systems and the
continuous-time setting [45].
9.4.3 Nonlinear Dynamic Systems Identification from Time Series

Measurement (observation) data obtained from an unknown system are often available in the form
of time series. There are some successful techniques for identification of linear and nonlinear systems
from time series if the time series is generated from Gaussian white noise. For example, for linear
systems we have the Box–Jenkins scheme and for nonlinear systems, a statistical method using a
nonlinear filter [75].
Concerned with nonlinear dynamic systems, however, statistical methods and the commonly used
norm-measure criterion may not be capable of identifying the system dynamics in general. This is
because the main issue in this concern is the nonlinear dynamic behavior of the unknown system, such as
limit cycles, attractors, bifurcations, and chaos. Hence, it is preferable that the identified model can
preserve the nonlinear dynamics of the unknown system. This turns out to be a very challenging task;
many fundamental theories and methodologies for this task remain to be developed.
When an unknown nonlinear dynamic system is measured to produce a set of continuous or discrete
data (a time series), a natural approach for studying its dynamics from the available time series is to take
an integral transform of the series, so as to convert the problem from the time domain to the frequency
domain. Then, some well-developed engineering frequency domain methods can be applied to perform
analysis and computation of the nonlinear dynamics [69].
One common approach formulated in the time domain is the (delay-coordinate) embedding method
that can be applied to reconstruct (identify) an unknown nonlinear dynamic model from which only a set
of discrete measurement data (a time series) is available.
Let us consider the problem of identifying a periodic trajectory of an unknown, nonlinear dynamic
system using only an experimental time series measured from the system. Let {rk} be the available
data. The embedding theory guarantees this can be done in the space Rm with the embedding dimension
m 2n þ 1, where n is the dimension of the dynamic system 93], or m 2dA, where dA is the dimen-
sion of the attractor [87]. A way to achieve this is to use the delay-coordinate technique, which
approximates the unknown, nonlinear dynamics in Rm by introducing the embedding vector
T
rk ¼ rk rkm rk(m1)m (9:49)
where m is the time-delay step. This embedding vector provides enough information to characterize the
essence of the system dynamics and can be used to obtain an experimental Poincaré map, which helps in
understanding the dynamics. For example, one may let the map be the equation of the first component of
the vector being equal to a constant: rki ¼ constant. This procedure yields the successive points
T
ji :¼ rki m rki (m1)m (9:50)
at the ith piercing of the map by the trajectory (or the vector rk), where ki is the time index at the ith
piercing. Then, one can locate the periodic trajectories of the unknown system using the experimental
data [4,14]. In this approach, however, determining a reasonably good time-delay step size, i.e., the real
number m in Equation 9.49, remains an open technical problem.
Finally, we note that the embedding method discussed previously has been applied to the control of
chaotic circuits and systems [19,20,74].
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10
Transformation
and Equivalence
10.1 Transformation of Nonlinear Dynamical Circuit
Equations ................................................................................. 10-1
10.2 Normal Forms of Nonlinear Dynamical Circuit
Equations ................................................................................. 10-5
10.3 Dimensionless Forms of Circuit Equations..................... 10-9
10.4 Equivalence of Nonlinear Resistive n-Ports .................. 10-16
10.5 Equivalence of Nonlinear Dynamical n-Ports .............. 10-17
10.6 Equivalence of Reciprocal Nonlinear Dynamic
Wolfgang Mathis Circuits ................................................................................... 10-18
University of Hanover References .......................................................................................... 10-23
10.1 Transformation of Nonlinear Dynamical Circuit Equations

One of the basic problems in studying linear and nonlinear dynamical electrical circuits is the analysis of
the underlying descriptive equations and their solution manifold. In the case of linear or affine circuits, the
constitutive relations of circuit elements are restricted to classes of linear or affine functions and, therefore,
possess rather restricted types of solutions. In contrast, the solution manifold of nonlinear networks may
consist of many different types. Naturally, it is useful to decompose nonlinear networks into classes that
possess certain similarities. One approach, for example, is to consider the solution manifold and to
decompose solutions into similar classes. Furthermore, if the descriptive differential equations of dynamic
networks are considered to be mathematical sets, their decompositions will be of interest.
The technique of equivalence relations is the preferred method used to decompose a set of mathemati-
cal objects into certain classes. A well-known approach to define equivalence relations uses transform-
ation groups. For example, real symmetric n 3 n matrices Rnn s can be decomposed into equivalence
classes by using the general linear transformation group GL(n; R), and by applying the following
similarity transformation:
M ! U1 MU, (10:1)
where U 2 GL(n; R). By applying GL(n; R), the set Rnn s is decomposed into similarity classes that are
characterized by their eigenvalues. Furthermore, each class of Rnns contains a diagonal matrix D with
these eigenvalues on the main diagonal [35]. These eigenvalues are invariants of the group and
characterize different classes. These and other related results can be applied to classify linear and affine
dynamical networks [20]. Thus, properties of the A-matrix of the state-space equations are used for the
classification. Note that each linear and affine dynamical network can be described in state-space form.
10-1
We discuss the theory of equivalence of linear and affine dynamical networks only as special cases of
nonlinear networks. An interesting reformulation of the classical material of the decomposition of real
matrices by using similarity transformations in the framework of one-parameter groups in GL(n; R) is
given by Ref. [21].
A classification of the vector fields is needed in order to classify differential equations of the type
x_ ¼ f(x), where x 2 Rn and f: Rn ! Rn is a vector field on Rn. A first concept is established by a k-times
differentiable change of coordinates that transforms a differentiable equation x_ ¼ f(x) into y_ ¼ g(y) by
a function h 2 C k. C k is the set of k-times continuously differentiable functions h: Rn ! Rn. In other
words, two vector fields are called C k-conjugate if there exists a C k-diffeomorphism h (k 1) such that
h s f ¼ g s h. An equivalent formulation uses the concept of flows associated with differential equations
x_ ¼ f(x). A flow is a continuously differentiable function w: R 3 Rn ! Rn such that, for each t 2 R,
the restriction w(t, ) ¼ : wt() satisfies w0 ¼ idRn and wt s ws ¼ wtþs for all t, s 2 Rn. The relationship to a
associated differential equation is given by

dwt w(e, x) w(0, x)
f(x) : ¼ (x) ¼ lim : (10:2)
dt t¼0
e!0 e
For more details see, for example, Ref. [13]. Two flows wt and Ct (associated with f and g, respectively)
are called C k-conjugate, if there exists a C k-diffeomorphism h (k 1) such that h s wt ¼ Ct s h. In the
case that k ¼ 0, the term C k-conjugate needs to be replaced by C0 or topological conjugate and h is a
homeomorphism. Clearly, differential equations, vector fields, and flows are only alternative ways of
presenting the same dynamics.
By the previous definitions, equivalence relations can be generated and the set of differential equations
x_ ¼ f(x) (as well as vector fields and flows) can be decomposed in certain classes of inequivalent differential
equations and so on with different behavior (with respect to the equivalence relation). Although
C k-conjugate seems to be a natural concept for classifying differential equations, vector fields, and flows,
this approach leads to a very refined classification (up to a diffeomorphism). In other words, too many
systems become inequivalent. We consider two examples for illustrating this statement. Consider the
nonlinear dynamical circuit (see Figure 10.1) with the descriptive equations (in a dimensionless form):
dvC
C ¼ i(vC , iL ) iL , (10:3)
dt
diL
L ¼ vC þ v(vC , iL ), (10:4)
dt
where the nonlinear functions i: R2 ! R and v: R2 ! R characterize the nonlinear controlled sources.
If these controlled sources are given in the following form:
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1
i ¼ i(vC , iL ) :¼ vC2 þ i2L 1 vC , (10:5)
2
K
–+
iL
i(vC , iL) V(ve , iL)
C vC L
M
FIGURE 10.1 Circuit with nonlinear controlled sources.

Transformation and Equivalence 10-3
1
v ¼ v(vC , iL ) ¼ vC2 þ i2L 1 iL , (10:6)
2
we obtain the following concrete descriptive equations for the circuits
dvC 1
C ¼ vC2 þ i2L 1 vC iL , (10:7)
dt 2
diL 1
L ¼ vC vC2 þ i2L 1 iL : (10:8)
dt 2
These equations can be transformed into the following form if we use polar coordinates (r, f) by nC :¼ r
cos(ft) and iL :¼ r sin(ft):
dr 1
¼ (1 r)r, f_ ¼ 1, (10:9)
dt 2
where C ¼ 1 and L ¼ 1. If we consider the same circuit with the parameters C ¼ 1=2 and L ¼ 1=2 we
obtain the slightly different descriptive equations:
dr 1
¼ (1 r)r, f_ ¼ 2: (10:10)
dt 2
Note that both differential equations differ only by a time rescaling t ! 2t. The question arises whether
these two sets of equations are C1 conjugate.
It can be demonstrated (see Refs. [2,29]) that if a diffeomorphism converts a singular point of a vector
field into a singular point of another vector field, then the derivative of the diffeomorphism converts the
Jacobian matrix of the first vector field at its singular point into the Jacobian matrix of the second field at
its singular point. Consequently, these two Jacobian matrices are in the same similarity class and
therefore, have the same eigenvalues. In other words, the eigenvalues of the Jacobian matrices are
invariants with respect to a diffeomorphism, and the corresponding decomposition of the set of vector
fields (differential equations and flows) is continuous rather than discrete. Obviously, the eigenvalues of
Equations 10.9 and 10.10 (l1 ¼ 1=2, l2 ¼ 1 and l ~1 ¼ 1, l
~ 2 ¼ 2, respectively) are different and, in
conclusion, the two vector fields are not C conjugate. Moreover, these two vector fields are not
1
topologically or C 0 conjugate. A more ‘‘coarse’’ equivalence relation is needed in order to classify

these vector fields, differential equations, and flows. As mentioned above, a time rescaling transforms
the differential equations (Equations 10.9 and 10.10) into one another and therefore it should be no
essential difference between these two differential equations. This motivates the following definition.
Definition 10.1: Two flows wt and ct are called Ck equivalent (k 1) if there exists a Ck
diffeomorphism h that takes each orbit of ct into an orbit of ct, preserving their orientation. In the case
of k ¼ 0, the flows are called C0 or topologically equivalent.
Because Ck equivalence preserves the orientation of orbits, the relation h(wt(x)) ¼ wty(y) with y ¼ h(x)
between wt and ct is allowed, where ty is an increasing function of t for every y.
It can be demonstrated (see Ref. [29]) that the eigenvalues of the Jacobian matrices of the two vector
fields must be in the same ratio if a monotonic time rescaling is allowed. Therefore, the two vector fields
(Equations 10.9 and 10.10) are C1 equivalent. However, the two linear vector fields of the equations

x_ 1 0 x x_ 1 0 x
¼ , ¼ (10:11)
y_ 0 1 y y_ 0 1þe y
are not C1 equivalent for any e 6¼ 0, although the solutions of the differential equations are very close
for small e in a finite time interval. In conclusion, topological equivalence is the appropriate setting for
classifying differential equations, vector fields, and flows. Note, that the decomposition of the set of linear
vector fields into equivalence classes using the topological equivalence does not distinguish between
nodes, improper nodes, and foci, but does distinguish between sinks, saddles, and sources. This suggests
the following theorem [3]:
THEOREM 10.1
Let x_ ¼ Ax (x 2 Rn and A 2 Rn 3 n) define a hyperbolic flow on Rn, e.g., the eigenvalues of A have only
nonzero parts, with ns eigenvalues with a negative real part. Then, x_ ¼ Ax is topological equivalent to the
system (nu :¼ n ns):
x_ s ¼ xs , xs 2 Rns , (10:12)
x_ u ¼ þxs , xu 2 R : nu
(10:13)
Therefore, it follows that hyperbolic linear flows can be classified in a finite number of types using
topological equivalence.
A local generalization of this theorem to nonlinear differential equations is known as the theorem of
Hartmann and Grobman; see, e.g., Ref. [3].
THEOREM 10.2
Let x* be a hyperbolic fixed point of x_ ¼ f(x) with the flow wt: U Rn ! Rn, i.e., the eigenvalues of the
Jacobian matrix Jf (x*) have only nonzero real parts. Then, there is a neighborhood N of x* on which x_ ¼ f(x)
is topologically equivalent to x_ ¼ Jf (x*) x.
The combination of the two theorems implies that a very large set of differential equations can be
classified in an isolated hyperbolic fixed point by a finite number of types (namely, ns (or nu)). The reason
behind this interesting result is that the theorem of Hartman and Grobman, based on homeomorphisms,
leads to a coarse decomposition of the set of vector fields under consideration.
As a consequence of the preceding theorems, the behavior of nonlinear differential equations near
hyperbolic fixed points is equivalent up to a homeomorphism to the behavior of a simple system of linear
differential equations. In the theory of nonlinear circuits, these mathematical results can be interpreted in
the following way: The behavior of nonlinear circuits near an operational point where the Jacobian
matrix of the descriptive equations (in statespace form) has only eigenvalues with nonzero real parts is
‘‘similar’’ to that of a corresponding linear dynamical circuit. Therefore, the analysis of these nonlinear
circuits can be decomposed into two steps: (1) calculation of the operational points and the eigenvalues of
their Jacobian matrix and (2) restricting to the hyperbolic operational points we consider the behavior of
the dynamics near these operational points; that is called small-signal behavior.
In the following section, we discuss more general methods for the analysis of vector fields that have at
least one nonhyperbolic fixed point.
10.2 Normal Forms of Nonlinear Dynamical Circuit Equations

In Section 10.1, we present theorems useful for classifying the ‘‘local’’ behavior of nonlinear differential
equations near hyperbolic fixed points by using ‘‘global’’ results from the theory of linear differential
equations. An essential remaining problem is to calculate a homeomorphic transformation h in concrete
cases. An alternative way to circumvent some of the difficulties is to apply the theory of normal forms
that goes back to the beginning of the twentieth century and is based on classical ideas of Poincaré and
Dulac. Detailed investigations of this subject are beyond the scope of this section and, therefore, an
interested reader should consult the monographs of Refs. [2,3,10] as well as Ref. [29], where also further
references of the theory of normal forms can be found. In this section, we present only the main ideas to
illustrate its areas of applications.
In contrast to the theory described in Section 10.1, which is dedicated to hyperbolic cases, the theory of
normal forms applies diffeomorphisms instead of homeomorphisms. This is necessary in order to
distinguish the dynamical behavior of differential equations in more detail. To classify the topological
types of fixed points of nonlinear differential equations x_ ¼ f(x) one proceeds in two steps:
1. Construction of a ‘‘normal form’’ in which the nonlinear terms of the vector field f take their
‘‘most simple’’ form
2. Determination of the topological type of the fixed point (under consideration) from the normal
form
We present the main aspects of this ‘‘algorithm’’ without a proof. First, we suppose that the vector field
f(x) of the nonlinear differential equation x_ ¼ f(x) satisfies f(0) ¼ 0 (otherwise, using a suitable trans-
formation) and that it is represented by a formal Taylor expansion:
f(x) ¼ Ax þ ~f(x), (10:14)
where
A ¼ Jf (x)
~f(x) ¼ O(kxk2) is of class Cr
Power (Taylor) series with no assumptions about convergence are called formal series. In practice, we
begin with the formal series and then we determine the corresponding region of convergence (if available).
Otherwise we use the framework of the theory of the so-called asymptotic series where a convergence in
a strict sense is not necessary. In perturbation theory of differential equations most of the power series
have to be considered as asymptotic series since a convergence in a strict sense is not available. More
details about asymptotic series and perturbation theory can be, e.g., found in Refs. [28,45,57].
If a power series representation is derived, we apply a diffeomorphic C r change of coordinates
h: Rn ! Rn with y 7! x ¼ h(y) (h(0) ¼ 0) in the form of a near identity transformation:
h(y) :¼ y þ hk (y), (10:15)
where hk(y) is a homogeneous polynomial of order k in y (k 2). The result of the transformation is

y_ ¼ fid þ Jh (y)g1 A y þ hk (y) þ fid þ Jh (y)g1~f y þ hk (y) (10:16)
¼ Ay þ g(y) (10:17)
where
Jh(y) is the Jacobian matrix of hk with respect to y
g(h) ¼ O(kyk2) is a class C r
For the following discussion it is useful to define f kT of a sufficient differentiable function f: Rn ! Rn as

the ‘‘truncated’’ Taylor series in 0 expansion that have a degree less or equal k; the ith-order term of the
Taylor series of f is denoted by fi. In a more abstract setting these ‘‘truncated’’ Taylor series are called
k-jets; see Ref. [38] for more details. The set of f kT ’s forms a real vector space of functions and is denoted
by Hkn where the components are homogeneous polynomials in n variables of degree k. Using the k-jet
notation and expanding g into a (formal) Taylor series, Equation 10.17 can be reformulated as
y_ ¼ gk1
T (y) þ gR (y),
k
(10:18)
where gkR contains all terms of degree k or higher.

Expanding ~f of Equation 10.14 into a Taylor series
~f ¼ ~f2 þ ~f3 þ (10:19)
and using it to represent gkR of Equation 10.18 we can get

y_ ¼ gk1
T (y) þ f k Ay, h
k
þ O kykkþ1 , (10:20)
where in the sense of Equation 10.17 the so-called Lie bracket [Ay, hk] of the linear vector field Ay and
of hk(y) is introduced by

Ay, hk (y) :¼ Jh (y)Ay Ahk (y): (10:21)
Now we define the linear operator LkA : Hkn ! Hkn by

LkA hk : y ! Ay, hk (y) (10:22)
with the range R k , and let C k ba any complementary subspace to R k in Hkn , i.e., Hkn ¼ R k C k (k 2).
Then, the following theorem implies a simplification of a nonlinear differential equation x_ ¼ f(x), which
can be interpreted as an equivalent representation of the associated dynamical circuit equations.
THEOREM 10.3
Let f: Rn ! Rn be a Cr vector field with f(0) ¼ 0 and A 2 Rn 3 n, and let the decomposition R k C k of Hkn be
given. Then, there exists a series of near identity transformations x ¼ y þ hk(y) 2 V for k ¼ 2, 3, . . . , r, where
V Rn is a neighborhood of the origin and hk 2 Hkn , such that the equation x_ ¼ f(x) is transformed to
y_ ¼ Ay þ g2 (y) þ g3 (y) þ þ gk (y) þ O(kykrþ1 ), y 2 V, (10:23)
where gk 2 C k for k ¼ 2, 3, . . . .
A proof of this theorem and the following definition can be found in, e.g., Ref. [4].
Definition 10.2: Let R k C k be decompositions of Hkn for k ¼ 2, 3, . . . , r. The ‘‘truncated’’ equation

of (Equation 10.23)
y_ ¼ Ay þ g2 (y) þ g3 (y) þ þ gk (y), (10:24)
where gk 2 C k (k ¼ 2, 3, . . . , r) is called normal form of x_ ¼ Ax þ ~f(x) associated with matrix A up to order

r 2 (with respect to the decomposition where gk 2 C k for k ¼ 2, 3, . . . , R k C k ).
Theorem 10.3 suggests an equivalence relation in the set of vector fields f that decomposes the set into
equivalence classes. Each class can be represented by using the definition of normal forms. Because a
concrete normal form depends on the choice of complementary subspaces C k , it is not unique. In
practical problems a constructive method of finding these subspaces is needed. An elegant way to find
these subspaces is to start with the introduction of a suitable inner product h j in in Hkn that is needed to
define the adjoint operator (LkA )* of LkA (in a sense of linear algebra) by
hhjLkA (j)in :¼ h(LkA )*(h)jjin , for all h, j 2 Hkn : (10:25)

It can be shown that LkA * ¼ LkA* where A* ¼ AT is the transposed matrix of the matrix A. The desired
construction is available as an application of the following theorem.
THEOREM 10.4
n o
Vector space ker LkA* that is the solution space of the equation LkA* j ¼ 0 is a complementary subspace
of R k in Hkn , i.e.,
n o
Hkn ¼ R k ker LkA* : (10:26)
The interesting reader is referred to Ref. [4] for a detailed discussion of this subject. As a consequence,
finding a normal form in the above sense up to the order r requires solving the partial differential
equation LkA* j ¼ 0 with definition (Equation 10.22). From an algebraic point of view this means that a
base of ker {LkA* } has to be chosen, but this can be done, again, with some degrees of freedom. For
example, the two sets of differential equations are distinct normal form of x_ ¼ Ax ~f(x) associated with
the same matrix A (see Ref. [4]):

d x1 0 1 x1 ax12
¼ þ , (10:27)
dt x2 0 0 x2 þ ax1 x2 bx22

d x1 0 1 x1 0
¼ þ : (10:28)
dt x2 0 0 x2 bx1 þ bx1 x2
2
To reduce the number of nonlinear monomials in the normal forms, a more useful base of Ck must be
determined. If a nonlinear differential equation of the form x_ ¼ Ax ~f(x) is given with an arbitrary
matrix A, several partial differential equations need to be solved. This, in general, is not an easy task.
If A is diagonal or has an upper triangular form, methods for constructing a base are available. For this
purpose we introduce the following definition:
Definition 10.3: Let A 2 Rn 3 n possesses the eigenvalues l1, . . . , ln and let x1a1 x1a2 x1a x1an ej be a
monomial in n variables. It is called a resonant monomial if the so-called resonant condition:
a l lj ¼ 0 (10:29)
pffiffiffiffiffiffiffiffi
ffi
is satisfied (aT : ¼ (a1, . . . , an), lT : ¼ (l1, . . . , ln)). If the resonant condition holds for some aT a 2
and some j 2 {1, . . . , n}, we say that A has a resonant set of eigenvalues.
The importance of this definition is that the following statement can be shown: a monomial
x1a1 x1a2 x1a x1an ej is an element of ker {LkA* } if and only if aT l lj ¼ 0 [4]. The next theorem proves
that if A is diagonal, a minimal normal form exists (in certain sense).
THEOREM 10.5
Let A ¼ diag(l1, . . . , ln). Then an A-normal form equation up to order r can be chosen to contain all
resonant monomials up to order r.
If some eigenvalues of A are complex, a linear change to complex coordinates is needed to apply this
theorem. Furthermore, theorems and definitions need to be modified to such complex cases. In the case of
differential equation:

d x1 0 1 x1
¼ þ O kxk2 (10:30)
dt x2 þ1 0 x2
that can be used to describe oscillator circuits, the coordinates are transformed to
z_ 1 : ¼ x1 þ jx2 , (10:31)
z_ 2 ¼ x1 jx2 (10:32)
with the resonant set of eigenvalues { j, þ j} that can be written in a complex normal form (z represents
z1 and z2, respectively):
z_ ¼ j þ a1 jzj2 z þ þ ak jzj2k
z : (10:33)
This normal form equation—Poincaré normal form—is used intensively in the theory of the Poincaré–
Andronov–Hopf bifurcation. The monograph of Hale and Kocak [30] is worth reading for the illustration
of this phenomenon in nonlinear dynamical systems. A detailed proof of the Poincaré–Andronov–Hopf
theorem can be found, e.g., in Ref. [32]. These authors emphasize that further preparation of the system of
differential equations is needed before the normal form theorem is applicable. In general, the linearized
part of x_ ¼ Ax þ ~f(x) (in a certain fixed point of the vector field f) has two classes of eigenvalues: (a) central
eigenvalues li 2 j R C and (b) noncentral eigenvalues li 2 C \ j R. The dynamic behavior of a system
associated with the noncentral eigenvalues is governed by the theorem of Grobman and Hartman
(see Section 10.1) and therefore it is oriented in generic sense at the exponential behavior of linear systems.
If a system has no central eigenvalues it is called a hyperbolic system. In circuit applications network, models
with a hyperbolic behavior are related to, e.g., amplifiers and active filters; see, e.g., Ref. [44].
A more complex behavior is only possible if the theorem of Grobman and Hartman cannot be
applied, i.e., we have systems with central eigenvalues see Ref. [49]. Therefore in the design of oscillator
circuits we have to derive conditions to get central eigenvalues, e.g., Barkhausen criterion. The noncentral
eigenvalues in these systems are related with the relaxation behavior and should be eliminated if we
are interested in the dominant asymptotic behavior. A systematic procedure to eliminate noncentral
eigenvalues from the system is based on the so-called center manifold theorem (see Ref. [11]) that is
used also in the paper of Hassard and Wan [32]. A numerical algorithm is presented by Hassard et al. [31].
A more detailed discussion of this essential theorem goes beyond the scope of this section; however,
more about the theory of normal forms of vector fields and its applications in circuit analysis can be found
R L iL i
f(V)
V0 VC C V
FIGURE 10.2 Nonlinear circuit with tunnel diode.
in Refs. [21,22]. Until now, we have discussed

differential equations of the type x_ ¼ f(x). Descrip-
tive equations of circuits consist, in general, of
linear and nonlinear algebraic equations, as well
as differential equations. Therefore, the so-called
constrained differential equations need to be con- iD = f (vD)
sidered for applications in circuit theory. A typical
example is the well-known circuit shown in Figure iD
10.2, containing a model of a tunnel diode (see
Refs. [9,53]). Circuit equations can be written as
dvC
C ¼ iL f (vC ), (10:34) vD
dt
diL
L ¼ vC RiL þ V0 , (10:35) FIGURE 10.3 Characteristic of a tunnel diode.
dt
where iD ¼ f (vD) is the characteristic of the tunnel diode (see Figure 10.3).
If the behavior of the circuit is considered with respect to the timescale t : ¼ RC, then the differential
equations (Equations 10.34 and 10.35) can be reformulated as
dv
¼ i F(v), (10:36)
du
di
e ¼ v i þ 1, (10:37)
du
where
u : t=t
i : ¼ (R=V0) iL
v : ¼ vC=V0
e : L=(CR2)
F(v) : ¼ (R=V0) f(V0 v)
The behavior of the idealized circuit, where « ¼ 0 is often of interest. These types of descriptive equations
are called constrained equations or differential-algebraic equations (DAEs). The above discussed theory
of normal forms for vector fields cannot be applied directly to DAEs; however, a generalized theory is
available, as presented (with applications) in Refs. [24,25].
10.3 Dimensionless Forms of Circuit Equations

In Section 10.1, the problem of equivalence is considered in a rather complex manner by adopting the
mathematical point of view of dynamical systems. We use this approach in Section 10.6 to classify a
special class of nonlinear dynamical circuits. In

contrast to this approach, another kind of equiva-
lence of descriptive equations for linear time-
invariant circuits and for certain nonlinear cir-
C L R cuits is well known. It is illustrated by means of
a simple example. The RLC parallel circuit in
Figure 10.4, analyzed in the frequency domain,
can be described by its impedance
FIGURE 10.4 LCR circuit. 1

Z( jv) ¼ 1 : (10:38)
1=R þ j(vC vL )
In the case of small damping, this formula can be simplified using the so-called Q-factor that is
defined as the ratio of the current flowing through L (or C) to the current flowing through the
whole circuit in the case of resonance.
pffiffiffiffiffiffi The case of small damping is characterized by the condition
R=(2L) v0, where v0p:ffiffiffiffiffiffi
¼ 1 = LC (Thompson’s formula for LC circuits with R ¼ 0). The Q-factor
is given by Q : ¼ 1=(v0 RC ). Simple calculations lead to a so-called normalized impedance

~ Z 1 v v0 1
Z : ¼ ¼ 1 jQ (10:39)
R v0 v
that contains only two instead of three parameters. By using this method, a whole class of RLC circuits
may be described by the same normalized impedance and which can be ‘‘de-normalized’’ at a certain
frequency if a special filter application is considered. Therefore, an equivalence relation is defined in this
manner. Handbooks of filter design written for practical electrical engineers contain diagrams of those
and similar frequency curves of normalized impedances as well as admittances. Nor that the formula
(Equation 10.39) is exact, although the interpretation of the parameters Q and v0 depends on the
condition R=(2L) v0.
Methods for normalizing descriptive equations of circuits and for reducing the number of parameters
are known in linear and nonlinear circuit theory; see, e.g., Ref. [20]. Unfortunately, these methods are
stated without a presentation of their mathematisch reasoning. The main ideas for justification of
normalization procedures are based on the so-called dimensional analysis. Their first applications in
physics and the development of their mathematical foundations can be traced to the end of the
nineteenth century. In this section, we discuss only a few aspects of this subject. Interested readers
may find more details about the theory and applications of dimensional analysis as well as further
references in a paper of Mathis and Chua [50]. In this paper they demonstrated that for a complete
mathematical discussion of physical quantities, several algebraic concepts (e.g., Lie groups, etc.) are
needed. In this section, a concise introduction into dimensional analysis is preferred and therefore, an
intuitive introduction based on multiparameter Lie groups is presented. We use main ideas from the
monograph of Ovsiannikov [55].
For describing physical systems, suitable descriptive physical quantities are required that can be
measured. To perform a physical measurement of one of these quantities, we need at least one measuring
instrument that provides us with corresponding measuring values on its scale. This scale is calibrated
with respect to a standard cell. Therefore, an intuitive mathematical model of a physical quantity f
consists of two parts: a real number jfj that characterizes its value, and a symbol Ef that is due to the
standard cell. In general, a measuring instrument is composed of elementary measuring instruments to
evaluate, e.g., time or frequency, length, voltage, and charge. Each elementary instrument is calibrated
with a corresponding standard cell and, therefore, associated to the instrument. Entirely, an arbitrary
physical quantity f is defined by
f :¼ jfjE1l1 E2l2 Erlr , (10:40)
where
r is the number of elementary instruments for measuring f
lk determine how many times an elementary instrument have to be applied and whether the value on
the scale needs to multiplied or divided
The dimensionality of a physical quantity f is defined by
[f] :¼ E1l1 E2l2 Erlr , (10:41)
where r n such that a physical quantities is fully described by f ¼ j f j [f].

A physical quantity f is called dimensionless if its dimensionality is null, that is if l1 ¼ 0, l2 ¼ 0, . . . ,
lr ¼ 0. Moreover, a set of n physical quantities f1, f2, . . . , fn is called dependent (in the sense of their
dimensionality) if there exist integers x1, x2, . . . , xn (not all equal zero) such that the product of these
quantities
x x
f1 1 f2 2 fxnn (10:42)
is dimensionless. Otherwise f1 f2 fn are called independent.

The main problem of (physical) dimension theory is to determine how many independent physical
quantities are included in a set of n describing quantities, to find them, and then express the other
quantities in the set in terms of these independent quantities. As an application, a systematic procedure
to normalize physical descriptive equations can be given—instead a intuitive manner as considered
above.
In order to solve the main problem, the change of measuring instruments and measuring scales needs
to be introduced and modeled in a mathematical manner. Obviously, in terms of modeling physical
quantities, the same f can be represented in different ways. Using two sets of measuring instruments,
~ 1, E
denoted by E1, E2, . . . , Er and E ~ 2, . . . , E
~ r, respectively, f is given by
~E
jfjE1l1 E2l2 Erlr ¼ jfj ~1l~1 E
~2l~2 E
~rl~r , (10:43)
where in general r 6¼ p. This suggests the so-called analogy transformation (see Ref. [50]):
~1a1 E
Ek ¼ aa1 1 aak k E ~ ak , k ¼ 1, . . . , r: (10:44)
k
Transformations of the scales of measuring instruments—in the following denoted as scale transform-
ations—are special analogy transformations:
~k ,
Ek ¼ ak E k ¼ 1, . . . , r: (10:45)
It can be demonstrated that analogy transformations of dimension theory are special cases of the so-called
extension groups. These groups belong to the r-parameter Lie groups and, subsequently, all results of
dimension theory can be interpreted by theorems from this mathematical theory. Further details are
contained in Ref. [55]. To introduce the main ideas, we consider only scale transformations in this section.
Let Z : ¼ Rn 3 Rm be the Cartesian product of the set of n-column vectors x and m-column vectors y,
and let {e1, . . . , en} and {f1, . . . , fm}, be, respectively, arbitrary (but fixed) bases of these vector spaces.
Endowing Z with the structure of a direct sum Rn Rm, each z 2 Z can be represented by (with respect
to these bases)
X
n X
m
z¼ xi ei þ yk f k : (10:46)
i¼1 k¼1
An extension of Z (with respect to these bases) is defined by the transformation:
X
n X
m
h: z ! ci xi ei þ dk yk f k (ci > , dk > 0): (10:47)
i¼1 k¼1
Obviously, the set of all extensions generates an Abelian group of transformations on Z that is an
(n þ m)-parameter Lie group. this group is denoted by diag{ei, fk}. Any subgroup H diag{ei, fk} is called
an extension group of Z. We now consider extension groups Hr, with 0 < r
n þ m.
Ovsiannikov [55] demonstrated that extensions of Hr can be represented, choosing a parametric
group, in the form:
Y
r Y
r
(aa )la , ~yk ¼ yk (aa )ma ,
i k
~x i ¼ xi (10:48)
a¼1 a¼1
where
i ¼ 1, . . . , n
k ¼ 1, . . . , m
The main property of transformation groups is that they induce equivalence relations decomposing the
subjects on which the group acts into equivalence classes. If hp acts on elements x 2 X, and let p 2 Rp
the vector of parameters, an orbit U (x) of a point x 2 X is defined by the set U (x) :¼ {j 2 Xjj ¼ hp (x, p), for
all p 2 Rp}. In this sense, the points of an orbit can be identified by a transformation group. A transformation
group acts transitive on X if there exists an orbit U(x) that is an open subset of X, with U ¼ X.
To study the so-called local Lie groups with actions that are defined near a null neighborhood of the
parameter space (including the vector 0), we can discuss the Lie algebra that characterizes the local
behavior of the associated local Lie group. In finite dimensional parameter spaces, a Lie algebra is
generated by certain partial differential operators. Using the representations (Equation 10.48) of Hr, the
operators are of the form:
X
n
@ X
m
@
lia xi þ mk yk , (10:49)
i¼1
@xi i¼1 a @yk
where
i ¼ 1, . . . , n
k ¼ 1, . . . , m
These operators can be represented in a matrix form:
M(z) : ¼ M1 s diag{x1 , . . . , xn ; y1 , . . . , ym }, (10:50)
where
0 1
l11 ln1 ,m11 mm1
B .. . C
M1 : ¼ @ . .. A: (10:51)
l1r lnr ,m1r mm
r
Obviously, Hr is not transitive if r < n þ m.

In order to solve the main problem of dimension theory, we need to introduce invariants of a Lie
group. Let F : X ! Y be a function on X and let transformations hp of a transformation group act on X,
then F is an invariant of the group if F(hp(x)) ¼ F(x) holds for any x 2 X and p 2 Rp. The invariant J :
X ! Y is called a universal invariant if there exists, for any invariant F : X ! Y of the group, a function
F such that F ¼ F s J. The following main theorem can be proved for the extension group [55].
THEOREM 10.6
For the extension group Hr on Z, there exists a universal invariant J : Z ! Rn þ m r if the condition
r < n þ m is satisfied. The independent components of J have the monomial form:
Y
n t Y
u
m t
s
J t (Z) ¼ xi k yk k , (10:52)
i¼1 k¼1
where t ¼ 1, . . . , n þ m r.
If dimensional analysis considers only scale transformations (Equation 10.45), this theorem contains the
essential result of the so-called Pi-theorem. For this purpose we present a connection between the
dimensionalities and the extension group Hr (see Ref. [55]). The group Hr of the space Rn, defined
only be the dimensions of the physical quantities fk with respect to the set of symbols {Ea}, has a one-to-
one correspondence with every finite set {fk} of n physical quantities, which can be measured in the
system of symbols {Ea} consisting of r independent measurement units; see Equation 10.43. The
transformations belonging to the group Hr give the rule of change in the form
Y
r
~ ¼ jfj
jfj (aa )la (10:53)
a¼1
of the numerical values jfkj as a result of the transition from the units {Ea} to {E ~ a} by means of
Equation 10.45.
As a consequence of this relationship, a quantity f is dimensionless if and only if its numerical value
is an invariant of the group Hr. Thus, the problem to determine the independent physical quantities
of a given set of quantities is solved by the construction of a universal invariant of Hr stated by the
Pi-theorem; see also Ref. [7]. Normalization as well as the popular method of dimension comparison, are
consequences of the invariance of physical equations with respect to the group of analogy (scale)
transformations. In applications of dimensional theory, a normal form that has certain advantageous
properties is desired. For example, it is useful to reduce the number of parameters in physical equations.
Normal forms of this type are used very often in practical calculations, but with no clarification of their
mathematical foundations.
Circuit equations, similar to other physical equations, contain numberous parameters. In applications,
it is often desired to suppress some of these parameters and moreover, they should be replaced by the
numerical value 1.
For this purpose, Desloge [26] chooses a new system of units {Ea}. A theory of Desloge’s method,
based on analogy transformation (Equation 10.44) instead of scale transformation (Equation 10.45), was
presented by Mathis and Chua [50]. The main idea behind this method is that, beside the foundation
units time [T], voltage [E], and charge [Q] that are useful in circuit theory, the units of other parameters
are considered as foundational units. We denote the units by [Aa] instead of Ea. For example, in the case
of the tunnel-diode circuit (see Figure 10.2), [T], [E], and [Q], as well as [R], [C], and [L], need to be
discussed. As a consequence of Desloge’s method, three of the four parameters can be suppressed and the
other variables will be normalized. The method works in the case of linear as well as nonlinear circuits.
The method is illustrated using the tunnel-diode circuit equations (Equations 10.34 and 10.35). At
first, the dimensional matrix is determined by
[T] [E] [Q]

0 1
[R] 1 1 1
B C (10:54)
[L] @ 2 1 1 A
[C] 0 1 1
that characterizes the relation between the dimensions of t, v, q, R, C, and L.

Now, Desloge considers another set of power independent dimensional scalars A1, A2, and A3 with
1 1 3
[Ai ] ¼ [T]ai [E]ai 2 [Q]ai , i ¼ 1, 2, 3: (10:55)
These relations are interpreted as an analogy transformation (Equation 10.44). Applying the map L()
that has the same properties as the logarithmic function (see Ref. [50]) to Equation 10.55, the symbols L
([A1]), L([A2]), and L([A3]) are represented by linear combinations of L([T]), L([E]), L([Q]). The
coefficient matrix in Equation 10.55 is regular and contains the exponents. Solving these linear equations
using ‘‘antilog,’’ the [T], [E], and [Q] are products of powers of [A1], [A2], and [A3]. In this manner,
dimensionsless versions of differential equations of the tunnel-diode circuit can be derived.
By using the independent units A1 :¼ L, A2 :¼ C, and A3 :¼ V0 to replace their values jV0j, jLj, and jCj
by 1 (with respect to the new units), the following equation is derived by Desloge’s approach sketched
previously
[T] [E] [Q]

0 10 1 0 1
[V0 ] 0 1 0 lnð[T]Þ lnð[V0 ]Þ
B CB C B C (10:56)
[L] @ 2 1 1 A@ lnð[E]Þ A ¼ @ lnð[L]Þ A:
[C] 0 1 1 lnð[Q]Þ lnð[C]Þ
Multiplying Equation 10.56 by the inverse of the dimensional matrix
[V0 ] [L] [C]

0 1
[T] 0 1=2 1=2
B C (10:57)
[E] @ 1 0 0 A
[Q] 1 0 1
and applying ‘‘antilog’’ to the result, we obtain
[T] ¼ [L]1=2 [C]1=2 , [E] ¼ [V0 ], [Q] ¼ [V0 ] [C]: (10:58)
From these equations, the relations between the old and new units can be derived; see Ref. [50]. T, E, and
Q are expressed by the new units L, C, and V0 and the parameters and variables in Equations 10.34 and
10.35 can be reformulated if the numerical values of V0, L, and C are added
T ¼ jLj1=2 jCj1=2 L1=2 C1=2 , E ¼ jV0 j1 V0 , Q ¼ jV0 j1 jCj1 V0 C: (10:59)
These relations represent parameters and variables of the tunnel-diode circuit with respect to the new
quantities
jRjjCj1=2
R¼ L1=2 C 1=2 , V0 ¼ 1 V0 , L ¼ 1 L, C ¼ 1 C, (10:60)
jLj1=2
jiL jjLj1=2 jvC j jtj

iL ¼ V0 L1=2 C 1=2 , vC ¼ V0 , t¼ L1=2 C 1=2 : (10:61)
jV0 jjCj1=2 jV0 j jLj1=2 jCj1=2
The dimensional exponents for these quantities can be found by using the inverse dimensional matrix
(Equation 10.57):
1. T, E, Q: their exponents correspond the associated rows of Equation 10.57
2. V0, L, C, R: premultiply Equation 10.57 with the corresponding row of Equation 10.54
D
For example, taking [C] ¼ (0 11) results in
0 [V0 ] [L] [C] 1

[T] [E] [Q] [T] 0 1=2 1=2 [V0 ] [L] [C]
[C] ( 0 1 1 ) [E] @ 1 0 0 A ¼ [C] ( 0 0 1 ) (10:62)
[Q] 1 0 1
D
or with the corresponding row [R] ¼ (11 1) of Equation 10.54
0 [V0 ] [L] [C] 1

[T] [E] [Q] [T] 0 1=2 1=2 [V0 ] [L] [C]
[R] ( 1 1 1) [E] @ 1 0 0 A ¼ [R] ( 0 1=2 1=2): (10:63)
[Q] 1 0 1
With these representations of the dimensional quantities, we can obtain a dimensionless representation
of Equations 10.34 and 10.35
dvC
¼ iL f (vC ), (10:64)
dt
diL pffiffiffi
¼ 1 eiL vC , (10:65)
dt
where
jvC j jtj pffiffiffi jRjjCj1=2 jiL jjLj1=2

vC : ¼ , t : ¼ pffiffiffiffiffiffiffiffiffiffiffi , e :¼ , iL : ¼ : (10:66)
jV0 j jLjjCj jLj1=2 jV0 jjCj1=2
Furthermore, the dimensionless tunnel-diode current f is defined by
f (vC ) : ¼ V 1 L1=2 C 1=2 f (V0 vC ): (10:67)

0
The associated dimensionless form of Equations 10.36 and 10.37 can be derived by another scaling of the
pffiffiffi
current îL : ¼ eiL . Obviously, the dimensionless normal form is not unique.
The classical dimensional analysis shows that R2C=L is the only dimensionless constant of the
quantities in Equations 10.34 and 10.35. Because the describing equations of the parallel LCR circuit
include the same variables constants, the results of the previous dimensional analysis of the tunnel-diode
circuit can be used to normalize Equation 10.38.
Further interesting applications of Desloge’s approach of suppressing superfluous parameters in the
describing equations can be found in the theory of singular perturbation analysis. The reader is referred,
e.g., to the monograph of Smith [57] for further details. Miranker [53] demonstrated that the differential
pffiffiffiffiffiffiof the tunnel-diode circuit can be studied on three timescales t1 : ¼ L=R, t2 : ¼ RC, and
equations
t3 : ¼ LC where different phenomena arise. If these phenomena are known, corresponding timescales
can be written down. However, since all dimensionless equations can be derived in a systematic manner
using Desloge’s approach also the corresponding timescales result. In this way, e.g., all normalized
differential equations describing Chua’s circuit (see Ref. [42]) can be obtained but other representations
of these differential are possible using dimensional analysis.
10.4 Equivalence of Nonlinear Resistive n-Ports

In this section, we only consider equivalence of nonlinear resistive n-ports; however, resistive circuits
without accessible ports will not be included in the discussion. Although the explanations that follow are
restricted to resistive n-ports, this theory can be easily extended to pure capacitive and inductive n-ports;
see Ref. [23]. In Section 10.5, we give a definition of those n-ports.
At first, we consider linear resistive 1-ports that contain Ohmic resistors described by vk ¼ Rkik
or=and ik ¼ Gkuk, and independent current and voltage sources vk ¼ V0k and ik ¼ I0k . We can use
Helmholtz–Thevenin’s or Mayer–Norton’s theorem [40,51] to compare any two of those 1-ports and
reduce a complex 1-port to a more simple ‘‘normal’’ form. Therefore, two of those 1-ports are called
equivalent if they have the same Helmholtz–Thevenin or Mayer–Norton resistor-source 1-port repre-
sentation. Clearly, by this approach, an equivalence relation is defined in the set of linear resistive
1-ports and it is decomposed into ‘‘rich’’ classes of 1-ports. To calculate these normal forms,
D-Y and=or Y-D transformations are needed; see Refs. [20,51]. It is known that this approach is not
applicable to nonlinear resistive networks because, e.g., D-Y and=or Y-D transformations generally do
not exist for nonlinear networks. This was observed by Millar [52] for the first time. Certain circuits
where these transformations can be performed were presented by Chua [14]. More recently, Boyd and
Chua [5,6] clarified the reasons behind this difficulty from the point of view of Volterra series. As a
conclusion, the set of nonlinear resistive 1-ports can be decomposed into equivalence classes, but no
reasonable large classes of equivalent 1-ports exist. More general studies of this subject are based on the
well-known substitution theorem, which can be used successfully in a certain class of nonlinear
circuits. A detailed discussion of the classical substitution theorem can be found in Refs. [27,57] and
in an abstract setting in Refs. [33,56]. Some results applicable to 1-ports can be generalized to linear
resistive n-ports (extraction of independent sources), but this point of view is not suited for
nonlinear resistive n-ports.
Better understanding of nonlinear resistive n-ports and the problem of equivalence cannot be based on
the ‘‘operational’’ approach mentioned earlier. Instead, a geometrical approach that was developed by
Brayton and Moser [9] is more useful. These authors (see also Ref. [8]) characterize a resistive n-port in a
generic manner by n independent relations between the 2n port variables, n-port currents i1, . . . , in, and
n-port voltages u1, . . . , un. Geometrically, this means that in the 2n-dimensional space of port variables,
the external behavior of a resistive n-port can be represented generically by an n-dimensional surface.
The classical approach formulates a system of equations by
y1 f1 (x1 , . . . , xn ) ¼ 0,
.. (10:68)
.
yn fn (x1 , . . . , xn ) ¼ 0,
where x’s and y’s are the port variables. The zero set of equations (Equation 10.69) corresponds to the
n-dimensional surface. Therefore, two n-ports are called equivalent if they are different parametrizations
of the same n-port surface. As an application of this point of view, Brayton and Moser [9] demonstrated
that a 2-port consisting of a Y-circuit and a circuit consisting of a D-circuit cannot be equivalent, in
general. For example, they proved by means of Legendre transformations that a Y-circuit with two
Ohmic resistors and a third resistor can be equivalent to a D-circuit if and only if the third resistor is also
linear. Therefore, the operational approach is not a very useful equivalence concept for nonlinear n-ports.
The subject of synthesizing a prescribed input–output behavior of nonlinear resistive n-ports is closely
related to the problem of of equivalence. Several results were published in this area using ideal diodes,
resistors with a concave and convex characteristic, dc voltage and current sources, ideal op-amps, and
controlled sources. Therefore, we give a short review of some of these results. On the other hand we do
not consider the synthesis of resistive n-ports.
Although the synthesis of nonlinear resistive n-ports was of interest to many circuit designers since the
beginning of twentieth century, the first systematic studies of this subject based on previous studies of
Millar [52] were published by Chua [13,14]; see, e.g., Itoh [37] for more recent aspects of nonlinear
circuit synthesis. Chua’s synthesis approach based on the introduction of new linear 2-ports (R-rotators,
R-reflectors, and scalors) as well as their electronic realizations. Now, curves in the i–v space of port
current i and port voltage v that characterize a (nonlinear) resistive 1-port can be reflected and scaled in a
certain manner. Chua suggested that a prescribed behavior of an active or passive nonlinear resistive
1-port can be reduced essentially to the realization of passive i–v curves. Piecewise-linear approximations
of characteristics of different types of diodes, as well as the previously mentioned 2-ports, are used to
realize a piecewise-linear approximation of any prescribed passive i–v curve. In another article, Chua [15]
discussed a unified procedure to synthesize a nonlinear dc circuit mode that represents a prescribed
family of input and output curves of any strongly passive 3-terminal device (e.g., a transistor). It was
assumed that the desired curves are piecewise-linear. Since then, this research area has grown very
rapidly and piecewise-linear synthesis and modeling has become an essential tool in the simulation of
nonlinear circuits; see Refs. [19,34,39,41].
10.5 Equivalence of Nonlinear Dynamical n-Ports

In this section, we consider more general n-ports that can be used for device modeling; see Ref. [16].
Although many different lumped multiterminal and multiport circuits are used, a decomposition into two
mutually exclusive classes is possible: algebraic and dynamic multiterminal and multiports. Adopting the
definition of Chua [16], an (n þ 1)-terminal of n-port circuit is called an algebraic element if and only if
its constitutive relations can be expressed symbolically by algebraic relationships involving at most two
dynamically independent variables for each port. In the case of an 1-port, a so-called memristor is
described by flux and charge, a resistor by voltage and current, an inductor by flux and current, and a
capacitor by voltage and charge. An element is called a dynamic element if and only if it is not an
algebraic element.
Despite the fact that the class of all dynamic elements is much larger than that of algebraic ones, the
following theorem of Chua [16] suggests that resistive multiports are essential for dynamic elements, too.
THEOREM 10.7
Every lumped (n þ 1)-terminal or n-port element can be synthesized using only a finite number n of linear
2-terminal capacitors (or inductors) and one (generally nonlinear) (n þ m)-port resistor with n accessible
ports and m ports for the capacitors.
This theorem demonstrates that any n-port made of lumped multiterminal and=or multiport elements is
equivalent to a multiterminal network where all of its nonlinear elements are memoryless. This fact offers
a possibility to classify (n þ 1)-terminal and n-port elements in an operational manner.
The proof of this theorem provides the answer of a fundamental question: what constitutes a minimal
set of network elements from which all lumped elements can be synthesized?
THEOREM 10.8
The following set M of network elements constitutes the minimal basic building blocks in the senses that
any lumped multiterminal or multiport element described by a continuous constitutive relation on any
closed and bounded set can be synthesized using only a finite number of elements of M , and that this
statement is false if even one element is deleted from M :
1. Linear 2-terminal capacitors (or inductors)
2. Nonlinear 2-terminal resistors
3. Linear 2-port current-controlled voltage sources (CCVS) defined by v1 ¼ 0 and v2 ¼ ki1
4. Linear 2-port current-controlled current sources (CCCS) defined by i1 ¼ 0 and i2 ¼ ~kv1
The proof of Theorem 10.8 (see Ref. [16]) is based on a remarkable theorem of Kolmogoroff, which asserts
that a continuous function f: Rn ! R can always be decomposed over the unit cube of Rn into a certain sum
of functions of a single variable. Although the proof of Theorem 10.8 is constructive, it is mainly of
theoretical interest since the number of controlled sources needed in the realization is often excessive.
10.6 Equivalence of Reciprocal Nonlinear Dynamic Circuits

As already mentioned in Section 10.1, a certain set of circuits can be decomposed into classes of
equivalent circuits by some type of equivalence relation. Such equivalence relations are introduced in a
direct manner with respect to the descriptive equations, using a transformation group of classifying the
behavior of the solution of the descriptive equations. In the last few sections, several useful ideas for
defining equivalence relations were discussed that can be suitable for circuit theory. In this section
equivalent dynamical circuits are considered in more detail. It should be emphasized again that
equivalence has a different meaning depending of the applied equivalence relation.
As the so-called state-space equations in circuit and system theory arose in the early 1960s, a first type
of equivalence was defined because various circuits can be described by the same state-space equations.
Of course, from this observation an equivalence relation is induced; see Ref. [61] for further references.
Although this approach is interesting, in some cases different choices of variables for describing non-
linear circuits exist that need not lead to equivalent state-space equations; see, e.g., Ref [17]. In other
words, the transformations of coordinates are not well conditioned. This approach was applied also to
nonlinear input–output systems.
If we consider nonlinear reciprocal circuits, the Brayton–Moser approach [9] to formulate the
describing equations for this class of circuits is very suitable; see also Ref. [48]. In order to formulate a
generalized type of state-space equations, Brayton and Moser used a so-called mixed-potential function
P. P depends on the capacitor voltages v and the inductor currents i where the vector field of the circuit
equations can be derived by partial derivatives. The Brayton–Moser equations can be formulated in the
following manner:
dv @P di @P
C(v) ¼ (v, i), L(i) ¼ (v, i): (10:69)
dt @v dt @i
A discussion of the Brayton–Moser equations from a point of view of constrained differential equation in
a differential geometric setting can be found in Ref. [46]. A very general concept of constructing mixed-
potential functions is presented by Weiss et al. [60]. In the following, we consider the equivalence concept
for reciprocal nonlinear dynamical circuits based in Brayton–Moser equations where Varaiya and Verma
[58] included external ports (input–output description). For this purpose they use a more compact form
of the Brayton–Moser where the generalized state vector x :¼ (v, i) and the coefficient matrix A :¼ diag
(C(v), L(i)) is introduced. It should be noted that another geometric approach for nonlinear dynamical
input–output circuits is available based on Hamiltonian equations with external ports—the so-called port
Hamiltonian equations—where a so-called Dirac structure is used for energy preserving interconnec-
tions. With respect to this concept, the reader is referred to the literature; see recent publications of
Maschke [47] and can der Schaft [12]) and the cited older publications.
The input–output circuit description of Verma [59] is formulated in the following manner: Let x 2 Rn
the state-space vector, u 2 Rm the input vector, and e 2 Rm the output vector, then the Brayton–Moser
type state-space equations can be generated by a matrix-valued function A(x): Rn ! Rn3n and a real-
valued function P: Rn 3 Rm ! R
dx @P
A(x) ¼ (x, u), (10:70)
dt @x
@P
e¼ (x, u): (10:71)
@u
For two such circuits N1 ¼ {A1, P1} and N2 ¼ {A2, P2}, Varaiya and Verma [58] defined the following
equivalence concept.
Definition 10.4: Two Brayton–Moser type circuits N1 and N2 with the outputs e1 ¼ @P1=@u and
e2 ¼ @P2=@u are input–output equivalent if there exists a diffeomorphism Q with y ¼ Q(x), such that for
all x0 2 Rn, all input functions u, and all t 0 the following assumptions are satisfied
1. Q(x(t, x0, u)) ¼ y(t, Q(x0), u)

2. e1(t, x0, u) ¼ e2(t, Q (x0), u)
The diffeomorphism Q is called the equivalence map.
Thus, two circuits are equivalent if their external behavior is identical, i.e., if for the same input and
corresponding states they yield the same output. It is clear that this definition results an equivalence
relation on the set of all dynamical circuits under consideration. In their paper, Varaiya and Verma [58]
showed that, under the additional assumption of controllability, the diffeomorphism Q establishes an
isometry between the manifold with the (local) pseudo-Riemannian metric (dx, dx) : ¼ hdx, A1 dxi and
the manifold with the (local) pseudo-Riemannian metric (dy, dy) : ¼ hdy, A2 dyi in many interesting
cases of nonlinear reciprocal circuits. This statement has an interesting interpretation in the circuit
context. It can be proven that Q must relate the reactive parts of the circuits N1 and N2 in such a way that,
if N1 is in the state x and N2 is in the state y ¼ Q(x), and if the input u is applied, then

di di dv dv d~i ~ ~ d~i d~
v ~ d~v
, L(i) , C(v) ¼ , L(i) , C(~v) : (10:72)
dt dt dt dt dt dt dt dt
The concept of equivalence defined in a certain subset of nonlinear dynamic circuits with input and
output terminals given by Varaiya and Verma [58] is based on diffeomorphic coordinate transformations
1
G= iR
R
R0
C1 VC1 VC2 C2 VR
L
iL
FIGURE 10.5 Modified Chua’s circuit.
(the transformation group of diffeomorphisms). Unfortunately, the authors present no ideas about the
kind of ‘‘coarse graining’’ produced in this set of circuits by their equivalence relation. However, a
comparison to Ck conjugacy or Ck equivalence of vector fields in Section 10.1 implies that input–output
equivalence leads to a ‘‘fine’’ decomposition in the set of Brayton–Moser input–output circuits. To
classify the main features of the dynamics of circuits, the concept of topological equivalence (the
transformation group of homeomorphisms) is useful. On the other hand, in the case of circuits with
nonhyperbolic fixed points, the group of diffeomorphisms is needed to distinguish the interesting
features. An interesting application of C1 equivalence of vector fields is given by Chua [18]. To compare
nonlinear circuits that generate chaotic signals, Chua applied the concept of equivalence relation and
concluded that the class of circuits and systems that are C1 equivalent to Chua’s circuit (see Figure 10.5)
is relative small. The nonlinearity in this circuit is described by a piecewise-linear i–v characteristic; see
Ref. [42] for further details. The equations describing Chua’s circuit are
dvC1 1
¼ ½G(vC2 vC1 ) f (vC1 ), (10:73)
dt C1
dvC2 1
¼ ½G(vC1 vC2 ) þ iL ), (10:74)
dt C2
diL 1
¼ ½vC2 R0 iL ), (10:75)
dt L
where R0 ¼ 0 and the piecewise-linear function is defined by (Ga, Gb, E suitable constants)
1
f (vC1 ) : ¼ Gb vC1 þ (Ga Gb )ðjvC1 þ Ej jvC1 EjÞ: (10:76)
2
Chua’s extended approach to study the set of the piecewise-linear circuits that includes Chua’s circuit
introduces the concept of global unfoldings. This concept can be considered as an analogy to the theory
of ‘‘local unfoldings’’ of nonhyperbolic systems in a small neighborhood of singularities [3,30].
Heuristically, a minimum number of parameters in a given nonhyperbolic system is obtained. Chua
demonstrated that Chua’s circuit with arbitrary R0 6¼ 0 can be considered as an ‘‘unfolding’’ of the
original circuit. Furthermore, he proved that a class of circuits that can be described without any loss of
generality by
x_ ¼ Ax þ b, x1
1 (10:77)
¼ Ax, 1
x1
þ1 (10:78)
¼ Ax þ b, x1 þ1 (10:79)
is equivalent to the unfolded Chua’s circuit if certain conditions are satisfied. In the associated parameter
space, these conditions defined a set of measure zero. The proof of this theorem as well as some
applications are included in Ref. [18].
The ideas of normal forms presented in Section 10.2 can be applied to nonlinear circuits with
hyperbolic and nonhyperbolic fixed points. A similar theory of normal forms of maps can be used to
study limit cycles, but this subject is beyond our scope; see Ref. [3] for further details. In any case the
vector field has to be reduced to lower dimensions and that can be achieved by the application of the so-
called center manifold theorem. Altman [1] illustrated this approach by calculating the center manifold
of Chua’s circuit equations and its normal form in a tutorial style. To perform the analytical computa-
tions the piecewise nonlinearity (Equation 10.78) is replaced by a cubic function f(x) ¼ c0x þ c1x3. Based
on this normal form, Altman studied bifurcations of Chua’s circuits.
In the following, we describe applications of normal form theory from Section 10.2 to decompose
nonlinear dynamical circuits at an arbitrary fixed point into nondynamical and dynamical parts; a sketch
of this concept is presented by Keidies and Mathis [43]. In this section we restrict ourself to nonlinear
dynamical circuits with constant sources where the describing equations are formulated in a state-space
form:
x_ ¼ f(x), f: Rn ! Rn , (10:80)
where all nonlinear reactances are replaced by linear reactances, nonlinear resistors, and linear controlled
sources; see, e.g., Ref. [20]. It is assumed that all nonlinearities are polynomial functions and can be
interpreted as nonlinear controlled sources. It can be assumed that the circuit is decomposed into a linear
part that consists of linear reactances and resistive elements, and the nonlinear controlled sources. In
other words, the RHS f of Equation 10.82 can be reformulated in the form f(x) ¼ Ax þ ~f(x); a block
diagram is shown in Figure 10.6. Now, the normal form theorem is applied to transform the nonlinear
controlled sources to the input. It is known from Section 10.2 that all nonresonant parts of ~f(x) can be
eliminated until a prescribed order k if the associated homological equation is satisfied. Therefore, after a
nearly identity transformation (Equation 10.15) the normal form of the nonresonant part can be
described by (see Figure 10.6)
y_ ¼ Ay, x ¼ y þ h(y): (10:81)
For this decomposition we have to define the nonresonant and resonant terms of the vector field where
the eigenvalues of the linear part A of f and the degree of the polynomial nonlinearities must be studied.
Linear
Snl =
fnl (X1, ..., Xn)
dynamic Xi
network
Source Snl nonresonent Source Snl resonant

Normal form
transformation
Linear Linear
Sres =
dynamic Yi Xi dynamic Xi
fnl (X1, ..., Xn)
network trafo network
Snl
FIGURE 10.6 Decomposition of nonlinear dynamic circuits.

iNL = vC1vC2 G1 C1 vC1
G2 C2 vC2
FIGURE 10.7 Decomposition of a simple nonlinear dynamic circuits.
+ +
~ 1 ~v 4 ~ ~ ~
vC vC 1 v 3C2 vC 1 ~v 2C2 G1 C1 v~C1 vC1
18 C2 14 12 1 v~ v~
2 C1 C 2
– –
–+
+ +
~
G2 C2 vC 2 vC2
– –
FIGURE 10.8 Decomposition
Under certain conditions, a finite recursive process exists, such that all nonlinear controlled sources can
be transformed to the input of the linear part of the circuit under consideration. In these cases, the
circuits are described by Equation 10.83 and the corresponding block diagram is shown on the left-hand
side in Figure 10.6. If resonant terms occur, a number of additional sources are generated by means of a
recursive process. In these cases the controlled cannot transforme to the input what is shown on the
right-hand side of Figure 10.6. In order to illustrate these statements, a simple example is presented in
Figure 10.7. After a nearly identity transformation, a reduction of the nonresonant terms, and the
recursive process with respect to the resonant terms, the decomposed circuit is shown in Figure 10.8.
Therefore, this application of normal form theorems in circuit analysis can be interpreted as a kind
of extraction of nonlinear controlled sources from a nonlinear dynamic circuit. Finally it should be
mentioned that this decomposition based on the normal form theorem is related in a certain sense to
the so-called exact linearization that is studied in the theory of nonlinear control systems; see, e.g.,
Refs. [36,54].
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11
Piecewise-Linear
Circuits and Piecewise-
Linear Analysis
11.1 Introduction and Motivation .............................................. 11-1
11.2 Hierarchy of Piecewise-Linear Models and Their
Representations ...................................................................... 11-3
11.3 Piecewise-Linear Models for Electronic Components... 11-8
11.4 Structural Properties of Piecewise-Linear
Resistive Circuits.................................................................. 11-14
11.5 Analysis of Piecewise-Linear Resistive Circuits ............ 11-15
Theorem Canonical PWL (Tableau Analysis) . Algorithm
11.6 Piecewise-Linear Dynamic Circuits................................. 11-18
Joos Vandewalle 11.7 Efficient Computer-Aided Analysis
Catholic University of Leuven
of PWL Circuits ................................................................... 11-19
Lieven Vandenberghe Acknowledgment ............................................................................. 11-20
University of California, Los Angeles References .......................................................................................... 11-20
11.1 Introduction and Motivation

In this chapter, we present a comprehensive description of the use of piecewise-linear (PWL) methods in
modeling, analysis, and structural properties of nonlinear circuits. The main advantages of piecewise-
linear circuits are fourfold. (1) Piecewise-linear circuits are the easiest in the class of nonlinear circuits to
analyze exactly, because many methods for linear circuits can still be used. (2) The piecewise-linear
approximation is an adequate approximation for most applications. Moreover, certain operational
amplifier (op-amp), operational transconductance amplifier (OTA), diode and switch circuits are essen-
tially piecewise linear. (3) Quite a number of methods exist to analyze piecewise-linear circuits. (4) Last,
but not least, piecewise-linear circuits exhibit most of the phenomena of nonlinear circuits while still
being manageable. Hence, PWL circuits provide unique insight in nonlinear circuits.
This chapter is divided into six sections. First, the piecewise-linear models will be presented and
interrelated. A complete hierarchy of models and representations of models is presented. Rather than
proving many relations, simple examples are given. Second, the piecewise-linear models for several
important electronic components are presented. Third, since many PWL properties are preserved by
interconnection, a short discussion on the structural properties of piecewise-linear circuits is given in
Section 11.4. Fourth, analysis methods of PWL circuits are presented, ranging from the Katzenelson
algorithm to the linear complementarity methods and the homotopy methods. Fifth, we discuss PWL
dynamic circuits, such as the famous Chua circuit, which produces chaos. Finally, in Section 11.7, efficient
11-1
General General Circuit

Approximation circuit with with linear
resistive
nonlinear PWL modeling resistive PWL resistors
circuits components and ideal diodes
Network Network Network

equation equation equation
formulation formulation formulation
Generalized
Nonlinear Linear equations
linear
algebraic in polyhedral
complementary
equations regions
equation GLCP
Iterative
equation
solving One or more
solutions
(a)
General DC analysis General

dynamic resistive
piecewise linear piecewise linear
circuits circuits
Network Network
equation equation
formulation formulation
Set of piecewise Set of piecewise

linear differential linear algebraic
equations equations
Solving Solving
One or more
Waveforms equilibrium
or DC value
(b)
FIGURE 11.1 Interrelation of PWL circuit analysis methods: (a) resistive and (b) dynamic nonlinear circuits.
computer-aided analysis of PWL circuits and the hierarchical mixed-mode PWL analysis are described.
A comprehensive reference list is included. For the synthesis of PWL circuits, we refer to Chapter 8.
In order to situate these subjects in the general framework of nonlinear circuits, it is instructive to
interrelate the PWL circuit analysis methods (Figure 11.1). In the horizontal direction of the diagrams,
one does the PWL approximation of the dc analysis from left to right. In the vertical direction, we show
the conversion from a circuit to a set of equations by network equation formulation and the conversion
Piecewise-Linear Circuits and Piecewise-Linear Analysis 11-3
from equations to solutions (waveforms or dc values) by solution methods. The specific methods and
names used in the figure are described in detail in the different parts.
11.2 Hierarchy of Piecewise-Linear Models

and Their Representations
In the past 25 years, much progress has been achieved in the representations of piecewise-linear resistive
multiports and their relationships (see Refs. [1,2]). From a practical point of view, a clear trade-off exists
between the efficiency of a representation in terms of the number of parameters and the ease of
evaluation (explicit versus implicit models) on the one hand and the generality or accuracy on the
other hand. Here, we go from the easiest and most efficient to the most general representations.
We define here a resistive multiport (Figure 11.2) as an n-port whose port variables (the vector of port
currents i ¼ [i1, . . . , in]T and the vector of port voltages v ¼ [v1, . . . , vn]T) are related by m algebraic
equations called constitutive equations
w(i, v) ¼ 0 (11:1)
where i, v 2 Rn and f(.,.) maps R2n into Rm.

For example, for a bipolar transistor (Figure 11.3), one obtains the explicit form i1 ¼ f1 (v1, v2) and
i2 ¼ f2 (v1, v2), and i ¼ [i1, i2]T and v ¼ [v1, v2]T. These relations can be measured with a curve tracer as dc
characteristic curves. Clearly, here f(.,.) is a map from R4 ! R2 in the form
i1 f1 (v1 , v2 ) ¼ 0 (11:2)
i2 f2 (v1 , v2 ) ¼ 0 (11:3)
It is easy to see that a complete table of these relationships would require an excessive amount of
computer storage already for a transistor. Hence, it is quite natural to describe a resistive n-port with a
piecewise-linear map f over polyhedral regions Pk by
v ¼ f (i) ¼ ak þ Bk i, i 2 Pk , k 2 {0, 1, . . . , 2l 1} (11:4)
where the Jacobian Bk 2 Rn 3 n and the offset vector ak 2 Rn are defined over the polyhedral region Pk,
separated by hyperplanes cTi x di ¼ 0, i ¼ 1, . . . , l and defined by
n o
Pk ¼ x 2 Rn jcTj x dj 0, j 2 Ik , cTj x dj 0, j 62 Ik (11:5)
i1
+ i1 i2
v1
+ +
–
G
v1 v2
in
+
vn – –
–
FIGURE 11.3 Two-port configuration of a
FIGURE 11.2 Resistive n-port. bipolar transistor.
FIGURE 11.4 PWL function defined in four polyhedral regions in Rn defined by cT1 i d1 9 0 and cT2 i 0 d2 > 0.
where
k ¼ Sj2Ik 2j1
Ik {1, 2, . . . , l}
cj 2 Rn, dj 2Rn
In other words, the hyperplanes cTi x di ¼ 0, i ¼ 1, . . . , l separate the space Rn into 2l polyhedral
regions Pk (see Figure 11.4) where the constitutive equations are linear.
The computer storage requirements for this representation is still quite large, especially for large
multiports. A more fundamental problem with this rather intuitive representation is that it is not
necessarily continuous at the boundaries between two polyhedral regions. In fact, the continuity of the
nonlinear map is usually desirable for physical reasons and also in order to avoid problems in the
analysis.
The canonical PWL representation [6] is a very simple, attractive, and explicit description for a
resistive multiport that solves both problems:
X
l

v ¼ f (i) ¼ a þ Bi þ ej cTj i dj (11:6) y = |x|
j¼1
One can easily understand this equation by looking at the

wedge form of the modulus map (see Figure 11.5). It has two
linear regions: in the first x 0 and y ¼ x, while in the
second x 0 and y ¼ x. At the boundary the function is
x
clearly continuous. Equation 11.6 is hence also continuous
and is linear in each of the polyhedral regions Pk described
by Equation 11.5. If l modulus terms are in Equation 11.6, FIGURE 11.5 Absolute value function
there are 2l polyhedral regions where the map Equation 11.6 y ¼ jxj.
i is linear. Because the map is represented canonically with

n þ n2 þ l(n þ 1) real parameters, this is a very compact
and explicit representation.
+ Several examples of canonical PWL models for compon-
v ents are given in Section 11.3.
v
0 From Figure 11.5, it should be clear that the right and left
– derivative of y ¼ jxj at 0 are different, their difference being
(a) (b)
2. Hence, the Jacobian Jþ and J of Equation 11.6 will be
different on the boundary between the two neighboring
FIGURE 11.6 (a) The ideal diode and (b) the polyhedral regions where (cji dj) 0 and (cji dj) 0.
(iv) relation of an ideal diode.
Jþ J ¼ 2ej cTj (11:7)
Observe that this difference is a rank 1 matrix, which is also called a dyadic or outer vector product of ej
and cj. Moreover, this difference is independent of the location of the independent variable i on the
boundary. This important observation is made in Ref. [24], and is called the consistent variation property
[10] and essentially says that the variation of the Jacobian of a canonical PWL representation is
independent of the place where the hyperplane cji dj ¼ 0 is crossed. Of course, this implies that the
canonical PWL representation (Equation 11.6) is not the most general description for a continuous
explicit PWL map. In Refs. [26,29] two more general representations, which include nested absolute
values, are presented. These are too complicated for our discussion.
Clearly, the canonical PWL representation (Equation 11.6) is valid only for single-valued functions. It
can clearly not be used for an important component: the ideal diode (Figure 11.6) characterized by the
multivalued (i, v) relation. It can be presented analytically by introducing a real scalar parameter r [31].
1
i ¼ ðr þ jrjÞ (11:8)
2
1
v ¼ ðr jrjÞ (11:9)
2
This parametric description can easily be seen to correspond to Figure 11.6b because i ¼ r and v ¼ 0 for
r 0, while i ¼ 0 and v ¼ r when r 0. Such a parametric description i ¼ f(r) and v ¼ g(r) with f and g
PWL can be obtained for a whole class of unicursal curves [6].
When we allow implicit representations between v and i for a multiport, we obtain a linear comple-
mentarity problem (LCP) model Equations 5.10 through 5.12 with an interesting state space like form [55]:
v ¼ Ai þ Bu þ f (11:10)
s ¼ Ci þ Du þ g (11:11)
u 0, s 0, uT s ¼ 0 (11:12)
where A 2 Rn 3 n, B 2 Rn 3 l, f 2 Rn 3 n, c 2 Rl 3 n, D 2 Rl 3 l are the parameters that characterize the

relationship between v and i. In the model, u and s are called the state vectors and we say that u 0
when all its components are nonnegative. Clearly, Equation 11.12 dictates that all components of u and s
should be nonnegative and that, whenever a component uj satisfies uj > 0, then sj ¼ 0 and, vice versa,
when sj > 0, then uj ¼ 0. This is called the linear complementarity property, which we have seen already
in the ideal diode equation (Equations 11.8 and 11.9) where i 0, v 0 and iv ¼ 0. Hence, an implicit or
LCP model for the ideal diode equation (Equations 11.8 and 11.9) is
v¼u (11:13)
s¼i (11:14)
u 0, s 0, us ¼ 0 (11:15)
In order to understand that the general equations (Equations 11.10 through 11.12) describe a PWL
relation such as Equations 11.4 and 11.5 between i and v over polyhedral regions, one should observe first
that v ¼ Ai þ f is linear when u ¼ 0 and s ¼ Ci þ g 0. Hence, the relation is linear in the polyhedral
region determined by Ci þ g 0. In general, one can consider 2l possibilities for u and s according to
(uj 0 and sj ¼ 0) or (uj ¼ 0 and sj ¼ 0) for j ¼ 1, 2, . . . , l
Denote sets of indexes U and S for certain values of u and s satisfying Equation 11.12

U ¼ jjuj 0 and sj ¼ 0 (11:16)

S ¼ jjuj ¼ 0 and sj 0 (11:17)
then, clearly, U and S are complementary subsets of {1, 2, . . . , l} when for any j, uj, and sj cannot be both
zero. Clearly, each of these 2l possibilities corresponds to a polyhedral region PU in Rn, which can be
determined from
uj 0 (Ci þ Du þ g)j ¼ 0 for j 2 U (11:18)
uj ¼ 0 (Ci þ Du þ g)j 0 for j 2 S (11:19)
The PWL map in region PU is determined by solving the uj for j 2 U from Equation 11.18 and
substituting these along with uj ¼ 0 for j 2 S into Equation 11.10. This generates, of course, a map that
is linear in the region PU.
When Equation 11.11 is replaced by the implicit equation
Es þ Ci þ Du þ ga ¼ 0, a0
in Equations 11.10 through 11.13, we call the problem a generalized linear complementarity problem
(GLCP).
A nontrivial example of an implicit PWL relation (LCP model) is the hysteresis one port resistor
(see Figure 11.7). Its equations are

u1
v ¼ i þ [1 1] þ1 (11:20)
u2

s1 1 1 1 u1 1
¼ iþ þ
s2 1 1 1 u2 0
(11:21)
v P{2}
s1 0, s2 0, u1 0, u2 0, 1
(11:22)
u1 s1 þ u2 s2 ¼ 0 P{ }
In the first region P, we have

P{1} 0 1 i
s1 ¼ i þ 1 0, s2 ¼ i 0, and
(11:23)
v ¼ i þ 1 FIGURE 11.7 Hysteresis nonlinear resistor.
The region P{1,2}, on the other hand, is empty because the following set of equations are contradictory:
s1 ¼ s2 ¼ 0, i u1 þ u2 þ 1 ¼ 0,
(11:24)
i þ u1 u2 ¼ 0
The region P[1] is
u1 0, s1 ¼ i u1 þ 1 ¼ 0, u2 ¼ 0, s2 ¼ i þ u1 0 (11:25)
Hence, u1 ¼ i þ 1 and s2 ¼ 1 and v ¼ i þ i 1 þ 1 ¼ 0, while i 1.

Finally, the region P[2] is
u1 0, s1 ¼ i þ u2 þ 1 0, u2 0, s2 ¼ i u2 ¼ 0
Hence
u2 ¼ i and s1 ¼ 1 and v ¼ i þ i þ 1 ¼ 1, while i 0 (11:26)
It is now easy to show in general that the canonical PWL representation is a special case of the LCP
model. Just choose uj 0 and sj 0 for all j as follows:
1
T
cj i dj ¼ (uj þ sj ) (11:27)
2
1
cTj i dj ¼ (uj sj ) (11:28)
2
then, u and s are complementary vectors, i.e.,
u 0, s 0, uT s ¼ 0
Observe that the moduli in Equation 11.6 can be eliminated with Equation 11.27 to produce an equation of
the form (Equation 11.10) and that (Equation 11.28) produces an equation of the form (Equation 11.11).
More generally, it has been proven [36] that the implicit model includes all explicit models. Because it
also includes the parametric models, one obtains the general hierarchy of models as depicted in Figure 11.8.
Implicit models
Explicit models
LCP
with nested moduli
[van Bokhoven]
[Güzelis, Göknar]
GLCP
[Kahlert, Chua]
[Vandenberghe e.a.]
Canonical PWL
model Parametric
[Chua, Kang] models
satisfies constant [Chua, Kang]
variation property
FIGURE 11.8 Interrelation of the PWL models.

A general remark should be made about all models that have been presented until now. Although the
models have been given for resistive multiports where the voltages v at the ports are expressed in terms
of the currents i, analogous equations can be given for the currents i in terms of the voltages, or hybrid
variables. It can even be adapted for piecewise-linear capacitors, inductors, or memristors, where
the variables are, respectively, q, v for capacitors, w, i for inductors, and q, w for memristors.
11.3 Piecewise-Linear Models for Electronic Components

In order to simulate nonlinear networks with a circuit or network simulator, the nonlinear behavior of
the components must be modeled fist. During this modeling phase, properties of the component that are
not considered important for the behavior of the system may be neglected. The nonlinear behavior is
often important, therefore, nonlinear models have to be used. In typical simulators such as SPICE,
nonlinear models often involve polynomials and transcendental functions for bipolar and MOS tran-
sistors. These consume a large part of the simulation time, so table lookup methods have been worked
out. However, the table lookup methods need much storage for an accurate description of multiports and
complex components.
The piecewise-linear models constitute an attractive alternative that is both efficient in memory use
and in computation time. We discuss here the most important components. The derivation of a model
usually requires two steps: first, the PWL approximation of constitutive equations, and second, the
algebraic representation.
Two PWL models for an ideal diode (Figure 11.6) have been derived, that is, a parametric model
(Equations 11.8 and 11.9) and an implicit model (Equations 11.13 through 11.15, while a canonical PWL
model does not exist.
The piecewise-linear models for op-amps and OTAs are also simple and frequently used. The
piecewise-line approximation of op-amps and OTAs of Figure 11.9 is quite accurate. It leads to the
vo
i
–
– Esat
–
vi
+ AV
+ +
vo vi
i – Esat/AV Esat/AV
+ –
−Esat
(a)
io
i
–
– – Isat
io
vi gm
+
+ +
vi
i –Isat/gm Isat/gm
+ –
–Isat
(b)
FIGURE 11.9 (a) Op-amp and PWL model and (b) OTA and PWL model.
following representation for the op-amp, which is in the linear region for Esat v0 Esat with voltage
amplification Av and positive and negative saturation Esat and Esat

Av Esat Esat
v0 ¼ v þ v (11:29)
2 Av Av
i i
i ¼ iþ ¼ 0 (11:30)
This is called the op-amp finite-gain model. In each of the three regions, the op-amp can be replaced by a
linear circuit.
For the OTA, we have similarly in the linear region for Isat i0 Isat with transconductance gain gm
and positive and negative saturation Isat and Isat

gm Isat Isat
i0 ¼ vi þ vi (11:31)
2 gm gm
i ¼ iþ ¼ 0 (11:32)
Next, for a tunnel diode, one can perform a piecewise-linear approximation for the tunnel-diode
characteristic as shown in Figure 11.10. It clearly has three regions with conductances g1, g2, and g3.
This PWL characteristic can be realized by three components (Figure 11.10b) with conductances, voltage
sources, and diodes. The three parameters G0, G1, and G2 of Figure 11.10b must satisfy
In Region 1: G0 ¼ g1 (11:33)
In Region 2: G0 þ G1 ¼ g2 (11:34)
In Region 3: G0 þ G1 þ G2 ¼ g3 (11:35)
Thus, G0 ¼ g1, G1 ¼ g1 þ g2, and G2 ¼ g2 þ g3. We can derive the canonical PWL representation as
follows:

1 1 1 1 1
i ¼ (G1 E1 þ G2 E2 ) þ G0 þ G1 þ G2 v þ G1 jv E1 j þ G2 jv E2 j (11:36)
2 2 2 2 2
Next, we present a canonical piecewise-linear bipolar transistor model [12]. Assume a npn-bipolar
transistor is connected in the common base configuration with v1 ¼ vBE, v2 ¼ vBC, i1 ¼ iE, and i2 ¼ iC, as
shown in Figure 11.3. We consider data points in a square region defined by 0.4 v1 0.7 and 0.4 v2
0.7, and assume the terminal behavior of the transistor follows the Ebers–Moll equation; namely,
Is v1 =VT

i1 ¼ e 1 Is ev2 =VT 1 (11:37)

af
Is v2 =VT

i2 ¼ e 1 Is ev1 =VT 1 (11:38)

ar
with Is ¼ 1014 A, VT ¼ 26 mV, af ¼ 0.99, and ar ¼ 0.5. In Ref. [12], the following canonical piecewise-
linear model is obtained, which optimally fits the data points (Figure 11.11)

i1 a1 b11 b21 v1 c11
¼ þ þ jm1 v1 v2 þ t1 j
i2 a2 b12 b22 v2 c21

c12 c13
þ jm2 v1 v2 þ t2 j þ jm3 v1 v2 þ t3 j (11:39)
c22 c23
g3
g2
0
E1 E2 v
g1
Region 1 Region 2 Region 3
(a)
i
G0 G2
+
G1 G2
v G0
E1 – E1 E2
E2 v
G1
(b) (c)
FIGURE 11.10 (a) Piecewise-linear approximation of the tunnel-diode characteristic. The three-segment approxi-
mation defines the three regions indicated. (b) Decomposition of the piecewise-linear characteristic (a) into three
components, and (c) the corresponding circuit.
where

a1 5:8722 103b11 3:2392 102
¼ ¼
a2 3:2652 102 b21 3:2067 102
2
b12 4:0897 10 c11 3:1095 106
¼ ¼
b22 8:1793 102 c21 3:0784 106

c12 9:9342 103 c13 3:0471 102
¼ ¼
c22 1:9868 102 c23 6:0943 102
2 3 2 3 2 3 2 3
m1 1:002 104 t1 6472
6 7 6 76 7 6 7
4 m2 5 ¼ 4 1:4 104 54 t2 5 ¼ 4 0:61714 5
m3 1:574 106 t3 0:66355
iE (mA) iE (mA)
4.976 4.032
2.996 2.428
1.015 0.824
–0.965 –0.779
–2.946 –2.383 0.40
0.40 –3.987
–4.926 0.46 0.70
0.46
0.70 0.52
0.64 0.52
lt)
0.64
vB 0.58 0.58 lt)
vB 0.58 (vo
0.58
E (v 0.52 0.64 (vo E (v 0.52 0.64
olt 0.46 0.70 vB C olt 0.46 0.70 v B C
) 0.40 ) 0.4
(a) (b)
iC (mA) iC (mA)
9.853 7.974
6.897 5.581
3.941 3.188
0.985 0.796
–1.971 0.70 –1.597
–4.926 0.70
0.64 –3.990 0.64
0.40 0.58 0.40
0.46 0.58
vB 0.52 0.52
lt)
0.46
vB 0.520.58 0.52 lt)
(vo
E 0.58
0.64
0.46 (vo E (v 0.46 (vo
lt) 0.70
0.40
vB C olt 0.64 0.40 v BC
) 0.70
(c) (d)
IC (mA)
I8 = 50 µA
5
I8 = 40 µA
4
I8 = 30 µA
3
I8 = 20 µA
2
I8 = 10 µA
1
VCE (volt)
1 2 3 4 5
I8 = 10 µA
–020 –015 –010 –005 005 010 015 020
VCE (volt)
I8 = 10 µA
I8 = 10 µA –20
I8 = 20 µA
–40
I8 = 30 µA
–60
I8 = 40 µA
–80
I8 = 50 µA
–100
IC (µA)
FIGURE 11.11 Three-dimensional plots for the emitter current in the Ebers–Moll model given by Equations 11.37
and 11.38. (b) Three-dimensional plot for the emitter current in the canonical piecewise-linear model given by
Ref. [10, (B.1)] (low-voltage version). (c) Three-dimensional plot for the collector current in the Ebers–Moll model
given by Equations 11.37 and 11.38. (d) Three-dimensional plot for the collector current in the canonical piecewise-
linear model given by Ref. [10, (B.1)] (low-voltage version). (e) Comparison between the family of collector currents
in the Ebers–Moll model (dashed line) and the canonical piecewise-linear model (solid line). (From Chua, L.O. and
Deng, A., IEEE Trans. Circuits Syst., CAS-33, 519, 1986. With permission.)
Next, a canonical piecewise-linear MOS transistor model is i2

presented. Assume the MOS transistor is connected in the +
common source configuration with v1 ¼ vGS, v2 ¼ vDS, i1 ¼ iG, i1 G
D
and i2 ¼ iD, as illustrated, in Figure 11.12, where both v1 , v2 are
+ v2
in volts, and i1, i2 are in microamperes. The data points are
v1 S
uniformly spaced in a grid within a rectangular region defined
– –
by 0 v1 5, and 0 v2 5. We assume the data points follow
the Shichman–Hodges model, namely,
FIGURE 11.12 Two-port configuration
of the MOSFET.
i1 ¼ 0

i2 ¼ k (v1 Vt )v2 0:5v22 , if v1 Vt v2
or
i2 ¼ 0:5k(v1 Vt )2 ½1 þ l(v2 v1 þ Vt ), if v1 Vt < v2 (11:40)
with k ¼ 50 mA=V2, Vt ¼ 1 V, l ¼ 0.02 V1. Applying the optimization algorithm of Ref. [11], we obtain
the following canonical piecewise-linear model (see Figure 11.13):
i2 ¼ a2 þ b21 v1 þ b22 v2 þ c21 jm1 v1 v2 þ t1 j

þ c22 jm2 v1 v2 þ t2 j þ c23 jm3 v1 v2 þ t3 j (11:41)
where
a2 ¼ 61:167, b21 ¼ 30:242, b22 ¼ 72:7925

c21 ¼ 49:718, c22 ¼ 21:027, c23 ¼ 2:0348
m1 ¼ 0:8175, m2 ¼ 1:0171, m3 ¼ 23:406
t1 ¼ 2:1052, t2 ¼ 1:4652, t3 ¼ 69
Finally, a canonical piecewise-linear model of GaAs FET is presented. The GaAs FET has become
increasingly important in the development of microwave circuits and high-speed digital IC’s due to its
fast switching speed.
i2 ¼ a2 þ b21 v1 þ b22 v2 þ c21 jm1 v1 v2 þ t2 j

þ c22 jm2 v1 v2 þ t2 j þ c23 jm3 v1 v2 þ t3 j (11:42)
where v1 ¼ vGS (V), v2 ¼ vDS (V), i2 iD (mA), and
a2 ¼ 6:3645, b21 ¼ 2:4961, b22 ¼ 32:339

c21 ¼ 0:6008, c22 ¼ 0:9819, c23 ¼ 29:507
m1 ¼ 19:594, m2 ¼ 6:0736, m3 ¼ 0:6473
t1 ¼ 44:551, t2 ¼ 8:9962, t3 ¼ 1:3738
Observe that this model requires only three absolute-value functions and 12 numerical coefficients
and compares rather well to the analytical model (Figure 11.14).
iD (µA)
iD (µA) 382.9
408.0
302.6
326.4
244.8 222.3
163.2 142.0
81.6 61.72
0 5 –18.57 5
1 4 0 1 4
vG 2 3 lt) vG 2 3
(vo 3 2 (vo S (vo 3 2 lt)
(vo
S
lt) 4 1 v DS lt) 4 1
v DS
(a) 5 0 (b) 5 0
MOSFET output char

500
vGS = 5
375
vGS = 4
iO (µA)
250
vGS = 3
125
vGS = 2
0
0 1 2 3 4 5
vDS (volts)
Equation 4.39
(c) Equation 4.43
FIGURE 11.13 (a) Three-dimensional plot of drain current from the Shichman–Hodges model. (b) Three-
dimensional plot of the drain current from the canonical piecewise-linear model. (c) Family of drain currents
modeled by Equations 11.40 (dashed line) and 11.41 (solid line). (From Chua, L.O. and Deng, A., IEEE Trans.
Circuits Syst., CAS-33, 520, 1986. With permission.)
GaAs FET output char

125
vGS = 0
100
vGS = –0.5
75
iD (mA)
vGS = –1.0
50 vGS = –1.5
vGS = –2.0
25
vGS = –2.5
0
0 1 2 3 4 5
vDS (volt)
FIGURE 11.14 Comparison of the canonical piecewise linear described by Equation 11.42 (solid line) and the
analytical model (dashed line) for the ion-implanted GaAs FET. (From Chua, L.O. and Deng, A., IEEE Trans. Circuits
Syst., CAS-33, 522, 1986. With permission.)
More piecewise-linear models for timing analysis of logic circuits can be found in Ref. [21]. In the
context of analog computer design, even PWL models of other nonlinear relationships have been derived
in Ref. [51].
11.4 Structural Properties of Piecewise-Linear Resistive Circuits

When considering interconnections of PWL resistors (components), it follows from the linearity of KVL
and KCL that the resulting multiport is also a piecewise-linear resistor. However, if the components have
a canonical PWL representation, the resulting multiport may not have a canonical PWL representation.
This can be illustrated by graphically deriving the equivalent one port of the series connection of two
tunnel diodes [3] (Figure 11.15). Both resistors have the same current, so we have to add the correspond-
ing voltages v ¼ v1 þ v2 and obtain an iv plot with two unconnected parts. Values of i correspond to
three values of v1 for R1 and three values of v2 for R2, and hence to nine values of the equivalent resistor
(Figure 11.15d). This illustrates once more that nonlinear circuits may have more solutions than expected
at first sight. Although the two tunnel diodes R1 and R2 have a canonical PWL representation, the
equivalent one port of their series connection has neither a canonical PWL voltage description, nor a
current one. It, however, has a GLCP description because KVL, KCL, and the LCP of R1 and R2 constitute
a GLCP. If the v–i PWL relation is monotonic, the inverse i–v function exists and then some uniqueness
properties hold.
These observations are, of course, also valid for the parallel connection of two PWL resistors and for
more complicated interconnections.
In Section 11.3, we illustrated with an example how a PWL one-port resistor can be realized with linear
resistors and ideal diodes. This can be proven in general. One essentially needs a diode for each
breakpoint in the PWL characteristic. Conversely, each one port with diodes and resistors is a PWL
one port resistor.
This brings us to an interesting class of circuits composed of linear resistors, independent sources,
linear controlled sources, and ideal diodes. These circuits belong to the general class of circuits with PWL
i1
+ i + i1 4
v1 3
v – i2 2
+
2 1
– –
0 1 2 3 4 5 6 v1
(a) (b)
i2 i
3
2
1
0 1 2 3 4 v2 v
(c) (d)
FIGURE 11.15 (a) The series connection of two tunnel diodes, (b) and (c), their iv characteristics, and
(d) the composite iv plot, which consists of two unconnected parts.
components (see Figure 11.1a) and can be described by GLCP equations. Such networks have not only
shown their importance in analysis but also in the topologic study of the number of solutions and more
general qualitative properties. When only short-circuit and open-circuit branches are present, one
independent voltage source with internal resistance and ideal diodes, an interesting loop cut set exclusion
property holds that is also called the colored branch theorem or the arc coloring theorem (see Section 1.7
of Fundamentals of Circuits and Filters). It says that the voltage source either forms a conducting loop
with forward-oriented diodes and some short circuits or there is a cut set of the voltage source, some
open circuits, and blocking diodes. Such arguments have been used to obtain [23] topologic criteria for
upper bounds of the number of solutions of PWL resistive circuits. In fact, diode resistor circuits have
been used extensively in PWL function generators for analog computers [51]. These electrical analogs can
also be used for mathematical programming problems (similar to linear programming) and have
reappeared in the neural network literature.
11.5 Analysis of Piecewise-Linear Resistive Circuits

It is first demonstrated that all conventional network formulation methods (nodal, cut, set, hybrid,
modified nodal, and tableau) can be used for PWL resistive circuits where the components are described
with canonical or with LCP equations. These network equations may have one or more solutions. In
order to find solutions, one can either search through all the polyhedral regions Pk by solving the linear
equations for that region or by checking whether its solution is located inside that region Pk.
Because many regions often exist, this is a time-consuming method, but several methods can be used
to reduce the search [28,61]. If one is interested in only one solution, one can use solution tracing methods,
also called continuation methods or homotopy methods, of which the Katzenelson method is best known. If
one is interested in all solutions, the problem is more complicated, but some algorithms exist.
11.5.1 Theorem Canonical PWL (Tableau Analysis)

Consider a connected resistive circuit N containing only linear two-terminal resistors, dc-independent
sources, current-controlled and voltage-controlled piecewise-linear two-terminal resistors, linear- and
piecewise-linear-controlled sources (all four types) and any linear multiterminal resistive elements.
A composite branch of this circuit is given in Figure 11.16. If each piecewise-linear function is represented
in the canonical form (Equation 11.6), then the tableau formulation also has the canonical PWL form
X
p
Iˆk
f (x) ¼ a þ Bx þ ci jaTi x bi j ¼ 0 (11:43)
iþ1
+ T
ik where x ¼ iT , vT , vnT and i, respectively v, is the
+ branch current voltage vector (Figure 11.16) and vn
Vk is the node-to-datum voltage vector.
–
Vˆ k PROOF. Let A be the reduced incidence matrix of N
– relative to some datum node, then KCL, KVL, and
Jk Ek element constitutive relations give
+
– Ai ¼ AJ (11:44)
v ¼ AT vn þ E (11:45)
FIGURE 11.16 A composite branch. f1 (i) þ fv (v) ¼ S (11:46)

where we can express fI() and fv() in the canonical form (Equation 11.6)

fI (i) ¼ aI þ BI i þ CI abs DTl e e1 (11:47)

fv (v) ¼ av þ Bv v þ Cv abs DTv v ev (11:48)
Substituting Equations 11.47 and 11.48 into Equation 11.46, we obtain
2 3 2 32 3 2 3
AJ A 0 0 i 0 0 0
6 7 6 76 7 6 7
4 E þ
5 40 1 AT 5 4 v 5 ¼ 4 0 0 05
aI þ av S BI Bv 0 vn CI Cv 0
22 32 3 2 33
DI 0 0 i eI
66 76 7 6 77
abs44 0 DV 0 54 v 5 4 eV 55 ¼ 0 (11:49)
0 0 0 vn 0
Clearly, Equation 11.49 is in the canonical form of Equation 11.43.

Of course, an analogous theorem can be given when the PWL resistors are given in LCP form. Then
the tableau constitute a GLCP. Moreover, completely in line with the section on circuit analysis (see
Chapter 23 of Fundamentals of Circuits and Filters), one can derive nodal, cut set, loop, hybrid, and
modified nodal analysis from the tableau analysis by eliminating certain variables. Alternatively, one can
also directly derive these equations.
Whatever the description for the PWL components may be, one can always formulate the network
equations as linear equations
0 ¼ f (x) ¼ ak þ Bk x, x 2 Pk (11:50)
in the polyhedral region Pk defined by Equation 11.50. The map f is a continuous PWL map. A solution x
of Equation 11.50 can then be computed in a finite number of steps with the Katzenelson algorithm
[4,33], by tracing the map f from an initial point (x(1), y(1)) to a value (x*, 0) (see Figure 11.18).
11.5.2 Algorithm
STEP 1. Choose an initial point x(1) and determine its polyhedral region P(1), and compute

y(1) ¼ f x(1) ¼ a(1) þ B(1) x and set j¼1
STEP 2. Compute
1
^x ¼ x(j) þ B(j) 0 y(j) (11:51)
STEP 3. If ^x 2 P(j), we have obtained a solution ^x of f(^x) ¼ 0. Stop.

STEP 4. Otherwise, compute

x(jþ1) ¼ x(j) þ l(j) ^x x(j) (11:52)
where l(j) is the largest number such that x(j þ 1) 2 P(j), i.e., x(j þ 1) is on the boundary between P(j) and
P(j þ 1) (see Figure 11.17).
x-space f y-space STEP 5. Identify P(jþ1) and the linear map y ¼ a(jþ1) þ
B(jþ1) x in the polyhedral region P(jþ1) and compute
x* 0
y(jþ1) ¼ y(j) þ l(j) y* y(j) (11:53)
y(3)
x(3) p(3) y(2)
Set j ¼ j þ 1. Go to step 2.
x(2) y(1)
x(1) This algorithm converges to a solution in a finite
p(2)
p(1) number of steps if the determinants of all matrices B(j)
have the same sign. This condition is satisfied when the
FIGURE 11.17 Iteration in the Katzenelson algo- i–v curves for the PWL one port resistors are mono-
rithm for solving y ¼ f(x) ¼ 0. tonic. The Katzenelson algorithm was extended in
Ref. [45] by taking the sign of the determinants into
account in Equations 11.52 and 11.53. This requires the PWL resistors to be globally coercive. If by
accident in the iteration the point x(jþ1) is not on a single boundary and instead is located on a corner, the
region P(jþ1) is not uniquely defined. However, with a small perturbation [1], one can avoid this corner
and still be guaranteed to converge.
This algorithm was adapted to the canonical PWL Equation 11.49 in Ref. [8]. It can also be adapted to
the GLCP. However, there exist circuits where this algorithm fails to converge. For the LCP problem, one
can then use other algorithms [20,40,56]. One can also use other homotopy methods [43,57,60], which
can be shown to converge based on eventual passivity arguments. In fact, this algorithm extends the
rather natural method of source stepping, where the PWL circuit is solved by first making all sources zero
and then tracing the solution for increasing (stepping up) the sources. It is instructive to observe here that
these methods can be used successfully in another sequence of the steps in Figure 11.1a. Until now, we
always first performed the horizontal step of PWL approximation or modeling and then the vertical step
of network equation formulation. With these methods, one can first perform the network equation
formulation and then the PWL approximation. The advantage is that one can use a coarser grid in the
simplicial subdivision far away from the solution, and hence dynamically adapt the accuracy of the PWL
approximation.
In any case, if all solutions are requested, all these homotopy-based methods are not adequate, because
not all solutions can be found even if the homotopy method is started with many different x(1). Hence,
special methods have been designed. It is beyond the scope of this text to give a complete algorithm
[39,59], but the solution of the GLCP basically involves two parts. First, calculate the solution set of all
nonnegative solutions to Equations 11.10 and 11.11. This is a polyhedral cone where extremal rays can be
easily determined [44,54]. Second, this solution set is intersected with a hyperplane and the comple-
mentarity condition uTs ¼ 0 implies the elimination of vertices (respectively, convex combinations)
where these complementarity (respectively, cross complementarity) is not satisfied. This has allowed to
systematically obtain the complete solution set for the circuit of Figure 11.15 and for circuits with
infinitely many solutions.
A more recent method [46] covers the PWL i–v characteristic with a union of polyhedra and
hierarchically solves the circuit with finer and finer polyhedra.
An important improvement in efficiency for the methods is possible when the PWL function f() is
separable, i.e., there exist f i : R! Rn i ¼ 1, 2, . . . , n such that
X
n
f (x) ¼ f i (xi ) (11:54)
i¼1
This happens when there are only two terminal PWL resistors, linear resistors, and independent sources,
and if the bipolar transistors are modeled by the Ebers–Moll model (see Equation 11.39). Then, the
subdivision for x is rectangular and each rectangle is subdivided into simplices (see Figure 11.18). This
property can be used to eliminate certain polyhedral x2

regions without solutions [62] and also to speed up the
Katzenelson-type algorithm [60,62]. If there are MOS
transistors, the map f is not separable but one can apply
the extended concept of pairwise separable map [62].
11.6 Piecewise-Linear Dynamic

Circuits
As mentioned at the end of Section 11.2, the piecewise-
linear descriptions of Section 11.2 can be used also for
PWL capacitors, respectively, inductors and memris-
tors, by replacing the port voltages v and currents i by x1
q, v, respectively, w, i and w, q. Whenever we have a
network obtained by interconnecting linear and=or FIGURE 11.18 Simplicial subdivision.
PWL resistors, inductors, capacitors, and memristors,
we have a dynamic piecewise-linear circuits. Of course, such networks are often encountered because it
includes the networks with linear R, L, C, and linear-dependent sources, diodes, switches, op-amps, and
components such as bipolar and MOS transistors, and GaAs FETs with PWL resistive models. This
includes several important and famous nonlinear circuits such as Chua’s circuit [18,19], and the cellular
neural networks (CNNs) [48], which are discussed in Chapter 13 and Section 14.2.
Of course, PWL dynamic circuits are much more interesting and much more complicated and can
exhibit a much more complex behavior than resistive circuits and hence this subject is much less
explored. It is clear from the definition of a PWL dynamic circuit that it can be described by linear
differential equations over polyhedral regions. Hence, it can exhibit many different types of behavior.
They may have many equilibria, which can essentially be determined by solving the resistive network (see
Section 11.5 and Figure 11.1) obtained by opening the capacitive ports and short circuiting the inductive
ports (dc analysis). When there is no input waveform, the circuit is said to be autonomous and has
transients. Some transients may be periodic and are called limit cycles but they may also show chaotic
behavior. Next, one may be interested in the behavior of the circuit for certain input waveforms (transient
analysis). This can be performed by using integration rules in simulations.
For the analysis of limit cycles, chaos, and transients, one can of course use the general methods for
nonlinear circuits, but some improvements can be made based on the PWL nature of the nonlinearities.
Here, we only describe the methods briefly. If one is interested in the periodic behavior of a PWL
dynamic circuit (autonomous or with a periodic input), then one can, for each PWL nonlinearity, make
some approximations.
First, consider the case that one is only interested in the dc and fundamental sinusoidal contributions
in all signals of the form i(t) ¼ A0 þ A1 cos vt. The widely used describing function method [6] for PWL
resistors v ¼ f(i) consists of approximating this resistor by an approximate resistor where ^v(t) ¼ D0 þ D1
cos vt has only the dc and fundamental contribution of v(t). This is often a good approximation since the
remainder of the circuit often filters out all higher harmonics anyway. Using a Fourier series, one can
then find D0 and D1 as
ð
2p
1
D0 (A0 , A1 ) ¼ f (A0 þ A1 cos f)df
2p
0
ð
2p
1
D1 (A0 , A1 ) ¼ f (A0 þ A1 cos f)df
pA1
0
By replacing all PWL components by their describing functions, one can use linear methods to set up the
network equations in the Laplace–Fourier domain. When this approximation is not sufficient, one can
include more harmonics. Then, one obtains the famous harmonic balance method, because one is
balancing more harmonic components.
Alternatively, one can calculate the periodic solution by simulating the circuit with a certain initial
condition and considering the map F: x0 ! x1 from the initial condition x0 to the state x1 one period
later. Of course, a fixed point x* ¼ F(x*) of the map corresponds to a periodic solution. It has been
demonstrated [27] that the map F is differentiable for PWL circuits. This is very useful in setting up an
efficient iterative search for a fixed point of F. This map is also useful in studying the eventual chaotic
behavior and is then called the Poincaré return map.
In transient analysis of PWL circuits, one is often interested in the sensitivity of the solution to certain
parameters in order to optimize the behavior. As a natural extension of the adjoint network for linear
circuits in Ref. [22], the adjoint PWL circuit is defined and used to determine simple sensitivity
calculations for transient analysis.
Another important issue is whether the PWL approximation of a nonlinear characteristic in a dynamic
circuit has a serious impact on the transient behavior. In Ref. [63], error bounds were obtained on the
differences of the waveforms.
11.7 Efficient Computer-Aided Analysis of PWL Circuits

Transient analysis and timing verification is an essential part of the VLSI system design process. The most
reliable way of analyzing the timing performance of a design is to use analog circuit analysis methods. Here as
well, a set of algebraic-differential equations has to be solved. This can be done by using implicit integration
formulas that convert these equations into a set of algebraic equations, which can be solved by iterative
techniques like Newton–Raphson (see Chapter 12). The computation time then becomes excessive for large
circuits. It mainly consists of linearizations of the nonlinear component models and the solution of the linear
equations. In addition, the design process can be facilitated substantially if this simulation tool can be used at
many different levels from the top level of specifications over the logic and switch level to the circuit level.
Such a hierarchical simulator can support the design from top to bottom and allow for mixtures of these
levels. In limited space, we describe here the main simulation methods for improving the efficiency and
supporting the hierarchy of models with piecewise-linear methods. We refer the reader to Chapter 8,
Computer Aided Design and Design Automation for general simulation of VLSI circuits and to the literature
for more details on the methods and for more descriptions on complete simulators.
It is clear from our previous discussion that PWL models and circuit descriptions can be used at many
different levels. An op-amp, for example, can be described by the finite gain model (see Figure 11.9 and
Equations 11.29 and 11.30), but when it is designed with a transistor circuit it can be described by PWL
circuit equations as in Section 11.5. Hence, it is attractive to use a simulator that can support this top-
down design process [35]. One can then even incorporate logic gates into the PWL models. One can
organize the topological equations of the network hierarchically, so that it is easy to change the network
topology. The separation between topological equations and model descriptions allows for an efficient
updating of the model when moving from one polyhedral region into another. Several other efficiency
issues can be built into a hierarchical PWL simulator.
An important reduction in computation time needed for solving the network equations can be
obtained by using the consistent variation property. In fact, only a rank one difference exists between
the matrices of two neighboring polyhedral regions, and hence, one inverse can be easily derived from the
other [8,35]. In the same spirit, one can at the circuit level take advantage of the PWL transistor models
(see Ref. [62] and separability discussion in Section 8.5). In Ref. [53], the circuit is partitioned dynam-
ically into subcircuits during the solution process, depending on the transistor region of operation. Then,
the subcircuits are dynamically ordered and solved with block Gauss–Seidel for minimal or no coupling
among them.
Interesting savings can be obtained [34] by solving the linear differential equations in a polyhedral
region with Laplace transformations and by partitioning the equations. However, the computation of the
intersection between trajectories in neighboring polyhedral regions can be a disadvantage of this method.
Acknowledgment
This work was supported by the Research Council Kuleuven Project MEFISTO666GOA.
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12
Simulation
12.1 Numerical Solution of Nonlinear
Algebraic Equations .............................................................. 12-2
12.2 Numerical Integration of Nonlinear
Differential Equations........................................................... 12-3
12.3 Use of Simulation Programs ............................................... 12-4
Erik Lindberg SPICE . APLAC . NAP2 . ESACAP . DYNAST
Technical University of Denmark References .......................................................................................... 12-18
This chapter deals with the simulation or analysis of a nonlinear electrical circuit by means of a computer
program. The program creates and solves the differential-algebraic equations of a model of the circuit.
The basic tools in the solution process are linearization, difference approximation, and the solution of a set
of linear equations. The output of the analysis may consist of (1) all node and branch voltages and all
branch currents of a bias point (dc analysis), (2) a linear small-signal model of a bias point that may be
used for analysis in the frequency domain (ac analysis), or (3) all voltages and currents as functions of
time in a certain time range for a certain excitation (transient analysis). A model is satisfactory if there is
good agreement between measurements and simulation results. In this case, simulation may be used
instead of measurement for obtaining a better understanding of the nature and abilities of the circuit. The
crucial point is to set up a model that is as simple as possible, in order to obtain a fast and inexpensive
simulation, but sufficiently detailed to give the proper answer to the questions concerning the behavior of
the circuit under study. Modeling is the bottleneck of simulation.
The model is an equivalent scheme—‘‘schematics-capture’’—or a branch table—‘‘net-list’’—describing
the basic components (n-terminal elements) of the circuit and their connection. It is always possible to
model an n-terminal element by means of a number of 2-terminals (branches). These internal
2-terminals may be coupled. By pairing the terminals of an n-terminal element, a port description may
be obtained. The branches are either admittance branches or impedance branches. All branches may be
interpreted as controlled sources. An admittance branch is a current source primarily controlled by its
own voltage or primarily controlled by the voltage or current of another branch (transadmittance). An
impedance branch is a voltage source primarily controlled by its own current or primarily controlled by
the current or voltage of another branch (transimpedance). Control by signal (voltage or current) and
control by time-derivative of signal are allowed. Control by several variables is allowed. Examples of
admittance branches are (1) the conductor is a current source controlled by its own voltage, (2) the
capacitor is a current source controlled by the time-derivative of its own voltage, and (3) the open
circuit is a zero-valued current source (a conductor with value zero). Examples of impedance branches
are (1) the resistor is a voltage source controlled by its own current, (2) the inductor is a voltage source
controlled by the time-derivative of its own current, and (3) the short circuit is a zero-valued voltage
source (a resistor with value zero)
12-1
A component may often be modeled in different ways. A diode, for example, is normally modeled as a
current source controlled by its own voltage such that the model can be linearized into a dynamic
conductor in parallel with a current source during the iterative process of finding the bias point of the
diode. The diode may also be modeled as (1) a voltage source controlled by its own current (a dynamic
resistor in series with a voltage source), (2) a static conductor being a function of the voltage across
the diode, or (3) a static resistor being a function of the current through the diode. Note that in the case
where a small-signal model is wanted, for frequency analysis, only the dynamic model is appropriate.
The primary variables of the model are the currents of the impedance branches and the node
potentials. The current law of Kirchhoff (the sum of all the currents leaving a node is zero) and the
current–voltage relations of the impedance branches are used for the creation of the equations describing
the relations between the primary variables of the model. The contributions to the equations from the
branches are taken one branch at a time based on the question: Will this branch add new primary
variables? If yes, then a new column (variables) and a new row (equations) must be created and updated,
or else the columns and rows corresponding to the existing primary variables of the branch must be
updated. This approach to equation formulation is called the extended nodal approach or the modified
nodal approach (MNA).
In the following, some algorithms for solving a set of nonlinear algebraic equations and nonlinear
differential equations are briefly described. Because we are dealing with physical systems and because we
are responsible for the models, we assume that at least one solution is possible. The zero solution is, of
course, always a solution. It might happen that our models become invalid if we, for example, increase the
amplitudes of the exciting signals, diminish the risetime of the exciting signals, or by mistake create
unstable models. It is important to define the range of validity for our models. What are the consequences
of our assumptions? Can we believe in our models?
12.1 Numerical Solution of Nonlinear Algebraic Equations

Let the equation system to be solved be f(x, u) ¼ 0, where x is the vector of primary variables and u is
the excitation vector. Denote the solution by xs. Then, if we define a new function g(x) ¼ a( f(x, u)) þ x,
where a may be some function of f(x, u), which is zero for f(x, u) ¼ 0, then we can define an iterative
scheme where g(x) converges to the solution xs by means of the iteration: xk þ 1 ¼ g(xk) ¼ a( f(xk, u)) þ xk
where k is the iteration counter.
If for all x in the interval [xa, xb] the condition kg(xa) g(xb)k L * kxa xbk for some L < 1 is
satisfied, the iteration is called a contraction mapping. The condition is called a Lipschitz condition.
Note that a function is a contraction if it has a derivative less than 1.
For a ¼ 1, the iterative formula becomes xkþ1 ¼ g(xk) ¼ f(xk, u) þ xk. This scheme is called the
Picard method, the functional method, or the contraction mapping algorithm. At each step, each
nonlinear component is replaced by a linear static component corresponding to the solution xk.
A nonlinear conductor, for example, is replaced by a linear conductor defined by the straight line
through the origin and the solution point. Each iterative solution is calculated by solving a set of linear
equations. All components are updated and the next iteration is made. When two consecutive solutions
are within a prescribed tolerance, the solution point is accepted.
For a ¼ 1=(df=dx), the iterative formula becomes xk þ 1 ¼ g(xk) ¼ f(xk, u)=(df(xk, u)=dx) þ xk. This
scheme is called the Newton–Raphson method or the derivative method. At each step, each nonlinear
component is replaced by a linear dynamic component plus an independent source corresponding to the
solution xk. A nonlinear conductor, for example, is replaced by a linear conductor defined by the
derivative of the branch current with respect to the branch voltage (the slope of the nonlinearity) in
parallel with a current source corresponding to the branch voltage of the previous solution. A new
solution is then calculated by solving a set of linear equations. The components are updated and the next
iteration is made. When the solutions converge within a prescribed tolerance, the solution point is
accepted.
Simulation 12-3
It may, of course, happen that the previously mentioned iterative schemes do not converge before the
iteration limit kmax is reached. One reason may be that the nonlinearity f(x) changes very rapidly for a
small change in x. Another reason could be that f(x) possess some kind of symmetry that causes cycles in
the Newton–Raphson iteration scheme. If convergence problems are detected, the iteration scheme can
be modified by introducing a limiting of the actual step size. Another approach may be to change the
modeling of the nonlinear branches from voltage control to current control or vice versa. Often, the user
of a circuit analysis program may be able to solve convergence problems by means of proper modeling
and adjustment of the program options [1–5].
12.2 Numerical Integration of Nonlinear Differential Equations

The dynamics of a nonlinear electronic circuit may be described by a set of coupled first-order differential
equations–algebraic equations of the form: dx=dt ¼ f(x, y, t) and g(x, y, t) ¼ 0, where x is the vector of
primary variables (node potentials and impedance branch currents), y is the vector of variables that
cannot be explicitly eliminated, and f and g are nonlinear vector functions. It is always possible to express
y as a function of x and t by inverting the function g and inserting it into the differential equations such
that the general differential equation form dx=dt ¼ f(x, t) is obtained. The task is then to obtain a solution
x(t) when an initial value of x is given. The usual methods for solving differential equations reduce to the
solution of difference equations, with either the derivatives or the integrals expressed approximately in
terms of finite differences.
Assume, at a given time t0, we have a known solution point x0 ¼ x(t0). At this point, the function f can
be expanded in Taylor series: dx=dt ¼ f (x0, t) þ A (x0) (x x0) þ where A(x0) is the Jacobian of
f evaluated at x0. Truncating the series, we obtain a linearization of the equations such that the small-
signal behavior of the circuit in the neighborhood of x0 is described by dx=dt ¼ A * x þ k, where A is a
constant matrix equal to the Jacobian and k is a constant vector.
The most simple scheme for the approximate solution of the differential equation dx=dt ¼ f(x, t) ¼
Ax þ k is the forward Euler formula x(t) ¼ x(t0) þ hA(t0) where h ¼ t t0 is the integration time
step. From the actual solution point at time t0, the next solution point at time t is found along the
tangent of the solution curve. It is obvious that we will rapidly leave the vicinity of the exact solution
curve if the integration step is too large. To guarantee stability of the computation, the time step h must
be smaller than 2=jlj where l is the largest eigenvalue of the Jacobian A. Typically, h must not
exceed 0.2=jlj.
The forward Euler formula is a linear explicit formula based on forward Taylor expansion
from t0. If we make backward Taylor expansion from t we arrive at the backward Euler formula:
x(t) ¼ x(t0) þ hA(t). Because the unknown appears on both sides of the equation, it must in general be
found by iteration so the formula is a linear implicit formula. From a stability point of view, the backward
Euler formula has a much larger stability region than the forward Euler formula. The truncation error for
the Euler formulas is of order h2.
The two Euler formulas can be thought of as polynomials of degree 1 that approximate x(t) in
the interval [t0, t]. If we compute x(t) from a second-order polynomial p(t) that matches the
conditions that p(t0) ¼ x(t0), dp=dt(t0) ¼ dx=dt(t0) and dp=dt(t) ¼ dx=dt(t), we arrive at the trapezoidal
rule: x(t) ¼ x(t0) þ 0.5hA(t0) þ 0.5hA(t). In this case, the truncation error is of order h3.
At each integration step, the size of the local truncation error can be estimated. If it is too large, the step
size must be reduced. An explicit formula such as the forward Euler may be used as a predictor giving a
starting point for an implicit formula like the trapezoidal, which in turn is used as a corrector. The use of
a predictor–corrector pair provides the base for the estimate of the local truncation error. The trapezoidal
formula with varying integration step size is the main formula used in the Simulation Program with
Integrated Circuit Emphasis (SPICE) program.
The two Euler formulas and the trapezoidal formula are special cases of a general linear multistep
formula S(aixni þ bih(dx=dt)ni), where i goes from 1 to m 1 and m is the degree of the polynomial
used for the approximation of the solution curve. The trapezoidal rule, for example, is obtained by setting
a1 ¼ 1, a0 ¼ þ1, and b1 ¼ b0 ¼ 0.5, all other coefficients being zero. The formula can be regarded as
being derived from a polynomial of degree r which matches r þ 1 of the solution points xn-i and their
derivatives (dx=dt)ni.
Very fast transients often occur together with very slow transients in electronic circuits. We
observe widely different time constants. The large spread in component values, for example, from
large decoupling capacitors to small parasitic capacitors, implies a large spread in the modules of the
eigenvalues. We say that the circuits are stiff. A family of implicit multistep methods suitable for
stiff differential equations has been proposed by C.W. Gear. The methods are stable up to the polynomial
of order 6. For example, the second-order Gear formula for fixed integration step size h may be stated
as xnþ1 ¼ (1=3)xn1 þ (4=3)xn þ (2=3)h(dx=dt)nþ1.
By changing both the order of the approximating polynomial and the integration step size, the methods
adapt themselves dynamically to the performance of the solution curve. The family of Gear formulas is
modified into a ‘‘stiff-stable variable-order variable-step predictor–corrector’’ method based on implicit
approximation by means of backward difference formulas (BDFs). The resulting set of nonlinear
equations is solved by modified Newton–Raphson iteration. Note that numerical integration, in a
sense, is a kind of low-pass filtering defined by means of the minimum integration step [1–5].
12.3 Use of Simulation Programs

Since 1960, a large number of circuit-simulation programs have been developed by universities, industrial
companies, and commercial software companies. In particular, the SPICE program has become a
standard simulator both in the industry and in academia. Here, only a few programs, which together
cover a very large number of simulation possibilities, are presented. Due to competition, there is a
tendency to develop programs that are supposed to cover any kind of analysis so that only one program
should be sufficient (the Swiss Army Knife Approach). Unfortunately this implies that the programs
become very large and complex to use. Also, it may be difficult to judge the correctness and accuracy of
the results of the simulation having only one program at your disposal. If you try to make the same
analysis of the same model with different programs, you will frequently see that the results from
the programs may not agree completely. By comparing the results, you may obtain a better feel for the
correctness and accuracy of the simulation. The programs SPICE and Analysis Program for Linear Active
Circuits (APLAC) supplemented with the programs Nonlinear Analysis Program version 2 (NAP2),
Engineering System and Circuit Analysis (ESACAP), and DYNAmic Simulation Tool (DYNAST) have
proven to be a good choice in the case where a large number of different kinds of circuits and systems
are to be modeled and simulated (the Tool Box Approach). The programs are available in inexpensive
evaluation versions running on IBM compatible personal computers. The ‘‘net-list’’ input languages are
very close, making it possible to transfer input data easily between the programs. In order to make
the programs more ‘‘user-friendly’’ graphics interphase language ‘‘schematics-capture,’’ where you draw
the circuit on the screen, has been introduced. Unfortunately, this approach makes it a little more difficult
for the user to transfer data between the programs. In the following, short descriptions of the programs
are given and a small circuit is simulated in order to give the reader an idea of the capabilities of
the programs.
12.3.1 SPICE
The first versions of SPICE (Simulation Program with Integrated Circuit Emphasis version 2), based on
the MNA, were developed in 1975 at the Electronics Research Laboratory, College of Engineering,
University of California, Berkeley, CA.
SPICE is a general-purpose circuit analysis program. Circuit models may contain resistors, capacitors,
inductors, mutual inductors, independent sources, controlled sources, transmission lines, and the
Simulation 12-5
most common semiconductor devices: diodes, bipolar junction transistors, and field effect transistors.
SPICE has very detailed built-in models for the semiconductor devices, which may be described by
about 50 parameters. Besides the normal dc, ac, and transient analyses, the program can make sensitivity,
noise, and distortion analysis and analysis at different temperatures. In the various commercial versions
of the program many other possibilities have been added; for example, analog behavior modeling (poles
and zeros) and statistical analysis.
In order to give an impression of the ‘‘net-list’’ input language, the syntax of the statements describing
controlled sources is the following:
Voltage Controlled Current Source: Gxxx Nþ N NCþ NC VALUE

Voltage Controlled Voltage Source: Exxx Nþ N NCþ NC VALUE
Current Controlled Current Source: Fxxx Nþ N VNAM VALUE
Current Controlled Voltage Source: Hxxx Nþ N VNAM VALUE
where the initial characters of the branch name G, E, F, and H indicate the type of the branch; Nþ and N
are integers (node numbers) indicating the placement and orientation of the branch, respectively; NCþ,
NC, and VNAM indicate from where the control comes (VNAM is a dummy dc voltage source with value
0 inserted as an ammeter!); and VALUE specifies the numerical value of the control, which may be a
constant or a polynomial expression in case of nonlinear dependent sources. Independent sources are
specified with Ixxx for current and Vxxx for voltage sources.
The following input file describes an analysis of the Chua oscillator circuit. It is a simple harmonic
oscillator with losses (C2, L2, and RL2) loaded with a linear resistor (R61) in series with a capacitor (C1)
in parallel with a nonlinear resistor. The circuit is influenced by a sinusoidal voltage source VRS through
a coil L1. Comments may be specified either as lines starting with an asterisk ‘‘*’’ or by means of a
semicolon ‘‘;’’ after the statement on a line. A statement may continue by means of a plus ‘‘ þ ’’ as the first
character on the following line.
PSpice input file CRC-CHUA.CIR, first line, title line :

* *: The Chua Oscillator, sinusoidal excitation, F ¼ 150mV > :
* : RL2 ¼ 1 ohm, RL1 ¼ 0 ohm f ¼ 1286.336389 Hz :
* : ref. K. Murali and M. Lakshmanan, :
* : Effect of Sinusoidal Excitation on the Chua’s Circuit, :
* : IEEE Transactions on Circuits and Systems — 1: :
* : Fundamental Theory and Applications, :
* : vol.39, No.4, April 1992, pp. 264–270 :
* : input source; :- - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - -- - - - -- - :
VRS 7 0 sin(0 150m 1.2863363889332eþ3 0 0) :
* : choke :
L1 6 17 80e-3 ; mH :
VRL1 17 7 DC 0 ; ammeter for measure of IL1 :
* : harmonic oscillator; :- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - :
L2 6 16 13m :
RL2 16 0 1 :
C2 6 0 1.250u :
* : load; :- - - - - - - - - - - - - - -- - - - - -- - - - - - - - - - - - - - - - - - - - - - - - -:
r61 6 10 1310 :
vrrC1 10 11 DC 0 :
C1 11 0 0.017u :
* i(vrr10) ¼ current of nonlinear resistor :
vrr10 10 1 DC 0 :
* : non-linear circuit; :- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -:
.model n4148 d (is ¼ 0.1p rs ¼ 16 n ¼ 1); vt ¼ n*k*T=q :
d13 1 3 n4148 :
d21 2 1 n4148 :
rm9 2 22 47k :
vrm9 22 0 DC 9 ; negative power supply :
rp9 3 33 47k :
vrp9 33 0 DC þ9 :
r20 2 0 3.3k :
r30 3 0 3.3k :
* : ideal op. amp.; :- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - :
evop 4 0 1 5 1eþ20 :
r14 14 290 :
r54 54 290 :
r50 5 0 1.2k :
* : - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - -- - -- - - - - - - -:
.TRAN 0.05m 200m 0 0.018m UIC :
.plot tran v(11) :
.probe :
.options acct nopage opts gmin ¼ 1e-15 reltol¼1e-3 :
þ abstol¼1e-12 vntol ¼ 1e-12 tnom¼25 itl5 ¼ 0 :
þ limpts ¼ 15000 :
.end :
The analysis is controlled by means of the statements: .TRAN, where, for example, the maximum
integration step is fixed to 18 ms, and .OPTIONS, where, for example, the relative truncation error is
set to 1e-3. The result of the analysis is presented in Figure 12.1. It is seen that transition from chaotic
behavior to a period 5 limit cycle takes place at about 100 ms. A very important observation is that the
result of the analysis may depend on (1) the choice of the control parameters and (2) the order of
the branches in the ‘‘net-list,’’ for example, if the truncation error is set to 1e-6 instead of 1e-3 previously,
the result becomes quite different. This observation is valid for all programs [5–11].
I(C1)
200 µA
0A
–200 µA
0s 40 ms 80 ms 120 ms 160 ms 200 ms

(a) Time
FIGURE 12.1 (a) PSPICE analysis. The current of C1: I(C1) as function of time in the interval 0–200 ms.
Simulation 12-7
200 µA I(C1)
0A
–200 µA
–1.99 V –1.00 V 0V 1.00 V 2.00 V

(b) V(11)
I(C1)
200 µA
0A
}
–200 µA
–1.99 V –1.00 V 0V 1.00 V 2.00 V

(c) V(11)
400 mV
V(6)
0V
–400 mV
–1.99 V –1.00 V 0V 1.00 V 2.00 V
(d) V (11)
FIGURE 12.1 (continued) (b) The current of C1: I(C1) as function of the voltage of C1: V(11). (c) The current of
C1: I(C1) as function of the voltage of C1: V(11) in the time interval 100–200 ms. (d) The voltage of C2: V(6) as
function of the voltage of C1: V(11) in the time interval 100–200 ms.
12.3.2 APLAC
The program APLAC [5] has been under constant development at the Helsinki University of
Technology, Finland, since 1972. Over time it has developed into an object-oriented analog circuits
and systems simulation and design tool. Inclusion of a new model into APLAC requires only the labor of
introducing the parameters and equations defining the model under the control of ‘‘C-macros.’’ The code
of APLAC itself remains untouched. The APLAC Interpreter immediately understands the syntax of the
new model. APLAC accepts SPICE ‘‘net-lists’’ by means of the program Spi2a (SPICE to APLAC net-list
converter).
APLAC is capable of carrying out dc, ac, transient, noise, oscillator, and multitone harmonic steady-
state analyses and measurements using IEEE-488 bus. Transient analysis correctly handles, through
convolution, components defined by frequency-dependent characteristics. Monte Carlo analysis
is available in all basic analysis modes and sensitivity analysis in dc and ac modes. N-port z, y, and
s parameters, as well as two-port h parameters, are available in ac analysis. In addition, APLAC includes
a versatile collection of system-level blocks for the simulation and design of analog and digital commu-
nication systems. APLAC includes seven different optimization methods. Any parameter in the design
problem can be used as a variable, and any user-defined function may act as an objective. Combined
time and frequency domain optimization is possible.
The file below is the APLAC ‘‘net-list’’ of the Chua oscillator circuit created by the Spi2a converter
program with the PSpice file CRC-CHUA.CIR above as input. Comments are indicated by means of
the dollar sign ‘‘$’’ or the asterisk ‘‘*.’’ Unfortunately, it is necessary to manually change the file.
Comments semicolon ‘‘;’’ and colon ‘‘:’’ must be replaced with ‘‘$;’’ and ‘‘$:’’. Also, Spi2a indicates a
few statements as ‘‘$ not implemented.’’
$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
$$ $$
$$ Spi2a — SPICE to APLAC netlist converter, version 1.26 $$
$$ $$
$$ This file is created at Tue Jul 17 14:48:02 2001 $$
$$ with command: spi2a C:\WINDOWS\DESKTOP\crc-chua.cir $$
$$ $$
$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
$PSpice input file CRC-CHUA.CIR, first line, title line $:
Prepare gmin ¼ 1e-15 ERR ¼ 1e-3 ABS_ERR ¼ 1e-12 TNOM ¼ (273.15þ(25))
$ .options acct nopage opts gmin ¼ 1e-15 reltol ¼ 1e-3 $:
$þ abstol ¼ 1e-12 vntol ¼ 1e-12 tnom ¼ 25 itl5 ¼ 0 $:
$þ limpts ¼ 15000 $:
$ .MODEL and .PARAM definitions $:
Model ‘‘n4148’’ is ¼ 0.1p rs ¼ 16 n ¼ 1
þ $; ¼ vt n*k*T=q $:
$ Circuit definition $:
$ Not implemented $:
$ VRS 7 0 sin(0 150m 1.2863363889332eþ3 0 0) $:
Volt VRS 7 0 sin ¼ [0, 150m, 1.2863363889332eþ3, 0, 0]
* $: choke $:
Ind L1 6 17 80e-3 $; mH $:
Volt VRL1 17 7 DC ¼ {VRL1¼ 0} $ $; ammeter for measure of IL1 $:
* $: harmonic oscillator$; $:- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $:
Simulation 12-9
þ I ¼ I_VRL1
Ind L2 6 16 13m $:
Res RL2 16 0 1 $:
Cap C2 6 0 1.250u $:
Res r61 6 10 1310 $:
$ vrrC1 10 11 DC 0 $:
Volt vrrC1 10 11 DC ¼ {vrrC1 ¼ 0}
þ I ¼ IC1
Cap C1 11 0 0.017u
$ vrr10 10 1 DC 0 $:
Volt vrr10 10 1 DC ¼ {vrr10 ¼ 0} $:
þ I ¼ IRNL
* $: non-linear circuit$; $:- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - $:
Diode d13 1 3 MODEL ¼ ‘‘n4148’’ $:
Diode d21 2 1 MODEL ¼ ‘‘n4148’’ $:
Res rm9 2 22 47k $:
Volt vrm9 22 0 DC ¼ {vrm9 ¼ -9} $ $; negative power supply $:
þ I ¼ I_vrm9
Res rp9 3 33 47k $:
$ vrp9 33 0 DC þ9 $:
Volt vrp9 33 0 DC ¼ {vrp9 ¼ 9} $ þ9 must be 9
Res r20 2 0 3.3k $:
Res r30 3 0 3.3k $:
VCVS evop 4 0 1 1 5 [1eþ20] LINEAR $:
Res r14 1 4 290 $:
Res r54 5 4 290 $:
Res r50 5 0 1.2k $:
$$ Analysis commands $:
$$ .TRAN 0.05m 200m 0 0.018m UIC $:
$ Sweep ‘‘TRAN Analysis 1’’
$þ LOOP (1þ(200m-(0))=(0.05m)) TIME LIN 0 200m TMAX ¼ 0.018m
$þ NW ¼ 1 $ UIC $:
$$ .plot tran v(11) $:
$ Show Y Vtran(11) $ $:
$ EndSweep
$ the following lines are added and the sweep above is commented
Sweep ‘‘TRAN Analysis 2’’
þ LOOP (4001) TIME LIN 0 200m TMAX ¼ 0.018m
$þ NW ¼ 1 $ UIC $:
$ .plot tran v(11) $:
Show Y Itran(IC1) X Vtran(11) $ $:
EndSweep
$.probe $:
The result of the analysis is presented in Figure 12.2. It is observed that limit cycle behavior is not
obtained in the APLAC analysis in the time interval from 0 to 200 ms.
TRAN Analysis 1
APLAC 7.60 student version for noncommercial use only
2.00
1.00
0.00
–1.00
–2.00
0.000 0.050 0.100 0.150 0.200
t (s)
Vtran (11)
(a)
TRAN Analysis 2
APLAC 7.60 student version for noncommercial use only
250.00 u
125.00 u
0.00
–125.00 u
–250.00 u
–2.000 –1.000 0.000 1.000 2.000
t (s)
Itran (IC1)
(b)
FIGURE 12.2 (a) The voltage of C1: V(11) as function of time in the interval 0–200 ms. (b) The current of C1: I(C1)
as function of the voltage of C1: V(11).
12.3.3 NAP2
The first versions of NAP2 (Nonlinear Analysis Program version 2) [10], based on the extended nodal
equation formulation were developed in 1973 at the Institute of Circuit Theory and Telecommunication,
Technical University of Denmark, Lyngby, Denmark.
NAP2 is a general-purpose circuit analysis program. Circuit models may contain resistors, conductors,
capacitors, inductors, mutual inductors, ideal operational amplifiers, independent sources, controlled
sources, and the most common semiconductor devices: diodes, bipolar junction transistors, and field
effect transistors. NAP2 has only simple built-in models for the semiconductor devices, which require
about 15 parameters. Besides the normal dc, ac, and transient analyses, the program can make parameter
Simulation 12-11
variation analysis. Any parameter (e.g., component value or temperature) may be varied over a range in
an arbitrary way and dc, ac, or transient analysis may be performed for each value of the parameter.
Optimization of dc bias point (given: voltages, find: resistors) is possible. Event detection is included so
that it is possible to interrupt the analysis when a certain signal, for example, goes from a positive to a
negative value. The results may be combined into one output plot. It is also possible to calculate the poles
and zeros of driving point and transfer functions for the linearized model in a certain bias point.
Eigenvalue technique (based on the QR algorithm by J.G.F. Francis) is the method behind the calculation
of poles and zeros. Group delay (i.e., the derivative of the phase with respect to the angular frequency) is
calculated from the poles and zeros. This part of the program is available as an independent program
named ANP3 (Analytical Network Program version 3).
In order to give an impression of the ‘‘net-list’’ input language, the syntax of the statements describing
controlled sources is as follows:
Voltage Controlled Current Source: Ixxx Nþ N VALUE VByyy

Voltage Controlled Voltage Source: Vxxx Nþ N VALUE VByyy
Current Controlled Current Source: Ixxx Nþ N VALUE IByyy
Current Controlled Voltage Source: Vxxx Nþ N VALUE Ibyyy
where the initial characters of the branch name I and V indicate the type of the branch; Nþ and N are
integers (node numbers) indicating the placement and orientation of the branch, respectively; and
VALUE specifies the numerical value of the control, which may be a constant or an arbitrary functional
expression in case of nonlinear control. IB and VB refer to the current or voltage of the branch,
respectively, from where the control comes. If the control is the time derivative of the branch signal, SI
or SV may be specified. Independent sources must be connected to a resistor R or a conductor G as
follows: Rxxx Nþ N VALUE E ¼ VALUE and Gxxx Nþ N VALUE J ¼ VALUE, where VALUE may
be any function of time, temperature, and components.
The input file ‘‘net-list’’ below describes the same analysis of the Chua oscillator circuit as performed
by means of SPICE and APLAC. The circuit is a simple harmonic oscillator with losses (C2, L2, and RL2)
loaded with a linear resistor (R61) in series with a capacitor (C1) in parallel with a nonlinear resistor. The
circuit is excited by a sinusoidal voltage source through a coil L1. The frequency is specified as angular
frequency in rps. It is possible to specify more than one statement on one line. Colon ‘‘:’’ indicate start of
a comment statement and semicolon ‘‘;’’ indicates end of a statement. The greater than character ‘‘>’’
indicates continuation of a statement on the following line. It is observed that most of the lines are
comment lines with the PSPICE input statements.
*circuit; *list 2, 9; : file CRC-CHUA.NAP

*: PSpice input file CRC-CHUA.CIR, first line, title line > :
: translated into NAP2 input file
: The Chua Oscillator, sinusoidal excitation, F ¼ 150mV > :
: RL2 ¼ 1 ohm, RL1 ¼ 0 ohm f ¼ 1286.336389 Hz :
: ref. K. Murali and M. Lakshmanan, :
: Effect of Sinusoidal Excitation on the Chua’s Circuit, :
: IEEE Transactions on Circuits and Systems — 1: :
: Fundamental Theory and Applications, :
: vol.39, No.4, April 1992, pp. 264-270 :
: input source; : - - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - - :
: VRS 7 0 sin(0 150m 1.2863363889332eþ3 0 0) :
sin=sin=; Rs 7 0 0 e ¼ 150m*sin(8.0822898994674eþ3*time) :
: choke ; L1 6 17 80mH; RL1 17 7 0 :
: L1 6 17 80e-3 ;:mH :
: VRL1 17 7 DC 0 ;:ammeter for measure of IL1 :

:- - - -- -- -- -- --- - -- -- - --- -- -- -- -- -- -- :
: harmonic oscillator; L2 6 16 13mH; RL2 16 0 1 :
C2 6 0 1.250uF :
: L2 6 16 13m :
: RL2 16 0 1 :
: C2 6 0 1.250u :
:- -- -- - - -- -- -- - - -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -:
: load; r61 6 10 1310; rrc1 10 11 0; c1 11 0 0.017uF :
rr10 10 1 0: irr10¼current of nonlinear resistor :
: r61 6 10 1310 :
: vrrC1 10 11 DC 0 :
: C1 11 0 0.017u :
: i(vrr10) ¼current of nonlinear resistor :
: vrr10 10 1 DC 0 :
: non-linear circuit; :- - - - - -- -- -- -- -- -- -- -- -- -- -- -- -- -- :
: .model n4148 d (is ¼ 0.1p rs ¼ 16 n ¼ 1); vt ¼ n*k*T=q :
n4148 =diode= is ¼ 0.1p gs ¼ 62.5m vt ¼ 25mV; :
td13 1 3 n4148; td21 2 1 n4148; :
: d13 1 3 n4148 :
: d21 2 1 n4148 :
rm9 2 0 47k e ¼ 9; rp9 3 0 47k E ¼ þ9; :
: rm9 2 22 47k :
: vrm9 22 0 DC 9; negative power supply :
: rp9 3 33 47k :
: vrp9 33 0 DC þ9 :
r20 2 0 3.3k; r30 3 0 3.3k; :
: r20 2 0 3.3k :
: r30 3 0 3.3k :
: ideal op. amp.; :- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - :
gop 1 5 0; vop 4 0 vgop: no value means infinite value;:
: evop 4 0 1 5 1eþ20 :
r14 1 4 290; r54 5 4 290; r50 5 0 1.2k; :
: r14 1 4 290 :
: r54 5 4 290 :
: r50 5 0 1.2k :
: ----- ---------------------------------------------- - :
*time time 0 200m : variable order, variable step:
: .TRAN 0.05m 200m 0 0.018m UIC:
*tr vnall *plot(50 v6) v1 *probe:
: .plot tran v(11) :
: .probe :
*run cycle ¼15000 minstep¼1e-20 > :
trunc¼1e-3 step ¼ 50n:
: .options acct nopage opts gmin¼1e-15 reltol¼1e-3 :
:þ abstol¼1e-12 vntol¼1e-12 tnom¼25 itl5¼0 :
:þ limpts¼15000 :
: .end :
*end :
Simulation 12-13
The program options are set by means of the statement *RUN, where, for example, the minimum
integration step is set to 1e-20 s and the relative truncation error is set to 1e-6. The result of the analysis is
presented in Figure 12.3. It can be observed that transition from chaotic behavior to a period 5 limit cycle
takes place at about 50 ms. If we compare to the results obtained above by means of SPICE and APLAC,
250.0 µA
200.0 µA I(C1)
0.0 µA
–200.0 µA
–250.0 µA
0 ms 20 ms 40 ms 60 ms 80 ms 100 ms
(a) Time
250.0 µA
200.0 µA I(C1)
0.0 µA
–200.0 µA
–250.0 µA
–2.0 V –1.0 V 0.0 V 1.0 V 2.0 V
(b) V(11)
200 µA
I(C1)
100 µA
0.0 µA
–100 µA
–200 µA
180 ms 185 ms 190 ms 195 ms 200 ms
(c) Time
FIGURE 12.3 (a) NAP2 analysis. The current of C1: I(C1) as function of time in the interval 0–100 ms. (b) The
current of C1: I(C1) as function of the voltage of C1: V(11) in the time interval 0–100 ms. (c) The current of C1: I(C1)
as function of time in the interval 180–200 ms.
(continued)
200 µA
I(C1)
100 µA
0.0 µA
–100 µA
–200 µA
–2.0 V –1.5 V –1.0 V –0.5 V 0.0 V 0.5 V 1.0 V 1.5 V 2.0 V
(d) V (11)
FIGURE 12.3 (continued) (d) The current of C1: I(C1) as function of the voltage of C1: V(11) in the time interval
100–200 ms.
we see that although the three programs are ‘‘modeled and set’’ the same way, for example, with the same
relative tolerance 1e-3, the results are different due to the chaotic nature of the circuit and possibly
also due to the different strategies of equation formulation and solution used in the three programs.
For example, SPICE uses the trapezoidal integration method with variable step; APLAC and NAP2 use
the Gear integration methods with variable order and variable step.
12.3.4 ESACAP
The first versions of ESACAP program based on the extended nodal equation formulation were
developed in 1979 at Elektronik Centralen, Hoersholm, Denmark, for the European Space Agency as
a result of a strong need for a simulation language capable of handling interdisciplinary problems (e.g.,
coupled electrical and thermal phenomena). ESACAP was therefore born with facilities that have only
recently been implemented in other simulation programs (e.g., facilities referred to as behavioral or
functional modeling).
ESACAP carries out analyses on nonlinear systems in dc and in the time domain. The nonlinear
equations are solved by a hybrid method combining the robustness of the gradient method with the good
convergence properties of the Newton–Raphson method. The derivatives required by the Jacobian matrix
are symbolically evaluated from arbitrarily complex arithmetic expressions and are therefore exact. The
symbolic evaluation of derivatives was available in the very first version of ESACAP. It has now become a
general numerical discipline known as automatic differentiation. The time-domain solution is found by
numerical integration implemented as BDFs of variable step and orders 1 through 6 (modified Gear
method). An efficient extrapolation method (the epsilon algorithm) accelerates the asymptotic solution in
the periodic steady-state case.
Frequency-domain analyses may be carried out on linear or linearized systems (e.g., after a dc analysis).
Besides complex transfer functions, special outputs such as group delay and poles=zeros are available. The
group delay is computed as the sum of the frequency sensitivities of all the reactive components in the
system. Poles and zeros are found by a numerical interpolation of transfer functions evaluated on a circle in
the complex frequency plane. ESACAP also includes a complex number postprocessor by means of which
any function of the basic outputs can be generated (e.g., stability factor, s-parameters, complex ratios).
Sensitivities of all outputs with respect to all parameters are available in all analysis modes. The
automatic differentiation combined with the adjoint network provides exact partial derivatives in
the frequency domain. In the time domain, integration of a sensitivity network (using the already
LUfactorized Jacobian) provides the partial derivatives as functions of time.
Simulation 12-15
The ESACAP language combines procedural facilities, such as if-then-else, assignment statements, and
do-loops, with the usual description by structure (nodes=branches). Arbitrary expressions containing
system variables and their derivatives are allowed for specifying branch values thereby establishing any
type of nonlinearity. System variables of nonpotential and noncurrent type may be defined and used
everywhere in the description (e.g., for defining power, charge). The language also accepts the specification
of nonlinear differential equations. Besides all the standard functions known from high-level computer
languages, ESACAP provides a number of useful functions. One of the most important of these functions is
the delay function. The delay function returns one of its arguments delayed by a specified value, which in
turn may depend on system variables. Another important function is the threshold switch—the ZEROREF
function—used in if-then-else constructs for triggering discontinuities. The ZEROREF function interacts
with the integration algorithm that may be reinitialized at the exact threshold crossing. The ZEROREF
function is an efficient means for separating cause and action in physical models thereby eliminating many
types of causality problems. Causality problems are typical examples of bad modeling techniques and the
most frequent reason for divergence in the simulation of dynamic systems.
Typical ESACAP applications include electronics as well as thermal and hydraulic systems. The
frequency domain facilities have been a powerful tool for designing stable control systems including
nonelectronics engineering disciplines.
In order to give an idea of the input language, the syntax of the statements describing sources is as
follows:
Current Source: Jxxx(Nþ, N) ¼ VALUE;

Voltage Source: Exxx(Nþ, N) ¼ VALUE;
where the initial characters of the branch name: J and E indicate the type of the branch; Nþ and N are
node identifiers (character strings), which, as a special case, may be integer numbers (node numbers).
The node identifiers indicate the placement and orientation of the branch. The VALUE specifies the
numerical value of the source, which may be an arbitrary function of time, temperature, and parameters
as well as system variables (including their time derivatives). Adding an apostrophe references the time
derivative of a system variable. V(N1,N2)0 , for example, is the time derivative of the voltage drop from
node N1 to node N2.
The next input file—actually, a small program written in the ESACAP language—describes an analysis
of a tapered transmission line. The example shows some of the powerful tools available in the ESACAP
language such as (1) the delay function, (2) the do-loop, and (3) the sensitivity calculation. The
description language of ESACAP is a genuine simulation and modeling language. However, for describ-
ing simple systems, the input language is just slightly more complicated than the languages of SPICE,
APLAC, and NAP2. Data are specified in a number of blocks (‘‘chapters’’ and ‘‘sections’’) starting with $$
and $. Note how the line model is specified in a do-loop where ESACAP creates nodes and branches of a
ladder network [11].
Example.155 Tapered line in the time domain.

# Calculation of sensitivities.
# This example shows the use of a do-loop for the discretization of a
# tapered transmission line into a chain of short line segments. The
# example also demonstrates how to specify partial derivatives of any
# parameter for sensitivity calculations.
$$DESCRIPTION # chapter - - - - - - - - - - - - - - - - - - - - - - - - - - -
$CON: n_sections¼60; END; # section- - - - - - - - - - - - - - - - - - - -
# n_sections is defined as a globally available constant.
# Only this constant needs to be modified in order to change
# the resolution of discretization
# Transmission line specified by characteristic impedance and length.

# Modelled by the ESACAP delay function (DEL).
$MODEL: LineCell(in,out): Z0,length;
delay ¼ length=3e8;
J_reverse(0,in) ¼ DEL(2*V(out)=Z0-I(J_forward), delay);
J_forward(0,out) ¼ DEL(2*V(in)=Z0-I(J_reverse), delay);
G1(in,0) ¼ 1=Z0; G2(out,0) ¼ 1=Z0;
END; # end of section- - - - - - - - - - - - - - - -- -
# Tapered line specified by input and output impedance and length
# This model calls LineCell n_sections times in a do-loop.
$MODEL: TaperedLine(in,out): Z1,Z2,length;
ALIAS_NODE(in,1); # Let node in and 1 be the same.
ALIAS_NODE(out,[n_sectionsþ1]); # Let node out and n_sectionsþ1 be
# the same.
# Notice that values in square brackets become part of an identifier
FOR (i¼1, n_sections) DO
X[i]([i],[iþ1]) ¼ LineCell(Z1þi*(Z2-Z1)=n_sections, length=n_sections);
ENDDO;
END; # end of section - - - - - - - - - - - - - - - - - -
# Main network calls the model of the tapered line and terminates
# it by a 50 ohm source and 100 ohm load.
$NETWORK: # section- - - - - - - - - - - - - - - - - - --
IF(TIME.LT.1n) THEN
Esource(source,0) ¼ 0;
ELSE
Esource(source,0) ¼ 1;
ENDIF;
# Esource(source,0) ¼ TABLE(TIME,(0,0),(1n,0),(1.001n,1),(10n,1));
Rsource(source,in) ¼ 50;
Rload(out,0) ¼ 100;
Z1¼50; Z2¼100; length¼1;
X1(in,out) ¼ TaperedLine(Z1,Z2,length);
END; # end of section - - - - - - - - - - - - - - - - - - - - - -
# Time-domain analysis
$$TRANSIENT # chapter- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
# Analysis parameters
$PARAMETERS: # section- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
TIME ¼ 0,20n; # Total time sweep
HMAX ¼ 2p; # Max integration step
END; # end of section- - - - - - - - - - - - - - - - - - - - - --
# Specification of desired results. Adding an exclamation mark (!) to an
# output will show the value on the ESACAP real-time graphics display.
$DUMP: # section- - - - - - - - - - - - - - - - - - - - - -
FILE¼<dump.155>; TIME¼0,20n,20p;
TIME; V(in)!; V(out)!;
(V(in),DER(Z1))!; # Partial derivatives with respect
(V(out),DER(Z1))!; # to Z1
END; # end of section - - - - - - - - - - - - - - - - - - -
$$STOP # chapter- - - - - - - - - - - - - - - - - - - - - - - - - -
The result of the analysis is presented in Figure 12.4.

Simulation 12-17
1.0000 V(out)
V(in)
V(out)
V(in)
0.0000
0.0000 20.00
(a) Time (ns)
5.000 m d(V(out))/d(Z1)
d(V(in))/d(Z1)
d(V(in))/d(Z1)
d(V(out))/d(Z1)
0.0000
0.0000 20.00
(b) Time (ns)
FIGURE 12.4 (a) ESACAP analysis. The input voltage of the tapered line: V(in) and the output voltage of the
tapered line: V(out) as functions of time in the interval from 0 to 20 ns. (b) The sensitivities of V(in) and V(out) with
respect to Z1.
12.3.5 DYNAST
DYNAST [7] was developed in 1992 in a joint venture between the Czech Technical University, Prague,
the Czech Republic and Katholieke Universiteit Leuven, Heverlee, Belgium. The program was developed
as an interdisciplinary simulation and design tool in the field of ‘‘mechatronics’’ (mixed mechanical=
electrical systems).
The main purpose of DYNAST is to simulate dynamic systems decomposed into subsystems defined
independently of the system structure. The structure can be hierarchical. DYNAST is a versatile software
tool for modeling, simulation, and analysis of general linear as well as nonlinear dynamic systems, both in
time and frequency domain. Semisymbolic analysis is possible (poles and zeros of network functions,
inverse Laplace transformation using closed-form formulas).
Three types of subsystem models are available in DYNAST. The program admits systems descriptions
in the form of (1) a multipole diagram respecting physical laws, (2) a causal or an acausal block diagram,
(3) a set of equations, or (4) in a form combining the above approaches.
1. In DYNAST the physical-level modeling of dynamic systems is based on subsystem multipole
models or multiterminal models. These models respect the continuity and compatibility postulates
that apply to all physical energy-domains. (The former postulate corresponds to the laws of
conservation of energy, mass, electrical charge, etc.; the latter is a consequence of the system
connectedness.) The multipole poles correspond directly to those subsystem locations in which the
actual energetic interactions between the subsystems take place (such as shafts, electrical terminals,
pipe inlets, etc.). The interactions are expressed in terms of products of complementary physical
quantity pairs: the through variables flowing into the multipoles via the individual terminals, and
the across variables identified between the terminals.
2. The causal blocks, specified by explicit functional expressions or transfer functions, are typical for
any simulation program. But the variety of basic blocks is very poor in DYNAST, as its language
permits definition of the block behavior in a very flexible way. Besides the built-in basic blocks,
user specified multi-input multi-output macroblocks are available as well. The causal block
interconnections are restricted by the rule that only one block output may be connected to one
or several block inputs. In the DYNAST block variety, however, causal blocks are also available
with no restrictions imposed on their interconnections, as they are defined by implicit-form
expressions.
3. DYNAST can also be used as an equation solver for systems of nonlinear first-order algebro-
differential and algebraic equations in the implicit form. The equations can be submitted in a
natural way (without converting them into block diagrams) using a rich variety of functions
including the Boolean, event-dependent, and tabular ones. The equations, as well as any other
input data, are directly interpreted by the program without any compilation.
The equation formulation approach used for both multipoles and block diagrams evolved from the
extended method of nodal voltages (MNA) developed for electrical systems. Because all the equations of
the diagrams are formulated simultaneously, no problems occur with the algebraic loops. As the
formulated equations are in the implicit form, it does not create any problems with the causality of
the physical models.
The integration method used to solve the nonlinear algebro-differential and algebraic equations is
based on a stiff-stable implicit backward-differentiation formula (a modified Gear method). During
the integration, the step length as well as the order of the method is varied continuously to minimize
the computational time while respecting the admissible computational error. Jacobians necessary for the
integration are computed by symbolic differentiation. Their evaluation as well as their LU decomposition,
however, is not performed at each iteration step if the convergence is fast enough. Considerable savings of
computational time and memory are achieved by a consistent matrix sparsity exploitation.
To accelerate the computation of periodic responses of weakly damped dynamic systems, the iterative
epsilon-algorithm is utilized. Also, fast-Fourier transformation is available for spectral analysis of the
periodic steady-state responses.
DYNAST runs under DOS- or WINDOWS-control on IBM-compatible PCs. Because it is coded in
FORTRAN 77 and C-languages, it is easily implemented on other platforms. It is accompanied by a
menu-driven graphical environment. The block and multiport diagrams can be submitted in a graphical
form by a schematic capture editor. DYNAST can be easily augmented by various pre- and postpro-
cessors because all its input and output data are available in the ASCII code. Free ‘‘net-list’’ access to
DYNAST is possible by means of e-mail or online over the Internet [7].
References
1. Calahan, D. A., Computer-Aided Network Design. New York: McGraw-Hill, 1972.
2. Chua, L. O. and P. M. Lin, Computer-Aided Analysis of Electronic Circuits. Englewood Cliffs, NJ:
Prentice Hall, 1975.
3. Dertouzos, M. L. et al., Systems, Networks, and Computation: Basic Concepts. New York: McGraw-
Hill, 1972.
4. Ostrowski, A. M., Solution of Equations and Systems of Equations. New York: Academic Press, 1966.
Simulation 12-19
5. Valtonen, M. et al., APLAC—An Object-Oriented Analog Circuit Simulator and Design Tool. Espoo,
Finland: Circuit Theory Lab., Helsinki University of Technology and Nokia Corporation Research
Center, 1992, http:==www.aplac.hut.fi=aplac=general.html, http:==www.aplac.com=
6. Intusoft, IsSpice3—ICAPS System Packages. San Pedro, CA: Intusoft, 1994, http:==www.intusoft.com=
7. Mann, H., DYNAST—A Multipurpose Engineering Simulation Tool. Prague, Czech Republic:
The Czech Technical University, 1994, http:==www.it.dtu.dk=ecs=teacher.htm, http:==icosym.cvut.
cz=cacsd=msa=onlinetools.html, http:==icosym.cvut.cz=dyn=download=public=
8. Meta-Software, HSPICE User’s Manual H9001. Campbell, CA: Meta-Software, 1990.
9. MicroSim, PSpice—The Design Center. Irvine, CA: MicroSim, 1994, http:==www.cadencepcb.com and
http:==www.pspice.com=
10. Rübner-Petersen, T., NAP2—A Nonlinear Analysis Program for Electronic Circuits, Version 2, Users
Manual 16=5-73, Report IT-63, ISSN-0105-8541. Lyngby, Denmark: Institute of Circuit Theory and
Telecommunication, Technical University of Denmark, 1973, http:==www.it.dtu.dk=ecs=programs
htm#nnn, http:==www.it.dtu.dk=ecs=napanp.htm
11. Stangerup, P., ESACAP User’s Manual. Nivaa, Denmark: StanSim Research Aps., 1990, http:==www.it.
dtu.dk=ecs=esacap.htm
12. Vlach, J. and K. Singhal, Computer Methods for Circuit Analysis and Design. New York:
Van Nostrand Reinhold, 1983.
13. Funk, D. G. and D. Christiansen (Eds.), Electronic Engineers’ Handbook, 3rd ed. New York: McGraw-
Hill, 1989.
13
Cellular Neural
Networks and Cellular
Wave Computers
13.1 Introduction: Definition and Classification ..................... 13-1
Typical CNN Models
13.2 Simple CNN Circuit Structure ........................................... 13-3
Tamás Roska 13.3 Stored Program CNN Universal Machine
Hungarian Academy of Sciences and
and the Analogic Supercomputer Chip............................ 13-6
Pázmány Péter Catholic University
13.4 Applications ............................................................................ 13-8
Ákos Zarándy Image Processing—Form, Motion, Color, and Depth .
Hungarian Academy of Sciences and Partial Differential Equations . Relation to Biology

Pázmány Péter Catholic University 13.5 Template Library: Analogical CNN Algorithms .......... 13-11
13.6 Recent Advances .................................................................. 13-16
Csaba Rekeczky
Eutecus Inc. and Pázmány Péter 13.7 Recent Developments and Outlook................................. 13-17
Catholic University References .......................................................................................... 13-18
13.1 Introduction: Definition and Classification

Current very-large-scale integration (VLSI) technologies provide for the fabrication of chips with several
million transistors. With these technologies a single chip may contain one powerful digital processor, a
huge memory containing millions of very simple units placed in a regular structure, and other complex
functions. A powerful combination of a simple logic processor placed in a regular structure is the cellular
automaton invented by John von Neumann. The cellular automaton is a highly parallel computer
architecture. Although many living neural circuits resemble this architecture, the neurons do not function
in a simple logical mode: they are analog ‘‘devices.’’ The cellular neural network architecture, invented by
Chua and his graduate student Yang [1], has both the properties: the cell units are nonlinear continuous-
time dynamic elements placed in a cellular array. Of course, the resulting nonlinear dynamics in space
could be extremely complex. The inventors, however, showed that these networks can be designed and
used for a variety of engineering purposes, while maintaining stability and keeping the dynamic range
within well-designed limits. Subsequent developments have uncovered the many inherent capabilities of
this architecture (IEEE conferences: CNNA-90, CNNA-92, CNNA-94, 96, 98, 00, 02; Special issues:
International Journal of Circuit Theory and Applications, 1993, 1996, 1998, 2002; and IEEE Transactions
on Circuits and Systems, I and II, 1993, 1999, etc.). In the circuit implementation, unlike analog computers
or general neural networks, the cellular neural=nonlinear network (CNN) cells are not the ubiquitous high-
gain operational amplifiers. In most practical cases, they are either simple unity-gain amplifiers or simple
second- or third-order simple dynamic circuits with one to two simple nonlinear components. Tractability
13-1
in the design and the possibility for exploiting the complex nonlinear dynamic phenomena in space, as well
as the trillion operations per second (TeraOPS) computing speed in a single chip are but some of the many
attractive properties of cellular neural networks. The trade-off is in the accuracy; however, in many cases,
the accuracy achieved with current technologies is enough to solve a lot of real-life problems.
The CNN is a new paradigm for multidimensional, nonlinear, dynamic processor arrays [1,2]. The
mainly uniform processing elements, called cells or artificial neurons, are placed on a regular geometric
grid (with a square, hexagonal, or other pattern). This grid may consist of several two-dimensional (2-D)
layers packed upon each other (Figure 13.1). Each processing element or cell is an analog dynamical
system, the state (x), the input (u), and the output (y) signals are analog (real-valued) functions of time
(both continuous-time and discrete-time signals are allowed). The interconnection and interaction
pattern assumed at each cell is mainly local within a neighborhood Nr, where Nr denotes the first ‘‘r’’
circular layers of surrounding cells. Figure 13.2 shows a 2-D layer with a square grid of interconnection
FIGURE 13.1 CNN grid structure with the processing elements (cells) located at the vertices.
i – 1 j – 1 i – 1j i–1j+1
CNN array
ij – 1 ij + 1
i + 1 j – 1 i + 1j i+1j+1
Row i Each cell has three time variables:

1. State xij(t)
2. Input uij(t)
3. Output yij(t)
Column j and a constant (threshold)
βij
FIGURE 13.2 A single, 2-D CNN layer and a magnified cell with its neighbor cells with the normal neighborhood
radius r ¼ 1.
Cellular Neural Networks and Cellular Wave Computers 13-3
radius of 1 (nearest neighborhood). Each vertex contains a cell and the edges represent the interconnec-
tions between the cells. The pattern of interaction strengths between each cell and its neighbors is the
‘‘program’’ of the CNN array. It is called a cloning template (or just template).
Depending on the types of grids, processors (cells), interactions, and modes of operation, several
classes of CNN architectures and models have been introduced. Although the summary below is not
complete, it gives an impression of vast diversities.
13.1.1 Typical CNN Models

1. Grid type
. Square
. Hexagonal
. Planar
. Circular
. Equidistant
. Logarithmic
2. Processor type
. Linear
. Sigmoid
. First-order
. Second-order
. Third-order
3. Interaction type
. Linear memoryless
. Nonlinear
. Dynamic
. Delay-type
4. Mode of operation
.
Continuous-time
. Discrete-time
. Equilibrium
. Oscillating
. Chaotic
13.2 Simple CNN Circuit Structure

The simplest first-order dynamic CNN cell used in the seminal paper [1] is illustrated in Figure 13.3. It is
placed on the grid in the position ij (row i and column j). It consists of a single state capacitor with a
parallel resistor and an amplifier [ f(xij)]. This amplifier is a voltage-controlled current source (VCCS),
where the controlling voltage is the state capacitor voltage. To make the amplifier model self-contained, a
parallel resistor of unit value is assumed to be connected across the output port. Hence, the voltage
transfer characteristic of this amplifier is also equal to f(). In its simplest form this amplifier has a unity-
gain saturation characteristic (see Figure 13.7 for more details).
The aggregate feedforward and feedback interactions are represented by the current sources iinput and
ioutput, respectively. Figure 13.4 shows these interactions in more detail. In fact, the feedforward
interaction term iinput is a weighted sum of the input voltages (ukl) of all cells in the neighborhood
(Nr). Hence, the feedforward template, the so-called B template, is a small matrix of size (2r þ 1) 3 (2
r þ 1) containing the template elements bkl, which can be implemented by an array of linear VCCSs. The
controlling voltages of these controlled sources are the input voltages of the cells within the neighborhood
of radius r. This means, for example, that b12 is the VCCS controlled by the input voltage of the cell lying
Input State Output
+ + ioutput +
xij
uij iinput I R + yij = f(xij)
f(xij) –
– – –
FIGURE 13.3 Simple first-order CNN cell.
iinput = Σbkl ukl ioutput = Σakl ykl
b11 b12 b13 a11 a12 a13
b21 b22 b23 a21 a22 a23
b31 b32 b33 a31 a32 a33
Coefficients bkl Coefficients akl

specified by specified by
Feedforward Feedback
template B template A
FIGURE 13.4 The 19 numbers (a program) that govern the CNN array (the 19th number is the constant bias term
I, but it is not shown in the figure) define the cloning template (A, B, and I).
north from the cell ij. In most practical cases the B template is translation invariant, i.e., the interaction
pattern (the B template) is the same for all cells. Hence, the chip layout will be very regular (as in
memories or PLAs). The feedback interaction term ioutput is a weighted sum of the output voltages (ykl) of
all cells in the neighborhood (Nr). The weights are the elements of a small matrix A called the A template
(or feedback template). Similar arguments apply for the A template as for the B template discussed
previously. If the constant threshold term is translation invariant as denoted by the constant current
source I, then in the case of r ¼ 1, the complete cloning template contains only 19 numbers (A and B and
I, i.e., 9 þ 9 þ 1 terms), irrespective of the size of the CNN array. These 19 numbers define the task which
the CNN array can solve.
What kind of tasks are we talking about? The simplest, and perhaps the most important, are image-
processing tasks. In the CNN array computer, the input and output images are coded as follows. For
each picture element (called pixel) in the image, a single cell is assigned in the CNN. This means that a
one-to-one correspondence exists between the pixels and the CNN cells. Voltages in the CNN cells code
the grayscale values of the pixels. Black is coded by þ1 V, white is 1 V, and the grayscale values are in
between. Two independent input images can be defined pixel-by-pixel: the input voltages uij and the
initial voltage values of the capacitors xij (0) (cell-by-cell). Placing these input images onto the cell array
and starting the transient, the steady-state outputs yij will encode the output image. The computing
time is equal to the settling time of the CNN array. This time is below 1 ms using a CNN chip made with a
1.0–1.5 mm technology containing thousands of CNN processing elements, i.e., pixels, in an area of
about 2 cm2. This translates to a computing power of several 100 billion operations per second (GXPS).
The first tested CNN chip [3] was followed by several others implementing a discrete-time CNN
model [4] and chips with on-chip photosensors in each cell [5].
For example, if we place the array of voltage values defined by the image shown in Figure 13.5b as
the input voltage and the initial state capacitor voltage values in the CNN array with the cloning template
shown in Figure 13.5a, then after the transients have settled down, the output voltages will encode
the output image of Figure 13.5c. Observe that the vertical line has been deleted. Since the image
000 0 –0.25 0
A = 0 2 0 , B = 0 0 0 , I = – 1.5
000 0 –0.25 0
(a)
(b) (c)
FIGURE 13.5 An input and output image where the vertical line was deleted.
contains 40 3 40 pixels, the CNN array contains 40 3 40 cells. It is quite interesting that if we had more
than one vertical line, the computing time would be the same. Moreover, if we had an array of 100 3 100
cells on the chip, the computing time would remain the same as well. This remarkable result is due to the
fully parallel nonlinear dynamics of the CNN computer. Some propagating-type templates induce
wavelike phenomena. Their settling times increase with the size of the array.
For other image-processing tasks, processing form, motion, color, and depth, more than 100 cloning
templates have been developed to date and the library of new templates is growing rapidly. Using the
Cellular Neural Network Workstation Tool Kit [6], they can be called in from a CNN template library
(CTL). New templates are being developed and published continually.
The dynamics of the CNN array is described by the following set of differential equations:
dxij =dt ¼ xij þ I þ ioutput þ iinput

yij ¼ f (xij )
i ¼ 1, 2, . . . , N and j ¼ 1, 2, . . . , M (the array has N M cells)
where the last two terms in the state equation are given by the sums shown in Figure 13.4.
We can generalize the domain covered by the original CNN defined via linear and time-invariant
templates by introducing the ‘‘nonlinear’’ templates (denoted by ‘‘^’’) and the ‘‘delay’’ templates
(indicated by t in the superscript) as well, to obtain the generalized state equation shown below.
The unity-gain nonlinear sigmoid characteristics f are depicted in Figure 13.6.
dvxij X X
¼ vxij þ Iij þ ^ ij;kl (vykl (t), vyij (t)) þ
A ^ ij;kl (vukl (t), vuij (t))
B
dt kl2Nr (ij) kl2Nr (ij)
X X
þ Atij;kl vykl (t t) þ Btij;kl vukl (t t)
kl2Nr (ij) kl2Nr (ij)
Several strong results have been proved that assure stable and reliable operations. If the A template is
symmetric, then the CNN is stable. Several other results have extended this condition [4,7]. The sum of
the absolute values of all the 19 template elements plus 1 defines the dynamic range within which the
f (V)
–1
1 V
–1
FIGURE 13.6 The simple unity-gain sigmoid characteristics.
• 1-, 2-, 3-, or n-dimensional array of mainly identical dynamical systems, called cells or
processor units, which satisfies two properties:
• Most interactions are local within a finite radius r
• All state variables are continuous valued signals
FIGURE 13.7 CNN definition.
state voltage remains bounded during the entire transient, if the input and initial state signals are <1 V in
absolute value [1].
In a broader sense, the CNN is defined [8] as shown in Figure 13.7, see also Ref. [32].
13.3 Stored Program CNN Universal Machine

and the Analogic Supercomputer Chip
For different tasks, say image-processing, we need different cloning templates. If we want to implement
them in hardware, we would need different chips. This is inefficient except for dedicated, mass-
production applications.
The invention of the CNN universal machine [9] has overcome the problem above. It is the first
stored-program array computer with analog nonlinear array dynamics. One CNN operation, for
example, solving thousands of nonlinear differential equations in a microsecond, is just one single
instruction. In addition, a single instruction is represented by just a few analog (real) values (numbers).
In the case when the nearest neighborhood is used, only 19 numbers are generated. When combining
several CNN templates, for example, extracting first contours in a grayscale image, then detecting
those areas where the contour has holes, etc., we have to design a flowchart logic that satisfies the
correct sequence of the different templates. The simple flowchart for the previous example is shown in
Figure 13.8. One key point is that, in order to exploit the high speed of the CNN chips, we have to store
the intermediate results cell-by-cell (pixel-by-pixel). Therefore, we need a local analog memory (LAM).
By combining several template actions we can write more complex flowcharts for implementing almost
any analogic algorithms. The name analogic is an acronym for ‘‘analog and logic.’’ It is important to
realize that analogic computation is completely different from hybrid computing. To cite just one point,
among others, no A=D or D=A conversions occur during the computation of an analogic program. As
with digital microprocessors, to control the execution of an analogic algorithm, we need a global
programming unit. The global architecture of the CNN universal machine is shown in Figure 13.9.
Input: grayscale image
Contour detection template
Image with contour lines
Hole detection template
Output image
FIGURE 13.8 Flowchart representing the logic sequence of two templates.
LCCU
L L A cell
CNN
A L unit
nucleus
M M
LAOU LLU
GAPU
GAPU
GAPU: Global analogic

program unit
APR Global analog program instruction register

LPR Global logic program register
SCR Switch configuration register
GACU Global analogic control unit
FIGURE 13.9 Global architecture of the CNN universal machine.

As we can see from this figure, the CNN nucleus described in Section 13.2 has been generalized to include
several crucial functions depicted in the periphery. We have already discussed the role of the LAM that
provides the local (on-chip) storage of intermediate analog results. Because the results of many detection tasks
in applications involve only black-and-white logic values, adding a local logic memory (LLM) in each cell is
crucial. After applying several templates in a sequence, it is often necessary to combine their results.
For example, to analyze motion, consecutive snapshots processed by CNN templates are compared. The
local analog output unit (LAOU) and the local logic unit (LLU) perform these tasks, both on the local
analog (gray scale) and the logical (black-and-white) values. The local communication and control unit
(LCCU) of each cell decodes the various instructions coming from the global analogic program unit (GAPU).
The global control of each cell is provided by the GAPU. It consists of four parts:
1. Analog program (instruction) register (APR) stores the CNN template values (19 values for each
CNN template instruction in the case of nearest interconnection). The templates stored here will be
used during the run of the prescribed analogical algorithm.
2. Global logic program register (LPR) stores the code for the LLUs.
3. Flexibility of the extended CNN cells is provided by embedding controllable switches in each cell.
By changing the switch configurations of each cell simultaneously, we can execute many tasks
using the same cell. For example, the CNN program starts by loading a given template, storing
the results of this template action in the LAM, placing this intermediate result back on the input
to prepare the cell, starting the action with another template, etc. The switch configurations of
the cells are coded in the switch configuration register (SCR).
4. Finally, the heart of the GAPU is the global analogic control unit (GACU), which contains the
physical machine code of the logic sequence of analogical algorithm. It is important to emphasize
that here the control code is digital; hence, although its internal operation is analog and logical, a
CNN universal chip can be programmed with the same flexibility and ease as a digital micropro-
cessor—except the language is much simpler. Indeed, a high-level language, a compiler, an
operating system, and an algorithm development system are available for CNN universal chip
architectures. Moreover, by fabricating optical sensors cell-by-cell on the chip [5], the image input
is directly interfaced.
The CNN universal chip is called supercomputer chip because the execution speed of an analogic
algorithm falls in the same range as the computing power of today’s average digital supercomputers
(a TeraOPS). Another reason for this enormous computing power is that the reprogramming time of
a new analog instruction (template) is of the same order, or less, than the analog array execution time
(less than a microsecond). This is about 1 million times faster than some fully interconnected
analog chips.
Based on the previously mentioned novel characteristics, the CNN universal chip can be considered to
be an analogic microprocessor.
13.4 Applications
In view of its flexibility and its very high speed in image-processing tasks, the CNN universal machine is
ideal for many applications. In the following, we briefly describe three areas. For more applications, the
reader should consult the references at the end of this chapter.
13.4.1 Image Processing—Form, Motion, Color, and Depth

Image processing is currently the most popular application of CNN. Of the more than 100 different
templates currently available, the vast majority are for image-processing tasks. Eventually, we will
have templates for almost all conceivable local image-processing operations. Form (shape), motion,
color, and depth can all be ideally processed via CNN. The interested reader can find many examples and
FIGURE 13.10 Halftoning: an original grayscale image (LHS) and its halftoned version (RHS). A low resolution is
deliberately chosen in (b) in order to reveal the differing dot densities at various regions of the image.
applications in the references. CNN handles analog pixel values, so grayscale images are processed
directly.
Many templates detect simple features like different types of edges, convex or concave corners, lines
with a prescribed orientation, etc. Other templates detect semiglobal features like holes, groups of objects
within a given size of area, or delete objects smaller than a given size. There are also many CNN global
operations like calculating the shadow, histogram, etc. Halftoning is commonly used in fax machines,
laser printers, and newspapers. In this case, the local gray level is represented by black dots of identical
size, whose density varies in accordance with the gray level. CNN templates can do this job as well.
A simple example is shown in Figure 13.10. The original grayscale image is shown on the left-hand side,
the halftoned image is shown on the right-hand side. The ‘‘smoothing’’ function of our eye completes the
image-processing task.
More complex templates detect patterns defined within the neighborhood of interaction. In this case,
the patterns of the A and B templates somehow reflect the pattern of the object to be detected.
Because the simplest templates are translation invariant, the detection or pattern recognition is
translation invariant as well. By clever design, however, some rotationally invariant detection procedures
have been developed as well.
Combining several templates according to some prescribed logic sequence, more complex pattern
detection tasks can be performed, e.g., halftoning.
Color-processing CNN arrays represent the three basis colors by single layers via a multilayer CNN.
For example, using the red-green-blue (RGB) representation in a three-layer CNN, simple color-
processing operations can be performed. Combining them with logic, conversions between various
color representations are possible.
One of the most complex tasks that has been undertaken by an analogic CNN algorithm is the
recognition of bank notes. Recognition of bank notes in a few milliseconds is becoming more and more
important. Recent advances in the copy machine industry have made currency counterfeiting easier.
Therefore, automatic bank note detection is a pressing need. Figure 13.11 shows a part of this process
(which involves color processing as well). The dollar bill shown in the foreground is analyzed and the
circles of a given size are detected (colors are not shown). The ‘‘color cube’’ means that each color
intensity is within prescribed lower and upper limit values.
Motion detection can be achieved by CNN in many ways. One approach to process motion is to apply
two consecutive snapshots to the input and the initial state of the CNN cell. The CNN array calculates the
various combinations between the two snapshots. The simplest case is just taking the difference to detect
(a) (b)
(c) (d)
FIGURE 13.11 Some intermediate steps in the dollar bill recognition process. An input image (a) shown here in
single color results in the ‘‘color cube’’ (b), the convex objects (c), and the size classification (d).* (From Zarándy, A.,
Werblin, F., Roska, T., Chua, L.O., and Novel type of analogical CNN algorithms for recognizing bank
notes, Memorandum UCB=ERL, M94=29 1994, Electronics Research Laboratory, University of California, Berkeley,
CA, 1994. With permission.)
motion. Detecting direction, shape, etc. of moving objects are only the simplest problems that can be
solved via CNN. In fact, even depth detection can be included as well.
13.4.2 Partial Differential Equations

As noted in the original paper [1], even the simple-cell CNN with the linear template
2 3
0 1 0
A ¼ 41 3 1 5, B ¼ 0, I ¼ 0
0 1 0
can approximate the solution of a diffusion-type partial differential equation (PDE) on a discrete spatial
grid. This solution maintains continuity in time, a nice property not possible in digital computers.
By adding just a simple capacitor to the output, i.e., by placing a parallel RC circuit across the output port
of the cell of Figure 13.3, the following wave equation will be represented in a discrete space grid:
d2 p(t)=dt 2 ¼ Dp
* Figure 13.11 shows a part of this process [31] (which involves color processing as well). The dollar bill shown in the
foreground is analyzed and the circles of a given size are detected (colors are not shown).
FIGURE 13.12 The length tuning effect. The input image on the LHS contains bars of different lengths. The out
image on the RHS contains only those that are smaller than a given length. (From Roska, T., Hámori, J., Lábos, E.,
Lotz, K., Takács, J., Venetianer, P., Vidnyánszki, Z., and Zarándy, A., IEEE Trans. Circuits Syst. I, 40, 182, 1993.
With permission.)
where
p(t) ¼ P(x, y, t) is the state (intensity) variable on a 2-D plane (x, y)
D is the Laplacian operator (the sum of the second derivatives related to x and y)
In some cases, it is useful to use a cell circuit that is chaotic. Using the canonical Chua’s circuit, other
types of PDEs can be modeled, generating effects like autowaves, spiral waves, Turing patterns, and so on
(e.g., Perez-Munuzuri et al. in Ref. [7]).
13.4.3 Relation to Biology

Many topographical sensory organs have processing neural-cell structures very similar to the CNN model.
Local connectivity in a few sheets of regularly situated neurons is very typical. Vision, especially the
retina, reflects these properties strikingly. It is not surprising that, based on standard neurobiological
models, CNN models have been applied to the modeling of the subcortical visual pathway [10]. Moreover,
a new method has been devised to use the CNN universal machine for combining retina models of different
species in a programmed way. Modalities from other sensory organs can be modeled similarly and
combined with the retina models [11]. This has been called bionic eye.
Many of these models are neuromorphic. This means that there is a one-to-one correspondence
between the neuroanatomy and the CNN structure. Moreover, the CNN template reflects the intercon-
nection pattern of the neurons (called receptive field organizations). Length tuning is such an example.
A corresponding input and output picture of the neuromorphic length tuning model is shown in
Figure 13.12. Those bars that have lengths smaller than or equal to three pixels are detected.
13.5 Template Library: Analogical CNN Algorithms

During the last few years, after the invention of the cellular neural network paradigm and the CNN
universal machine, many new cloning templates have been discovered. In addition, the number of
innovative analogical CNN algorithms, combining both analog cloning templates and local as well as
global logic, is presently steadily increasing at a rapid rate.
As an illustration, let us choose a couple of cloning templates from the CNN library [1,12]. In
each case, a name, a short description of the function, the cloning templates, and a representative
input–output image pair are shown. With regard to the inputs, the default case means that the input
and initial state are the same. If B ¼ 0, then the input picture is chosen as the initial state.
Name: AVERAGE
Function. Spatial averaging of pixel intensities over the r ¼ 1 convolutional window.
2 3 2 3
0 1 0 0 0 0
A ¼ 41 2 1 5, B ¼ 40 0 0 5, I ¼ 0
0 1 0 0 0 0
Example. Input and output picture.
Name: AND
Function. Logical ‘‘AND’’ function of the input and the initial state pictures.
2 3 2 3
0 0 0 0 0 0
A ¼ 4 0 1:5 0 5, B ¼ 4 0 1:5 0 5, I ¼ 1
0 0 0 0 0 0
Example. Input, initial state, and output picture.
Input 1 Input 2 Output 2
Name: CONTOUR
Function. Grayscale contour detector.
2 3 2 3
0 0 0 a a a
A ¼ 40 2 0 5, B ¼ 4 a a a 5, I ¼ 0:7
0 0 0 a a a
0.5
–0.18 0.18
v x1 j –v xk1
–1
Name: CORNER
Function. Convex corner detector.
2 3 2 3
0 0 0 0:25 0:25 0:25
A ¼ 40 2 0 5, B ¼ 4 0:25 2 0:25 5, I ¼ 3
0 0 0 0:25 0:25 0:25
Input 1 Output 1
Name: DELDIAG1
Function. Deletes one pixel wide diagonal lines (5).

2 3 2 3
0 0 0 0:25 0 0:25
A ¼ 40 2 0 5, B¼4 0 0 0 5, I ¼ 2
0 0 0 0:25 0 0:25
Input 1 Output 2
Name: DIAG
Function. Deletes the diagonal lines.
2 3 2 3
0 0 0 0 0 1 1 0:5 0:5 1
60 0 0 0 07 6 1 0:5 1 1 0:5 7
6 7 6 7
A¼6
60 0 2 0 077, B¼6
6 0:5 1 5 1 0:5 7
7, I ¼ 9
40 0 0 0 05 4 0:5 1 1 0:5 1 5
0 0 0 0 0 1 0:5 0:5 1 1
Input 1 Output 1
Name: EDGE
Function. Black-and-white edge detector.
2 3 2 3
0 0 0 0:25 0:25 0:25
A ¼ 40 2 0 5, B ¼ 4 0:25 2 0:25 5, I ¼ 1:5
0 0 0 0:25 0:25 0:25
Input 1 Output 1
Name: MATCH
Function. Detects 3 3 3 patterns matching exactly the one prescribed by the template B, namely, having
a black=white pixel where the template value is 1, respectively.
2 3 2 3
0 0 0 v v v
A ¼ 40 1 0 5, B ¼ 4 v v v 5, I ¼ N þ 0:5
0 0 0 v v v
where
v ¼ þ1, if corresponding pixel is required to be black
v ¼ 0, if corresponding pixel is don’t care
v ¼ 1, if corresponding pixel is required to be white
N ¼ number of pixels required to be either black or white, i.e., the number of nonzero values in the
B template
Example. Input and output picture, using the following values:

2 3 2 3
0 0 0 1 1 1
A ¼ 40 1 0 5, B ¼ 4 0 1 0 5, I ¼ 6:5
0 0 0 1 1 1
Input 1 Output 1
Name: OR
Function. Logical ‘‘OR’’ function of the input and the initial state.
2 3 2 3
0 0 0 0 0 0
A ¼ 40 3 0 5, B ¼ 40 3 0 5, I ¼ 2
0 0 0 0 0 0
Example. Input, initial state, and output picture.
Input 1 Input 2 Output 2
Name: PEELIPIX
Function. Peels one pixel from all directions.
2 3 2 3
0 0:4 0 4:6 2:8 4:6
A ¼ 4 0:4 1:4 0:4 5, B ¼ 4 2:8 1 2:8 5, I ¼ 7:2
0 0:4 0 4:6 2:8 4:6
Input 1 Output 1
13.6 Recent Advances

After the first few integrated circuit implementations of the basic CNN circuits, stored programmable
analogic CNN universal machine chips have been fabricated. Indeed, a full-fledged version of them [13]
is the first visual microprocessor, all the 4096 cell processors of it contain an optical sensor right on the
surface of the chip (a focal plane). This implementation represents, at the same time, the most complex
operational, stored programmable analog CMOS integrated circuit ever reported, in terms of the number
of transistors operating in analog mode (about 1 million). The equivalent digital computing power of this
visual microprocessor is about a few TeraOPS. It processes grayscale input images and has a grayscale
output. A 128 3 128 processor version has recently been fabricated. A binary input=output CNN
universal machine chip with 48 3 48 cell processors has a higher cell density [14], and another circuit
design strategy [15] is aiming to implement 5 3 5 or even higher neighborhood templates.
These chips are the first examples of a new, analogic, topographic (spatial-temporal) computing
technology. Its computational infrastructure (high-level language, called Alpha, compiler, operating
system, etc.) has also been developed [16], and the industrial applications have been started in a couple
of companies worldwide. Moreover, a key application area of this technology is sensor computing [17].
Integrating 2-D topographic sensor arrays with the CNN universal machine on a single chip, providing a
direct, dynamic interaction with tuning of the sensors, this is a capability no other technology offers with
comparable computational power.
Recently, it has been shown that PDE-based techniques, the most advanced methods for complex
image-processing problems, could solve tasks intractable with other methods. Their only drawback is the
excessive digital computing power they need. In our cellular computing technology, however, the
elementary instruction could be a solution of a PDE. It has been shown that, in addition to the simple
diffusion PDE implementation described previously, almost all PDEs can be implemented by CNN [18].
Indeed, active waves [2] have been successfully applied using operational analogic CNN universal
machine chips with 4096 cell processors, manifesting at least three orders of magnitude speed advantage
compared to fully digital chips of comparable IC technology feature size.
Following the first steps in modeling living sensory modalities, especially vision, motivated especially
by a breakthrough in understanding the neurobiological constructs of the mammalian retina [19], new
models and a modeling framework [20] have been developed based on CNNs. Their implementation in
complex cell CNN universal machines [21] is under construction.
Studies on complexity related to CNN models and implementations have been emerging recently.
Following the groundbreaking theoretical studies of Turing on the morphogenesis of CNN-like coupled
nonlinear units [22] and a few experimental case studies of the well-publicized ‘‘complex systems,’’ as
well as many exotic waves generated by coupled A template CNNs, the root of complexity in pattern
formation at the edge of chaos has been discovered [23]. As far as the computational complexity is
concerned, the study of a new quality of computational complexity has been explored [24], showing
qualitatively different properties compared to the classical digital complexity theory as well as the
complexity on reals [25].
To further explore the vast amount of literature on CNN technology and analogic cellular computing,
the interested reader could consult the bibliography at the website of the technical committee on Cellular
Neural Networks and Array Computing of the IEEE Circuits and Systems Society (http:==www.ieee-cas.
org=cnnactc), some recent monographs [26–28], and an undergraduate textbook [29].
13.7 Recent Developments and Outlook

During the last few years, CNN technology, as well as its offsprings and generalizations, has generated
several significant results and the first few companies have entered into the market. The main events are
as follows.
The appearance of the first commercially available, stored programmable, visual microprocessor,
the Q-Eye (with 176 3 144 cell processors and on-chip optical sensors, 10,000 frame per second,
and <300 mW), embedded in the self-contained Eye-RIS system, both are from AnaFocus Ltd., Seville
(www.anafocus.com). A new version of the Bi-i camera-computer, using emulated digital cellular array
architecture, has also been developed, and applied in some mission critical tasks (Eutecus Inc., Berkeley,
California, www.eutecus.com).
Several algorithmic and theoretical results as well as application case studies have been published.
A new type of algorithmic thinking is emerging that is based on spatial-temporal waves as elementary
instructions.
The CNN universal machine, with some extensions and diverse physical implementations
became a general computational platform: the cellular wave computer. This has been happening in
parallel with a dramatic new trend in microprocessor architecture development, namely the multi- and
many core architectures on a single chip. The other side of the story is the cellular supercomputer
development.
The essence of this new trend is that processor arrays on a single chip are becoming the next main
direction in CMOS technology, when saturating the clock frequency due to the power dissipation
constraints. Today, products are already on the market with about 100 processors and the trend is
continuing, including the latest FPGAs. Hence, the cellular many-core processor arrays are becoming the
major trend in computing in general, and in sensory computing, in particular. Since the wire delay is
becoming greater than the gate delay, the communication speed is reduced dramatically far from a given
processor. Hence, the mainly (not exclusively) locally connected cellular processor array architectures on
a single chip become a physical necessity. Interestingly, the high-end supercomputers are also following
this lead (the highest speed Blue Gene of IBM has a 3-D toroidal cellular architecture).
This new development has made the cellular wave computer architecture a must in many applications.
As an example, a very efficient PDE implementation was made by using CNN models on an FPGA and
on a CELL Multiprocessor (IBM, Sony, Toshiba) developed for a game console, as well.
Interestingly, the circuit hardware implementation issues (now at a 45 nm CMOS technology) are
forcing the conversion of the computing architectures. The details can be found in a recent review article
[30]. It seems that the cellular wave computer might become a prototype architecture, although the cell
processors are of different forms and implementations (digital, analog, mixed mode, optical, etc.), and the
spatial-temporal, mainly locally and sparsely globally connected communication framework is necessary.
Interestingly, many different sensory organs, uncovered recently by neurobiologists, are following this
architecture.
References
1. L. O. Chua and L. Yang, Cellular neural networks: Theory, IEEE Trans. Circuits Syst., 35, 1257–1272,
1988.
2. Cs. Rekeczky and L. O. Chua, Computing with front propagation-active contours and skeleton
models in continuous-time CNN, J. VLSI Signal Process. Syst., 23, 373–402, 1999.
3. J. Cruz and L. O. Chua, A CNN chip for connected component detection, IEEE Trans. Circuits Syst.,
38, 812–817, 1991.
4. H. Harrer, J. A. Nossek, and R. Stelzl, An analog implementation of discrete-time cellular neural
networks, IEEE Trans. Neural Networks, 3, 466–476, 1992.
5. R. Dominguez-Castro, S. Espejo, A. Rodriguez-Vazquez, and R. Carmona, A CNN universal chip in
CMOS technology, Proceedings of the IEEE Third International Workshop on CNN and Applications
(CNNA-94), Rome, Italy, pp. 91–96, 1994.
6. T. Roska and J. Vandewalle, Eds., Cellular Neural Networks, Chichester, Wiley, 1993.
7. J. A. Nossek and T. Roska, Eds., Special issues on cellular neural networks, IEEE Trans. Circuits Syst. I,
40, Mar. 1993; Special issue on cellular neural networks, IEEE Trans. Circuits Syst. II, 40, Mar. 1993.
8. L. O. Chua and L. Yang, Cellular neural networks: Applications, IEEE Trans. Circuits Syst., 35, 1273–
1290, 1988.
9. T. Roska and L. O. Chua, The CNN universal machine: An analogic array computer, IEEE Trans.
Circuits Syst. II, 40, 163–173, 1993.
10. T. Roska, J. Hamori, E. Labos, K. Lotz, K. Takacs, P. Venetianer, Z. Vidnyanszki, and A. Zarandy,
The use of CNN models in the subcortical visual pathway, IEEE Trans. Circuits Syst. I, 40, 182–195,
1993.
11. F. Werblin, T. Roska, and L. O. Chua, The analogic cellular neural network as a bionic eye,
Int. J. Circuit Theory Appl. (CTA), 23(6), 541–569, 1995.
12. CNN Analogic Nonlinear Dynamics (CANDY) Simulator, guide and program (student version),
Available at http:==lab.analogic.sztaki.hu
13. G. Linán, S. Espejo, R. Dominguez-Castro, E. Roca, and A. Rodriguez-Vázquez, CNNUC3: A mixed
signal 64 3 64 CNN Universal Chip, Proceedings of IEEE MicroNeuro, Granada, Spain, pp. 61–68, 1999.
14. A. Paasio, A. Davidzuk, K. Halonen, and V. Porra, Minimum-size 0.5 micron CMOS programmable
48 by 48 test chip, Proceedings of the European Conference on Circuit Theory and Design ECCTD’97,
Vol. I, Budapest, Hungary, pp. 154–156, 1997.
15. W. C. Yen and C. Y. Wu, The design of neuron-bipolar junction transistor (vBJT) cellular
neural network (CNN) structure with multi-neighborhood-layer templates, Proceedings of 6th IEEE
International Workshop on Cellular Neural Networks and Their Applications (CNNA’2000), 23–25
May, Catania Uniiversity, Catania, Italy, pp. 195–200, 2000.
16. T. Roska, Á. Zarándy, S. Zöld, P. Földesy, and P. Szolgay, The computational infrastructure of
analogic CNN computing—Part I: The CNN-UM chip prototyping system, IEEE Trans. Circuits
Syst. I: Special issue on bio-inspired processors and cellular neural networks for vision (CAS-I Special
Issue), 46(2), 261–268, 1999.
17. T. Roska, Computer-sensors: Spatial-temporal computers for analog array signals, dynamically
integrated with sensors, J. VLSI Signal Process. Syst., 23, 221–238, 1999.
18. T. Roska, L. O. Chua, D. Wolf, T. Kozek, R. Tetzlaff, and F. Puffer, Simulating nonlinear waves and
partial differential equations via CNN, IEEE Trans. Circuits Syst. I, 42, 807–815, 1995.
19. B. Roska and F. S. Werblin, Vertical interactions across ten parallel, stacked representations in the
mammalian retina, Nature, 410, 583–587, Mar. 29, 2001.
20. F. Werblin, B. Roska, D. Bálya, Cs. Rekeczky, and T. Roska, Implementing a retinal visual
language in CNN: A neuromorphic case study, Proceedings of the IEEE ISCAS 2001, Vol. III, Sydney,
pp. 333–336, 2001.
21. Cs. Rekeczky, T. Serrano, T. Roska, and Á. Rodríguez-Vázquez, A stored program 2nd order=3-layer
complex cell CNN-UM, Proceedings of 6th IEEE International Workshop on Cellular Neural
Networks and Their Applications (CNNA-2000), 23–25 May, Catania University, Catania, Italy,
pp. 15–20, 2000.
22. A. M. Turing, The chemical basis of morphogenesis, Philos. Trans. R. Soc. London, B237, 37–72, 1952.
23. L. O. Chua, CNN: A Paradigm for Complexity, World Scientific, Singapore, 1998.
24. T. Roska, AnaLogic wave computers—wave-type algorithms: Canonical description, computer classes,
and computational complexity, Proceedings of IEEE ISCAS 2001, Sydney, Australia, Vol. III, pp. 41–44,
2001.
25. L. Blum, F. Cucker, M. Shub, and S. Smale, Complexity and Real Computation, Springer, New York,
1998.
26. G. Manganaro, P. Arena, and L. Fortuna, Cellular Neural Networks—Chaos, Complexity and VLSI
Processing, Springer, Berlin, 1999.
27. M. Hänggi and G. Moschitz, Cellular Neural Networks—Analysis, Design and Optimization, Kluwer
Academic, Boston, MA, 2000.
28. T. Roska and Á. Rodríguez-Vázquez, Eds., Towards the Visual Microprocessor—VLSI Design and the
Use of Cellular Neural Network Universal Machine, Wiley, New York, 2001.
29. L. O. Chua and T. Roska, Cellular Neural Network and Visual Computing—Foundations and
Applications, Cambridge University Press, New York, 2002.
30. T. Roska, Circuits, computers, and beyond Boolean logic, Int. J. Circuit Theory Appl., Sept.–Oct.,
2007.
31. Zarándy, A., Werblin, F., Roska, T., Chua, L. O., and Novel type of analogical CNN algorithms for
recognizing bank notes, Memorandum UCB=ERL, M94=29 1994, Electronics Research Laboratory,
University of California, Berkeley, CA, 1994.
32. L. O. Chua and T. Roska, The CNN paradigm, IEEE Trans. Circuits Syst. I, 40, 147–156, 1993.
14
Bifurcation and Chaos
14.1 Introduction to Chaos .......................................................... 14-1
Electrical and Electronic Circuits as Dynamical Systems .
Classification and Uniqueness of Steady-State Behaviors .
Stability of Steady-State Trajectories . Horseshoes and Chaos .
Structural Stability and Bifurcations

14.2 Chua’s Circuit: A Paradigm for Chaos........................... 14-27
Dynamics of Chua’s Circuit . Chaos in Chua’s Circuit .
Steady-States and Bifurcations in Chua’s Circuit .
Manifestations of Chaos . Practical Realization
of Chua’s Circuit . Experimental Steady-State Solutions .
Simulation of Chua’s Circuit . Dimensionless Coordinates
and the a–b Parameter-Space Diagram
14.3 Chua’s Oscillator.................................................................. 14-43
State Equations . Topological Conjugacy .
Eigenvalues-to-Parameters Mapping Algorithm
for Chua’s Oscillator
14.4 van der Pol Neon Bulb Oscillator.................................... 14-48
Winding Numbers . Circle Map . Experimental
Observations of Mode-Locking and Chaos in
van der Pol’s Neon Bulb Circuit . Circuit Model
14.5 Synchronization of Chaotic Circuits ............................... 14-56
Linear Mutual Coupling . Pecora–Carroll
Drive-Response Concept
14.6 Applications of Chaos ........................................................ 14-64
Pseudorandom Sequence Generation . Communicating
with Chaos
Michael Peter Kennedy References .......................................................................................... 14-71
University College Cork Further Information ........................................................................ 14-72
14.1 Introduction to Chaos

14.1.1 Electrical and Electronic Circuits as Dynamical Systems
A system is something having parts that may be perceived as a single entity. A dynamical system is one
that changes with time; what changes is the state of the system. Mathematically, a dynamical system
consists of a space of states (called the state space or phase space) and a rule, called the dynamic,
for determining which state corresponds at a given future time to a given present state [8]. A determin-
istic dynamical system is one where the state, at any time, is completely determined by its initial state and
dynamic. In this section, we consider only deterministic dynamical systems.
A deterministic dynamical system may have a continuous or discrete state space and a continuous-
time or discrete-time dynamic.
14-1
A lumped* circuit containing resistive elements (resistors, voltage and current sources) and energy-
storage elements (capacitors and inductors) may be modeled as a continuous-time deterministic dynam-
ical system in Rn. The evolution of the state of the circuit is described by a system of ordinary differential
equations (ODEs) called state equations.
Discrete-time deterministic dynamical systems occur in electrical engineering as models of switched-
capacitor (SC) and digital filters, sampled phase-locked loops, and sigma–delta modulators. Discrete-time
dynamical systems also arise when analyzing the stability of steady-state solutions of continuous-
time systems. The evolution of a discrete-time dynamical system is described by a system of difference
equations.
14.1.1.1 Continuous-Time Dynamical Systems
THEOREM 14.1 (Existence and Uniqueness of Solution for a Differential Equation)
Consider a continuous-time deterministic dynamical system defined by a system of ordinary differential

equations of the form
_
X(t) ¼ FðX(t), t Þ (14:1)
_
where X(t) 2 Rn is called the state, X(t) denotes the derivative of X(t) with respect to time, X(t0) ¼ X0 is
called the initial condition, and the map F(, ):Rn 3 Rþ ! Rn is (1) continuous almost everywherey on
Rn 3 Rþ and (2) globally Lipschitzz in X. Then, for each (X0, t0) 2 Rn 3 Rþ, there exists a continuous
function f(; X0, t0): Rþ ! Rn such that
f(t0 ; X0 , t0 ) ¼ X0
and
_ X0 , t0 ) ¼ Fðf(t; X0 , t0 ), t Þ
f(t; (14:2)
Furthermore, this function is unique.

The function f(; X0, t0) is called the solution or trajectory (X0, t0) of the differential Equation 14.1.
The image {f(t; X0, t0) 2 Rnjt 2 Rþ} of the trajectory through (X0, t0) is a continuous curve in Rn
called the orbit through (X0, t0).
F(, ) is called the vector field of Equation 14.1 because its image F(X, t) is a vector that defines the
direction and speed of the trajectory through X at time t.
The vector field F generates the flow f, where f(; , ): Rþ 3 Rn 3 Rþ ! Rn is a collection of
continuous maps {f(t; , ): Rn 3 Rþ ! Rnjt 2 Rþ}.
In particular, a point X0 2 Rn at t0 is mapped by the flow into X(t) ¼ ft(t; X0, t0) at time t.
* A lumped circuit is one with physical dimensions that are small compared with the wavelengths of its voltage and current
waveforms [2].
y By continuous almost everywhere, we mean the following: let D be a set in Rþ that contains a countable number of
discontinuities and for each X 2 Rn, assume that the function t 2 Rþ\D ! F(X, t) 2 Rn is continuous and for any t 2 D the
left-hand and right-hand limits F(X, t) and F(X, tþ), respectively, are finite in Rn [1]. This condition includes circuits that
contain switches and=or squarewave voltage and current sources.
z
There is a piecewise continuous function k(): Rþ ! Rþ such that kF(X, t) F(X0 , t)k k(t) kX X0 k, 8t 2 Rþ, 8X,
X0 2 Rn.
Bifurcation and Chaos 14-3
14.1.1.2 Autonomous Continuous-Time

φt(Br(X0))
Dynamical Systems
φt
Br(X0) If the vector field of a continuous-time determin-
istic dynamical system depends only on the state
X0 and is independent of time t, then the system is
φt(X0) said to be autonomous and may be written as
Bε(X0)
φt(Bε(X0)) _
X(t) ¼ F[X(t)]
or simply
FIGURE 14.1 Vector field F of an autonomous con- X_ ¼ F(X) (14:3)

tinuous-time dynamical system generates a flow f that
maps a point X0 in the state space to its image ft(X0) t If, in addition, the vector field F(): Rn ! Rn is
seconds later. A volume of state space Br(X0) evolves
Lipschitz,* then there is a unique continuous
under the flow into a region ft[Br(X0)]. Sufficiently
function f(, X0): Rþ ! Rn (called the trajectory
close to the trajectory ft(X0), the linearized flow maps
a sphere of radius e into an ellipsoid.
through X0), which satisfies,
_ X0 ) ¼ F[f(t, X0 )],
f(t, f(t0 , X0 ) ¼ X0 (14:4)
Because the vector field is independent of time, we choose t0 0. For shorthand, we denote the flow by f
and the map f(t, ): Rn ! Rn by ft.
The t-advance map ft takes a state X0 2 Rn to state X(t) ¼ ft(X0) t seconds later. In particular, f0 is
the identity mapping. Furthermore, ftþs ¼ ftfs, because the state Y ¼ fs(X) to which X evolves after
time s evolves after an additional time t into the same state Z as that to which X evolves after time t þ s:
Z ¼ ft (Y) ¼ ft [fs (X)] ¼ ftþs (X)
A bundle of trajectories emanating from a ball Br(X0) of radius r centered at X0 is mapped by the flow
into some region ft[Br(X0)] after t seconds (see Figure 14.1). Consider a short segment of the trajectory
ft (X0) along which the flow is differentiable with respect to X: in a sufficiently small neighborhood of
this trajectory, the flow is almost linear, so the ball Be(X0) of radius e about X0 evolves into an ellipsoid
ft[Be(X0)], as shown.
An important consequence of Lipschitz continuity in an autonomous vector field and the resulting
uniqueness of solution of Equation 14.3 is that a trajectory of the dynamical system cannot go through
the same point twice in two different directions. In particular, no two trajectories may cross each other;
this is called the noncrossing property [18].
14.1.1.3 Nonautonomous Dynamical Systems

A nonautonomous, n-dimensional, continuous-time dynamical system may be transformed to an
(n þ 1)-dimensional autonomous system by appending time as an additional state variable and writing
_
X(t) ¼ F½X(t), Xnþ1 (t)
(14:5)
X_ nþ1 (t) ¼ 1
* There exists a finite k 2 Rn such that kF(X) F(X0 )k k kX X0 k, 8X, X0 2 Rn.

In the special case where the vector field is periodic with period T, as for example in the case of an
oscillator with sinusoidal forcing, the periodically forced system Equation 14.5 is equivalent to the (n þ 1)
th-order autonomous system
_
X(t) ¼ FðX(t), u(t)T Þ
(14:6)
_ ¼1
u(t)
T
where u(t) ¼ Xnþ1=T.

By identifying the n-dimensional hyperplanes corresponding to u ¼ 0 and u ¼ 1, the state space may be
transformed from Rn 3 Rþ into an equivalent cylindrical state space Rn 3 S1, where S1 denotes the circle.
In the new coordinate system, the solution through (X0, t0) of Equation 14.6 is

X(t) ft (X0 , t0 )
¼
uS1 (t) t=T mod 1
where u(t) 2 Rþ is identified with a point on S1 (which has normalized angular coordinate uS1(t) 2 [0, 1))
via the transformation u1s (t) ¼ u(t) mod 1. Using this technique, periodically forced nonautonomous
systems can be treated like autonomous systems.
14.1.1.4 Discrete-Time Dynamical Systems

Consider a discrete-time deterministic dynamical system defined by a system of difference equations
of the form
X(k þ 1) ¼ GðX(k), kÞ (14:7)
where
X(k) 2 Rn is called the state
X (k0) ¼ X0 is the initial condition
G(, ): Rn 3 Zþ ! Rn maps the current state X(k) into the next state X(k þ 1), where k0 2 Zþ
By analogy with the continuous-time case, there exists a function f(, X0, k0): Zþ ! Rn such that
f(k0 ; X0 , k0 ) ¼ X0
and
f(k þ 1; X0 , k0 ) ¼ Gðf(k; X0 , k0 ), kÞ
The function f(; X0, k0): Zþ ! Rn is called the solution or trajectory through (X0, k0) of the difference
Equation 14.7.
The image {f(k; X0, k0) 2 Rn jk 2 Zþ} in Rn of the trajectory through (X0, k0) is called an orbit
through (X0, k0).
If the map G(, ) of a discrete-time dynamical system depends only on the state X(k) and is
independent of k then the system is said to be autonomous and may be written more simply as
X kþ1 ¼ G(Xk ) (14:8)
where Xk is shorthand for X(k) and the initial iterate k0 is chosen, without loss of generality, to be zero.
Using this notation, Xk is the image X0 after k iterations of the map G(): Rn ! Rn.
Example: Nonlinear Parallel RLC Circuit
Consider the parallel RLC circuit in Figure 14.2. This circuit contains a linear inductor L, a linear capacitor
C2, and a nonlinear resistor NR0 , where the continuous piecewise-linear driving-point (DP) characteristic
(see Figure 14.3) has slope G0a for jVR0 j E and slope G0b for jVR0 j > E. The DP characteristic of NR0 may be
written explicitly
1
IR0 (VR0 ) ¼ G0b VR0 þ (G0a G0b ) jVR0 þ Ej jVR0 Ej
2
This circuit may be described by a pair of ODEs and is therefore a second-order, continuous-time
dynamical system. Choosing I3 and V2 as state variables, we write
dI3 1
¼ V2
dt L
dV2 1 1
¼ I3 IR0 (V2 )
dt C2 C2
with I3(0) ¼ I30 and V2(0) ¼ V20.

We illustrate the vector field by drawing vectors at uniformly spaced points in the two-dimensional
state space defined by (I3, V2). Starting from a given initial condition (I30, V20), a solution curve in state
space is the locus of points plotted out by the state as it moves through the vector field, following
the direction of the arrow at every point. Figure 14.4 illustrates typical vector fields and trajectories of the
circuit.
I΄R
+ +
L C2 V2 V ΄R N΄R
I3 – –
FIGURE 14.2 Parallel RLC circuit where the nonlinear resistor NR0 has a DP characteristic as illustrated in Figure 14.3.
By Kirchhoff’s voltage law, VR0 ¼ V2 .
IR΄ IR΄
G΄b
G΄b G΄a
G΄a –E
E V ΄R V ΄R
–E 0΄ 0' E
G΄b G΄b
(a) (b)
FIGURE 14.3 DP characteristic of NR0 in Figure 14.2 when (a) G0a < 0 and (b) G0a > 0.
(a) (b)
FIGURE 14.4 Vector fields for the nonlinear RLC circuit in Figure 14.2. L ¼ 18 mH, C2 ¼ 100 nF, E ¼ 0.47 V.
(a) G0a ¼ 242.424 mS, G0b ¼ 1045.455 mS: all trajectories converge to the origin. (b) G0a ¼ 257.576 mS, G0b ¼ 545.455
mS: the unique steady-state solution is a limit cycle. Horizontal axis: I3, 400 mA=div; vertical axis: V2, 200 mV=div.
(From Kennedy, M. P., IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 40, 647, Oct. 1993. With permission.)
If L, C2, and G0b are positive, the steady-state behavior of the circuit depends on the sign of G0a . When
G0a > 0, the circuit is dissipative everywhere and all trajectories collapse toward the origin. The unique
steady-state solution of the circuit is the stable dc equilibrium condition I3 ¼ V2 ¼ 0.
If G0a > 0, NR0 looks like a negative resistor close to the origin and injects energy into the circuit,
pushing trajectories away. Further out, where the characteristic has positive slope, trajectories are pulled
in by the dissipative vector field. The resulting balance of forces produces a steady-state orbit called a
limit cycle, which is approached asymptotically by all initial conditions of this circuit.
This limit cycle is said to be attracting because nearby trajectories move toward it and it is structurally
stable in the sense that, for almost all values of G0a , a small change in the parameters of the circuit has
little effect on it. In the special case when G0a 0, a perturbation of G0a causes the steady-state behavior
to change from an equilibrium point to a limit cycle; this is called a bifurcation.
In the following sections, we consider in detail steady-state behaviors, stability, structural stability, and
bifurcations.
14.1.2 Classification and Uniqueness of Steady-State Behaviors

A trajectory of a dynamical system from an initial state X0 settles, possibly after some transient, onto a
set of points called a limit set. The v-limit set corresponds to the asymptotic behavior of the system as
t ! þ1 and is called the steady-state response. We use the idea of recurrent states to determine when
the system has reached steady state.
A state X of a dynamical system is called recurrent under the flow f if, for every neighborhood Be(X)
of X and for every T > 0, there is a time t > T such that ft(X) \ Be(X) 6¼ Ø. Thus, a state X is recurrent if,
by waiting long enough, the trajectory through X repeatedly returns arbitrarily close to X [7].
Wandering points correspond to transient behavior, while steady-state or asymptotic behavior cor-
responds to orbits of recurrent states.
A point Xv is an v-limit point of X0 if and only if limk!þ1 ftk(X0 ) ¼ (Xv ) for some sequence {tkjk 2
Zþ such that tk ! þ1. The set L(X0) of v-limit points of X0 is called v-limit set of X0.*
A limit set L is called attracting if there exists a neighborhood U of L such that L(X)0 ¼ L for all X0 2 U.
Thus, nearby trajectories converge toward an attracting limit set as t ! 1.
* The set of points to which trajectories converge from X0 as t ! 1 is called the a-limit set of X0. We consider only
positive time, therefore, by limit set, we mean the v-limit set.
An attracting set ! that contains at least one orbit that comes arbitrarily close to every point in ! is
called an attractor [7].
In an asymptotically stable linear system the limit set is independent of the initial condition and
unique so it makes sense to talk of the steady-state behavior. By contrast, a nonlinear system may possess
several different limit sets and therefore may exhibit a variety of steady-state behaviors, depending on the
initial condition.
The set of all points in the state space that converge to a particular limit set L is called the basin of
attraction of L.
Because nonattracting limit sets cannot be observed in physical systems, the asymptotic or steady-state
behavior of a real electronic circuit corresponds to motion on an attracting limit set.
14.1.2.1 Equilibrium Point

The simplest steady-state behavior of a dynamical system is an equilibrium point. An equilibrium point
or stationary point of Equation 14.3 is a state XQ at which the vector field is zero. Thus, F(XQ) ¼ 0 and
ft(XQ) ¼ XQ; a trajectory starting from an equilibrium point remains indefinitely at that point.
In state space, the limit set consists of a single nonwandering point XQ. A point is a zero-dimensional
object. Thus, an equilibrium point is said to have dimension zero.
In the time domain, an equilibrium point of an equilibrium circuit is simply a dc solution or operating
point.
An equilibrium point or fixed point of a discrete-time dynamical system is a point XQ that satisfies
G(XQ ) ¼ XQ
Example: Nonlinear Parallel RLC Circuit
The nonlinear RLC circuit shown in Figure 14.2 has just one equilibrium point (I3Q, V2Q) ¼ (0,0). When G0a is
positive, a trajectory originating at any point in the state converges to this attracting dc steady-state
(as shown in Figure 14.4a). The basin of attraction of the origin is the entire state space.
All trajectories, and not just those that start close to it, converge to the origin, so this equilibrium point
is said to be a global attractor.
When G0a < 0, the circuit possesses two steady-state solutions: the equilibrium point at the origin, and
the limit cycle G. The equilibrium point is unstable in this case. All trajectories, except that which starts at
the origin, are attracted to G.
14.1.2.2 Periodic Steady-State

A state X is called periodic if there exists T > 0 such that fT(X) ¼ X. A periodic orbit which is not a
stationary point is called a cycle.
A limit cycle G is an isolated periodic orbit of a dynamical system (see Figure 14.5b). The limit
cycle trajectory visits every point on the simple closed curve G with period T. Indeed, ft(X) ¼ ftþT(X) 8
X 2 G. Thus, every point on the limit cycle G is a nonwandering point.
A limit cycle is said to have dimension one because a small piece of it looks like a one-dimensional
object: a line. Then, n components Xi(t) of a limit cycle trajectory X(t) ¼ [X1(t), X2(t), . . . , Xn(t)]T in Rn
are periodic time waveforms with period T.
Every periodic signal X(t) may be decomposed into a Fourier series—a weighted sum of sinusoids at
integer multiples of a fundamental frequency. Thus, a periodic signal appears in the frequency domain as
a set of spikes at integer multiples (harmonics) of the fundamental frequency. The amplitudes of these
spikes correspond to the coefficient in the Fourier series expansion of X(t). The Fourier transform is an
extension of these ideas to aperiodic signals; one considers the distribution of the signal’s power over a
continuum of frequencies rather than on a discrete set of harmonics.
The distribution of power in a signal X(t) is most commonly quantified by means of the power density
spectrum, often simply called the power spectrum. The simplest estimator of the power spectrum is the
periodogram [17] which, given N uniformly spaced samples X(k=fs), k ¼ 0, 1, . . . , N 1 of X(t), yields
N=2 þ 1 numbers P(nfs=N), n ¼ 0, 1, . . . , N=2, where fs is the sampling frequency.
If one considers the signal X(t) as being composed of sinusoidal components at discrete frequencies,
then P(nfs=N) is an estimate of the power in the component at frequency nfs=N. By Parseval’s theorem,
the sum of the power in each of these components equals the mean-squared amplitude of the N samples
of X(t) [17].
If X(t) is periodic with period T, then its power will be concentrated in a dc component, a fundamental
frequency component 1=T, and harmonics. In practice, the discrete nature of the sampling process causes
power to ‘‘leak’’ between adjacent frequency components; this leakage may be reduced by ‘‘windowing’’
the measured data before calculating the periodogram [17].
Example: Periodic Steady-State Solution
Figure 14.5b depicts a state-space orbit, time waveform, and power spectrum of a periodic steady-state
solution of a third-order, autonomous, continuous-time dynamical system.
The orbit in state space is an asymmetric closed curve consisting of four loops. In the time domain, the
waveform has four crests per period and a dc offset. In the power spectrum, the dc offset manifests itself
as a spike at zero frequency. The period of approximately 270 Hz produces a fundamental component at
that frequency. Notice that the fourth harmonic (arising from ‘‘four crests per period’’) has the largest
magnitude. This power spectrum is reminiscent of subharmonic mode locking in a forced oscillator.
14.1.2.3 Subharmonic Periodic Steady-State

A subharmonic periodic solution or period-K orbit of a discrete-time dynamical system is a set of K
points {X1, X2, . . . , Xk} that satisfy
X2 ¼ G(X1 ), X3 ¼ G(X2 ) XK ¼ G(XK1 ), X1 ¼ G(XK )
More succinctly, we may write Xi ¼ G(K)(Xi), where G(K) ¼ G[G( [G()] )] denotes G applied K times
to the argument of the map; this is called the Kth iterate of G.
Subharmonic periodic solutions occur in systems that contain two or more competing frequencies,
such as forced oscillators or sampled-data circuits. Subharmonic solutions also arise following period-
doubling bifurcations (see Section 14.1.5).
14.1.2.4 Quasiperiodic Steady-State

The next most complicated form of steady-state behavior is called quasiperiodicity. In state space, this
corresponds to a torus (see Figure 14.5a). Although a small piece of a limit cycle in R3 looks like a line, a
small section of two-torus looks like a plane; a two-torus has dimension two.
A quasiperiodic function is one that may be expressed as a countable sum of periodic functions
with incommensurate frequencies, i.e., frequencies that are not rationally related. For example, X(t) ¼
sin(t) þ sin(2pt) is a quasiperiodic signal. In the time domain, a quasiperiodic signal may look like an
amplitude-or phase-modulated waveform.
Although the Fourier spectrum of a periodic signal consists of a discrete set of spikes at integer
multiples of a fundamental frequency, that of a quasiperiodic solution comprises a discrete set of spikes at
incommensurate frequencies, as presented in Figure 14.5a.
In principle, a quasiperiodic signal may be distinguished from a periodic one by determining whether
the frequency spikes in the Fourier spectrum are harmonically related. In practice, it is impossible to
6
4
2
V1 0
–2
–4
–6
0 5 10 15 20 25 30 35 40 45 50
0
–20
–40
I3 –60
V2 –80
–100
0 0.5 1 1.5 2 2.5
(a)
6
4
V1 2
0
–2
–4
–6
0 5 10 15 20 25 30 35 40 45 50
0
–20
–40
I3 –60
V2 –80
–100
0 0.5 1 1.5 2 2.5
(b)
6
4
V1 2
0
–2
–4
–6
0 5 10 15 20 25 30 35 40 45 50
0
–20
–40
I3 –60
V2 –80
–100
0 0.5 1 1.5 2 2.5
(c)
FIGURE 14.5 Quasiperiodicity (torus breakdown) route to chaos in Chua’s oscillator. Simulated state-space
trajectories, time waveforms V1(t), and power spectra of V2(t). (a) Quasiperiodic steady-state—the signal is charac-
terized by a discrete power spectrum with incommensurate frequency components; (b) periodic window—all
spikes in the power spectrum are harmonically related to the fundamental frequency; (c) chaotic steady-state
following breakdown of the torus—the waveform has a broadband power spectrum. Time plots; horizontal axis—t
(ms); vertical axis—V1 (V). Power spectra: horizontal axis—frequency (kHz); vertical axis—power (mean-squared
amplitude) of V2(t) (dB).
determine whether a measured number is rational or irrational; therefore, any spectrum that appears
to be quasiperiodic may simply be periodic with an extremely long period.
A two-torus in a three-dimensional state space looks like a doughnut. Quasiperiodic behavior on a
higher dimensional torus is more difficult to visualize in state space but appears in the power spectrum as
a set of discrete components at incommensurate frequencies. A K-torus has dimension K.
Quasiperiodic behavior occurs in discrete-time systems where two incommensurate frequencies
are present. A periodically forced or discrete-time dynamical system has a frequency associated with
the period of the forcing or sampling interval of the system; if a second frequency is introduced that is
not rationally related to the period of the forcing or the sampling interval, then quasiperiodicity
may occur.
Example: Discrete Torus
Consider a map from the circle S1 onto itself. In polar coordinates, a point on the circle is parameterized
by an angle u. Assume that u has been normalized so that one complete revolution of the circle
corresponds to a change in u of 1. The state of this system is determined by the normalized angle u and
the dynamics by
ukþ1 ¼ (uk þ V) mod 1
If V is a rational number (of the form J=K where J, K 2 Zþ), then the steady-state solution is a period-K
(subharmonic) orbit. If V is irrational, we obtain quasiperiodic behavior.
14.1.2.5 Chaotic Steady-State

DC equilibrium periodic as well as quasiperiodic steady-state behaviors have been correctly identified
and classified since the pioneering days of electronics in the 1920s. By contrast, the existence of more
exotic steady-state behaviors in electronic circuits has been acknowledged only in the past 30 years.
Although the notion of chaotic behavior in dynamical systems has existed in the mathematics literature
since the turn of the century, unusual behaviors in the physical sciences as recently as the 1960s were
described as ‘‘strange.’’ Today, we classify as chaos the recurrent* motion in a deterministic dynamical
system, which is characterized by a positive Lyapunov exponent (LE).
From an experimentalist’s point of view, chaos may be defined as bounded steady-state behavior in a
deterministic dynamical system that is not an equilibrium point, nor periodic, and not quasiperiodic [15].
Chaos is characterized by repeated stretching and folding of bundles of trajectories in state space.
Two trajectories started from almost identical initial conditions diverge and soon become uncorrelated;
this is called sensitive dependence on initial conditions and gives rise to long-term unpredictability.
In the time domain, a chaotic trajectory is neither periodic nor quasiperiodic, but looks ‘‘random.’’
This ‘‘randomness’’ manifests itself in the frequency domain as a broad ‘‘noise-like’’ Fourier spectrum, as
presented in Figure 14.5c.
Although an equilibrium point, a limit cycle, and a K-torus each have integer dimension, the repeated
stretching and folding of trajectories in a chaotic steady-state gives the limit set a more complicated
structure that, for three-dimensional continuous-time circuits, is something more than a surface but not
quite a volume.
14.1.2.6 Dimension
The structure of a limit set L Rn of a dynamical system may be quantified using a generalized notion
of dimension that considers not just the geometrical structure of the set, but also the time evolution of
trajectories on L.
Capacity (D0 Dimension)

The simplest notion of dimension, called capacity (or D0 dimension), considers a limit set simply as set
of points, without reference to the dynamical system that produced it.
* Because a chaotic steady-state does not settle down onto a single well-defined trajectory, the definition of recurrent states
must be used to identify posttransient behavior.
To estimate the capacity of L, cover the set with n-dimensional cubes having side length e. If L is a
D0-dimensional object, then the minimum number N(e) of cubes required to cover L is proportional
to eD0. Thus, N(e) / eD0.
The D0 dimension is given by
ln N(e)
D0 ¼ lim
e!0 ln e
When this definition is applied to a point, a limit cycle (or line), or a two-torus (or surface) R3, the
calculated dimensions are 0, 1, and 2, respectively, as expected. When applied to the set of nonwandering
points that comprise a chaotic steady-state, the D0 dimension is typically noninteger. An object that has
noninteger dimension is called a fractal.
Example: The Middle-Third Cantor Set
Consider the set of points that is obtained by repeatedly deleting the middle third of an interval, as
indicated in Figure 14.6a. At the first iteration, the unit interval is divided into 21 pieces of length 1=3
each; after k iterations, the set is covered by 2k pieces of length 1=3k. By contrast, the set that is obtained
by dividing the intervals into thirds but not throwing away the middle third each time (Figure 14.6b) is
covered at the kth step by 3k pieces of length 1=3k.
Applying the definition of capacity, the dimension of the unit interval is
k ln 3
lim ¼ 1:00
k!1 k ln 3
By contrast, the middle-third Cantor set has dimension
k ln 2
lim 0:63
k!1 k ln 3
The set is something more than a zero-dimensional object (a point) but not quite one-dimensional
(like a line segment); it is a fractal.
Correlation (D2) Dimension

The D2 dimension considers not just the geometry of a limit set, but also the time evolution of trajectories
on the set.
N(ε) ε N(ε)
20 30 30
21 3–1 31
22 3–2 32
23 3–3 33
24 3–4 34
(a) (b)
FIGURE 14.6 (a) The Middle-third Cantor set is obtained by recursively removing the central portion of an
interval. At the kth step, the set consists of N(e) ¼ 2k pieces of length e ¼ 3k. The limit set has capacity 0.63. (b) By
contrast, the unit interval is covered by 3k pieces of length 3k. The unit interval has dimension 1.00.
(a)
(b)
FIGURE 14.7 Coverings of two limit sets La (a) and Lb (b) with squares of side length e0 and e0=2, respectively.
Consider the two limit sets La and Lb in R2 shown in Figure 14.7a and b, respectively. The D0
dimension of these sets may be determined by iteratively covering them with squares (two-dimensional
‘‘cubes’’) of side length e ¼ e0=2k, k ¼ 0, 1, 2, . . . , counting the required number of squares N(e) for each e,
and evaluating the limit
ln N(e)
D0 ¼ lim
k!1 ln(e)
For the smooth curve La, the number of squares required to cover the set grows linearly with 1=e; hence
D0 ¼ 1.0. By contrast, if the kinks and folds in set Lb are present at all scales, then the growth of N(e)
versus 1=e is superlinear and the object has a noninteger D0 dimension between 1.0 and 2.0.
Imagine now that La and Lb are not simply static geometrical objects but are orbits of discrete-time
dynamical systems. In this case, a steady-state trajectory corresponds to a sequence of points moving
around the limit set.
Cover the limit set with the minimum number N(e) of ‘‘cubes’’ with side length e, and label the
boxes 1, 2, . . . , i, . . . , N(e). Count the number of times ni(N, e) that a typical steady-state trajectory of
length N visits box i and define
ni (N, e)
pi ¼ lim
N!1 N
where pi is the relative frequency with which a trajectory visits the ith cube. The D2 dimension is
defined as
PN(e)
ln p2i
D2 ¼ lim i¼1
e!0 ln e
In general, D2 D0 with equality when a typical trajectory visits all N(e) cubes with the same relative
frequency p ¼ 1=N(e). In this special case,
PN(e) 1
ln i¼1 N(e)2
D2 ¼ lim
e!0 ln e
ln N(e)
¼ lim
e!0 ln e
¼ D0
An efficient algorithm (developed by Grassberger and Procaccia) for estimating D2 is based on the
PN(e) 2
approximation i¼1 pi C(e) [15], where C(e) ¼ limN!0 N12 (the number of pairs of points (Xi, Xj)
such that kXi Xjk < e) is called the correlation. The D2 or correlation dimension is given by
ln C(e)
D2 ¼ lim
e!0 ln e
Example: Correlation (D2) Dimension
The correlation dimension of the chaotic attractor in Figure 14.5c, estimated using INSITE, is 2.1, while D2
for the uniformly covered torus in Figure 14.5a is 2.0.
14.1.3 Stability of Steady-State Trajectories

Consider once more the nonlinear RLC circuit in Figure 14.2. If G0a is negative, this circuit settles to a
periodic steady-state from almost every initial condition. However, a trajectory started from the origin
will, in principle, remain indefinitely at the origin since this is an equilibrium point. The circuit has two
possible steady-state solutions. Experimentally, only the limit cycle will be observed. Why?
If trajectories starting from states close to a limit set converge to that steady state, the limit set is called
an attracting limit set. If, in addition, the attracting limit set contains at least one trajectory that comes
arbitrarily close to every point in the set, then it is an attractor. If nearby points diverge from the limit set,
it is called a repellor.
In the nonlinear RLC circuit with G0a < 0, the equilibrium point is a repellor and the limit cycle is an
attractor.
14.1.3.1 Stability of Equilibrium Points

Qualitatively, an equilibrium point is said to be stable if trajectories starting close to it remain nearby for
all future time and unstable otherwise. Stability is a local concept, dealing with trajectories in a small
neighborhood of the equilibrium point.
To analyze the behavior of the vector field in the vicinity of an equilibrium point XQ, we write
X ¼ XQ þ x and substitute into Equation 14.3 to obtain
X_ Q þ x_ ¼ F(XQ þ x)
(14:9)
F(XQ ) þ x_ F(XQ ) þ Dx F(XQ )x
where we have kept just the first two terms of the Taylor series expansion of F(X) about XQ. The Jacobian
matrix DxF(X) is the matrix of partial derivatives of F(X) with respect to X:
6 7
6 @Fi (X) @F1 (X)
@F1 (X) 7
6 @X1 @X2 @Xn 7
6 7
6 @F2 (X) @F2 (X)
@F2 (X) 7
6 @X1 @X2 @Xn 7
Dx F(X) ¼ 6
6 .
7
7
6 .. .. .. .. 7
4 . . . 5
@Fn (X) @Fn (X) @Fn (X)
@X1 @X2 @Xn
Subtracting F(XQ) from both sides of Equation 14.9 we obtain the linear system
x_ ¼ Dx F(XQ )x
where the Jacobian matrix is evaluated at XQ. This linearization describes the behavior of the circuit in
the vicinity of XQ; we call this the local behavior.
Note that the linearization is simply the small-signal equivalent circuit at the operating point XQ.
In general, the local behavior of a circuit depends explicitly on the operating point XQ. For example, a
pn-junction diode exhibits a small incremental resistance under forward bias, but a large small-signal
resistance under reverse bias.
14.1.3.2 Eigenvalues
If XQ is an equilibrium point of Equation 14.3, a complete description of its stability is contained in the
eigenvalues of the linearization of Equation 14.3 about XQ. These are defined as the roots l of the
characteristic equation
det[lI Dx F(XQ )] ¼ 0 (14:10)
where I is the identity matrix.

If the real parts of all of the eigenvalues DxF(XQ) are strictly negative, then the equilibrium point XQ is
asymptotically stable and is called a sink because all nearby trajectories converge toward it.
If any of the eigenvalues has a positive real part, the equilibrium point is unstable; if all of the
eigenvalues have positive real parts, the equilibrium point is called a source. An equilibrium point that
has eigenvalues with both negative and positive real parts is called a saddle. A saddle is unstable.
An equilibrium point is said to be hyperbolic if all the eigenvalues of DxF(XQ) have nonzero real parts.
All hyperbolic equilibrium points are either unstable or asymptotically stable.
14.1.3.3 Discrete-Time Systems

The stability of a fixed point XQ of a discrete-time dynamical system
Xkþ1 ¼ G(Xk )
is determined by the eigenvalues of the linearization DXG(XQ) of the vector field G, evaluated at XQ.
The equilibrium point is classified as stable if all of the eigenvalues of DXG(XQ) are strictly less than
unity in modulus, and unstable if any has modulus greater than unity.
14.1.3.4 Eigenvectors, Eigenspaces, Stable and Unstable Manifolds

Associated with each distinct eigenvalue l of the Jacobian matrix DXF(XQ) is an eigenvector ~
v defined by
n ¼ l~
DX F(XQ )~ n
A real eigenvalue g has a real eigenvector ~h. Complex eigenvalues of a real matrix occur in pairs of the
form s jv. The real and imaginary parts of the associated eigenvectors ~ hr j~
hc span a plane called a
complex eigenplane.
The ns-dimensional subspace of Rn associated with the stable eigenvalues of the Jacobian matrix
is called the stable eigenspace, denoted Es(XQ). The nu-dimensional subspace corresponding to the
unstable eigenvalues is called the unstable eigenspace, denoted Eu(XQ).
The analogs of the stable and unstable eigenspaces for a general nonlinear system are called the local
stable and unstable manifolds* Ws(XQ) and Wu(XQ).
The stable manifold Ws(XQ) is defined as the set of all states from which trajectories remain in the
manifold and converge under the flow to XQ. The unstable manifold Wu(XQ) is defined as the set of all
states from which trajectories remain in the manifold and diverge under the flow from XQ.
By definition, the stable and unstable manifolds are invariant under the flow (if X 2 Ws, then
ft(X) 2 Ws). Furthermore, the ns- and nu-dimensional tangent spaces to Ws and Wu at XQ are Es and
Eu (as shown in Figure 14.8). In the special case of a linear or affine vector field F, the stable and unstable
manifolds are simply the eigenspaces Es and Eu.
Chaos is associated with two characteristic connections of the stable and unstable manifolds.
A homoclinic orbit (see Figure 14.9a) joins an isolated equilibrium point XQ to itself along its stable
and unstable manifolds. A heteroclinic orbit
(Figure 14.9b) joins two distinct equilibrium
points, XQ1 and XQ2, along the unstable manifold
W s (XQ) of one and the stable manifold of the other.
E s(XQ)
14.1.3.5 Stability of Limit Cycles
Although the stability of an equilibrium point may
XQ
be determined by considering the eigenvalues of
E u(XQ) the linearization of the vector field near the point,
how does one study the stability of a limit cycle,
W u(XQ) torus, or chaotic steady-state trajectory?
The idea introduced by Poincaré is to convert a
continuous-time dynamical system into an
equivalent discrete-time dynamical system by tak-
FIGURE 14.8 Stable and unstable manifolds Ws(XQ)
ing a transverse slice through the flow. Intersec-
and Wu(XQ) of an equilibrium point XQ. The stable and
tions of trajectories with this so-called Poincaré
unstable eigenspaces Es(XQ) and Eu(XQ) derived from
the linearization of the vector field at XQ are tangent to
section define a Poincaré map from the section to
the corresponding manifolds Ws and Wu at XQ. A themselves. Since the limit cycle is a fixed point
trajectory approaching the equilibrium point along the XQ of the associated discrete-time dynamical sys-
stable manifold is tangential to Es(XQ) at XQ; a trajec- tem, its stability may be determined by examining
tory leaving XQ along the unstable manifold is tangen- the eigenvalues of the linearization of the Poincaré
tial to Eu(XQ) at XQ. map at XQ.
* An m-dimensional manifold is a geometrical object every small section of which looks like Rm. More precisely, M is an
m-dimensional manifold if, for every x 2 M, there exists an open neighborhood U of x and a smooth invertible map which
takes U to some open neighborhood of Rm. For example, a limit cycle of a continuous-time dynamical system is a one-
dimensional manifold.
W S(XQ2) XQ2
W U(XQ)
∑
XQ XQ1
W U(XQ1)
W S(XQ)
FIGURE 14.9 (a) Homoclinic orbit joins an isolated equilibrium point XQ to itself along its stable and unstable
manifolds. (b) A heteroclinic orbit joins two distinct equilibrium points, XQ1 and XQ2, along the unstable manifolds
of one and the stable manifold of the other.
14.1.3.6 Poincaré Sections

U ∑
A Poincaré section of an n-dimensional autonomous continu-
XQ ous-time dynamical system is an (n 1)-dimensional hyper-
X
plane S in the state space that is intersected transversally*
φτ(x) (X) Г by the flow.
Let G be a closed orbit of the flow of a smooth vector field F,
and let XQ be a point of intersection of G with S. If T is the
period of G and X 2 S is sufficiently close to XQ, then the
trajectory ft(X) through X will return to S after a time
t(X) T and intersect the hyperplane at a point ft(X)(X), as
illustrated in Figure 14.10.
FIGURE 14.10 Transverse Poincaré This construction implicitly defines a function (called a
section S through the flow of a dynamical Poincaré map or first return map) G: U ! S
system induces a discrete Poincaré map
from a neighborhood U of the point of
G(X) ¼ ft(X) (X)
intersection XQ to S.
where U is a small region of S close to XQ. The corresponding discrete-time dynamical system
Xkþ1 ¼ G(Xk )
has a fixed point at XQ.

The stability of the limit cycle is determined by the eigenvalues of the linearization DXG(XQ) of G at
XQ. If all of the eigenvalues of DXG(XQ) have modulus less than unity, the limit cycle is asymptotically
stable; if any has modulus greater than unity, the limit cycle is unstable.
Note that the stability of the limit cycle is independent of the position and orientation of the Poincaré
plane, provided that the intersection is chosen transverse to the flow. For a nonautonomous system with
periodic forcing, a natural choice for the hyperplane is at a fixed phase uo of the forcing.
* A transverse intersection of manifolds in Rn is an intersection of manifolds such that, from any point in the intersection,
all directions in Rn can be generated by linear combinations of vectors tangent to the manifolds.
(a) (b) (c)
FIGURE 14.11 Experimental Poincaré sections corresponding to a torus breakdown sequence in Chua’s oscillator.
(a) Torus, (b) period-four orbit, (c) chaotic attractor resulting from torus breakdown. (From Chua, L.O., Wu, C.W.,
Hung, A., and Zhong, G.-Q., IEEE Trans. Circuits Syst., 40, 738, Oct. 1993. With permission.)
In the Poincaré section, a limit cycle looks like a fixed point. A period-K subharmonic of a non-
autonomous system with periodic forcing appears as a period-K orbit of the corresponding map
(see Figure 14.11b).
The Poincaré section of a quasiperiodic attractor consisting of two incommensurate frequencies looks
like a closed curve—a transverse cut through a two-torus (Figure 14.11a).
The Poincaré section of chaotic attractor has fractal structure, as depicted in Figure 14.11c.
14.1.4 Horseshoes and Chaos

Chaotic behavior is characterized by sensitive dependence on initial conditions. This phrase emphasizes
the fact that small differences in initial conditions are persistently magnified by the dynamics of
the system so that trajectories starting from nearby initial conditions reach totally different states in a
finite time.
Trajectories of the nonlinear RLC circuit in Figure 14.2 that originate near the equilibrium point are
initially stretched apart exponentially by the locally negative resistance in the case G0a < 0. Eventually,
however, they are squeezed together onto a limit cycle, so the stretching is not persistent. This is a
consequence of the noncrossing property and eventual passivity.
Although perhaps locally active, every physical resistor is eventually passive meaning that, for a large
enough voltage across its terminals, it dissipates power. This in turn limits the maximum values of the
voltages and currents in the circuit giving a bounded steady-state solution. All physical systems are
bounded, so how can small differences be magnified persistently in a real circuit?
14.1.4.1 Chaos in the Sense of Shil’nikov

Consider a flow f in R3 that has an equilibrium point at the origin with a real eigenvalue g > 0 and a pair
of complex conjugate eigenvalues s jv with s < 0 and v 6¼ 0. Assume that the flow has a homoclinic
orbit G through the origin.
One may define a Poincaré map for this system by taking a transverse section through the homoclinic
orbit, as illustrated in Figure 14.9a.
THEOREM 14.2 (Shil’nikov)
If js=gj < 1, the flow f can be perturbed to f0 such that f0 has a homoclinic orbit G0 near G and the
Poincaré map of f0 defined in a neighborhood of G0 has a countable number of horseshoes in its discrete
dynamics.
G(3)
1
2
4
G(5) G(1)
5
(a) (b) (c)
(d) (e) (f )
FIGURE 14.12 The Smale horseshoe map stretches the unit square (a), folds it into a horseshoe (b), and lays it back
on itself (c), so that only points lying in bands 2 and 4 of (a) are mapped into the square. At the next iteration, only
those points in (G(2) [ G(4)) \ (2 [ 4) (d) are mapped back to the square. Repeated iterations of the map (d)–(f)
remove all points from the square except an invariant (fractal) set of fixed points.
The characteristic horseshoe shape in the Poincaré map stretches and folds trajectories repeatedly
(see Figure 14.12). The resulting dynamics exhibit extreme sensitivity to initial conditions [7].
The presence of horseshoes in the flow of a continuous-time system that satisfies the assumptions of
Shil’nikov’s theorem implies the existence of countable numbers of unstable periodic orbits of arbitrarily
long period as well as an uncountable number of complicated bounded nonperiodic chaotic solutions [7].
Horseshoes
The action of the Smale horseshoe map is to take the unit square (Figure 14.12a), stretch it, fold it into a
horseshoe shape (Figure 14.12b), and lay it down on itself (Figure 14.12c). Under the action of this map,
only four regions of the unit square are returned to the square.
Successive iterations of the horseshoe map return smaller and smaller regions of square to itself, as
shown in Figure 14.12d through f. If the map is iterated ad infinitum, the unit square is ultimately
mapped onto a set of points. These points form an invariant (fractal) limit set L that contains a countable
set of periodic orbits of arbitrarily long periods, an uncountable set of bounded nonperiodic orbits, and at
least one orbit that comes arbitrarily close to every point in L.
The properties of the map still hold if the horseshoe is distorted by a perturbation of small size but
arbitrary shape. Thus, the dynamical behavior of the horseshoe map is structurally stable.*
Although the invariant limit set of a horseshoe map consists of nonwandering points, it is not
attracting. Therefore, the existence of a horseshoe in the flow of a third-order system does not imply
* Structural stability is discussed in more detail in Section 14.1.5.

that the system will exhibit chaotic steady-state behavior. However if a typical trajectory in the Poincaré
map remains in a neighborhood of the invariant set, then the system may exhibit chaos. Thus, although
Shil’nikov’s theorem is a strong indicator of choas, it does not provide definitive proof that a system
is chaotic.
Example: Chaos in a Piecewise-Linear System
Although we have stated it for the case s < 0, g > 0, Shil’nikov’s theorem also applies when the
equilibrium point at the origin has an unstable pair of complex conjugate eigenvalues and a stable
real eigenvalue. In that case, it is somewhat easier to visualize the stretching and folding of bundles of
trajectories close to a homoclinic orbit.
Consider the trajectory in a three-region piecewise-linear vector field in Figure 14.13. We assume that
the equilibrium point P has a stable real eigenvalue g1 (where the eigenvector is E r(P)) and an
unstable complex conjugate pair of eigenvalues s1 jv1, the real and imaginary parts of whose
eigenvectors span the plane E c(P) [2], as illustrated. A trajectory originating from a point X0 on
E c(P) spirals away from the equilibrium point along Ec(P) until it enters the D0 region, where it is
folded back into D1. Upon reentering D1, the trajectory is pulled toward P roughly in the direction of
the real eigenvector E r(P), as illustrated.
Now imagine what would happen if the trajectory entering D1 from D0 were in precisely the
direction E r(P). Such a trajectory would follow E r(P) toward P, reaching the equilibrium point
asymptotically as t ! 1. Similarly, if we were to follow this trajectory backward in time through D0
and back onto E c(P) in D1, it would then spiral toward P, reaching it asymptotically as t ! 1.
The closed curve thus formed would be a homoclinic orbit, reaching the same equilibrium point P
asymptotically in forward and reverse time.
Although the homoclinic orbit itself is not structurally stable, and therefore cannot be observed
experimentally, horseshoes are structurally stable. A flow f that satisfies the assumptions of Shil’nikov’s
theorem contains a countable infinity of horseshoes; for sufficiently small perturbations f0 of the flow,
finitely many of the horseshoes will persist. Thus, both the original flow and the perturbed flow exhibit
chaos in the sense of Shil’nikov.
D1
D0
X0
D–1
P–
E r(P–)
E c(P–)
FIGURE 14.13 Stretching and folding mechanism of chaos generation in Chua’s circult. A trajectory spirals away
from the equilibrium point P along the eigenplane Ec(P) until it enters the D0 region, where it is folded back into
D1 and returns to the unstable eigenplane Ec(P) close to P. (From Kennedy, M.P., IEEE Trans. Circuits Syst. I
Fundam. Theory Appl., 40, 657, Oct. 1993. With permission.)
In Figure 14.13, we see that a trajectory lying close to a homoclinic orbit exhibits similar qualitative
behavior: it spirals away from P along the unstable complex plane E c(P), is folded in D0, reenters D1
above E c(P), and is pulled back toward E c(P), only to be spun away from P once more.
Thus, two trajectories starting from distinct initial states close to P on E c(P) are stretched apart
exponentially along the unstable eigenplane before being folded in D1 and reinjected close to P; this
gives rise to sensitive dependence on initial conditions. The recurrent stretching and folding continues
ad infinitum, producing a chaotic steady-state solution.
14.1.4.2 Lyapunov Exponents

The notion of sensitive dependence on initial conditions may be made more precise through the
concept of LEs. LEs quantify the average exponential rates of separation of trajectories along
the flow.
The flow in a neighborhood of asympototically stable trajectory is contracting so the LEs are zero or
negative.* Sensitive dependence on initial conditions results from a positive LE.
To determine the stability of an equilibrium point, we consider the eigenvalues of the linearization of
the vector field in the vicinity of equilibrium trajectory. This idea can be generalized to any trajectory of
the flow.
The local behavior of the vector field along a trajectory ft(X0) of an autonomous continuous-time
dynamical system (Equation 14.3) is governed by the linearized dynamics
x_ ¼ DX F(X)x, x(0) ¼ x0
¼ DX F[ft (X0 )]x
This is a linear time-varying system where the state transition matrix, Ft(X0), maps a point x0 into
x(t). Thus
x(t) ¼ Ft (X0 )x0
Note that Ft is a linear operator. Therefore, a ball Be(X0) of radius e about X0 is mapped into an ellipsoid,
as presented in Figure 14.1. The principal axes of the ellipsoid are determined by the singular values of
Ft.
The singular values s1(t), s2(t), . . . , sn(t) of Ft are defined as the square roots of the eigenvalues of
FHt Ft , where Ft is the complex conjugate transpose of Ft. The singular values are ordered so that
H
s1(t)> s2(t)> > sn(t).

In particular, a ball of radius e is mapped by the linearized flow into an ellipsoid (see Figure 14.1), the
maximum and minimum radii of which are bounded by s1(t)e and sn(t)e, respectively.
The stability of a steady-state orbit is governed by the average local rates of expansion and contraction
of volumes of state space close to the orbit. The LEs li are defined by
1
li ¼ lim ln si (t)
t!1 t
whenever this limit exists. The LEs quantify the average exponential rates of separation of trajectories
along the flow.
The LEs are a property of a steady-state trajectory. Any transient effect is averaged out by taking the
limit as t ! 1. Furthermore, the LEs are global quantities of an attracting set that depend on the local
stability properties of a trajectory within the set.
* A continuous flow that has a bounded trajectory not tending to an equlibrium point has a zero LE (in the direction of flow).
The set {li, i, ¼ 1, 2, . . . , n} is called the Lyapunov spectrum. An attractor has the property that the sum
of its LEs is negative.
Lyapunov Exponents of Dicrete-Time Systems

The local behavior along an orbit of the autonomous discrete-time dynamical system (Equation 14.8) is
governed by the linearized dynamics
xkþ1 ¼ Dx G(xk )xk , k ¼ 0, 1, 2, . . .
where the state transition matrix, Fk(X0), maps a point x0 into xk. Thus,
xk ¼ Fk (X0 )x0
The LEs li for the discrete-time dynamical system (Equation 14.8) are defined by
1
li ¼ lim ln si (k)
t!1 k
whenever this limit exists. si(k) denotes the ith singular value of FH
k Fk .
Lyapunov Exponents of Steady-State Solutions

Consider once more the continuous-time dynamical system (Equation 14.3). If DxF were constant along
the flow, with n distinct eigenvalues ~li,
i ¼ 1, 2, . . . , n, then
0 1
exp(~l1 t) 0 0
B 0 exp(~l2 t) 0 C
B C
Ft ¼ B .. .. .. .. C
@ . . . . A
0 0 ~
exp(lan t)
and
0 1
exp 2Re(l~1 )t 0 0
B C
B 0 exp 2Re(l~2 )t 0 C
FH F ¼ B C
t t B .. .. .. .. C
@ . . . . A

0 0 exp 2Re(l~n )t
giving si(t) ¼ exp(Re(~li)t) and
1 ~
li ¼ lim ln exp Re(li )t
t!1 t
¼ Re(~li )
In this case, the LEs are simply the real parts of the eigenvalues of DXF.
All the eigenvalues of a stable equilibrium point have negative real parts and therefore the largest LE of
an attracting equilibrium point is negative.
Trajectories close to a stable limit cycle converge onto the limit cycle. Therefore, the largest LE of a
periodic steady-state is zero (corresponding to motion along the limit cycle [15]), and all its other LEs
are negative.
TABLE 14.1 Classification of Steady-State Behaviors according to Their Limit Sets,

Power Spectra, LEs, and Dimension
Steady State Limit Set Spectrum LEs Dimension
DC Fixed point Spike at DC 0 > l1

ln 0
Periodic Closed curve Fundamental plus l1 ¼ 0 1
Integer harmonics 0 > l2

ln
Quasiperiodic K-torus Incommensurate l1 ¼ ¼ lK ¼ 0 K
Frequencies 0 > lKþ1

ln
Chaotic Fractal Broad spectrum l1 > 0 Noninteger
Pn
i¼1 li < 0
A quasiperiodic K-torus has K zero LEs because the flow is locally neither contracting nor expanding
along the surface of the K-torus.
A chaotic trajectory is locally unstable and therefore has a positive LE; this produces sensitive
dependence on initial conditions. Nevertheless, in the case of a chaotic attractor, this locally unstable
chaotic trajectory belongs to an attracting limit set to which nearby trajectories converge.
The steady-state behavior of a four-dimensional continuous-time dynamical system which has two
positive, one zero, and one negative LE is called hyperchaos.
The Lyapunov spectrum may be used to identify attractors, as summarized in Table 14.1.
14.1.5 Structural Stability and Bifurcations

Structural stability refers to the sensitivity of a phenomenon to small changes in the parameter of a
system. A structurally stable vector field F is one for which sufficiently close vector fields F0 have
equivalent* dynamics [18].
The behavior of a typical circuit depends on a set of parameters one or more of which may be varied in
order to optimize some performance criteria. In particular, one may think of a one-parameter family of
systems
X_ ¼ Fm (X) (14:11)
where the vector field is parametrized by a control parameter m. A value m0 of Equation 14.11 for which
the flow of Equation 14.11 is not structurally stable is a bifurcation value of m [7].
The dynamics in the state space may be qualitatively very different from one value of m to another.
In the nonlinear RLC circuit example, the steady-state solution is a limit cycle if the control parameter
G0a is negative and an equilibrium point if G0a is positive. If G0a is identically equal to zero,
trajectories starting from I30 ¼ 0, V20 < E yield sinusoidal solutions. These sinusoidal solutions are
not structurally stable because the slightest perturbation of G0a will cause the oscillation to decay
to zero or converge to the limit cycle, depending on whether G0a is made slightly larger or smaller
than zero.
If we think of this circuit as being parametrized by G0a , then its vector field is not structurally stable at
0
Ga 0. We say that the equilibrium point undergoes a bifurcation (from stability to instability) as the
value of the bifurcation parameter G0a is reduced through the bifurcation point G0a ¼ 0.
* Equivalent means that there exists a continuous invertible function h that transforms F into F0 .
14.1.5.1 Bifurcation Types

In this section, we consider three types of local bifurcation: the Hopf bifurcation, the saddle-node
bifurcation, and the period-doubling bifurcation [18]. These bifurcations are called local because they
may be understood by linearizing the system close to an equilibrium point or limit cycle.
Hopf Bifurcation
A Hopf bifurcation occurs in a continuous-time dynamical system (Equation 14.3) when a simple pair of
complex conjugate eigenvalues of the linearization DxF(XQ) of the vector field at an equilibrium point XQ
crosses the imaginary axis.
Typically, the equilibrium point changes stability from stable to unstable and a stable limit cycle is
born. The bifurcation at G0a 0 in the nonlinear RLC circuit is Hopf-like.*
When an equilibrium point undergoes a Hopf bifurcation, a limit cycle is born. When a limit cycle
undergoes a Hopf bifurcation, motion on a two-torus results.
Saddle-Node Bifurcation
A saddle-node bifurcation occurs when a stable and an unstable equilibrium point merge and disappear;
this typically manifests itself as the abrupt disappearance of an attractor.
A common example of a saddle-node bifurcation in electronic circuits is switching between equilib-
rium states in a Schmitt trigger. At the threshold for switching, a stable equilibrium point corresponding
to the ‘‘high’’ saturated state merges with the high-gain region’s unstable saddle-type equilibrium point
and disappears. After a switching transient, the trajectory settles to the other stable equilibrium point,
which corresponds to the ‘‘low’’ state.
A saddle-node bifurcation may also manifest itself as a switch between periodic attractors of different
sizes between a periodic attractor and a chaotic attractor, or between a limit cycle at one frequency and a
limit cycle at another frequency.
Period-Doubling Bifurcation
A period-doubling bifurcation occurs in a discrete-time dynamical system (Equation 14.8) when a
real eigenvalue of the linearization DXG(XQ) of the map G at an equilibrium point crosses the unit
circle at 1 [7].
In a continuous-time system, a period-doubling bifurcation occurs only from a periodic solution
(an equilibrium point of the Poincaré map). At the bifurcation point, a periodic orbit with period T
changes smoothly into one with period 2T, as illustrated in Figure 14.14a and b.
Blue Sky Catastrophe

A blue sky catastrophe is a global bifurcation that occurs when an attractor disappears ‘‘into the blue,’’
usually because of a collision with a saddle-type limit set. Hysteresis involving a chaotic attractor is often
caused by a blue sky catastrophe [18].
14.1.5.2 Routes to Chaos

Each of the three local bifurcations may give rise to a distinct route to chaos, and all three have been
reported in electronic circuits. These routes are important because it is often difficult to conclude from
experimental data alone whether irregular behavior is due to measurement noise or to underlying chaotic
dynamics. If, upon adjusting a control parameter, one of the three prototype routes is observed, this
indicates that the dynamics might be chaotic.
* Note that the Hopf bifurcation theorem is proven for sufficiently smooth systems and does not strictly apply to piecewise-
linear systems. However, a physical implementation of a piecewise-linear characteristic, such as that of NR, is always
smooth.
6
4
2
V1 0
–2
–4
–6
0 2 4 6 8 10
0
–20
–40
–60
I3
V2 –80
–100
0 2 4 6 8 10
(a)
6
4
V1 2
0
–2
–4
–6
0 2 4 6 8 10
0
–20
–40
I3 –60
V2 –80
–100
0 2 4 6 8 10
(b)
6
4
V1 2
0
–2
–4
–6
0 2 4 6 8 10
0
–20
–40
–60
I3
V2 –80
–100
0 2 4 6 8 10
(c)
6
4
2
V1 0
–2
–4
–6
0 2 4 6 8 10
0
–20
–40
I3 –60
V2 –80
–100
0 2 4 6 8 10
(d)
FIGURE 14.14 Period-doubling route to chaos in Chua’s oscillator. Simulated state-space trajectories, time
waveforms V1(t), and power spectra of V2(t) (a) G ¼ 530 mS: periodic steady-state—the signal is characterized by a
discrete power spectrum with energy at integer multiples of the fundamental frequency f0; (b) G ¼ 537 mS; period-
two—after a period-doubling bifurcation, the period of the signal is approximately twice that of (a). In the power
spectrum, a spike appears at the new fundamental frequency f0=2. (c) G ¼ 539 mS: period-four—a second period-
doubling bifurcation gives rise to a fundamental frequency of f0=4; (d) G ¼ 541 mS: spiral Chua’s attractor—a
cascade of period doublings results in a chaotic attractor that has a broadband power spectrum. Time plots:
horizontal axis—t (ms); vertical axis—V1 (V). Power spectra: horizontal axis—frequency (kHz); vertical axis—
power (mean-squared amplitude of V2(t)) (dB).
Periodic-Doubling Route to Chaos

The period-doubling route to chaos is characterized by a cascade of period-doubling bifurcations. Each
period-doubling transforms a limit cycle into one at half the frequency, spreading the energy of the
system over a wider range of frequencies. An infinite cascade of such doublings results in a chaotic
trajectory of infinite period and a broad frequency spectrum that contains energy at all frequencies.
Figure 14.14 is a set of snapshots of the period-doubling route to chaos in Chua’s oscillator.
An infinite number of period-doubling bifurcations to chaos can occur over a finite range of the
bifurcation parameter because of a geometric relationship between the intervals over which the control
parameter must be moved to cause successive bifurcations. Period-doubling is governed by a universal
scaling law that holds in the vicinity of the bifurcation point to chaos m1.
Define the ratio dk of successive intervals m, in each of which there is a constant period of oscillation,
as follows,
m2k m2k1
dk ¼
m2kþ1 m2k
where m2k is the bifurcation point for the period from 2kT to 2kþ1T. In the limit as k ! 1, a universal
constant called the Feigenbaum number d is obtained:
lim dk ¼ d ¼ 4:6692 . . .
k!1
The period-doubling route to chaos is readily identified from a state-space plot, time series, power
spectrum, or a Poincaré map.
Intermittency Route to Chaos

The route to chaos caused by saddle-node bifurcations comes in different forms, the common feature of
which is direct transition from regular motion to chaos. The most common type is the intermittency
route and results from a single saddle-node bifurcation. This is a route and not just a jump because,
straight after the bifurcation, the trajectory is characterized by long intervals of almost regular motion
(called laminar phases) and short bursts of irregular motion. The period of the oscillations is approxi-
mately equal to that of the system just before the bifurcation. This is illustrated in Figure 14.15.
As the parameter passes through the critical value mc at the bifurcation point into the chaotic region,
the laminar phases become shorter and the bursts become more frequent, until the regular intervals
disappear altogether. The scaling law for the average interval of the laminar phases depends on jm – mcj,
so chaos is not fully developed until some distance from the bifurcation point [13].
Intermittency is best characterized in the time domain because its scaling law depends on the length of
the laminar phases.
Another type of bifurcation to chaos associated with saddle-nodes is the direct transition from a
regular attractor (fixed point or limit cycle) to a coexisting chaotic one, without the phenomenon of
intermittency.
Quasiperiodic (Torus Breakdown) Route to Chaos

The quasiperiodic route to chaos results from a sequence of Hopf bifurcations. Starting from a fixed
point, the three-torus generated after three Hopf bifurcations is not stable in the sense that there exists an
arbitrarily small perturbation of the system (in terms of parameters) for which the three-torus gives way
to chaos.
A quasiperiodic–periodic–chaotic sequence corresponding to torus breakdown in Chua’s oscillator is
given in Figure 14.5.
V1 1
0
–1
–2
0 10 20 30 40 50 60 70 80 90 100
0
–20
–40
–60
I3 V2 –80
–100
0 1 2 3 4 5
(a)
2
V1
1
0
–1
–2
0 10 20 30 40 50 60 70 80 90 100
0
–20
–40
–60
I3 V2 –80
–100
0 1 2 3 4 5
(b)
2
V1
1
0
–1
–2
0 10 20 30 40 50 60 70 80 90 100
0
–20
–40
–60
I3 V2 –80
–100
0 1 2 3 4 5
(c)
FIGURE 14.15 Intermittency route to chaos in Chua’s oscillator. Simulated state-space trajectories, time wave-
forms V1(t) and power spectra of V2(t) (a) Periodic steady-state—the signal is characterized by a discrete power
spectrum with energy at integer multiples of the fundamental frequency; (b) onset of intermittency—the time signal
contains long regular laminar phases and occasional bursts of irregular motion—in the frequency domain, intermit-
tency manifests itself as a raising of the noise floor; (c) fully developed chaos-laminar phases are infrequent and the
power spectrum is broad. Time plots: horizontal axis—t (ms); vertical axis—V1 (V). Power spectra: horizontal axis—
frequency (kHz); vertical axis—power (mean-squared amplitude of V2(t)) (dB).
Quasiperiodicity is difficult to detect from a time series; it is more readily identified by means of a
power spectrum or Poincaré map (see Figure 14.11).
14.1.5.3 Bifurcation Diagrams and Parameter Space Diagrams

Although state-space, time- and frequency-domain measurements are useful for characterizing steady-
state behaviors, nonlinear dynamics offers several other tools for summarizing qualitative information
concerning bifurcations.
0.8
Iterates of map xn
0.6
0.4
0.2
0
2.5 2.8 3.2 3.6 4
μ1 μ2 μ4 μ3
Bifurcation parameter μ
FIGURE 14.16 Bifurcation diagram for the logistic map: Xkþ1 ¼ mXk(1Xk). The first period-doubling bifurcation
occurs at m ¼ m1, the second at m2, and the third at m4. m3 corresponds to a period-three window. When m ¼ 4, the
entire interval (0, 1) is visited by a chaotic orbit {Xk, k ¼ 0, 1, . . . }. (From Wu, C.W. and Rul’kov, N.R., IEEE Trans.
Circuits Syst. I Fundam. Theory Appl., 40, 708, Oct. 1993. With permission.)
A bifurcation diagram is a plot of the attracting sets of a system versus a control parameter. Typically,
one chooses a state variable and plots this against a single control parameter. In discrete systems, one
simply plots successive values of a state variable. In the continuous-time case, some type of discretization
is needed, typically by means of a Poincaré section.
Figure 14.16 is a bifurcation diagram of the logistic map Xkþ1 ¼ mXk(1 – Xk) for m 2 [2.5, 4] and Xk 2
[0, 1]. Period doubling from period-one to period-two occurs at m2; the next two doublings in the period-
doubling cascade occur at m2 and m4, respectively. A periodic window in the chaotic region is indicated
by m3. The map becomes chaotic by the period-doubling route if m is increased from m3 and by the
intermittency route if m is reduced out of the window.
When more than one control parameter is present in a system, the steady-state behavior may be
summarized in a series of bifurcation diagrams, where one parameter is chosen as the control parameter,
with the others held fixed, and only changed from one diagram to the next. This provides a complete but
cumbersome representation of the dynamics [13].
A clearer picture of the global behavior is obtained by partitioning the parameter space by means of
bifurcation curves, and labeling the regions according to the observed steady-state behaviors within these
regions. Such a picture is called a parameter space diagram.
14.2 Chua’s Circuit: A Paradigm for Chaos

Chaos is characterized by a stretching and folding mechanism; nearby trajectories of a dynamical system
are repeatedly pulled apart exponentially and folded back together.
In order to exhibit chaos, as autonomous circuit consisting of resistors, capacitors, and inductors must
contain (1) at least one locally active resistor, (2) at least one nonlinear element, and (3) at least three
energy-storage elements. The active resistor supplies energy to separate trajectories, the nonlinearity
provides folding, and the three-dimensional state space permits persistent stretching and folding in a
bounded region without violating the noncrossing property of trajectories.
Chua’s circuit (see Figure 14.17) is the simplest electronic circuit that satisfies these criteria. It consists
of a linear inductor, a linear resistor, two linear capacitors, and a single nonlinear resistor NR. The circuit
is readily constructed at low cost using standard electronic components and exhibits a rich variety of
bifurcations and chaos [10].
IR
+ + +
L C2 V2 V1 C1 VR NR
I3 – – –
FIGURE 14.17 Chua’s circuit consists of a linear inductor L, two linear capacitors (C2, C1), a linear resistor R,
and a voltage-controlled nonlinear resistor NR.
14.2.1 Dynamics of Chua’s Circuit

14.2.1.1 State Equations
Chua’s circuit may be described by three ODEs. Choosing V1, V2, and I3 as state variables, we write
dV1 G 1
¼ (V2 V1 ) f (V1 )
dt C1 C1
dV2 G 1
¼ (V1 V2 ) þ I3 (14:12)
dt C2 C2
dI3 1
¼ V2
dt L
where G ¼ 1=R and f(VR) ¼ GbVR þ 1=2(Ga þ Gb) (jVR þ Ej jVR Ej), as depicted in Figure 14.18.
Because of the piecewise-linear nature of NR, the vector field of Chua’s circuit may be decomposed into
three distinct affine regions: V1 < E, jV1j E, and V1 > E. We call these the D1, D0, and D1 regions,
respectively. The global dynamics may be determined by considering separately the behavior in each of
the three regions (D1, D0, and D1) and then gluing the pieces together along the boundary planes U1
and U1.
14.2.1.2 Piecewise-Linear Dynamics

In each region, the circuit is governed by a three-dimensional autonomous affine dynamical system
of the form
IR
Gb
(Gb – Ga)E
–E Ga
0 E VR
(Ga – Gb)E Gb
FIGURE 14.18 The DP characteristic of the nonlinear resistor NR in Chua’s circuit has breakpoints at E and
slopes Ga and Gb in the inner and outer regions, respectively.
G >|Ga|
IR |Gb| < G < |Ga| IR
Ga Ga
P–
Gb Gb P–
G <|Gb| VR VR
0 0 Gb
Gb
P+
P+
(a) (b) Ga
Ga
FIGURE 14.19 DC equilibrium points of Figure 14.17 may be determined graphically by intersecting the load line
IR ¼ GVR with the DP characteristic of NR. (a) If G > jGaj or G < jgbj, the circuit has a unique equilibrium point at
the origin (P and Pþ are virtual equilibria in this case). (b) When jGbj < G <j Gaj, the circuit has three equilibrium
points at P, 0 and Pþ.
X_ ¼ AX þ b (14:13)
where
A is the (constant) system matrix
b is a constant vector
The equilibrium points of the circuit may be determined graphically by intersecting the load line
IR ¼ GVR with the DP characteristic IR ¼ f(VR) of the nonlinear resistor NR, as presented in Figure
14.19 [2]. When G > jGaj or G > jGbj, the circuit has a unique equilibrium point at the origin (and two
virtual equilibria P and Pþ); otherwise, it has three equilibrium points at P, 0, and Pþ.
The dynamics close to an equilibrium point XQ are governed locally by the linear system
x_ ¼ Ax (14:14)
If the eigenvalues l1, l2, and l3 of A are distinct, then every solution x(t) of Equation 14.14 may be
expressed in the form
x(t) ¼ c1 exp(l1 t)~

j1 þ c2 exp(l2 t)~
j2 þ c3 exp(l3 t)~
j3
where
j 1, ~
~ j2, and ~
j3 are the (possibly complex) eigenvectors associated with the eigenvalues l1, l2, and l3,
respectively
ck’s are (possibly complex) constants that depend on the initial state X0
In the special case when A has one real eigenvalue g and a complex conjugate pair of eigenvalues
s jv, the solution of Equation 14.14 has the form
x(t) ¼ cr exp(gt)~
jg þ 2cc exp(st)½cos(vt þ fc )~
hr sin(vt þ fc )~
hi
where
hr and ~
~ hi are the real and imaginary parts of the eigenvectors associated with the complex conjugate
pair of eigenvalues
~
jg is the eigenvector defined by A~ jg ¼ g ~jg
cr, cc, and fc are real constants that are determined by the initial conditions
Let us relabel the real eigenvector Er, and define Ec as the complex eigenplane spanned by ~
hr and ~
hi.
We can think of the solution x(t) of Equation 14.14 as being the sum of two distinct components xr(t)
2 E r and xc(t) 2 E c:
xr (t) ¼ cr exp(gt)~
jg
xc (t) ¼ 2cc exp(st)[ cos(vt þ fc )~
hr sin(vt þ fc )~
hi ]
The complete solution X(t) of Equation 14.13 may be found by translating the origin of the linearized
coordinate system to the equilibrium point XQ. Thus,
X(t) ¼ XQ þ x(t)
¼ XQ þ xr (t) þ xc (t)
We can determine the qualitative behavior of the complete solution X(t) by considering separately the
components xr(t) and xc(t) along E r and E c, respectively.
If g > 0, xr(t) grows exponentially in the direction of E r; if g < 0 the component xr(t) tends asymp-
totically to zero. When s > 0 and v 6¼ 0, xc(t) spirals away from XQ along the complex eigenplane E c, and
if s < 0, xc(t) spirals toward XQ and E c.
We remark that the vector E r and plane E c are invariant under the flow of Equation 14.13: if X(0) 2 E r,
then X(t) 2 E r for all t; if X(0) 2 E c then X(t) 2 E c for all t. An important consequence of this is that a
trajectory X(t) cannot cross through the complex eigenspace Ec; suppose X(t0) 2 E c at some time t0, then
X(t) 2 Ec for all t > t0.
14.2.2 Chaos in Chua’s Circuit

In the following discussion, we consider a fixed set of component values: L ¼ 18 mH, C2 ¼ 100 nF,
C1 ¼ 10 nF, Ga ¼ 50=66 mS ¼ 757.576 mS, Gb ¼ 9=22 mS ¼ 409.091 mS, and E ¼ 1 V. When
G ¼ 550 mS, three equilibrium points occur at Pþ, 0, and P. The equilibrium point at the origin (0) has
one unstable real eigenvalue g0 and a stable complex pair s0 jv0. The outer equilibria (P and Pþ) each
have a stable real eigenvalue g1 and an unstable complex pair s0 jv1.
14.2.2.1 Dynamics of D0
A trajectory starting from some initial state X0 in the D0 region may be decomposed into its components
along the complex eigenplane Ec(0) and along the eigenvector Er(0). When g0 > 0 and s0 < 0, the
component along Ec(0) spirals toward the origin along this plane while the component in the direction
Er(0) grows exponentially. Adding the two components, we see that a trajectory starting slightly above the
stable complex eigenplane Ec(0) spirals toward the origin along the Ec(0) direction, all the while being
pushing away from Ec(0) along the unstable direction Er(0). As the (stable) component along Ec(0)
shrinks in magnitude, the (unstable) component grows exponentially, and the trajectory follows a helix of
exponentially decreasing radius whose axis lies in the direction of Er(0); this is illustrated in Figure 14.20.
14.2.2.2 Dynamics of D1 and D1

The eigenvector Er(Pþ) is associated with the stable real eigenvalue g1 in the D1 region. The real
and imaginary parts of the complex eigenvectors associated with s1 jv1 define a complex eigen-
plane Ec(Pþ).
A trajectory starting from some initial state X0 in the D1 region may be decomposed into its
components along the complex eigenplane Ec(Pþ) and the eigenvector Er(Pþ). When g1 < 0 and
s1 > 0, the component on Ec(Pþ) spirals away from Pþ along this plane while the component in the
direction of Er(0) tends asymptotically toward Pþ. Adding the two components, we see that a trajectory
starting close to the stable real eigenvector Er(Pþ) above the complex eigenplane moves toward Ec(Pþ)
V1
E r(0)
I3 V2
D0
0
E c(0)
FIGURE 14.20 Dynamics of the D0 region. A trajectory starting slightly above the stable complex eigenplane Ec(0)
spirals toward the origin along this plane and is repelled close to 0 in the direction of the unstabe eigenvector Er(0).
(From Kennedy, M.P., IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 40, 660, Oct. 1993. With permission.)
along a helix of exponentially increasing radius. Because the component along Er(Pþ) shrinks exponen-
tially in magnitude and the component on Ec(Pþ) grows exponentially, the trajectory is quickly
flattened onto Ec(Pþ), where it spirals away from Pþ along the complex eigenplane; this is illustrated
in Figure 14.21.
By symmetry, the equilibrium point P in the D1 region has three eigenvalues: g1 and s1 jv1. The
eigenvector Er(P) is associated with the stable real eigenvalue g1; the real and imaginary parts of the
eigenvectors associated with the unstable complex pair s1 jv1 define an eigenplane Ec(P), along which
trajectories spiral away from P.
V1
E c(P+)
E r(P+)
P+
D1
V2
I3
P–
E r(P–)
E c(P–)
FIGURE 14.21 Dynamics of the D1 region. A trajectory starting above the unstable complex eigenplane Ec(Pþ)
close to the eigenvector Er(Pþ) moves toward the plane and spirals away from Pþ along Ec(Pþ). By symmetry, the D1
region has equivalent dynamics. (From Kennedy, M.P., IEEE Trans. Circuits Syst., 40, 662, Oct. 1993. With
permission.)
14.2.2.3 Global Dynamics

With the given set of parameter values, the equilibrium point at the origin has an unstable real eigenvalue
and a stable pair of complex conjugate eigenvalues; the outer equilibrium point P has a stable real
eigenvalue and an unstable complex pair.
In particular, P has a pair of unstable complex conjugate eigenvalues s1 v1 (s1 > 0, v1 6¼ 0) and a
stable real eigenvalue g1, where js1j < jv1j. In order to prove that the circuit is chaotic in the sense of
Shil’nikov, it is necessary to show that it possesses a homoclinic orbit for this set of parameter values.
A trajectory starting on the eigenvector Er(0) close to 0 moves away from the equilibrium point until it
crosses the boundary U1 and enters D1, as illustrated in Figure 14.20. If this trajectory is folded back into
D0 by the dynamics of the outer region, and reinjected toward 0 along the stable complex eigenplane
Ec(0) then a homoclinic orbit is produced.
That Chua’s circuit is chaotic in the sense of Shil’nikov was first proven by Chua et al. [21] in 1985.
Since then, there has been an intensive effort to understand every aspect of the dynamics of this circuit
with a view to developing it as a paradigm for learning, understanding, and teaching about nonlinear
dynamics and chaos [3].
14.2.3 Steady-States and Bifurcations in Chua’s Circuit

In the following discussion, we consider the global behavior of the circuit using our chosen set of
parameters with R in the range 0 R 2000 V (500 mS G < 1S).
Figure 14.14 is a series of simulations of the equivalent circuit in Figure 14.26 with the follow-
ing parameter values: L ¼ 18 mH, C2 ¼ 100 nF, C1 ¼ 10 nF, Ga ¼ 50=66 mS ¼ 757.576 mS,
Gb ¼ 9=22 mS ¼ 409.091 mS, and E ¼ 1 V. R0 ¼ 12.5 V, the parasitic series resistance of a real
inductor. R is the bifurcation parameter.
14.2.3.1 Equilibrium Point and Hopf Bifurcation

When R is large (2000 V), the outer equilibrium points P and Pþ are stable (g1 < 0 and s1 < 0, v1 6¼ 0);
the inner equilibrium point 0 is unstable (g0 > 0 and s0 < 0, v0 6¼ 0).
Depending on the initial state of the circuit, the system remains at one outer equilibrium point or the
other. Let us assume that we start at Pþ in the D1 region. This equilibrium point has one negative real
eigenvalue and a complex pair with negative real parts. The action of the negative real eigenvalue g1 is to
squeeze trajectories down onto the complex eigenplane Ec(Pþ), where they spiral toward the equilibrium
point Pþ.
As the resistance R is decreased, the real part of the complex pair of eigenvalues changes sign
and becomes positive. Correspondingly, the outer equilibrium points become unstable as s1 passes
through 0; this is a Hopf-like bifurcation.* The real eigenvalue of Pþ remains negative so trajectories in
the D1 region converge toward the complex eigenplane Ec(Pþ). However, they spiral away from the
equilibrium point Pþ along Ec(Pþ) until they reach the dividing plane U1 (defined by V1 þ E) and enter
the D0 region.
The equilibrium point at the origin in the D0 region has a stable complex pair of eigenvalues and an
unstable real eigenvalue. Trajectories that enter the D0 region on the complex eigenplane Ec(0) are
attracted to the origin along this plane. Trajectories that enter D0 from D1 below or above the eigenplane
either cross-over to D1 or are turned back toward D1, respectively. For R sufficiently large, trajectories
that spiral away from Pþ along Ec(Pþ) and enter D0 above Ec(0) are returned to D1, producing a stable
period-one limit cycle. This is illustrated in Figure 14.14a.
* Recall that the Hopf bifurcation theorem strictly applies only for sufficiently smooth systems, but that physical implemen-
tations of piecewise-linear characteristics are typically smooth.
14.2.3.2 Period-Doubling Cascade

As the resistance R is decreased further, a period-doubling bifurcation occurs. The limit cycle now closes
on itself after encircling Pþ twice; this is called a period-two cycle because a trajectory takes approxi-
mately twice the time to complete this closed orbit as to complete the preceding period-one orbit (see
Figure 14.14b).
Decreasing the resistance R still further produces a cascade of period-doubling bifurcations to period-
four (Figure 14.14c), period-eight, period-sixteen, and so on until an orbit of infinite period is reached,
beyond which we have chaos (see Figure 14.14d). This is a spiral Chua’s chaotic attractor.
The spiral Chua’s attractor in Figure 14.14d looks like a ribbon or band that is smoothly folded on
itself; this folded band is the simplest type of chaotic attractor [18]. A trajectory from an initial condition
X0 winds around the strip repeatedly, returning close to X0, but never closing on itself.
14.2.3.3 Periodic Windows

Between the chaotic regions in the parameter space of Chua’s circuit, there exist ranges of the bifurcation
parameter R over which stable periodic motion occurs. These regions of periodicity are called periodic
windows and are similar to those that exist in the bifurcation diagram of the logistic map (see
Figure 14.16).
Periodic windows of periods three and five are readily found in Chua’s circuit. These limit cycles
undergo period-doubling bifurcations to chaos as the resistance R is decreased.
For certain sets of parameters, Chua’s circuit follows the intermittency route to chaos as R is increased
out of the period-three window.
14.2.3.4 Spiral Chua’s Attractor

Figure 14.22 outlines three views of another simulated spiral Chua’s chaotic attractor. Figure 14.22b is a
view along the edge of the outer complex eigenplanes Ec(Pþ) and Ec(P); notice how trajectories in the
D1 region are compressed toward the complex eigenplane Ec(Pþ) along the direction of the stable real
eigenvector Ec(Pþ) and they spiral away from the equilibrium point Pþ along Ec(Pþ).
When a trajectory enters the D0 region through U1 from D1, it is twisted around the unstable real
eigenvector Er(0) and returned to D1.
Figure 14.22c illustrates clearly that when the trajectory enters D0 from D1, it crosses U1 above the
eigenplace Ec(0). The trajectory cannot cross through this eigenplane and therefore it must return to the
D1 region.
14.2.3.5 Double-Scroll Chua’s Attractor

Because we chose a nonlinear resistor with a symmetric nonlinearity, every attractor that exists in the
D1 and D0 regions has a counterpart (mirror image) in the D1 and D0 regions. As the coupling
resistance R is decreased further, the spiral Chua’s attractor ‘‘collides’’ with its mirror image and the
two merge to form a single compound attractor called a double-scroll Chua’s chaotic attractor [10], as
presented in Figure 14.23.
Once more, we show three views of this attractor in order to illustrate its geometrical structure.
Figure 14.23b is a view of the attractor along the edge of the outer complex eigenplanes Ec(Pþ) and
Ec(P). Upon entering the D1 region form D0, the trajectory collapses onto Ec(Pþ) and spirals away from
Pþ along this plane.
Figure 14.23c is a view of the attractor along the edge of the complex eigenplane Ec(0) in the inner
region. Notice once more that when the trajectory crosses U1 into D0 above Ec(0), it must remain above
Ec(0) and so returns to D1. Similarly, if the trajectory crosses U1 below Ec(0), it must remain below Ec(0)
and therefore crosses over to the D1 region. Thus, Ec(0) presents a knife-edge to the trajectory as it
crosses U1 into the D0 region, forcing it back toward D1 or across D0 to D1.
V1 V1
E r(P+)
E c(P+)
D1 P+
U1 U1
V2 I3
D0 I3 V2
E r(0) 0
U–1 U–1
D–1 P–
(a) (b)
V1
U1
E c(0) I3 V2
E r(0)
U–1
(c)
FIGURE 14.22 Three views of a simulated spiral Chua’s attractor in Chua’s oscillator with G ¼ 550 mS.
(a) Reference view (compare with Figure 14.14d). (b) View of the edge of the outer complex eigenplanes Ec(Pþ)
and Ec(P); note how trajectory in D1 is flattened onto Ec(Pþ). (c) View along the edge of the complex eigenplane
Ec(0); trajectories cannot cross this plane. (From Kennedy, M.P., IEEE Trans. Circuits Syst. I Fundam. Theory Appl.,
40, 664, Oct. 1993. With permission.)
14.2.3.6 Boundary Crisis

Reducing the resistance R still further produces more regions of chaos, interspersed with periodic
windows. Eventually, for a sufficiently small value of R, the unstable saddle trajectory that normally
resides outside the stable steady-state solution collides with the double-scroll Chua’s attractor and a blue
sky catastrophe called a boundary crisis [10] occurs. After this, all trajectories become unbounded.
14.2.4 Manifestations of Chaos

14.2.4.1 Sensitive Dependence on Initial Conditions
Consider once more the double-scroll Chua’s attractor shown in Figure 14.23. Two trajectories starting
from distinct but almost identical initial states in D1 will remain ‘‘close together’’ until they reach the
separating plane U1. Imagine that the trajectories are still ‘‘close’’ at the knife-edge, but that one trajectory
crosses into D0 slightly above Ec(0) and the other slightly below Ec(0). The former trajectory returns to D1
and the latter crosses over to D1: their ‘‘closeness’’ is lost.
The time-domain waveforms V1(t) for two such trajectories are shown in Figure 14.24. These
are solutions of Chua’s oscillator with the same parameters as in Figure 14.23; the initial condi-
tions are (I3, V2, V1) ¼ (1.810 mA, 222.014 mV, 2.286 V) [solid curve] and (I3, V2, V1) ¼ (1.810 mA,
V1 V1
E r(P+)
E c(P+)
D1 P+
U1
V2 I3
D0 I3 V2
0
U–1 P–
D–1 E r(P–)
E c(P–)
(a) (b)
V1
U1
E c(0) I3 V2
E r(0)
U –1
(c)
FIGURE 14.23 Three views of a simulated double-scroll Chua’s attractor in Chua’s oscillator with G ¼ 565 mS.
(a) Reference view (compare with Figure 14.14d). (b) View along the edge of the outer complex eigenplanes Ec(Pþ)
and Ec(P); note how the trajectory in D1 is flattened onto Ec(Pþ) and onto Ec(P) in D1. (c) View along the edge
of the complex eigenplane Ec(0); a trajectory entering D0 from D1 above this plane returns to D1 while one entering
D0 below Ec(0) crosses to D1. (From Kennedy, M.P., IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 40, 665,
Oct. 1993. With permission.)
222.000 mV, 2.286 V) [dashed curve]. Although the initial conditions differ by less than 0.01% in just
one component (V2), the trajectories diverge and become uncorrelated within 5 ms because one crosses
the knife-edge before the other.
6
4
2
0
–2
–4
–6
0 1 2 3 4 5
FIGURE 14.24 Sensitive dependence on initial conditions. Two time waveforms V1(t) from Chua’s oscillator with
G ¼ 550 mS, starting from (I3, V2, V1) ¼ (1.810 mA, 222.01 mV, 2.286 V) [solid line] and (I3, V2, V1) ¼ (1.810 mA,
222.000 mV, 2.286 V) [dashed line]. Note that the trajectories diverge within 5 ms. Horizontal axis: t (ms); vertical
axis: V1 (V). Compare with Figure 14.23.
This rapid decorrelation of trajectories that originate in nearby initial states, commonly called sensitive
dependence on initial conditions, is a generic property of chaotic systems. It gives rise to an apparent
randomness in the output of the system and long-term unpredictability of the state.
14.2.4.2 ‘‘Randomness’’ in the Time Domian

Figures 14.14a through d show the state-space trajectories of period-one, period-two, and period-four
periodic attractors, a spiral Chua’s chaotic attractor, respectively, and the corresponding voltage wave-
forms V1(t).
The ‘‘period-one’’ waveform is periodic; it looks like a slightly distorted sinusoid. The ‘‘period-two’’
waveform is also periodic. It differs qualitatively from the ‘‘period-one’’ in that the pattern of a large peak
followed by a small peak repeats approximately once every two cycles of the period-one signal; that is
why it is called period-two.
In contrast with these periodic time waveforms, V1(t) for the spiral Chua’s attractor is quite irregular
and does not appear to repeat itself in any observation period of finite length. Although it is produced by
a third-order deterministic differential equation, the solution looks ‘‘random.’’
14.2.4.3 Broadband ‘‘Noise-Like’’ Power Spectrum

In the following discussion, we consider 8192 samples of V2(t) recorded at 200 kHz; leakage in the power
spectrum is controlled by applying a Welch window [17] to the data.
We remarked earlier that the period-one time waveform corresponding to the attractor in Figure
14.14a, is almost sinusoidal; we expect, therefore, that most of its power should be concentrated at the
fundamental frequency. The power spectrum of the period-one waveform V2(t) shown in Figure 14.14a
consists of a sharp spike at approximately 3 kHz and higher harmonic components that are over 30 dB
below the fundamental.
Because the period-two waveform repeats roughly once every 0.67 ms, this periodic signal has a
fundamental frequency component at approximately 1.5 kHz (see Figure 14.14b). Notice, however, that
most of the power in the signal is concentrated close to 3 kHz.
The period-four waveform repeats roughly once every 1.34 ms, corresponding to a fundamental
frequency component at approximately 750 Hz (see Figure 14.14c). Note once more that most of the
power in the signal is still concentrated close to 3 kHz.
The spiral Chua’s attractor is qualitatively different from these periodic signals. The aperiodic nature
of its time-domain waveforms is reflected in the broadband noise-like power spectrum (Figure 14.14d).
No longer is the power of the signal concentrated in a small number of frequency components; rather, it
is distributed over a broad range of frequencies. This broadband structure of the power spectrum persists
even if the spectral resolution is increased by sampling at a higher frequency fs. Notice that the spectrum
still contains a peak at approximately 3 kHz that corresponds to the average frequency of rotation of the
trajectory about the fixed point.
14.2.5 Practical Realization of Chua’s Circuit

Chua’s circuit can be realized in a variety of ways using standard or custom-made electronic components.
All the linear elements (capacitor, resistor, and inductor) are readily available as two-terminal devices.
A nonlinear resistor NR with the prescribed DP characteristic (called a Chua diode [10]) may be
implemented by connecting two negative resistance converters in parallel as outlined in Figure 14.25.
A complete list of components is given in Table 14.2.
The op-amp subcircuit consisting of A1, A2, and R1–R6 functions as a negative resistance converter
NR with DP characteristic as shown in Figure 14.28b. Using two 9 V batteries to power the op-amps
gives V þ ¼ 9 V and V ¼ 9 V. From measurements of the saturation levels of the AD712 outputs,
Esat 8.3 V, giving E 1 V. With R2 ¼ R3 and R5 ¼ R6, the nonlinear characteristic is defined by
Ga ¼ 1=R1–1=R4 ¼ 50=66 mS, Gb ¼ 1=R31=R4 ¼ 9=22 mS, and E ¼ R1Esat=(R1 þ R2) 1 V [10].
R IR
1 2
R3 R6
+ + +
V+ V+
+ +
A1 3 A2 5
– –
L C2 V2 V1 C1 VR
V– V–
I3 4 6
R2 R5
R1 R4
– – –
0
NR
FIGURE 14.25 Practical implementation of Chua’s circuit using two op-amps and six resistors to realize the Chua
diode. Component values are listed in Table 14.2. (From Kennedy, M.P., IEEE Trans. Circuits Syst. I Fundam. Theory
Appl., 40, 640–656, 657–674, Oct. 1993. With permission.)
TABLE 14.2 Component List for the Practical Implementation

of Chua’s Circuit, Depicted in Figure 14.25
Element Description Value Tolerance (%)
A1 (12
Op-amp AD712, TL082, — —
or equivalent)
A2 Op-amp (12 AD712, TL082, — —
or equivalent)
C1 Capacitor 10 nF 5
R Potentiometer 2 kV —
R1 1
4 W resistor 3.3 kV 5
R2 1
4 W resistor 22 kV 5
R3 1
R4 1
4 W resistor 2.2 kV 5
R5 1
4 W resistor 220 V 5
R6 1
4 W resistor 220 V 5
L Inductor (TOKO-type 10 RB, 118 mH 10
or equivalent)
The equivalent circuit of Figure 14.25 is presented in Figure 14.26, where the real inductor is modeled
as a series connection of an ideal linear inductor L and a linear resistor R0. When the inductor’s resistance
is modeled explicitly in this way, the circuit is called Chua’s oscillator [5].
14.2.6 Experimental Steady-State Solutions

A two-dimensional projection of the steady-state attractor in Chua’s circuit may be obtained by
connecting V2 and V1 to the X and Y channels, respectively, of an oscilloscope in X–Y mode.
+ + + IR
L
I3 C2 V2 V1 C1 VR NR
R0 – – –
FIGURE 14.26 Chua’s oscillator.
14.2.6.1 Bifurcation Sequence with R as Control Parameter

By reducing the variable resistor R in Figure 14.25 from 2000 V to 0, Chua’s circuit exhibits a
Hopf bifurcation from dc equilibrium, a sequence of period-doubling bifurcations to a spiral Chua’s
attractor, periodic windows, a double-scroll Chua’s chaotic attractor, and a boundary crisis, as illustrated
in Figure 14.27.
Notice that varying R in this way causes the size of the attractors to change: the period-one orbit is
large, period-two is smaller, the spiral Chua’s attractor is smaller again, and the double-scroll Chua’s
attractor shrinks considerably before it dies. This shrinking is due to the equilibrium points Pþ and P
moving closer toward the origin as R is decreased. Consider the load line in Figure 14.19b: as R is
decreased, the slope G increases, and the equilibrium points P and Pþ move toward the origin. Compare
also the positions of Pþ in Figures 14.22a and 14.23a.
14.2.6.2 Outer Limit Cycle

No physical system can have unbounded trajectories. In particular, any physical realization of a Chua
diode is eventually passive, meaning simply that for a large enough voltage across its terminals, the
instantaneous power PR(t) [ ¼ VR(t)IR(t)] consumed by the device is positive.
Hence, the DP characteristic of a real Chua diode must include at least two outer segments with
positive slopes which return the characteristic to the first and third quadrants (see Figure 14.28b). From a
practical point of view, as long as the voltages and currents on the attractor are restricted to the negative
resistance region of the characteristic, these outer segments will not affect the circuit’s behavior.
The DP characteristic of the op-amp-based Chua diode differs from the desired piecewise-linear
characteristic depicted in Figure 14.28a in that it has five segments, the outer two of which have positive
slopes Gc ¼ 1=R5 ¼ 1=220 S.
The ‘‘unbounded’’ trajectories that follow the boundary crisis in the ideal three-region system are
limited in amplitude by these dissipative outer segments and a large limit cycle results, as illustrated in
Figure 14.27i. This effect could, of course, be simulated by using a five-segment DP characteristic for NR
as illustrated in Figure 14.28b.
The parameter value at which the double-scroll Chua’s attractor disappears and the outer limit cycle
appears is different from that at which the outer limit cycle disappears and the chaotic attractor
reappears. This ‘‘hysteresis’’ in parameter space is the characteristic of a blue sky catastrophe.
14.2.7 Simulation of Chua’s Circuit

Our experimental observations and qualitative descriptive description of the global dynamics of
Chua’s circuit may be confirmed by simulation using a general purpose ODE solver such as MATLAB1
[22] or by employing a customized simulator such as ‘‘ABCþþ’’ [23].
(a) (b) (c)
(d) (e) (f)
(g) (h) (i)
FIGURE 14.27 Typical experimental bifurcation sequence in Chua’s circuit (component values as in Table 14.2)
recorded using a digital storage oscilloscope. Horizontal axis V2 (a)–(h) 200 mV=div, (i) 2 V=div; vertical axis V1
(a)–(h) 1 V=div, (i) 2 V=div. (a) R ¼ 1.83 kV, period–one; (b) R ¼ 1.82 kV, period-two; (c) R ¼ 1.81 kV, period-four;
(d) R ¼ 1.80 kV, spiral Chua’s attractor; (e) R ¼ 1.797 kV, period-three window; (f) R ¼ 1.76 kV, spiral Chua’s
attractor; (g) R ¼ 1.73 kV, double-scroll Chua’s attractor; (h) R ¼ 1.52 kV, double-scroll Chua’s attractor; (i)
R ¼ 1.42 kV, large limit cycle corresponding to the outer segments of the Chua diode’s DP characteristic. (From
Kennedy, M.P., IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 40, 669, Oct. 1993. With permission.)
For electrical engineers who are familiar with the SPICE circuit simulator but perhaps not with chaos,
we present a net-list and simulation results for a robust op-amp-based implementation of Chua’s circuit.
The AD712 op-amps in this realization of the circuit are modeled using Analog Devices’ AD712
macromodel. The TOKO 10RB inductor has a nonzero series resistance that we have included in the
IR IR
Gb Gb
Gc
Ga –E´ Ga Esat
–E E VR –Esat –E E E´ VR
Gb Gb
Gc
(a) (b)
FIGURE 14.28 (a) Required three-segment piecewise-linear DP characteristic for the Chua diode in Figure 14.17.
(b) Every physically realizable nonlinear resistor NR is eventually passive—the outermost segments (while not
necessarily linear as presented here) must lie completely within the first and third quadrants of the VR IR place
for sufficiently large jVRj and jIRj.
SPICE net-list; a typical value of RO for this inductor is 12.5 V. Node numbers are as Figure 14.25: the
power rails are 111 and 222; 10 is the ‘‘internal’’ node of the physical inductor, where its series inductance
is connected to its series resistance.
A double-scroll Chua’s attractor results from a PSPICE simulation using the input deck shown in
Figure 14.29; this attractor is plotted in Figure 14.30.
14.2.8 Dimensionless Coordinates and the a–b Parameter-Space Diagram

Thus far, we have discussed Chua’s circuit equations in terms of seven parameters: L, C2, G, C1, E, Ga, and
Gb. We can reduce the number of parameters by normalizing the nonlinear resistor such that its
breakpoints are at 1 V instead of E V. Furthermore, we may write Chua’s circuit Equation 14.12 in
normalized dimensionless form by making the following change of variables: X1 ¼ V1=E, X2 ¼ V2=E,
X3 ¼ I3=(EG), and t ¼ tG=C2. The resulting state equations are
dX1
¼ a[X2 X1 f (X1 )]
dt
dX2
¼ X1 X2 þ X3 (14:15)
dt
dX3
¼ bX2
dt
where a ¼ C2=C1, b ¼ C2=(LG2), and f(X) ¼ bX þ 1=2(a b)(jX þ 1j jX 1j); a ¼ Ga=G and b ¼ Gb=G.
Thus, each set of seven circuit parameters has an equivalent set of four normalized dimensionless
parameters {a, b, a, b}. If we fix the values of a and b (which correspond to the slopes Ga and Gb of
the Chua diode), we can summarize the steady-state dynamical behavior of Chua’s circuit by means of a
two-dimensional parameter-space diagram.
Figure 14.31 presents the (a, b) parameter-space diagram with a ¼ 8=7 and b ¼ 5=7. In this diagram,
each region denotes a particular type of steady-state behavior: for example, an equilibrium point, period-
one orbit, period-two, spiral Chua’s attractor, double-scroll Chua’s attractor. Typical state-space behaviors
are shown in the insets. For clarity, we show chaotic regions in a single shade; it should be noted that these
chaotic regions are further partitioned by periodic windows and ‘‘islands’’ of periodic behavior.
To interpret the a–b diagram, imagine fixing the value of b ¼ C2=(LG2) and increasing a ¼ C2=C1
from a positive value to the left of the curve labeled ‘‘Hopf at P ’’; experimentally, this corresponds to
fixing the parameters L, C2, G, E, Ga, and Gb, and reducing the value of C1—this is called a ‘‘C1 bifurcation
sequence.’’
ROBUST OP-AMP REALIZATION OF CHUA’S CIRCUIT
V+ 111 0 DC 9
V– 0 222 DC 9
L 1 10 0.018
R0 10 0 12.5
R 1 2 1770
C2 1 0 100.0N
C1 2 0 10.0N
XA1 2 4 111 222 3 AD712
R1 2 3 220
R2 3 4 220
R3 4 0 2200
XA2 2 6 111 222 5 AD712
R4 2 5 22000
R5 5 6 22000
R6 6 0 3300
* AD712 SPICE Macro-model 1/91, Rev. A

* Copyright 1991 by Analog Devices, Inc. (reproduced with permission)
*
.SUBCKT AD 712 13 15 21 16 14
*
VOS 15 8 DC 0
EC 9 0 14 0 1
C1 6 7 .5P
RP 16 12 12K
GB 11 0 3 0 1.67K
RD1 6 16 16k
RD2 7 16 16k
ISS 12 1 DC 100U
CCI 3 11 150P
GCM 0 3 0 1 1.76N
GA 3 0 7 6 2.3M
RE 1 0 2.5MEG
RGM 3 0 1.69K
VC 12 2 DC 2.8
VE 10 16 DC 2.8
RO1 11 14 25
CE 1 0 2P
RO2 0 11 30
RS1 1 4 5.77K
RS2 1 5 5.77K
J1 6 13 4 FET
J2 7 8 5 FET
DC 14 2 DIODE
DE 10 14 DIODE
DP 16 12 DIODE
D1 9 11 DIODE
D2 11 9 DIODE
IOS 15 13 5E-12
.MODEL DIODE D
.MODEL FET PJF(VTO = –1 BETA = 1M IS = 25E–12)
.ENDS
.IC V(2) = 0.1 V(1) = 0

.TRAN 0.01MS 100MS 50MS
.OPTIONS RELTOL = 1.0E–4 ABSTOL = 1.0E–4
.PRINT TRAN V(2) V(1)
.END
FIGURE 14.29 SPICE deck to simulate the transient response of the dual op-amp implementation of Chua’s
circuit. Node numbers are as in Figure 14.25. The op-amps are modeled using the Analog Devices AD712 macro-
model. R0 models the series resistance of the real inductor L.
Initially, the steady-state solution is an equilibrium point. As the value of C1 is reduced, the circuit
undergoes a Hopf bifurcation when a crosses the ‘‘Hopf at P ’’ curve. Decreasing C1 still further,
the steady-state behavior bifurcates from period-one to period-two to period-four and so on to
chaos, periodic windows, and a double-scroll Chua’s attractor. The right-hand side edge of the chaotic
region is delimited by a curve corresponding to the boundary crisis and ‘‘death’’ of the attractor.
4.0 V
2.0 V
0V
–2.0 V
–4.0 V
–800 mV –600 mV –400 mV –200 mV 0V 200 mV 400 mV 600 mV 800 mV
FIGURE 14.30 PSPICE (evaluation version 5.4, July 1993) simulation of Figure 14.25 using the input deck from
Figure 14.29 yields this double-scroll Chua’s attractor. Horizontal axis V2 (V) and vertical axis V1 (V).
35
A B C
l
ira
p+ p+ p+
ow
0 0 0
Sp
d2
ind
p– p– p–
f at ±
rio
p
W
Pe
30 1 2 3
Hop
th
Bir
D E
p+ 0 p+ 0
p– p–
25 4 5
F G
p+ 0 p+ 0
p– p– er
o
ath
et
De
20 H
6 7
o
om
H
H
β
p+ 0
p– 1 2 3 7 9
15
4 5 6 8 1011
7
10 I J
+
p+ 0 p– p 0
p–
8 9
5 K L
p+ 0 p+ 0
p– p–
10 11
0
0 5 10 15
α
FIGURE 14.31 a–b parameter space diagram for the normalized dimensionless Chua’s circuit Equation 14.31 with
a ¼ 8=7 and b ¼ 5=7. (From Kennedy, M.P., IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 40, 673, Oct. 1993.
With permission.)
Beyond this curve, trajectories diverge toward infinity. Because of eventual passivity in a real circuit,
these divergent trajectories will of course converge to a limit cycle in any physical implementation of
Chua’s circuit.
14.3 Chua’s Oscillator

Chua’s oscillator [5] (see Figure 14.26) is derived from Chua’s circuit by adding a resistor R0 in series
with the inductor L. The oscillator contains a linear inductor, two linear resistors, two linear capacitors,
and a single Chua diode NR. NR is a voltage-controlled piecewise-linear resistor whose continuous odd-
symmetric three-segment DP characteristic (see Figure 14.18) is described explicitly by the relationship
1
IR ¼ Gb VR þ (Ga Gb )(jVR þ Ej jVR Ej)
2
The primary motivation for studying this circuit is that the vector field of Chua’s oscillator is topologic-
ally conjugate to the vector field of a large class of three-dimensional, piecewise-linear vector fields. In
particular, the oscillator can exhibit every dynamical behavior known to be possible in an autonomous
three-dimensional, continuous-time dynamical system described by a continuous odd-symmetric three-
region piecewise-linear vector field. With appropriate choices of component values, the circuit follows the
period-doubling, intermittency, and quasiperiodic routes to chaos.
14.3.1 State Equations

Choosing V1, V2, V, and I3 as state variables, Chua’s oscillator may be described by three ODEs:
dV1 G 1
¼ (V2 V1 ) f (V1 )
dt C1 C1
dV2 G 1
¼ (V1 V2 ) þ I3
dt C2 C2
dI3 1 R0
¼ V 2 I3
dt L L
where
G ¼ 1=R
f (VR) ¼ GbVR þ 1=2 (Ga Gb) (jVR þ Ej jVR Ej)
The vector field is parameterized by eight constants: L, C2, G, C1, R0, E, Ga, and Gb. We can reduce the
number of parameters by normalizing the nonlinear resistor such that its breakpoints are at 1 V instead
of EV, scaling the state variables, and scaling time.
By making the following change of variables: X1 ¼ V1=E, X2 ¼ V2=E, X3 ¼ I3=(EG), t ¼ tjG=C2j, and
k ¼ sgn(G=C2),* we can rewrite the state Equations 14.16 in normalized dimensionless form:
dX1
¼ ka[X2 X1 f (X1 )]
dt
dX2
¼ k(X1 X2 þ X3 )
dt
dX3
¼ k(bX2 þ gX3 )
dt
* The signum function is defined by sgn(x) ¼ x if x > 0, sgn(x) ¼ x if x < 0, and sgn(0) ¼ 0.
where a ¼ C2=C1, b ¼ C2=(LG2), g ¼ R0C2=(LG), and f(x) ¼ bX þ 1=2(a b)(jX þ 1jjX1j) with
a ¼ Ga=G and b ¼ Gb=G. Thus, each set of eight circuit parameters has an equivalent set of six normalized
dimensionless parameters {a, b, g, a, b, k}.
14.3.2 Topological Conjugacy

Two vector fields F and F0 are topologically conjugate if there exists a continuous map h (which has a
continuous inverse) such that h maps trajectories of F into trajectories of F0 , preserving time orientation
and parametrization of time. If ft and f0t are the flows of F and F0 , respectively, then ft h ¼ h f0t for
all t. This means that the dynamics of F and F0 are qualitatively the same. If h is linear, then F and F0 are
said to be linearly conjugate.
14.3.2.1 Class #
The three-dimensional, autonomous, continuous-time dynamical system defined by the state equation
X_ ¼ F(X), X 2 R3
is said to belong to class # iff

1. F: R3 ! R3 is continuous
2. F is odd-symmetric, i.e., F(X) ¼ F(X)
3. R3 is partitioned by two parallel boundary planes U1 and U1 into an inner region D0, which
contains the origin, and two outer regions D1 and D1, and F is affine in each region.
Without loss of generality, the boundary planes and the regions they separate can be chosen as follows:
D1 ¼ {X: X1 1}

U1 ¼ {X: X1 ¼ 1}
D0 ¼ {X: jX1 j 1}
U1 ¼ {X: X1 ¼ 1}
D1 ¼ {X: X1
1}
Any vector field in the family # can then be written in the form
8
< A1 X b X1 1
X_ ¼ A0 X 1 X1 1
:
A1 X þ b X1
1
where
2 3 2 3
a11 a12 a13 b1
A1 ¼ A1 ¼ 4 a21 a22 a23 5 and b ¼ 4 b2 5
a31 a32 a33 b3
By continuity of the vector field across the boundary planes,

2 3
(a11 þ b1 ) a12 a13
6 7
A0 ¼ 4 (a21 þ b2 ) a22 a23 5
(a31 þ b3 ) a32 a33
14.3.2.2 Equivalent Eigenvalue Parameters

Let (m1, m2, m3) denote the eigenvalues associated with the linear vector field in the D0 region and
let (n1, n2, n3) denote the eigenvalues associated with the affine vector fields in the outer regions D1 and
D1. Define
9
p1 ¼ m1 þ m2 þ m3 >
>
>
p2 ¼ m1 m2 þ m2 m3 þ m3 m1 >>
>
>
>
>
p3 ¼ m1 m2 m3 >
>
=
(14:16)
>
>
q1 ¼ v1 þ v2 þ v3 >
>
>
>
>
>
q2 ¼ v1 v2 þ v2 v3 þ v3 v1 >
>
>
;
q3 ¼ v1 v2 v3
Because the six parameters {p1, p2, p3, q1, q2, q3} are uniquely determined by the eigenvalues {m1, m2, m3,
n1, n2, n3} and vice versa, the former are called the equivalent eigenvalue parameters. Note that the
equivalent eigenvalues are real; they are simply the coefficients of the characteristic polynomials:
(s m1 )(s m2 )(s m3 ) ¼ s3 p1 s2 þ p2 s p3
(s n1 )(s n2 )(s n3 ) ¼ s3 q1 s2 þ q2 s q3
THEOREM 14.3 (Chua et al.) [5]
Let {m1, m2, m3, n1, n2, n3} be the eigenvalues associated with a vector field F(X) 2 #=%0 , where %0 is the set
of measure zero in the space of equivalent eigenvalue parameters where one of the five conditions in
Equation 14.17 is satisfied. Then, Chua’s oscillator with parameters defined by Equations 14.18 and 14.19
is linearly conjugate to this vector field.
9
p 1 q1 ¼ 0 >
>
>
>
>
>
p3 q3 p2 q2 p2 q2 >
>
p2 p1 ¼ 0>>
p1 q1 p1 q1 p1 q1 >
>
>
>
>
>
p 2 q2 k1 >
>
¼ 0> >
=
p 1 q1 k2
(14:17)
p3 q3 >
>
k1 k3 þ k2 ¼ 0>>
p1 q1 >
>
>
>
2 3 >
>
1 0 0 >
>
>
>
6 7 >
det K ¼ det4 a11 a12 a13 5 ¼ a12 k33 a13 k32 ¼ 0 > >
>
>
>
;
K31 K32 K33
where
X
3
K3i ¼ a1j aji , i ¼ 1, 2, 3
j¼i
We denote by # ~ are linearly conjugate if they have

~ the set of vector fields #=%0 . Two vector fields in #
the same eigenvalues in each region.
14.3.3 Eigenvalues-to-Parameters Mapping Algorithm for Chua’s Oscillator

Every continuous, third-order, odd-symmetric, three-region, piecewise-linear vector field F0 in # may be
mapped onto a Chua’s oscillator (where the vector field F is topologically conjugate to F0 ) by means of the
following algorithm [5]:
1. Calculate the eigenvalues (m01 , m02 , m03 ) and (v10 , v20 , v30 ) associated with the linear and affine regions,
respectively, of the vector field F0 of the circuit or system whose attractor is to be reproduced (up to
linear conjugacy) by Chua’s oscillator.
2. Find a set of circuit parameters {C1, C2, L, R, R0, Ga, Gb, E} (or dimensionless parameters {a, b, g, a,
b, k}) so that the resulting eigenvalues mj and vj for Chua’s oscillator satisfy mj ¼ m0j and
v ¼ vj0 , j ¼ 1, 2, 3.
Let {p1, p2, p3, q1, q2, q3} be the equivalent eigenvalue parameters defined by Equation 14.16. Further-
more, let
9
p3 q3 p2 q2 >
>
k1 ¼ p3 þ p1 >
>
p1 q1 p1 q1 >
>
>
>
>
>
p3 q3 p2 q2 p2 q2 >
>
k2 ¼ p2 p1 >
>
p1 q1 p1 q1 p1 q1 =
>
(14:18)
p2 q2 k1 >
>
k3 ¼ >
>
p1 q1 k2 >
>
>
>
>
>
p3 q3 >
>
k4 ¼ k1 k3 þ k2 >
;
p1 q1
The corresponding circuit parameters are given by
9
C1 ¼ 1 >
>
>
>
>
>
k2 >
>
C2 ¼ >
>
k23 >
>
>
>
>
>
k23 >
>
L¼ >
>
k4 >
>
>
>
>
>
k3 =
R¼
k2 (14:19)
>
>
k1 k23 >
>
>
>
R0 ¼ >
>
k2 k4 >
>
>
>
p2 q2 k2 >
>
>
Ga ¼ p1 þ þ > >
p1 q1 k3 >
>
>
>
>
p2 q2 k2 >
>
>
Gb ¼ q1 þ þ > ;
p1 q1 k3
The breakpoint E of the piecewise-linear Chua diode can be chosen arbitrarily because the choice of E
does not affect either the eigenvalues or the dynamics; it simply scales the circuit variables. In a practical
realization of the circuit, one should scale the voltages and currents so that they lie within the inner three
segments of the nonlinear resistor NR.
The dimensionless parameters can be calculated as follows:
9
a¼
k2 >
>
>
>
k23 >
>
>
>
>
>
b¼
k4 >
>
>
>
k2 k23 >
>
>
>
>
>
k1 >
=
g¼
k2 k3 (14:20)
>
k3 p2 q2 >
>
>
a ¼ 1 þ p1 >
>
k2 p1 q1 >
>
>
>
>
k3 p2 q2 >
>
>
>
b ¼ 1 þ q1 >
k2 p1 q1 >
>
>
>
>
;
k ¼ sgn(k3 )
Example: Torus
Figure 14.32 shows a practical implementation of Chua’s oscillator that exhibits a transition to chaos by
torus breakdown. A complete list of components is given in Table 14.3.
A SPICE simulation of this circuit produces a quasiperiodic voltage n(2) ( ¼ V1), as expected (see
Figure 14.33). The resistor R0 is not explicitly added to the circuit, but models the dc resistance of the
inductor.
R IR
1 6
+ – 0
+ R6 A2 R5 + +
R1
V+ V–
R2
5 4
L V2 C1 VR V+
C2 V1 R4 –
A1 3
+
I3 V–
– – –
2 R3
NR
FIGURE 14.32 Practical implementation of Chua’s oscillator using an op-amp and four resistors to realize the
Chua diode. (From Kennedy, M.P., IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 40, 640, 657, Oct. 1993. With
permission.) The negative resistor G is realized by means of a negative resistance converter (A2, R5, R6, and positive
resistor R). If R2 ¼ R3 and R5 ¼ R6, and Ga ¼ 1=R4 1=R1, Gb ¼ 1=R4 þ 1=R2, and G ¼ 1=R. Component values are
listed in Table 14.3.
TABLE 14.3 Component List for the Chua Oscillator in Figure 14.32
Element Description Value Tolerance (%)
A1 (12
Op-amp AD712, TL082, — —
or equivalent)
A2 Op-amp (12 AD712, TL082, — —
or equivalent)
R1 1
4
W resistor 6.8 kV 5
R2 1
R3 1
4W resistor 47 kV 5
R4 Potentiometer 2 kV —
R5 W resistor 220 V 5
R6 1
4W resistor 220 V 5
R Potentiometer 2 kV —
L Inductor(TOKO-type 10 RB, 18 mH 10
or equivalent)
2.0 V
0V
–2.0 V
–4.0 V
–6.0 V
50 ms 60 ms 70 ms 80 ms 90 ms 100 ms
FIGURE 14.33 PSPICE simulation (.TRAN 0.01 ms 100 ms 50 ms) of Figure 14.32 with initial conditions .IC V(2) ¼ 0.1
V(1) ¼ 0.1 and tolerances .OPTIONS RELTOL ¼ 1 E 4 ABSTOL ¼ 1 E 4 yields this quasiperiodic voltage waveform at
node 2.
14.4 van der Pol Neon Bulb Oscillator

i
In a paper titled ‘‘Frequency demultiplication,’’ the eminent R
Dutch electrical engineer Balthazar van der Pol described an Ne
experiment in which, by tuning the capacitor in a neon
bulb RC relaxation oscillator driven by a sinusoidal voltage
source (see Figure 14.34), ‘‘currents and voltages appear in E Es +
_ C
the system which are whole submultiples of the driving
frequency’’ [11].
The circuit consists of a high-voltage dc source E attached Rs
via a large series resistance R to a neon bulb and capacitor C
that are connected in parallel; this forms the basic relaxation
oscillator. Initially, the capacitor is discharged and the neon
bulb is nonconducting. The dc source charges C with FIGURE 14.34 Sinusoidally driven neon
time constant RC until the voltage across the neon bulb is bulb relaxation oscillator. Ne is the neon bulb.
14
12
10
System period/T
0
0 4 8 12 16 20 24 28
C (nF)
FIGURE 14.35 Normalized current pulse pattern repetition rate versus C for the sinusoidally driven neon
relaxation oscillator in Figure 14.34, showing a coarse staircase structure of mode-lockings. (From Kennedy, M.P.
and Chua, L.O., IEEE Trans. Circuits Syst., CAS-33, 975, Oct. 1986. With permission.)
sufficient to turn it on. Once lit, the bulb presents a shunt low resistance path to the capacitor. The
voltage across the capacitor falls exponentially until the neon arc is quenched, the bulb is returned to its
‘‘off’’ state, and the cycle repeats.
A sinusoidal voltage source Es ¼ E0 sin(2p fst) is inserted in series with the neon bulb. Its effect is to
perturb the ‘‘on’’ and ‘‘off’’ switching thresholds of the capacitor voltage.
Experimental results for this circuit are summarized in Figure 14.35, where the ratio of the system
period (time interval before the pattern of current pulses repeats itself) to the period T of the forcing is
plotted versus the capacitance C.
van der Pol noted that as the capacitance was increased from that value (C0) for which the
natural frequency f0 of the undriven relaxation oscillator equaled that of the sinusoidal source (system
period=T ¼ 1), the system frequency made ‘‘discrete jumps from one whole submultiple of the driving
frequency to the next’’ (detected by means of ‘‘a telephone coupled loosely in some way to the system’’).
van der Pol noted that ‘‘often an irregular noise is heard in the telephone receiver before the frequency
jumps to the next lower value’’; van der Pol had observed chaos. Interested primarily in frequency
demultiplication, he dismissed the ‘‘noise’’ as ‘‘a subsidiary phenomenon.’’
Typical current waveforms, detected by means of a small current-sensing resistor Rs placed in series
with the bulb are shown in Figure 14.36. These consist of a series of sharp spikes, corresponding to
the periodic firing of the bulb. Figure 14.36c shows a nonperiodic ‘‘noisy’’ signal of the type noticed by
van der Pol.
The frequency locking behavior of the driven neon bulb oscillator circuit is characteristic of forced
oscillators that contain two competing frequencies: the natural frequency f0 of the undriven oscillator and
the driving frequency fs. If the amplitude of the forcing is small, either quasiperiodicity or mode-locking
occurs. For a sufficiently large amplitude of the forcing, the system may exhibit chaos.
800 800
600 600
i (μA)
i (μA)
400 400
200 200
0 0
20.0 21.0 22.0 23.0 24.0 20.0 21.0 22.0 23.0 24.0
t (ms) t (ms)
(a) T (b) 2T
800
600
i (μA)
400
200
0
80 100 120 140 160
t (ms)
(c)
FIGURE 14.36 Periodic and chaotic neon bulb current waveforms. (a) One current pulse per cycle of Es: fs=fd ¼ 1=1;
(b) one current pulse every two cycles of Es: fs=fd ¼ 2=1; (c) ‘‘noisy’’ current waveform.
14.4.1 Winding Numbers

Subharmonic frequency locking in a forced oscillator containing two competing frequencies f1 and f2 may
be understood in terms of a winding number. The concept of a winding number was introduced by
Poincaré to describe periodic and quasiperiodic trajectories on a torus.
A trajectory on a torus that winds around the minor axis of the torus with frequency f1 revolutions
per second, and completes revolutions of the major axis with frequency f2, may be parametrized by two
angular coordinates u1 f1t and u2 f2t, as illustrated in Figure 14.37 [6]. The angles of rotation u1 and
u2 about the major and minor axes of the torus are normalized so that one revolution corresponds to a
change in u of 1.
A Poincaré map for this system can be defined by sampling the state u1 with period t ¼ 1=f2.
Let uk ¼ u1(kt). The Poincaré map has the form
ukþ1 ¼ G(uk ), k ¼ 0, 1, 2, . . .
Σ θk
θ1
G(θk)
θ2
FIGURE 14.37 A trajectory on a torus is characterized by two normalized angular coordinates. u1 ¼ f1t is the angle
of rotation about the minor axis of the torus, while u2 ¼ f2t is the angle of rotation along the major axis, where f1 and
f2 are the frequencies of rotation about the corresponding axes. A Poincaré map ukþ1 ¼ G(uk) is defined by sampling
the trajectory with frequency 1=f2. The winding number w counts the average number of revolutions in the Poincaré
section per iteration of the map.
If f1=f2 ¼ p=q is rational, then the trajectory is periodic, closing on itself after completing q revolutions
about the major axis of the torus. In this case, we say that the system is periodic with period q and
completes p cycles per period. If the ratio p=q is irrational then the system is quasiperiodic; a trajectory
covers the surface of the torus, coming arbitrarily close to every point on it, but does not close on itself.
The winding number w is defined by
G(k) (u0 )
w ¼ lim
k!1 k
where G(k) denotes the k-fold iterate of G and u0 is the initial state.
The winding number counts the average number of revolutions in the Poincaré section per iteration.
Equivalently, w equals the average number of turns about the minor axis per revolution about the major
axis of the torus.* Periodic orbits possess rational winding numbers and are called resonant; quasiper-
iodic trajectories have irrational winding numbers.
14.4.2 Circle Map

A popular paradigm for explaining the behavior of coupled nonlinear oscillators with two competing
frequencies is the circle map:

K
ukþ1 ¼ uk þ sin(2puk ) þ V mod 1, k ¼ 0, 1, 2, . . . (14:21)
2p
so-called because it maps the circle into itself. The sinusoidal term represents the amplitude of
the forcing, and V is the ratio of the natural frequency of the unperturbed system and the forcing
frequency [18].
When K 0, the steady state of the discrete-time dynamical system (Equation 14.22) is either periodic
or quasiperiodic, depending on whether V is rational or irrational.
* Either frequency may be chosen to correspond to the major axis of the torus, so the winding number and its reciprocal are
equivalent.
If the amplitude K of the forcing is nonzero but less than unity, the steady-state is q-periodic
when V ¼ p=q is rational. In this case, a nonzero mode-locked window [Vmin(w), Vmax(w)] occurs,
over which w ¼ p=q. A mode-locked region is delimited by saddle-node bifurcations at Vmin(w) and
Vmax(w) [18].
The function w(V) in Figure 14.38 is monotone increasing and forms a Devil’s staircase with plateaus
at every rational value of w—for example, the step with winding number 1=2 is centered at V ¼ 0.5. An
experimental Devil’s staircase for the driven neon bulb circuit, with low-amplitude forcing, is shown in
Figure 14.39.
As the amplitude k is increased, the width of each locked interval in the circle map increases so that
mode-locking becomes more common and quasiperiodicity occurs over smaller ranges of driving
frequencies. The corresponding (K, V) parameter space diagram (see Figure 14.40) consists of a
series of distorted triangles, known as Arnold Tongues, with apexes that converge to rational values of
V at K ¼ 0.
Within a tongue, the winding number is constant, yielding one step of the Devil’s staircase.
The winding numbers of adjacent tongues are related by a Farey tree structure. Given two periodic
windows with winding number w1 ¼ p=q and w2 ¼ r=s, another periodic window with winding number
w ¼ (ap þ br)=(aq þ bs) can always be found, where p, q, r, and s are relatively prime and a and b are
strictly positive integers. Furthermore, the widest mode-locked window between w1 and w2 has winding
number (p þ r)=(q þ s). For example, the widest step between those with winding numbers 1=2 and 2=3 in
Figure 14.38 has w ¼ 3=5.
The sum of the widths of the mode-locked states increases monotonically from zero at K ¼ 1 to unity
at K ¼ 1. Below the critical line K ¼ 1, the tongues bend away from each other and do not overlap. At
K ¼ 1, tongues begin to overlap, a kink appears in the Poincaré section and the Poincaré map develops a
horseshoe; this produces coexisting attractors and chaos.
The transition to chaos as K is increased through K ¼ 1 may be by a period-doubling cascade within a
tongue, intermittency, or directly from a quasiperiodic trajectory by the abrupt disappearance of
that trajectory (a blue sky catastrophe). This qualitative behavior is observed in van der Pol’s neon
bulb circuit.
1.0
3
0.8 2 4
3 3
0.6 1 5
2 2 3
0.24
1 5 2 13
0.4
1 3 3 9
4 0.22 14
0.2 1
5
0.25 0.26 0.27
0.0
0.0 0.2 0.4 0.6 0.8 1.0
Ω
FIGURE 14.38 Devil’s staircase for the circle map with K ¼ 1. The steps indicate the regions in which w is constant.
The staircase is self-similar in the sense that its structure is reproduced qualitatively at smaller scales (see inset).
(From Glazier, J.A. and Libchaber, A., IEEE Trans. Circuits Syst., 35, 793, July 1988. With permission.)
Forced neon bulb circuit
3.00
2.80
2.60
2.40
2.20
fs/fd
2.00
1.80
1.60
1.40
1.20
1.00
1.00 1.50 2.00 2.50
fs (kHz)
FIGURE 14.39 Experimentally measured staircase structure of lockings for a forced neon bulb relaxation oscillator.
The winding number is given by fs=fd, the ratio of the frequency of the sinusoidal driving signal to the average
frequency of current pulses through the bulb. (From Kennedy, M.P., Krieg, K.R., and Chua, L.O., IEEE Trans. Circuits
Syst., 36, 1137, Aug. 1989. With permission.)
1.50
1.25
1 1 1 2 1 3 2 3 4
5 4 3 5 2 5 3 4 5
1.0
k
0.75
0.50
0.25
0.0
0.0 0.2 0.4 0.6 0.8 1.0
Ω
FIGURE 14.40 Parameter space diagram for the circle map showing Arnold tongue structure of lockings in the K–V
plane. The relative widths of the tongues decrease as the denominator of the winding number increases. Below the
critical line K ¼ 1, the tongues bend away from each other and do not overlap; for K > 1, the Poincaré map develops
a fold and chaos can occur. (From Glazier, J.A. and Libchaber, A., IEEE Trans. Circuits Syst., 35, 793, July 1988.
With permission.)
14.4.3 Experimental Observations of Mode-Locking and Chaos

in van der Pol’s Neon Bulb Circuit
With the signal source Es zeroed, the natural frequency of the undriven relaxation oscillator is set to
1 kHz by tuning capacitance C to C0. A sinusoidal signal with frequency 1 kHz and amplitude E0 is
applied as shown in Figure 14.34. The resulting frequency of the current pulses (detected by measuring
the voltage across Rs) is recorded with C as the bifurcation parameter.
14.4.3.1 C Bifurcation Sequence

If a fixed large-amplitude forcing Es is applied and C is increased slowly, the system at first continues to
oscillate at 1 kHz (Figure 14.36a) over a range of C, until the frequency ‘‘suddenly’’ drops to 1000=2 Hz
(Figure 14.36b), stays at that value over an additional range of capacitance, drops to 1000=3 Hz, then
1000=4, 1000=5, and so on as far as 1000=20 Hz. These results are summarized in Figure 14.35.
Between each two submultiples of the oscillator driving frequency, a further rich structure of
submultiples is found. At the macroscopic level (the coarse structure examined by van der Pol) increasing
the value of C causes the system periods to step from T (1 ms) to 2T, 3T, 4T, . . . , where the range of C for
which the period is fixed is much greater than that over which the transitions occur (Figure 14.35).
Examining the shaded transition regions more closely, one finds that between any two ‘‘macroscopic’’
regions where the period is fixed at (n 1)T and nT (n > 1), respectively, there lies a narrower region
over which the system oscillates with stable period (2n 1)T. Further, between (n 1)T and (2n 1)T,
one finds a region of C for which the period is (3n 2)T, and between (2n 1)T and nT, a region with
period (3n 1)T. Indeed, between any two stable regions with periods (n 1)T and nT, respectively, a
region with period (2n 1)T can be found. Figure 14.41 depicts an enlargement of the C axis in the
region of the T to 2T macrotransition, showing the finer period-adding structure.
Between T and 2T is a region with stable period 3T. Between this and 2T, regions of periods 5T, 7T,
9T, . . . , 25T are detected. Current waveforms corresponding to period-three and period-five steps, with
winding numbers 3=2 and 5=3, respectively, are shown in Figure 14.42.
26
24
22
20
18
System period/T
16
14
12
10
8
6
4
2
0
0 C0 2.0 2.5 3.0 3.5
C (nF)
FIGURE 14.41 Experimental pulse pattern repetition rate versus C for van der Pol’s forced neon bulb oscillator,
showing fine period-adding structure. (From Kennedy, M.P. and Chua, L.O., IEEE Trans. Circuits Syst., CAS-33, 975,
Oct. 1986. With permission.)
800 800
600 600
i (μA)
i (μA)
400 400
200 200
0 0
20.0 22.0 24.0 26.0 28.0 20.0 22.0 24.0 26.0 28.0
t (ms) t (ms)
3T 5T
(a) (b)
FIGURE 14.42 Neon bulb current waveforms. (a) Two pulses every three cycles of fs: fs=fd ¼ 3=2; (b) three pulses
every five cycles fs=fd ¼ 5=3.
A region of period 4T lies between T and 3T, with steps 7T, 10T, 13T, . . . , 25T between that and 3T.
In practice, it becomes difficult to observe cycles with longer periods because stochastic noise in the
experimental circuit can throw the solution out of the narrow window of existence of a high period orbit.
14.4.3.2 Experimental fs Bifurcation Sequence with Low-Amplitude Forcing

An experimental Devil’s staircase may be plotted for this circuit by fixing the parameters of the relaxation
oscillator and the amplitude of the sinusoidal forcing signal, and choosing the forcing frequency fs as the
bifurcation parameter. The quantity fs=fd is the equivalent winding number in this case, where fd is the
average frequency of the current pulses through the neon bulb.
Experimental results for the neon bulb circuit with low-amplitude forcing are presented in Figures
14.39 and 14.43. The monotone staircase of lockings is consistent with a forcing signal of small
amplitude. Note that the staircase is self-similar in the sense that its structure is reproduced qualitatively
at smaller scales of the bifurcation parameter. If the amplitude of the forcing is increased, the onset of
chaos is indicated by a nonmonotonicity in the staircase.
14.4.4 Circuit Model

The experimental behavior of van der Pol’s sinusoidally driven neon bulb circuit may be reproduced in
simulation by an equivalent circuit (see Figure 14.44) in which the only nonlinear element (the neon
bulb) is modeled by a nonmonotone current-controlled resistor with a series parasitic inductor Lp.
The corresponding state equations are
dVC 1 1 E
¼ VC IL þ
dt RC C RC
dIL 1 Rs f (IL ) E0 sin(2pfs t)
¼ VC IL
dt Lp Lp Lp Lp
where V ¼ f(I) is the DP characteristic of the current-controlled resistor (see Figure 14.45).
Forced neon bulb circuit Forced neon bulb circuit

3.00 2.85
2.90
2.80
2.80
2.70 2.75
2.60
2.70
fs/fd
2.50
fs/fd
2.40 2.65
2.30 2.60
2.20
2.55
2.10
2.00 2.40
2.40 2.50 2.60 2.70 2.56 2.58 2.60 2.62 2.64
fs (kHz) fs (kHz)
FIGURE 14.43 Magnification of Figure 14.39 showing self-similarity. (From Kennedy, M.P., Krieg, K.R., and Chua,
L.O., IEEE Trans. Circuits Syst., 36, 1137, Aug. 1989. With permission.)
iL
R
Lp
+ +
E VC C V = f(iL)
– –
+
Es
–
Rs
FIGURE 14.44 van der Pol’s neon bulb circuit—computer model. The bulb is modeled by a nonmonotonic
current-controlled nonlinear resistor with parasitic transit inductance Lp.
14.5 Synchronization of Chaotic Circuits

Chaotic steady-state solutions are characterized by sensitive dependence on initial conditions; trajectories
of two identical autonomous continuous-time dynamical systems started from slightly different initial
conditions quickly become uncorrelated. Surprisingly perhaps, it is nevertheless possible to synchronize
these systems in the sense that a trajectory of one asymptotically approaches that of the other. Two
trajectories X1(t) and X2(t) are said to synchronize if
300 300
250 250
200 200
i (μA)
i (μA)
150 150
100 100
50 50
0 0
0 50 60 70 80 0 50 60 70 80
(a) v (V) (b) v (V)
FIGURE 14.45 Neon bulb DP characteristics: (a) measured and (b) simulated. (From Kennedy, M.P. and Chua, L.
O., IEEE Trans. Circuits Syst., CAS-33, 976, Oct. 1986. With permission.)
lim kX1 (t) X2 (t)k ¼ 0

t!1
In this section, we describe two techniques for synchronizing chaotic trajectories.
14.5.1 Linear Mutual Coupling

The simplest technique for synchronizing two dynamical systems
X_ 1 ¼ F1 (X1 ), X1 (0) ¼ X10

X_ 2 ¼ F2 (X2 ), X2 (0) ¼ X20
is by linear mutual coupling of the form
X_ 1 ¼ F1 (X1 ) þ K(X2 X1 ), X1 (0) ¼ X10

(14:22)
X_ 2 ¼ F2 (X2 ) þ K(X2 X1 ), X2 (0) ¼ X20
where X1, X2 2 Rn and K ¼ diag (K11, K22, . . . , Knn)T.

Here, X1(t) is called the goal dynamics. The synchronization problem may be stated as follows:
find K such that
lim kX1 (t) X2 (t)k ¼ 0

t!1
that is, that the solution X2(t) synchronizes with the goal trajectory X1(t).
In general, it is difficult to prove that synchronization occurs, unless an appropriate

Lyapunov function* of the error system E(t) ¼ X1(t) X2(t) can be found. However, several examples
exist in the literature where mutually coupled chaotic systems synchronize over particular ranges of
parameters.
Example: Mutually Coupled Chua’s Circuits
Consider a linear mutual coupling of two Chua’s circuits. In dimensionless coordinates, the system under
consideration is
dX1
¼ a[X2 X1 f (X1 )] þ K11 (X4 X1 )
dt
dX2
¼ X1 X2 X3 þ K22 (X5 X2 )
dt
dX3
¼ by þ K33 (X6 X3 )
dt
dX4
¼ aðX5 X4 f (X4 )Þ þ K11 (X1 X4 )
dt
dX5
¼ X4 X5 X6 þ K22 (X2 X5 )
dt
dX6
¼ bX5 þ K33 (X3 X6 )
dt
Two mutually coupled Chua’s circuits characterized by a ¼ 10.0, b ¼ 14.87, a ¼ 1.27, and b ¼ 0.68 will
synchronize (the solutions of the two systems will approach each other asymptotically) for the following
matrices K:
X1 – coupling K11 > 0.5, K22 ¼ K33 ¼ 0
X2 – coupling K22 > 5.5, K11 ¼ K33 ¼ 0
X3 – coupling 0.7 < K33 < 2, K11 ¼ K22 ¼ 0
+ + + IR
L C2 VC2 VC1 C 1 VR NR
IL – – – RX
IŔ
+ + +
L C2 VĆ VĆ C1 VŔ NR

2 1
IĹ – – –
FIGURE 14.46 Synchronization of two Chua’s circuits by means of resistive coupling between VC1 and VC0 1 .
* For a comprehensive exposition of Lyapunov stability theory, see Ref. [19].

0.816 0.816
0.411 0.411
x[5]
x[2]
0.006 0.006
–0.400 –0.400
–0.805 –0.805
–3.662 –1.838 –0.015 1.808 3.632 –3.662 –1.838 –0.015 1.808 3.632
x[1] x[4]
0.816 5.577
0.411 2.802
x[5]
0.006
x[6]
0.026
–0.400 –2.750
–0.805 –5.525
–0.805 –0.400 0.006 0.411 0.816 –5.525 –2.750 0.026 2.802 5.577
x[2] x[3]
FIGURE 14.47 Simulation of the normalized dimensionless form of Figure 14.46, illustrating synchronization by
mutual coupling of state variables. Identify {x[1], x[2], x[3]} with {VC1 VC2 IL} and {x[4], x[5], x[6]} with {VC0 1 VC0 2 IL0 }
synchronizes with VC2 (t) and IL0 (t) synchronizes with IL(t). (From Chua, L.O., Itoh, M., Kočarev, L., and Eckert, K.,
J. Circuits Syst. Comput., 3, 1, 99, Mar. 1993. With permission.)
Coupling between states X1 and X4 may be realized experimentally by connecting a resistor between
the tops of the nonlinear resistors, as shown in Figure 14.46. States X2 and X5 may be coupled by
connecting the tops of capacitors C2 by means of a resistor.
A simulation of the system, which confirms synchronization of the two chaotic Chua’s circuits in the
case of linear mutual coupling between state VC1 and VC0 1 is presented in Figure 14.47.
14.5.2 Pecora–Carroll Drive-Response Concept

The drive-response synchronization scheme proposed by Pecora and Carroll applies to systems that are
drive-decomposable [16]. A dynamical system is called drive-decomposable if it can be partitioned into
two subsystems that are coupled so that the behavior of the second (called the response subsystem)
depends on that of the first, but the behavior of the first (called the drive subsystem) is independent of
that of the second.
To construct a drive-decomposable system, an n-dimensional autonomous continuous-time dynam-
ical system
X_ ¼ F(X), X(0) ¼ X0 (14:23)
where X ¼ (X1, X2, . . . , Xn)T and F(X) ¼ [F1(X), F2(X), . . . , Fn(X)]T, is first partitioned into two
subsystems
X_ 1 ¼ F1 (X1 , X2 ), X1 (0) ¼ X10 (14:24)
X_ 2 ¼ F2 (X1 , X2 ), X2 (0) ¼ X20 (14:25)
where X1 ¼ (X1, X2, . . . , Xm)T, X2 ¼ (Xmþ1, Xmþ2, . . . , Xn)T,

0 1
F1 (X1 , X2 )
B F (X , X ) C
B 2 1 2 C
F1 (X1 , X2 ) ¼ B
B .. C
C
@ . A
Fm (X1 , X2 )
and
0 1
Fmþ1 (X1 , X2 )
B F (X , X ) C
B mþ2 1 2 C
F2 (X1 , X2 ) ¼ B
B .. C
C
@ . A
Fn (X1 , X2 )
An identical (n m)-dimensional copy of the second subsystem, with X3 as state variable and X1 as
input, is appended to form the following (2n m)-dimensional coupled drive-response system:
X_ 1 ¼ F1 (X1 , X2 ), X1 (0) ¼ X10 (14:26)
X_ 2 ¼ F2 (X1 , X2 ), X2 (0) ¼ X20 (14:27)
X_ 3 ¼ F2 (X1 , X3 ), X3 (0) ¼ X30 (14:28)
The n-dimensional dynamical system defined by Equations 14.26 and 14.27 is called the drive system and
Equation 14.28 is called the response subsystem.
Note that the second drive subsystem (Equation 14.27) and the response subsystem (Equation 14.28)
lie in state spaces of dimension R(n–m) and have identical vector fields F2 and inputs X1.
Consider a trajectory X3(t) of Equation 14.29 that originates from an initial state X30 ‘‘close’’ to X20.
We may think of X2(t) as a perturbation of X3(t). In particular, define the error X3(t) ¼ X2(t) X3(t).
The trajectory X2(t) approaches X3(t) asymptotically (synchronizes) if kX2k ! 0 as t ! 1. Equivalently,
the response subsystem (Equation 14.29) is asymptotically stable when driven with X1(t).
The stability of an orbit of a dynamical system may be determined by examining the linearization of
the vector field along the orbit. The linearized response subsystem is governed by
x_ 3 ¼ DX3 F2 ðX1 (t), X3 Þx3 , x3 (0) ¼ x30
where Dx3F2(X1(t), X3) denotes the partial derivatives of the vector field F2 of the response subsystem
with respect to X3. This is a linear time-varying system whose state transition matrix Ft(X10, X30) maps a
point x30 into X3(t). Thus,
x3 (t) ¼ Ft (X10 , X30 )x30
Note that Ft is a linear operator. Therefore, an (n m)-dimensional ball Be(X30) of radius e about X30 is
mapped into an ellipsoid whose principal axes are determined by the singular values of Ft. In particular,
a ball of radius e is mapped by Ft into an ellipsoid, the maximum and minimum radii of which are
bounded by the largest and smallest singular values, respectively, of Ft.
The conditional LEs li(X10, X20) (hereafter denoted CLE) are defined by
1
li (X10 , X20 ) ¼ lim ln si ½ft (X10 , X20 ), i ¼ 1, 2, . . . , (n m)
t!1 t
whenever the limit exists.

The term conditional refers to the fact that the exponents depend explicitly on the trajectory ft
(X10, X20) of the drive system.
Given that e remains infinitesimally small, one needs only to consider the local linearized dynamics
along the flow determined by ft(X10, X20) and to determine the average local exponential rates of
expansion and contraction along the principal axes of an ellipsoid. If all CLEs are negative, the
response subsystem is asymptotically stable. A subsystem, where all the CLEs are negative, is called a
stable subsystem.
A stable subsystem does not necessarily exhibit dc steady-state behavior. For example, while an
asymptotically stable linear parallel RLC circuit has all negative LEs, the system settles to a periodic
steady-state solution when driven with a sinusoidal current. Although the RLC subcircuit has negative
CLEs in this case, the complete forced circuit has one nonnegative LE corresponding to motion along the
direction of the flow.
THEOREM 14.4 (Pecora and Carroll)
The trajectories X2(t) and X3(t) will synchronize only if the CLEs of the response system (Equation 14.28)
are all negative.
Note that this is a necessary but not sufficient condition for synchronization. If the response and
second drive subsystems are identical and the initial conditions X20 and X30 are sufficiently close, and the
CLEs of Equation 14.28 are all negative, synchronization will occur. However, if the systems are not
identical or the initial conditions are not sufficiently close, synchronization might not occur, even if all of
the CLEs are negative.
Although we have described it only for an autonomous continuous-time system, the drive-response
technique may also be applied for synchronizing nonautonomous and discrete-time circuits.
14.5.2.1 Cascaded Drive-Response Systems

The drive-response concept may be extended to the case where a dynamical system can be partitioned
into more than two parts. A simple two-level drive-response cascade is constructed as follows. Divide the
dynamical system
X_ ¼ F(X), X(0) ¼ X0 (14:29)
into three parts:
X_ 1 ¼ F1 (X1 , X2 , X3 ), X1 (0) ¼ X10 (14:30)
X_ 2 ¼ F2 (X1 , X2 , X3 ), X2 (0) ¼ X20 (14:31)
X_ 3 ¼ F3 (X1 , X2 , X3 ), X3 (0) ¼ X30 (14:32)
Now, construct an identical copy of the subsystems corresponding to Equations 14.31 and 14.32 with
X1(t) as input:
X_ 4 ¼ F2 (X1 , X4 , X5 ), X4 (0) ¼ X40 (14:33)
X_ 5 ¼ F3 (X1 , X4 , X5 ), X5 (0) ¼ X50 (14:34)

If all the CLEs of the driven subsystem composed of Equations 14.33 and 14.34 are negative then, after
the transient decays, X4(t) ¼ X2(t) and X5(t) ¼ X3(t).
Note that Equations 14.30 through 14.34 together define one large coupled dynamical system. Hence,
the response subsystem can exhibit chaos even if all of its CLEs are negative.
Proceeding one step further, we reproduce subsystem (Equation 14.30):
X_ 6 ¼ F1 (X6 , X4 , X5 ), X6 (0) ¼ X60 (14:35)
As before, if all of the conditional LEs of Equation 14.35 are negative, then kX6(t) X1(t) ! 0k.
If the original system could be partitioned so that Equation 14.30 is one-dimensional, then using
Equations 14.33 through 14.35 as a driven response system, all of the variables in the drive system could
be reproduced by driving with just one variable X1(t). It has been suggested that chaotic synchronization
might be useful in chaotic communications.
Example: Synchronization of Chua’s Circuits Using the Drive-Response Concept
Chua’s circuit may be partitioned in three distinct ways to form five-dimensional, drive-decomposable
systems:
X1-drive configuration:
dX1
¼ a[X2 X1 f (X1 )]
dt
dX2
¼ X1 X2 X3
dt
dX3
¼ bX2
dt
dX4
¼ X1 X4 X5
dt
dX5
¼ bX5
dt
With a ¼ 10.0, b ¼ 14.87, a ¼ 1.27, and b ¼ 0.68, the CLEs for the (X2, X3) subsystem are (0.5, 0.5).
dX2
¼ X1 X2 X3
dt
dX1
¼ a[X2 X1 f (X1 )]
dt
dX2
¼ bX2
dt
dX4
¼ a[X2 X4 f (X4 )]
dt
dX5
¼ bX5
dt
IR
+ + +
L C2 VC2 VC C1 V R NR
1
IL – – –
R
–
+ IŔ
+ +
L V΄C1 C1 V΄R NR
I΄R – –
FIGURE 14.48 Synchronization of two Chua’s circuits using the Pecora–Carroll drive-response method with VC2
as the drive variable.
5.570 2.770
2.795 –0.005
x[3]
x[5]
0.019 –2.781
–2.757 –5.557
–5.532 –8.332
–3.660 –1.833 –0.006 1.821 3.648 –3.660 –1.833 –0.006 1.821 3.648
x[1] x[4]
3.648 2.770
1.821 –0.005
x[5]
x[4]
–0.006 –2.781
–1.833 –5.557
–3.660 –8.332
–3.660 –1.833 –0.006 1.821 3.648 –5.532 –2.757 0.019 2.795 5.570
x[1] x[3]
FIGURE 14.49 Simulation of the normalized dimensionless form of Figure 14.48, n illustrating
o synchronization of
state variables. Identify {x[1], x[2], x[3]} with {VC1 VC2 IL}, and {x[4], x[5]} with VC0 1 IL0 VC0 1 (t) synchronizes with
VC0 1 (t), and IL0 (t) synchronizes with IL(t). Because one of the CLEs of the response subsystem is zero, the difference in
the initial conditions IL0 IL0 does not decay to zero. (From Chua, L.O., Itoh, M., Kočarev, L., and Eckert, K.,
J. Circuits Syst. Comput., 3, 1, 106, Mar. 1993. With permission.)
This case is illustrated in Figure 14.48. The CLEs of the (X1, X3) subsystem are 0 and 2.5 0.05.
Because of the zero CLE, states X5(t) and X3(t) remain a constant distance jX30 X50j apart, as depicted
in Figure 14.49.
dX3
¼ bX2
dt
dX1
¼ a[X2 X1 f (X1 )]
dt
dX2
¼ X1 X2 X3
dt
dX4
¼ a[X5 X4 f (X4 )]
dt
dX5
¼ X4 X5 X3
dt
The CLEs in this case are 1.23 0.03 and 5.42 0.02. Because the (X1, X2) subsystem has a positive CLE,
the response subsystem does not synchronize.
14.6 Applications of Chaos

14.6.1 Pseudorandom Sequence Generation
One of the most widely used deterministic ‘‘random’’ number generators is the linear congruential
generator, which is a discrete-time dynamical system of the form
Xkþ1 ¼ (AXk þ B) mod M, k ¼ 0, 1, . . . (14:36)
where A, B, and M are called the multiplier, increment, and modulus, respectively.
If A > 1, then all equilibrium points of Equation 14.36 are unstable. With the appropriate choice of
constants, this system exhibits a chaotic solution with a positive LE equal to ln A. However, if the state
space is discrete, for example in the case of digital implementations of Equation 14.37, then every steady-
state orbit is periodic with a maximum period equal to the number of distinct states in the state space;
such orbits are termed pseudorandom.
By using an analog state space, a truly ‘‘random’’ chaotic sequence can be generated. A discrete-time
chaotic circuit with an analog state space may be realized in SC technology. Figure 14.50 is an SC realization of
the parabolic map
e o
C
C
o e
V –
C/2 +
e
o X2k Xk
FIGURE 14.50 SC realization of the parabolic map xkþ1 ¼ V 0.5Xk2 . The switches labeled o and e are driven
by the odd and even phases, respectively, of a nonoverlapping two-phase clock.
xkþ1 ¼ V 0:5xk2 (14:37)
which, by the change of variables
Xk ¼ Axk þ B
pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
with m ¼ 1=(2A), B ¼ 0.5, and A ¼ (1 1 þ 2V)=(4V), is equivalent to the logistic map
Xkþ1 ¼ mXk (1 Xk ) (14:38)
The logistic map is chaotic for m ¼ 4 with LE ln 2 [18]. Figure 14.16 is a bifurcation diagram of Equation
14.38 with 0 m 4.
For V < 1.5, the steady-state solution of the SC parabolic map described by Equation 14.37 is a fixed
point. As the bifurcation parameter V is increased from 1.5 to 3 V, the circuit undergoes a series of
period-doubling bifurcations to chaos. V ¼ 4 corresponds to fully developed chaos on the open interval
(0 < Xk < 1) in the logistic map with m ¼ 4.
14.6.2 Communicating with Chaos

Modulation and coding techniques for mobile communication systems are driven by two fundamental
requirements: that the communication channel should be secure and the modulation scheme should be
tolerant of multipath effects. Security is ensured by coding and immunity from multipath degradation
may be achieved by using a spread-spectrum transmission.
With appropriate modulation and demodulation techniques, the ‘‘random’’ nature and ‘‘noise-like’’
spectral properties of chaotic circuits can be exploited to provide simultaneous coding and spreading of a
transmission.
14.6.2.1 Chaotic Masking

Chaotic masking is a method of hiding an information signal by adding it to a chaotic carrier at
the transmitter. The drive-response synchronization technique is used to recover the carrier at the receiver.
Figure 14.51 is a block diagram of a communication system using matched Chua’s circuits. The
receiver has the same two-layer structure as in the previous example. The first subcircuit, which has very
negative CLEs, synchronizes with the incoming signal, despite the perturbation s(t), and recovers VC2.
The second subcircuit, when driven by VC2, produces the receiver’s copy of VC1. The information signal r
(t) is recovered by subtracting the local copy of VC1 from the incoming signal VC1 þ s(t).
Chaotic masking is not suitable for practical communications applications for two reasons:
. The signal is indistinguishable from additive noise in the channel; this results in a poor signal to
noise ratio in the received signal and therefore poor overall noise performance
. The received signal is corrupted not only by noise in the channel but by the message itself; this
makes synchronization of the receiver, and therefore coherent demodulation using synchronized
chaos, difficult
Another possibility is to use chaotic signals as the basis functions in a digital communications system.
14.6.2.2 Chaos Shift Keying

The simplest idea for data transmission (digital communications) using a chaotic circuit is use the data to
modulate some parameter(s) of the transmitter. This technique is called parameter modulation, chaotic
switching, or chaos shift keying (CSK).
+ + IR +
S
L C2 VC2 VR NR C1 VC1
ΔG
IL – – –
Transmitter
– R
+
+ +
VC1 L C2 VC21
– –
First receiver subsystem
R
“One”
+
NR C1 VC
– 12
+ –
VC21 R
“Zero”
–
+
NR ΔG C1 V ΄C12
–
Second receiver subsystems
FIGURE 14.51 CSK communication system using Chua’s circuit. When a ‘‘one’’ is transmitted, switch S remains
open, VC21(t) synchronizes with VC2(t), VC12(t) synchronizes with VC1(t), and VC0 12 (t) falls out of synchronization with
VC1 (t). When a ‘‘zero’’ is transmitted, switch S is closed, VC21(t) synchronizes with VC2(t), VC12(t) falls out of
synchronization with VC1(t), and VC0 12 (t) synchronizes with VC1(t).
In the case of binary data, the information signal is encoded as a pair of circuit parameter sets which
produce distinct attractors in a dynamical system (the transmitter). In particular, a single control
parameter m may be switched between two values m0, corresponding to attractor !0 and m1, correspond-
ing to !1 . By analogy with frequency shift keying (FSK) and phase shift keying (PSK), this technique is
known as CSK.
The binary sequence to be transmitted is mapped into the appropriate control signal m(t) and the
corresponding trajectory switches, as required, between !1 and !0 .
One of the state variables of the transmitter is conveyed to the receiver, where the remaining state
variables are recovered by drive-response synchronization. These states are then applied to the second
stage of a drive-response cascade.
At the second level, two matched receiver subsystems are constructed, one of which synchronizes with
the incoming signal if a ‘‘zero’’ was transmitted, the other of which synchronizes only if a ‘‘one’’ was
transmitted. The use of two receiver circuits with mutually exclusive synchronization properties improves
the reliability of the communication system.
1.5
1
bin
0.5
0
(a)
2
s
(b)
2
1
Δ0
0
–1
(c)
2
Δ1
(d)
0.8
0.6
a0
0.4
0.2
0
(e)
1
a1
0.5
0
(f)
1.5
1
bout
0.5
0
0 10 20 30 40
(g) Time (ms)
FIGURE 14.52 CSK waveforms. (a) Binary input signal bin; (b) transmitted signal s(t); (c) response D0 ¼ VC12 VC1;
(d) response D0 ¼ VC0 12 VC1 ; (e) 40-point moving average of D0; (f) 40-point moving average of D1; (g) output
binary signal bout when e ¼ 0.1. (From Ogorzalek, M., IEEE Trans. Circuits Syst. I, 40, 696, Oct. 1993. With permission.)
CSK has been demonstrated both theoretically and experimentally. Figure 14.52 depicts a CSK
transmitter and receiver based on Chua’s circuit. The control parameter is a resistor with conductance
DG whose effect is to modulate the slopes Ga and Gb of the Chua diode. Switch S is opened and closed
by the binary data sequence and VC1 is transmitted. At the receiver, the first subsystem (a copy of the
(VC2, IL) subsystem of the transmitter) synchronizes with the incoming signal, recovering VC2(t). Thus,
VC21(t) ! VC2(t).
R –
+ +
IR
+ + + + +
L C2 VC2 VR NR C1 VC1 s(t) VC1 + s(t)

IL – – – –
Transmitter
– R
+
+ +
VC1 + s(t) L C2 VC21

– –
First receiver subsystem
– R –
+ + +
+ + – +
VC21 NR C1 VC12 VC1 + s(t) r(t)
– – –
Second receiver subsystem
FIGURE 14.53 Chaos masking using Chua’s circuits. At the transmitter, the information signal s(t) is added to the
chaotic carrier signal VC1(t). Provided s(t) is sufficiently small and the first receiver subsystem is sufficiently
stable, VC12(t) synchronizes with VC2(t). This signal is applied to a second receiver subsystem, from which an estimate
VC12(t) of the unmodulated carrier VC1(t) is derived. VC12 is subtracted from the incoming signal VC1 þ s(t) to yield the
received signal r(t). The method works well only if s(t) is much smaller than VC1(t).
The synchronized local copy of VC1(t) is then used to synchronize two further subsystems correspond-
ing to the VC1 subsystem of the transmitter with and without the resistor DG.
If the switch is closed at the transmitter, VC0 12 (but not VC12) synchronizes with VC1 and if the switch is
open, VC12 (but not VC0 12 ) synchronizes with VC1.
Figure 14.53 presents simulated results for a similar system consisting of two Chua’s circuits. At the
receiver, a decision must be made as to which bit has been transmitted. In this case, bout was derived
using the rule
0 1
0, bold ¼ 0 for a0 < e, a1 > e
B C
B 1, bold ¼ 1 for a0 > e, a1 < e C
bout B
¼B C
@ bold for a0 < e, a1 < e C
A
1 bold for a0 > e, a1 > e
where bold is the last bit received and bout is the current bit [14].
As with chaos masking, noise in the channel perturbs the transmitted signal, making coherent
demodulation using synchronized chaos difficult; this degrades the overall system performance.
An alternative to regenerating the chaotic basis functions at the receiver by means of synchronization
is to transmit a chaotic reference signal as part of the message and to recover the information by
correlating the received signal with the transmitted reference. An example of this is differential chaos
shift keying (DCSK).
14.6.2.3 Differential Chaos Shift Keying

In chaotic modulation schemes, the transmitted signal is a wideband signal. The objectives of using a
wideband signal as the carrier are twofold:
. To overcome the multipath propagation problem
. To reduce the transmitted power spectral density in order to reduce the interference caused in
adjacent radio communications channels
Of the chaotic modulation schemes published to date, DCSK with orthonormal basis functions, also
referred in the literature as to FM-DCSK [24] offers the best robustness against multipath and channel
imperfections. In an FM-DCSK signal, symbol ‘‘0’’ is represented by a piece of FM-modulated chaotic
waveform for time T=2, followed by a copy of itself; symbol ‘‘1’’ comprises a piece of FM-modulated
chaotic waveform for time T=2, followed by an inverted copy of itself, where T is the symbol duration.
Correlating the two halves of the waveform at the receiver yields þ1 in the case of ‘‘0’’ and 1 in the case
of ‘‘1.’’
It is frequently asked whether chaotic modulation schemes can offer any advantages over conventional
narrow band systems. If the propagation conditions are so good that the basis function(s) can be
regenerated at the receiver, then digital modulation schemes using conventional orthonormal (typically
periodic) basis functions and orthonormal chaotic basis functions can achieve similar levels of noise
performance.
The main question from an implementation perspective is the ease with which the basis functions can
be regenerated. It is fundamentally easier to regenerate a periodic basis function than a chaotic one.
Therefore, the noise performance of digital chaotic modulation with coherent correlation receivers will
always lag behind that of equivalent modulation schemes using periodic basis functions.
If the propagation conditions are such that coherent detection is impossible, then chaotic switching
with orthonormal DCSK basis functions and a differentially coherent receiver (DCSK, for short), offers
the best possible performance for a chaotic digital modulation scheme. In the limit, the noise perform-
ance of DCSK lags only 3 dB behind that of DPSK with autocorrelation demodulation [24].
In this case, the choice of periodic or chaotic basis functions is determined by the propagation
conditions. In particular, the multipath performance of a DCSK system can be improved by increasing
the transmission bandwidth.
Figure 14.54 shows the simulated best case noise performance for CSK, chaotic on–off keying
(COOK), and DCSK. The noise performance of binary phase shift keying (BPSK) and frequency
shift keying (FSK) are also shown, for comparison.
Another important issue is interference. If the operating environment is such that interference with
other narrow band radio systems working in the same frequency band should be minimized, then a
spread spectrum system must be used; this can be implemented using chaotic basis functions, where the
chaotic waveform is the spreading signal. For a fixed transmitted power, the wider the bandwidth of the
chaotic signal, the lower the interference caused.
While signal spreading in a chaotic communications scheme reduces the interfering signal level for
narrow band systems sharing the same frequency band, the converse is not necessarily true. Interference
to a chaotic communications system caused by other users in the same band can be suppressed only by
using coherent demodulation techniques.
100
10–1
Bit error rate
10–2
10–3
10–4
–2 0 2 4 6 8 10 12 14
Eb/No [dB]
FIGURE 14.54 Simulated optimum noise performance of antipodal CSK modulation with coherent demodulation
(solid curve with ‘‘þ’’ marks [left]), COOK with noncoherent demodulation (dashed curve with ‘‘þ’’ marks [right]),
chaotic switching with orthonormal basis functions and coherent demodulation (dash-dot curve with ‘‘þ’’ marks
[center]), and chaotic switching with DCSK basis functions and a differentially coherent receiver (dotted curve with
‘‘o’’ marks [right]). The noise performance curves for BPSK (dashed curve with ‘‘o’’ marks [left]) and coherent FSK
(dotted curve with ‘‘3’’ marks [center]) are also shown, for comparison. (From Kolumban, G., Kennedy, M.P., Jako,
Z., and Kis, G., Proc. IEEE, 90(5), 711, May 2002. With permission.)
Although it performs worse than conventional narrowband modulation schemes in a simple additive
white Gaussian noise (AWGN) channel, the advantage of DCSK is that the fall off in its performance in a
multipath channel is more gradual than that of an equivalent narrow band modulation scheme.
This result is highlighted dramatically in Figure 14.55, where the performance degradation in a narrow
band DPSK system; (classical DPSK with the optimum receiver configuration, referred as to ‘‘optimum
DPSK’’) is compared with that of a wideband differentially coherent FM-DCSK system. The bit duration
T was set to 2 ms in both cases and the RF bandwidth of the DCSK signal was 17 MHz. The solid and
dashed curves give the noise performance of optimum DPSK and FM-DCSK, respectively, over a single-
ray AWGN channel.
The noise performance of these modulation schemes was evaluated over a two-ray multipath channel
with an excess delay of 100 ns that is typical of WLAN applications in large warehouses.
Although the single-ray performance of differentially coherent FM-DCSK is worse than that of DPSK,
its multipath performance is significantly better, despite the fact that the carrier recovery problem which
would accentuate the problem further does not appear in optimum DPSK.
In summary, FM-DCSK offers a performance advantage over conventional communications schemes
in multipath environments when the propagation conditions are so poor that coherent detection or
detection of DPSK with an optimum receiver configuration is not possible [24].
14.6.2.4 Miscellaneous
Chaotic circuits may also be used for suppressing spurious tones in SD modulators, for modeling musical
instruments, fractal pattern generation, image processing, and pattern recognition [3].
100
10–1
Bit error rate
10–2
10–3
10–4
0 5 10 15 20 25 30
Eb / No [ dB ]
FIGURE 14.55 Simulated noise performance curves for optimum DPSK and wideband FM-DCSK in a single-ray
channel (solid and dashed, respectively) and in a two-ray multipath channel (dash-dot and dotted, respectively).
While FM-DCSK disimproves by about 4 dB, DPSK fails completely. (From Kolumban, G., Kennedy, M.P., Jako, Z.,
and Kis, G., Proc. IEEE, 90, 711, 2002. With permission.)
A chaotic attractor contains an infinite number of unstable periodic trajectories of different periods.
Various control schemes for stabilizing particular orbits in chaotic circuits have been successfully
demonstrated [14].
There has also been significant interest in using chaos for cryptographic purposes. An analog chaotic
system with a continous state space has potentially greater complexity (in terms of crpytographic keys)
than a digital finite state machine. However, many practical difficulties aris in trying to implement
identical analog systems. An overview of the subject can be found in Ref. [25].
References
1. F. M. Callier and C. A. Desoer, Linear System Theory, New York: Springer-Verlag, 1991.
2. L. O. Chua, C. A. Desoer, and E. S. Kuh, Linear and Nonlinear Circuits, New York: McGraw-Hill, 1987.
3. L. O. Chua and M. Hasler, Eds. (Special issue on Chaos in Nonlinear Electronic Circuits) Part A:
Tutorials and Reviews, IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 40, Oct. 1993; Part B:
Bifurcation and Chaos, IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 40, Nov. 1993; Part C:
Applications, IEEE Trans. Circuits Syst. II Analog Digital Signal Process., 40, Oct. 1993.
4. L. O. Chua, M. Itoh, L.Kocarev, and K. Eckert, Chaos synchronization in Chua’s circuit, J. Circuits
Syst. Comput., 3, 1, 93–108, Mar. 1993.
5. L. O. Chua, C. W. Wu, A. Huang, and G. -Q. Zhong, A universal circuit for studying and generating
chaos—Part I: Routes to chaos, IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 40, 732–744, Oct. 1933.
6. J. A. Glazier and A. Libchaber, Quasi-periodically and dynamical systems: An experimentalist’s view,
IEEE Trans. Circuits Syst., 35, 790–809, July 1988.
7. J. Guckenheimer and P. Holmes, Nonlinear Oscillations, Dynamical Systems, and Bifurcations of
Vector Fields, New York: Springer-Verlag, 1983.
8. M. W. Hirsch, The dynamical systems approach to differential equations, Bull. Am. Math. Soc., 11(1),
1–64, July 1984.
9. M. Itoh, H. Murakami, K. S. Halle, and L. O. Chua, Transmission of signals by chaos synchroniza-

tion, IEICE Technical Report, CAS93–39, NLP93–27, pp. 89–96, 1993.
10. M. P. Kennedy, Three steps to chaos—Part I: Evolution, IEEE Trans. Circuits Syst. I Fundam. Theory
Appl., 40, 640–656, Oct. 1993; Three steps to chaos—Part II: A Chua’s circuit primer, IEEE Trans.
Circuits Syst. I Fundam. Theory Appl., 40, 657–674, Oct. 1993.
11. M. P. Kennedy and L. O. Chua, Van der Pol and chaos, IEEE Trans. Circuits Syst., CAS-33, 974–980,
Oct. 1986.
12. M. P. Kennedy, K. R. Krieg, and L. O. Chua, The devil’s staircase: The electrical engineer’s fractal,
13. W. Lauterborn and U. Parlitz, Methods of chaos physics and their application to acoustics, J. Acoust.
Soc. Am., 84(6), 1975–1993, Dec. 1988.
14. M. Ogarzalek, Taming chaos—Part I: Synchronization, IEEE Trans. Circuits Syst. I Fundam. Theory
Appl., 40, 693–699, Oct. 1993; Taming chaos—Part II: Control, IEEE Trans. Circuits Syst. I Fundam.
Theory Appl., 40, 700–706, Oct. 1993.
15. T. S. Parker and L. O. Chua, Practical Numerical Algorithms for Chaotic Systems, New York:
16. L. M. Pecora and T. Carroll, Driving systems with chaotic signals, Phys. Rev., 44, 4, 2374–2383,
Aug. 15, 1991.
17. W. H. Press, B. P. Flannery, S. A. Teukolsky, and W. T. Vetterling, Numerical Recipes in C,
Cambridge: Cambridge University, 1988.
18. J. M. T. Thompson and H. B. Stewart, Nonlinear Dynamics and Chaos, New York: Wiley, 1986.
19. M. Vidyasagar, Nonlinear Systems Analysis, Englewood Cliffs, NJ: Prentice-Hall, 1978.
20. C. W. Wu and N. F. Rul’kov, Studying chaos via 1-D maps—A tutorial, IEEE Trans. Circuits Syst. I
Fundam. Theory Appl., 40, 707–721, Oct. 1993.
21. L. O. Chua, M. Komuro, and T. Matsumoto, The double scroll family, Parts I and II, IEEE Trans.
Circuits Syst., 33, 1073–1118, Nov. 1986.
22. Matlab: http:==www.mathworks.com.
23. ABCþþ: http:==www.mathworks.com=matlabcentral=fileexchange=loadFile.do? objectId ¼ 3541&
objectType ¼ file.
24. G. Kolumban, M. P. Kennedy, Z. Jako, and G. Kis, Chaotic communications with correlation
receivers: theory and performance limits, Proc. IEEE, 90(5), 711–732, May 2002.
25. F. Dachselt and W. Schwarz, Chaos and cryptography, IEEE Trans. Circuits Syst., 48(12), 1498–1509,
Dec. 2001.
Further Information
Current Research in Chaotic Circuits. The August 1987 issue of the Proceedings of the IEEE is devoted to
‘‘Chaotic Systems.’’ The IEEE Transactions on Circuits and Systems, July 1988, focuses on ‘‘Chaos
and Bifurcations of Circuits and Systems.’’
A three-part special issue of the IEEE Transactions on Circuits and Systems on ‘‘Chaos in Electronic
Circuits’’ appeared in October (Parts I and II) and November 1993 (Part I). This special issue
contains 42 papers on various aspects of bifurcations and chaos.
Two special issues (March and June 1993) of the Journal of Circuits, Systems and Computers are devoted
to ‘‘Chua’s Circuit: A Paradigm for Chaos.’’ These works, along with several additional papers, a
pictorial guide to 45 attractors in Chua’s oscillator, and the Adventures in Bifurcations and Chaos
(ABC) simulator, have been compiled into a book of the same name—Chua’s Circuit: A Paradigm
for Chaos, R.N. Madan, Ed. Singapore: World Scientific, Singapore, 1993.
Developments in the field of bifurcations and chaos, with particular emphasis on the applied sciences and
engineering, are reported in International Journal of Bifurcation and Chaos, which is published
quarterly by World Scientific, Singapore.
Research in chaos in electronic circuits appears regularly in the IEEE Transactions on Circuits and
Systems.
Simulation of Chaotic Circuits. A variety of general-purpose and custom software tools has been
developed for studying bifurcations and chaos in nonlinear circuits systems.
ABCþþ is a graphical simulator of Chua’s oscillator. ABCþþ contains a database of component values
for all known attractors in Chua’s oscillator, initial conditions, and parameter sets corresponding to
homoclinic and heteroclinic trajectories, and bifurcation sequences for the period-doubling, inter-
mittency, and quasiperiodic routes to chaos.
In ‘‘Learning about Chaotic Circuits with SPICE,’’ IEEE Transactions on Education, Vol. 36, pp. 28–35,
Jan. 1993, David Hamill describes how to simulate a variety of smooth chaotic circuits using the
general-purpose circuit simulator SPICE. A commercial variant of SPICE, called PSpice, is available
from http:==www.cadence.com=orcad=index.html.
The free student evaluation version of this program is sufficiently powerful for studying simple chaotic
circuits. PSpice runs on both workstations and PCs.
III
Distributed
Circuits
Thomas Koryu Ishii
Marquette University
15 Transmission Lines Thomas Koryu Ishii ............................................................................ 15-1

Generic Relations . Two-Wire Lines . Coaxial Lines . Waveguides . Microstrip
Lines . Coplanar Waveguide . References
16 Multiconductor Transmission Lines Daniël De Zutter and Luc Martens ................. 16-1
Introduction: Frequency versus Time Domain Analysis . Telegrapher’s Equations
for Uniform Multiconductor Transmission Lines . References
17 Time and Frequency Domain Responses Luc Martens and Daniël De Zutter ........ 17-1
Time-Domain Reflectometry . Frequency-Domain Network Analysis . References
18 Distributed RC Networks Vladimír Székely ...................................................................... 18-1
Uniform Distributed RC Lines . Nonuniform Distributed RC Lines . Infinite-Length
RC Lines . Inverse Problem for Distributed RC Circuits . References
19 Synthesis of Distributed Circuits Thomas Koryu Ishii .................................................. 19-1
Generic Relations . Synthesis of a Capacitance . Synthesis of an Inductance .
Synthesis of a Resistance . Synthesis of Transformers . Synthesis Examples . Synthesis
of Couplers . References
III-1
15
Transmission Lines
15.1 Generic Relations................................................................... 15-1
Equivalent Circuit . Transmission Line Equations . General
Solutions and Propagation Constant . Characteristic
Impedance . Wavelength . Phase Velocity . Voltage Reflection
Coefficient at the Load . Voltage Reflection Coefficient at the
Input . Input Impedance . Input Admittance
15.2 Two-Wire Lines ..................................................................... 15-6
Geometric Structure . Transmission Line Parameters .
Wavelength and Phase Velocity

15.3 Coaxial Lines........................................................................... 15-8

15.4 Waveguides ........................................................................... 15-10
Rectangular Waveguides . Waveguide Parameters .
Circular Waveguides
15.5 Microstrip Lines................................................................... 15-15

15.6 Coplanar Waveguide........................................................... 15-17
Thomas Koryu Ishii Wavelength and Phase Velocity

Marquette University References .......................................................................................... 15-19
15.1 Generic Relations

15.1.1 Equivalent Circuit
The equivalent circuit of a generic transmission line in monochromatic single frequency operation is
shown in Figure 15.1 [1–3], where Z_ is a series impedance per unit length of the transmission line (V=m)
and Y_ is a shunt admittance per unit length of the transmission line (S=m). For a uniform, nonlinear
transmission line, either Z_ or Y_ or both Z_ and Y_ are functions of the transmission line voltage and
current, but both Z_ and Y_ are not functions of location on the transmission line. For a nonuniform, linear
transmission line, both Z_ and Y_ are functions of location, but not functions of voltage and current on the
transmission line. For a nonuniform and nonlinear transmission line, both Z_ and Y_ or Z_ or Y_ are
functions of the voltage, the current, and the location on the transmission line.
15-1
Z Z Z Z
Y Y Y Y
FIGURE 15.1 Equivalent circuit of a generic transmission line.
15.1.2 Transmission Line Equations

Ohm’s law of a transmission line, which is the amount of voltage drop on a transmission line per unit
distance of voltage transmission is expressed as
dV_
¼ I_ Z_ (V=m) (15:1)
dz
where
V_ is the transmission line voltage (V)
I_ is the transmission line current (A)
Z is the series impedance per unit length of the transmission line (V)
z is a one-dimensional coordinate placed in parallel to the transmission line (m)
The equation of current decrease per unit length is
dI_
¼ Y_ V_ (A=m) (15:2)
dz
where Y_ is the shunt admittance per unit distance of the transmission line (S=m).
Combining Equations 15.1 and 15.2, the Telegrapher’s equation or Helmholtz’s wave equation for
the transmission line voltage is [1–3]
d2 V_
2
Z_ Y_ V_ ¼ 0 (V m)2 (15:3)
dz
The Telegrapher’s equation or Helmholtz’s wave equation for the transmission line current is [1–3]
d2 I_ _ _ _
2
Z Y I ¼ 0 (A m2 ) (15:4)
dz
15.1.3 General Solutions and Propagation Constant

The general solution of the Telegrapher’s equation for transmission line voltage is [1–3]
V_ ¼ V_ F egz
_
þ V_ R egz
_
(15:5)
where
jV_ Fj is the amplitude of the voltage waves propagating in þz-direction
jV_ Rj is the amplitude of the voltage waves propagating z-direction
g_ is the propagation constant of the transmission line [1]
Transmission Lines 15-3
pffiffiffiffiffiffiffi
g_ ¼ Z_ Y_ ¼ a þ gb
_ (m1 ) (15:6)
where
þ sign is for forward propagation or propagation in þz-direction
sign is for the backward propagation or propagation in z-direction
a is the attenuation constant and it is the real part of propagation constant g_
a ¼ <g_ ¼ < Z_ Y_ (m1 ) (15:7)
_
In Equation 15.6, b is the phase constant and it is the imaginary part of the propagation constant g:
b ¼ Ig_ ¼ I Z_ Y_ (m1 ) (15:8)
15.1.4 Characteristic Impedance

The characteristic impedance of the transmission line is [1–3]
sffiffiffiffi
Z_
Z0 ¼ (V) (15:9)
Y_
15.1.5 Wavelength
The wavelength of the transmission line voltage wave and transmission line current wave is
2p 2p
l¼ ¼ pffiffiffiffiffiffiffi (m) (15:10)
b I Z_ Y_
15.1.6 Phase Velocity

The phase velocity of voltage wave propagation and current wave propagation is
v
yp ¼ f l ¼ (m=s) (15:11)
b
where f is the frequency of operation, and the phase constant is
2p
b¼ (m1 ) (15:12)
l
15.1.7 Voltage Reflection Coefficient at the Load

If a transmission line of characteristic impedance Z0 is terminated by a mismatched load impedance Z_ L,
as shown in Figure 15.2, a voltage wave reflection occurs at the load impedance Z_ L. The voltage reflection
coefficient is [1–3]
z=0 z=l
V i(0) V i(l )
Zo ZL
V r(0) V r(l )
FIGURE 15.2 Incident wave V_ i and reflected wave V_ r.
V_ r (l) Z_ L Z0 Z~_ 1
L
r(l)
_ ¼ ¼ ¼ (15:13)
V_ (l) Z_ L þ Z0 Z
i ~_ þ 1
L
where
r(l)
_ is the voltage reflection coefficient at z ¼ l
~
Z_ ¼ Z~_ = Z is the normalized load impedance
L 0
_
V (l) is the incident voltage at the load at z ¼ l
i
When Z0 is a complex quantity Z_ 0, then
Z_ L Z0*
r(l)
_ ¼ (15:14)
Z_ L þ Z0*
where Z0* is a conjugate of Z_ 0.
15.1.8 Voltage Reflection Coefficient at the Input

Input Figure 15.2 V_ i(l) is caused by V_ i(0), which is the incident voltage at the input z ¼ 0 of the
transmission line. V_ r(l) produces, V_ r(0), which is the reflected voltage at the input z ¼ 0. The voltage
reflection coefficient at the input occurs, then, by omitting transmission line loss [1–3]
V_ r (0) 2jbl
r_ ¼ ¼ r(l)e
_ (15:15)
V_ i (0)
15.1.9 Input Impedance

At the load z ¼ l, from Equation 15.13,
~_ ¼ 1 þ r(l)
Z
_
(15:16)
L
1 r(l)
_
or
1 þ r(l)
_
Z_ L ¼ Z0 (15:17)
1 r(l)
_
At the input of the transmission line z ¼ 0
~_ 1 þ r(0)
_
Z(0) ¼ (15:18)
1 r(0)
_
Using Equation 15.15,
2jbl
~_ 1 þ r(l)e
_
Z(0) ¼ (15:19)
1 r(l)e
_ 2jbl
Inserting Equation 15.13 [1–3]
~_ þ j tan bl
~_
Z(0) ¼
Z
(15:20)
~_ tan bl
1 þ jZ L
or
~_ Z_ L þ jZ0 tan bl
Z(0) ¼ (15:21)
Z0 þ jZ_ L tan bl
If the line is lossy and
g_ ¼ a þ jb (15:22)
then [1]
_ Z_ L þ Z_ 0* tanh gl
_
Z(0) ¼ Z_ 0* (15:23)
_Z0* þ Z_ L tanh gl
_
where Z_ 0* is the complex conjugate of Z_ 0.
15.1.10 Input Admittance

The input admittance at z ¼ 0 is
_ Y_ L þ Y_ 0* tanh gl
_
Y(0) ¼ Y_ 0* (15:24)
Y_ 0* þ Y_ L tanh gl
_
where
_
Y(0) is the input admittance of the transmission line
Y_ 0 is the characteristic admittance of the transmission line, which is
1
Y_ 0 ¼ (15:25)
Z_ 0
and Y_ 0* is the conjugate of Y_ 0Y_ L is the load admittance; i.e.,
1
Y_ L ¼ (15:26)
_ZL
When the line is lossless,
g_ ¼ jb (15:27)
then [1–3]
_ Z_ L þ jZ0 tan bl
Z(0) ¼ (15:28)
Z0 þ jZL tan bl
15.2 Two-Wire Lines

15.2.1 Geometric Structure
A structural diagram of the cross-sectional view of a commercial two-wire line is shown in Figure 15.3.
As observed in this figure, two parallel conductors, in most cases made of hard-drawn copper, are
positioned by a plastic dielectric cover.
15.2.2 Transmission Line Parameters

In a two-wire line
Z_ ¼ R þ jX ¼ R þ jvL (V=m) (15:29)
where
Z_ is the impedance per unit length of the two-wire line (V=m)
R is the resistance per unit length (V=m)
X is the reactance per unit length (V=m)
v ¼ 2pf is the operating angular frequency (s1)
L is the inductance per unit length (H=m)
For a two-wire line made of hard-drawn copper [4]
pffiffiffi
f
R ¼ 8:42 (mV=m) (15:30)
a
where f is the operating frequency and a is the radius of the conductor [4]:
b
L ¼ 0:4 ln (mH=m) (15:31)
a
where b is the wire separation or the center-to-center distance of the two-wire line as illustrated in
Figure 15.3.
b Conductor
a
a
Dielectric
Conductor
FIGURE 15.3 Cross-sectional view of a two-wire line.
Y_ ¼ G þ jB ¼ G þ jvC (S=m) (15:32)
where
Y_ is a shunt admittance per unit length of the two-wire line (S=m)
G is a shunt conductance per unit length of the two-wire line (S=m)
B is a shunt susceptance per unit length (S=m)
C is a shunt capacitance per unit length (F=m)
3:14sd
G¼ b (pS=m) (15:33)
cosh1 2a
where sd is the insulation conductivity of the plastic dielectric surrounding the two parallel conductors,
and
27:8er
C¼ b (pF=m) (15:34)
cosh1 2a
where er is the relative permittivity of the plastic insulating material [5].

If R and G are negligibly small, the characteristic impedance is [6]
b
Z0 ¼ 277 log10 (V) (15:35)
a
The attenuation constant of a generic two-wire line is, including both R and G [1],
R GZ0
a¼ þ (m1 ) (15:36)
2Z0 2
and the phase constants is [1]
( pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi)12
(vLB RG) þ (RG vLB)2 þ (vLG þ BR)2
b¼ (m1 ) (15:37)
2
15.2.3 Wavelength and Phase Velocity

The wavelength on a lossless two-wire line (R ¼ 0, G ¼ 0) is
v 1
l0 ¼ ¼ pffiffiffiffiffiffi (m) (15:38)
b0 LC
where b0 is the phase constant of the lossless two-wire line

pffiffiffiffiffiffi
b0 ¼ v LC (m1 ) (15:39)
The wavelength on a lossy two-wire line (R 6¼ 0, G 6¼ 0) is
( )12
2p 8p2
l¼ ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi (m) (15:40)
b (vLB RG) þ (RG vLB)2 þ (vLG þ BR)2
The phase velocity of transverse electromagnetic (TEM) waves on a lossless two-wire line is
v 1
v0 ¼ f l0 ¼ ¼ pffiffiffiffiffiffi (m=s) (15:41)
b0 LC
The phase velocity of TEM waves on a lossy two-wire line is
( )12
v 2v2
v ¼ fl ¼ ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi (m=s) (15:42)
b (vLB RG) þ (RG vLB)2 þ (vLG þ BR)2
15.3 Coaxial Lines

A generic configuration of a coaxial line is shown in Figure 15.4. The center and outer conductors are
coaxially situated and separated by a coaxial insulator. Generally, coaxial lines are operated in the TEM
mode, in which both the electric and magnetic
fields are perpendicular to the direction of propa-
gation. The propagating electric fields are in the
radial direction and propagating magnetic fields
are circumferential to the cylindrical surfaces.
In Figure 15.4, a is the radius of the center
conductor, b is the inner radius of the outer con-
ductor, and c is the outer radius of the outer c
b
conductor. a

Center conductor Outer conductor
The series resistance per unit length of the line for
copper is [7],
Insulator
pffiffiffi 1 1
R ¼ 4:16 f þ (mV=m) (15:43)
a b FIGURE 15.4 Generic configuration of a coaxial line.
The series inductance per unit length is
b
L ¼ 0:2 ln (mH=m) (15:44)
a
The shunt conductance per unit length is
6:28si
G¼ (S=m) (15:45)
ln(b=a)
where si is the conductivity of the insulator between the conductors. The shunt capacitance per unit
length is
55:5er
C¼ (pF=m) (15:46)
ln(b=a)
where er is the relative permittivity of the insulator. When the loss of the line is small, the characteristic
impedance of the coaxial line is
138 b
Z0 ¼ pffiffiffiffi log10 (V) (15:47)
er a
when the line is lossy [1]
sffiffiffiffi sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
Z_ R þ jvL
Z_ 0 ¼ ¼ ¼ R0 þ jX0 (15:48)
Y_ G þ jvC
n pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffio12
RG þ v2 LC þ (RG þ v2 LC)2 þ (vLG vRC)2
R0 ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi (15:49)
G2 þ v2 C 2
1 vLG vCR
X0 ¼ (15:50)
2R0 G2 þ v2 C 2
The propagation constant of the coaxial line is
g_ ¼ a þ jb (15:51)
The attenuation constant is [1]
vLG þ vCR
a¼ (15:52)
2b
where the phase constant is
( pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi)12
(v2 LC RG) þ (RG v2 LC)2 þ (vLG þ vRC)2
b¼ (15:53)
2

The phase velocity on the coaxial line is
v
yp ¼ (15:54)
b
The wavelength on the line is
2p
l1 ¼ (15:55)
b
15.4 Waveguides
15.4.1 Rectangular Waveguides
15.4.1.1 Geometric Structure
A rectangular waveguide is a hollow conducting pipe of rectangular cross section as depicted in Figure
15.5. Electromagnetic microwaves are launched inside the waveguide through a coupling antenna at the
transmission site. The launched waves are received at the receiving end of the waveguide by a coupling
antenna. In this case, a rectangular coordinate system is set up on the rectangular waveguide (Figure 15.5).
The z-axis is parallel to the axis of the waveguide and is set coinciding with the lower left corner of the
waveguide. The wider dimension of the cross section of the waveguide a and the narrower dimension of
the cross section of the waveguide is b, as shown in the figure.
15.4.1.2 Modes of Operation

The waveguide can be operated in either H- or E-mode, depending on the excitation configuration. An
H-mode is a propagation mode in which the magnetic field, H, has a z-component, Hz, as referred to in
b
o X
a
Conducting wall
FIGURE 15.5 A rectangular waveguide and rectangular coordinate system.

Figure 15.5. In this mode, the electric field, E, is perpendicular to the direction of propagation, which is
the þz-direction. Therefore, an H-mode is also called a transverse electric (TE) mode. An E-mode is
a propagation mode in which the electric field, E, has a z-component, Ez, as referred to in Figure 15.5.
In this mode, the magnetic field, H, is perpendicular to the direction of propagation, which is the
þz-direction. Therefore, an E-mode is also called a transverse magnetic (TM) mode.
Solving Maxwell’s equations for H-modes [1],
mpx npy gzþjvt

H_ z ¼ H_ 0 cos cos e _ (15:56)
a b
where jH_ 0j is the amplitude of H_ z. Waveguide loss was neglected. Constants m and n are integral
numbers 0, 1, 2, 3, . . . and are called the mode number, and g_ is the propagation constant. Both m and n
cannot equal 0 simultaneously. Solving Maxwell’s equations for E-modes [1],
mpx npy gzþjvt

E_ z ¼ E_ 0 sin sin e _ (15:57)
a b
where jE_ 0j is the amplitude of E_ z. Neither m nor n can equal 0. The waveguide loss was neglected.
An H-mode is expressed as the Hmn-mode or TEmn-mode. An E-mode is expressed as the Emn- or
TMmn-mode.
15.4.2 Waveguide Parameters

Propagation constant g_ of a rectangular waveguide made of a good conductor [1]:
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
2ffi
l
g_ ¼ jb0 1 (m1 ) (15:58)
lc
where b0 is the phase constant of free space, which is
2p
b0 ¼ (m1 ) (15:59)
l
where
l is the wavelength in free space
lc is the cutoff wavelength of the waveguide
Electromagnetic waves with l > lc cannot propagate inside the waveguide. It is given for both Emn-mode
and Hmn-mode operation by [1]
2
lc ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
m2 n2ffi (m) (15:60)
a þ b
This means that if the waveguide is made of a good conductor, the attenuation constant
a 0 (m1 ) (15:61)
and the phase constant is

2ffi
l
bg ¼ b0 1 (15:62)
lc
The wavelength in the waveguide, i.e., waveguide wavelength lg, is longer than the free-space wave-
length l:
l
lg ¼ rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
2 (15:63)
1 llc
Then, the speed of propagation vp > c ¼ f l.
fl c
vp ¼ f lg ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
l 2ffi ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
l 2ffi (15:64)
1 lc 1 lc
For an Hmn-mode, the wave impedance is

qffiffiffiffi
m0
_
Ey Ex _ e0
hH ¼ ¼ ¼ rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
2 (V) (15:65)
H_ x H_ y
1 llc
For an Emn-mode the wave impedance is

2ffi
rffiffiffiffiffiffi
E_ y E_ x l m0
hE ¼ ¼ ¼ 1 (V) (15:66)
H_ x H_ y lc e0
15.4.3 Circular Waveguides

15.4.3.1 Geometric Structure
A circular waveguide is a hollow conducting pipe of circular cross section, as depicted in Figure 15.6.
Electromagnetic microwaves are launched inside the waveguide through a coupling antenna at the
transmission site. The launched waves are received at the receiving end of the waveguide by a coupling
(r, φ, z)
a
X
z o
φ
r
Z
FIGURE 15.6 A circular waveguide and cylindrical coordinate system.

antenna. In this case, a circular coordinate system (r, f, z) is set up in the circular waveguide, as depicted
in Figure 15.6. The z-axis is coincident with the axis of the cylindrical waveguide. The inside radius of the
circular waveguide is a.
15.4.3.2 Modes of Operation

The circular waveguide can be operated in either H- or E-mode, depending on the excitation configur-
ation. An H-mode is a propagation mode in which the magnetic field, H, has a z-component, Hz, as
referred to in Figure 15.6. In this mode the electric field, E, is perpendicular to the direction of
propagation, which is the þz-direction. Therefore, an H-mode is also called a TE mode. In the mode
Ez ¼ 0. An E-mode is a propagation mode in which the electric field, E, has a z-component, Ez, as referred
to in Figure 15.6. In this mode the magnetic field, H, is perpendicular to the direction of propagation,
which is the þz-direction. Therefore, an E-mode is also called a TM mode.
Solving Maxwell’s equations [1],

H_ z ¼ H_ 0 Jn k0cm r cos nfegzþjvt
_
(15:67)
where
jH_ 0j is the amplitude of H_ z
n and m are integral numbers 0, 1, 2, 3, . . . and are called the mode number
Jn(k0cm r) is the Bessel function of nth order, with the argument that k0cm r
k0cm is the mth root of Jn0 (kcma) ¼ 0, which is
u0nm
k0cm ¼ (15:68)
a
where u0nm is the mth root of the derivative of the Bessel function of order n, i.e., Jn0 (x) ¼ 0, where x is a
generic real argument. The propagation constant is g. _
Solving Maxwell’s equations for E-modes,
E_ z ¼ E_ 0 Jn (kcm r) cos nfegzþjvt

_
(15:69)
kcm is an mth root of Jn(kca) ¼ 0, which is
unm
kcm ¼ (15:70)
a
where unm is the mth root of the Bessel function of order n, i.e., Jn(x) ¼ 0, where x is a generic real
argument.
An H-mode in a circular waveguide is expressed as the Hnm-mode or the TMnm-mode. An E-mode is
expressed as the Enm-mode or the TMnm-mode.
15.4.3.3 Waveguide Parameters

The propagation constant g_ of a circular waveguide made of a good conductor is [1]
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
ffi
l
g_ ¼ jb0 1 (m1 ) (15:71)
lc
where b0 is the phase constant of free space, which is
2p
b0 ¼ (m1 ) (15:72)
l
where
l is the wavelength in free space
lc is the cutoff wavelength of the waveguide
Electromagnetic waves with l > lc cannot propagate inside the waveguide. It is given for an Hnm-
mode [1]
2pa
lCH ¼ (m) (15:73)
u0nm
For Enm-mode operation,
2pa
lCE ¼ (m) (15:74)
unm
This means that if the waveguide is made of a good conductor, the attenuation constant is
a 0 (m1 ) (15:75)
and the phase constant is

2ffi
l
bg ¼ b 0 1 (m1 ) (15:76)
lc
The waveguide wavelength is
l 1
lg ¼ rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
(m ) (15:77)
2
l
1 lc
The speed of propagation (phase velocity) is
c
vp ¼ f lg ¼ rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
(m=s) (15:78)
2
l
1 lc
For an Hnm-mode, the wave impedence is
E_ r _
Ef jvm0
hH ¼ ¼ ¼
_
Hf _
Hr g_
vm0 (15:79)
¼ rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
2 (V)
b0 1 llc
For an Enm-mode, the wave impedance is
E_ r E_ f g_
hE ¼ ¼ ¼
H_ f H_ r jve0
rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
2
l
b0 1 lc
¼ (V) (15:80)
ve0
15.5 Microstrip Lines

Figure 15.7 presents a general geometric structure of a microstrip line. A conducting strip of width, w,
and thickness, t, is laid on an insulating substrate of thickness, H, and permittivity, e ¼ e0er. The dielectric
substrate has a groundplate underneath, as presented in Figure 15.7.

The characteristic impedance, Z0, of a microstrip line, as shown in Figure 15.7, is given by [8–10]
8 2 39
< sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi

42:4 4H 4 14 þ 8=er 4H 14 þ 8er 2 4H 1 þ 1=er 2 5=
Z0 ¼ pffiffiffiffiffiffiffiffiffiffiffi ln 1 þ þ þ p (15:81)
er þ 1 : w0 11 W0 11 w0 2 ;
where w0 is an effective width of the microstrip, which is given by
1 þ 1=er t 10:87
w0 ¼ w þ ln rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi (15:82)
2 p t 2 1=p 2
H þ w=tþ1:10
Conducting
strip
Insulating
substrate
ε = εo εr t
W
Ground plate
FIGURE 15.7 Geometric structure of a microstrip line.

The attenuation constant of a microstrip line is
p þ p0 Z01 2p
a¼ (Np=m) (15:83)
2 Z0 l0
where
8 2 sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 39
< 2 =
1 8H 48H 8H 2 5
Z01 30 ln 1 þ þ þp (15:84)
: 2 w0 w0 w0 ;
and
Z01
p1 (15:85)
Z0d
where
8 2 sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 39
<
1 8(H þ d) 48H þ d) 8H þ d 2 2 5=
Z0d 30 ln 1 þ þ þp (15:86)
: 2 w0 w0 w0 ;
and
1
d ¼ pffiffiffiffiffiffiffiffiffiffiffiffi (15:87)
pf ms
is the skin depth of the conducting strip of conductivity s
Pk
p0 (15:88)
1 1=q1
er
where
er ¼ e0r je00r (15:89)
and
00

1 er
PK ¼ sin tan (15:90)
e0r
and
" 2 #
1 Z01
q¼ 1 (15:91)
er 1 Z0

The transmission line wavelength is
Z0
l1 ¼ l0 (15:92)
Z01
The phase constant of the microstrip line is then
2p Z01
b¼ (15:93)
l0 Z0
The phase velocity of electromagnetic waves on the microstrip line is
Z0
vp ¼ 3 108 (15:94)
Z01
15.6 Coplanar Waveguide

A cross-sectional view of a coplanar waveguide (CPW) is given in Figure 15.8. The waveguide consists of
a narrow, central conducting strip of width s(m) and very wide conducting plates on both sides of the
central conducting strip, with gap widths w. These conductors are developed on a surface of dielectric
substrate of thickness d, as presented in Figure 15.8. The electromagnetic waves propagate in the gap
between the outer conducting plates and the center conducting strip.

The attenuation constant of a CPW is given by [11]
p 5 e
1 effer(f ) (s þ 2w)2 e3=2
a¼ 2 qffiffiffiffiffiffiffi ffi 3 0 r
(Np=m) (15:95)
2 eeff (f ) c K (k)K(k)
er
Center
metal plate
Outer w w Outer
metal plate metal plate
Substrate d
FIGURE 15.8 Cross-sectional view of a CPW.

where the effective dielectric constant is given by
pffiffiffiffi pffiffiffiffi
pffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffiffi er eq
eeff (f ) ¼ eq þ b (15:96)
f
1 þ a fTE
and
er þ 1
eq ¼ (15:97)
2
er is the relative permittivity of the substrate material,
c
fTE ¼ pffiffiffiffiffiffiffiffiffiffiffiffi (15:98)
4d er 1
is the TE mode cutoff frequency,
k s=(s þ 2w) (15:99)
K(k) is the complete elliptic integral of the first kind of the argument k, and c is the speed of light in
vacuum, which is 3 3 108 m=s. The parameter a is [11]
h s i
a log1 u log þ v (15:100)
w
u 0:54 0:64q þ 0:015q2 (15:101)
v 0:43 0:86q þ 0:54q2 (15:102)

s
q log (15:103)
d
The parameter b is an experimentally determined constant
b 1:8 (15:104)
pffiffiffiffiffiffiffiffiffiffiffiffiffi
K 0 (k) ¼ K 1 k2 (15:105)
The phase constant of the CPW is
f pffiffiffiffiffiffiffiffiffiffiffiffiffi
b( f ) ¼ 2p eeff ( f ) (rad=m) (15:106)
c
The characteristic impedance of the CPW is [11]
120p K 0 (k)
Z0 ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffi (V) (15:107)
eeff ( f ) 4K(k)

The wavelength of electromagnetic waves propagating on a CPW is obtained from Equation 15.106:
2p c 1 l
ll ¼ ¼ pffiffiffiffiffiffiffi ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffi (m) (15:108)
b( f ) f eeff ( f ) eeff ( f )
The phase velocity of the waves on the CPW is, then,
c
vp ¼ f l1 ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffi (m=s) (15:109)
eeff ( f )
References
1. T. K. Ishii, Microwave Engineering, San Diego, CA: Harcourt, Brace, Jovanovich, 1989.
2. J. R. Wait, Electromagnetic Wave Theory, New York: Harper & Row, 1985.
3. V. F. Fusco, Microwave Circuits, Englewood Cliffs, NJ: Prentice Hall, 1987.
4. L. A. Ware and H. R. Reed, Communications Circuits, New York: John Wiley & Sons, 1949.
5. E. A. Guillemin, Communications Networks, New York: John Wiley & Sons, 1935.
6. F. E. Terman, Radio Engineering, New York: McGraw-Hill, 1941.
7. H. J. Reich, P. F. Ordung, H. L. Krauss, and J. G. Skalnik, Microwave Theory and Techniques,
Princeton, NJ: D. Van Nostrand, 1953.
8. H. A. Wheeler, Transmission-line properties of parallel strips separated by a dielectric sheet, IEEE
Trans. MTT, MTT-13, 172–185, Mar. 1965.
9. H. A. Wheeler, Transmission-line properties of parallel strips by a conformal-mapping approxima-
tion, IEEE Trans. MTT, MTT-12, 280–289, May 1964.
10. H. A. Wheeler, Transmission-line properties of a strip on a dielectric sheet on a plane, IEEE Trans.
MTT, MTT-25, 631–647, Aug. 1977.
11. M. Y. Frankel, S. Gupta, J. A. Valdmanis, and G. A. Mourou, Terahertz attenuation and dispersion
characteristics of coplanar transmission lines. IEEE Trans. MTT, 39(6), 910–916, June 1991.
16
Multiconductor
Transmission Lines
16.1 Introduction: Frequency versus Time
Domain Analysis.................................................................... 16-1
16.2 Telegrapher’s Equations for Uniform Multiconductor
Daniël De Zutter Transmission Lines................................................................ 16-3
Ghent University
Generalities . Low-Frequency or Quasitransverse
Electromagnetic Description . Analytical Expressions for
Luc Martens Some Simple Multiconductor Transmission Line Configurations
Ghent University References ............................................................................................ 16-8
16.1 Introduction: Frequency versus Time Domain Analysis

Multiconductor transmission lines (MTL), or multiconductor buses as they are also often called, are
found in almost every electrical packaging technology and on every technology level from digital chips,
over MMICs (monolithic microwave integrated circuits) to MCMs (multichip modules), boards, and
backplanes. MTL are electrical conducting structures with a constant cross section (the x-, y-plane) which
propagates signals in the direction perpendicular to that cross section (the z-axis) (see also Figure 16.1).
Being restricted to a constant cross section we are in fact dealing with the so-called uniform MTL. The
more general case using a nonuniform cross section is much more difficult to handle and constitutes a
fully three-dimensional problem.
It is not the purpose of this chapter to give a detailed account of the physical properties and the use of
the different types of MTL. The literature on this subject is abundant and any particular reference is
bound to be both subjective and totally incomplete. Hence, we put forward only Refs. [1–3] as references
here, as they contain a wealth of information and additional references.
In the frequency domain, i.e., for harmonic signals, solution of Maxwell’s sourceless equations yields a
number of (evanescent and propagating) modes characterized by modal propagation factors exp (j bz)
and by a modal field distribution, which depends only upon the (x, y) coordinates of the cross
section. In the presence of losses and for evanescent modes b can take complex values, and jb is then
replaced by g ¼ a þ jb (see Equation 16.3). In the propagation direction, the modal field amplitudes
essentially behave as voltage and current along a transmission line. This immediately suggests that MTL
should be represented on the circuit level by a set of coupled circuit transmission lines. The relationship
between the typical circuit quantities, such as voltages, currents, coupling impedances, and signal
velocities, on the one hand, and the original field quantities (modal fields and modal propagation
factors) is not straightforward [4]. In general, the circuit quantities will be frequency dependent. The
frequency domain circuit model parameters can be used as the starting point for time domain analysis of
16-1
Air
1 2 3 Dielectric
1 2
Layered substrate
Shield
Ground plane
(a) (b)
FIGURE 16.1 Two examples of cross sections of multiconductor lines.
networks, including multiconductor lines. This is, again, a vast research topic with important technical
applications.
Section 16.2 describes the circuit modeling in the frequency domain of uniform MTL based on the
Telegrapher’s equations. The meaning of the voltages and currents in these equations is explained
both at lower frequencies in which the quasi transverse electromagnetic (TEM) approach is valid as well
as in the so-called full-wave regime valid for any frequency. The notions TEM, quasi-TEM, and full
wave are elucidated. We introduce the capacitance, inductance, resistance, and conductance matrices
together with the characteristic impedance matrix of the coupled transmission line model. Finally,
for some simple MTL configurations analytical formulas are presented expressing the previous quan-
tities and the propagation factors as a function of the geometric and electrical parameters of these
configurations.
It would be a formidable task to give a comprehensive overview of all the methods that are actually
used for the time domain analysis of MTL. In the remaining part of this paragraph a very short
overview (both for uniform and nonuniform structures) is presented along with some references. In the
case of linear loads and drivers, frequency domain methods in combination with (fast) Fourier
transform techniques are certainly most effective [5–7]. In the presence of nonlinear loads and drivers
other approaches must be used. Simulations based on harmonic balance techniques [8,9] are, again,
mainly frequency domain methods. All signals are approximated by a finite sum of harmonics and the
nonlinear loads and drivers are taken into account by converting their time domain behavior to the
frequency domain. Kirchhoff laws are then imposed for each harmonic in an iterative way. Harmonic
balance techniques are not very well suited for transient analysis or in the presence of strong
nonlinearities, but are excellent for mixers, amplifiers, filters, etc. Many recent efforts were directed
toward the development of time domain simulation methods (for both uniform and nonuniform
interconnection structures) based on advanced convolution-type approaches. It is, of course, impossible
to picture all the ramifications in this research field. We refer the reader to a recent special issue of
IEEE Circuits and Systems Transactions [10], to the ‘‘Simulation techniques for passive devices and
structures’’ section of a special issue of IEEE Microwave Theory and Techniques Transactions [11], and
to a 1994 special issue of the Analog Integrated Circuits and Signal Processing Journal [12] and to the
wealth of references therein.
Both frequency and time domain experimental characterization techniques for uniform and nonuni-
form multiconductor structures can be found in Chapter 17.
Multiconductor Transmission Lines 16-3
16.2 Telegrapher’s Equations for Uniform Multiconductor

Transmission Lines
16.2.1 Generalities
Figures 10.1a and b show the cross sections of two general coupled lossy MTLs consisting of N þ 1
conductors. These conductors either can be perfectly conducting or exhibit finite conductivity. Their
cross section remains constant along the propagation or longitudinal direction z. The (N þ1)th
conductor is taken as reference conductor. In many practical cases, this will be the ground plane at the
top or bottom (Figure 16.1a) of the layered dielectric in which the conductors are embedded or is the
shielding surrounding the other conductors (Figure 16.1b). We restrict the analysis to the frequency
domain, i.e., all field components and all voltages and currents have a common time dependence, exp
(jvt), which is suppressed in the sequel. The generalized Telegrapher’s equations governing the circuit
representation of the MTL of Figure 16.1 in terms of a set of C-coupled circuit transmission lines is given
by Ref. [4]:
dV
þ ZI ¼ 0
dz (16:1)
dI
þ YV ¼ 0
dz
where
V and I are column vectors, the C elements of which are the voltages and currents of the circuit model
Z and Y are the C 3 C impedance and admittance matrices
Equation 16.1 is a good circuit description of the wave phenomena along a MTL if only the fundamental
modes of the corresponding field problem are of importance. In that case C ¼ N (C ¼ 3 in Figure 16.1a
and C ¼ 2 in Figure 16.1b) if a ground plane is present, and C ¼ N 1 in the absence of a ground plane.
For the relationship between the actual electromagnetic field description in terms of modes and the
circuit model (Equation 16.1), we refer the reader to Refs. [4,13]. The general solution to Equation 16.1 is
given by
1 1
V(z) ¼ 2 ITm ejbz Kþ þ 2 ITm ejbz K
(16:2)
I(z) ¼ Im ejbz Kþ Im ejbz K
where
Kþ and K are column vectors with C elements
b is a diagonal C 3 C matrix with the propagation factors bf ( f ¼ 1, 2, . . . , C) of the C fundamental
eigenmodes as diagonal elements
This matrix b reduces to a single propagation factor for a single transmission line (see Equation 15.6).
For the calculation of the fields and of the propagation constants many different methods can be found
in the literature [14]. Solution (Equation 16.2) of the differential equations (Equation 16.1) is the
extension of the corresponding Equation 15.5 for a single transmission line to the coupled line case. It
also consists of waves respectively traveling in positive and negative z-directions. The Im is a C 3 C
matrix, the columns of which are the current eigenvectors of the circuit model. The following relation-
ships hold:
1
Z ¼ jvL þ R ¼ 2j ITm bðIm Þ1
j (16:3)
Y ¼ jvC þ G ¼ Im bITm
2
L, R, C, and G are the C 3 C (frequency-dependent) inductance, resistance, capacitance, and conduct-

1The C 3 C characteristic impedance matrix of the transmission line models is given by
ance matrices.
Zchar ¼ 2 ITm (Im )1 . The matrix Zchar replaces the simple characteristic impedance number of Equa-
tion 15.9. In general the mapping of the wave phenomenon onto the circuit model equations (Equations
16.1 through 16.3) depends on the choice of Im. We refer the reader to the detailed discussions in Ref. [4].
For MTLs the most adopted definition for the elements of Im is [15]
þ
I m,jf ¼ Htr,f dl, j, f ¼ 1, 2, . . . , C (16:4)
cj
where
cj is the circumference of conductor j
Htr,f is the transversal component of the magnetic field of eigenmode f
This means that Im,jf is the total current through conductor j due to eigenmode f. This definition is used
in the power-current impedance definition for microstrip and stripline problems [9]. For slotline circuits,
a formulation that parallels the one given above must be used, but in this case it makes much more sense
to introduce the voltage eigenvectors and to define them as line integrals of the electric field (see
Appendix B of Ref. [16]).
As Z and Y in Equation 16.3 are frequency dependent, the time domain equivalent of Equation 16.1
involves convolution integrals between Z and I on the one hand and Y and V on the other hand.
The propagation factors bf are also frequency dependent, hence the signal propagation will show
dispersion, i.e., the signal waveform becomes distorted while propagating.
16.2.2 Low-Frequency or Quasitransverse Electromagnetic Description

In the previous section, the reader was given a very general picture of the MTL problem, valid for any
frequency. This analysis is the so-called full-wave analysis. The present section is restricted to the low-
frequency or quasistatic regime. Here, the cross section of the MTL is small with respect to the relevant
wavelengths, the longitudinal field components can be neglected and the transversal field components
can be found from the solution of an electrostatic or magnetostatic problem in the cross section of the
MTL. A detailed discussion of the theoretical background can be found in Ref. [17]. In the quasi-TEM
limit and in the absence of losses R and G are zero and L and C become frequency independent and take
their classical meaning. Both skin-effect losses and small dielectric losses can be accounted for by a
perturbation approach [18]. In that case a frequency dependent R and G must be reintroduced. If R and
G are zero and L and C are frequency independent, the following Telegrapher’s equations hold:
@v @i
¼ L
@z @t (16:5)
@i @v
¼ C
@z @t
Equation 16.5 is the time domain counterpart of Equation 16.1. We have replaced the capital letters for
voltages and currents with lower case letters to distinguish between time and frequency domains. L and C
are related to the total charge Qi per unit length carried by each conductor and to the total magnetic flux
Fi between each conductor and the reference conductor:
Q¼CV
(16:6)
F¼LI
where Q and F are C 3 1 column vectors with elements Qi and Fi, respectively. For a piecewise
homogeneous medium, one can prove that the inductance matrix L can be derived from an equivalent
so-called vacuum capacitance matrix Cv with L ¼ C1 v and where Cv is calculated in the same way as C,
but with the piecewise constant e everywhere replaced by the corresponding value of 1=m. For non-
magnetic materials, this operation corresponds with taking away all dielectrics and working with vacuum,
thus explaining the name of the matrix Cv. Other properties of C and L are
C and L are symmetric, i.e., Cij ¼ Cji and Lij ¼ Lji.
C is real, Cii > 0 and Cij < 0 (i 6¼ j).
l is real, Lii > 0 and Lij > 0.
The propagation factors bf which form the elements of b in Equation 16.2 are now given by the
eigenvalues of (LC)1=2 or equivalently of (CL)1=2. The current eigenvectors which form the columns of Im
are now solutions of the following eigenproblem (where v is the circular frequency):
v2 (CL)I ¼ (bf )2 I (16:7)
The corresponding eigenvoltages are solutions of
v2 (LC)V ¼ (bf )2 V (16:8)
Hence, corresponding voltage and current eigenmodes propagate with the same propagation factors and
as L, C, V, and I are frequency independent, bf is proportional with v and can be rewritten as bf ¼ vb0f
proving that the propagation is nondispersive with velocity vf ¼ 1=b0f . Remember that the subindex f
takes the values 1, 2, . . . , C, i.e., for a three-conductor problem above a ground plane (N ¼ C ¼ 3, see
Figure 16.1a), three distinct propagation factors and corresponding eigenmode profiles exist for currents
and voltages. Note, however, that for the same bf the eigenvector for the currents differs from the
eigenvector of the voltages.
We conclude this section by remarking that, for MTL embedded in a homogeneous medium (such
as the simple stripline or the coaxial cable with homogeneous filling), (LC) ¼ em1, where 1 is the
unity matrix. Thus, the eigenmodes are purely TEM, i.e., electric and magnetic fields have only
transversal components and the longitudinal ones are exactly zero. All propagation factors bf take the
same value [c=(e, mr)1=2], where c is the velocity of light in vacuum. Note, however, that even for identical
bf different eigenmodes will be found.
Numerical calculation of L and C can be performed by many different numerical methods (see the
reference section of [18]), and for sufficiently simple configurations analytical formulas are available. For
a line with one conductor and a ground plane (N ¼ C ¼ 1) the characteristic impedance Z0 ¼ (L=C)1=2
and the signal velocity vp is vp ¼ (LC)1=2.
16.2.3 Analytical Expressions for Some Simple Multiconductor

Transmission Line Configurations
16.2.3.1 Symmetric Stripline
Sections 15.3 through 15.6 presented a number of MTL consisting of a single conductor and a ground
plane (N ¼ C ¼ 1). Here, we add another important practical example, the symmetric stripline configur-
ation of Figure 16.2. We restrict ourselves to the lossless case. A perfectly conducting strip of width w and
b t
FIGURE 16.2 Stripline configuration.
thickness t is symmetrically placed between two perfectly conducting ground planes with spacing b.
The insulating substrate has a permittivity e ¼ e0er, and is nonmagnetic. This case has a single funda-
mental mode. The characteristic impedance Z0 is given by Ref. [19]:
8 2 ffi39
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
< 2 =
pffiffiffiffi 4 b t 48 b t 8 bt 5
Z0 er ¼ 30 ln 1 þ þ þ6:27 (16:9)
: p W0 p W0 p W0 ;
with
W0 W DW
¼ þ (16:10)
bt bt bt
where
( m
)
DW x 1 x 2 0:0796x 2 x 1
¼ 1 ln þ m¼2 1þ , x ¼ t =b
b t p(1 x) 2 2x W=b þ 1:1x 3 1x
For W0=(b t) < 10 (Equation 16.9) is 0.5% accurate. The signal velocity vp is given by c=(er)1=2, where c is
the velocity of light in vacuum. The corresponding L and C are given by L ¼ Z0=vp and C ¼ 1=(Z0vp).
16.2.3.2 Coupled Striplines

The configuration is depicted in Figure 16.3. It consists of the symmetric combination of the structure of
Figure 16.2. There are now two fundamental TEM modes (N ¼ C ¼ 2). The even mode (index e)
corresponds to the situation in which both central conductors are placed at the same voltage (speaking
in low-frequency terms, of course). The odd mode (index o) corresponds to the situation where the
b t
w s w
FIGURE 16.3 Coupled, symmetric stripline configuration.

central conductors are placed at opposite voltages. The impedances of the modes (respectively,
Z0,e and Z0,o) are given by
30p(b t)
Z0e,o ¼ pffiffiffiffi (16:11)
«r W þ bC 2p Ae,o
f
with
ln (1 þ tanh u)
Ae ¼ 1 þ
ln 2
ln (1 þ coth u)
Ao ¼ 1 þ
ln 2
pS
u¼
2b
2b t t t(2b t)
Cf (t=b) ¼ 2 ln ln
bt b (b t)2
The signal velocity is the same for both modes (c=(er)1=2), and the L and C of both modes can be found by
replacing Z0 in Section 16.2.3.1 by Z0,e and Z0,o, respectively.
16.2.3.3 Coupled Microstrip Lines

The configuration is depicted in Figure 16.4. It consists of the symmetric combination of the structure of
Figure 15.7. Again, we have two fundamental modes, but the modes are hybrid, i.e., not purely TEM.
Much work has been done on this configuration. The formulas proposed in the literature are quite
lengthy; and we refer the reader to Refs. [20,21]. Reference [20] gives a very good overview together with
some simple approximations, and Ref. [21] gives the most accurate formulas, taking into account the
frequency dependence. It is important to remark here that the two impedances, Z0,e and Z0,o, can be
found. They depend upon frequency. Both modes now have a different velocity. The data found in
literature are typically expressed in terms of the effective dielectric constant. The modal field lines are
both found in the air above the substrate and in the substrate itself. Hence, the field experiences an
effective dielectric constant that is smaller than the dielectric constant of the substrate. The effective
dielectric constant for the even mode (er,e) will be higher than for the odd mode (er,o), and are frequency
dependent. The corresponding modal velocities are given by c=(er,e)1=2 and c=(er,o)1=2.
16.2.3.4 Two-Wire Line

See Section 15.2.
t
h w s w
FIGURE 16.4 Coupled, symmetric microstrip configuration.

References
1. T. Itoh, Ed., Numerical Techniques for Microwave and Millimeter-Wave Passive Structures,
New York: John Wiley & Sons, 1989.
2. J. A. Kong, Ed., Progress in Electromagnetics Research, Vols. 1–5, New York: Elsevier, 1989–1991.
3. C. F. Coombs, Ed., Printed Circuits Handbook, 3rd ed., New York: McGraw-Hill, 1988.
4. N. Faché, F. Olyslager, and D. De Zutter, Electromagnetic and Circuit Modelling of Multiconductor
Transmission Lines, Oxford Engineering Series 35, Oxford: Clarendon Press, 1993.
5. T. R. Arabi, T. K. Sarkar, and A. R. Djordjevic, Time and frequency domain characterization of
multiconductor transmission lines, Electromagnetics, 9(1), 85–112, 1989.
6. J. R. Griffith and M. S. Nakhla, Time domain analysis of lossy coupled transmission lines, IEEE
Trans. MTT, 38(10), 1480–1487, Oct. 1990.
7. B. J. Cooke, J. L. Prince, and A. C. Cangellaris, S-parameter analysis of multiconductor, integrated
circuit interconnect systems, IEEE Trans. Computer-Aided Design, CAD-11(3), 353–360, Mar. 1992.
8. V. Rizzoli et al., State of the art and present trends in nonlinear microwave CAD techniques,
IEEE Trans. MTT, 36(2), 343–363, Feb. 1988.
9. R. Gilmore, Nonlinear circuit design using the modified harmonic balance algorithm, IEEE Trans.
MTT, 34(12), 1294–1307, Dec. 1986.
10. IEEE Trans. Circuits Syst. Trans., I: Fundamental Theory and Applications, Special Issue on Simu-
lation, Modelling and Electrical Design of High-Speed and High-Density Interconnects, 39(11), Nov.
1992.
11. IEEE Trans. MTT, Special Issue on Process-Oriented Microwave CAD and Modeling, 40(7), July
1992.
12. Analog Integrated Circuits Signal Process., Special Issue on High-Speed Interconnects, 5(1), 1–107,
Jan. 1994.
13. F. Olyslager, D. De Zutter, and A. T. de Hoop, New reciprocal circuit model for lossy waveguide
structures based on the orthogonality of the eigenmodes, IEEE Trans. MTT, 42(12), 2261–2269, Dec.
1994.
14. F. Olyslager and D. De Zutter, Rigorous boundary integral equation solution for general isotropic
and uniaxial anisotropic dielectric waveguides in multilayered media including losses, gain and
leakage, IEEE Trans. MTT, 41(8), 1385–1392, Aug. 1993.
15. R. H. Jansen and M. Kirschning, Arguments and an accurate model for the power-current formu-
lation of microstrip characteristic impedance, Arch. Elek. Übertragung, 37(3=4), 108–112, 1983.
16. T. Dhaene and D. De Zutter, CAD-oriented general circuit description of uniform coupled lossy
dispersive waveguide structures, IEEE Trans. MTT, Special Issue on Process-Oriented Microwave
CAD and Modeling, 40(7), 1445–1554, July 1992.
17. I. V. Lindell, On the quasi-TEM modes in inhomogeneous multiconductor transmission lines,
IEEE Trans. MTT, 29(8), 812–817, 1981.
18. F. Olyslager, N. Faché, and D. De Zutter, New fast and accurate line parameter calculation of general
multiconductor transmission lines in multilayered media, IEEE Trans, MTT, MTT-39(6), 901–909,
June 1991.
19. H. A. Wheeler, Transmission line properties of a stripline between parallel planes, IEEE Trans. MTT,
26, 866–876, Nov. 1978.
20. T. Edwards, Foundations for Microstrip Circuit Design, 2nd ed., Chichester, UK: John Wiley & Sons,
1992.
21. M. Kirschning and R. H. Jansen, Accurate wide-range design equations for the frequency-dependent
characteristics of parallel coupled microstrip lines, IEEE Trans. MTT, 32(1), 83–90, Jan. 1984.
17
Time and Frequency
Domain Responses
17.1 Time-Domain Reflectometry .............................................. 17-1
Principles . One-Port Time-Domain Reflectometry .
Time-Domain Reflectometry Pictures for Typical Loads .
Time-Domain Reflectometric Characterization of

an Interconnection Structure
Luc Martens
Ghent University 17.2 Frequency-Domain Network Analysis.............................. 17-6
Introduction . Network Analyzer: Block Diagram .
Daniël De Zutter Measurement Errors and Calibration

Ghent University References ............................................................................................ 17-9
17.1 Time-Domain Reflectometry

17.1.1 Principles
Time-domain reflectometry (TDR) is used to characterize interconnections in the time domain. The
setup essentially consists of a time domain step generator and a digital sampling oscilloscope (Figure
17.1) [1]. The generator produces a positive-going step signal with a well-defined rise time. The step is
applied to the device under test. The reflected and the transmitted signals are shown on the oscilloscope.
Measuring the reflected signal is called TDR; the transmitted signal is measured using the time-domain
transmission (TDT) option.
The characteristic impedance levels and delay through an interconnection structure can be derived
from the TDR measurements. The TDT measurement gives information about the losses (decrease of
magnitude) and degradation of the rise time (filtering of high-frequency components). The TDR=TDT
measurements also are used to extract an equivalent circuit consisting of transmission lines and lumped
elements.
The fundamentals of TDR are discussed in detail in Refs. [2,3]. Reference [4] describes the applications
of TDR in various environments including PCB=backplane, wafer=hybrids, IC packages, connectors,
and cables.
17.1.2 One-Port Time-Domain Reflectometry

Figure 17.2 demonstrates that the device under test is a simple resistor with impedance ZL. In this case, a
mismatch with respect to the reference or system impedance Z0 exists. A reflected voltage wave will
appear on the oscilloscope display algebraically added to the incident wave. The amplitude of the
reflected voltage wave, Er, is determined by the reflection coefficient of the load impedance, ZL, with
respect to the system impedance Z0:
17-1
Two-port
Tee
DUT
Generator
TDR
TDT
Trigger
Oscilloscope
FIGURE 17.1 Setup of TDR=TDT measurements. DUT ¼ device under test.
Z0 = 50 Ω
2Ei Vm(t) Z0, τ

ZL
Coaxial cable
Vm(t)
Ei + Er
Ei
0 2τ
FIGURE 17.2 TDR measurement of an impedance ZL.
ZL Z0
Er ¼ rEi ¼ Ei (17:1)
ZL þ Z0
Figure 17.2 also depicts the time-domain picture shown on the oscilloscope for a load, the impedance ZL
that is larger than Z0. From the measurement of the magnitude Er of the reflected voltage wave, the load
impedance ZL can be derived.
17.1.3 Time-Domain Reflectometry Pictures for Typical Loads

The simplest loads to be measured are the open circuit and the short circuit. For ideal open-circuit and
short-circuit loads the reflection coefficient is, respectively, 1 and 1. This means that the measured
voltage doubles in the first case and goes to zero in the second case, when the reflected voltage wave
arrives at the oscilloscope (Figure 17.3).
For any other real load impedance, the reflection coefficient lies between 1 and 1. If the real
load impedance is larger than the reference impedance, the reflected voltage wave is a positive-going
step signal. In this case the amplitude of the voltage is increased when the reflected wave is added to the
input step (Figure 17.4). The reverse happens when the load impedance is lower than the reference
impedance.
Time and Frequency Domain Responses 17-3
2Ei
Vm(t)
Ei
t
2τ
Z0
ZL = ∞, ρ = +1
2Ei Vm(t) Z0, τ
ZL = Open circuit
Vm(t)
Ei
t
2τ
Z0
ZL = 0, ρ = –1
2Ei Vm(t) Z0, τ
ZL = Short circuit
FIGURE 17.3 TDR pictures of an open- and a short-circuit termination.
For complex load impedances, the step response is more complicated. For example, in the case of a
series connection of a resistance and an inductance or a parallel connection of a resistance and a
capacitance, a first-order step response is obtained. From the two pictures in Figure 17.5, we learn that
a series inductance gives a positive dip, while the capacitance produces a negative dip.
17.1.4 Time-Domain Reflectometric Characterization

of an Interconnection Structure
One of the advantages of TDR is its ability to determine impedance levels and delays through an
interconnection structure with multiple discontinuities. An example is shown in Figure 17.6 for a
microstrip line connected to the measurement cable. We assume a perfect junction of the two transmis-
sion lines. The line is terminated in a load with impedance ZL. Observe that two mismatches produce
reflections that can be analyzed separately. The mismatch at the junction of the two transmission lines
generates a reflected wave Er1 ¼ rlEi. Similarly, the mismatch at the load creates a reflection due to its
reflection coefficient r2. Both reflection coefficients are defined as:
Z00 Z0
r1 ¼
Z00 þ Z0
(17:2)
ZL Z00
r2 ¼
ZL þ Z00
4/3Ei
Vm(t)
Ei
t
2τ
Z0
ZL = 2Z0, ρ = +1/3
2Ei Vm(t) Z0, τ 2Z0
ZL
Vm(t)
Ei
2/3Ei
t
2τ
Z0
Z0, τ Z0
2Ei Vm(t) ZL = Z0/2, ρ = –1/3
ZL 2
FIGURE 17.4 TDR pictures of real impedance terminations (ZL ¼ 2Z0 and ZL ¼ Z0=2).
After a time t, the reflection at the junction of the transmission lines occurs. The voltage wave associated
with this reflection adds to the oscilloscope’s picture at the time instant 2t. The voltage wave that
propagates further in the microstrip line is (1 þ r1) Ei and is incident on ZL. The reflection at ZL occurs at
the time t þ t0 and is given by
ErL ¼ r2 (1 þ r1 )Ei (17:3)
After a time t þ 2t0 , a second reflection is generated at the junction. The reflection is now determined
by the reflection coefficient r01 ¼ r1 . The voltage wave Er2 that is transmitted through the junction
and propagates in the direction of the generator adds to the time-domain picture at time instant 2t þ 2t0
and is given by

Er2 ¼ (1 þ r1 )ErL ¼ (1 r1 )r2 (1 þ r1 )Ei ¼ 1 r21 r2 Ei (17:4)
If r1 is small in comparison to 1, then
Er2 r2 Ei (17:5)
which means that r2 can be determined from the measurement of Er2.

Vm(t)
2Ei
Ei
R – Z0
1+ Ei
R + Z0
t
2τ
Z0
R ZL = R + jωL
2Ei Vm(t) Z0, τ
ZL L
Vm(t)
R – Z0
1+ Ei
R + Z0
Ei
t
2τ
Z0
R
ZL =
2Ei Vm(t) Z0, τ R C 1 + jωRC
ZL
FIGURE 17.5 TDR pictures of two complex impedance terminations.
Z0 ρ1 ρ2
2Ei Vm(t) Z0, τ Z΄0, τ΄ ZL

Coaxial cable Microstrip line
ρ΄1
Z0 > Z΄0 < ZL
Er2
Vm(t)
Er1
Ei
2τ 2τ + 2τ΄ t
FIGURE 17.6 TDR measurement of a microstrip line terminated in an impedance ZL.
In this example, the measurement cable was perfectly matched to the generator impedance so that no
reflection occurred at the generator side, which simplifies the time-domain picture. In the case of an
interconnection with many important discontinuities (high reflection coefficient), multiple reflections
can prevent a straightforward interpretation of the oscilloscope’s display.
17.2 Frequency-Domain Network NWA

Analysis
17.2.1 Introduction
A distributed circuit can also be analyzed in the frequency
domain. At low frequencies the circuits are characterized by
1 2
their Z- or Y-parameters. At high frequencies, circuits are better
characterized by S-parameters. We focus only on S-parameter
characterization.
The network analyzer is an instrument that measures the
S-parameters of a two-port device (Figure 17.7) [5]. The refer-
Reference Reference
ence impedance for the S-matrix is the system impedance,
port 1 port 2
which is the standard 50 V. A sinusoidal signal is fed to the
device under test and the reflected and transmitted signals are
measured. If the network analyzer is of the vectorial type, it DUT
measures the magnitude as well as the phase of the signals.
FIGURE 17.7 Network analyzer (NWA)

17.2.2 Network Analyzer: Block Diagram setup.
In operation, the source is usually set to sweep over a specified
bandwidth (maximally 45 MHz to 26.5 GHz for the HP8510B network analyzer). A four-port reflect-
ometer samples the incident, reflected, and transmitted waves, and a switch allows the network analyzer
to be driven from either port 1 or port 2.
A powerful internal computer is used to calculate and display the magnitude and phase of the
S-parameters or other quantities such as voltage standing wave radio, return loss, group delay, imped-
ance, etc. A useful feature is the capability of determining the time-domain response of the circuit by
calculating the inverse Fourier transform of the frequency-domain data.
Figure 17.8 depicts the network analyzer in the reflection measurement configuration. A sinusoidal
signal from a swept source is split by a directional coupler into a signal that is fed to a reference channel
and a signal that is used as input for the device under test. The reflected signal is fed back through the
directional coupler to the test channel. In the complex ratio measuring unit, the amplitude and phase of
the test and reference signals are compared.
Complex ratio
measuring unit Display
Ref A B Test
channel channel
Measurement
network
Swept Device
signal under
source Dual directional test
coupler
FIGURE 17.8 Block diagram for reflection measurements with the network analyzer.
Measurement
network Device
under
test
Display
Swept
signal
source
Complex ratio
measuring unit
FIGURE 17.9 Block diagram for transmission measurements with the network analyzer.
The principle of the transmission measurement is the same as for the reflection configuration
(Figure 17.9). In this setup the signal transmitted through the device under test is fed to the test channel.
The other part of the signal of the swept source is transmitted through the directional coupler and fed to
the reference channel. Again, amplitude and phase of the two signals are compared.
An important issue concerning the measurement of S-parameters is the calibration of the results. In
order to perform a good calibration, the nature of the measurement errors must be well understood.
These items are the subject of Section 17.2.3.
17.2.3 Measurement Errors and Calibration

17.2.3.1 Measurement Errors
The network analyzer measurement errors [6] can be classified in two categories:
1. Random errors—These are nonrepeatable measurement variations that occur due to noise, envir-
onmental changes, and other physical changes in the test setup. These are any errors that the
system itself may not be able to measure.
2. Systematic errors—These are repeatable errors. They include the mismatch and leakage terms in
the test setup, the isolation characteristic between the reference and test signal paths, and the
system frequency response.
In most S-parameters measurements, the systematic errors are those that produce the most significant
measurement uncertainty. Because each of these errors produces a predictable effect upon the measured
data, their effects can be removed to obtain a corrected value for the test device response. The procedure
of removing these systematic errors is called calibration. We illustrate here the calibration for one-port
measurements. The extension to two-ports is mathematically more involved, but the procedure is
fundamentally the same.
17.2.3.2 One-Port Calibration: Error Correction Network

In the configuration for one-port measurements, the real network analyzer can be considered as a
connection of a ‘‘perfect’’ network analyzer and a two-port whose parameters are determined by the
systematic errors. rm is the measured reflection coefficient, while ra is the actual one (Figure 17.10). The
three independent coefficients of the error correction network [7] are
Perfect e00 e01

network
ρm
S=
ρa ZL
e10 e11
analyzer
FIGURE 17.10 Error correction network for calibration of the S-parameter measurements.
1. Directivity e00—The vector sum of all leakage signals appearing at the network analyzer test input
due to the inability of the signal separation device to absolutely separate incident and reflected
waves, as well as residual effects of cables and adapters between the signal separation device and the
measurement plane
2. Source impedance mismatch e11—The vector sum of the signals appearing at the network analyzer
test input due to the inability of the source to maintain absolute constant power at the test device
input as well as cable and adaptor mismatches and losses outside the source leveling loop
3. Tracking or frequency response e10e01—The vector sum of all test setup variations in the magnitude
and phase frequency response between the reference and test signal paths
The relations between rm and ra are given by
e01 e10 ra
rm ¼ e00 þ (17:6)
1 e11 ra
rm e00
ra ¼ (17:7)
e11 (rm e00 ) þ e10 e01
The error coefficients are determined by measuring standard loads. In the case of the short-open-load
(SOL) calibration, a short-circuit, open-circuit, and matched load are measured [5]. The standards are
characterized over a specified frequency range (e.g., from 45 MHz to 26.5 GHz for the network analyzer
HP8510B). The best-specified standards are coaxial. The quality of the coaxial standards is determined by
the precision of the mechanical construction. The short circuit and the load are in most cases nearly perfect
(r1a ¼ 1 and r3a ¼ 0, respectively). The open circuit behaves as a frequency-dependent capacitance:
r2a ¼ ej2 arctg(vCZ0 ) with C ¼ C0 þ f 2 C2 (17:8)
where
Z0 is the characteristic impedance of the coaxial part of the standard
C0 and C2 are specified by the constructor of the hardware
Once the reflection coefficients of the standards are specified and the standards are measured, a set of
linear equations in the error coefficients is derived:
aria þ b cria rim ¼ rim ; i ¼ 1, 2, 3 (17:9)
where a ¼ e01e10 e00e11, b ¼ e00, and c ¼ e11. This set is easily solved in the error coefficients which are
then used together with the measurement of rm to determine ra.
Other calibration methods (thru-reflect-line [TRL], line-reflect-match [LRM]) are described in
Refs. [8,9]. Analogous calibration techniques also were developed for time-domain measurements
(TDR=TDT) [10]. Applications of S-parameter measurements on circuits on PCBs are described in
Ref. [11].
17.2.3.3 Error Checking and Verification of the Calibration

Checking errors in the calibration is done by applying the calibration to a measured standard. The
specified reflection response of the standard must be found. In Figure 17.11, the uncalibrated measure-
ment of the open-circuit standard is shown. After calibration, we obtain the specified response (capaci-
tance model) of the standard (Figure 17.11). The calibration can be further verified on a standard
transmission line.
Open circuit
Uncalibrated S11 Calibrated S11
A
B
A1
Open S11
S11
Y-FS = 1.5
Y-FS = 1.0
45.0 MHz Open Freq 26.5 GHz B 45.0 MHz Freq 26.5 GHz A
FIGURE 17.11 Smith chart representation of the uncalibrated and calibrated S11 data of an open circuit
(measurements in the range of 45 MHz to 26.5 GHz).
References
1. A. M. Nicolson, C. L. Benett, Jr., D. Lammensdorf, and L. Susman, Applications of time
domain metrology to the automation of broad-band microwave measurements, IEEE Trans. MTT,
MTT-20(1), 3–9, Jan. 1972.
2. Agilent Technologies, TDR fundamentals for use with HP54120T digitizing oscilloscope and TDR,
HP-Appl. Note 62, Apr. 1988.
3. Agilent Technologies, Improving time domain network analysis measurements, HP-Appl. Note 62-1,
Apr. 1988.
4. Agilent Technologies, Advanced TDR techniques, HP-Appl. Note 62-3, May 1990.
5. R. A. Hackborn, An automatic network analyzer system, Microwave J., 11, 45–52, May 1968.
6. B. Donecker, Accuracy predictions for a new generation network analyzer, Microwave J., 27,
127–141, June 1984.
7. J. Williams, Accuracy enhancement fundamentals for network analyzers, Microwave J., 32, 99–114,
Mar. 1989.
8. G. F. Engen and C. A. Hoer, Thru-reflect-line: An improved technique for calibrating the dual six-
port automatic network analyzer, IEEE Trans. MTT, MTT-27, 987–993, Dec. 1979.
9. D. Wiliams, R. Marks, and K.R. Phillips, Translate LRL and LRM calibrations, Microwaves RF, 30,
78–84, Feb. 1991.
10. T. Dhaene, L. Martens, and D. De Zutter, Calibration and normalization of time domain network
analyzer measurements, IEEE Trans. MTT, MTT-42, 580–589, Apr. 1994.
11. P. Degraeuwe, L. Martens, and D. De Zutter, Measurement set-up for high-frequency characteriza-
tion of planar contact devices, in Proc. of 39th Automatic RF Techniques (ARFTG) Meeting,
Albuquerque, NM, pp. 19–25, June 1992.
18
Distributed RC
Networks
18.1 Uniform Distributed RC Lines ........................................... 18-1
Solution in the Time Domain . Solution
in the Frequency Domain . Uniform, Lossy DRC Lines
18.2 Nonuniform Distributed RC Lines.................................... 18-8
Approximation with Concatenated Uniform Sections .
Asymptotic Approximation for Large ‘‘s’’ . Lumped

Element Approximation
18.3 Infinite-Length RC Lines ................................................... 18-12
Generalization of the Time Constant Representation .
Generalization of the Pole-Zero Representation .
Relations among R(z), Id(S), and the Impedance Function .
Practical Calculation of the R(z) Function

Vladimír Székely 18.4 Inverse Problem for Distributed RC Circuits ............... 18-19
Budapest University of Technology Network Identification by Deconvolution
and Economics References .......................................................................................... 18-24
In everyday practice, we often encounter RC networks that are inherently distributed (DRC lines). All the
resistors and the interconnection lines of an IC, the channel regions of the FET, and MOS transistors are
DRC lines. The electrical behavior of such networks is discussed in the current section.
18.1 Uniform Distributed RC Lines

First, let us consider the so-called lossless RC lines. The structure in Figure 18.1 has only serial resistance
and parallel capacitance. Both the resistance and the capacitance are distributed along the x axis. r and c
denote the resistance and the capacitance pro unit length, respectively. In this section, these values are
considered constants, which means that the RC line is uniform.
Consider a Dx length section of the structure. Using the notations of Figure 18.1, the following
relations can be given between the currents and voltages:
@v
Dv ¼ irDx, Di ¼ cDx (18:1)
@t
By taking the limit as Dx ! 0, we obtain a pair of differential equations
@v @i @v
¼ ri, ¼ c (18:2)
@x @x @t
18-1
i(x, t) which describe the behavior of the lossless RC line.

v(x, t)
Substituting the first equation of Equation 18.2 after
derivation into the second equation of Equation 18.2
results in
@v 1 @ 2 v
¼ (18:3)
@t rc @x2
This shows that the time-dependent voltage along the

line v(x, t) is determined by a homogeneous, constant-
x
coefficient, second-order partial differential equation,
0 with the first time derivative on one side and the second
Δx spatial derivative on the other side. This kind of equation
is called a ‘‘diffusion equation,’’ as diffusion processes are
FIGURE 18.1 Lossless DRC line. described using such equations.
18.1.1 Solution in the Time Domain

The differential Equation 18.3 is fulfilled by the simple, spatially Gauss-like function

Q=c x2
v(x, t) ¼ pffiffiffiffiffiffiffiffiffiffiffi exp (18:4)
2 pt=rc 4t=rc
This can be proved easily by substituting the function into Equation 18.3.
Equation 18.4 describes the physical situation in which the uniform RC structure is of infinite length
in both directions, and a short, impulse-like Q charge injection is applied at x ¼ 0 in the t ¼ 0 instant.
This means a Dirac-d excitation at x ¼ 0 both in charge and voltage. As time elapses, the charge spreads
equally in both directions. The extension of the charge and voltage wave is ever increasing, but their
amplitude is decreasing (see Figure 18.2a).
DRC line
v
0.5τ0
x=H
τ0 τ0 = 4H 2rc
2τ0 2H
3H
4τ0
8τ0 4H
x t
–8H 0 8H 16H 0.01τ0 0.1τ0 τ0 10τ0 100τ0
(a) (b)
FIGURE 18.2 Effect of an impulse-like charge injection at x ¼ 0. (a) Voltage distribution in subsequent time
instants. (b) Voltage transients in different distances from the injection point.
Distributed RC Networks 18-3
The same result is represented in a different way in Figure 18.2b. The time dependence of the voltage is
shown at the x ¼ H, x ¼ 2H, etc., spatial positions. As we move away from the x ¼ 0 point, the maximum
of the impulse appears increasingly later in time, and the originally sharp impulse is increasingly
extended. This means that the RC line delays the input pulse and at the same time strongly spreads it.
The RC line is dispersive.
18.1.1.1 Superposition
Equation 18.3 is homogeneous and linear. This means that any sum of the solutions is again a solution.
Based on this fact, the problem of Figure 18.3a can be solved. At t ¼ 0, the voltage distribution of the RC
line is given by an arbitrary U(x) function. For t > 0, the distribution can be calculated by dividing the
U(x) function into Dj ! 0 elementary slices. These may be considered to be individual Dirac-d
excitations and the responses given to them can be summarized by integration:
ð
1
1 (x j)2
v(x, t) ¼ pffiffiffiffiffiffiffiffiffiffiffi U(j) exp dj (18:5)
2 pt=rc 4t=rc
1
Evaluating this equation for the special case of having 2U0 voltage on the x < 0 side at t ¼ 0, while x > 0 is
voltage less, results in
ð0 !
2U0 (x j)2 x
v(x, t) ¼ pffiffiffiffiffiffiffiffiffiffiffi exp dj ¼ U0 erfc pffiffiffiffiffiffiffiffi (18:6)
2 pt=rc 4t=rc 2 t=rc
1
where the integral of the Gauss function is notated by erfc(x), the complementary error function.* The
originally abrupt voltage step is getting increasingly less steep with time (Figure 18.3b). In the middle at
x ¼ 0, the voltage remains U0.
18.1.1.2 Semi-Infinite Line

Our next model is a bit closer to practice; the uniform RC line extends to x 0 only. At x ¼ 0 the port is
characterized by the V(t) voltage and the I(t) current (Figure 18.4). If the line is relaxed and a I(t) ¼ d(t)
current (a Dirac-d current pulse) is forced to the port, a unit charge is introduced at x ¼ 0. The result will
DRC line
v(x, t)
2U0
v
U(x) = v(x, t = 0)
U0 t1
t2
t3
x x
Δξ
(a) (b)
FIGURE 18.3 DRC line transients. (a) An arbitrary initial voltage distribution. (b) Solution for the initial
step-function case.
* Ðx Ð
1
erfc(x) ¼ 1 p2ffiffipffi exp(y2 )dy ¼ p2ffiffipffi exp(y2 )dy:
0 x
v(x, t)
τ0 = rcH2
U0
t=1
.28τ
0
0.64
τ0
∞ 0.3
I(t) 2τ
0.1 0
6τ
V(t) 0.0 0
0 8τ
0.0 .04τ 0
0.01τ0 2τ 0
x 0 x
0 0 H
(a) (b)
FIGURE 18.4 Semi-infinite uniform DRC line. (a) Notation. (b) Normalized solution for the initially relaxed line.
be similar to that of Figure 18.2a, but instead of symmetrical spreading the charge moves towards the
positive x direction only. This means that a unit charge generates a twice-larger voltage wave

1=c x2
v(x, t) ¼ pffiffiffiffiffiffiffiffiffiffiffi exp (18:7)
pt=rc 4t=rc
Let us consider the case in which step function excitation is given to the port of Figure 18.4. At t < 0, the
port and the whole line are voltage free; at t 0 a constant U0 voltage is forced to the port. Comparing
this situation with the problem of Figure 18.3b, it can be observed that the boundary conditions for the
x > 0 semi-infinite line are the same as in our current example, so that the solution must to be similar as
well (see Figure 18.4b):
!
x
v(x, t) ¼ U0 erfc pffiffiffiffiffiffiffiffi (18:8)
2 t=rc
Applying at the t ¼ 0 instant an arbitrary W(t) forced voltage excitation to the initially relaxed line, the
response is given by the Duhamel integral as follows:
ðt !
dW(t) x
w(x, t) ¼ erfc pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi dt (18:9)
dt 2 (t t)=rc
0
18.1.1.3 Finite DRC Line

Let the DRC line of length L of Figure 18.5a be closed at x ¼ L with a short circuit. Let the line at t < 0 be
relaxed and assume a W (t > 0) voltage excitation at the x ¼ 0 port. Using the w(x, t) voltage response of
the semi-infinite line Equation 18.9, the response function for the short-terminated line of length L
X
1
v(x, t) ¼ ( 1)i w 2iL þ ( 1)i x, t
i¼0
X
1
¼ ðw(2kL þ x, t) w(2kL þ 2L x, t)Þ (18:10)
k¼0
w(x, t)
i=0
i=1
w(t)
i=2
x
(a) 0 L (b) 0 L
FIGURE 18.5 Finite-length uniform DRC line. (a) DRC line with short-circuit at x ¼ L. (b) Visualization of the
mirroring procedure.
This result is illustrated in Figure 18.5b. The v(x, t) function is given as the sum of the shifted, negated,
and mirrored replicas of the w(x, t) function, so that it is a valid solution as well. The x ¼ L boundary
condition is the short circuit v(x ¼ L, t) ¼ 0. The i ¼ 0 and i ¼ 1 functions are the same size with different
signs at x ¼ L, so they cancel each other. The same is true for i ¼ 2 and 3, and so on. The x ¼ 0 boundary
condition v ¼ W(t) is fulfilled by the i ¼ 0 function, while the further functions cancel each other in pairs
(the i ¼ 1 and 2, etc.).
The result can be interpreted as the response of the semi-infinite line being mirrored with negative
sign on the short termination. In the case of Figure 18.5a, the termination on both the x ¼ 0 and x ¼ L
ends is assured by zero impedance short circuit; the resultant voltage function comes from the
successive back and forth mirroring between these two ‘‘mirrors.’’
It is easy to understand that a termination with an open circuit results in mirroring without sign
change. (At this termination the current equals to zero so that the dv=dx derivative equals to zero as
well. This requirement is always fulfilled in the mirroring point summarizing the continuous incident
function with its mirrored version.) According to this, the voltage on the open-terminated line of
Figure 18.6a is
v τ0 = rcL2
U0 t = 1.28τ0
0.64τ0
0.32τ0
v(t)
U0
t 0.0 0.04 0.16τ0
2τ τ0
0 0.08τ0
x 0.01τ0 x
0 L 0 L
(a) (b)
FIGURE 18.6 Finite-length uniform DRC line. (a) Open-circuit at the far end. (b) Normalized solution for the
initially relaxed line.
X
1
v(x, t) ¼ (1)k ðw(2kL þ x, t) þ w(2kL þ 2L x, t)Þ (18:11)
k¼0
which in the case of step function excitation with U0 amplitude is

" ! !#
X
1
2kL þ x 2kL þ 2L x
v(x, t) ¼ U0 ( 1) erfc pffiffiffiffiffiffiffiffi
k
þ erfc pffiffiffiffiffiffiffiffi (18:12)
k¼0 2 t=rc 2 t=rc
This function is given in Figure 18.6b for some time instants.
18.1.2 Solution in the Frequency Domain

To find the solution of the differential Equation 18.3, the following trial function can be used
v(x, t) ¼ v exp( jvt) exp(gx) (18:13)
Substituting this function into (18.3) results in the following so-called dispersion equation:
pffiffiffiffiffiffiffiffiffi 1 pffiffiffiffiffiffiffi
g¼ jvrc ¼ (1 þ j ) pffiffiffi vrc (18:14)
2
This means that a wavelike solution exists as well. However, it is strongly collapsing because the real
and imaginary parts of g are always equal, which means that the attenuation on a path of l wavelength is
exp(2p) ffi 1=535.
The lossless DRC line can be considered to be a special telegraph line having neither serial induc-
tance nor shunt conductance. The telegraph line theory can be conveniently used at the calculation of
uniform DRC networks. The g propagation constant and the Z0 characteristic impedance for the present
case are
rffiffiffiffi
pffiffiffiffiffiffi r
g¼ src, Z0 ¼ (18:15)
sc
With these the two-port impedance parameters and chain parameters of an RC line of length L can be
given as follows:

cth gL 1=sh gL A B ch gL Z0 sh gL
Zij ¼ Z0 , ¼ 1 sh gL ch gL (18:16)
1=sh gL cth gL C D Z0
If one of the ports is terminated by the impedance of Zt, the following impedance can be ‘‘seen’’ on the
opposite port
Zt ch gL þ Z0 sh gL
Zin ¼ Z0 (18:17)
Zt sh gL þ Z0 ch gL
18.1.3 Uniform, Lossy DRC Lines

In some cases, the DRC structure also has shunt conductance, which means that it is lossy. The value of
this conductance for the unit length is notated by g. In such a case, without giving the details of the
calculation, the v(x, t) line voltage can be determined by the solution of the equation
@v 1 @ 2 v g
¼ v (18:18)
@t rc @x2 c
The following forms of the characteristic impedance and the propagation constant can be used now
in the frequency domain
pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi rffiffiffiffiffiffiffiffiffiffiffiffi
r
g ¼ r(g þ sc), Z0 ¼ (18:19)
g þ sc
It is an interesting fact that the charge carrier motion in the base region of homogeneously doped
bipolar transistors can be described by formally similar equations, so that the intrinsic transients of
the bipolar transistors can be exactly modeled by lossy DRC two-ports [5].
Example 18.1. Wiring delays
Neither the series resistance nor the stray capacitances of the interconnection leads of integrated circuits
are negligible. As an example, in the case of a polysilicon line of 1 mm width r ffi 50 kV=mm, c ffi 0.04
pF=mm. This means that these wires should be considered to be DRC lines. The input logical levels
appear on their output with a finite delay. Let us determine the delay of a wire of length L. From
Equation 18.12,
X
1
v(L, t) ¼ U0 2( 1)k erfcð(2k þ 1)qÞ
k¼0
where
L
q ¼ pffiffiffiffiffiffiffiffi
2 t=rc
The value of the summation over k will reach 0.9 at q ¼ 0.5, so that the voltage at the end of the line will
reach the 90% of U0 after a time delay of
tdelay ffi rcL2 (18:20)
Note that the time delay increases with the square of the length of the wire. In the case of L ¼ 1 mm
the time delay of this polysilicon wire is already 2 ns, which is more than the time delay of a CMOS
logical gate. For lengthy wires (>0.2 7 0.5 mm), metal wiring must be applied with its inherently small
resistivity.
Example 18.2. Parasitic effects of IC resistors
In an IC amplifier stage the transistor is loaded with, e.g., R ¼ 10 kV (Figure 18.7a). This resistor has
been fabricated by the base diffusion, the sheet resistance is 200 V, and the parasitic capacitance is
125 pF=mm2. The width of the resistor is 4 mm. Let us determine the impedance of the resistor in the 1
to 1000 MHz range.
The resistance can be realized in 4 3 200 mm size. The total parasitic capacitance is Cp ¼ 0.1 pF. The
impedance of the transistor-side port can be calculated according to Equation 18.17, considering that the
opposite port is short-terminated, as
rffiffiffiffi sffiffiffiffiffiffiffi
r pffiffiffiffiffiffi R pffiffiffiffiffiffiffiffiffiffi
Zport ¼ Z0 th gL ¼ th srcL ¼ th sRCp (18:21)
sc sCp
+VCC abs Z 10 dB/decade

10 kΩ
–90°
Cp R
3.16 kΩ –45°
Phase
1 kΩ 0°
107 108 109 1010
(a) (b) Frequency (Hz)
FIGURE 18.7 A simple IC amplifier stage. (a) The load resistor is in fact a DRC line. (b) The amplitude and phase
plot of the load.
Using the s ¼ jv substitution, along with the actual data, the amplitude and phase functions of
Figure 18.7b can be obtained for the impedance. At 10 MHz, the phase shift caused by the parasitic
capacitance is negligible, but at 100 MHz it is already considerable.
It is important to recognize that in the case of half size linewidths the size of the resistor will be only
2 3 100 mm, which results in one-fourth of the previous value in Cp. This means that the capacitance
becomes disturbing only at four times larger frequencies.
Note in Figure 18.7b that the amplitude function shows a 10 dB=decade decay and the phase keeps to
458, as if the load would be characterized by a ‘‘half pole.’’ This 10 dB=decade frequency dependence
often can be experienced at DRC lines.
18.2 Nonuniform Distributed RC Lines

In some cases, the capacitance and=or the resistance of the DRC line shows a spatial dependency.
This happens if the width of the lead strip is modulated in order to reach some special effects
(Figure 18.8a, tapered RC line). In case of a biased IC resistance, the capacitance changes along the
length of the structure as well because of the voltage dependency of the junction capacitance. These
structures are referred to as nonuniform DRC lines.
Let the spatially dependent resistance and capacitance pro unit length be notated by r(x) and c(x),
respectively. The following equations can be given for the structure:
0 L x x
Resistive Dielectric
sheet layer w = w0 eBx
(a) Ground plate (b)
FIGURE 18.8 Nonuniform distributed RC lines. (a) Tapered line. (b) Exponentially tapered line.
@v @i @v
¼ r(x)i, ¼ c(x) (18:22)
@x @x @t
With these, the following differential equation can be written:

@v 1 @ 1 @v
¼ (18:23)
@t c(x) @x r(x) @x
We can obtain a more convenient form if we consider as an independent variable (instead of the
x spatial co-ordinate) the total r resistance related to a given reference point (e.g., to the x ¼ 0 point),
as follows:
ðx
@r
r(x) ¼ r(j)dj, r(x) ¼ (18:24)
@x
0
The variable defined this way can be considered as a kind of arc-length parameter. It has been introduced
by Protonotarious and Wing [2]. With this new variable
@v 1 @2v
¼ (18:25)
@t K(r) @r2
where
c(x)
K(r) ¼ K ðr(x)Þ ¼ (18:26)
r(x)
The K(r) function describes well the spatial parameter changes of the RC line; that is, the structure
of the line. Therefore, the K(r) function is called the structure function. Those DRC structures for which
the K(r) functions are the same are considered to be electrically equivalent.
Reference [2] uses the s(r) integral or cumulative version of the structure function:
ðr ð
x(r) ð
x(r)
c(x) dr
s(r) ¼ K(r)dr ¼ dx ¼ c(x)dx (18:27)
r(x) dx
0 0 0
This is the total capacitance related to the x ¼ 0 point. This means that the cumulative structure function
is the total capacitance versus total resistance map of the structure. An example of such a map is plotted
in Figure 18.9.
The differential Equation 18.25 is homogeneous and linear; therefore, superposition can be used.
Because this equation is of variable coefficient type, however, analytic solution can be expected only
rarely. Such a case is that of the K ¼ K0=r4 structure function for which

1 K0
v(r, t) ¼ const exp 2 (18:28)
t 3=2 4r t
Another form of Equation 18.25 is also known. To obtain this form, we should turn to the
s domain with
4
Nonuniform DRC line
Lumped resistance
Total capacitance (arbitrary units)

3
2 Lumped
capacitance
1 Uniform DRC line
0
0 2 4 6 8
Total resistance (arbitrary units)
FIGURE 18.9 Cumulative structure function.
1 @ 2v
sv ¼ (18:29)
K(r) @r2
Let us introduce the following new variable:
v(s, r) v v
Z(r) ¼ ¼ ¼ (18:30)
i(s, r) 1 @v @v

r @x @r
This variable is in fact the impedance of the line at the location of r. After rearrangements, the
dZ
¼ 1 þ sK(r)Z2 (18:31)
dr
equation can be obtained. This is called the Riccati differential equation. In the case of a known K(r)
structure function, the one-port impedance of the nonuniform line can be determined from it by
integration. In some cases, even the analytic solution is known. Such a case is the exponentially tapered
line of Figure 18.8b, for which
Rs Rs Cp 1
r(x) ¼ exp (Bx), c(x) ¼ Cp w0 exp (Bx), K(r) ¼ (18:32)
w0 B2 r2
where Rs is the sheet resistance of the structure, Cp is the capacitance per unit area, and r is related to the
point in the infinity. If the port in the infinity is shorted, the impedance of the location of r is
pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
1 þ 4sRs Cp =B2 1
Z(s) ¼ r (18:33)
2sRs Cp =B2
In other cases, numerical integration of Equation 18.31 leads to the solution.

K1
K2 K1, ρ K2, ρ
1 2
ρ1
ρ2
ρ
(a) (b)
FIGURE 18.10 Approximation with concatenated uniform sections. (a) Stepwise approximation of the structure
function. (b) Approximate model.
18.2.1 Approximation with Concatenated Uniform Sections

The following model can be used for approximate calculation of nonuniform structures. We split the
structure function into sections (see Figure 18.10a) and use stepwise approximation. Inside the sections,
K ¼ constant, so that they are uniform sections. Concatenating them according to Figure 18.10b an
approximate model is obtained.
In the frequency domain, the overall parameters of the resultant two-port can be easily calculated. The
chain parameter matrices of the concatenated sections have to be multiplied in the appropriate order.
The time domain behavior can be calculated by inverse Laplace transformation.
18.2.2 Asymptotic Approximation for Large ‘‘s’’

The chain parameters of a nonuniform DRC line can be approximately written as
pffiffi
A B 1 pffiffi l m= s
ffi exp D s pffiffi (18:34)
C D 2 s=m 1=l
where
ð0
R
pffiffiffiffiffiffiffiffiffiffi K(R0 ) 1=4
D¼ K(r)dr, R0 ¼ r(L), l¼ , m ¼ ðK(R0 )K(0)Þ1=4
K(0)
0
This approximation is valid for large s values and for sufficiently smooth function K(r) [2].
18.2.3 Lumped Element Approximation

Distributed RC networks can be approximated by lumped element RC networks as well. The case of a
lossless line is depicted in Figure 18.11a. The element values can be determined in either of the following
two ways.
1. In the case of a known structure spatial discretization can be used. The nonuniform line must be
split into sections of width h (see Figure 18.11b). A node of the network is associated with the
middle of each section. The total capacitance of the section must be calculated, and this gives
the value of the lumped capacitance connected to the node of the section. The resistance between
the middle points of two adjacent sections must be calculated, and this has to be connected
0 h L
x
N1 N2
N2
N1
(a) (b)
FIGURE 18.11 Lumped element approximation. (a) Network model. (b) The line split into sections.
Z(s)
FIGURE 18.12 Cauer equivalent circuit (ladder structure).
between the nodes of the appropriate sections. It is obvious that the accuracy can be increased by
decreasing h. The price is the increasing number of lumped elements. With h ! 0, we obtain the
exact model.
2. When we know the impedance function, we can build the model using the pole-zero pattern of the
network. For example, let us investigate a uniform RC line of finite length L, short-circuited at the
far end. The corresponding impedance expression, according to Equation 18.21, is
1 pffiffiffiffiffiffiffi
Z(s) ¼ pffiffiffiffiffiffiffi th R0 sK0 (18:35)
sK0
where K0 ¼ c=r, R0 ¼ r L. This function has poles and zeroes on the negative real axis in an infinite
number. The zero and pole frequencies are
p2 1 p2 1
szi ¼ (2i)2 , spi ¼ (2i þ 1)2 (18:36)
4 R20 K0 4 R20 K0
where i ¼ 1, 2, . . . , 1. Neglecting all the poles and zeroes situated well above the frequency range
of interest and eliminating successively the remainder poles and zeroes from Equation 18.37 impedance
function the element values of the ladder network in Figure 18.12 (Cauer equivalent) can be obtained
from
Qz
(1 þ s=szi )
Z(s) ¼ R0 Qpi¼1 (18:37)
i¼1 (1 þ s=spi )
18.3 Infinite-Length RC Lines

It was demonstrated earlier in the chapter that the DRC network can be described with the help of the
pole-zero set of its impedance, as in the case of lumped element circuits. However, the number of these
poles and zeroes is infinite. The infinite-length DRC lines generally do not have this property. For this
network category the exact description by discrete poles and zeroes is not possible.
For example, let us consider an infinitely long uniform DRC line. Its input impedance is the
characteristic impedance:
rffiffiffiffi
r
Z(s) ¼ (18:38)
sc
Evidently, this impedance function does not have poles and zeroes on the negative s axis. This is the
general case for a more complex, nonuniform distributed network if the length of the structure is infinite.
pffiffiffiffiffi
The characteristic feature of these impedance functions is that jv factors appear in them. This is why in
the logarithmic amplitude vs. frequency diagram (Bode plot) regions with 10 dB=decade slope appear, as
pointed out in Ref. [1].
This section provides a generalization of the pole and zero notions and the time-constant represen-
tation in order to make them suitable to describe infinitely long distributed one-ports as well.
Before developing new ideas let us summarize the normal, well-known descriptions of a lumped element
RC one-port. The port impedance of such a circuit is described by a rational function with real coefficients, as
(1 þ s=sz1 )(1 þ s=sz2 ) (1 þ s=szn1 )

Z(s) ¼ R0 (18:39)
(1 þ s=sp1 )(1 þ s=sp2 ) (1 þ s=spn )
where R0 is the overall resistance, sp are the poles, and sz are the zeroes (as absolute values). The pole
and zero values, together with the overall resistance value, hold all the information about the one-port
impedance. Thus, an unambiguous representation of this impedance is given by a set of pole and zero
values, and an overall resistance value. This will be called the ‘‘pole–zero representation.’’
Expression 18.39 can be rearranged as
X
n
Ri Xn
Ri
Z(s) ¼ ¼ (18:40)
i¼1
1 þ s=spi i¼1
1 þ sti
where

ti ¼ 1 spi (18:41)
which corresponds directly to the v(t) voltage response for a step-function current excitation:
X
n
v(t) ¼ Ri ð1 exp(t=ti )Þ (18:42)
i¼1
In this case, the impedance is described in terms of the ti time-constants of its response and of the Ri
magnitudes related to it. This will be called the time-constant representation.
18.3.1 Generalization of the Time Constant Representation*

A lumped element one-port can be represented by a finite number of t time-constants and R magnitudes.
A graphic representation of this is demonstrated in Figure 18.13. Each line of this plot represents a time
constant, and the height of the line is proportional to the magnitude. This figure can be regarded as some
* Portions reprinted with permission from Székely, V., IEEE Trans. Circuits Syst., 38, 711, 1991. ß 1991 IEEE.
FIGURE 18.13 A lumped element one-port can be represented with a discrete set of time constants.
(From Székely, V., IEEE Trans. Circuits Syst., 38, 711, 1991. With permission.)
kind of a spectrum, the spectrum of the time constants that appeared in the step-function response of the
network.
The port-impedance of a lumped element network has discrete ‘‘spectrum lines’’ in finite number. An
infinite distributed network has no discrete lines, but it can be described with the help of a continuous
time constant spectrum. The physical meaning of this idea is that in a general response any time constant
can occur in some amount, some density, so that a density spectrum may suitably represent it.
We define the spectrum function by first introducing a new, logarithmic variable for the time and the
time constants:
z ¼ ln t, z ¼ ln t (18:43)
Let us consider a DRC one-port, the response of which contains numerous exponentials having different
time constants and magnitudes. The ‘‘time constant density’’ is defined as
sum of magnitudes between z and z þ Dz

R(z) ¼ lim (18:44)
Dz!0 Dz
From this definition directly follows the fact that the step-function response can be composed from the
time-constant density:
ð
1
v(t) ¼ R(z)½1 expðt= exp (z)Þdz (18:45)

1
This integral is obviously the generalization of the summation in Equation 18.42. If the R(z) density
function consists of discrete lines (Dirac-d pulses), Equation 18.42 is given back.
Using the logarithmic time variable in the integral of Equation 18.45
ð
1
v(z) ¼ R(z)½1 expð exp (z z)Þdz (18:46)

1
a convolution-type differential equation is obtained. Differentiating both sides with respect to z, we

obtain
0.4
0.3
W (z)
0.2
0.1
0
–10 –8 –6 –4 –2 0 2 4 6
z (octave)
FIGURE 18.14 The shape of the W(z) function. (From Székely, V., IEEE Trans. Circuits Syst., 38, 711, 1991. With
permission.)
d
v(z) ¼ R(z) W(z) (18:47)
dz
where
W(z) ¼ expðz exp (z)Þ (18:48)
is a fixed weighting function with shape depicted in Figure 18.14, and is the symbol of the convolution
operation [3].
It can be proved that the area under the function W(z) is equal to unity
ð
1
W(z)dz ¼ 1 (18:49)
1
This means that
ð
1
R(z)dz ¼ v(t ! 1) ¼ R0 (18:50)

1
where R0 is the zero-frequency value of the impedance. In other words, the finite step-function response
guarantees that the time-constant density has finite integral.
18.3.2 Generalization of the Pole-Zero Representation

The task is now to substitute the pole-zero pattern of the lumped network with a continuous (eventually
excepting some discrete points) function to describe the general distributed parameter network.
As emphasized above, the Bode plot of a distributed parameter network frequently shows regions with
a 10 dB=decade slope. Figure 18.15 presents such an amplitude diagram. Using poles and zeroes, we can
only approximate this behavior. If we place to point v1 a pole, the Bode plot turns to the decay of
20 dB=decade, which is too steep. If a zero is placed, the diagram returns to the zero-slope. However, if we
alternate poles and zeroes in a manner that the mean value of the slope should give the prescribed one,
a(ω)
ω1 lg ω
10 dB/decade
FIGURE 18.15 The 10 dB=decade decay of a DRC line amplitude plot can be approximated with an alternative
sequence of poles and zeroes. (From Székely, V., IEEE Trans. Circuits Syst., 38, 711, 1991. With permission.)
then any slope can be approximated. (For the previously-mentioned case, if the zeroes are situated exactly
midway between the adjacent poles, then the mean slope is 10 dB=decade.) The suitability of the
approximation depends on the density of poles and zeroes and can be improved by increasing the
density. In this case, the network-specific information is not carried by the number of poles and zeroes
(their number tends to infinity), but by the relative position of the zeroes between the adjacent poles.
An alternative interpretation is also possible. The pair of a neighboring pole and zero constitutes a
dipole. The ‘‘intensity’’ of that dipole depends on the distance between the pole and the zero. If they
coincide and cancel each other, then the intensity is equal to zero. If the zero is situated at the maximal
distance from the pole (i.e., it is at the next pole), the intensity reaches its maximal value. We choose this
to be the unity.
For later convenience, we turn to a logarithmic variable on the negative s-axis:
S ¼ ln (s) (18:51)
Let us investigate a DS interval of the logarithmic S-axis bounded by two adjacent poles. The distance
between the left-hand pole and the inner zero is dS. Now, suppose that the density of the poles tends to
infinity; i.e., DS becomes infinitely small. In this case the ‘‘dipole intensity function’’ is
dS
Id (S) ¼ lim (18:52)
DS!0 DS
Considering that the poles and zeros of an RC port-impedance alternate, it follows that 0 Id 1. For an
infinite, distributed RC two-pole the dipole intensity generally has regions in which the Id value is
between 0 and 1. For example, if the Bode plot shows a slope of 10 dB=decade, the value of Id equals 0.5.
This occurs in the case of an infinite, uniform RC line. For discrete circuits, the Id function has only two
possible values: 0 or 1.
18.3.3 Relations among R(z), Id(S), and the Impedance Function

Obviously, we needed one-to-one relations between the time constant density or the dipole intensity
representation and the impedance expression of the one-port. (For the lumped element case Equations
18.39 and 18.40 give these correspondences).
Rather simple relations exist among the R(z), Id(S), and the Z(s) impedance function (see below). An
interesting feature of these relations is a striking mathematical symmetry: the same expression couples
the time constant density to the impedance and the dipole intensity to the logarithmic impedance. The
detailed proofs of the relations presented here are given in Ref. [4].
If the Z(s) complex impedance function is known, R(z) or Id(S) can be calculated as*
1
R(z) ¼ Im Zðs ¼ exp (z)Þ (18:53)
p
1
Id (S) ¼ Im ðln Zðs ¼ exp (S)ÞÞ (18:54)
p
If the R(z) or Id(S) function is known
ð
1
exp (S x)
Z(S) ¼ R0 R(x) dx (18:55)
1 þ exp (S x)
1
ð
1
exp (S x)
ln Z(S) ¼ ln R0 Id (x) dx (18:56)
1 þ exp (S x)
1
where S is the complex-valued logarithm of the complex frequency:
S ¼ ln s (18:57)
Using the integral Equations 18.55 and 18.56, however, we must keep at least one from the two
conditions:
1. s is not located on the negative real axis.
2. If s is located on the negative real axis then, at this point, and in a e ! 0 neighborhood, R(z) or
Id(S) must be equal to 0.
Note that Equations 18.53 through 18.56 are closely related to the Cauchy integral formula of the
complex function theory. Substituting Equation 18.53 into 18.55 and exploiting some inherent properties
of the RC impedance functions after some mathematics, the Cauchy integral results. The same is true for
Equations 18.54 and 18.56.
An important feature of the transformations of Equations 18.53 and 18.55 is that they are linear. This
means that the Z(s) 3 R(z) transformation and the summation are interchangeable.
18.3.4 Practical Calculation of the R(z) Functiony

Equation 18.53 suggests that only the jv imaginary frequency has to be replaced by the s ¼ exp(z)
complex frequency, and then the imaginary part of the calculated complex response multiplied by 1=p
provides the time-constant spectrum.
However, the procedure is not as simple as that because of the use of Equation 18.53. This equation
requires a great amount of caution. As the equation shows, the imaginary part of the Z impedance has to
be calculated along the negative real axis of the complex plane. Along this axis, singularities usually lie:
the poles of the network equation of lumped circuits or some singular lines in the case of distributed
* For Equation 12.53 Z(s ! 1) ¼ 0 is supposed.

y
Portions reprinted, with permission, from Székely, V. and Rencz, M., IEEE Trans. Compon. Pack. Technol., 23(3), 587, 2000.
ß 2000 IEEE.
systems. These singularities can prevent the use of Equation 18.53 for the calculation of the time-constant
spectrum.
We can overcome these difficulties by adapting an approximate solution. In order to walk around the
‘‘dangerous’’ area, we have to avoid following the negative real axis. A line that is appropriately close to
this axis might be used instead [9], like
s ¼ ( cos d þ j sin d) exp (z) (18:58)
Obviously, the d angle has to be very small, not more than 28–58. Even if this angle is small, an error is
introduced into the calculation. It can be proven that the calculated RC(z) time-constant spectrum can be
expressed with the exact one by the following convolution equation:
pd
RC (z) ¼ R(z) er (z) (18:59)
p
where
1 sin d exp (z)

er (z) ¼ (18:60)
p d 1 2 cos d exp (z) þ exp (2z)
This function is a narrow pulse of unity area. The error of the calculation is represented by this function.
Diminishing d the er(z) function becomes narrower and narrower. Thus, any accuracy requirement can
be fulfilled by choosing an appropriately small d angle. The half-value width, which is a measure of the
resolution, is given by
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
De ¼ 2 ln 2 cos d þ (2 cos d)2 1 ffi 2d (18:61)
If, for example, d ¼ 28, then the resolution is 0.1 octave, which means that two poles can be distinguished
if the ratio between their frequencies is greater than 1.072.
Obviously, the calculated result has to be corrected with the factor of p=(p d).
Example 18.3
A tight analogy exists between electrical conductance and heat flow. Heat-conducting media, which can
be characterized with distributed heat resistance and distributed heat capacitance, behave similarly to
the electrical DRC networks. The analogous quantities are as follows:
Voltage ! Temperature
Current ! Power flow
Resistance ! Thermal resistance
Capacitance ! Heat capacitance
In the simplest model law, 1 V voltage corresponds to 18C, 1 A current to 1 W power, etc., but different
mapping can be applied as well.
The described analogy means that the tool set that is used to treat DRC networks can be applied to the
calculation of heat-flow problems as well. This fact provides a direct way to calculate time-constant
spectra in thermal field solver programs. These are thermal simulation tools suitable to solve the model
equations in the s-domain. By using the substitution of Equation 18.58, some of these programs calculate
directly the thermal time-constant spectrum of different structures [9]. As an example, a transistor
package, presented in Figure 18.16a, was simulated. The time-constant spectrum calculated by the field
10000
Package
1000
R(z) (K/W/decade)
100
10
Pin 0.1
Chip 0.001 0.01 0.1 1 10 100
(a) (b) Time-constant (s)
FIGURE 18.16 A transistor package and its time-constant spectrum. (a) Simulated transistor package. (b) Time-
constant spectrum calculated by the field solver. (From Székely, V. and Rencz, M., IEEE Trans. Compon. Pack.
Technol., 23, 587, 2000. With permission.)
solver is plotted in Figure 18.16b. It is clearly visible that besides the two dominant time-constants a large
number of further time-constants appear in the spectrum.
18.4 Inverse Problem for Distributed RC Circuits

Equation 18.47 offers a direct way to determine the time-constant density from the (measured or
calculated) response function, which means that it is a method for the identification of RC one-ports.
Using Equation 18.47 for a measured time domain response function, the time-constant density of the
one-port impedance can be determined. By using this method, equivalent circuits can be constructed
easily. This possibility is of considerable practical importance [8]; however, only approximate results can
be obtained because the calculation leads to the inverse operation of the convolution. This operation
can be done only approximately.
A possibility exists for identification in the frequency domain as well. Introducing the V ¼ ln v
notation for the frequency axis, convolution-type equations can be found [8] between the R(z) time-
constant density and the Z(v) complex impedance:
d
Re Z(V) ¼ R(z ¼ V) WR (V) (18:62)
dV
Im Z(V) ¼ R(z ¼ V) WI (V) (18:63)
where the weight-functions are
2 exp (2 V)
WR (V) ¼ (18:64)
ð1 þ exp (2 V)Þ2
exp (V)
WI (V) ¼ (18:65)
1 þ exp (2 V)
Moreover, a direct convolution relation exists between the Bode diagram of the impedance and the
dipole intensity. Considering the Bode amplitude and phase diagrams, i.e., by using ln(Z(V)) ¼ ln abs
(Z(V)) þ jarcus(Z(V)), we obtain
d
ln absðZ(V)Þ ¼ Id (V) WR (V) (18:66)
dV
arcusðZ(V)Þ ¼ Id (V) WI (V) (18:67)
These equations may also be used for identification.
18.4.1 Network Identification by Deconvolution

All the relations between the R(z) time-constant spectrum and the different network responses are of
convolution type Equations 18.47, 18.62, and 18.63. Knowing some kind of network responses the inverse
operation of the convolution: the deconvolution leads to the R(z) function. The same is true for
Equations 18.66 and 18.67 of the Id(S) dipole intensity. This means that the problem of identification
of DRC networks is reduced to a deconvolution step. This method, called network identification by
deconvolution (NID), is discussed in detail in Ref. [8], together with the appropriate deconvolution
methods.
An important fact is that if we know the time response or only the real or the imaginary part of
the frequency response, the network can be completely identified. (Noise effects produce practical
limits—see later.)
1 kΩ 2 kΩ 1 kΩ 2 kΩ
Z(s)
316 nF 50 nF 31.6 nF 5 nF
τ= 316 μs 100 μs 31.6 μs 10 μs
(a)
7
6
Real part
5
4
Impedance (kΩ)
3
2 Imaginary part
1
0
–1
–2
–3
1e – 1 1 1e + 1 1e + 2 1e + 3 1e + 4 1e + 5 1e + 6 1e + 7 1e + 8
(b) Frequency (Hz)
FIGURE 18.17 RC ladder and the frequency response of the Z(v) impedance. (a) Investigated RC network. (b) Real
and the imaginary parts of the impedence. (From Székely, V., IEEE Trans. Circuits Syst.—I. Theory Appl., 45,
244, 1998. With permission.)
Example 18.4
For the sake of simplicity, a ‘‘lumped circuit problem’’ will be discussed first. The investigated
RC network is given in Figure 18.17a. We have calculated the frequency response of the
Z(s) port-impedance of this circuit by using a standard circuit-simulator program, with a 40
point=frequency-decade resolution. Both the real and the imaginary parts of this impedance are
plotted in Figure 18.17b.
In order to apply Equation 18.62, the derivative of the real part was calculated numerically. The
result is shown in Figure 18.18a. In the next step, this function was deconvolved by the WR(V)
function. The result is plotted in Figure 18.18b. This function is the approximate time-constant
density of the network. We expect that this function depicts the pole-pattern of the circuit. This is in
fact obtained: the four peaks of the function are lying at f ¼ 497.7, 1,585, 4,908, and 15,850 Hz. These
3.5
3
Re(Z(Ω)) (kΩ/decade)
2.5
1.5
1
dΩ
d
0.5
1e–1 1 1e+ 1 1e+ 2 1e+3 1e +4 1e + 5 1e + 6 1e + 7 1e + 8

(a) Frequency (Hz)
14
12
10
R(Ω) (kΩ/decade)
1e–1 1 1e + 1 1e + 2 1e + 3 1e + 4 1e+5 1e+6 1e+7 1e+8

(b) Frequency (Hz)
FIGURE 18.18 Identification steps. (a) Derivative of Real(Z). (b) The identified time-constant spectrum.
(From Székely, V., IEEE Trans. Circuits Syst.—I. Theory Appl., 45, 244, 1998. With permission.)
values correspond to the time constants of 320, 100.4, 32.43, and 10.04 ms, respectively. The ratios of
the peak areas are about 1:2:1:2. These data agree well with the actual parameters of the circuit in
Figure 18.17a.*
Notice that the noise corrupting the Z(v) function considerably affects the result of the identi-
fication. In order to reach 1 octave resolution of R(z) along the frequency axis, about 68 dB noise
separation is needed in Z(v). Detailed discussion of the noise effects on the identification can be found in
Ref. [8].
Example 18.5
As a second example, let us discuss the thermal identification of a semiconductor package þ heat sink
structure. The analogy between electrical current and heat flow introduced in Example 18.3 will be
applied again.
Between a semiconductor chip and its ambient a complex distributed thermal structure exists consisting
of many elements. The main parts of it are the chip itself, the soldering, the package, mounting to the heat
sink, the heat sink itself, and the ambience. This is obviously a distributed thermal RC network, the input-
port of which is the top surface of the chip and the far end is the ambience (the world). Thus, the structure
can be considered practically infinite. This means that we have to examine a nonuniform infinite-length
DRC network.
Investigations in the time domain require recording the thermal step-response of the system.
A thermal test chip can be used for this purpose, containing appropriate heating elements that can
assure step-function power excitation. The temperature rise is measured by the forward voltage change of
a pn junction integrated into the test chip as well. This is the thermal response function. Such a thermal
response is plotted in Figure 18.19a. The time range of the measurement is strikingly wide: 9 decades,
from 10 ms to some thousand s. This is indispensable since the thermal time constants of the heat-flow
structure vary over a wide range.
According to Equation 18.47, after numerical derivation of the step-response and by a consecutive
deconvolution, the time constant density function R(z) can be obtained (see Figure 18.19b). Because of
the quantization noise and measuring error the deconvolution operation can be done only approximately
with a 1 7 1.5 octave resolution. A suitable algorithm is discussed in Ref. [7]. Figure 18.19b illustrates
that, in the 100 ms to 10 s interval, time constants spread over a relative wide range. This refers to the
distributed structure of the chip and the package. At t 1000 s, a relatively sharp, distinct time constant
appears. This can be identified as originating from the heat capacitance of the whole heat sink and the
heat sink-ambience thermal resistance.
Splitting the resultant time constant spectrum into Dt time slots, each of these slots can be approxi-
mated by a Dirac-d spectrum line proportional in height to the appropriate slot area. These give the data
of a lumped element approximation according to Equation 18.40. Now, the equivalent circuit of the heat-
flow structure can be generated either in Foster or in Cauer normal form.
Using the Cauer-approximation of the DRC line we can calculate the approximate K(r) and s(r)
structure functions. From these functions, the heat-conducting cross-section areas, the heat flow path
length, etc. can be derived. This means that geometric and physical data of the heat-flow structure can be
extracted and checked with the help of an electrical measurement. The structure function calculated from
the measurement results of Figure 18.19 is plotted in Figure 18.20. It is easy to read out, e.g., the Chs heat
capacitance of the heat sink. For more details, see Refs. [6,10].
* Example reprinted with permission from Székely, V., IEEE Trans. Circuits Syst.—I. Theory Appl., 45(3), 244, 1998. ß 1998
IEEE.
50
45
40
Temperature rise (°C)

35
30
25
20
15
10
5
0
1e−05 0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
(a)
10
Time constant density (K/W)
0.1
0.01
1e−05 0.0001 0.001 0.01 0.1 1 10 100 1000
(b) Time constant (s)
FIGURE 18.19 Thermal identification of a package þ heat sink structure. (a) Thermal response between 10 ms
and 4000 s. (b) The R(z) time-constant density function.
10000
1000
100
Chs
10
Cth (Ws/K)
0.1
0.01
0.001
0.0001
0 1 2 3 4 5 6 7 8 9
Rth (K/W)
FIGURE 18.20 Cumulative structure function of the package þ heat sink structure identified from the response
function.
References
1. M. S. Ghausi and J. J. Kelly, Introduction to Distributed Parameter Networks, New York: Holt,
Rinehart & Winston, 1968.
2. E. N. Protonotarios and O. Wing, Theory of nonuniform RC lines, Part I, IEEE Transactions on
Circuit Theory, 14, 2–12, Mar. 1967.
3. D. G. Gardner, J. C. Gardner, G. Laush, and W. W. Meinke, Method for the analysis of multi-
component exponential decay curves, Journal of Chemical Physics, 31(4), 978–986, Oct. 1959.
4. V. Székely, On the representation of infinite-length distributed RC one-ports, IEEE Transactions on
Circuits and Systems, 38, 711–719, July 1991.
5. R. L. Pritchard, Electrical Characteristics of Transistors, New York: McGraw-Hill, 1967.
6. V. Székely and T. Van Bien, Fine structure of heat flow path in semiconductor devices: A measure-
ment and identification method, Solid-State Electronics, 31, 1363–1368, Sept. 1988.
7. T. J. Kennett, W. V. Prestwich, and A. Robertson, Bayesian deconvolution. I: Convergent properties,
Nuclear Instruments and Methods, 151, 285–292, 1978.
8. V. Székely, Identification of RC networks by deconvolution: Chances and limits, IEEE Transactions
on Circuits and Systems—I. Theory and Applications, 45(3), 244–258, Mar. 1998.
9. V. Székely and M. Rencz, Thermal dynamics and the time constant domain, IEEE Transactions on
Components and Packaging Technologies, 23(3), 587–594, Sept. 2000.
10. V. Székely, Restoration of physical structures: An approach based on the theory of RC networks,
Proceedings of the ECCTD’99, European Conference on Circuit Theory and Design, Stresa, Italy,
29 Aug.–2 Sept. 1999, pp. 1131–1134.
19
Synthesis of Distributed
Circuits
19.1 Generic Relations................................................................... 19-1
19.2 Synthesis of a Capacitance................................................... 19-3
19.3 Synthesis of an Inductance.................................................. 19-4
19.4 Synthesis of a Resistance...................................................... 19-5
19.5 Synthesis of Transformers ................................................... 19-7
19.6 Synthesis Examples................................................................ 19-9
Series L–C Circuit . Parallel L–C Circuit . Series L–C–R
Circuit . Parallel L–C–R Circuit . Low-Pass Filters .
High-Pass Filters . Bandpass Filters . Bandstop Filters .
Further Comments on Distributed Circuit Filters
19.7 Synthesis of Couplers.......................................................... 19-18
Generic Relations . Proximity Couplers .
Thomas Koryu Ishii Quarter-Wavelength Couplers . Lange Couplers
Marquette University References .......................................................................................... 19-21
19.1 Generic Relations

The starting procedure for the synthesis of distributed circuits is the same as for the conventional
synthesis of lumped parameter circuits. If a one-port network is to be synthesized, then a desired driving-
point immittance H(s) must be defined first, where
s ¼ s þ jv (19:1)
is the complex frequency, s is the damping coefficient of the operating signal, and v is the operating
angular frequency. If a two-port network is to be synthesized, then a desired transmittance T(s) must be
defined first.
According to conventional principles of network synthesis [1], for the one-port network, H(s) is
represented by
P(s) an sn þ an1 sn1 þ þ a1 s þ a0

H(s) ¼ ¼ (19:2)
Q(s) bm sm þ bm1 sm1 þ þ b1 s þ b0
where
an and bm are constants determined by the network parameters
Q(s) is a driving function
P(s) is the response function
19-1
for a two-port network
P(s) an sn þ an1 sn1 þ þ a1 s þ a0

T(s) ¼ ¼ (19:3)
Q(s) bm sm þ bm1 sm1 þ þ b1 s þ b0
Both H(s) and T(s) should be examined for realizability [1] before proceeding.
If the summation of even-order terms of P(s) is M1(s) and the summation of odd-order terms
of P(s) is N1(s), then
P(s) ¼ M1 (s) þ N1 (s) (19:4)
Similarly,
Q(s) ¼ M2 (s) þ N2 (s) (19:5)
For a one-port network the driving-point impedance is synthesized by [1]
N1 (s)
Z(s) ¼ (19:6)
M2 (s)
or
M1 (s)
Z(s) ¼ (19:7)
N2 (s)
For a two-port network [1], if P(s) is even, the transadmittance is
P(s)=N2 (s)
y21 ¼ (19:8)
1 þ ½M2 (s)=N2 (s)
the open-circuit transfer admittance is
P(s)
y21 ¼ (19:9)
N2 (s)
and the open-circuit output admittance is
M2 (s)
y22 ¼ (19:10)
N2 (s)
If P(s) is odd,
P(s)=N2 (s)
y21 ¼ (19:11)
1 þ ½M2 (s)=N2 (s)
P(s)
y21 ¼ (19:12)
M2 (s)
and
N2 (s)
y22 ¼ (19:13)
M2 (s)
Synthesis of Distributed Circuits 19-3
In both cases,
y21 (s)
y11 ¼ (19:14)
n
where n is the current-ratio transfer function from port 1 to port 2. From these y- or z-parameters, the
required values for the network components, i.e., L, C, and R, can be determined [1].
In high-frequency circuits the L, C, and R may be synthesized using distributed circuit components.
The synthesis of distributed components in microstrip line and circuits is the emphasis of this chapter.
19.2 Synthesis of a Capacitance

If the required capacitive impedance is jXC V, the capacitance is
1
C¼ (19:15)
vXC
where
XC > 0 (19:16)
and v is the operating angular frequency. In a distributed circuit the capacitance C is often synthesized
using a short section of a short-circuited transmission line of negligibly small transmission line loss. If the
characteristic impedance of such a transmission line is Z0, the operating transmission line wavelength is
ll, and the length of the transmission line is l in meters, then [2]
2pl
jXC ¼ jZ0 tan (19:17)
ll
where
ll ll
<l<
4 2
or, more generally,
nll ll nll ll
þ <l< þ (19:18)
2 4 2 2
and n is an integer. Detailed information on Z0 and ll is given in Chapter 15. Combining Equations 19.15
and 19.17,
1
C¼ (19:19)
vZ0 tan 2pl
ll
In practical synthesis, the transmission line length must be determined. The design equation is

ll 1 1
l¼ tan (19:20)
2p vCZ0
Thus, the capacitance C can be synthesized using a section of a short-circuited transmission line.
If an open-circuited transmission line is used instead, then

ll 1 1 1
l¼ tan1 þ (19:21)
2 p vCZ0 2
Equation 19.19 is valid provided that Equation 19.20 is used for l or,
ll
l¼ tan1 vCZ0 (19:22)
2
where
nll ll nll
<l< þ (19:23)
2 4 2
If an open-circuited transmission line section is used instead of the short-circuited transmission line
section, just add ll=4 to the line length.
19.3 Synthesis of an Inductance

If the required inductive impedance is þjXL V, the inductance is
XL
L¼ (19:24)
v
where
XL > 0 (19:25)
and v is the operating angular frequency. In a distributed circuit the inductance L is often synthesized
using a short section of a short-circuited transmission line of negligibly small transmission line loss. If the
characteristic impedance of such a transmission line is Z0, the operating transmission line wavelength is
ll, and the length of transmission line is l meters, then [2]
2pl
jXL ¼ jZ0 tan (19:26)
ll
where
ll
0<l< (19:27)
4
or, more generally,
nll nll ll
<l< þ (19:28)
2 2 4
and n is an integer. Detailed information on Z0 and ll is given in Chapter 15.

Combining Equations 19.24 and 19.26
Z0 l
L¼ tan 2p (19:29)
v ll
In practical synthesis, the transmission line length must be designed. The design equation is
ll vL
l¼ tan1 (19:30)
2p Z0
Thus, the inductance L can be synthesized using a section of a short-circuited transmission line.
If an open-circuited transmission line is used instead, then

ll 1 1 vL 1
l¼ tan þ (19:31)
2 p Z0 2
Equation 19.29 is valid for the open-circuited transmission line provided that Equation 19.31 is used
for l or
ll Z0
l¼ tan1 (19:32)
2p vL
where
nll ll ll nll
þ <l< þ (19:33)
2 4 2 2
If an open-circuited transmission line is used instead of the short-circuited transmission line section, just
add ll=4 to the short-circuited transmission line design.
19.4 Synthesis of a Resistance

A distributed circuit resistance can be synthesized using a lossy transmission line of length l with the line
end short or open-circuited. When the line end is short-circuited, the input impedance of the line of
length l and characteristic impedance Z_ 0 is [2]
Z_ i ¼ Z_ 0 tanh gl
_ (19:34)
where the propagation constant is
g_ ¼ a þ jb (19:35)
a is the attenuation constant, and b is the phase constant of the line. Assuming Z0 is real, the input
impedance becomes a pure resistance, i.e., the reactance becomes zero, when
2pl 1 3 5
bl ¼ ¼ p, p, p, . . . (19:36)
ll 2 2 2
When
p
bl ¼ (2n þ 1) (19:37)
2
and where
n ¼ 0, 1, 2, 3, . . . (19:38)
the short-circuited transmission line is at antiresonance. When
p
bl ¼ 2n (19:39)
2
and where
n ¼ 1, 2, 3, . . . (19:40)
the transmission line is at resonance.

When the transmission line is at antiresonance, the input impedance is [2]
l
a(2nþ1) 2l
1þe
Z_ i ¼ Z_ 0 ll (19:41)
1 ea(2nþ1) 2
If
Z_ 0 Z0 (19:42)
the input resistance is
ll
1 þ ea(2nþ1) 2
R i Z0 ll (19:43)
1 ea(2nþ1) 2
where
ll
l ¼ (2n þ 1) (19:44)
4
When the transmission line section is at resonance, the input resistance is
1 eanll
Ri Z0 (19:45)
1 þ eanll
if Equation 13.41 holds, where
ll
l¼n (19:46)
2
From transmission line theory, a and b can be determined from the transmission line model
parameters as [2]
vLG þ BR
a¼ (19:47)
2b
( pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi)12
vLB RG þ (RG vLB)2 þ (vLG þ BR)2
b¼ (19:48)
2
where
L is the series inductance per meter
G is the shunt conductance per meter
B is the shunt susceptance per meter
R is the series resistance per meter of the transmission line section
The characteristic impedance of a lossy line is [2]
Z_ 0 ¼ R0 þ jX0 (19:49)
n pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffio12
RG þ vLB þ (RG vLB)2 þ (vLG BR)2
R0 ¼ pffiffiffipffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi (19:50)
2 G2 þ B2
1 vLG BR
X0 ¼ (19:51)
2R0 G2 þ B2
or simply from Equation 13.34
1 Ri
l¼ tanh1 (19:52)
g_ Z_ 0
to determine l for desired Ri for synthesis.

In practical circuit synthesis, convenient, commercially available, surface-mountable chip resistors are
often used. Integrated circuit resistors are monolithically developed. Therefore, the technique described
here is seldom used.
19.5 Synthesis of Transformers

An impedance Z_ 1 can be transformed into another impedance Z_ 2 using a lossless or low-loss transmis-
sion line of length l and characteristic impedance Z0 [2]:
Z_ 1 þ jZ0 tan 2pl

Z_ 2 ¼ Z0
ll
(19:53)
Z0 þ jZ_ 1 tan 2pl ll
where ll is the wavelength on the transmission line. Solving Equation 19.53 for l,
ll Z0 (Z_ 2 Z_ 1 )
l¼ tan1 2 (19:54)
2p j Z0 Z_ 1 Z_ 2
In Equation 19.53, if
ll
l¼ (19:55)
4
then

Z_ 2 ¼ Z02 Z_ 1 (19:56)
This is a quarter wavelength transmission line transformer. A low-impedance Z_ 1 is transformed into a

new high-impedance Z_ 2, or vice versa. A capacitive Z_ 1 is transformed into an inductive Z_ 2, or vice versa.
However, Z0 is usually real, which restricts the available transformed impedances.
An admittance Y_ 1 can be transformed into another admittance Y_ 2 using a lossless or low-loss
transmission line of length l and characteristic admittance Y_ 0 [2]
Y_ 1 þ jY0 tan 2pl

Y_ 2 ¼ Y0 ll
(19:57)
Y0 þ jY_ 1 tan 2pl
ll
Solving Equation 19.56 for l,

_ _
ll 1 Y0 Y2 Y1
l¼ tan (19:58)
2p j Y02 Y_ 1 Y_ 2
In Equation 19.57, if
l1
l¼ (19:59)
4
then

Y_ 2 ¼ Y02 Y_ 1 (19:60)
This is a one quarter-wavelength transmission line transformer. A low-admittance Y_ 1 is transformed into

a new high-admittance Y_ 2, or vice versa. A capacitive Y_ 1 is transformed into an inductive Y_ 2, or vice
versa. However, Y0 is usually real, which restricts the available transformed admittances.
The transforming method Equations 19.53 and 19.57 cannot transform Z_ 1 to every possible value of
_Z 2, especially when the value of Z0 is given. In practice, this is often the case. If this is the case and Z_ 1 is
complex, use Equation 19.53 first to transform Z_ 1 to Z_ 20 , where
Z_ 20 ¼ R02 þ jX20 (19:61)
and
R02 ¼ R2 (19:62)
where
Z_ 2 ¼ R2 þ jX2 (19:63)
Then, synthesize X2 X20 and add it in series at the input of the transmission line, as depicted in
Figure 19.1. Then,

ℓ Z_ 2 ¼ Z_ 20 þ j X2 X20
X2 –X΄2 ¼ R02 þ jX20 þ jX2 jX20
¼ R02 þ jX2
. . .
Z1 Z ΄2 Z2 ¼ R2 þ jX2 (19:64)
Thus, Z_ 1 can be transformed to any Z_ 2

desired.
FIGURE 19.1 Synthesis of Z_ 1 to any Z_ 2 transformer. In a similar manner, to transform a shunt
admittance Y_ 1 to any other shunt admit-
tance Y_ 2, first transform Y_ 1 to Y_ 20 so that
Y_ 20 ¼ G02 þ jB02 (19:65)

. .
Y1 B2 – B΄2 Y2
and
.
Y 2΄
G02 ¼ G2 (19:66)
FIGURE 19.2 Synthesis of any Y_ 2, from Y_ 1 transformation.

where
Y_ 2 ¼ G2 þ jB2 (19:67)
Then, synthesize B2 B02 and add it in shunt at the input of the transmission line as depicted in Figure
19.2. Then,

Y_ 2 ¼ Y_ 20 þ j B2 B02
¼ G02 þ jB02 þ jB2 jB02
¼ G02 þ jB2 ¼ G2 þ jB2 (19:68)
Thus, Y_ 1 can be transformed to any Y_ 2 desired.
19.6 Synthesis Examples

Distributed circuits can be synthesized using a number of transmission line sections. The transmission
line sections include waveguides, coaxial lines, two-wire lines, and microstrip lines and coplanar
waveguides. In this section, distributed circuit synthesis examples of distributed circuits using microstrip
lines are presented for convenience. Similar techniques can be utilized for other types of transmission
lines.
19.6.1 Series L–C Circuit

A series L–C circuit as illustrated in Figure 19.3 is considered to be a phase delay line in distributed line
technology. The series impedance of an L–C circuit is j(vL 1=vC). If the load is a resistance of RL V,
then the phase delay in the output voltage is
vL vC
1
Du ¼ tan1 (19:69)
RL
L C The phase ‘‘delay’’ should be interpreted alge-

braically. Depending on the size of vL and
.
.
Vo = Vε j(θ + Δθ) vC, Du can be either ‘‘þ’’ or ‘‘.’’ If it is
Vi = Vε jθ
delay, the sign of Du is ‘‘’’ and if it is
advance, the sign of Du must be ‘‘þ’’ in
Figure 19.3.
If the phase constant of the microstrip
. . line is
Vi = Vε jθ Vo = Vε j(θ + Δθ)
2p
b¼ (19:70)
li
FIGURE 19.3 Synthesis of a series L–C circuit using a where l1 is the wavelength on the line, then
microstrip meander line. the synthesizing equation is
Du ¼ bl (19:71)
or
Du ll vL vC
1
l¼ ¼ tan1 (19:72)
b 2p RL
Usually, the delay line takes the form of a meander line in microstrip line, as illustrated in Figure 19.3.
19.6.2 Parallel L–C Circuit

A parallel L–C circuit (see Figure 19.4) can be synthesized using distributed circuit components. In this
figure, the open-circuited microstrip line length l1 represents inductive shunt admittance and the synthesis
equation is given by Equation 19.31. In Figure 19.4 another open-circuited microstrip line length l2
represents capacitive shunt admittance. The synthesis equation for this part is given by Equation 19.21.
19.6.3 Series L–C–R Circuit

If the load resistance connected to the
output circuit of a series L–C–R circuit
. L C . (see Figure 19.5) is RL, then the output
Vi Vo
voltage V_ o of this network across RL due
to the input voltage V_ i is
RL V_ i
Vo ¼
RL þ R þ j vL vC
1
ℓ1 >
λℓ RL V_ i
4 ¼ (19:73)
Ze jf
. .
Vi Vo where
λℓ
ℓ2 < sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
ffi
4
1 2
Z ¼ (RL þ R) þ vL 2
vC
FIGURE 19.4 Synthesis of a parallel L–C circuit using a micro-
strip line circuit. (19:74)
vL vC
1 L C R
f ¼ tan1 (19:75)
RL þ R . .
Vi Vo
Thus,
RL
V_ o ¼ V_ i ejf (19:76)
Z
. .
Vi Vo
In a distributed circuit, such as the microstrip
line in Figure 19.5,
Vo ¼ V_ i eal ejbl (19:77) FIGURE 19.5 Synthesis of a series L–C–R circuit.
where
a is the attenuation constant
b is the phase constant
l is the total length of the microstrip line
Then, comparing Equations 13.76 with 13.75,
RL
eal ¼ (19:78)
Z
or
Z
al ¼ ln (19:79)
RL
and
bl ¼ f (19:80)
19.6.4 Parallel L–C–R Circuit

A parallel L–C–R circuit can be synthesized
using the microstrip line (see Figure 19.6). In
. .
this figure, the microstrip of length l1, char- Vi L R C Vo
acteristic impedance Z_ 01, attenuation con-
stant a1, and phase constant b1 represents a
parallel circuit of inductance L and 2R.
Another microstrip line of length l2, charac- α1 .
teristic impedance Z_ 02, attenuation constant Z01
a2, and phase constant b2 represents a paral- β1 . ℓ1 .
lel circuit of capacitance C and 2R. Vi Vo
The input admittance of the open-
circuited lossy microstrip line is α2 .
Z 02 ℓ2
β2
1
Y_ i ¼ tanh (a1 þ jb1 )l1 (19:81)
_Z01
FIGURE 19.6 Synthesis of a parallel L–C–R circuit.
In a parallel L–2R circuit, the parallel admittance is
1 1
Yi ¼ þ (19:82)
2R jvL
The synthesis equation for the inductive microstrip line is

1 _ 1 1
(a1 þ jb1 )l1 ¼ tanh Z01 j (19:83)
2R vL
Similarly, for the capacitive microstrip line,

1
(a2 þ jb2 )l2 ¼ tanh 1
Z_ 02 þ jvC (19:84)
2R
To synthesize this distributed circuit, Equations 19.82 and 19.83 must be solved. These are transcendental
equations of an excess number of unknowns to be determined by trial and error. Therefore, a digital
computer is needed. In many cases, lossless lines are used for L and C and a shunt chip resistor is used for
R to avoid complications.
19.6.5 Low-Pass Filters

If the load resistance of a low-pass filter, as presented in Figure 19.7 is RL, then the admittance across
RL is
1
Y_ L ¼ þ jvC (19:85)
RL
If this is synthesized using the microstrip line shown in Figure 19.7, then the normalized admittance of
the microstrip line is
~_ Y_ L ¼ RL þ jvC
1
Y L (19:86)
Y0 Y0
. C .
Vi Vo
~.
YL
φL
ℓ2 ~.
Yi
.
Vi
φi
.
Vo
ℓ1
FIGURE 19.7 Synthesis of a low-pass filter.

~_ should be plotted on a Smith chart as

where Y0 is the characteristic admittance of the microstripline. Y L
presented in Figure 19.7, and its angle of reflection coefficient fL must be noted. The input admittance of
this circuit is
1
Y_ i ¼ RL 1
jvL þ RL þjvC1

jvC
RL þ j vCR2C (1 v2 LC) vL
¼ (19:87)
R2L (1 v2 LC)2 þ (vL)2
This admittance is normalized as
~_ ¼ Y_ =Y
Y (19:88)
i i 0
and it must be plotted on the Smith chart (Figure 19.7). The phase angle of the reflection coefficient fi at
this point must be noted. Therefore, the synthesis equation is
b1 l1 ¼ fL þ fi (19:89)
In Figure 19.7, the meander line of length l1, representing the inductance L, and a straight microstrip line
of length l2, representing the capacitance C, are joined to synthesize a microwave low-pass filter. The
synthesis of the shunt capacitance C in Figure 19.7 is accomplished using an open-circuited microstrip
line of the phase constant b2. The length of the microstrip line l2 is determined from Equation 19.21. If
the low-pass filter takes on a p-shape, the microstrip version of synthesis will be similar to Figure 19.8.
The microstrip line stub l3 can be synthesized in the same way as the capacitive stub l2.
19.6.6 High-Pass Filters

If a high-pass filter consists of a capacitance C and an inductance L, as shown in Figure 19.9, then
normalized admittance across the load resistance RL is
L
~_ ¼ Y_ =Y ¼
Y
1
j
1
Y0 (19:90)
L L 0
RL vL
. .
C3 C2 Vo
Vi
where Y0 is the characteristic admittance of the
microstrip line to be used for synthesis. This must ℓ1
be plotted on the Smith chart, as depicted in Figure
19.9, and the angle of reflection coefficient fL should
. ℓ2
be noted. Vi
Normalized admittance at the input is
, .
Vo
~_ Y_ =Y ¼
Y
1
Y0 ℓ3
i i 0 (jvL)RL
1
jvC
þ jvLþR

L
(v2 LC)2 RL þ jv R2L C(1 v2 LC) þ v2 L2 C

¼ Y0
R2L (1 v2 LC)2 þ (vL)2 FIGURE 19.8 Synthesis of a p-network low-pass
(19:91) filter.
~. φi
. Yi
. L Vo
Vi
φL
ℓ2 ~.
YL
.
Vi
.
Vo
ℓ1
FIGURE 19.9 Synthesis of a high-pass filter.
Plot this on the Smith chart (Figure 19.9), and the angle of the voltage reflection coefficient fi should
be noted.
The phase delay of the distributed microstrip line is
v_ 0 ¼ v_ i ejbl1 (19:92)
where b is a phase constant of the microstrip line and
b ¼ 2p=ll (19:93)
C1
where ll is the wavelength on the microstrip line.
In Equation 19.91, l1 is the length of microstrip line
. representing the C-section of the low-pass filter. Then,
. Vo
Vi L2 L2 the synthesis equation is
bl1 ¼ 360 (fi þ fL ) (19:94)
The shunt inductance L in Figure 19.9 is synthesized

. ℓ1 using Equation 19.31. Thus, a high-pass filter can be
Vi ℓ2
synthesized using a distributed microstrip line section.
If the low-pass filter is in a p-network form, then
microstrip line configuration will be at the designed
. frequency (see Figure 19.10).
Vo
ℓ2
19.6.7 Bandpass Filters
A bandpass filter may be a series connection of an
FIGURE 19.10 Synthesis of a p-network high- inductor L and a capacitor of capacitance C, as shown
pass filter. in Figure 19.11. This figure is identical to Figure 19.3.
L C Therefore, the microstrip line synthesis equation is

Equation 19.72.
If the bandpass filter is in the shape of a p-
. . network (Figure 19.12a), then the series L1C1,
Vi Vo represented by the meander microstrip line of
length l5, can be designed using Equation 19.72.
Both of the shunt L2 and C2 arms are identical
FIGURE 19.11 Configuration of a series L–C band- to Figure 19.4. Therefore, this part is synthesized
pass filter. by utilizing the technique in Section 19.6.2,
which results in the configuration presented in
Figure 19.12b. An alternative distributed version
of Figure 19.12a is given in Figure 19.12c. In this figure, the technique in ll is the microstrip line
wavelength at the center of the desired passband. The frequency bandwidth is determined by the quality
factor of the resonating element.
19.6.8 Bandstop Filters

Various types of bandstop filters are available. A schematic diagram of a series type bandstop filter is
shown in Figure 13.13. It is basically a resonant circuit inserted in series with the transmission line. The
center frequency of the bandstop is the resonant frequency of the resonant circuit. The loaded quality
factor of the resonator determines the bandstop width.
In the distributed microstrip line the resonator is a section of a half-wavelength microstrip line
resonator of either low impedance (Figure 19.13a) or high impedance (Figure 19.13b), or a dielectric
resonator placed in proximity to the microstrip line, (see Figure 19.13c) or a ring resonator placed in
L1 C1
. .
Vi C2 L2 C2 L2 Vo
(a)
λℓ
ℓ5 n
2
λℓ
.
Vi 2
ℓ2 ℓ4
.
Vi
. .
Vo Vo
λℓ
ℓ1 ℓ3 2
(b) (c)
FIGURE 19.12 Synthesis of a distributed microstrip line p-network bandpass filter. (a) p-network. (b) Configuration
of (a). (c) Alternative distributed version of (a).
. .
Vi Vo
C
λℓ/2
. .
Vi Vo λℓ/2
(a) (b)
DR
(c) (d)
FIGURE 19.13 Synthesis of distributed series type bandstop filters. (a) A section of a half-wavelength microstrip
line resonator of low impedance. (b) A section of a half-wavelength microstrip line resonator of high impedance. (c)
A dielectric resonator placed in proximity to the microstrip line. (d) A ring resonator placed in proximity to the
microstrip line.
L
. .
Vi Vo
C
λℓ
4
. .
Vi Vo
FIGURE 19.14 Synthesis of distributed parallel type bandstop filters.
proximity to the microstrip line (Figure 19.13d). The resonant frequency of the resonators is the center
frequency of the bandstop. The bandwidth is determined by the loaded Q and coupling of the resonator.
A bandstop filter can also be synthesized in microstrip line if the filter is a parallel type (Figure 19.14).
Simply attaching a one quarter-wavelength, open-circuited stub will create a bandstop filter. The center
of the bandstop has a wavelength of ll (Figure 19.14).
A bandstop filter may take a p-network form, as illustrated in Figure 19.15, by the combination of the
ll=2 resonator and ll=4 open-circuited stubs. The frequency bandwidth of the filter depends on the
quality factor of the resonating elements.
L L
. .
Vi C Vo
C C
λℓ λℓ .
4 (2n + 1) Vo
4
.
Vi
λℓ
4
FIGURE 19.15 Synthesis of distributed p-network bandstop filters.
19.6.9 Further Comments on Distributed Circuit Filters

If the unit sections of filters previously described are treated as lumped parameter filters, they can be
cascaded into a number of stages to obtain desired filter characteristics, as exemplified by Chebyshev and
Butterworth filters. The center frequencies of the stages can be staggered to obtain the desired frequency
bandwidth [5].
A radio frequency choke is a special case of a bandstop filter. Cascading of alternate ll=2 sections
of high and low impedance (Figure 19.16a) is common. This is called the high-low filter. A microstrip
line bandpass filter can be made using a number of ll=2 microstrip line resonators, as shown in
Figure 19.16b [5].
λℓ/2 λℓ/2
(a)
λℓ/2
(b) λℓ/2
FIGURE 19.16 Microstrip line filters. (a) Bandstop high-low filter. (b) Bandpass coupled resonator filter.
19.7 Synthesis of Couplers

19.7.1 Generic Relations
A coupler is a circuit with coupling between a primary circuit and a secondary circuit. In distributed
circuit technology, it often takes the form of coupling between two transmission line circuits. The
coupling may be done by simply placing the secondary transmission line in proximity to the primary
transmission line, as presented in Figure 19.17a and c, or both the primary and the secondary transmis-
sion lines are physically connected, as shown in Figure 19.17b. These examples of distributed coupler
circuits are shown in microstrip line forms. No lumped parameter equivalent circuit exists for these
distributed coupler circuits. Therefore, the previously described synthesis techniques cannot be used.
19.7.2 Proximity Couplers

Coupling of two transmission lines is accomplished simply by existing proximity to each other. If the
transmission lines are microstrip lines (Figure 19.17a or 19.18), the coupler is also called an edge coupler.
The coupling factor (CF) of a coupler is defined as [3]
P4
CF ¼ (19:95)
P1
where
P1 is the microwave power fed to port 1
P4 is the microwave power output at port 4.
If the power coupling factor per meter of the line edge is k(x) in the coupling region of length l, then [3]
λℓ/4
Secondary
Secondary λℓ/4
(a) Primary (b) Primary
Zo
Primary
Secondary
(c)
FIGURE 19.17 Distributed circuit couplers. (a) Proximity coupler. (b) Quarter-wavelength coupler. (c) Lange coupler.
(3) (4)
P3 P4
Secondary line
(1) (2)
Primary line
P1 P2
x=0 x=ℓ
FIGURE 19.18 Microstrip line proximity coupler.
l
ð

CF ¼ k(x)ejbx dx (19:96)

0
This can be expressed in decibels as

l
ð
P4

CF (dB) ¼ 10 log ¼ 10 log k(x)ejbx
dx (19:97)
P1
0
The directivity of a coupler is defined as [3]
P3
dir ¼ (19:98)
P4
l
ð
1
dir ¼ k(x)e j2bx
dx (19:99)
CF
0
The decibel expression of directivity, then, is
P3
dir (dB) ¼ 10 log10
P4
l
ð

1
¼ 10 log10 k(x)ej2bx
dx (19:100)

CF

0
Generally, P3 6¼ P4; therefore, the coupling has a directional property. This is the reason that this type
of coupler is termed the directional coupler.
Insertion loss (IL) of a coupler is defined as
P2 P1 (P3 þ P4 )
IL ¼ ¼ (19:101)
P1 P1
Inserting Equations 13.95 and 13.98 into Equation 19.101,
IL ¼ 1 CF(1 þ dir) (19:102)
or
IL (dB) ¼ 10 logf1 CF(1 þ dir)g (19:103)
A complete analytical synthesis of microstrip line couplers is not available. However, computer software
based on semiempirical equations is commercially available [5].
19.7.3 Quarter-Wavelength Couplers

The coupling factor of a quarter-wavelength coupler (Figure 19.19) is defined as [3]
P4
CF ¼ (19:104)
P1
The amount of P4 or coupling factor can be controlled by the width of microstrip lines connecting the
secondary line to the primary line.
CF (dB) ¼ 10 log10 P4 =P1 (19:105)
The directivity is
P3
dir ¼ (19:106)
P4
or
P3
dir (dB) ¼ 10 log (19:107)
P4
λℓ/4
(3) Secondary line (4)
P3 P4
λℓ/4
(1) Primary line (2)

P1 P2
FIGURE 19.19 Quarter-wavelength coupler.

(1) (3) Zo
P1 P3
ℓ2
Primary
Secondary
ℓ1
P2
P4
(4) (2)
FIGURE 19.20 Lange coupler.
At the precise design operating frequency, P3 should be zero. The insertion loss for this coupler is
P1 (P3 þ P4 )
IL ¼ ¼ 1 CF(1 þ dir) (19:108)
P1
19.7.4 Lange Couplers

A schematic diagram of a generic Lange coupler [4] is given in Figure 19.20. In this figure, the primary
transmission line is from port (1) to port (2). The secondary transmission line is from port (3) to port (4).
In Lange couplers, both the primary and the secondary lines are coupled by edge coupling or proximity
coupling. It should be noted that the transmission lines are not physically connected to each other by
bonding wires. The bond wires on both ends form connections of the secondary transmission line from
port (3) to port (4). The bond wires in the middle of the structure are the electrical potential equalizing
bonding in the primary transmission line. Adjusting the values of l1 and l2 creates a variety of coupling
factors. One of the objectives of Lange couplers is to increase the coupling factor between the primary
lines and the secondary line. By comparing the structure to that of a straight edge-coupled coupler (see
Figure 19.18), the Lange coupler in Figure 19.20 has more length of coupling edge. Therefore, a higher
coupling factor is obtainable [5].
References
1. F. F. Kuo, Network Analysis and Synthesis, New York: Wiley, 1962.
2. T. K. Ishii, Microwave Engineering, San Diego, CA: Harcourt Brace Jovanovich, 1989.
3. F. J. Tischer, Mikrowellen-Messtechnik, Berlin: Springer-Verlag, 1958.
4. J. Lange, Interdigitated stripline quadrature hybrid, IEEE Trans. MTT, 17(11), 1150, 1151, Dec. 1969.
5. V. F. Fusco, Microwave Circuit, Englewood Cliffs, NJ: Prentice Hall, 1987.
Index
A Bifurcation and chaos equilibrium point

blue sky catastrophe, 14-23 stability, 14-13–14-14
Additive white Gaussian noise
capacity (D0 dimension), zero-dimensional object, 14-7
(AWGN) channel, 14-70
14-10–14-11 Hopf bifurcation, 14-23
Analogic supercomputer chip,
chaotic steady-state, 14-10 intermittency route, 14-25
cellular neural networks
Chua’s oscillator v-limit set, 14-6
global analogic program unit
double-scroll Chua’s Lyapunov exponents
(GAPU), 13-8
attractor, 14-33–14-34 discrete-time systems, 14-21
global architecture, 13-6–13-7
intermittency route, equilibrium point stability,
local analog memory (LAM), 13-6
14-25–14-26 14-20
Analysis Program for Linear Active
period-doubling route, steady-state solutions,
Circuits (APLAC),
14-23–14-25 14-21–14-22
12-8–12-10
state equations, 14-43–14-44 parameter space diagrams,
Artificial neural network,
time-domain waveforms, 14-26–14-27
approximation
14-34–14-35 period-doubling bifurcation,
feed-forward artificial neural
topological conjugacy, 14-23–14-24
network, 9-25
14-44–14-45 periodic-doubling route, 14-25
neuron, 9-24–9-25
communication periodic steady-state
training process, 9-24
chaos shift keying, chaotic steady-state, 14-10
Autonomous continuous-time
14-65–14-69 Fourier transform, 14-7
dynamical systems, 14-3
Autonomous dynamic circuits chaotic masking, 14-65 power spectrum, 14-8
DC-operating points, cryptographic purpose, 14-71 quasiperiodicity, 14-8–14-10
convergence miscellaneous, 14-70–14-71 sampling interval, 14-10
analog neural network, modulation schemes, subharmonic, 14-8
7-16–7-17 14-69–14-70 pseudorandom sequence
cocontent, 7-16 signal spreading, 14-69 generation, 14-64–14-65
Lyapunov function, correlation (D2) dimension quasiperiodic (torus breakdown)
7-14–7-16, 7-18–7-20 definition, 14-13 route, 14-25–14-26
resistive N-port, 7-17 iterative method, 14-11– saddle-node bifurcation, 14-23
state equations, 7-14, 7-18 14-12 Shil’nikov’s theorem,
nonlinear capacitor and electrical and electronic circuits 14-17–14-19
inductor, 7-13 continuous-time dynamical steady-state trajectories
systems, 14-2 discrete-time systems, 14-14
discrete-time dynamical eigenvalues, 14-14–14-15
B
systems, 14-4 eigenvectors, eigenspaces,
Bandpass filters, 19-14–19-15 nonautonomous dynamical stable and unstable
Bandstop filters, 19-15–19-17 systems, 14-3–14-4 manifolds, 14-15
IN-1
IN-2 Index
Poincaré sections, simple first-order cell, time domian randomness,

14-16–14-17 13-3–13-4 14-36
stability, limit cycle, 14-15 template library, 13-5 D 1 and D1 dynamics,
Bi-i camera-computer, 13-17 unity-gain nonlinear sigmoid 14-30–14-31
Binary phase shift keying (BPSK), characteristics, 13-5–13-6 D0 dynamics, 14-30
14-69–14-70 voltage-controlled current dimensionless coordinates and
Bipolar transistor model, source (VCCS) a–b parameter-space
11-9–11-11 amplifier, 13-3 diagram
Blackman’s formula template library C1 bifurcation sequence,
input admittance, 4-3 AVERAGE, pixel intensity, 14-40
input impedance, 4-1–4-2, 4-5 13-12 Hopf bifurcation, 14-41
output impedance, 4-5 black-and-white edge state equations, 14-40
return difference, 4-1–4-4 detector, 13-14–13-15 state-space behaviors,
series-parallel feedback convex corner detector, 14-40, 14-42
configuration, 4-4 13-13 experimental steady-state
short circuit current gain, 4-5 DELDIAG1, 13-13–13-14 solutions, 14-37–14-38
voltage gain, 4-6 DIAG, 13-14 global dynamics, 14-32
Blecher’s procedure grayscale contour detector, piecewise-linear dynamics
short circuit admittance 13-12–13-13 DC equilibrium points,
matrix, 5-3 logical AND function, 14-29
transistor, common emitter 13-12 eigenvalues, 14-29–14-30
configuration, 5-2–5-3 logical OR function, 13-16 practical realization
Brayton–Moser equations, MATCH, 13-15 Chua’s oscillator,
10-18–10-19 PEELIPIX, 13-16 14-37–14-38
Chaos shift keying (CSK) component list, 14-36–14-37
block diagram, 14-65–14-66 simulation
C
Chua’s circuits, masking, 14-68 analog devices’ AD712
Cauchy integral formula, 18-17 data transmission, 14-65 macromodel, 14-39
Cellular neural networks (CNN) encoding, 14-66 ODE solver, 14-38
analogic supercomputer chip signal correlation, 14-69 PSPICE, 14-40–14-42
global analogic program waveform, 14-67 SPICE deck, 14-40–14-41
unit (GAPU), 13-8 Chaotic circuit synchronization state equations, 14-28
global architecture, linear mutual coupling, steady-states and bifurcations
13-6–13-7 14-57–14-58 boundary crisis, 14-34
local analog memory Pecora–Carroll drive-response double-scroll Chua’s
(LAM), 13-6 concept attractor, 14-33, 14-35
Bi-i camera-computer, 13-17 cascaded drive-response equilibrium point and Hopf
biology, relation, 13-11 systems, 14-61–14-62 bifurcation, 14-32
definition and classification conditional Lyapunov period-doubling cascade
grid structure and trillion exponent (CLE), and periodic windows,
operations per second, 14-60–14-61 14-33
13-2 dynamical system, spiral Chua’s attractor,
typical models, 13-3 14-59–14-60 14-33–14-34
image processing linear time-varying Chua’s oscillator
bank notes recognition, 13-9 system, 14-60 circuit, 12-5, 12-11
dollar bill recognition stable subsystem, 14-61 double-scroll Chua’s attractor,
process, 13-10 Chaotic on–off keying (COOK), 14-34–14-35
halftoning and smoothing 14-69–14-70 intermittency route,
function, 13-9 Chua’s circuit, 9-6, 10-20–10-21 14-25–14-26
partial differential equations, chaos manifestations period-doubling route,
13-10–13-11 broadband noise-like power 14-23–14-25
simple circuit structure spectrum, 14-36 state equations, 14-43–14-44
capacitor voltage, 13-4 sensitive dependence, initial time-domain waveforms,
dynamics, 13-5 conditions, 14-34–14-36 14-34–14-35
Index IN-3
topological conjugacy transmission line parameters, bandstop filters, 19-15–19-17

class #, 14-44 15-17–15-18 filters, 19-17
eigenvalues-to-parameters wavelength and phase velocity, high-pass filters,
mapping algorithm, 15-19 19-13–19-14
14-46–14-47 Coupling factor (CF), 19-18 low-pass filters, 19-12–19-13
equivalent eigenvalue parallel L–C circuit, 19-10
parameters, 14-45 parallel L–C–R circuit,
D
Circuit equations, dimensionless 19-11–19-12
forms DAE, see Differential-algebraic series L–C circuit,
Desloge’s approach, 10-14, 10-16 equation 19-9–19-10
extension groups, 10-11–10-12 Differential-algebraic equation series L–C–R circuit,
impedance, RLC parallel (DAE), 10-9 19-10–19-11
circuit, 10-10 Differential chaos shift keying, resistance
Lie algebra, 10-12 14-69–14-70 antiresonance, 19-6
multiparameter Lie groups, Differential equation and state-space characteristic impedance,
10-10 representations R0, 19-7
Pi-theorem, 10-13 Chua’s circuit, 9-6 input impedance, 19-6
Q-factor, 10-10 mathematical modeling, 9-3 lossy transmission line, 19-5
scale transformations, 10-11 partial differential equation resonance, 19-6
tunnel-diode circuit equations, representation, 9-6 surface-mountable chip
10-14 physical linear circuit, 9-3 resistors, 19-7
tunnel-diode current, 10-15 state-variable representation, 9-5 transformers
Circuit feedback factor, 1-6 state vector, system, 9-4 admittance transformation,
Circuit-simulation programs system state variables, 9-3 19-9
APLAC, 12-8–12-10 vector-valued nonlinear characteristic admittance,
DYNAST, 12-17–12-18 function, 9-4 19-8
ESACAP, 12-14–12-17 Directional coupler, 19-19 quarter wavelength
NAP2, 12-10–12-14 Dispersion equation, 18-6 transmission line,
SPICE, 12-4–12-7 Distributed circuits synthesis 19-7–19-8
CLE, see conditional Lyapunov capacitance transforming method,
exponent characteristic impedance, 19-8–19-9
Closed-loop damping factor 19-3 Distributed RC networks
loop gain, 1-8–1-9 design equation, 19-3–19-4 asymptotic approximation, 18-11
transfer function, 1-8 open-circuited transmission cumulative structure function,
underdamped closed-loop line, 19-4 18-9–18-10
amplifiers, 1-9 short-circuited transmission infinite-length
Coaxial lines line, 19-3–19-4 pole-zero representation,
geometric structure, 15-8 conventional principle 18-15–18-16
transmission line parameters, one-port network, 19-1–19-2 time constant, 18-13–18-15
15-8–15-9 two-port network, 19-2–19-3 inverse problem
wavelength and phase velocity, couplers Bode amplitude and phase
15-10 Lange coupler, 19-21 diagrams, 18-19
Coefficient matrix Y(s), see proximity coupler, network identification
Indefinite-admittance 19-18–19-20 by deconvolution
matrix quarter-wavelength, (NID), 18-20
Collective computation circuitry 19-20–19-21 lumped element approximation,
euclidean distance, 8-31–8-32 inductance 18-11–18-12
normalization operation, 8-32 characteristic impedance, Riccati differential equation,
T-norm operator, 8-32–8-33 19-4 18-10
Conditional Lyapunov exponent design equation and uniform
(CLE), 14-60–14-61 open-circuited differential equation,
COOK, see Chaotic on–off keying transmission line, 19-5 18-1–18-2
Coplanar waveguide (CPW) microstrip lines diffusion equation, 18-2
geometric structure, 15-17 bandpass filters, 19-14–19-15 Dirac-d excitation, 18-2–18-3
IN-4 Index
finite DRC line, 18-4–18-6 F critical transimpedance

frequency domain, 18-6 parameter, 1-4
Feedback amplifier theory
Gauss-like function, 18-2 null return ratio, 1-4–1-5
analysis methods, 1-2–1-3
line transients, 18-3 resultant voltage gain, 1-4
global single-loop feedback
lossless RC lines, 18-1–18-2 return ratio, 1-4–1-5
closed-loop damping factor,
lossy DRC lines, 18-6–18-7 Feigenbaum number, 14-25
1-7–1-9
semi-infinite line, Fourier transform, 14-7
driving-point I=O resistances,
18-3–18-4 Frequency-domain network analysis
1-7
Double-scroll Chua’s attractor, error correction network,
frequency invariant feedback
14-33, 14-35 17-7–17-8
factor, 1-9–1-10
Dual-loop feedback architectures network analyzer (NWA), block
frequency variant feedback
series–series=shunt–shunt diagram
factor, 1-10–1-11
feedback amplifier inverse Fourier transform,
return ratio, 1-6
closed-loop 17-6
indefinite-admittance matrix
transconductance, 2-21 transmission, 17-7
current gain, 3-7
closed-loop transresistance, random errors, 17-7
driving-point impedance, 3-5
2-22 Smith chart representation,
closed-loop voltage gain, equicofactor matrix, 3-3 S11 data, 17-9
2-22, 2-24 input impedance, 3-7 S-parameter, 17-6
loop gain, 2-21 Kirchhoff’s current law, 3-3 systematic errors, 17-7
Norton equivalent input, Laplace-transformed Frequency invariant feedback
2-23 potentials, 3-1 factor dominant pole
open-loop transresistance, n-terminal network, approximation, 1-9
2-21–2-22 symbolic representation, open and closed loop 3 dB
output and input resistances, 3-2 bandwidths, 1-9–1-10
2-22, 2-25 second-order cofactor, 3-4 Frequency shift keying (FSK), 14-66
Thévenin equivalent output transfer admittance, 3-7 Frequency variant feedback factor,
circuit, 2-23 transfer impedance, 3-5 1-10–1-11
series–shunt=shunt–series transistor hybrid-pi Full-wave analysis, 16-4
feedback amplifier equivalent network,
AC schematic diagram, 3-4
G
2-28 transistor, small-signal
circuit voltage gain, 2-25 equivalent model, 3-2 GaAs FET model, 11-12–11-13
current gain, 2-27 voltage gain, 3-6–3-7 Gaussian and bell-shaped basis
driving-point input and null return difference, 3-11–3-13 functions
output resistance, pole splitting open-loop fuzzy membership functions, 8-8
2-27–2-28 compensation variance parameter, 8-7
h-parameters, 2-25 damping factor and gain Global analogic program unit
system-level diagram, frequency, 1-15 (GAPU), 13-8
2-25–2-26 open-loop amplifier, Goal dynamics, synchronization,
voltage gain, 2-27–2-28 1-11–1-13 14-57
DYNAmic Simulation Tool pole frequency, 1-14
(DYNAST), 12-17–12-18 voltage transfer function, H
1-13
Hankel operator, 9-16
return difference
E Hermite linear basis function,
amplifier voltage gain, 3-11
8-5–8-6, 8–35
Ebers–Moll equations, 7-3 definition, 3-7
High-low filter, 19-17
Edge coupler, 19-18 loop transmission, 3-9
High-pass filters, 19-13–19-14
Engineering System and Circuit returned voltage, 3-8–3-9 Hopf bifurcation, 14-23
Analysis (ESACAP), return ratio, 3-9–3-10
12-14–12-17 voltage-controlled current
I
Equicofactor matrix, 3-3 source, 3-7, 3-9
ESACAP, see Engineering System signal flow analysis Indefinite-admittance matrix
and Circuit Analysis circuit feedback factor, 1-6 current gain, 3-7
Index IN-5
driving-point impedance, 3-5 Banach space, 9-13–9-14 Monolithic microwave integrated

equicofactor matrix, 3-3 discrete data fitting, 9-11 circuits (MMICs), 16-1
input impedance, 3-7 Taylor series representation, 9-12 MOS transistor model, 11-12
Kirchhoff’s current law, 3-3 Volterra kernel sequences, Multiconductor transmission
Laplace-transformed potentials, 9-11–9-12 lines (MTL)
3-1 Lie groups, 10-10, 10-12 frequency vs. time domain
n-terminal network, symbolic Linear functionals approximation, analysis
representation, 3-2 9-23–9-24 fourier transform
second-order cofactor, 3-4 Linear state-space representation, technique, 16-2
transfer admittance, 3-7 9-4 modal propagation
transfer impedance, 3-5 Linear systems identification factors, 16-1
transistor hybrid-pi equivalent (ARMA model with exogenous multichip module (MCM), 16-1
network, 3-4 noisy inputs) ARMAX Telegrapher’s equations
transistor, small-signal model, 9-27–9-28 analytical expressions,
equivalent model, 3-2 autoregressive with 16-5–16-7
voltage gain, 3-6–3-7 moving-average (ARMA) C 3 C matrix, 16-3–16-4
Infinite-length RC lines models, 9-27 quasitransverse
characteristic impedance, 18-13 behavioral approach, 9-28 electromagnetic,
pole–zero representation mainstream theory, 16-4–16-5
Bode plot, 18-15 characteristics, 9-27 wave phenomena, 16-3–16-4
dipole intensity function, Lipschitz operator, 9-15 Multidimensional function,
18-16 Local analog memory (LAM), 13-6 approximation
R(z), Id(S) relationship and Local communication and control techniques
impedance function, unit (LCCU), 13-8 canonical piecewise linear
18-16–18-17 Log–antilog multipliers, 8-25–8-26 representations, 8-9
time constant representation Loop transmission matrix, 6-5, 6-13 multilayer perceptron, 8-11
convolution-type differential Low-pass filters, 19-12–19-13 neurofuzzy interpolation,
equation, 18-14 Lyapunov function, 7-14–7-16, 7-19 8-10–8-11
lumped element one-port, radial basis functions, 8-10
18-13–18-14 M sectionwise
spectrum lines, 18-14 piecewise-polynomial
weighting function, 18-15 Microstrip lines functions, 8-8–8-9
time-constant spectrum, geometric structure, 15-15 Multiparameter sensitivity
18-17–18-18 transmission line parameters, first-order perturbation, 6-14
Input–output representation 15-15–15-16 scalar transfer function, 6-15
coprime factorization wavelength and phase velocity, Taylor series expansion, 6-14
representation, 9-7–9-8 15-17 voltage gain, 6-17
state-variable representation, Microstrip lines, distributed Multiple-loop feedback amplifier
9-6–9-7 circuits synthesis theory
Insertion loss (IL), 19-19–19-20 bandpass filters, 19-14–19-15 closed-loop transfer-function
bandstop filters, 19-15–19-17 matrix, 6-3–6-4
high-low filter, 19-17 equivalent network,
J
high-pass filters, 19-13–19-14 voltage-series feedback
Jacobian matrix low-pass filters, 19-12–19-13 amplifier, 6-4
eigenvectors, eigenspaces, parallel L–C circuit, 19-10 fundamental matrix
stable and unstable parallel L–C–R circuit, feedback-flow graph, 6-3
manifolds, 14-15 19-11–19-12 general configuration, 6-1–6-2
equilibrium point stability, 14-14 series L–C circuit, 19-9–19-10 seven-port network, 6-4
series L–C–R circuit,
19-10–19-11
L N
Min–max (uniform) approximation
Lange couplers, 19-21 Banach space, 9-15 NAP2 program
Least-squares approximation Hankel operator, 9-16 applications, 12-10–12-11
and projections Volterra polynomials, 9-14 definition, 12-10
IN-6 Index
‘‘net-list’’ input language, fuzzy membership voltage=charge domain

12-11–12-12 functions, 8-8 transformations, 8-14
time interval, current vs. voltage, variance parameter, 8-7 voltage-to-current
12-13–12-14 log–antilog multipliers, transformation,
Network functions 8-25–8-26 8-12–8-13
Blackman’s formula MOS transistors, Ohmic transresistance piecewise-linear
input admittance, 4-3 region, 8-28 circuitry, 8-20–8-21
input impedance, multidimensional function, unidimensional functions,
4-1–4-2, 4-5 approximation approximation issues
output impedance, 4-5 techniques design nonlinear electronic
return difference, 4-1–4-4 canonical piecewise linear hardware, 8-2
series-parallel feedback representations, 8-9 hardware-oriented
configuration, 4-4 multilayer perceptron, approximating
short circuit current 8-11 functions, 8-4
gain, 4-5 neurofuzzy interpolation, voltage-to-charge transfer
voltage gain, 4-6 8-10–8-11 characteristics,
sensitivity function radial basis functions, 8-10 piecewise-linear shaping,
amplifier equivalent network, sectionwise 8-21–8-22
4-8–4-9 piecewise-polynomial Nonlinear dynamical circuit
amplifier indefinite functions, 8-8–8-9 equations
admittance matrix, 4-9 multiplication circuitry, normal forms
common-emitter transistor 8-24–8-25 center manifold
amplifier, 4-8 piecewise-linear and theorem, 10-8
definition, 4-6 piecewise-polynomial constrained differential
driving-point impedance, 4-9 approximants equations, 10-9
Neuron, 9-24 cubic B-spline, 8-7 formal series, 10-5
Newton–Raphson method, 12-2 Hermite linear basis hyperbolic system, 10-8
Nonautonomous dynamic circuits function, 8-5–8-6 Lie bracket, 10-6
solutions, boundedness, polynomic and rational Poincarè–Andronov–Hopf
7-19–7-20 functions, concepts and bifurcation, 10-8
time-dependent voltage and techniques, 8-23–8-24 topological types, 10-5
current source, 7-19 scaling and aggregation circuitry truncated Taylor
unique asymptotic behavior, current scaling, mirror series, 10-6
7-20–7-21 concept, 8-17 tunnel diode characteristics,
Nonlinear Analysis Program version signal aggregation, 10-9
2, see NAP2 program Kirchhoff’s current law, transformation
Nonlinear circuits, synthesis and 8-18 Ck-conjugate, vector
design voltage scaling mechanisms, fields, 10-2
bell-shaped function, 8-30–8-31 8-16 equivalence relations
collective computation circuitry sigmoidal characteristics, technique, 10-1
Euclidean distance, 8-28–8-30 Jacobian matrix, 10-3–10-4
8-31–8-32 square-law multipliers, nonlinear controlled
normalization operation, 8-26–8-27 sources, 10-2
8-32 synthesis problem, hierarchical solution manifold, 10-1
T-norm operator, 8-32–8-33 decomposition, 8-2 Nonlinear dynamical n-ports
current transfer piecewise-linear transconductance multipliers, equivalence
circuitry, 8-18–8-20 8-27–8-28 dynamic element, 10-17
dynamic systems, extension, transformation circuits memoryless, nonlinear
8-33 current-to-voltage elements, 10-18
electronic function generators, transformation, 8-13 memristor, 10-17
8-2 driving-point characteristics, Nonlinear resistive n-ports
explicit algebraic functions, 8-1 8-15–8-16 equivalence
Gaussian and bell-shaped basis transfer characteristics, capacitive and inductive
functions 8-14–8-15 n-ports, 10-16
Index IN-7
Chua’s synthesis approach, Partial differential equations, Q

10-17 13-10–13-11
Q-factor, 10-10
D Y=Y D transformations, Period-doubling bifurcation,
Qualitative circuit analysis
10-16 14-23–14-24
autonomous dynamic circuits
passive i–v curve, 10-17 Phase shift keying (PSK), 14-66
DC-operating points,
Nonlinear systems identification Picard method, 12-2
convergence, 7-14–7-19
dynamic systems, time series Piecewise-linear Chua diode, 14-46
nonlinear capacitor and
embedding theory, 9-31 Piecewise-linear (PWL) circuits
inductor, 7-13
Gaussian white noise, 9-30 advantages, 11-1
nonautonomous dynamic
Poincaré map, 9-31 computed-aided analysis,
circuits
Fock space, Volterra series, 11-19–11-20
solutions, boundedness,
9-29–9-30 current transfer, 8-18–8-20
7-19–7-20
least-squares approximation dynamic circuits, 11-18–11-19
time-dependent voltage and
technique, 9-28 electronic components,
current source, 7-19
Volterra polynomial, 9-29 11-8–11-14
unique asymptotic behavior,
Nonmonotone current-controlled GaAs FET model,
7-20–7-21
resistor, 14-55 11-12–11-13
resistive circuits
Nonuniform distributed RC lines MOS transistor model,
DC-operating points, 7-2
approximate calculation, 18-11 11-12
Ebers–Moll equations, 7-3
cumulative structure function, op-amp finite-gain model,
equilibrium points, 7-2
18-9–18-10 11-9
feedback structure, 7-7
lumped element approximation, transistor model, 11-9–11-11
monotonic dependent,
18-11–18-12 hierarchy and representations,
7-12–7-13
Riccati differential equation, 11-3–11-8
nonlinear resistor
18-10 bipolar transistor, two-port
characteristics, 7-6
Nullator–I-resistor–voltage source configuration, 11-3
nullator and norator, 7-3
tree, 7-9–7-10 consistent variation property,
short–open circuit
Null return difference matrix, 11-5
combinations, 7-7–7-8
6-6–6-7 hysteresis one port resistor,
V- and I-resistors, 7-9
Null return ratio, 1-4–1-5, 3-12, 6-6 11-6–11-7
voltage-controlled current
linear complementarity source (VCCS), 7-3–7-4
property, 11-5
O voltage-controlled voltage
resistive n-port, 11-3 source (VCVS), 7-2
Open-circuit ouput admittance, 19-2 interrelation of methods, 11-2 voltages and currents,
Open-circuit reverse voltage resistive circuits bounds, 7-11–7-12
gain, 2-3 algorithm, 11-16–11-18 zener diode, 7-2
Open-circuit transfer structural properties, Quarter-wavelength coupler, 19-20
admittance, 19-2 11-14–11-15
Open-loop amplifier theorem canonical PWL,
group delay, 1-13 11-15–11-16 R
volt–ampere characteristics, transresistance, 8-20–8-21 Random chaotic sequence
1-11 voltage-to-charge transfer generation, 14-64
y-parameter model, 1-12–1-13 characteristics, Reciprocal nonlinear dynamical
Open-loop gain-bandwidth product, 8-21–8-22 circuits, equivalence
1-10, 1-12 p-network form, 19-16 Brayton–Moser equations,
Operational transconductance Poincaré–Andronov–Hopf 10-18–10-19
amplifier (OTA), 11-9 bifurcation, 10-8 decomposition, 10-21–10-22
Ordinary differential equations Poincaré map, 14-15–14-16 diffeomorphism, 10-19
(ODE), 14-2 Primitive circuit component catalog, mixed-potential function, 10-18
8-34 piecewise-linear i–v
Propagation constant, 19-5 characteristics, 10-20
P
Pseudorandom sequence generation, Resistive circuits
Parallel L–C circuit, 19-10 14-64–14-65 DC-operating points, 7-2
Parallel L–C–R circuit, 19-11–19-12 PSK, see Phase shift keying Ebers–Moll equations, 7-3
IN-8 Index
equilibrium points, 7-2 closed-loop transfer function open-circuit reverse voltage

monotonic dependent, matrix, 6-12 gain, 2-3
7-12–7-13 general feedback structure, 6-11 open-loop voltage
nullator and norator, 7-3 loop-transmission matrix, 6-13 gain, 2-8
solutions, number multivariable open-loop control resultant closed-loop
feedback structure, 7-7 system, 6-11 amplifier, 2-2
nonlinear resistor return difference matrix, 6-13 short-circuit forward current
characteristics, 7-6 Series L–C circuit, 19-9–19-10 gain, 2-4
short–open circuit Series L–C–R circuit, 19-10–19-11 short-circuit input
combinations, 7-7–7-8 Series–series feedback amplifier resistance, 2-3
V- and I-resistors, 7-9 AC schematic diagram, feed-forward compensation
voltage-controlled current 2-16–2-17 driving-point input and
source (VCCS), 7-3–7-4 balanced differential version, output impedances, 2-9
voltage-controlled voltage 2-20 open-loop voltage
source (VCVS), 7-2 closed-loop transconductance, gain, 2-8
voltages and currents, bounds, 2-18 pertinent small-signal
7-11–7-12 frequency-dependent feedback model, 2-7–2-8
zener diode, 7-2 factor, 2-19 resultant frequency-domain
Return difference open-loop transconductance, feedback factor, 2-9
Blecher’s procedure 2-18 Series–shunt=shunt–series feedback
short circuit admittance small signal equivalent circuit, amplifier
matrix, 5-3 2-17–2-18 AC schematic diagram, 2-28
transistor, common emitter volt–ampere characteristics, 2-19 circuit voltage gain, 2-25
configuration, 5-2–5-3 wye feedback subcircuit current gain, 2-27
driving-point impedances transformation, 2-20 driving-point input and output
forward transfer z-parameter modeling, feedback resistance, 2-27–2-28
admittance, 5-5 network, 2-17 h-parameters, 2-25
indefinite-admittance Series–series=shunt–shunt feedback system-level diagram, 2-25–2-26
matrix, 5-4 amplifier voltage gain, 2-27–2-28
feedback amplifier theory closed-loop transconductance, Shil’nikov’s theorem, 14-17–14-18
amplifier voltage gain, 3-11 2-21 Short-circuit forward current
definition, 3-7 closed-loop transresistance, gain, 2-4
loop transmission, 3-9 2-22 Shunt–series feedback amplifier
returned voltage, 3-8–3-9 closed-loop voltage gain, AC schematic diagram, 2-10
return ratio, 3-9–3-10 2-22, 2-24 closed-loop current gain,
voltage-controlled current loop gain, 2-21 2-11–2-12
source, 3-7, 3-9 Norton equivalent input, 2-23 h-parameter and feedback
natural frequencies, 5-1 open-loop transresistance, network current, 2-11
Return difference matrix, 2-21–2-22 open-loop current gain and loop
6-5–6-6, 6-13 output and input resistances, gain, 2-12
Return ratio, 1-4–1-5, 3-9–3-10, 6-5 2-22, 2-25 Shunt–shunt feedback amplifier
Riccati differential equation, 18-10 Thévenin equivalent output circuit modeling and analysis
circuit, 2-23 AC schematic diagram,
Series–shunt feedback amplifier 2-12–2-13
S circuit modeling and analysis closed-loop transresistance,
Saddle-node bifurcation, 14-23 AC schematic diagram, 2-2 2-14
Scaling and aggregation circuitry closed-loop voltage gain, feedback factor, 2-13
current scaling, mirror 2-3, 2-6 open-loop transresistance
concept, 8-17 current-controlled current and loop gain, 2-14
signal aggregation, Kirchhoff’s source, 2-3 y-parameter modeling,
current law, 8-18 h-parameter equivalent feedback network, 2-12
voltage scaling mechanisms, circuit, 2-3–2-4 design considerations
8-16 modified small-signal balanced differential
Sensitivity matrix model, 2-5 architecture, 2-16
Index IN-9
open-loop amplifier Taylor series representation, quasitransverse electromagnetic,

interstage, 2-15 9-12 16-4–16-5
pole splitting, 2-14 Volterra kernel sequences, Thévenin source voltage, 1-4–1-5
Signal (functions) approximation 9-11–9-12 Time-domain reflectometry (TDR)
Chebyshev system, 9-18 min–max (uniform) interconnection structure
general formulation, 9-17 approximation impedance terminations,
interpolation, approximation Banach space, 9-15 17-4–17-5
algebraic polynomial Hankel operator, 9-16 reflection coefficients, 17-3
interpolation, 9-21 Volterra polynomials, 9-14 voltage wave, 17-4
Hermite interpolant, 9-22 System identification one-port
Walsh theorem, 9-23 general formulation, 9-26 load impedance, 17-2
polynomial and rational least-squares operator reflected voltage wave
approximations, approximation, 9-27 amplitude, 17-1
9-18–9-19 linear systems open-circuit and short-circuit
splines and radial functions, (ARMA model with loads
approximation, exogenous noisy inputs) load impedance, 17-2–17-3
9-20–9-21 ARMAX model, reflection coefficient, 17-2
Simulated Program with Integrated 9-27–9-28 principles, 17-1
Circuit Emphasis (SPICE) autoregressive with Torus trajectory, winding numbers,
program, 12-4–12-7 moving-average (ARMA) 14-50–14-51
Simulation, nonlinear electrical models, 9-27 Transconductance multipliers,
circuit behavioral approach, 9-28 8-27–8-28
circuit-simulation programs mainstream theory, Transfer-function matrix
APLAC, 12-8–12-10 characteristics, 9-27 amplifier input admittance, 6-9
DYNAST, 12-17–12-18 nonlinear dynamic systems, Blackman’s impedance
ESACAP, 12-14–12-17 time series formula, 6-7
NAP2, 12-10–12-14 embedding theory, 9-31 feedback amplifier voltage
SPICE, 12-4–12-7 Gaussian white noise, 9-30 gain, 6-9
nonlinear algebraic equations, Poincaré map, 9-31 impedance matrix, 6-8
numerical solutions, nonlinear system return difference matrix,
12-2–12-3 Fock space, Volterra series, 6-9–6-10
nonlinear differential equations, 9-29–9-30 Transformation circuits
numerical integration, least-squares approximation current-to-voltage
12-3–12-4 technique, 9-28 transformation, 8-13
Single-loop architectures, 2-29 Volterra polynomial, 9-29 driving-point characteristics,
Smale horseshoe map, 14-18–14-19 optimal recovery problem, 9-27 8-15–8-16
S-parameter, 17-6 transfer characteristics,
SPICE program, see Simulated 8-14–8-15
Program with Integrated
T voltage=charge domain
Circuit Emphasis TDR, see Time-domain transformations, 8-14
program reflectometry voltage-to-current
Spiral Chua’s attractor Telegrapher’s equations, transformation,
broadband ‘‘noise-like’’ power multiconductor 8-12–8-13
spectrum, 14-36 transmission lines Transmission lines
period-doubling cascade, 14-33 analytical expressions, circular waveguides
time domain randomness, configuration geometric structure,
14-36 coupled microstrip 15-12–15-13
Square-law multipliers, 8-26–8-27 lines, 16-7 operation modes, 15-13
State-variable representation, 9-5 coupled striplines, 16-6–16-7 waveguide parameters,
System approximation symmetric stripline, 15-13–15-15
least-squares approximation 16-5–16-6 coaxial lines
and projections two-wire line, 16-7 geometric structure, 15-8
Banach space, 9-13–9-14 C 3 C matrix, 16-3–16-4 transmission line parameters,
discrete data fitting, 9-11 fundamental modes, 16-3 15-8–15-9
IN-10 Index
wavelength and phase Transverse electromagnetic (TEM) circuit model, 14-55–14-56

velocity, 15-10 approach, 16-2 current waveforms, 14-49–14-50
coplanar waveguide Two-wire lines experimental observations,
geometric structure, 15-17 geometric structure, 15-6 mode-locking and chaos
transmission line parameters, transmission line parameters, C bifurcation sequence,
15-17–15-18 15-6–15-7 14-54–14-55
wavelength and phase wavelength and phase fs bifurcation sequence,
velocity, 15-19 velocity, 15-8 low-amplitude forcing,
generic relations 14-55–14-56
equivalent circuit, 15-1–15-2 U normalized current pulse
impedance, 15-3–15-5 pattern, 14-49
input admittance, 15-5–15-6 Uniform distributed RC lines sinusoidal voltage source,
line equations, 15-2 frequency domain, 18-6 14-48–14-49
load, voltage reflection time domain subsidiary phenomenon,
coefficient, 15-3–15-4 diffusion equation, 18-2 14-49
solutions and propagation Dirac-d excitation, 18-2–18-3 winding numbers, 14-50–14-51
constant, 15-2–15-3 finite-length, 18-4–18-6 Vector field, 14-44–14-45
voltage reflection coefficient, Gauss-like function, 18-2 Voltage amplifier, 7-12
input, 15-4 line transients, 18-3 Voltage-controlled current source
wavelength and phase lossy lines, 18-6–18-7 (VCCS), 7-3–7-4
velocity, 15-3 semi-infinite line, 18-3–18-4 Voltage-controlled voltage source
microstrip lines Unity-gain nonlinear sigmoid (VCVS), 7-2
geometric structure, 15-15 characteristics, 13-5–13-6 Volterra series representation
line parameters, 15-15–15-16 kernels, 9-9
wavelength and phase nonlinear input-output (I-O)
V
velocity, 15-17 relationship, 9-8
rectangular waveguides Vacuum capacitance matrix, 16-5 polynomial, 9-9
geometric structure, 15-10 van der Pol neon bulb oscillator state transition matrix,
operation modes, circle map 9-8
15-10–15-11 Arnold tongue structure,
two-wire lines 14-52–14-53
W
geometric structure, coupled nonlinear oscillators,
15-6 14-51 Walsh theorem, 9-23
line parameters, 15-6–15-7 Devil’s staircase, Winding number, 14-50–14-51
wavelength and phase 14-52–14-53
velocity, 15-8 mode-locked region, 14-52
Z
waveguide parameters, parameter space diagram,
15-11–15-12 14-52–14-53 Zener diode, 7-2

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What are the main topics covered in the book?

What are the main topics covered in the book?

What are some examples of nonlinear circuits discussed?

What are some examples of nonlinear circuits discussed?

Feedback,

Fundamentals of Circuits and Filters

Feedback, Nonlinear, and Distributed Circuits

Computer Aided Design and Design Automation

Passive, Active, and Digital Filters

No claim to original U.S. Government works

International Standard Book Number-13: 978-1-4200-5881-9 (Hardcover)

Library of Congress Cataloging-in-Publication Data

Feedback, nonlinear, and distributed circuits / edited by Wai-Kai Chen.

Visit the Taylor & Francis Web site at

Preface .................................................................................................................................................. vii

SECTION I Feedback Circuits

SECTION II Nonlinear Circuits

10 Transformation and Equivalence .................................................................................... 10-1

SECTION III Distributed Circuits

Wai-Kai Chen is a professor and head emeritus of the Department

Guanrong Chen Daniël De Zutter Luc Martens

Vladimír Székely Joos Vandewalle Ákos Zarándy

Lieven Vandenberghe and

1 Feedback Ampliﬁer Theory John Choma, Jr. ........................................................................ 1-1

Shunt–Shunt Feedback Ampliﬁer . Series–Series Feedback Ampliﬁer .

1.2 Methods of Analysis

FIGURE 1.1 Block diagram model of a feedback network.

The product fGo is termed the loop gain T.

1.3 Signal Flow Analysis

Ts (P, RS , RL ) ¼ PQs (RS , RL ) (1:2)

Tr (P, RS , RL ) ¼ PQr (RS , RL ) (1:3)

PQs (RS , RL )jQr (RS , RL ) ¼ 0 ¼ T (1:7)

1.4 Global Single-Loop Feedback

Rin Rout Rin Rout

1.4.1 Driving-Point I=O Resistances

Rin ¼ Rino ½1 þ PGvo (0, RL ) Rino ½1 þ PGvo (RS , RL ) (1:9)

1.4.2 Diminished Closed-Loop Damping Factor

is the damping factor of the open-loop circuit.

The resultant loop gain is

the zero-frequency value of the loop gain is

T(0) ¼ fo Go (0) (1:19)

and the zero-frequency closed-loop gain Gcl(0), is

Moreover, the closed-loop damping factor zcl is

1.4.3 Frequency Invariant Feedback Factor

is difﬁcult to satisfy, especially if feedback is implemented expressly to realize a substantive desensitiza-

1.4.4 Frequency Variant Feedback Factor (Compensation)

1.5 Pole Splitting Open-Loop Compensation

1.5.1 Open-Loop Ampliﬁer

Equation 1.31 implies

1.5.2 Pole Splitting Analysis

Rll ¼ Rlt kRo (1:38)

an inspection of the circuit in Figure 1.6b conﬁrms that

|Av( jω)| |Av( jω)|

vu  jAv (0)jp1  GBP (1:46)

while the higher pole frequency, p2c, becomes

It is interesting to note that

Assuming Gf (Rss=Rll)  1, Equation 1.53 reduces to the useful simple form

Series–Shunt=Shunt–Series Feedback Ampliﬁer

2.2 Series–Shunt Feedback Ampliﬁer

vu jAv (0)jp1 GBP (1:46)

Assuming Gf (Rss=Rll) 1, Equation 1.53 reduces to the useful simple form

Rin ¼ Rino ½1 þ fGvo (0, RL ) fRino Gvo (0, RL )

V1F ¼ ½rb þ rp þ (b þ 1)rc IV ¼ (b þ 1)rib IV (2:29)

Rino ¼ (REE þ RF )k½(b þ 1)rib (2:35)

Rin ¼ Rino ½1 þ fGMO (0, RLT ) (b þ 1)K1 K2 RZ (2:57)

Rins ¼ Rino ½1 þ fss GMO (0, RLT ) (2:65)

Routs ¼ Routo ½1 þ fss GMO (RST , 0) (2:66)

which forces a match terminated closed-loop voltage gain AV of

Rin aRLT (2:89)

Rout RST (2:90)