04 - Multiplication and Division

ARM Multiplication and
Division
CMPE 364
Microprocessor Based Design
SPRING 2021
Slides prepared by Prof. Qutaibah Malluhi

Some slides are adapted from slides by Dr. M. Almeer 1
Some slides are modified by Dr. Loay Ismail
We will see
 Various ARM multiplication instructions
 Handling division
2
Multiplication
 ARM has hardware support for different Multiply
instructions
 Signed, unsigned, 32-bit, 64-bit, and Multiply-And-
Accumulate.
 Multiply the contents of a pair of registers and, depending
upon the instruction, accumulate the results in another
register.
 The long multiply accumulates into a pair of registers
representing a 64-bit value.
 The final result is placed in a destination register or a
pair of registers.
3
Multiplication
Syntax: MUL{<cond>}{S} Rd, Rm, Rs
MLA{<cond>}{S} Rd, Rm, Rs, Rn
MUL multiply Rd = Rm∗Rs

MLA multiply and accumulate Rd = (Rm∗Rs) + Rn
Syntax: <instruction>{<cond>}{S} RdLo, RdHi, Rm, Rs

UMULL unsigned multiply long [RdHi, RdLo]= Rm ∗Rs
SMULL signed multiply long [RdHi, RdLo]= Rm ∗Rs
UMLAL unsigned multiply accumulate long [RdHi, RdLo]= [RdHi, RdLo]+ (Rm ∗Rs)
SMLAL signed multiply accumulate long [RdHi, RdLo]= [RdHi, RdLo]+ (Rm ∗Rs)
4
MUL Instruction
 Syntax
MUL rd, rm, rs
 MUL: multiplies two 32-bit source operands, rs and rm and

stores 32-bit result in destination register rd
 source operand could be signed or unsigned.
 the 3 operands must be registers.
 stores the least significant 32 bits if result is > 32 bits
 rs may NOT be shifted or rotated.
 rd and rm must NOT be the same.
 rd and rs could be the same
 With “S” MUL updates N and Z flags (C and V are
unaffected)
5
MUL Instruction
 EXAMPLE
 MUL r5, r2, r9
 r2 = 0X0005A014, r9= 0x00000174
 SOLUTION
 r5 = 0x082C9D10
 EXAMPLE
 MUL r0, r2, r0
 r0 = 0xFFFFFFFE, r2 = 0xFFFFFFFF
 SOLUTION
 r0 = 00000002
 MUL is a signed multiplication (if result is < 32 bits)

 Produces an unexpected value if there is an overflow
6
UMULL Instruction
 Syntax
UMULL rdlo, rdhi, rm, rs
 Unsigned MULtiply Long instruction

 multiplies 2 unsigned 32-bit source registers rs, rm
 both source operands must be registers
 64-bit result is saved in 2 32-bit destination
registers rdhi, rdlo
 rdlo, rdhi and first operand rm must be different
 rs cannot be shifted or rotated
7
UMULL Instruction
 EXAMPLE
 UMULL r5, r4, r8, r0
 r8 = 0x08065310, r0 = 0x00410EEF
 SOLUTION
 [r4, r5] = r8 * r0
 Result 0X00020A12 ED826BF0
 r4 = 0x00020A12, r5 = 0xED826BF0
8
SMULL Instruction
 Syntax
SMULL rdlo, rdhi, rm, rs
 Sign MULtiply Long instruction

 multiplies 2 signed 32-bit numbers in source registers
rm, rs and places 64-bit result in a pair destination
registers rdhi , rdlo
 source operands rs and rm must be registers
 rs cannot be shifted or rotated.
 rdlo, rdhi and rm should be different.
9
SMULL Instruction
 EXAMPLE
 SMULL r10, r9, r2, r4
 r2 = FFFFFF4F, r4 = 000000A0
 SOLUTION
 [r9, r10] = r2 * r4
 r2 = -177, r4 = 160
 RES = -177 * 160 = -28,320
= FFFF FFFF FFFF 9160
 r9 = FFFF FFFF, r10 = FFFF 9160
10
MLA Instruction
 Syntax
MLA rd, rm, rs, rn
 MuLtiply and Accumulate instruction

 multiplies the first 2 source operands rm, rs and
adds the third source operand rn to the product
 32-bit result is stored in rd
 rd = rm * rs + rn
 rm and rd must be different
11
MLA Instruction
 EXAMPLE
 MLA r0, r4, r3, r6
 r3 = 00000018
r4 = 0000C801
r6 = 00000005
 SOLUTION
 r0 = r4 * r3 + r6
 r0 = 0000 C801 * 0000 0018 + 0000 0005
 r0 = 0012 C01D
12
UMLAL Instruction
 Syntax
UMLAL rdlo, rdhi, rm, rs
 Unsigned MuLtiply Accumulate Long instruction

 multiplies unsigned 32-bit values in rm, rs to obtain
64-bit product
 product is added to the 64-bit value stored in rdhi,
rdlo
 [Rdhi, Rdlo] = [Rdhi, Rdlo] + rm*rs
 no immediate data at all
 rdlo, rdhi, rm cannot be the same
13
UMLAL Instruction
 EXAMPLE
 UMLAL r2, r3 r1, r8
 r1= 1008 0040, r2 = 000A 6C20,
r3 = 0000 8000, r8 = 0000 0560
 Solution
 r1 × r8 = 0000 0056 2B01 5800
 [r3, r2] = 0000 8000 000A 6C20
+ 0000 0056 2B01 5800
= 0000 8056 2B0B C420.
 r2 = 2B0B C420
 r3 = 0000 8056
14
SMLAL Instruction
 Syntax
SMLAL rdlo, rdhi, rm, rs
 Signed MuLtiply Accumulate Long Instruction

 multiplies 2 signed 32-bit numbers in rm and rs and
64-bit product is added to 64-bit value stored in
register pair rdlo and rdhi.
 [Rdhi, Rdlo] = [Rdhi, Rdlo] + rm*rs
 all operands are registers
 rdlo, rdhi, and rm must be different.
15
SMLAL Instruction
 EXAMPLE
 SMLAL r4, r5, r1, r6
 r1 = 680E C921
r4 = FFFF FFFF
r5 = FFFF FFFF
r6 = FFF8 0041
 SOLUTION
 [r5, r4] = [r5, r4]+ r1*r6
 [r5, r4] = FFFC BFA4 22B9 1160
 r4 = 22B9 1160
 r5 = FFFC BFA4 16
DIVISION
 No Division instruction in ARM
 Do it by software.
 Method 1: can be carried out using successive
subtraction
 Quotient is number of times the divisor is subtracted
from dividend before a negative value is reached
 Method 2: model an algorithm after long division
 See book Figure on page 41 [Schindler]
17

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ARM Multiplication and

Slides prepared by Prof. Qutaibah Malluhi

MUL multiply Rd = Rm∗Rs

Syntax: <instruction>{<cond>}{S} RdLo, RdHi, Rm, Rs

SMULL signed multiply long [RdHi, RdLo]= Rm ∗Rs

 MUL: multiplies two 32-bit source operands, rs and rm and

 MUL is a signed multiplication (if result is < 32 bits)

 Unsigned MULtiply Long instruction

 Sign MULtiply Long instruction

 MuLtiply and Accumulate instruction

 Unsigned MuLtiply Accumulate Long instruction

 Signed MuLtiply Accumulate Long Instruction

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