CHAPTER 2

Operational Amplifiers

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 Outline
• Review of ideal Op-Amp characteristics
• Analyze and design various amplifier
circuits that perform a variety of functions
including addition, subtraction, integration
and differentiation.
• Calculate the input impedance of op-amp
circuits.

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 Figure 2.1 Circuit symbol for the op amp.

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 Figure 2.2 The op amp shown connected to dc power supplies.

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 Figure 2.3 Equivalent circuit of the ideal op amp.

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 Figure 2.3 Equivalent circuit of a non-ideal op amp.

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 1
𝑣1 = 𝑣𝑐𝑚 − 𝑣𝑑
2

1
𝑣1 = 𝑣𝑐𝑚 + 𝑣𝑑
2

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Closed-loop circuits

Figure 2.5 The inverting closed-loop configuration.

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 Figure 2.6 Analysis of the inverting configuration. The circled numbers indicate the order of the analysis steps.

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 Op-Amp Circuit Analysis
In future problems, please remember:

• 𝑖 + = 𝑖− = 0

• 𝑉+ = 𝑉−

• KCL

• KVL

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 Figure 2.8 Circuit for Example 2.2. The circled numbers indicate the sequence of the steps in the analysis.

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 Figure 2.10 A weighted summer.

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 Figure 2.11 A weighted summer capable of implementing summing coefficients of both signs.

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 Figure 2.12 The noninverting configuration.

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 Figure 2.14 (a) The unity-gain buffer or follower amplifier. (b) Its equivalent circuit model.

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 Figure E2.9

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 Figure 2.17 Application of superposition to the analysis of the circuit of Fig. 2.16.

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 Figure 2.16 A difference amplifier.

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 Common-Mode Gain

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 Figure 2.19 Finding the input resistance of the difference amplifier for the case R3 = R1 and R4 = R2.

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 The Instrumentation Amplifier

Figure 2.20 A popular circuit for an instrumentation amplifier. (a) Initial approach to the circuit. (b) The circuit in (a)

with the connection between node X and ground removed and the two resistors R1 and R1 lumped together. This simple

wiring change dramatically improves performance. (c) Analysis of the circuit in (b) assuming ideal op amps.

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 Figure 2.20 continued

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 Figure E2.5

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 Figure 2.22 The inverting configuration with general impedances in the feedback and the feed-in paths.

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 Figure 2.23 Circuit for Example 2.4.

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 Figure 2.24 (a) The Miller or inverting integrator. (b) Frequency response of the integrator.

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 Figure 2.25 The Miller integrator with a large resistance RF connected in parallel with C in order to provide negative

feedback and hence finite gain at dc.

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Figure 2.26 Waveforms for Example 2.5: (a) Input pulse. (b) Output linear ramp of ideal integrator with time constant of 0.1 ms. (c)

Output exponential ramp with resistor RF connected across integrator capacitor.

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 Figure 2.27 (a) A differentiator. (b) Frequency response of a differentiator with a time constant CR.

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