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William Stallings Computer Organization and Architecture

The document discusses input/output (I/O) in computer systems, including the need for I/O modules to handle peripherals with different data amounts, speeds, and formats compared to the CPU and RAM. It describes various I/O techniques like programmed I/O, interrupt-driven I/O, and direct memory access (DMA) where an additional module can take over transfers from the CPU. The document provides details on I/O addressing, modules, steps, and different configurations for DMA transfers.

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86 views25 pages

William Stallings Computer Organization and Architecture

The document discusses input/output (I/O) in computer systems, including the need for I/O modules to handle peripherals with different data amounts, speeds, and formats compared to the CPU and RAM. It describes various I/O techniques like programmed I/O, interrupt-driven I/O, and direct memory access (DMA) where an additional module can take over transfers from the CPU. The document provides details on I/O addressing, modules, steps, and different configurations for DMA transfers.

Uploaded by

Jannat Happy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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William Stallings

Computer Organization
and Architecture

Chapter 6
Input/Output
Input/Output Problems
• Wide variety of peripherals
—Delivering different amounts of data
—At different speeds
—In different formats
• All slower than CPU and RAM
• Need I/O modules
—Contains logic for performing a communication
function
Input/Output Module
• Interface to CPU and Memory
• Interface to one or more peripherals
Generic Model of I/O Module
External Devices
• Human readable
—Communicating with computer user
—Screen, printer, keyboard
• Machine readable
—Communicating with equipment
—Monitoring and control
• Communication
—Communicating with remote devices
—Modem
—Network Interface Card (NIC)
External Device Block Diagram
I/O Module Function
• Control & Timing
—To control flow of traffic between internal resources
and external devices
• CPU Communication
—Command decoding, data, status reporting, address
recognition
• Device Communication
—Commands, status information and data
• Data Buffering
—To operate at both device and memory speeds
• Error Detection
—Reporting errors to the processor
I/O Steps
• CPU checks I/O module device status
• I/O module returns status
• If ready, CPU requests data transfer
• I/O module gets data from device
• I/O module transfers data to CPU
• Variations for output, DMA, etc.
I/O Module Diagram
I/O Module Decisions
• Hide or reveal device properties to CPU
• Support multiple or single device
• Control device functions or leave for CPU
Input Output Techniques
• Programmed
• Interrupt driven
• Direct Memory Access (DMA)
Programmed I/O
• CPU has direct control over I/O
—Sensing status
—Read/write commands
—Transferring data
• CPU waits for I/O module to complete operation
• Wastes CPU time
Programmed I/O - detail
• CPU requests I/O operation
• I/O module performs operation
• I/O module sets status bits
• CPU checks status bits periodically
• I/O module does not inform CPU directly
• I/O module does not interrupt CPU
• CPU may wait or come back later
I/O Commands
• CPU issues address
—Identifies module (& device if >1 per module)
• CPU issues command
—Control - telling module what to do
– e.g. spin up disk
—Test - check status
– e.g. power? Error?
—Read/Write
– Module transfers data via buffer from/to device
Addressing I/O Devices

• Under programmed I/O data transfer is very like


memory access (CPU viewpoint)
• Each device given unique identifier
• CPU commands contain identifier (address)
I/O Mapping
• Memory mapped I/O
— Devices and memory share an address space
— I/O looks just like memory read/write
— No special commands for I/O
– Large selection of memory access commands available
• Isolated I/O
— Separate address spaces
— Need I/O or memory select lines
— Special commands for I/O
– Limited set
Direct Memory Access
• Interrupt driven and programmed I/O require
active CPU intervention
—Transfer rate is limited
—CPU is tied up
• DMA is the answer
DMA Function
• Additional Module (hardware) on bus
• DMA controller takes over from CPU for I/O
DMA Module Diagram
DMA Operation
• CPU tells DMA controller:-
—Read/Write
—Device address
—Starting address of memory block for data
—Amount of data to be transferred
• CPU carries on with other work
• DMA controller deals with transfer
• DMA controller sends interrupt when finished
DMA Transfer
Cycle Stealing
• DMA controller takes over bus for a cycle
• Transfer of one word of data
• Not an interrupt
—CPU does not switch context
• CPU suspended just before it accesses bus
—i.e. before an operand or data fetch or a data write
• Slows down CPU but not as much as CPU doing
transfer
DMA Configurations (1)

• Single Bus, Detached DMA controller


• Each transfer uses bus twice
—I/O to DMA then DMA to memory
• CPU is suspended twice
DMA Configurations (2)

• Single Bus, Integrated DMA controller


• Controller may support >1 device
• Each transfer uses bus once
—DMA to memory
• CPU is suspended once
DMA Configurations (3)

• Separate I/O Bus


• Bus supports all DMA enabled devices
• Each transfer uses bus once
—DMA to memory
• CPU is suspended once
Foreground Reading
• Check out Universal Serial Bus (USB)
• Compare with other communication standards
e.g. Ethernet

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