Scribd
Upload
83 views9 pages

Quiz 1

1) The document is a quiz for a Microelectronic Devices and Circuits course. It contains 3 problems assessing understanding of pn junction diodes, MOS capacitors, and MOS transistors. 2) General guidelines are provided for completing the quiz, including writing one's name, using open book resources but no computers, showing work, and including proper units in answers. 3) Problem 1 involves calculating built-in potentials, depletion widths, and electric fields for silicon and silicon-germanium pn junction diodes with given doping profiles.

Uploaded by

Zunaira Favad
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
83 views9 pages

Quiz 1

1) The document is a quiz for a Microelectronic Devices and Circuits course. It contains 3 problems assessing understanding of pn junction diodes, MOS capacitors, and MOS transistors. 2) General guidelines are provided for completing the quiz, including writing one's name, using open book resources but no computers, showing work, and including proper units in answers. 3) Problem 1 involves calculating built-in potentials, depletion widths, and electric fields for silicon and silicon-germanium pn junction diodes with given doping profiles.

Uploaded by

Zunaira Favad
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
You are on page 1/ 9

Microelectronic Devices and Circuits

Spring 2021
_____________________________________________________________

February 8, 2021
Quiz #1

Problem #points

NAME___________________________________ 1___________

RECITATION TIME___________________________ 2___________

3___________

Total______________

General guidelines (please read carefully before starting):

• Make sure to write your name on the space provided above.


• Open book: you can use any material you wish. But no computers.
• All answers should be given in the space provided. Please do not turn in any
extra material.
• You have 120 minutes to complete the quiz.
• Make reasonable approximations and state them, i.e. low level injection, extrinsic
semiconductor, quasi neutrality, etc.
• Partial credit will be given for setting up problems without calculations. NO credit
will be given for answers without reasons.
• Use the symbols utilized in class for the various physical parameters, i.e. N a, τ, ε,
etc.
• Pay attention to problems in which numerical answers are expected. An
algebraic answer will not accrue full points. Every numerical answer must have
the proper units next to it. Points will be subtracted for answers without units or
with wrong units. In situations with a defined axis, the sign of the result is also
part of the answer.

Unless otherwise stated, use:


19
q = 1.6 X 10 C
kT/q = 25 mV at room temperature
10 3
ni = 10 cm for silicon at room temperature
εsi = 10 12 F/cm εox = 3.45X10 13 F/cm

1
1. (30 points)
Consider two pn junction diodes that have identical uniform doping profiles, but differ in
substrate – one is made of silicon, and one is made of a silicon germanium alloy (SiGe).
Assume the intrinsic carrier concentration for SiGe at room temperature is
13 3 12
approximately 10 cm and εSiGe = 1.5 x 10 F/cm

Si SiGe

p n p n

18 3 15 3 18 3 15 3
Na = 10 cm Nd = 10 cm Na = 10 cm Nd = 10 cm

a) Calculate the built in potential for both the silicon and SiGe diodes.

2
b) Calculate the ratio of the depletion width on the n side of the two diodes Xno in
thermal equilibrium. [i.e. Xno(Si)/ Xno(SiGe)]

c) Calculate the ratio of the electric fields at the metallurgical junction of the two
diodes in thermal equilibrium. [i.e. Eo(Si)/Eo(SiGe)]

3
2. (35 Points)
+ 20 3
An n polysilicon gate (Nd > 10 cm ) MOS capacitor with p type Si body has a
capacitance voltage plot shown below. The maximum capacitance per unit area
7 2
Cmax = 1.7 x 10 F/cm , while the minimum capacitance per unit area
8 2 +
Cmin = 6.2 x 10 F/cm . Assume φn = 0.55 V.

Cmax

Cmin
VGB
0 0.8V 3.8V

a) What region of operation is the device in for VGB = 3.8V?

4
b) For the device in part (a), derive an expression for the depletion region width Xd
at VGB = 3.8V, in terms of Cmin and Cmax and fundamental parameters (e.g. q,
εox, εs, etc.)

7
c) For the device in part (a), if the magnitude of the gate charge |Q G| = 6.74 x 10
2
C/cm , at VGB = 3.8V, derive an expression for the doping N a, in terms of Cmin,
Cmax and other fundamental parameters.

5
7 2
d) Calculate Na from part (c) assuming |QG| = 6.74 x 10 C/cm and the other
parameters given in (a) above:

6
3. (35 points)
You are given an MOS transistor with the device parameters shown below.

ID W = 10 m
+
VDS COX = 10 7 F/cm 2
2
n = 200 cm /V s
+
3V VTn = 1V

A drain to source voltage is applied resulting in the electric field at the source
3 3
Ey (0) = 3.75 x 10 V/cm and at the drain Ey(L) = 7.5 x10 V/cm
a) Calculate ID .

7
b) Calculate the VDS applied.

8
c) Calculate the channel length L of this device.

d) What region of operation is the transistor biased? (Circle one and explain.)
CutoffTriodeSaturation

You might also like