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CH 3 MPMC

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71 views73 pages

CH 3 MPMC

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KONARK TANWAR
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{ V893 04159, This chapter illustrates'the complete instruction sets of the microprocessor 8086 with the programming, so user can get quick and easy idea of how to use instruction sets in the programming. Assembler directives of the 8086 give an idea of how to use assembler directives in the program. 3.1. INTRODUCTION To perform any operation using the microprocessor, we have to give corresponding instruction to the microprocessor. Different instructions perform different types of operations. Depending upon the types of operations performed, the instruction sets of the microprocessor 8086 are divided into the following groups: \ j \ . Data transfer instructions \ 2. Stack instructions : | ) | . Input and output instructions : j ld 4. Arithmetic instructions, ' i \ 5, Logical instructions \ | | Flags controlling instructions i String instructions \ ; {& Branching instructions / a 27 ‘Scanned with CemScanner ™~ 3.2 DATA TRANSF! TIONS Y AN: ER INSTRUCTION: ee Data transfer j T instructi : . tructions are used to transfer 8/16-bit data from source to destination, 1, 3.7 oy > value of source i ae iS not lost, by ean ti 7 i Aestinatio: , but the old data of destination is lost. The size or.capacity of so destination should be same, tee ang x 8/16 bits /16 bits Destination Source 3.2.1 MOV D, S (Move Source Data into Destination) into destination. In this instruction, content of the so x , 8/16 bits J 8/16 bits ’ Source , Destination The possible combination of source and destination is given in the following table: Po | Reg Reg Reg Mem Mem Reg Data __ Reg/Mem — Seg. Reg. Reg/Mem Seg. Reg. except cs ister can be any 8- it registers AH, AL, BH, BL, CH, CL, DH, and DL ef ister can be: “16-bit registers AX, BX, CX, DX, SP, BP, SI, and DI can be indicated by any one of the five methods given in the addressing modes. Segment Memory registers can be CS, DS, ES, and SS. Only branching instruction can ‘be used to store data into CS and IP registers, oth ding data in CS and IP is not permitted by any other instructions. a — Reg/Mem For example: 4, To transfer 55h into re; MOV DL, 55h gister DL 65h ——————_ 55h DL To transfer 3456h into register BP MOV BP, 3456h 3456h —————>} 3456h BP ee ‘Scanned wih CamScanner Microprocessors: The 6086/8088, 80186/80286, 80386/80486 and the Pentium Family X43. To transfer 4000h into registers BX and SI gq MOV [BX + SI], 4000h [1257 | ex © : 392 | SI [pies] ea 95000] BA (From DS) D6E9] EA A25E9| 00 =H 4000, A25EA| 40 We transfer contents of memory location ES: [BX] into register DL . MOV DL, ES: [BX] . roses ‘mode for source is RIAM and for destination is RDAM. To store 16-bit number of SP into two-memory location DS: 9000 PA= DS: 9000 . = BA: EA So, BA is present in segment register DS and effective address is given directly 9000h MOV [9000h], SP 6. To transfer 8-bit number 46h into memory location DS:BX MOV [BX], 46h __ Addressing mode for source is IAM and for destination is RIAM. \ % store 16-bit number of register AX into memory location CS: [BP + ST] MOV CS: [BP + SI], AX ‘Addressing mode: source —> RAM, destination — Base index addressing mode (BIAM) EXAMPLE 3.1 Define data memory segment from address 15000h. Solution: To define data memory segment from address 15000h, stored 16-bit number 1500h into register DS, but any immediate number cannot be transferred directly into the segment register. So, first this number can be loaded or stored into any other 16-bit registers (AX, BX, CX, DX, SI, DI, SP, and BP) and then transfer the content of this register into segment register. MOV AX, 1500h MOV DS, AX \ _EXAMPLE 3.2 Define extra memory segment such that the address 98735 should be present in extra memory segment. \ Solution: Jexo 5S Ae MOV BX, 9873 #0008 aay MOV ES, BX ES ‘Scanned with CemScanner om memory into register AX. The dros, » BNAMPLE 33 Transfer 16-bit number fromm ™ jocation is 7000h: 1800h (RA: BA). Sedation; MOV BX, 70000, - MOV Ds, BX MOY AX, [150081] XCHG D, S (Exchange the Content of Destination and Soures) : and destination. The size of source and desi na tination is given in the following i aie i source astruction exchanges the contents of sour . .. source and dest must be qual. The possible combination of source a —_ “Source Destination _, _ Source _\ Destino” \ Reg Reg Reg Mem __ Rep Men cant R U ‘or exampre: 1. XCHG AL, BL 12 55 2. XCHG SP, BP XCHG AX, [BX] XCHG CX, [7800h] XCHG BX, 8000h — not permitted, because immediate data is not allowed to exchange with register or memory, -3 LAHF (Load AW Register with 8 LSBs of Flag Register) This instruction copies the contents of 8 LSBs of the flag register into register AH, so the old |_ value of flag is not lost, but the old content of register AH is lost. Similarly, the value or content | of 8 LSBs of the flags CF, PF, AC, ZF and SF can be obtained in register AH. 8 LSBs of flag roy of an of 4 SAHE (Store Register AH into 8 LSBs of Flag Register) This instruction copies the contents of register AH into 8 Ls i the old value of AH is not lost but the old content Of fag register es ae M |-——~+] 8.800 of tag ro, ‘Scanned wih CemScanner LE ——— ———__—_—_—_—_—=— ww od o\\t - i Microprocessors: The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family 7 SOE 5 LDS R, Mem [Load DS (Data Memory Segment) and Given Register R (16-bit Register) with Memory Contents] ‘This instruction copies the contents of four memory loc in the given register Rand data memory segment. The register R should be of 16 bits. ;— L—1 Js fy L—{_|ps yl Memory sorexample: 1. LDS SI, ES: [BX] ES BA= [7000] 0 EA= BX A= 72146 reas [> coe hy si 72148 reg / Jos 7 Memory 2. LDSBX, [BP + SI] , - =n ~ PA=SS:BP +SI | (PA=SS: BP + SI means base addressiis taken from SS and EA. is from BP + SI) ‘Scanned with CemScanner 2 a Mi S eee ) with a nat ! ane D3, Crom a) Les spree ese ARH For example: 1, LES DI, (70h+ BX] - addressing mode (AN): Source (S) > RRAM Displacement = 70 = 0070h Total effective address: 9000 BX +0070? Displacement { 9070 EA DS '4000)0| +9070 49070 a coe “ey wy er? BA EA PA y) 2) 49072 49073 Memory 2. LES BP, CS: [7000h] 3.2.7 LEA R, EA Source (Load Effective Given Register R) This instruction copies the effective address of memory j should be of 16 bits, because the effective address of lemory Segment) an Memory Contents wy emory l0e locations | in the le given Tebist, 49070 16 43071 | c je - 3) oe oh oS : wy soe c aay) 3, ae and Destination > RAM os wausion, 00 AMD ta ecu O 1 ES Address of Memory into into the given register R. The register R ‘any memory location is of 16 bits. ‘Scanned wih CamScanner 13088, g0186/80286, A(I6- ir register) For example: LEA DX, 85h BP] (Ss) ‘Addressing mode so RBIAM and D RAM BP Gs s aig et? ras.» visplacement jue at a one Neglect pba [P oo (TransiatelT! ransiate Byte) , % 2 ene G 3.2.8 XLAT/XLATB from loo} table. sed to obtain codes HON XLAT instruction is us PA Memory EA= [BX] + [AL BA= [DS] - pPA=DS: [Bx +AL] oo sh. Using 3.1. A lookup table of a square is stored in memory from address 8000: "Tinstruction write a program to obtain square of digit 4. ‘Solution: . For using the XLAT instruction, We have to satisfy three conditions: (a) Lookup table should always be present in data memory segment, Le. in DS register. )) The offset of starting Jocation of lookup table from the base address should be present in register BX. (c) The number whose square (for this AL. program) isto be obtained should be present inregister ‘The lookup table of a square of hexadecimal digits 0 to Fis shown in the following figure: MOV AX, 8000H MOV DS, AX MOV BX, 0005H MOVAL, 04H XLAT HLT/INT3 ‘Scanned wih CemScanner as Pregamng Me sis Lookup abl of square PROGRAM3.2 The tit display codes of hexadecimal digits Oto F are present inthe form of 2 ookup table from adress 2500: 2000, Using the XLAT instruction, obtain the display code Fg an sore he resulta memory locaton ES: [DI] Solution: MOV AX, 2500h MOV DS, AX MOV BX, 2000 MOV AL, osh XLAT MOVES: (DM, AL HLOINTS Summary of data transfer ‘instructions: | Movp,s 2. XCHGD, s 3. LAKE 4. SAHP 5. LDSR, Mem 6. LESR’Mem, 7. LEAR, EA source 8. XLATXLATE, js — ‘Scanned wih CemScanner fi 50 Microprocessors: The 6086/8088, 60186/60266, (80386/80486 and the Pentium Family 3.3 STACK INSTRUCTIONS ‘The memory locstions which are used to save useful data of different registers into memory in the foun of stack of data is called stack memory location, The uppermost field of stack memory Jocation is called stack top. Normally, the BA of stack top will be present in stack pointer register (SP). IFEA (effective address in SP is changed, then stack top is changed. “The procedure to use stack memory location consists of three steps as given below: 3.3.1 Initialization of Stack Memory Segment ‘To define stack memory segment, we have to transfer 16-bit MSB of base address into SS. As dura is caved in stack memory locations in upward direction from higher address, towards lower address, hence initially the EA. of last location (FFFFh) or last+! location (0000h) is transferred into SP. The memory ocation whose EA is present in SP is called stac top. Stack memory segment 80005 SP al 80008 —+[ FFF EA 80008 80008, OFFFF > Stack top 3.3.2 Saving Useful Data of Register into Stack Memory Location The instructions used are given below. PUSH S (16 bits) (Push Source Data into Two-memory Location above the __ Stack Top) a - nn —— . Source S is register/segment register/memory. a ‘Scanned with CemScanner For example: 1, PUSH AX E SP. ! ” New - New ST 0100 ror 5 16 = baat 70132 Old ST 2. PUSH SI 3. PUSH cs 4. PUSH [7000 +BX) PUSHF (Push Flag, Register: ‘Data into “omemory Location above the Stack Top) Whenever ld save datas required, en tan be tanstoned baappee locationto ‘he comesponding registers by using POD instruction as then —— ———___ ‘Scanned with ComScanner N 52___ Microprocessors: The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family ss eal | t : sp. Se : %2 ] Now EA owen [x] i se Ct New st -2 1 + ‘| Flag reg. sP ou st 3.3.3 Transferring Back Data from Stack Memory Location to Corresponding Destination Instruction Used is POP D (16 bits) POP Dis bits) Pop Data from Two Stack Top Memory y Location and Stored in the Given Destination} a ss BA t ry ' SP se 7 New EA[X=a}e : — EXJ owen eel + > Old st 42 ' Ge => New st For example: 1. POP DX 2. POP SI 3. POPAX 4. POP ES 5. POP [BP + SI] EXAMPLE 3.4 Initialize stack memory from address 6000h: 8500h, Solution: PA = SS: SP = 6000h: 8500h MOV AX, 6000h MOV SS, AX MOV SP, 8500h ‘Scanned wih CamScanner Pr Instruct” ~ Se we | XBX CX DX into stack Memory wre, gister A . | | 1 pi wr yt" «cro 5 Save dat of . Se EXAMPLE 3- ut oe 5 3 Solution: 9 ned” PUSH AX avo sates : PUSH By o oe PUSH C G Sore < DX into correspongin —~ 2" PUSH tock te dat rom stack memory into corre: Ponding "ea a Transfer EXAMPLE 3.6 ‘Solution: POP DX POPCX POP BX POP AX To transfer back data from stack memory location into the same Tegister sex ‘quence of PUSH as POP, instruction should be opposite, because data transfer will be LIFO (J ast in first ow POPF (Pop Data from Two Stacks Top of Memory Location and Stored into Fig Register; By using the POPF instruction, , the content of the 16-bit flag register is ch; of the flag registers also changed. So, by using his way, we have to alter the ‘anged, so the old valy content of the flag regis SP. — [xtowen Here, it is important to ote that i a if the Popp it ion j. ee a changed Sa ae conte ton 'S executed, then all t there is no direct instruction to chan : he 16 bits of the Be TF (tray by «Program control is changed. Also, (2 setand reset rap flag. RPE Soy uh the POPP instruction itis easy Summary of stack instructions: ee 1. PUSH S (16 bits 2. PUSHF 3. POP D (16 bits) 4. POPF ‘Scanned wih CamScanner 3.4 INPUT AND OUTPUT INSTRUCTIONS Letall 1O (peripherals) devices are connected with microprocessor through IO ports like IC 8255. Each IO port connected with microprocessor 8086 will have 16-bit address, so maximum number of 10 ports can be 28:= 64K each from 0000h to FFFFh. WP port UP dovico : <1 £ 45 t fs | Keyboard AL T (IN) OF port OP device 8 D0 ~ A AL U LJ 8 | Printer om FF Microprocessor In the starting 256.10 port addtess from 0000h to 0OFFh, 8 MSBs are 0, so the 8 LSBs of address can be given directly along with IN/OUT instruction. As the gi remain fixed, hence itis also called fixed 10 port address. But for giving 16-bit IO , we have to store 16-bit address in register DX and the name of register DX is given along with the IN/OUT instruction. If the number of register DX is changed, the 1O port address will also be changed, so the 16-bit address present in register DX i is also called variable port address ; 3.4.1 IN AL/AX, 8-bit Port Address/DX. This instruction transfers the content of port address into register AL or AX. ‘Addr }+— [ja UP port OR Addr, Addr +1 UP port sony es ‘Scanned with CamScanner a —— Instru le: or exaD! ; 45h AL 7 1, INAL, wef 7 vp pot J /INAX, 55h a i AH so TP pot oMfov DX, 2000h Hy Np INAL, DX : 4, MOV DX, 2000h / ol bs INAX, DX 3.42. OUT Shit Port Address/DX, ALIAX. This instruction transfers the content of ALIAX on port address. pd ade AL OI port OR AL | Adar a) | Adar +4 OF pert 1 If the port address is of 8 bits, then itis | port address is of 16 bits, then itis stored in (along with the instruction, given directly along with the instruction, but ifthe register DX and the name of register DX is given For example: 1. OUT 70h, AL [Z}-+—15 Jonna a OF pont 2. OUT 70h, AX Re x 070 LY} 0071 aK ‘Scanned wih CamScanner \ t 56 Microprocessors: The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family 3. MOV DX, 3500h OUT DX, AL x X_] 3500 AL OP port 4. MOV DX, S000h OUT DX, AX atx : 5000 an[_Y. 5001 ax OF port 3.5 ARITHMETIC INSTRUCTIONS Arithmetic instructions are used to perform different arithmetic operations in ALU. Microp' 8086 can perform the following arithmetic operations: (i) 8/16-bit addition with/without carry of binary numbers. $-bit addition with/without carry of BCD numbers, 8/16-bit subtraction with/without borrow of binary numbers. 8-bit subtraction with/without borrow of BCD numbers. #8 and 1616-bit multiplication of signed and unsigned numbers. 18/8 and 32/16-bit division of signed and unsigned numbers, ‘dgition, subtraction, multiplication and division of decimal numbers are represented in ASCII codes. (viii) Increment and decrement of 8/16-bit binary numbers. (ix) Two's complement of 8/16 bit-binary numbers. 0) bers into 16/32-bit numbers. Conversion of 8/16-bit signed binary num! ‘The different arithmetic instruction ns are given below. 3.5.1 ADD D, S (Add Destination and Source Data) is i i ination and result is stored in the same This instruction adds the contents of source and destination ane’ res red destination. ‘The size of source and destination must be same. The possible combination. of source and destination is given below: ie “Destination _Soure?_ pane Reg rs “Tsar Reg, Mem Mem Reg or [xe] 0017 ___RegMem__Datt_ For example: 1. ADD AX, BX 2. ADDAL, BL rocessor ‘Scanned wih ComScanner 34h D DX, {12 : 40D Bs: [BP], 1234h ination and Source Data With ¢ ld Destination an an DC D, $ (Ad 352 Al ination with carry ang , tion adds the contents of source and destinat ary a js instruction ‘This ins 3. ADC DX, [1234] 4. ADC ES: (BP), 1234h (PROGRAM 33 € program to add two 3 is ination-must-be same, The pose: % destination, The size of: source and destination-m e.. ri Jestiné A mo : me and destination is given below: sout Deng Destination Source : aq ee Oy Sang Reg Mem al Reg ol Mem 1 Reg/Mem Data CF, ([Devecr] ban Hl Bey} : : For example: 1. ADC AX, BX | 2. ADCAL, BL | fumbers present in registers AX-BY m, SEDI Store the result in memory fom address FS:2000h. —> BAe + 2000), Solution: : maa Logie: : Es -[200n] | aX Bx ADD BX, DI Es le ) CO io ES: (20008), Bx ADC AX, si Crs MOV BS: 20028), ax == wovat. oo ; “fT ADC AL, AL } This is for carry storage (CF) cz io) MOVis. (2004h), AL ALT/NT3 - Note; , hale ion i Biven as DS: (20004), then there is no need a exon Ds 7 rhe instruction, because Ds ig the default of direct an mode (refer fault and specified segment ‘eisters) For example, ingtnsce . Mov eo ‘instruction MOV Rs, 12000h}, BX is replaced NPROGRAM 3.4 Write a program to perform th numbers present X+¥, where X and ¥ are 48-bit memory fom address DS: BY ang pe SI St fom address DS: SI, tore the result in memory. | ‘Scanned wih CemScanner \ ; 58 Microprocessors: The 8086/8088, 80186/80286, '80386/80486 and the Pentium Family ges Solution: Logie: ‘Memory base address in ps . % x OH 0X42) (eX) * ‘Memory base address: inDS (si+4) (Si+2) (sl oF [ ra) ie2) (Sl) yaoc) (ADC) (ADD) MOV AX, [BX] ADD [SI], AX MOV AX, [BX+2] ADC [SI#2}, AX MOV AX, [BX*4] . ADC [SI*4], AX \ ; MOV AL, 00h \ . ADC AL, AL For carry storage (CF2) \ MOV {SI+6], AL \ HLT/ANT3 ~ \ 3.5.3 DAA Decimal adjust after addition. Procedure: The procedure to perform ad given below: ~ in of two decimal numbers using BCD numbers is, er in register AL. but the result obtained will be inv "AL into valid BCD result, give alid BCD number. it BCD numb« instruction \d 8-bit BCD number id BCD number of register 1. Transfer Ist 8-bi 2. Add AL with 2n 3. Convert this inval | I] DAA. | Logie use for DAA: () If four LSBs of register AL are greater than 9 (AL> 9 (1001)) or AC = t (auxiliary carry), then 6 is added the four LSBs of register AL Gi) If four MSBs of register AL are greater than 9 (AL>9 (1001)) of CF=1 (ary flag), then ister AL. ent in 6 is added to the four MSBs of reg! ppc number canbe ned TS andi fist um Note: Only 8-bit! | | am to add two decimal numbers 45 and 67. mn M3.5 Write an in register DX. assembly language progré fore the result i ‘Scanned wih CemScanner | rang Miro, wine \ Pra gots and Yh \ ssotion’ 5 wv Al MOVBL OT AC el DAA 0 . qovan oh ea A bow ‘ apcabad 7 MO" ve P eo MOVDX,AX 97 HLTANTS four digit BCD na "hy ym to add secu itn sey EE PO : ‘and BX. Store the result in DM. 4 ADD AH) BL 4 DAA MOV DL, AL ‘ a 4 MOV AL, AH ADC(L, BH a DAA oF MOV DH, AL ae MOV CX, 0000h/ MOV CX, 0 ce ‘ADC CX, CX HLTANT3 3.5.4 XAAA (ASCII Adjust after Addition) The procedure to Perform addit rform addition of two decimal numbers using ASCII codes is given below: (2) Transfer ASCII code of Ist decimal digit into regi si ister AL. (b) Add AL with ASCIL inal ASCHLocte oO decimal dit, but the result obtained in AL will b (©) Transfer 00h into AH. . (@) Convert invalid result of register “ALin ae register AL into valid ‘unpacked BCD number, give the instruction Logie use for AAA: (i) If four LSBs of register AL are, i Lae greater th i ___ 6s added tothe four LSBs stregieeat, (OD *AC=1 ees Gi) Four MSBs of register AL ae made 0000, Gi) The AC flag bits copied into cany fg bit and i ac = register AH is increased by one, iPAC = CF = |, then the number in Note: Only &-it BCD number, ° theese A Sebel atin st umber should be presenti. | ‘Scanned with CamScanner ‘i 60 Microprocessors; The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family PROGRAM 3.7 Write a program to add decimal digits 5 and 7 using ASCII code. Store th SCI code of the result in register CX ae Solution: ° MOV AH, 00h MOVAL, ‘S’; ASCII of 5 ALS ADDAL, ‘7’; ASCIl of 7 AL-6e A AAA APE OV 02 ADD AX, 3030h jax e202 MOV CX, AX HLTANT3 PROGRAM 3.8 Write an ALP to add decimal numbers (87), and (19) ing ASCII code Store the result in ASCII form in register CL-BH-BL. (Apané Cpusng “ Solution: MOV AL, ‘7° o ADDAL, ‘9; ALe-30% a AAA pave mogn, cee! ; MOV BL, AL ia MOV AL, ‘8° ADCAL, ‘1? gs141 00), MOV AH, 001 ; AAA | ee weer’ nt HA ate J)! Dewy mag ve 23) Ae 0% 00 N) MOV BH, AL . MOV CL, AH ADD BX, 3030h ADD CL, 30h HLT/NT3 PROGRAM 3.9 Write an ALP to add decimal numbers 78h and 91h represented in the form of ASCII codes, Store the ASCII codes of the result in Tegister AX-BX. Solution: MOVAL, ‘8° ADDAL, ‘I? 5 W465 “AAA 5 Arcot MOVBLAL ’ ;pr2-04n MOVAL, ‘7° ADCAL,‘9" 5 ALe 0H MOV AH, 00h - AAA 7 We N06 CFL) MOV BH, AL TBM 0 MOVAL,AH © ya eo ‘Scanned wih CamScanner Instruction Sets and Programming of Micro inst 263d" ADD BX, 3030h ee aM ADDAX, 3030h} HLTANTS Data from the Destination, (Subtract Source 35.5 SUBD, S( i ty i ) from, te contents of, destinatig any . el tents of source from, aise ie v This instruction ghana a of the source and destination shoulg be sane mh d in the same destination, The size of th a : ona of source and destination is given bel xX |Dane Destination Source : Y_ |sene Reg Reg Ms i X-Y_|Dene Mem eg Reg/Mem Data For example: 1. SUB AX, BX 2. SUB AL, BL 3. SUB Dx, (1234h) 4. SUB Es: (BP), 1234n, 3.5.6 spp D, S (Subtrac t the Content of Source with Borrow from the Content of Destination) This instruction subty Res th Contents of source with borrow from the contents of destination and the results placed in the aime destination. The size ofthe itce and destination should besame, Possible combination of sourse and destination is given below: Destination Source -L Joan Reg Reg Sane Reg Mem oF] Mem Reg ae Rew/Mem Data Dane For example: 1. SBB AX, Bx | 2. SBBAL, BL 3. SBB DX, 11234n) 4. SBB ES: (BX), 1234) PROGRAM 3.19 w, He an ALP to subtract Dumbers present register AX-BX from 52-bit numbers present in register CKDX. Store the result in ister SLD ‘Scanned wih CamScanner Pentium Family 62 Microprocessors: The 8086/8088, 80186/80286, 80386 /g0486 and the 3/8088, I it 4 Solution: Logic: ae SUB DX, BX - MOV DI, DX Crd SBB CX, AX MoV SI, CX HLT/INT3 St (s88) (SUB) the subtraction X PROGRAM 3.11 Writ - rite eambers present in the eee te ES: DI. ions DS: 3000h and DS: BX. Store the Solution. Logi Paeneene Bose add Mov AX, [30008] aa aonam sea 99%" yessn 0908 SUBAX, (BX) s MOV ES: [D1], ase address in reg 0S MOV AX, [3002h) Kae BKeH OX+? Bx SBB AX, [BX+2] ase address neg ES He Es: [DI+2} AX . WAX, (3004h] Die ee Dies DIF? or MON Se Bx) MOV ES: [DI+4], AX MOV AX, [3006h] SBB AX, [BX+6] MOV ES: [DI#6],AX HILTANTS 3.5.7 DAS (Decimal adjust after subtraction) The procedure 1 perform subsraction sin ee BD is given below: a (a) Transfer Ist g-pit BCD number into register AL (b) Subtract and 8-bit BCP number from register AL, but the result obtained will Be invalid _ Bed number. - Ce %@) Tocomvert this invalid BCD result of register AL into valid BOD stb gjvethe instruction DAS- Logic use for pas i c=, the acted from 4 LSBs of register A My OF 2 1, then 6 from 4 MSBS Of result of TES AL: | ‘Sanne 1 with CamScanner | ‘Store the result in BCD format in register AH. ee \ th PROGRAM 3.12 Write an ALPto perform the subtraction of decimal nun, er m\ RAM 3, py 7 1. — ie ‘ € Solution: as MOV AL, 73h oe SUBAL, 28H > 1 Z « wokntowcal DAS, i Ae SM "ses puobed eee MOV AH, AL , HLT/INT3 ‘ btraction X ~ Y, where me : id ROGRAM 3.13 Write an ALP to perform the sul : an va . * (24 bits) BCD numbers present inthe memory from address 2000:1500h ang 20394 \ the result in memory from address 6000:2000h, n Solution: Logie: ; Bee) MOV AX, 2000h Sy SBS] Movps/ax 5) | ~ 1502 4801) json MOV AX, Ga Mougg S00zh 300th 2000 MOVAL, [1500h] SUB AL, [3000h] DAS | 2002h 200th S00, (©) Convert this ‘invali instruction AAS, id result of repise MOV ES: (2000h), AL MOV AL, [15014] SBB AL, Booth] DAS MOV Es; (2001n}, AL MOV AL, [15024] SBB AL, [3002] DAS MOV ks; [2002h), 4: Hurmry BAL eit fom resister aL, but the result obtained will TAL into vatiq Unpacked BCD my umber, give the | ‘Scanned wih ComScanner Logle use for AAS: (i) PAC = 1 then 6 Is subtracted from 4 LSBs of register AL and 4 MSBs of result is made 0000. (ii) The AC flog bit is copied into CF and If AC © CF» 1, then contents of register AH are * decreased by one, Note: 1 Only 8-bit BCD number can be subtracted at a time and the first number should be present in the register AL., 2 Af ater AAS instruction the number In register AH Is OOh, it indicates that the result is Positive and the ASCII code of the result will be present in register AL. wes Water AAS instruction the number in register AH is FFh, then it indicates that the result ‘gative in 10s complement form, PROGRAM 3.14 Writ subtract - 7 le a program to perfi st i 2 using the ASC Store the ASCH result in rel oD. ® pevoan teste mee aie Solution: MOV AL, ‘8"; ASCII of 8 MOV AH, 00h SUB AL, ‘2°; ASCII of 2 AAS ADD AL, 30h MOV DL, AL HLTANT3 _2R0Gnas 3.15 Write a program to perform the subtraction 2 — 8 using the ASCII codes. ‘f lore the result in register CH. : Solution: y= yoo u MOV AL, °2 MOV AH, 00h SUBAL,‘8’ ; ALe~ FAW AAS 5 Ake FR OX CON ise comp fod) ADDAL, 30h’ MOV CH, AL HLT/INT3 3.5.9 CMP D, S (Compare Destination and Source Data) This instruction compares the contents of source and destination. Depending on the relation of source and destination, the values of the flags (carry flag and zero flag) are affected. x_] dare Y_| sens ‘Scanned with CemScanner | a ston Sols and FrOylelhiny OF Mi ud " 1s the relation of (0 number ; ope Land ZE* 0. el eX Yothen CF ® 0, and : : r : > ‘ tee eO,and ZF © 0. ‘iid or example: : CMP AL, DI ie ee mode: source (S) > RAM and destination > RAM ares oF JAL 52 |DH CF= Vand ZF = 0 2. CMP SP, 9000h Addressing mode: source (S) > RAM and destination > [AM ‘A153 ] SP CF=0and ZF=0 3. CMP [BX+DI, cH Addressing mode: source (8) > BIAM and destination (D) + RAM Cs] 8: (BX + DI) (memory) ‘a the contents of destnat tination may be register or mem > RM 6/6 bis) le des ion by one and sto Destination (D) res 11; but not the imm [x )pate 8 tt eTown For example: 1 INCCH Addressing mode: RAM 2. INC BYTE pre (BX+Dq) Addressing mode: BIAM the result in the same ediate data, Poser 2 osiesoy - — Ct ‘Scanned wih CemScanner r X and Y, we will get the following 7 Nt mt “hr 1 f Instru or 7 _ eo, \, f \s Microprocessors: The 3086/8088, 80186/80286; (90386/80486 and the Pentium Family Note: Here inthe above example, BYTEPTR(byte pointer) assembler directive is used, because the contents of the memory Jocation may be of 8 bits or 16 bits, so it is necessary to indicate that the contents of the memory location are of 8 bits or 16 bits, by using the assembler directive BYTE PTR (8 bits) or WORD PTR (16 bits). For example: 1. INC WORD PTR [BX] ‘Addressing mode: RAM X_] 1608: (8X) eae 1] 160s: CEs X41 | 1608: (8X) ‘Addressing mode: RAM 3, INC SP ‘Addressing mode: RAM 3.5.11 . DEC D (Decrement the Content of Destination) This i i en ae the aa of destination by one and stores the result in the same on. T tion may be register or memory, but not the immediate data. z Destination (D) > R/M (8/16 bits) x |pens X-1 pane For example: 1. DEC CH ‘Addressing mode: RAM 2. DEC BYTE PTR [BX+DI] ‘Addressing mode: BIAM X_], 0s: 16x+D1] X=1 J, 08: 8x +0] Note: Here in the above example, BYTE PTR (byte pointer) assembler directives used, because the contents of the memory location may be of 8 bits or 16 bits, so itis necessary to indicate that the contents of the memory location are of 8 bits or 16 bits, by using the assembler directive BYTE PTR (8 bits) or WORD PTR (16 bits). 3. DEC WORD PTR [BX] ‘Addressing mode: RIAM X_],_D8: (8X) = DS: [BX] ‘Scanned with CamScanner Instruction Sets and Programming of Microproco4, a Inst ‘ti yeh TTT : . DEC BX , © ssng mode: AM 4 ow X_],8X tie -1 See X-1],,BX F & $, DECSP Addressing mode: RAM ~ 3.5.12 NEG D [Negate (Negative) Contents of Destination] This instruction finds the 2s complement negative) ofthe conten the result in the same dest ination. The destination may be register or data, © Destination > RIM (8/6 bi) Its Of the destination Nd sto, ‘memory, but not the immecige [3 Joare Dare For example: 1. NEG AH 2. NEG Cx 3. NEG B’ * incorect, because in Register in Not permitted, lirect addressing Mode register Bp is 5. NEG WoRD PTR [BP +0 6. NEG BX 7. NEG ES: [BP+sy 3.5.13 CBW (Conve; This instruction converts th sign byte prese ve “Gn byte prese, a eos, rt Sign Byte into Sign Word) SS ALL the sign word and stores the ‘Scanned wih CamScanner For example: Suppose the content of AL = Oh So, alter CRW the result in the AX is 10 000 1 0 O}AL [uuvviviiatfifoo 0010 ola AH AL So, \ after exevution of CBW instruction the content of AX= FF94h 35.14 CWD (Convert Sign Word into Sign Double Word) This instruction converts the Mores the result in register w sign word present in the register AX into the sign double word and Ls t (sIsis]s] $] Pu] Pis[ Pe [Pn] J, Dy | DX-AK - ox aX 3.6 MULTIPLICATION INSTRUCTIONS 3.6.1 Unsigned Number Multiplication MUL S (8/6 bits) (Unsigned Number Multiplication of Source Data and Accumulator) The source may be register or memory, but not the immediate data. S— RM, but not data. (a) If source is of 8 bits: MULS (8 bits): It will multiply 8-bit content of specified source with 8-bit accumulator AL and the 16-bit result of multiplication is stored in accumulator AX. }- Co) a 8 sipm) & aH AL 16 Bits * 8 bits = 16 bits IcAH| _ |=00h, then OF = CF=0 IfAH 00h, then OF = CF=1 . ‘Scanned with CamScanner ramming of Microprocess, fion Sats, and Progr : Instruct 16 Ifsource is of ; / if § (16 bits) iil mui 16 | re 32-bit result of multiplication is st | a 16 LSBs in register AX) contents of specified source with 16-bit 7 © eg in register pair DX-AX (16 Mpg ;. °C, red in register pair D. ( Bs in meh a ; 82 d OX AX mx 16 sim) 16 ; 16 bits * 16 bits = 32 bits {irox{]= oooh, ten oF = CP =0 | [ox ; ¥0000h, then OF = CF = 1 Note: Microprocessor will multiply the equal length of data, i.e. 8*8 or 16* 16-bit Multiplctn, For example: 1 MUL AH * ; aaa AX areee 8 AH AL O16 2. MUL BYTE PTR [BX] : —— aX - a8 we AH ALS 18 (the above example, BYTE PTR is an assembler directive and itindicates that the data from memory location pointed by BX is of 8 bits.) 3. MULSI C4, 4. ax 16 16 OX Ag 82 4. MUL WoRD PTR [Sl] result in memory DS: Solution: MOV AX, 001Dh MOV BX, 156Eh MUL BX ‘Scanned wih CamScanner _ 0. Microprocessors: ‘The 8086/8088, 80186/80286, 80386/80486 and the Pentium Famil amily ov {St AX mov [SH#2}, DX wT otet TO perform 8 * 16-bit multiplication, use 16 * 16-bit multiplication. 3.6.2 Signed Number Multiplication As the operation of multiplication of signed and unsi " ‘ . igned are - instructions are also different. jgned numbers are different hence their IMUL $ (8/16 bits) (Integer Multiplication of Source Data with Accumulator Data) Source can be register or memory, but not the data. § > RIM, but not the data. (a) Ifsouree is of 8 bits IMUL S (bits) Microprocessor performs multiplication of specified source of 8 bits with | §ebit accumulator AL and stores 16-bit result in agoumulator AX. : oS. x mx 8 SRM ® aA Oe _ Bbits * 8 bits = 16 bits {ithe signed bit of AL is equal t0 0/1 and the number in AH is OOb/EFh respectively then the gMSBs of the result of register AX is neglected. In such case OF = CF =0, otherwise OF = CF = 1. So we have to take complete 16-bit result. (b) If source is of 16 bits TMUL S (16 bits): Microprocesso° performs multiplication of specified souree of 16 bits with 16 bit-accumulator AX and stores "32-bit result in register pair DX-AX. i) -TI—LT) mx 18 sim ox ax 46 its * 16 bits = 32 bits arte signed bit of AX i equal o O/T andthe number in DX is 0000h/FFFFh respectively then the 16 MSBs of the result of register De isnegleted. In such case OF = CF= 0, otherwise Of = CF= 1. So we have to take complete 16-bit result. For example: 1. IMULDH ae a aH AL ‘Scanned with CamScanner Instruction Sets and Programming of Miroorcessr 2. IMULDI —| a8 Dx AX 8&2 3. IMUL WORD PTR [BX] me 32 x 8 Mane OX AX | PROGRAM3.17 Writea program to perform multiplication of +15h and-76h, _ 1’ Store the Tesu in register BX, Solution: MOV AL, Ish MOV DL, 76h NEG DL; performing negative of 76h | IMULDL. MOV BX, AX HLT : (PROGRAM PAB Write «program o perform multiplication ofan 8-bit signed ‘number present ‘egister BH with the 16-bit signed number in register CX, Store the result memory location SS: BX. Solution: MOVAL, BH CBW, performing sign extension of number present in reg BH MULCX MOV SS: [BX], AX MOV SS: [BX#2], DX HLT The procedure to perform multiplication of two dk imal digits: (2) Transfer ASCII code of first number in register AL and ‘ASCII code of second number in any other register, (b) Convert this ASCII code into unpacked BCD number 30h) | (©) Perform multiplication of these unpacked BCD ‘umber, the result obtained in ALIAX | will be binary number. | \ AGT convert this binary result of register AL into unpacked BCD number use instruction AAM. a" (© Add 30h into this unpacked BCD number for obtaining ASCII code. AAM (ASCII Adjust After Multiplication) ee ‘Scanned with CamScanner AL mae (10)0 (OGRAM oA a program to Cll perfor /ASCII codes. Store the ASCII codes of the ail vor of decimal digits 2-and 6 using 7 ‘Solution: MOVAL, ‘2 MOV AH, ‘6” = Axe to3 SUB AX, 3030h 300K j Axe 02 BULA acento ie rat * PAYS oO od . ADD AX, 3030h MOV CX, AX HLT GI RAM3.20 Witeaprozram toconvert sn bit binary number 17h nto the equivalent 8-
ADDAHAL ; 88 as HLT Note: AM instruction is sed to convert &-bt binary num! er into unpacked BCD nimber SION INSTRUCTIONS 3.7. DIVI 3.7.1 Unsigned Number Division pIVs (9/16 bits) Source can be either register OF memory, but not the immediate (a) Ifsource is of 8 bits pivsé bits): 0 this instruction, dee dividend is Joaded in bares ‘AX an pit divisor can be Joaded in an} yy 8-bit register or in wry. The res sult is: s quotient and. ee Cas quotient is obtained in oe ter ALand the F jn register data. ininder is obtained —— | ‘Scanned wih CamScanner aH__AL [eo] WO C1, s is of 16 bits / oon ee ih istrcion, 32-bit dividend is 16 bits; Tn this instruction, 32-bit dive me a be Pte in any 16-bit register orn el sen the quotient is obtained in register AX and remail loaded in register DX-AX and 16. ‘The result is quotient and Temaindey ined in register DX. : For example 1. DIVDI : : K__AX ox__AX 2 ail Jax : ‘ = Oe 32 . 16 R ]ox 16 BA 16 16 s DI 2. DIV WORD PTR [BX + SI] DX AX a Ax 32. 32 R |DX M16 uJ ZZ PRO RAM3.21 Write a program to perform the n 8573/2946. Store the result in memory location DS: DI. Solution: ea MOV AX, 85731 oooh | e57an @ AX MOV Dx, 0000h/ MOV DX, 0) 16 MOV BX, 2946h a wr at DIVBX Pe 2946h | BX R |Dx 4 16 MOV [DI], AX R a MOV [DI#2], DX HLT Note: To perform 16/16-bit division convert 32/16-bit division, S eee similarly, to perform 8/8-bit division convert 16/8-bit division. ‘Scanned with CamScanner | pI ; ource call be either register or memory, but not the immediate data. For using wpa instruction, the numerator and denominator should be signed numbers in o-complement form. The result, i.c. quotient and remainder obtained are also signed number in tw two’s complement form. (lf source is of 8 bits: IDIV S (8 bits) In this instruction, 16-bit dividend is loaded in = register AX and 8-bit divisor can be loaded in any AX [e Ja $-bit register or in memory. The result is quotient 16 __, and remainder. The quotient is obtained in register {J ‘ALand the remainder is obtained in register AH. 8 a) (b) If source is of 16 bits: IDIV S (16 bits) In this instruction, 32-bit dividend is loaded in register DX- AX and 16-bit divisor can be loaded LL] in any 16-bit register or in memory. The result is we, quotient and remainder. The quotient is obtained in register AX and the remainder is obtained in i register DX. s For example: 1. IDIVDI DX __AX ma AX DX [le Lhe oI 2, IDIV WORD PTR [BX + SI] Dx__ AX CI) E 32 we 3. IDIV BYTE PTR [BX] 4; IDIV BP ‘Scanned wih CamScanner ov AX, 9900h Nov DX, 0000h NOT AX. yr DX Xp AX, VADD AX, 0001 > (spc DX, WADC DX 000») - —————— MOV BX, 2500h IDIV BX MOV [SI], AX MOV [SI+2], DX HLT Note: The range of 8-bit signed nu is + 7FFFh to-8000h, so -9900h cannot be repres we have to perform 32/16-bit division. b ; ange of 16-bit signed number ig-+7Fh to 80h and the range Of ane ead jn 16 bits and hence 1n the above program, ‘AAD (ASCII Adjust before Division) _e ‘The procedure to perform the division of: two digit decimal numbers upon one digit decimal number, using the ASCII codes is given below. ~~ @ Transfer AS AX. Transfer ASCII code of @) ‘Transfer ASCII code of two-digit numerator into register one digit denominator in any other 8-bit register. Giy Convert this ASCII codes into unpacked BCD number (-30). Gify Convert 16 bit unpacked BCD num use instruction AAD. (fox \(iv)-Using DIV instruction perform ihe division. The result obtained will be quotient and remainder in unpacked BCD number. (v) Add 30h to obtained ASCII codes of quotient and remainder. Logic use for AAD: bers of register AX into equivalent binary number- * (10+ ——- AH AL rh oh —>} AH neers ccc nnn neon eon ieee eee _ PROGRAM 3.23 Write a program to perform the divi i the ASCII codes of the result in register DX. Le ‘Scanned wih CamScanner ' |76 Microprocessors: The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family Solution: MOVAX,‘15) 5 Axe at aS M MOV BH, ‘6" SUB AX, 3030; Ava 08 05" . SUBBH, 30h; gtia-oe 4 AAD 3 qve-oo oF H a DIVBH ; Ax e~02 02 H ‘ ADD AX, 3030h MOV DX, AX HLT nn eS RR EE EEL PROGRAM 3.24 Write an ALP to perform the division 23/7 using the ASCII codes. Store the Tesult in memory location DS: SI. Solution: MOV‘AX, ‘23° MOV BH, ‘7’ SUB AX, 3030h SUB BH, 30h AAD DIV BH ADD AX, 3030h MOV [SI], AX HLT PROGRAM 3.25 Write a program to convert an 8-bit BCD number 21 into the equivalent binary number. * Solution: , Method 1: MOV AX, ‘21° ‘SUB AX, 3030h AAD HLT Method 2: MOVAL, 21 MOV AH, 21 CL, 04 ‘OR AH, CL/ROL AH, CL / AND AX, OFOF AAD HLT ‘Scanned with CamScanner number into the aes We a progam comer an Si packed BO ut ia * uml The BCD number is present in register CH. S ee Solution: Only 2nd method can be used, if the datz is in OF re BCD to binary oc decioal to besedecimal woe insertion M MOV AL. CH MOV AH. CH MOV CL, 04h ROR AH, CL AND AX, OFOFR AAD MOVDL,AL } MOV DH. AH } MOV DX, AX HLT } Summary of arithmetic instructions: 1. ADDD,S ] ZAKDS | saauseete 4. SBBD.S | 5. CMPD,S 6. NEGD a 7. DAA ] exe of ater EE NS 8. DAS 9. AAA }: 10. AAS I. AAM | se 12. AAD 13. INCD | eater ee 14, DECD 15. DIV S (8/16 bits) } 16. DIV S (8/16 bis) 17. MUL S (8/16 bits) } 18. IMUL S (8/16 bits) 19. CBW } No flags are changed 20. CWD 3: 38 LOGICAL INSTRUCTIONS : aif “The logicel instructions are used to perform the different logical operations. Microproces* dan perform the following logicel operations. (2) ANDing (b) ORing (©) X-ORing No flags are changed OF and CF are changed ‘Scanned with CamScanner J % oe\\y/ Microprocessors: The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family (d) Inverting (©) Rotating data towards lefVright with/without carry (f) Shifting data towards lefY/right. / 3.8.1 AND D, S (AND Destination and Source Data) / ‘This instruction performs the ANDing of source data with destination data and stores the result in. destination. The possible combination of source and destination used is given below: . Destination Source D R R R M s M R —— R/M Data ] For example: oh 1. AND AH, BL Suppose AH = 1011 0001 and BL= 1100 1011 So after AND AH, BL result in AH is 1000 0001 . AND CX, BP }. AND [7000h], DL EXAMPLE 3.7. Reset (0) or mask 3 LSBs of register AL without changing 5 MSBs. Solution: The Boolean theorem of AND gate is given below: [| yb 0 - A+ “© 1+ A———*A To make any bit 0, we have to perform ANDing with 0, and to keep any bit unchanged, we have to perform ANDing with I ~ ones aoa veo ee AL[D, Dy Ds Dy Dy D, Dy Dy wee Fo) attest et) 200) use ‘Scanned with CemScanner ANDAL, F8h nd sours ith destination data, but the rg x "8 og ND ST D s (Al - ind 8.2 TEST penis of destination '. ‘not lost rising rected) so the. aren pelow: = te we : oS ses fags destination ed is 8 os comt pation of ‘source : 4 Destination Source : y R R é R M —— ‘ M R Data Ne - For example: | 1. TEST DH, CL 2 TESTCX.BP 3, TBST DH, [BP+DI] ut changing other bits EXAMPLE 3.8 Test the value of D; bit of register CH witho ~ osfo 000100 0 an TEST CH, 08h (a) D=0, ZF =I and PF= (b) D,=1,ZF 0 . 3.8. estina 3 OR D, S (OR Destination and Source Data) a) This instruction performs the ORit the same destination The pei data and destination data and th ion of source and dest result is copi la and the results copied in given below: Source D iS R R M s M 4 — a Data ‘Scanned wih CamScanner \ o ‘A 1O _ Microprocessors: The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family 45 For example: EXAMPLE 3.9 Set tvo MSBs and LSBs of register AL without changing other bits. Solution: . O+A The Boolean theorem of OR gate is given below: A 1+ A——_+1 Dy Dy Ds Dy Dy D, D, D, ch] 11000001 ORAL, Cih to perform ORing with one, and to keep any bit unchanged perform ORing AL| 1 1 Dy D, Ds D, D, 1 . 3.8.4 XOR D, S (XOR Destination and Source Data) This instruction performs XORing of source and destination data and the result is copied into the same destination. The possible combination of source and destination is given below: Destination Source D R _ oR R M . M R RM Data For example: 1. XOR DL, BL 2. XOR SI, [BX] ‘Scanned wih CamScanner : AMPL WA lave or complement 3 MSBs of register Aly Witho EXAMPLIIOA In it Chang IX cis given below: et | Solutions The Boolean thearem of XOR pate is given ve \r o )——, | co 00A———___, 4 1OaA——_s, A | | ‘To invert any bit perform XORing with on with zero and t0 keep any bit unchanged Perform XORiy This instruction ro Positions, i ‘le or to swap the | ‘an also be used ina word (by {0 rolatea bit into Cp, Where it can be onal jump instruction JC and INC, is given ditectly along with {he instruction, but if the count is °CL, and thename ofrepister Cr iven along. with the For example: 1. ROLCH,1 ICH = 1101 0100, then after execution ROL CH 1, the result in CH is 1010 1001 ‘Scanned with CamScanner 1101 0100 | CH 1010 1001 cI 2. MOV CL, 03 ROL BP, CL This instruction rotates the contents of BP three times toward left. If suppose BP = 1010 1100 0110 0011, then after execution of ROL BP, CL, the contents in register BP is 0110 0011 0001 1101. 3. To exchange the two bytes of register DX or exchange the position of two bytes of register DX or swap two bytes of register DX. We have to rotate the 16-bit number of register DX 8 times MOV CL, 08 ROL DX, CL * 4, ROL BYTE PTR [BX], 1 : 5:ROL WORD PTR ES: [4000], 1 3.8.6 RCL D, Count (Rotate Left Destination with Carry) This instruction rotates all the bits toward left. t through carry. The carry flag is treated as a part of the destination operand. Thus, operand is circular, because the MSB of the operand is rotated into carry flag and the bit in the carry flag is rotated around into the LSB of the operand. Destination may be register or memory (D-R/M) D I* MSB+ LsB l CF ae For example: 1. RCL BYTE PTR [SI], 1 2. MOV CL, 04h RCL WORD PTR [BX], CL 3. MOV CL, 05h RCL BX, CL 4, MOV CL, 04h RCL DX, CL If suppose the contents of DX is 0100 1011 1001 0011, then after execution RCL DX, CL, the contents of DX is 1011 1001 0011 1010 (assume initial carry bit is 1, i.e. before execution). 3.8.7 ROR D, Count (Rotate Right Destination without Carry) This instruction rotates the contents of destination towards right without carry. The bit moved out of the LSB is rotated around into the MSB. The data bit moved out of LSB is copied into CF. ——— rer ‘Scanned wih CamScanner 01010, 80 i result after execution, the r 10, oil in jes the result in ames and copies tl fs] towards: right by 8 times tent of rotates the cont L This instructions asl Pt : the-same destination, 1 ight Destin is 88 RCR D, Count (Rotate Right De This instruction rotates the contents of destination, some M instructic f Sanit eh -RM) : oasis be register or memory (D-R/M) x ation Through Carry) ; umbers of bit positions, towards right oD ‘ MsB LSB For example: 1. RR WORD PTR [SI], 1 \ 2. MOVCL, 08h | RCR DX, CL $89 SALISHL D, Count (Shift Arithmet | Destination Data and Put Zeros in the LSBs) | This insuction shits each biti ified destinat | lft SAL or SHL instructions used mm the mult (bit data in destination is X and ite isX * 2%it means thatthe ic Left/shitt Logical Left shifted towe , number is multiplied by 29 Destination may be register or memory (D-R/M) ‘Scanned wih CamScanner R D, Count (Shift Logical Right Destination Data ang Put 3.8.10 SHR D, Bs) Zeros into MSB: oe . : i nati mber of bit positions to the right i ion shit bit in specified destination some nun t This instruction shift each iis i jumber. If 8/16-bit number in the ion j division of unsigned number, If 8/ : he SHR instrucfion is used me right by n buts, then the result obtained will be X/2", The result will be correct unsigned number provided that the result obtained will be whole number It wil Without decimal point Destination may be register or memory (D-R/M). o CF Os copied — MsgB——_-_,igg{ || For example: 1. MOVCL, 03h SHR CH, CL Suppose the contents of CH is 0001 0000 (10h = 16d), then ‘ion §] CL, the result obtained in CH is 0000 0010 (10h/23 = i after execution SHR CH, 2. SHR SI, 1 3. MOV CL, 05h SHR WORD PTR [SI], CL PROGRAM 3.29 Wi e an assembly language program to ¢o Ive the equ: 3AX/2. + 1DX/4 + BP 5 By Use the shift and add method. Solution: The given equation can be written as [@AX + AX)/2] + [((4Dx + 2px + DX)/4] + [BP] Bx AX +AX/2+Dx + DX/2 + DX/4 + BPs Bx AX +AX/2!+Dx 4 DX/2! + Dx/22 4 BP Bx ‘Scanned wih CamScanner \ 86___ Microprocessors: The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family MOV BX, AX SHR AX, 1 ADD BX, AX ADD BX, DX SHR DX, 1 ADD BX, DX SHR DX, | ADD BX, DX ADD BX, BP HLT PROGRAM 3.30 Write an assembly language program to solve the equation 712P + 9/8Q + R/4 + ES: ST The numbers P, Q and R are 16-bit unsigned numbers and the result is also of 16 bits, Solution: The given equation can be written as. [4+2+1) P/2] + [(8+1) Q/8] + [R/4] > ES: SI 2P+P+P/2+Q+Q/8+R/4 — ES: SI MOV AX, Ph; 16-bit number P is copied into register AX MOV BX, AX £ SHLAX, 1 Pe pene ADD BEAK (axa) Pe he nye MOV CL, 02 a DR SHR AX, CL wav by, 4 ADD BX, AX pea ADD BX, Qh Ss MOV AX, Qh nae MOV CL, 03h SHR AX, CL ADD BX, AX MOV AX, Rh MOV CL, 02h SHR AX, CL ADD BX, AX MOV ES: [SI], BX HLT 3.8.11 SAR D, Count (Shift Arithmetic Right Destination Data and Put __ MSBs Bit into MSBs Itself) nO SBS Itself) This instruction shifts each bit in a specified ¢ destination, some number of bit positions, to the right depends upon the count, SAR iction is used to perform the division of signed number. If 8/16 bit number in the destination is +-X and it is shifted towards right By nbits, then the result oa —-e —- ‘Scanned with CamScanner number provided th, ‘ rect: signed it will on oa i point. yO RIM) ister For example 1, MOVAH, 24h Uae ‘AH ; AH Seal ad = (I1101110),= 18s ca execution ofthe above instructions, the content of AH is 1110 11 10 Cl 8), 3.8.12. NOT D (Note Destination Data) This instruction inverts each bit of the byte or word at the specified des destination and stores the result inthe same destination, — 4 ~~ Destination may be register or memory, but not the immediate data, _ eS wt wf D-RM, but not the immediate data. For example: 1. NOTAX Complements the contents of AX ne ‘Tegister and stc \ 1 ran oo £910 10100101, te ate erection Nott the same register AX, ae 101 1010, % we get 3 NOT BYTE PrR si 4. NOT WorD pre a4 ie bi) ‘Scanned with CamScanner Summary of logical instructions 1. ANDD,S 2. TEST D, | orec ea0 3. ORD,S SF, PF and ZF are changed according to the result 4, XORD, S is undefined 5. ROL D, Count - a 6, RCL D, Count Only CF is changed 7, ROR D, Count ~~ 8. RCR D, Count 9. SAL/SHL D, Count | 10. SHR D, Count CF, PR, SF and ZF are changed according to the result 11, SAR D, Count 12, NOTD No flags are affected. 3.9 FLAGS CONTROLLING INSTRUCTIONS 3.9.1 STC (Set Carry Flag) This instruction sets the carry flag (CF = 1) and does not affect any other flags. 3.9.2 STD (Set Direction Flag) This instruction sets the direction flag (DF = 1), by setting direction ae, causing the string instruction to a.fo-decrements the SI and/or DI registers. STD does not affect any other flags. 3.9.3 STI (Set Interrupt Flag) This instruction sets the interrupt flag (IF = 1), enabling processor recognition of maskable interrupt anncating on he OTE jowever, that a pending interrupt will not actually be recognized until the instruction following STI has executed. STI does not affect any other flags. 3.9.4 CLC (Clear Carry Flag) This instruction clears the carry flag (CF = 0) and does not affect any other flags. —— 3.9.5 CLD (Clear Direction Flag) This instruction clears the direction flag (DF = 0) causing the string instruction to auto-increments the SI and/or DI index registers. CLD does not affect any other flags. ‘Scanned wih CemScanner id 141 CF OF cleat Intel when the interrupt enable f1,, ry eit sxternal interrupt request that poe é ogi erp is disabled (even ifthe Signal $ ee é cLidoes not affect any other flags, i Oe SS 7 A implements the Carry Flag) It means that the 2 sis instruction complements the catty flag. It mé aa me cfcarty birogeles 0 its opposite state ‘and does not affect ny ther 3. 1o set the trap flag. trap flag. Trap flag can be set orp eq fe a set of instruction ition to set or reset the ‘Solution: There is n0 direct instruc by using ack instruction. To getthe tap flag + 5 S8's ——++—— 8 LSBs oy ie wo EXAMPLE 3.12 Wit Do ae ae of instruction to reset the trap flag, reset the trap fl | , ag. eons ! MOV x, co00h <——euses— ~ Sisa5 Pust ax ax 8S: sp ‘Scanned wih CamScanner \ 1__ Microprocessors: The 8086/2062, eoiéeiecose, eocaeianses anc tne Sant Hemi ‘\3.40 STRING INSTRUCTIONS /.t0. REP (Unconditional Repeat) REP is the prefix inst REP is given as prefix nnumiber of times, where 1 is the cot Format REP X (X is any 8086 instruction): The instruction X ven with 327 maracton will be ‘executed n times, where n is the count present in the resister CL Flow chart of REP X and Y: Following is the flow char: of 3 any instructions of 8086: 3.10.2 REPZ/REPE (Repeat if Result is Zero/Repeat if ma _ iti i fon. which is mre scucten X ZIREPE is a conditional repeat prefix inssmuction. whics = rs a ae The instruction X should be suck thet zero Gag should be changes iecording to the result. Format - esrcten XB oe a bes bere uEPZ X (K is any 8086 instruction): UF the count rasa ON Se be meses NS 5 =Lb mess er a umber of times provided ta each tne 7 BCX BREE speatedly executed only when ZF=1 ‘and up to counter vala= ‘Scanned wih CamScanner Condition is not satisfied oh ‘Microprocessor executes next instruction Y we weN 3.10.3 REPNZ/REPNE (Repeat if Result is not Zero/Repeat if not Equal) REPNZ/REPNE: isa conditional prefix Microprocessor executes instruction x Instruction, which is used with, any other instruction X of the microprocessor 8086, The instruction X should be such that zero flag should be changed \ according to the Tesult, Condition is Not satisfied '=0 | Condition is Year 0 satisfied . Format REPNZ X (X is an Y instruction of 8086): IF i ‘he count in register CX. struction X is executed 1. mes, provided that each TN means that the X is repeatedly executed only. When ZF = O and Up to Counter value in CX is reset, Flow chart of REPNZ X ang y ‘Scanned wih CamScanner 2 _ Microprocessors: Tho 8086/8088, 80186/80286, 80306/80486 and tho Pentium Family $.10.4 Loop Label equired to be executed more than one’s, then it can be done by For example: Program: A B c Li: D E F : Body of loop Q LOOP LI v Zz (Where A, B, C -Y, Z are the instructions of microprocessor 8086) {f the count in segister-CX Js n, then the micropracessor will execute instructions D to Q (body of loop) n number of times within the loop as given in the flow chart. Flow chart: Microprocessor executes instruction D to @ a——— ox x Is No cx(]=0 cxJ#0 ° Yes Cx[]=0 Microprocessor executes next instruction Y ‘Scanned wih CemScanner ae is! Instruction o*™ fh ye EL (Loop If Result is Zerofog, OPE LABI ie f loop there sh iN we ee oe ol re shoutg Oo os \PZ/LO! on, In the body of loop ther ould be \ s 7 F 3105 Loo content issn ed according to the status Frese / 9° x a : E is a nd be As m0 ca : ria in which 2er0 Sea $ + example: , ve sos - i s S Program a B : Li: D E F Body of loop Q . ' * LOOPZLI i Y ‘ Zz } ; : (Where A, B, CY, Zane the instructions of tnicroprocessor 8086) 6 ifthe count in re fer CX isn, then the microprocessor will, execute instructions D to Q (body oF loop) n numberof times within the {oop provided that each time ZF=1 ag given in the flow chart, Flow chart: No ZF = 9 Condition is Condon is" #tistog Satisfieg Cx 40 | ao ° ‘Scanned with CamScanner I= 3.10.6 LOOPNZ/LOOPNE LABEL (Loop If Result is not Zero/Loop If not Equal) LOOPNZ/LOOPNE is a conditional loop instruction. In.the body of loop there should be at least one instruction in which zero flag should be changed according to the status of result. For example: Program: A B ce Li: D E F : Body of loop Q ; LOOPZ LI Y Z (Where A, B, C.....Y, Z are the instructions of microprocessor 8086) If the count in register CX is n, then the microprocessor will executes instructions D to Q (body of loop) n numberof times within the loop provided that each time ZE=0.as given in the flow chart. Flow chart: >| Microprocessor executes instruction D to Q No ZF =0 Condition is not satisfied <0) Condition is Yos ZF =0| Sctsfed -1——> x cx | Yes Cx[_]=0 ‘Microprocessor executes next instruction Y }¢-——J ‘Scanned with CemScanner neice cute an instruction or gro a Uy fe Above instructions ate MP OF ing, toe 6 ae ere . pert hans — 4 3.107 MOVSBIMOVSW (Move String Byte/Move String W, y ‘ Oy istroction transfers byte of Wort from the source addressed by spy ra) \ isi Fi bs (addressed by DI). SI and DI should contain the offset address of the Othe a. site . Soureg 9° destination string ee he a Data segment register (DS) is used for SI and extra segment.tegister (Bz); Inother words, base address for source memory location whose effective addr, 8) 1S Used fo os ae address for destination memory location whose effective cin ing) Ry, en rom ES. Sl and DI updated to point to the next string el fe dress ig i DF ireton eee f, depending upon tye Di}, Operation: » G, Ea . PAs) xX 7 : > x |PAy. & My ™ s 5 OR we 16 |-— xX | PA YY ; : wy *® es Ba, ey = On the ing by ‘truction Moy " O,and it Mone ee is ‘Scanned with CamScanner PROGRAM 3.31 Write an assembly language program to transfer 10 bytes from the starting source address 75000h to the starting destination address 81023h. Solution: ES oO t [a702|oh silo 3} bs t [7500]oh X > 81023h x o Xe 75009h Xo * 8102Ch ‘Source Destination oO 0A DF cx Start address 75000 Start address 81023 +9 +9 Endaddress 75009 End address 8102C MOV AX, 7500h MOV DS, AX MOV AX, 8102h MOV ES, AX MOV SI, 0/ MOV SI, 0000h MOV DI, 3 / MOV DI, 0003h MOV CX, 10/ MOV CX, 000Ah CLD ;DF=0 REP MOVSB HLT 4 In the above problem, if we replace MOVSB with MOVSW, then change MOV CX, 000Ah with MOV CX, 000Sh. By using this, we have to perform the same task. SS a ES RSS ACS PROGRAM 3.32 Write an ALP to transfer IK words from the starting source address 90513h to the starting destination address C1009h. ‘Scanned wih CamScanner traction Sets and FOraMming of Mca Ins Oy Es Ry sotto oi (ic, S_ - 9 isi Bf si[3k—4 | / CHO 05h 06th aH EU wwod | > : 7 C1808 9001 oe tic a _Desiaton Count = [1024] = [0400 cx x : MOV AX, 9051h MOV DS, AX ' MOV AX, C100 s MOV ES, AX w MOV SI,3 7 MOV DI, 9 MOV Cx, 1024 /MOV CX, 0400h cio REP MOVsw HLT FROGRAM333. Write anasembly faneuage program to tansers Words from start Starting source Adress 8000Ch tothe stating desington’ ‘address 8001 0h Smmon overigea "all te memory segments shld be Solution: If the source and destination memory location ir Centain fom that location of destnntn whose adress nor vera at he dt Generally, in overlapping case, dave ‘ransetng stat fom thee addree "® With the soure, MOV AX, 8000h : MOV DS, AX Moy ES, AX MOV SI, 0014h Mov DI, 0018h, MOV CX, 5 STD ; DF= 1 REP Movsw HLT ‘Scanned wih CamScanner vO 438 _ Microprocessors: The 6086/8088, 80186/80286, 80386/80486 and the Pentium Family 80010h 80010h BEES 001th 8001 th aa + sooth] \ 80014h sootsh | 7 g0015n + ay 80018 U 80013h 5 i x OF 3.10.8 LODSB/LODSW (Load String Byte in Register AL or String Word into Register AX) This instruction loads or transfers the byte or word string element address by SI to register AL or register AX. SI updated the point to the next string element, depending upon the status of DF (Girection flag). SI is incremented/decremented by 1 or 2 memory location, depends upon the string type, i.e. byte or word (LODSB or LODSW). Operation: PAs| x By Ms AL oR 16 PAs x - x AL Y »y |AH Mg AX ‘Scanned wih CamScanner e ; pF=0(CLD), then 7 SI+1or2—> SI IfDF =1 (STD), then Sl-lor2 3 DI ENTER YN OS eet meme 3.10.9 STOSB/STOSW (Store String Byte or Store String Word) This instruction transfers a byte or word from register AL or AX to the string element addressed by DI. Depending upon the status of direction lag (DF), DI is updated automatically, i.e, incremented or decremented by one or two respectively, If the instruction uses STOSB, then DI is updated by 1 location, or if the instruction uses STOSW, then DI is updated by two locations. Segment register used with DI register is ES, it means that base address is always taken from ES (extra segment). Operation: Fi 3! aul x > X |PAy on Mo p "© es BAy ° EA, + DI PAy 20 IfDF = 0 (CLD), then DI+1lor2 DI If DF = 1 (STD), then DI-1or2— DI sper etc con munca at mn oe eR PROGRAM 3.37 Write a program to reset 100-memory location starting from address 3000:4500h. Solution: MOV AX, 3000h MOV ES, AX MOV DI, 4500h MOV CX, 100 / MOV CX, 0064h MOV AL, 00h CLD REP = STOSB HLT ‘Scanned wih CamScanner 400 memory location Count = [109] = [64h} | 0 Cx CX OF 66 f it ion from add, RAM3.38 Write.aprogram to copy word DADA into 4K-memory locatior py \so000k, Solution: oe (ire ee MOV AX, 7000h = = MOVES, AX MOV DI, 0 . , MOV CX, 2048 / MOV CX, o800h aA MOV AX, DADAh CLD REP sTOSW. HLT PROGRAM 3.39 Write an ALP ‘0 input and store 256 by €S from it i % the port 75h, Store the data block at 12345h. As the data tb va a teal : Will be asynchronous, the status O/P pin. of input device Will active, th, “vice and microprocessor ‘input the numbers. The ‘talus pin is connected tothe MSB of input pon 1 ToPrOEESSOr should Solution: : MOV AX, 1234h MOV Es, ax MoV pi, 5 MOV CX, o100h CLD LI: INAL, 76h ROLAL, 1 JNCLI e_ ‘Scanned with CamScanner | i 404 Microprocessors: The 8086/8088, 80186/80286, 80386/80486 and the Pentium Family 12: INAL, 75h STOSB LOOP L2 HLT cr ES Status D, le 1234]oh f UP port Hl ol - a | 7 fp, | ae : = oA Status 1 8 8 ve 8 12345 < le ren le UP device 12346 12444 Count = [256] = [ot00h] Lo cx cx OF ‘Scanned wih CamScanner Pavey oe na String Byte »' iy ith a byte or word pointed by DI ina memory location in extra memory segment (ES). Destination string has to be in ES and DI should contain the offset of the string (effective address). The comparison js done by as usual subtracting by DI trom the content of ‘AL or AX and destination Sing element (byte or word) adresse EAS aie ae the flag, but does not alter the contents of destination string or the contents of accumulator 10 SCASB/SCASW (Scai 3.10. ALor a word in. AX wi his instruction compares.a byte in (AL/AX). Operation: * ( we AL] x = [ Wail Pas on AL! Xo - Y) .| PAo AH| X, a My 1 ayy ES “x Mp Sa) EAy + DI PA, 20 ‘Scanned wih CamScanner Pp \fDF = 0 (CLD), then DI+1 If DF = | (STD), then — DI-1 or2 py Block of § i Scan forthe byte 16 bytes is Present in the memory location from address 80008h (a) If 76his present in this d lata block, the it effecti of memory location containing 76h in ihe paid fe in (b) Otherwise reset carry flag, men. Solution: a MOV AX, 8000h -—7 : [8000] oh MOV ES, AX fl MOV SS, AX , i : MOV DI, 0008h ! i | MOV SP, 0000h — 7 MOV CX, 0005h MOVAL, 76h 80008h x a (een REPNZ “SCASB ‘8000Ah Xe JNZL1 ‘8000Bh Xs ie go00ch X Paro i HLT j i Li: CLC HLT PR GRAM3.42 A block of 1 K words is present in the memory from address 7000: Count = 0] — SS}80000h &) BI CX DF ‘SP | 0000h ‘Scan Or search for the word DADAh. (a) Ifthe word DADAh is present in the data block, then set AX and transfer 16-bit effective address of location containing DADAh into register BX, and also in the stack memory. (b) Otherwise reset AX. Solution: MOV AX, 7000h MOVES, AX MOV DI, 3500h MOV SS, AX ‘Scanned wih CamScanner =v carriage retum character is ODh. St Solution: Li: Ni MOV SP, 0000h ™ MOV CX, 1024/MOV CX, 0400h MOV AX, DADA cLp SCASW INZUT MOV AX, FFFFh a m |sum DI, 0002h MOV BX, DI PUSH DI MT 1: MOV AX, 0000h HLT A block of 256 ASCII characte ts is present in the memory location f 1000h. Count the number of times carriage return character Present. The ASCII. code fore this count in register BX, MOV AX, 9100h MOV Es, Ax MOV DI, 0000h MOV CX, 256/MOV Cx, o100h MOV AL, oDh cL MOV Bx, 0000h SCASB : JNZLI INC BX Loop 12 HLT 3.10.11 CMPSB/CMPSW (Compare String Byte or ¢, String Word) "Compare ‘Scanned with CamScanner 3.11. BRANCHING INSTRUCTIONS Initially, all the instruction codes are present in the memory, so to execute the instruction, microprocessor has to perform two operations: 1. BIU of microprocessor will read the instruction codes from memory. 2. EU will execute the instruction. cs e BA—>| oO A IP B > EA t c D 5 F G Z —{-+ instruction codes ‘Scanned wih CamScanner | a ‘ r Instruction Sets and Programming of Microprocessor 8085 inst always take p, I ory, microprocessor Se a | Tet te instruction Seal ofintction coe, the EA inp \d EA from IP. A fter | from San | | | F iction codes in seque! re ructi in sequence from successive , “%y, icroprocessor will read the instructi i vem yo, So, mi by two. it i ir ding next instruct locations. 16-bit number is transferred into IP instead of rea ig ction fs: ifanew , i the new EA transfer into 1p +" But, ifan Fill read the next instruction from P. This sequence, msroproesor called branching operation. a! aac are two types of branching operations: ent branching and extraseeny, Intrasegment Branching dress in CS isnot changed but new 16-bit E to IP, ther . e a a Branch from one meémiory location to another memory Tocation within the same cog memory segment of 64 K, hence i is called intrasegment branching. cs. BA o| f t : P te] P i OW EA} New Up jumps IEE 64 K code memory segment Intersegment Branching Ifthe new value of base address as well as the new value of effective address are transferred into, CS and IP, then microprocessor will branci one memory location of one code memory Segment to another memory location of another code memory segment, hence it is called intersegment branching. ‘Scanned wih CemScanner Up jumps IP *|EA New, Code segment @ tT 3.411 Addressing Modes of Branching Instructions Addressing Modes of Intrasegment Branching In intrasegment branching, only the EA of IP is changed. This addressing mode is further -- divided into two types. () Intrasegment direct addressing modes: If the 8/16-bit displacement is given along with the branching instruction, then itis called intrasegment direct addressing mode. vith the branching Instrue"s For exal 1. JMP 95h [short label] [x] + Fras —— [x+Fr96 iP P 2. IMP 7600h [near label] [x] + 7600 ———> |X +7600 IP 'P i) Intrasegment indirect addressing modes: If the 16-bit register or memory is given as operand along with the branching instruction and this 16-bit number of this register or 16-bit content of the memory is transferred into IP, then it is called intrasegment indirect addressing mode. ‘Scanned with ComScanner or 8086 i rocess Instruction Sets and Programming of Micropt For example: MIP CX i = soto} + 000] CX IP 2, JMP WORD PTR [BX] Ds: BX Memory IP ‘Addressing Modes of Intersegment Branching. In intersegment branching, we have to change EA of IP as well as BA of CS. This addressing mode is further divided into two types. 7 (@ Intersegment direct addressing modes: If two 16-bit mumbers are given as operand along with the branchi 2nd number is transferre qode. ~ For example: 1. IMP 5000h, 6500h [far label] 5000k——+{ 5000h] I 6500h ———+] 6500n] cs (ii) Intersegment indirect. addressing modes: {32-bit memory is given as operand along with the branching instruction, then 16 LSBs of memo is ferred into IP, and TEMSBS of memory data j transferred into CS, then such instructions are caled intersegment indirect addressing modes, For example: 1. JMP DWORD PTR [BX] | 16 P 4 Cae cs ‘Scanned with CamScanner s of Branching Instructig ns at pranching instructions are given p ; N below: ind (Unconditional Jump) w : tio? will always cause the 8086 i ion. If the destination is in ree its next instruction f peti pointer will change to get th me code segment as th from the location specified ly along. with the instruction, destination location, if De are él; and if the 16-bit in the memory or in the registe re memory ore fer or given di Or given directly as operand along with the i a ng wil ie instruction, i Zot - BP aled neat bel. jg jsfiation for the jump is i rine 2 on for the jump is in se ; jpthe IMP gment with a name different from that of the segment (Oe he JMP instruction, then both the i conti ng, —_— 1¢ instructic i is will ‘be chang! get the destination loca iin pein and the code segment. register . This is referred.to as a far Jabel. conrents 2 —for fptrasegment branching, the operand can be: gebit displacement [short label] . (a) fl 16-bit displacement [near label]’ 0 ig-bit register @ 16-bit memory. For intersegment branching, the operand can be: (a) Two 16-bit numbers [far label] (b) 32-bit memory For example: IMP WORD PTR [BX] This instruction replaces Ip with a word from memory Contents pointed by DS: BX. This is an indirect near jump. For example: 1. JMP 68h + 0a» —* P 2. IMP 6600h x +6600h, iP 3. IMP SI 3 e 4. IMP WORD PTR (SI) 16 ps: SI iP ‘Memory ‘Scanned wih CamScanner 7 r Instruction Sets and Programming of Microprocessor 8086 2000h, 3500h ue zxoon ——+ [0] 3600h ———+ 6. JMP DWORD PTR [BX+DI] DS: BX + DI cs Memory J Condition Operand (Conditional Jump) All conditional jumps are short-type jumps. This means that same code segment asthe jump instruction. Also, the destinatio naddress must be +127 to -128 bytes from the addr ion after the jump instruction. Sequence of operation (a) If condition given in the instruction is satisfied, then new 16-bit numbers are transferred into IP or IP and CS. Hence, microprocessor will read the next instruction code from this new address, i.e. microprocessor jump or branches. : (b) If condition given in the instruction is not satisfied, then new number is not transferred into IP or IP and CS, so microprocessor will not brarich, instead microprocessor will read the next instruction code in sequence. The different conditional jump instructions are given below: (@) JC (Jump if carry): If CF = 1, then the microprocessor branches, (b) INC (Jump ifnot carry): IfCF=0 then the microprocessor branches, (©) JZJE (Jump if result is zero/jump if equal): If ZF = , then the microprocessor the destination label must be in th, ion address must be in the range o; branches. ~~ (@) INZ/INE (Sump if result is not zero/jump ifnot equal): If ZF = 0, then the micro- Processor branches, ~ (© SP/APE (Jump if parity/jump if parity even): If PF = 1, then the microprocessor branches, : 0) INPAPO (ump ‘fnot parity/jump itparity odd): IPF =0, then the microprocessor ranches, oo (@) JS (Jump if sign): If SF = 1, then the microprocessor will jump, (1) INS Gump if not sign): TFSF = 0, then the microprocessor will jump. © JO Gump ifoverftow): If OF = 1, then the microprocessor will jump. JNO Gump ifnot overflow): If OF =0, then the microprocessor will jump, () JCXZ Jump if CX=0): 1 CX = 0000, then the microprocessor will branch, ‘Scanned wih CamScanner rocessor uction Pet used for only unsigned numbers: If the microp’ ation of a! jum, n of tWO. unsigned numbe ompsri he following val rs X and Y, then dependi ry will gett! 1g, values of flags: spending upon the Fe! ys eS yy then CF = 0. 2E= 0 wey then CF =0, 2F=1 Pe we eY.then C 1, ZF Ping instruc ons are used after comparison of unsi if above/jump i JANINE (Jump if above/jump if not below m ) iene 208 FX ithe te miopoeso lj Me ition: CF = OAND ZF =0 jump. Be. (ump if not above/jump i - ) INAL above/jump if below equal): If Ist umber is less than OF co INA ane Sd mabe X <= YI hn he one 3s than oF Gondition: CF = (9 SBINAE OF the 3nd numb Condition: C= 1 ion fr the above task or above instruction is JC n jeri greater than the ‘The alternate instruc INBIJAE (Jump ifnot below/jump ifabove equal): If Istnu ‘nd number [X > = Y], then the processor will jumP- ed numbers only. If 1st number 1S greater cessor will jump- OR ZI jump if not above not equal): If 1st number iS Jess than “

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