Clevo m540, m545n, m550, m555n Service Manual

Preface
Notebook Computer
M540/M545N/M550/M555N
Service Manual
Preface
I
Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface
Version 1.0
March 2006
Trademarks
Intel, Celeron, and Intel Core are trademarks/registered trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and./or registered trademarks of their respective companies.
II
Preface
About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the M540/
M545N/M550/M555N series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Preface
Appendix B, Schematic Diagrams
III
Preface
IMPORTANT SAFETY INSTRUCTIONS

Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit (DC Output 20V, 3.25A (65W) minimum AC/DC Adapter, OR by
a DC Output 20V, 4.5A (90W) minimum AC/DC Adapter if you are using the optional port replicator.
Preface
CAUTION
Always disconnect all telephone lines from the wall outlet before servicing or disassembling this equipment.
TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER,

TELECOMMUNICATION LINE CORD
This Computer’s Optical Device is a Laser Class I Product
IV
Preface
Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.
2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on
Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.
3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.
V
Preface
4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Use only approved brands of Unplug the power cord before

peripherals. attaching peripheral devices.
Power Safety
Preface
The computer has specific power requirements:

• Only use a power adapter approved for use with this computer.
• Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
Power Safety • The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Warning not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Before you undertake • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
any upgrade proce- • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
dures, make sure that • Before cleaning the computer, make sure it is disconnected from any external power supplies.
you have turned off the
power, and discon-
nected all peripherals Do not plug in the power Do not use the power cord if Do not place heavy objects
and cables (including cord if you are wet. it is broken. on the power cord.
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
VI
Preface
Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Preface

Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of
its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal
waste stream. Check with your local solid waste officials for details in your area for recycling options or proper
disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommend-
ed by the manufacturer. Discard used battery according to the manufacturer’s instructions.
VII
Preface
Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on CD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
Preface
VIII
Preface
Contents
Introduction ..............................................1-1 Removing the Modem .................................................................. 2-17
Overview .........................................................................................1-1 Part Lists ..................................................A-1
System Specifications ................................. 1-2 Part List Illustration Location ........................................................ A-2
Model Differences ...........................................................................1-5 Top (M550N) ................................................................................. A-3
External Locator - Top View with LCD Panel Open ......................1-6 Bottom (M550N) ........................................................................... A-4
External Locator - Front & Right Side Views .................................1-7 LCD (M550N) ............................................................................... A-5
External Locator - Left Side & Rear View .....................................1-8 Top (M555N) ................................................................................. A-6
External Locator - Bottom View .....................................................1-9 Bottom (M555N) ........................................................................... A-7
M550N Mainboard Overview - Top (Key Parts) ..........................1-10 LCD (M555N) ............................................................................... A-8
M550N Mainboard Overview - Bottom (Key Parts) ....................1-11 Top (M540N) ................................................................................. A-9
M550N Mainboard Overview - Top (Connectors) .......................1-12 Bottom (M540N) ......................................................................... A-10
M550N Mainboard Overview - Bottom (Connectors) ..................1-13 LCD (M540N) ............................................................................. A-11
Preface
M540N Mainboard Overview - Top (Key Parts) ..........................1-14 Top (M545N) ............................................................................... A-12
M540N Mainboard Overview - Bottom (Key Parts) ....................1-15 Bottom (M545N) ......................................................................... A-13
M540N Mainboard Overview - Top (Connectors) .......................1-16 LCD (M545N) ............................................................................. A-14
M540N Mainboard Overview - Bottom (Connectors) ..................1-17 Schematic Diagrams................................. B-1
Disassembly ...............................................2-1 System Block Diagram ...................................................................B-2
Overview .........................................................................................2-1 YONAH 1/2 ....................................................................................B-3
Maintenance Tools ..........................................................................2-2 YONAH 2/2 ....................................................................................B-4
Connections .....................................................................................2-2 Calistoga 1/5, HOST .......................................................................B-5
Maintenance Precautions .................................................................2-3 Calistoga 2/5 ...................................................................................B-6
Removing the Battery ......................................................................2-5 Calistoga 3/5, DDR .........................................................................B-7
Removing the Hard Disk Drive .......................................................2-6 Calistoga 4/5 ...................................................................................B-8
Removing the System Memory (RAM) ..........................................2-9 Calistoga 5/5 ...................................................................................B-9
Removing the Processor ................................................................2-11 DRII SO-DIMM 0 .......................................................................B-10
Removing the Wireless LAN Module ...........................................2-13 DDRII SO-DIMM 1 .....................................................................B-11
Removing the Bluetooth Module ..................................................2-14 PANEL, BRIDGE BATTERY, FAN ...........................................B-12
Removing the Optical (CD/DVD) Device ....................................2-15 ICH7-M 1/4, SATA ......................................................................B-13
Removing the Keyboard ................................................................2-16 ICH7-M 2/4, PCI, USB ................................................................B-14
IX
Preface
ICH7-M 3/4, FWH ....................................................................... B-15

ICH7-M 4/4 .................................................................................. B-16
CD-ROM, PC-BEEP, USB2.0*2 ................................................. B-17
CLOCK GENERATOR, CCD ..................................................... B-18
LAN RTL8110SBL ...................................................................... B-19
PCI7412 ........................................................................................ B-20
PCM SOCKET,3 IN 1 SOCKET ................................................. B-21
T8510TE/ GX-L ........................................................................... B-22
ISA BIOS, MINI CARD, NEW CARD ....................................... B-23
TOUCH PAD, LED ..................................................................... B-24
AZALIA CODEC AL880 ............................................................ B-25
AUDIO AMP, USB2.0 ................................................................. B-26
MDC, BT, PWRGD, DDB CON ................................................. B-27
SYSTEM POWER ....................................................................... B-28
Preface
+1.8V, +VTT MEM, +1.5VS ....................................................... B-29

+VCORE ...................................................................................... B-30
+1.05VS, +2.5VS ......................................................................... B-31
+VDD3, +VDD5 .......................................................................... B-32
D/D BD (CRT, S-VIDEO, RJ-11) ............................................... B-33
D/D BD(CHARGER, DC IN) ...................................................... B-34
AUDIO BD(JACK, RJ-11, USB) ................................................ B-35
HOT KEY BD(HOTKEY, LED) ................................................. B-36
LED BOARD ............................................................................... B-37
CLICK BOARD ........................................................................... B-38
RJ-45 BOARD ............................................................................. B-39
USB DANGLE BOARD .............................................................. B-40
H8/2111 ........................................................................................ B-41
EXT.COM PORT ......................................................................... B-42
X
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the M540/M545N/M550/M555N series notebook
computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual.
Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer.
Operating systems (e.g. DOS, Windows 9x, Windows NT 4.0, Windows 2000, Windows XP, OS/2 Warp, UNIX, etc.) have
their own manuals as do application software (e.g. word processing and database programs). If you have questions about
those programs, you should consult those manuals.
1.Introduction
The M540/M545N/M550/M555N series notebook is designed to be upgradeable. See “Disassembly” on page 2 - 1 for
a detailed description of the upgrade procedures for each specific component. Please note the warning and safety infor-
mation indicated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1
Introduction
System Specifications
Feature Specification
Processor Intel® Core™ Duo Processor 65nm (65 Nanometer) Process Technology
(478-pin) Micro-FC-PGA Package 2MB On-die L2 Cache & 667MHz FSB
T2300/ T2400/ T2500/ T2600/ T2700 1.66/ 1.83/ 2.0/ 2.16/ 2.33 GHz
Intel® Core™ Solo Processor 65nm (65 Nanometer) Process Technology

(478-pin) Micro-FC-PGA Package 2MB On-die L2 Cache & 667MHz FSB
T1300/ T1400 1.66/ 1.83 GHz
Intel® Celeron® M Processor 65nm (65 Nanometer) Process Technology

(478-pin) Micro-FCPGA Package 1MB On-die L2 Cache & 533MHz FSB
410/ 420/ 430 1.46/ 1.60/ 1.73 GHz
1.Introduction
Core Logic Intel 945GM + ICH7-M
Memory Two 200 Pin SO-DIMM Sockets Supporting DDRII (DDR2) 533 / 667 MHz
128-bit Wide DDRII (DDR2) Data Channel
Memory Expandable up to 2GB (256/ 512/ 1024 MB DDRII Modules)
(Note: Do Not Use Other Module Types)
Security Security (Kensington® Type) Lock Slot BIOS Password
BIOS One 4Mb Flash ROM Phoenix™ BIOS, Plug and Play
LCD M550N/M555N Computers: M540N/M545N Computers:

15.0" XGA (1024*768) Flat Panel TFT 14.0" WXGA (1280*768) Flat Panel TFT
OR
15.0" SXGA+ (1400*1050) Flat Panel TFT
Video Adapter Intel 945GM Integration

Supports Dynamic Video Memory Technology (DVMT) 3.0 - up to 128MB of Video Memory dynamically allocated from
system memory where needed
Supports Analog Monitor Pixel Resolution up to 1600 * 1200 at 85Hz
Supports DirectX 9.1
Storage One Changeable 12.7mm(h) Optical Device (CD/DVD) Type Drive (see “Optional” on page 4 for drive options)
Easy Changeable 2.5" 9.5 mm (h) HDD with SATA (Serial) Interface
1 - 2 System Specifications
Introduction
Audio Integrated AZALIA Compliant Interface (HDA)
3D Stereo Enhanced Sound System
Sound-Blaster PRO™ Compatible
2 * Built-In Speakers
Built-In Microphone
Keyboard & Winkey Keyboard Built-In TouchPad with Scrolling Function

Pointing Device
Express Card ExpressCard/34/54 Slot

Slot
Interface Three USB 2.0 Ports One RJ-11 Jack for Plug & Play Fax/Modem
One External Monitor Port One RJ-45 Jack for 10Mb/ 100Mb/ 1000Mb Fast Ethernet
1.Introduction
One Headphone-Out Jack One Mini-IEEE 1394 Port
One Microphone-In Jack One S-Video-Out Jack (supports HDTV)
One Line-In Jack One DC-in Jack
One S/PDIF Output Jack
Note: External 7.1 CH Audio Output Support Configurable through Headphone, Microphone, Line-In and S/PDIF Jacks
Card Reader Embedded 4-in-1 Card Reader (MS/ MS PRO/ SD/ MMC)
Communication AZALIA 56K Plug & Play Fax/Modem v.90/92 Compliant

10Mb/ 100Mb/ 1000Mb Fast Ethernet
(Option) Intel PRO/Wireless 3945ABG Wireless LAN Module with PCIe Interface
(Factory Option) Bluetooth Module - Version 2.0
(Factory Option) PC Camera with USB Interface
Power Supports ACPI 2.0 Supports Battery Low Suspend

Management Power Button as Sleep/Resume Key Supports Resume from Modem Ring
Supports Hibernate Mode Supports Wake on LAN
Supports Stand by Mode
Power Full Range AC/DC Adapter 20V, 3.25A (65 Watts), 100~240V, 47~63Hz
Full Range AC/DC Adapter 20V, 4.5A (90 Watts), 100~240V, 47~63Hz (If Using the Optional Port Replicator)
6 Cell Smart Lithium-Ion Battery Pack, 4000mAH (44.4W)

Or
6 Cell Smart Lithium-Ion Battery Pack, 4400mAH (48.8W)
System Specifications 1 - 3
Introduction
Environmental Temperature Relative Humidity
Spec Operating: 5°C ~ 35°C Operating: 20% ~ 80%
Non-Operating: -20°C ~ 60°C Non-Operating: 10% ~ 90%
Physical Model A Computers: Model B Computers:

Dimensions & 333mm (w) * 276mm (d) * 24-33mm (h) 333mm (w) * 243mm (d) * 24-33mm (h)
Weight 2.4 kg Without Battery 2.2 kg Without Battery
Optional Optical Drive Module Options: Intel PRO/Wireless 3945ABG Wireless LAN Module with
DVD/CD-RW Combo Drive Module PCIe Interface
DVD-Dual Drive Module (Factory Option) PC Camera with USB Interface
Port Replicator (10/100 Base-T Ethernet Port, 4 * USB (Factory Option) Bluetooth Module - Version 2.0
2.0 Ports, Serial Port, Parallel Port, External Monitor Port,
1.Introduction
DC-In Jack) (Factory Option) Swap Battery - 2 ~ 3 Minutes Swap

(Note: Port Replicator requires the supplied 90W Time
power adapter) Charger Box
1 - 4 System Specifications
Introduction
Model Differences
This notebook series includes two different model types (each model includes two design styles). The models differ
slightly in design style including the LCD type, and the location of the card reader (the easiest way to differentiate be-
tween the model types is the location of the card reader).
Feature M540N/M545N M550N/M555N
15.0" XGA (1024 * 768) TFT

LCD Type 14.0" WXGA (1280 * 768) TFT OR
15.0" SXGA+ (1400 * 1050) TFT
4-in-1 Card Front Left Side
1.Introduction
M54ON M545N M55ON M555N
Design
Styles
System Specifications 1 - 5
Introduction
Figure 1
External Locator - Top View with LCD Panel Open
Top View
1 1
1. Optional Built-In M550N M540N
PC Camera
2. LCD
3. LED Status
Indicators 2
2
4. Hot-Key Buttons
5. Power Button
6. Keyboard
7. TouchPad and
10 10
1.Introduction
Buttons 3 4 5
8. LED Power & 3 4 5
Communication
Indicators
6 6
9. Built-In
Microphone
10. Speakers
9
7
7 9
8
8 Note: Only M540N Design Style is Pictured
Note: Only M550N Design Style is Pictured
3 3
5 4 5
4
1 - 6 External Locator - Top View with LCD Panel Open

Introduction
External Locator - Front & Right Side Views Figure 2

Front Views
1. LED Power &
2 Communication
Indicators
1 2. LCD Latch
M550N (M550N Only)
3. 4-in-1 Card
Reader (M540N
Only)
3
1
1.Introduction
M540N
Figure 3
Right Side Views
1. Headphone-Out
Jack
2. Microphone-In
Jack
3. USB 2.0 Port
4. RJ-11 Phone
1 2 3 Jack
4 5 5. Optical Device
6
Drive Bay
6. DC-In Jack
External Locator - Front & Right Side Views 1 - 7

Introduction
External Locator - Left Side & Rear View

Figure 4
Left Side View
1. RJ-45 LAN Jack
2. Vent/Fan Intake
3. 2 * USB 2.0 Ports
4. S/PDIF-Out Jack 3 3 7
4 5 6 8
5. Line-In Jack 1 M550N 2
6. Mini-IEEE 1394
Port
7. ExpressCard Slot
8. 4-in-1 Card
Reader (M550N
1.Introduction
Only)
3 3 7
1 4 5 6
M540N 2
Figure 5
Rear View
1. External Monitor
Port
2. S-Video-Out Port
3. Security Lock Slot
4. Battery
3 4
1 2
1 - 8 External Locator - Left Side & Rear View

Introduction
External Locator - Bottom View

Figure 6
M550N Bottom View
2
1. Vent/Fan Intake
2. Battery
1
3. Module Bay Cover
3 4. Hard Disk Cover
5. Speakers
(M550N Only)
1.Introduction
5 5
M540N 2
1
1
3

1 Overheating
To prevent your com-

puter from overheating
4 make sure nothing
1
blocks the vent/fan in-
takes while the com-
puter is in use.
External Locator - Bottom View 1 - 9

Introduction
Figure 7 M550N Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts
1. GS5019P
2. Clock Generator
3. ExpressCard 1
Assembly
4. H8/2111
5. Keyboard Cable 6
Connector
6. Hot-Key Board
Cable Connector 2
1.Introduction
3 4
1 - 10 M550N Mainboard Overview - Top (Key Parts)

Introduction
M550N Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Bottom
Key Parts
1. CPU Socket (no

CPU installed)
2. Northbridge-Intel
945GM
1 3. Realtek
RTL8110SBL
4. ALC880 Audio
Codec
11 5. Audio Amp.
1.Introduction
6. PCI7402
7. Southbridge-Intel
ICH7-M
8. Flash BIOS ROM
9 2 9. Memory Slots
10 DDRII So-DIMM
10. Mini PCIe Socket
11. Bluetooth
Connector
3
8 7
6
5 4
M550N Mainboard Overview - Bottom (Key Parts) 1 - 11

Introduction
Figure 9 M550N Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors
1. USB Port
2. S/PDIF-Out Jack
3. Line-In Jack
4. Mini-IEEE 1394
Port
1
1.Introduction
1 - 12 M550N Mainboard Overview - Top (Connectors)

Introduction
M550N Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Bottom
14 Connectors
1 1. LCD Cable
2
15 Connector
2. D/D Board Cable
Connector
3. Optical Device
Drive Connector
4. SATA HDD
Connector
5. Modem Module
1.Introduction
Connector
6. Touch Pad Cable
Connector
3 7. Audio Board
Cable Connector
8. CMOS Bat. Cable
13 Connector
9. Speaker Cable
Connector
10. Microphone
9 Cable Connector
7 8
11. LED Board Cable
4 12 Connector
5
12. 4-in-1 Card
6 Reader Socket
13. Mini-IEEE 1394
Port
11 14. RJ-45 LAN
10
Connector
15. Fan Cable
Connector
M550N Mainboard Overview - Bottom (Connectors) 1 - 13

Introduction
Figure 11 M540N Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts
1. GS5019P
2. Clock Generator
3. ExpressCard 1
Assembly
4. 4-in-1 Card
Reader Socket 7
5. H8/2111
6. Keyboard Cable
Connector 2
1.Introduction
6
7. Hot-Key Board
Cable Connector
5
3
1 - 14 M540N Mainboard Overview - Top (Key Parts)

Introduction
M540N Mainboard Overview - Bottom (Key Parts) Figure 12

Mainboard Bottom
Key Parts
1. CPU Socket (no

CPU installed)
2. Northbridge-Intel
945GM
1 3. Realtek
RTL8110SBL
4. ALC880 Audio
Codec
5. Audio Amp.
1.Introduction
11 6. PCI7402
7. Southbridge-Intel
ICH7-M
8. Flash BIOS ROM
2 9. Memory Slots
9
10 DDRII So-DIMM
10. Mini PCIe Socket
11. Bluetooth Cable
Connector
3
8
7
6
5 4
M540N Mainboard Overview - Bottom (Key Parts) 1 - 15

Introduction
Figure 13 M540N Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors
1. USB Port
2. S/PDIF-Out Jack
3. Line-In Jack
4. Mini-IEEE 1394
Port
1
1
1.Introduction
1 - 16 M540N Mainboard Overview - Top (Connectors)

Introduction
M540N Mainboard Overview - Bottom (Connectors) Figure 14

Mainboard Bottom
Connectors
10
1 1. LCD Cable
2 11 Connector
2. D/D Board Cable
Connector
3. Optical Device
Drive Connector
4. SATA HDD
Connector
5. Modem Module
1.Introduction
Connector
6. Audio Board
Cable Connector
7. CMOS Bat. Cable
3 Connector
8. Microphone
Cable Connector
9 9. Mini-IEEE 1394
Port
10. RJ-45 LAN
Connector
6 11. Fan Cable
7
4 Connector
5
M540N Mainboard Overview - Bottom (Connectors) 1 - 17

Introduction
1.Introduction
1 - 18
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the M540/M545N/M550/M555N series notebook’s
parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, CD device and hard disk are included in the User’s Manual but are
repeated here for your convenience.
2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.

Warning
Overview 2 - 1
Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
2 - 2 Overview
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re-
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines). It is
damaged. advisable to also re-
5. Be careful with power. Avoid accidental shocks, discharges or explosions. move your battery in
2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. order to prevent acci-
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. dentally turning the
machine on.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery: To remove the Optical Device:

1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the Optical device page 2 - 15
To remove the HDD:
1. Remove the battery page 2 - 5 To remove the Keyboard:
2. Remove the HDD page 2 - 6 1. Remove the battery page 2 - 5
2.Disassembly
2. Remove the keyboard page 2 - 16

To remove the System Memory:
1. Remove the battery page 2 - 5 To remove the Modem :
2. Remove the system memory page 2 - 9 1. Remove the battery page 2 - 5
2. Remove the HDD page 2 - 6
To remove the Processor: 3. Remove the CPU heat sink page 2 - 11
1. Remove the battery page 2 - 5 4. Remove the Optical device page 2 - 15
2. Remove the processor page 2 - 11 5. Remove the keyboard page 2 - 16
6. Remove the modem page 2 - 17
To remove the Wireless LAN Module:
1. Remove the battery page 2 - 5
2. Remove the wireless LAN page 2 - 13
To remove the Bluetooth:

1. Remove the battery page 2 - 5
2. Remove the wireless LAN page 2 - 6
3. Remove the bluetooth page 2 - 14
2 - 4 Overview
Disassembly
Removing the Battery

1. Turn the computer off, and turn it over. Figure 1
2. Locate the battery bay at point 1 (Figure a). Battery Removal
3. Slide the latch 2 in the direction of the arrow, and hold it in place.
4. Slide the battery in the direction of the arrow 3 . a. Locate the battery re-
5. Lift the battery out in the direction of the arrow 4 then lift the battery 65 out. lease latch.
b. Slide the latch and hold
in place.
a.
c. Slide the battery in the di-
1 rection of the arrow.
1
d. Lift the battery out.
2.Disassembly
b. d.
3
5
c.

5. Battery
4
Removing the Battery 2 - 5

Disassembly
Removing the Hard Disk Drive

Figure 2 The hard disk drive is mounted in a removable case and can be taken out to accommodate other 2.5" IDE hard disk drives
HDD Assembly with a height of 9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and
Removal utilities (as outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk.
a. Locate the HDD bay cov- Hard Disk Upgrade Processl

er and remove the
screws.
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover 61 and remove screw 2 M550N, OR screws 3 - 4 M540N.
a.
2.Disassembly
2 3 4
1
1
M540N
M550N

HDD System Warning
New HDD’s are blank. Before you begin make sure:
1. HDD Bay Cover You have backed up any data you want to keep from your old HDD.
• 1 Screw (M550N) You have all the CD-ROMs and FDDs required to install your operating system and programs.
• 2 Screws If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan
(M540N) to install. Copy these to a removable medium.
2 - 6 Removing the Hard Disk Drive

Disassembly
For M550N computers:

Figure 3
3. Slide the hard disk and cover assembly in the direction of arrow 5 . HDD & Case Assembly
4. Lift the hard disk and cover assembly up in the direction of arrow 6 . Removal
5. Remove the hard disk and cover assembly (Figure c).
6. Remove screws 7 - 10 to release the hard disk 12 11 from the assembly cover 11 , and reverse the process to install a. Slide out the HDD as-
any new hard disk. sembly.
b. Lift the HDD assembly
a. c. out of the bay.
c. Remove the 4 screws
10 and separate the cover
and HDD.
5
9
2.Disassembly
11
M550N
b. 7
12

6 11. HDD Assembly Cover
12. HDD
• 4 Screws
M550N M550N
Removing the Hard Disk Drive 2 - 7

Disassembly

Figure 4
HDD & Case Assembly 7. Pull the tab to slide the hard disk and case assembly in the direction of arrow 12 .
Removal 8. Lift the hard disk and case assembly out of the bay in the direction of arrow 13 .
9. Remove screws 14 - 15 to release the hard disk 16 11 from the case 1712 ,and reverse the process to install any new
a. Slide out the HDD as- hard disk.
sembly.
b. Lift the HDD assembly a. c.
out of the bay.
c. Remove the 2 screws 15
and separate the case
and HDD.
12 17
2.Disassembly
14
M540N
16
b.
13

16. HDD M540N
17. HDD Case
• 2 Screws
M540N
2 - 8 Removing the Hard Disk Drive

Disassembly
Removing the System Memory (RAM) Figure 5

The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting RAM Module
DDRII 533/677MHz. The main memory can be expanded up to 2GB. The SO-DIMM modules supported are 256MB, Removal
512MB and 1024MB DDRII Modules. The total memory size is automatically detected by the POST routine once you
turn on your computer. a. Remove the screws.
b. Remove the cover.
Memory Upgrade Process
1. Turn off the computer, remove the battery (page 2 - 5).
2. Locate the Module bay cover 1 , and remove screws 2 - 8 (for M550N) OR screws 2 - 6 (for M540N).
3. Remove the Module bay cover 1 .
a.
Contact Warning
2.Disassembly
4 5 4 Be careful not to touch
3 3
the metal pins on the
2 2 1 module’s connecting
1 5 edge. Even the clean-
6 est hands have oils
6 which can attract parti-
c.
8 7 cles, and degrade the
module’s perfor-
M540N mance.
M550N
b.

1. Module Bay Cover
1 1
• 7 Screws (M550N)
• 5 Screws (M540N)
M550N M540N
Removing the System Memory (RAM) 2 - 9

Disassembly
Figure 6 4. Gently pull the two release latches ( 9 & 10 ) on the sides of the memory socket in the direction indicated by the
Memory Removal arrows (Figure c).
Sequence 5. The RAM module(s) 11 will pop-up (Figure d), and you can then remove it.
c.
c. Pull the release
latch(es).
d. Remove the module(s). 9
10
2.Disassembly
d.
11
11
6. Pull the latches to release the second module if necessary.

11. Ram Module(s) 7. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
8. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot
as it will go. DO NOT FORCE IT; it should fit without much pressure.
9. Press the module down towards the mainboard until the slot levers click into place to secure the module.
10. Replace the module bay cover and the screws (see page 2 - 9).
11. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
2 - 10 Removing the System Memory (RAM)

Disassembly
Removing the Processor Figure 7

Processor Removal
1. Turn off the computer, and remove the battery (page 2 - 5) and the module bay cover (page 2 - 9).
2. Remove screws 1 - 3 (Figure a) from the heat sink in the order indicated.
a. Remove the 3 screws in
3. Carefully lift up the heat sink 4 (Figure b) off the computer. the order indicated.
b. Remove the heat sink.
a.
2.Disassembly
3
b.
4
4. Heat Sink
• 3 Screws
Removing the Processor 2 - 11

Disassembly
4. Turn the release latch 5 towards the unlock symbol , to release the CPU (Figure 8c).
5. Carefully (it may be hot) lift the CPU 6 up out of the socket (Figure 8d).
6. Reverse the process to install a new CPU.
7. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
Figure 8
Processor Removal
(cont’d) c.
c. Turn the release latch to

unlock the CPU. 5 5
d. Lift the CPU out of the
socket.
2.Disassembly
Unlock Lock
d.

6 Caution
The heat sink, and CPU area in

general, contains parts which are
subject to high temperatures. Allow
the area time to cool before remov-
ing these parts.
6. CPU
2 - 12 Removing the Processor

Disassembly
Removing the Wireless LAN Module Figure 9

1. Turn off the computer, remove the battery (page 2 - 5) and the module bay cover (page 2 - 9). Wireless LAN
2. Carefully disconnect cable 1 , then remove the screws 2 - 3 from the module socket. Module Removal
3. The wireless LAN module 4 (Figure b) will pop-up.
4. Lift the wireless LAN module 4 (Figure c) up and off the computer. a. Disconnect the cable
and remove the 2
screws.
a. b. The WLAN module will
b. pop up.
c. Remove the WLAN
module.
1 Note: Make sure you

2
2.Disassembly
3 4 reconnect the antenna
4 cable to the “Main”
socket (Figure a).
c.
4
4. WLAN Module
• 2 Screws
Removing the Wireless LAN Module 2 - 13

Disassembly
Figure 10 Removing the Bluetooth Module

Bluetooth Removal
1. Turn off the computer, remove the battery (page 2 - 5), remove the module bay cover (page 2 - 9) and remove the
WLAN module (page 2 - 13).
a. Remove WLAN Module
and locate the Bluetooth
2. The Bluetooth module 1 is located under the WLAN module.
module. 3. Remove the screw 2 from the Bluetooth module.
b. Remove the screw. 4. Lift the Bluetooth module up (Figure c) and carefully separate the module from the connector 3 and disconnect
c. Lift the Bluetooth module the cable 4 .
up and seperate the con- 5. Lift the Bluetooth module 5 (Figure d) up and off the computer.
nector and disconnect
the cable. a. c.
d. Remove Bluetooth mod-
ule.
4
2.Disassembly
1 3
b.
d.
e.
2

5. Bluetooth Module 5
• 1 Screw
2 - 14 Removing the Bluetooth Module

Disassembly
Removing the Optical (CD/DVD) Device Figure 11

Optical Device
1. Turn off the computer, remove the battery (page 2 - 5), and remove the module bay cover (page 2 - 9).
Removal
2. Use a screwdriver to carefully push out the optical device 2 at point 1 .
3. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
a. Remove the cover.
screw holes should line up. b. Push the optical device
4. Restart the computer to allow it to automatically detect the new device. out off the computer at
point 1.
a.
1
1
2.Disassembly
M550N M540N
b.
2
1

2 Optical Device
Removing the Optical (CD/DVD) Device 2 - 15

Disassembly
Figure 12 Removing the Keyboard

Keyboard Removal 1. Turn off the computer, and remove the battery (page 2 - 5).
2. Press the three keyboard latches at the top of the keyboard to elevate the keyboard from its normal position (you
a. Press the three latches
may need to use a small screwdriver to do this).
to release the keyboard.
b. Lift the keyboard up and 3. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable 4 (Figure b).
disconnect the cable 4. Disconnect the keyboard ribbon cable 4 from the locking collar socket 5 .
from the locking collar.
a.
1 2 1 2 3
3
2.Disassembly
b.
Re-Inserting the Key-
board
4 4
When re-inserting the 5
Keyboard Tabs
5
keyboard firstly align
the five keyboard tabs
at the bottom of the
keyboard with the slots
in the case.
M550N M540N

6. Keyboard
2 - 16 Removing the Keyboard

Disassembly
Removing the Modem

1. Turn off the computer, remove the battery (page 2 - 5), remove the hard disk (page 2 - 6), remove the heat sink Figure 13
(page 2 - 11), remove the optical device (page 2 - 15) and remove the keyboard (page 2 - 16). Modem Removal for
2. Remove screws 1 - 4 from the keyboard shielding plate 5 and turn it over. M550N
3. Remove screws 6 - 19 from the bottom case and carefully disconnect the fan cable 20 and speaker cable con-
a. Remove the 4 screws
nector 21 from the main board (Figure b). from the keyboard
4. Carefully lift the bottom case 22 (Figure c) up and off the computer. shielding plate.
5. Remove screws 23 - 24 from the modem. b. Remove the 14 screws ,
6. Lift the modem up off the socket 25 and carefully separate the connector 26 from the modem. and disconnect the fan
7. Lift the modem 27 (Figure f) up and off the computer. cable and speaker cable
connector.
c. Remove the bottom
2.Disassembly
a. c. e. case.
4 d. Remove the 2 screws.
1 2 3
e. Lift the modem up off the
5 26 socket and separate the
22 connector from the mo-
dem module.
f. Remove the modem.
25
b. 16
17 13 12
18 15 14
d. f.
6
20
19
23

5. Keyboard Shielding
27 Plate
11 22. Bottom Case
21 27. Modem
24l
10
7 8 9 • 20 Screw
Removing the Modem 2 - 17

Disassembly

Figure 14 1. Turn off the computer, remove the battery (page 2 - 5), remove the hard disk (page 2 - 6) and remove the optical
Modem Removal for
device (page 2 - 15).
M540N
2. Remove screws 1 - 12 from the bottom case and carefully disconnect the fan cable 13 from the main board.
3. Carefully lift the bottom case 14 (Figure b) up and off the computer.
a. Remove the 12 screws
and disconnect the fan ca-
4. Remove screws 15 - 16 from the modem module.
ble. 5. Lift the modem up off the socket 17 and carefully separate the connector 18 from the modem.
b. Remove the bottom case. 6. Lift the modem up 19 (Figure e) up and off the computer.
c. Remove the 2 screws.
a. 2 c.
d. Lift the modem up off the 1
socket and separate the 11
3 10 16
connector from the mo-
dem module. 4
e. Remove the modem.
2.Disassembly
12 13
15
5
9 d.
18
6 7 8
b. 17
14. Bottom Case
19. Modem
e.
• 14 Screw 14
19
2 - 18 Removing the Modem

Part Lists
Appendix A:Part Lists

This appendix breaks down the M540/M545N/M550/M555N/M540N series notebook’s construction into a series of il-
lustrations. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
Part Lists
Part List Illustration Location

The following table indicates where to find the appropriate part list illustration.
Table A - 1
Part List Illustration
M540/M545N/
Location Part
M550/M555N
Top - (M550N) page A - 3

Bottom - (M550N) page A - 4
LCD - (M550N) page A - 5
A.Part Lists

A - 2 Part List Illustration Location

Part Lists
Top (M550N)
無鉛
鐵弗龍
無鉛
無鉛
無鉛
無鉛
鐵弗龍
鋁合金 M550J 無鉛
無鉛
無鉛
無鉛
Figure A - 1
A.Part Lists
無鉛
Top (M550N)
無鉛
無鉛
無鉛
銅箔無鉛（尺寸變更）
無鉛
無鉛
無鉛
鋁箔無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Top (M550N) A - 3
Part Lists
Bottom (M550N)
Figure A - 2
Bottom (M550N)
A.Part Lists
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
元力 M550J 無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
昆山 M550N 無鉛
昆山 M555N 無鉛
無鉛
A - 4 Bottom (M550N)
Part Lists
LCD (M550N)
Figure A - 3
LCD (M550N)
A.Part Lists
直徑6.3X3.6H 無鉛
無鉛
無鉛
中性無鉛
無鉛
無鉛
惠貿
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
鐵弗龍無鉛
無鉛
LCD (M550N) A - 5
Part Lists
Top (M555N)
無鉛
鐵弗龍
無鉛
無鉛
無鉛
無鉛
鐵弗龍
無鉛
無鉛
Figure A - 4 無鉛
Top (M555N)
A.Part Lists
無鉛
無鉛
無鉛
無鉛
銅箔無鉛（尺寸變更）
無鉛
無鉛
無鉛
鋁箔無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
A - 6 Top (M555N)
Part Lists
Bottom (M555N)
Figure A - 5
Bottom (M555N)
A.Part Lists
外
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
元力 M550J 無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
昆山 M550N 無鉛
昆山 M555N 無鉛
無鉛
Bottom (M555N) A - 7
Part Lists
LCD (M555N)
Figure A - 6
LCD (M555N)
A.Part Lists
直徑6.3X3.6H 無鉛
無鉛
無鉛
中性無鉛
無鉛
無鉛
惠貿
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
鐵弗龍無鉛
無鉛
A - 8 LCD (M555N)
Part Lists
Top (M540N)
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛 Figure A - 7
TOP (M540N)
A.Part Lists
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
石墨無鉛
無鉛
MYLAR 銅箔 FOR TOP CASE M540G 無鉛（尺寸變更）
無鉛
無鉛
鋁箔無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Top (M540N) A - 9
Part Lists
Bottom (M540N)
Figure A - 8
Bottom (M540N)
A.Part Lists
昆山無鉛
無鉛
無鉛
無鉛
無鉛
元力無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
A - 10 Bottom (M540N)
Part Lists
LCD (M540N)
Figure A - 9
LCD (M540N)
A.Part Lists
平頭
圓頭
無鉛
無鉛
無鉛
無鉛
無鉛
頭徑3.5MM 頭厚0.3MM 無鉛
無鉛
無鉛
中性
無鉛
無鉛
無鉛
無鉛
鐵弗龍無鉛
LCD (M540N) A - 11
Part Lists
Top (M545N)
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Figure A - 10
無鉛
TOP (M545N)
A.Part Lists
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
石墨無鉛
無鉛
MYLAR 銅箔 FOR TOP CASE M540G 無鉛（尺寸變更）
無鉛
無鉛
鋁箔無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
A - 12
Part Lists
Bottom (M545N)
Figure A - 11
Bottom(M545N)
A.Part Lists
外
昆山無鉛
無鉛
無鉛
無鉛
無鉛
元力無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Bottom (M545N) A - 13
Part Lists
LCD (M545N)
Figure A - 12
LCD(M545N)
A.Part Lists
平頭
圓頭
無鉛
無鉛
無鉛
無鉛
頭徑3.5MM 頭厚0.3MM 無鉛
無鉛
無鉛
中性
無鉛
無鉛
鐵弗龍無鉛
無鉛
LCD BACK COVER COSMETIC BAR(銀色) M545G 無鉛
無鉛
A - 14 LCD (M545N)
Schematic Diagrams
Appendix B:Schematic Diagrams

This appendix has circuit diagrams of the M540/M545N/M550/M555N notebook’s PCB’s. The following table indicates
where to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page Table B - 1

Schematic
System Block Diagram - Page B - 2 ICH7-M 4/4 - Page B - 16 +VCORE - Page B - 30
Diagrams
YONAH 1/2 - Page B - 3 CD-ROM, PC-BEEP, USB2.0*2 - Page B - 17 +1.05VS, +2.5VS - Page B - 31
B.Schematic Diagrams
YONAH 2/2 - Page B - 4 CLOCK GENERATOR, CCD - Page B - 18 +VDD3, +VDD5 - Page B - 32
Calistoga 1/5, HOST - Page B - 5 LAN RTL8110SBL - Page B - 19 D/D BD (CRT, S-VIDEO, RJ-11) - Page B - 33
Calistoga 2/5 - Page B - 6 PCI7412 - Page B - 20 D/D BD(CHARGER, DC IN) - Page B - 34
Calistoga 3/5, DDR - Page B - 7 PCM SOCKET,3 IN 1 SOCKET - Page B - 21 AUDIO BD(JACK, RJ-11, USB) - Page B - 35
Calistoga 4/5 - Page B - 8 T8510TE/ GX-L - Page B - 22 HOT KEY BD(HOTKEY, LED) - Page B - 36
Calistoga 5/5 - Page B - 9 ISA BIOS, MINI CARD, NEW CARD - Page B - 23 LED BOARD - Page B - 37

DRII SO-DIMM 0 - Page B - 10 TOUCH PAD, LED - Page B - 24 CLICK BOARD - Page B - 38
Version Note
DDRII SO-DIMM 1 - Page B - 11 AZALIA CODEC AL880 - Page B - 25 RJ-45 BOARD - Page B - 39
The schematic dia-
grams in this chapter
PANEL, BRIDGE BATTERY, FAN - Page B - 12 AUDIO AMP, USB2.0 - Page B - 26 USB DANGLE BOARD - Page B - 40
are based upon ver-
ICH7-M 1/4, SATA - Page B - 13 MDC, BT, PWRGD, DDB CON - Page B - 27 H8/2111 - Page B - 41 sion 71-M55N0-002A.
If your mainboard (or
ICH7-M 2/4, PCI, USB - Page B - 14 SYSTEM POWER - Page B - 28 EXT.COM PORT - Page B - 42 other boards) are a lat-
er version, please
ICH7-M 3/4, FWH - Page B - 15 +1.8V, +VTT MEM, +1.5VS - Page B - 29 check with the Service
Center for updated di-
agrams (if required).
B - 1
Schematic Diagrams
System Block Diagram

D/D BOARD
CHARGER,DC JACK,
CLEVO M540N/M550N System Block Diagram +3V,+5V,+3VS,+5VS,3VH8,+5VH8
CRT,S-VIDEO,RI-11 MEMORY TERMINATIONS

+1.8V,+0.9VS,+1.5VS
CLOCK GEN.
AUDIO BOARD PROCESSOR
ICS9LPR310 DDR2 SDRAM SOCKET +VCORE
AUDIO PHONE JACK, Yonah/Merom
USB CONNECTOR
D/D BOARD 479 uFCPGA +1.05VS,+2.5Vs
HOT KEY BOARD S-VIDEO SO-DIMM0 SO-DIMM1
MINI DIN 7
POWER BOTTON,
FSB +VDD3,+VDD5
INDICATOR LED, CRT
533/667
MHz
LID SWITCH USB7 AUDIO BOARD MAIN BOARD AUDIO BOARD
NORTH BRIDGE
Sheet 1 of 41 TOUCH BIOS LCD CONN(LVDS)
DDRII
533/667 MHz RJ-11 LINE SPDIF MIC HP
System Block
IN OUT IN OUT
PAD ISA 945GM
Diagram 1466 FCBGA 7.1 CHANNEL OUT
AZALIA
ISA BUS MDC
10 MHz MODULE
EC EC AZALIA AUDIO
32.768 KHz DMI CODEC AMP. INT.
SPK
H8/2111 ITE8510E MDC CONN. ALC880 APA2020A
LPC 33 MHz SYSTEM SMBUS
CO-LAYOUT
SOUTH BRIDGE AZALIA LINK 24 MHz
Super I/O
EC SMBUS PCI BUS 33 MHz
INT. K/B ICH7-M
Debug only PCIE
THERMAL SMART SMART
652 BGA
SENSOR FAN BATTERY FWH BIOS
F75383M FWH 24.576
NEW PCMCIA LAN
Mini PCIE TI MHz
SOCKET CARD REALTEK
PCI7412
SATA-150 USB2 USB5 (PCI7402) 48 MHz RTL8110SBL
PATA-33/66/100 OPTION 25 MHz

USB2.0
Mini Card
LAN BOARD
Intel PCMCIA 4IN 1 IEEE
MASTER AUDIO BOARD SOCKET CARD 1394
SATA CCD BT USB1 USB0
HDD READER RJ-45
CD-ROM USB6 USB4 USB3
ALIENWARE
CO-LAYOUT MMC/SD/MS/MS Pro
CD-ROM/ USB2
CD-RW/
DVD-COMBO/
DVD-ROM/ OPTION
DVD+-RW
B - 2 System Block Diagram

Schematic Diagrams
YONAH 1/2
JSKT1A J SKT1B
[4] H _A#[3 1:3] H _A#3 J4 H1 [ 4] H_ D# [63:0] H _D #0 E22 AA23 H_D# 32 H _D #[6 3:0] [ 4]
H _A#4 L4 A[3] # AD S# E2 H_ AD S# [4 ] H _D #1 F 24 D[0 ]# D[ 32] # AB24 H_D# 33
A[4] # BN R# H_ BN R# [4] D[1 ]# D[ 33] #
H _A#5 M3 G5 H_ BPR I# [4 ] H _D #2 E26 V24 H_D# 34
H _A#6 K5 A[5] # BPRI# H _D #3 H 22 D[2 ]# D[ 34] # V26 H_D# 35
H _A#7 M1 A[6] # H5 H _D #4 F 23 D[3 ]# D[ 35] # W 25 H_D# 36
A[7] # DEFER# H_ DEFER# [4 ] D[4 ]# D[ 36] #
ADDR GROUP 0
DATA GRP 0
DATA GRP 2
H _A#8 N2 F2 1 H _D #5 G25 U 23 H_D# 37
H _A#9 J1 A[8] # D RD Y# E1 H_ DR DY # [4] H _D #6 E25 D[5 ]# D[ 37] # U 25 H_D# 38
H _A#10 N3 A[9] # D BSY# H_ DBSY # [4] H _D #7 E23 D[6 ]# D[ 38] # U 22 H_D# 39
CONTROL
H _A#11 P5 A[10]# F1 H _D #8 K24 D[7 ]# D[ 39] # AB25 H_D# 40
A[11]# BR 0# H_ BR 0# [4 ] D[8 ]# D[ 40] #
H _A#12 P2 H _D #9 G24 W 22 H_D# 41
H _A#13 L1 A[12]# D20 H _I ER R# H _D #10 J 24 D[9 ]# D[ 41] # Y 23 H_D# 42
H _A#14 P4 A[13]# I ER R# B3 H _D #11 J 23 D[1 0 D[ 42] # AA26 H_D# 43
A[14]# IN IT# H_ INI T# [1 2] D[1 1]# D[ 43] #
H _A#15 P1 H _D #12 H 26 Y 26 H_D# 44
H _A#16 R1 A[15]# H4 H _D #13 F 26 D[1 2]# D[ 44] # Y 22 H_D# 45
Sheet 2 of 41
A[16]# LOC K# H_ LOC K# [ 4] D[1 3]# D[ 45] #
L2 H _D #14 K22 AC2 6 H_D# 46
[ 4] H_ AD STB#0 ADSTB[0] # B1 H _D #15 H 25 D[1 4]# D[ 46] # AA24 H_D# 47
[4 ] H _R EQ#[4:0 ] H _R EQ#0 K3 RESET# F3 H_ CPUR ST# [4] H 23 D[1 5]# D[ 47] # W 24
H _R EQ#1 H 2 R EQ[0] # R S[ 0]# F4 H_ RS#0 [4 ] [4] H _D STBN #0 G22 DSTBN [0 ]# D STBN [2] # Y 25 H _D STBN #2 [4 ]
YONAH 1/2
R EQ[1] # R S[ 1]# H_ RS#1 [4 ] [4 ] H _D STBP#0 DSTBP[0 ]# D STBP[2] # H _D STBP# 2 [4]
H _R EQ#2 K2 G3 H_ RS#2 [4 ] [ 4] H_ DI NV#0 J 26 V23 H _D INV#2 [4]
R EQ[2] # R S[ 2]# DIN V[ 0]# D INV[2] #
H _R EQ#3 J 3 G2 H_ TRD Y # [4]
R EQ[3] # TRD Y#
H _R EQ#4 L 5 [ 4] H_ D# [63:0] H _D #[6 3:0] [ 4]
R EQ[4] # G6 H _D #16 N 22 AC2 2 H_D# 48
[4] H _A#[3 1:3] H _A#17 Y2 H IT# E4 H_ HIT# [4] H _D #17 K25 D[1 6]# D[ 48] # AC2 3 H_D# 49
H _A#18 U5 A[17]# HITM# H_ HITM# [4 ] H _D #18 P26 D[1 7]# D[ 49] # AB22 H_D# 50
H _A#19 R3 A[18]# AD 4 H _BPM0# H _D #19 R 23 D[1 8]# D[ 50] # AA21 H_D# 51
H _A#20 W6 A[19]# BPM[ 0]# AD 3 H _BPM1# H _D #20 L25 D[1 9]# D[ 51] # AB21 H_D# 52
XDP/ITP SIGNALS
A[20]# BPM[ 1]# D[2 0]# D[ 52] #
DATA GRP 1
DATA GRP 3
H _A#21 U4 AD 1 H _BPM2# H _D #21 L22 AC2 5 H_D# 53
A[21]# BPM[ 2]# D[2 1]# D[ 53] #
H _A#22 Y5 AC 4 H _BPM3# H _D #22 L23 AD2 0 H_D# 54
H _A#23 U2 A[22]# BPM[ 3]# AC 2 H _PRD Y # H _D #23 M23 D[2 2]# D[ 54] # AE22 H_D# 55
H _A#24 R4 A[23]# PRD Y# AC 1 H _PREQ# H _D #24 P25 D[2 3]# D[ 55] # AF23 H_D# 56
H _A#25 T5 A[24]# PREQ# AC 5 H _TCK H _D #25 P22 D[2 4]# D[ 56] # AD2 4 H_D# 57
H _A#26 T3 A[25]# TCK AA6 H _TDI
Voltage H _D #26 P23 D[2 5]# D[ 57] # AE21 H_D# 58
H _A#27 W3 A[26]# TD I AB3 H _TDO H _D #27 T24 D[2 6]# D[ 58] # AD2 1 H_D# 59
H _A#28 W5 A[27]# TDO AB5 H _TMS
translation H _D #28 R 24 D[2 7]# D[ 59] # AE25 H_D# 60
H _A#29 Y4 A[28]# TMS AB6 H _TRST# H _D #29 L26 D[2 8]# D[ 60] # AF25 H_D# 61
H _A#30 W2 A[29]# TRST# C20 I TP_D BR ST#
FROM IMVP6 H _D #30 T25 D[2 9]# D[ 61] # AF22 H_D# 62
H _A#31 Y1 A[30]# DBR# H _D #31 N 24 D[3 0]# D[ 62] # AF26 H_D# 63
V4 A[31]# D21 H _PROC HO T# M24 D[3 1]# D[ 63] # AD2 3
[ 4] H_ AD STB#1 ADSTB[1] # PROCH OT Layout note: [4] H _D STBN #1 DSTBN [1 ]# D STBN [3] # H _D STBN #3 [4 ]
A2 4 H _THERMD A N 25 AE24
THERM
THERMDA [4 ] H _D STBP#1 DSTBP[1 ]# D STBP[3] # H _D STBP# 3 [4]

A6 A2 5 H _THERMD C PM_THRMTRIP# should connect to M26 AC2 0
[1 2] H_A2 0M# A20 M# TH ER MDC [ 4] H_ DI NV#1 DIN V[ 1]# D INV[3] # H _D INV#3 [4]
[12] H _F ER R # A5 PM_THR MTRI P# [5 ,12] 945GM and ICH7-M without T-ing
F ER R#
[ 12] H _IGN NE# C4 C7 AD 26 R 26 COMP0
IGN NE# TH ERMTR IP# GTLREF C OMP[0] U 26 COMP1
PM_THR MTRI P# [5 ,12] MISC C OMP[1]
D5 U1 COMP2
[1 2] H_ STPC LK# C6 STPCLK# R2 72 * 1K_04 Z 02 21 C 26 C OMP[2] V1 COMP3
HOST
[ 12] H _I NTR
CLK
B4 LINT0 A2 2 TEST1 C OMP[3]

[12] H_NMI LINT1 BC LK[0 ] CL K_C PU _BC LK [17]
[ 12] H _SMI # A3 A2 1 CL K_C PU _BC LK# [ 17] R2 77 51.1 _1 %_ 04 Z 02 22 D 25 E5 H _D PR STP# [1 2,2 9]
SMI # BC LK[1 ] TEST2 DPRSTP#
13-51R11-28C B5 H _D PSLP# [ 12]
Z 0201 AA1 D PSLP# D 24
R SVD[ 01] # package: 0402 D PW R # H _D PW R# [ 4]
Z 0202 AA4 T2 2 Z 02 12 B22 D6
Z 0203 AB2 R SVD[ 02] # R SVD [1 2]# [4 ] CPU_ BSEL0 B23 BSEL[ 0] PWR GOOD D7 H _PWR GD [ 12 ]
Z 0204 AA3 R SVD[ 03] # [4 ] CPU_ BSEL1 C 21 BSEL[ 1] SLP# AE6 H _C PU SL P# [4 ]
RESERVED
R SVD[ 04] # [4 ] CPU_ BSEL2 BSEL[ 2] PSI # PSI# [29]

Z 0205 M4 D2 Z 02 13
Z 0206 N5 R SVD[ 05] # R SVD [1 3]# F6 Z 02 14 1 -16747 70 -2
Z 0207 T2 R SVD[ 06] # R SVD [1 4]# D3 Z 02 15
Z 0208 V3 R SVD[ 07] # R SVD [1 5]# C1 Z 02 16
Z 0209 B2 R SVD[ 08] # R SVD [1 6]# AF 1 Z 02 17
R SVD[ 09] # R SVD [1 7]# Layout Note:
Z 0210 C3 D22 Z 02 18
R SVD[ 10] # R SVD [1 8]# C23 Z 02 19 C PU _GTLR EF R273 1K_1%
Z 0211 R SVD [1 9]# Z 02 20
0.5" max, Zo= 55 Ohms +1.05VS
B25 C24
R SVD[ 11] # R SVD [2 0]#
1-1674770-2 C4 73 C 470 C4 71 R2 74
Layout note:
1u _X7R 0 .1u_X7 R_04 0.0 1u _04 2K_1%
+1.0 5VS If PROCHOT# is routed between CPU, IMVP and MCH, COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms
R26 5 5 6_0 4 H _I ER R# pull-up resistor has to be 75 ohm ? 5%. If not COMP1, COMP3: 0.5" Max, Zo=55 Ohms
R23 9 5 4.9_1% H _PREQ# use, pull-up resistor has to be 58 ohm ? 5% Best estimate is 18 mils wide trace for outer
R26 4 68 H _PROCH OT#
layers and 14 mils wide trace if on internal
layers.
R24 0 39 H _TMS Layout Note:
R23 8 1 50_ 1% H _TDI
Within 2.0" of the CPU COMP0
R24 1 27 H _TCK COMP1
R24 2 6 80 H _TRST# COMP2
COMP3
+3VS Q52 +V_THR M +3 VH 8

AO3409 R2 62 20 0_ 1% R 28 R 26 R 275 R276
R26 3 1 50_ 1% I TP_ DBRST# S D Z 022 4
+3 VH 8
5 4.9_1% 2 7.4_1% 54.9 _1% 27 .4_1%
G
R2 66 10 0K_04 R 268 C46 7
Z0 223 R 269 R 270 R 271
1 00 K_ 04 1u
4. 7K_04 4. 7K_04 1 0K_04 D 38 SCS751V
C A
PM_ TH RM# [14]
U 22
D
1 4
H _THERMD A VD D TH ER M
2 6 THERMAL_ALERT# [ 21 ,40 ]
G D+ ALER T
[ 21, 40] THERMAL_ON Q54 C468
2N 700 2
S
22 00p 3 7 TMP_SD AT [ 21, 40]

H _THERMD C 5 D- SD ATA 8
GN D SCL K TMP_SC LK [ 21, 40] +1 .05 VS [ 3,4,7, 8,12,1 5,3 0]
F 75 383 M +3 VS [ 5,8 ,9,10, 11, 12, 13, 14 ,15,16,17 ,18 ,19,20 ,21,22,2 4,2 6,27,2 9,3 0]
+3 VH 8 [11,21,2 2,26,2 7,4 0]
Layout Note: Layout Note:

Route H_THERMDA and Near to Thermal
H_THERMDC on same layer. IC
10 mil trace on 10 mil spacing.
YONAH 1/2 B - 3
Schematic Diagrams
YONAH 2/2
JSKT1D
A4 P6 +VCORE
A8 VSS[001] VSS[082] P21
+VCORE +VCORE VSS[002] VSS[083]
A11 P24
VSS[003] VSS[084]
JSKT1C A14 R2
A7 AB20 A16 VSS[004] VSS[085] R5 C432 C59 C451 C27 C459 C15 C54 C58 C427 C16
A9 VCC[001] VCC[68] AB7 A19 VSS[005] VSS[086] R22
VCC[002] VCC[69] VSS[006] VSS[087]
A10 AC7 A23 R25 10u_08 10u_08 10u_08 10u_08 10u_08 10u_08 10u_08 10u_08 10u_08 10u_08
A12 VCC[003] VCC[70] AC9 A26 VSS[007] VSS[088] T1
A13 VCC[004] VCC[71] AC12 B6 VSS[008] VSS[089] T4
VCC[005] VCC[72] VSS[009] VSS[090]
A15 AC13 B8 T23
VCC[006] VCC[73] VSS[010] VSS[091] +VCORE
A17 AC15 B11 T26
A18 VCC[007] VCC[74] AC17 B13 VSS[011] VSS[092] U3
VCC[008] VCC[75] VSS[012] VSS[093]
A20 AC18 B16 U6
VCC[009] VCC[76] VSS[013] VSS[094]
B7 AD7 B19 U21
B9 VCC[010] VCC[77] AD9 B21 VSS[014] VSS[095] U24 C458 C422 C26 C465 C430 C433 C452 C55 C460 C428
B10 VCC[011] VCC[78] AD10 B24 VSS[015] VSS[096] V2
VCC[012] VCC[79] VSS[016] VSS[097]
B12 AD12 C5 V5 22u_08 22u_08 22u_08 22u_08 22u_08 22u_08 22u_08 22u_08 22u_08 22u_08
B14 VCC[013] VCC[80] AD14 C8 VSS[017] VSS[098] V22
B15 VCC[014] VCC[81] AD15 C11 VSS[018] VSS[099] V25
VCC[015] VCC[82] VSS[019] VSS[100]
B17 AD17 C14 W1
B18 AD18 C16 W4
VCC[017] VCC[84] VSS[021] VSS[102]
B20 AE9 C19 W23

VCC[018] VCC[85] VSS[022] VSS[103]
C9 AE10 C2 W26
VCC[019] VCC[86] VSS[023] VSS[104]
C10 AE12 C22 Y3
C12 VCC[020] VCC[87] AE13 C25 VSS[024] VSS[105] Y6 C443 C442 C40 C52 C41 C49
C13 VCC[021] VCC[88] AE15 D1 VSS[025] VSS[106] Y21
VCC[022] VCC[89] VSS[026] VSS[107]
C15 AE17 D4 Y24 1u_X7R 1u_X7R 1u_X7R 1u_X7R 1u_X7R 1u_X7R
C17 VCC[023] VCC[90] AE18 D8 VSS[027] VSS[108] AA2
C18 VCC[024] VCC[91] AE20 D11 VSS[028] VSS[109] AA5
Sheet 3 of 41
VCC[025] VCC[92] VSS[029] VSS[110]
D9 AF9 D13 AA8
D10 AF10 D16 AA11
D12 VCC[027] VCC[94] AF12 D19 VSS[031] VSS[112] AA14
VCC[028] VCC[95] VSS[032] VSS[113]
YONAH 2/2
D14 AF14 D23 AA16
VCC[029] VCC[96] VSS[033] VSS[114]
D15 AF15 D26 AA19
D17 VCC[030] VCC[97] AF17 E3 VSS[034] VSS[115] AA22 C39 C36 C448 C29 C444 C439
VCC[031] VCC[98] VSS[035] VSS[116]
D18 AF18 E6 AA25
VCC[032] VCC[99] VSS[036] VSS[117]
E7 AF20 E8 AB1 1u_X7R 1u_X7R 1u_X7R 1u_X7R 1u_X7R 1u_X7R
VCC[033] VCC[100] VSS[037] VSS[118]
E9
E10 VCC[034]
VCC[035] VCCP[01]
V6 2A +1.05VS
E11
E14 VSS[038]
VSS[039]
VSS[119]
VSS[120]
AB4
AB8
E12 G21 E16 AB11
VCC[036] VCCP[02] VSS[040] VSS[121] +VCORE
E13 J6 E19 AB13
E15 VCC[037] VCCP[03] K6 E21 VSS[041] VSS[122] AB16
VCC[038] VCCP[04] VSS[042] VSS[123]
E17 M6 E24 AB19
VCC[039] VCCP[05] VSS[043] VSS[124]
E18 J21 F5 AB23
E20 VCC[040] VCCP[06] K21 F8 VSS[044] VSS[125] AB26 C42 C445 C34 C46 C447 C438
VCC[041] VCCP[07] VSS[045] VSS[126]
F7 M21 F11 AC3
VCC[042] VCCP[08] VSS[046] VSS[127]
F9 N21 F13 AC6 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04
F10 VCC[043] VCCP[09] N6 F16 VSS[047] VSS[128] AC8
F12 VCC[044] VCCP[10] R21 +1.5VS F19 VSS[048] VSS[129] AC11
VCC[045] VCCP[11] VSS[049] VSS[130]
F14
F15 VCC[046] VCCP[12]
VCC[047] VCCP[13]
R6
T21 130mA Layout note: F2
F22 VSS[050]
VSS[051]
VSS[131]
VSS[132]
AC14
AC16
F17 T6 Near pin B26 F25 AC19
VCC[048] VCCP[14] VSS[052] VSS[133]
F18 V21 C474 C472 G4 AC21
VCC[049] VCCP[15] VSS[053] VSS[134]
F20 W21 G1 AC24
AA7 VCC[050] VCCP[16] 10u_08 0.01u_04 G23 VSS[054] VSS[135] AD2
VCC[051] VSS[055] VSS[136]
AA9 B26 G26 AD5
VCC[052] VCCA VSS[056] VSS[137]
AA10 H3 AD8
AA12 VCC[053] H6 VSS[057] VSS[138] AD11
AA13 VCC[054] AD6 H_VID0 H21 VSS[058] VSS[139] AD13
AA15
VCC[055] VID[0]
AF5 H_VID1 H24
VSS[059] VSS[140]
AD16 +1.05VS PLACE NEAR CPU
AA17 VCC[056] VID[1] AE5 H_VID2 J2 VSS[060] VSS[141] AD19
AA18 VCC[057] VID[2] AF4 H_VID3 J5 VSS[061] VSS[142] AD22
VCC[058] VID[3] H_VID4 VSS[062] VSS[143]
AA20 AE3 J22 AD25
VCC[059] VID[4] H_VID5 VSS[063] VSS[144]
AB9 AF2 J25 AE1 C475 C464 C450 C463 C425 C462
AC10 VCC[060] VID[5] AE2 H_VID6 H_VID[6:0] K1 VSS[064] VSS[145] AE4 +
VCC[061] VID[6] H_VID[6:0] [29] VSS[065] VSS[146]
AB10 K4 AE8 *220u/4V_V 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04
VCC[062] VSS[066] VSS[147]
AB12 K23 AE11
AB14 VCC[063] K26 VSS[067] VSS[148] AE14
AB15 VCC[064] AF7 VCCSENSE L3 VSS[068] VSS[149] AE16
VCC[065]VCCSENSE VCCSENSE [29] VSS[069] VSS[150] +1.05VS
AB17 L6 AE19
AB18 VCC[066] AE7 VSSSENSE L21 VSS[070] VSS[151] AE23
VCC[067]VSSSENSE VSSSENSE [29] VSS[071] VSS[152]
L24 AE26
VSS[072] VSS[153]
1-1674770-2 M2 AF3
VSS[073] VSS[154]
R30 R36 M5 AF6 C435 C423 C461 C424 C426
M22 VSS[074] VSS[155] AF8
Layout note: VSS[075] VSS[156]
100_1% 100_1% M25 AF11 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04 0.1u_X7R_04
VSS[076] VSS[157]
Route VCCSENSE and N1 AF13
N4 VSS[077] VSS[158] AF16
VSSSENSE traces at 27.4Ohm N23 VSS[078] VSS[159] AF19
VSS[079] VSS[160]
+VCORE with 50 mil spacing. N26 AF21
P3 VSS[080] VSS[161] AF24
Place PU and PD within 1 VSS[081] VSS[162] +VCCP = 1.05V (0.997V~1.102V)
inch of CPU. 1-1674770-2
+1.05VS [2,4,7,8,12,15,30]
+1.5VS [5,8,13,15,22,28]
+VCORE [29]
B - 4 YONAH 2/2
Schematic Diagrams
Calistoga 1/5, HOST
U2 4A
[ 2] H _D #[ 63 :0] H_ A# [3 1: 3] [2 ]
H _D #0 F1 H9 H_ A# 3
H _D #1 J1 H _D # _0 H _A #_ 3 C9 H_ A# 4
H _D #2 H1 H _D # _1 H _A #_ 4 E 11 H_ A# 5
H _D #3 J6 H _D # _2 H _A #_ 5 G 11 H_ A# 6
H _D # _3
Host Clock
H _D #4 H3 H _A #_ 6 F 11 H_ A# 7
H _D #5 K2 H _D # _4 H _A #_ 7 G 12 H_ A# 8
H _D # _5
BSEL2 BSEL1 BSEL0 Frequency
H _D #6 G1 H _A #_ 8 F9 H_ A# 9
H _D #7 G2 H _D # _6 H _A #_ 9 H 11 H_ A# 10
H _D # _7
1 0 1 100 MHz
H _D #8 K9 H _ A# _1 0 J 12 H_ A# 11
H _D #9 K1 H _D # _8 H _ A# _1 1 G 14 H_ A# 12
H _D # _9
0 0 1 133 MHz
H _D #1 0 K7 H _ A# _1 2 D9 H_ A# 13
H _D #1 1 J8 H _D # _1 0 H _ A# _1 3 J 14 H_ A# 14
H _D # _1 1
0 1 1 166 MHz
H _D #1 2 H4 H _ A# _1 4 H 13 H_ A# 15
H _D #1 3 J3 H _D # _1 2 H _ A# _1 5 J 15 H_ A# 16
H _D # _1 3 H _ A# _1 6 Layout Notice: 1 1 1 200 MHz
H _D #1 4 K11 F 14 H_ A# 17
H _D #1 5 G4 H _D # _1 4 H _ A# _1 7 D 12 H_ A# 18
H _D # _1 5 H _ A# _1 8 0.1uF should be placed
H _D #1 6 T1 0 A 11 H_ A# 19
H _D #1 7 W 11 H _D # _1 6 H _ A# _1 9 C 11 H_ A# 20 100mils or less from GMCH
H _D #1 8 T3 H _D # _1 7 H _ A# _2 0 A 12 H_ A# 21 pin.
H _D #1 9 U7 H _D # _1 8 H _ A# _2 1 A 13 H_ A# 22 +1 .05 VS
H _D #2 0 U9 H _D # _1 9 H _ A# _2 2 E 13 H_ A# 23
H _D #2 1 U 11 H _D # _2 0 H _ A# _2 3 G 13 H_ A# 24
H _D #2 2 T1 1 H _D # _2 1 H _ A# _2 4 F 12 H_ A# 25 +1 .0 5V S
H _D #2 3 W9 H _D # _2 2 H _ A# _2 5 B 12 H_ A# 26 R 31 7
H _D #2 4 T1 H _D # _2 3 H _ A# _2 6 B 14 H_ A# 27
H _D # _2 4 H _ A# _2 7
H _D #2 5 T8 C 12 H_ A# 28 5 6_ 04
H _D #2 6 T4 H _D # _2 5 H _ A# _2 8 A 14 H_ A# 29 R 3 09
H _D #2 7 W7 H _D # _2 6 H _ A# _2 9 C 14 H_ A# 30 R 11 3 0 _0 4
H _D # _2 7 H _ A# _3 0 [2 ] CP U _B SE L0 C LK _ BS EL 0 [1 7]
H _D #2 8 U5 D 14 H_ A# 31 1 00 _1 %
H _D #2 9 T9 H _D # _2 8 H _ A# _3 1
H _D #3 0 W6 H _D # _2 9 J 13 R 49 3 1 K_ 04 R 31 6
Layout Notice: H _D # _3 0 H _ VR E F_ 0
H _D #3 1 T5 K 13
H _D #3 2 AB7 H _D # _3 1 H _ VR E F_ 1 E8 1 K_ 04
10 mils wide, 20 mils spacing H _D # _3 2 H_ AD S # H_ AD S # [2 ]
H _D #3 3 AA9 B9 C 1 76 R 3 13
H _D #3 4 H _D # _3 3 H _ AD S TB #_ 0 H_ AD S TB #0 [ 2]
W4 C 13
Sheet 4 of 41
+1. 05 VS H _D # _3 4 H _ AD S TB #_ 1 H_ AD S TB #1 [ 2] MC H_ BS E L0 [ 5]
H _D #3 5 W3 C6 0 .1 u_ X7 R_ 04 2 00 _1 %
H _D # _3 5 H _ BN R # H_ BN R # [2 ]
HOST
H _D #3 6 Y3 F6
H _D # _3 6 H _B P RI # H_ BP R I# [2 ]
R 29 3 5 4.9 _1 % MCH _ HXSC O MP H _D #3 7 Y7 C7
H _D #3 8 H _D # _3 7 H _ BR EQ # 0 H_ BR 0 # [2 ] +1 .05 VS
W5 B7
H _D # _3 8 H_ C PU R ST# H_ C PU R ST# [2 ]
R 29 2 5 4.9 _1 % MCH _ HY S CO MP H _D #3 9 Y 10 A7
Calistoga 1/5,
H _D #4 0 H _D # _3 9 H _D BS Y # H_ D BS Y # [2]
AB8 C3
H _D # _4 0 H _D E FE R # H_ D EF ER # [2 ]
R 29 4 2 4.9 _1 % MCH _ HXRC O MP H _D #4 1 W2 J9
H _D # _4 1 H_ DP W R # H_ D PW R # [2 ]
H _D #4 2 AA4 H8 R 11 5
H _D # _4 2 H_ D RD Y # H_ D RD Y # [2 ]
R 29 1 2 4.9 _1 % MCH _ HY R CO MP H _D #4 3 AA7
H _D #4 4 AA2 H _D # _4 3 J7 1 K_ 04
HOST
H _D # _4 4 H _D IN V #_ 0 H_ D IN V# 0 [2 ]
H _D #4 5 AA6 W8
H _D #4 6 H _D # _4 5 H _D IN V #_ 1 H_ D IN V# 1 [2 ]
AA 1 0 U3 R 11 7 0 _0 4
H _D #4 7 H _D # _4 6 H _D IN V #_ 2 H_ D IN V# 2 [2 ] [2 ] CP U _B SE L1 C LK _ BS EL 1 [1 7]
Y8 A B1 0
H _D #4 8 H _D # _4 7 H _D IN V #_ 3 H_ D IN V# 3 [2 ]
AA1
H _D #4 9 AB4 H _D # _4 8 K4 R 31 9 * 0_ 04 R 31 8
Layout Notice: H _D # _4 9 H _ DS TB N #_ 0 H_ D STBN #0 [2]
H _D #5 0 AC 9 T7
H _D #5 1 H _D # _5 0 H _ DS TB N #_ 1 H_ D STBN #1 [2]
MCH_HXSWING and MCH_HYSWING AB 1 1 Y5 1 K_ 04
H _D #5 2 H _D # _5 1 H _ DS TB N #_ 2 H_ D STBN #2 [2]
AC 1 1 AC 4
should be 10 mils traces H _D #5 3 H _D # _5 2 H _ DS TB N #_ 3 H_ D STBN #3 [2]
AB3
H _D #5 4 H _D # _5 3 MC H_ BS E L1 [ 5]
and 20 mils spacing AC 2 K3
H _D #5 5 H _D # _5 4 H _ DS TB P #_ 0 H_ D STBP #0 [ 2]
AD 1 T6
H _D #5 6 H _D # _5 5 H _ DS TB P #_ 1 H_ D STBP #1 [ 2] +1 .05 VS
AD 9 A A5
H _D #5 7 H _D # _5 6 H _ DS TB P #_ 2 H_ D STBP #2 [ 2]
AC 1 AC 5
+ 1. 05 VS +1. 05 VS H _D #5 8 H _D # _5 7 H _ DS TB P #_ 3 H_ D STBP #3 [ 2]
AD 7
H _D #5 9 AC 6 H _D # _5 8
H _D #6 0 AB5 H _D # _5 9 D3 R 11 8
H _D #6 1 H _D # _6 0 H _H IT# H_ H IT# [ 2]
AD 1 0 D4
H _D # _6 1 H _H ITM# H_ H ITM# [2 ]
R 30 2 R 28 5 H _D #6 2 AD 4 B3 1 K_ 04
H _D #6 3 H _D # _6 2 H _L OC K # H_ LO C K# [ 2]
AC 8
2 21 _1 % 2 21 _1 % H _D # _6 3 R 12 0 0 _0 4
MCH _H XRC O MP [2 ] CP U _B SE L2 C LK _ BS EL 2 [1 7]
E1
MCH _H XSC O MP H _XR CO MP H_ R EQ #[ 4:0 ] [2 ]
E2 D8 H_ RE Q #0
MCH _H XSW IN G E4 H _XS CO MP H _ RE Q #_ 0 G8 H_ RE Q #1 R 32 1 * 0_ 04 R 32 0
H _XS WI NG H _ RE Q #_ 1 B8 H_ RE Q #2
MCH _H Y R CO MP Y1 H _ RE Q #_ 2 F8 H_ RE Q #3 1 K_ 04
MCH _H Y SC O MP U1 H _Y R C OMP H _ RE Q #_ 3 A8 H_ RE Q #4
MCH _H Y SW I NG W1 H _Y S CO MP H _ RE Q #_ 4
H _Y S W IN G MC H_ BS E L2 [ 5]
B4
H _R S #_ 0 H_ R S# 0 [2 ]
AG2 E6
[1 7] C LK _ MC H _B CL K H _C L KI N H _R S #_ 1 H_ R S# 1 [2 ]
R 29 9 R 28 4 C 51 1 C 49 4 AG1 D6
[17 ] C LK _MC H_ BC L K# H _C L KI N# H _R S #_ 2 H_ R S# 2 [2 ]
1 00 _1 % 1 00 _1 % 0. 1u _X7R _0 4 0. 1u _X7R _0 4 E3
H_ S LP CP U # H_ C PU SL P # [2]
E7
H _TRD Y # H_ TR D Y # [2]
CA L ISTO GA
+1. 05 VS [ 2, 3,7 ,8 ,12 ,1 5, 30 ]
Calistoga 1/5, HOST B - 5

Schematic Diagrams
Calistoga 2/5
U24B R338 24.9_1%

+1. 5V S
Z0501 T32 AY 35 M_C LK_D DR 0 U 24C
RSVD _1 SM_C K_0 M_C LK_DD R0 [ 9]
Z0502 R32 AR 1 M_C LK_D DR 1 Z 0551 D 32 D40 PEG _C OMP
Z0503 F3 RSVD _2 SM_C K_1 AW 7 M_C LK_D DR 2 M_C LK_DD R1 [ 9] J 30 L_BKLTCTL EXP_A_COMPI D38
RSVD _3 SM_C K_2 M_C LK_D DR 3 M_C LK_DD R2 [ 10] [26] BLON L_BKLTEN EXP_A_C OMPO
Z0504 F7 AW 40 R137 10K_04 Z 0552 H 30
RSVD _4 SM_C K_3 M_C LK_DD R3 [ 10] +3V S L_C LKCTLA
Z0505 AG11 R328 10K_04 Z 0553 H 29 F34 Z 0561
RSVD
Z0506 AF11 RSVD _5 AW 35 M_C LK_D DR 0# R129 10K_04 Z 0554 G26 L_C LKCTLB EXP_A_RXN_0 G38 Z 0562
RSVD _6 S M_CK #_0 M_C LK_D DR 1# M_C LK_DD R0# [9] +3V S L_D DC _C LK EXP_A_RXN_1
Z0507 H7 AT1 R127 10K_04 Z 0555 G25 H34 Z 0563
Z0508 J19 RSVD _7 S M_CK #_1 AY 7 M_C LK_D DR 2# M_C LK_DD R1# [9] R329 1.5K_04 L_IB G B38 L_D DC _D ATA EXP_A_RXN_2 J38 Z 0564
RSVD _8 S M_CK #_2 M_C LK_DD R2# [10] L_IBG EXP_A_RXN_3
Z0509 K30 AY 40 M_C LK_D DR 3# M_C LK_DD R3# [10] Z 0556 C 35 L34 Z 0565
TV_D CO NSEL0 S M_CK #_3 L_VBG EXP_A_RXN_4
MCH_BSEL[2..0] Z0510
Z0511
J29
A41 TV_D CO NSEL1 AU 20
[11] EN AV DD
R141 100K_04
F 32
C 33 L_VDD EN EXP_A_RXN_5
M38
N34
Z 0566
Z 0567
RSVD _11 SM_CKE_0 M_C KE0 [ 9] L_VRE FH EXP_A_RXN_6
001 = PSB533 Z0512
Z0513
A35
A34 RSVD _12 SM_CKE_1
AT20
BA 29
M_C KE1 [ 9]
C 32
L_VRE FL EXP_A_RXN_7
P38
R34
Z 0568
Z 0569
MUXING
M_C KE2 [ 10]
011 = PSB667 Z0514 D28
RSVD _13
RSVD _14
SM_CKE_2
SM_CKE_3
AY 29 M_C KE3 [ 10] [ 11] LVDS -LCLKN A33
LA_CLK#
EXP_A_RXN_8
EXP_A_RXN_9
T38 Z 0570
Z0515 D27 A32 V34 Z 0571
Others = RSVD _15
S M_CS #_0
AW 13
M_C S0# [9]
[ 11]
[11]
LVD S-LCLKP
LVDS -U CLK N
E27 LA_CLK
LB_CLK#
EXP_A_R XN _10
EXP_A_R XN _11
W 38 Z 0572
AW 12 E26 Y 34 Z 0573
Reserved [4] MCH _BSEL0 K16
S M_CS #_1
AY 21
M_C S1# [9]
M_C S2# [10]
[ 11] LVDS -U CLKP LB_CLK EXP_A_R XN _12
AA 38 Z 0574
CF G_0 S M_CS #_2 EXP_A_R XN _13
K18 AW 21 C 37 AB 34 Z 0575
LVDS
[4] MCH _BSEL1 CF G_1 S M_CS #_3 M_C S3# [10] [ 11] LVD S-L0N LA_DA TA #_0 EXP_A_R XN _14
J18 B35 AC 38 Z 0576
[4] MCH _BSEL2 CF G_2 [ 11] LVD S-L1N LA_DA TA #_1 EXP_A_R XN _15
Z0516 F18 AL20 Z 0549 [ 11] LVD S-L2N A37
Z0517 E15 CF G_3 SM_O CD CO MP_0 AF 10 Z 0550 LA_DA TA #_2 D34 Z 0577
CF G_4 SM_O CD CO MP_1 EXP_A_RXP_0
MC H_CF G5 F15 F38 Z 0578
CF G_5 EXP_A_RXP_1
DDR
CFG[17..3] has Z0518 E18 BA 13 G34 Z 0579
GRAPHICS
CF G_6 SM_OD T_0 M_ODT0 [ 9] EXP_A_RXP_2
MC H_CF G7 D19 BA 12 M_ODT1 [ 9] [ 11] LVD S-L0P B37 H38 Z 0580
CF G_7 SM_OD T_1 LA_DA TA _0 EXP_A_RXP_3
internal pull up Z0519
MC H_CF G9
D16
G16
CF G_8 SM_OD T_2
AY 20
AU 21
M_ODT2 [ 10] [ 11] LVD S-L1P
B34
A36
LA_DA TA _1 EXP_A_RXP_4
J34
L38
Z 0581
Z 0582
CFG
Z0520 E16 CF G_9 SM_OD T_3 M_ODT3 [ 10] [ 11] LVD S-L2P LA_DA TA _2 EXP_A_RXP_5 M34 Z 0583
MC H_CF G11 D15 CF G_10 AV 9 M_R CO MPN EXP_A_RXP_6 N38 Z 0584
CFG[20..18] has MC H_CF G12 G15 CF G_11
CF G_12
S M_RC OMP#
SM_R COMP
AT9 M_R CO MPP
[11] LVDS -U 0N G30
LB_DA TA #_0
EXP_A_RXP_7
EXP_A_RXP_8
P34 Z 0585
MC H_CF G13 K15 D 30 R38 Z 0586
internal pull down [11] LVDS -U 1N
Sheet 5 of 41
Z0524 C15 CF G_13 AK 1 M_VREF_MCH F 29 LB_DA TA #_1 EXP_A_RXP_9 T34 Z 0587
Z0525 H16 CF G_14 SM_V REF_0 AK 41 +1.8V [11] LVDS -U 2N LB_DA TA #_2 EXP_A_R XP _10 V38 Z 0588
MC H_CF G16 G18 CF G_15 SM_V REF_1 R156 1K_1% EXP_A_R XP _11 W 34 Z 0589
CF G_16 EXP_A_R XP _12
Z0526 H15 C563 C 554 R336 Y 38 Z 0590
Calistoga 2/5 MC H_CF G18 J25 CF G_17 F 30 EXP_A_R XP _13 AA 34 Z 0591

CF G_18 [11] LVDS -U 0P LB_DA TA _0 EXP_A_R XP _14
MC H_CF G19 K27 1u_X7R 0.01u_04 1K_1% D 29 AB 38 Z 0592
MC H_CF G20 J26 CF G_19 [11] LVDS -U 1P F 28 LB_DA TA _1 EXP_A_R XP _15
[11] LVDS -U 2P
PCI-EXPRESS
CF G_20 LB_DA TA _2
F36 Z 0593
G28 E XP _A_TXN_0 G40 Z 0594
[14] PM_BMB USY # PM_BMB USY # E XP _A_TXN_1
PM_EXTTS0# F25 AF 33 H36 Z 0595
[9] P M_EXTTS 0# PM_EXTTS1#_R H26 PM_EXTTS#_0 G_C LK IN# AG 33 CLK_PCI E_3GPLL# [17] E XP _A_TXN_2 J40 Z 0596
PM
PM_EXTTS#_1 G_CLKIN CLK_PCI E_3GPLL [17] E XP _A_TXN_3
G6 A27 A16 L36 Z 0597
CLK
[2, 12] PM_THR MTRI P# AH33 PM_THR MTRI P# D_REFC LK IN# A26 CLK_D REF# [ 17] [26] TV_DACA_OUT C 18 TV_DA CA_O UT E XP _A_TXN_4 M40 Z 0598
[14,26,29] DELAY _PW RG D NB_R STIN# PW R OK D _R EF CLKIN CLK_D REF [17] [26] TV_DACB_OUT TV_DA CB_O UT E XP _A_TXN_5
AH34 C40 A19 N36 Z 0599
RSTI N# D_RE FSSC LK IN# CLK_D REFSS# [17] [26] TV_DACC _O UT TV_DA CC _O UT E XP _A_TXN_6
D41 P40 Z 05100
TV
D _R EF SSCLKIN CLK_D REFSS [17] E XP _A_TXN_7
R 119 150_1% Z 0557 J 20 R36 Z 05101
Z0527 H28 R 109 150_1% B16 TV_IRE F E XP _A_TXN_8 T40 Z 05102
MISC
Z0528 H27 SD VO _C TR LC LK R 106 150_1% B18 TV_IRTNA E XP _A_TXN_9 V36 Z 05103
K28 SD VO _C TR LD ATA AE 35 D MI_TXN0 R 125 4.99K_1% B19 TV_IRTNB EXP_A_TXN _10 W 40 Z 05104
[13] MCH _IC H _SY N C# IC H_SY NC # DMI_RXN _0 TV_IRTNC EXP_A_TXN _11
[17] MC H_CLKR EQ # H32 AF 39 D MI_TXN1 Y 36 Z 05105
CLK_REQ0# DMI_RXN _1 AG 35 D MI_TXN2 C539 22p_04 EXP_A_TXN _12 AA 40 Z 05106
DMI_RXN _2 DMI_TXN [3: 0] [13] EXP_A_TXN _13
Z0530 D1 AH 39 D MI_TXN3 C138 22p_04 AB 36 Z 05107
Z0531 C41 NC 0 DMI_RXN _3 C137 22p_04 EXP_A_TXN _14 AC 40 Z 05108
NC 1 EXP_A_TXN _15
Z0532 C1
NC 2
Z0533 BA41 AC 35 D MI_TXP0 [ 26] D AC _BLUE E23 D36 Z 05109
Z0534 BA40 NC 3 DMI_RXP_0 AE 39 D MI_TXP1 R322 150_1% D 23 C R T_BLU E EXP_A_TXP_0 F40 Z 05110
Z0535 BA39 NC 4 DMI_RXP_1 AF 35 D MI_TXP2 C 22 C R T_BLU E# EXP_A_TXP_1 G36 Z 05111
NC 5 DMI_RXP_2 DMI_TXP[3:0] [13] [26] D AC _G R EEN C R T_GREEN EXP_A_TXP_2
Z0536 BA3 AG 39 D MI_TXP3 R126 150_1% B22 H40 Z 05112
VGA
DMI
NC 6 DMI_RXP_3 C R T_GREEN # EXP_A_TXP_3
Z0537 BA2 [26] D AC _R ED A21 J36 Z 05113
Z0538 BA1 NC 7 R128 150_1% B21 C R T_R ED EXP_A_TXP_4 L40 Z 05114
NC
Z0539 B41 NC 8 AE 37 D MI_RXN0 C R T_R ED # EXP_A_TXP_5 M36 Z 05115
Z0540 B2 NC 9 D MI_TXN _0 AF 41 D MI_RXN1 EXP_A_TXP_6 N40 Z 05116
NC 10 D MI_TXN _1 EXP_A_TXP_7
Z0541 AY41 AG 37 D MI_RXN2 C 26 P36 Z 05117
Z0542 AY 1 NC 11 D MI_TXN _2 AH 41 D MI_RXN3 DMI_R XN [3: 0] [13] [26] DA C_D D CA CLK C 25 C R T_D DC _C LK EXP_A_TXP_8 R40 Z 05118
NC 12 D MI_TXN _3 [ 26] D AC _D DC AD ATA C R T_D DC _D ATA EXP_A_TXP_9
Z0543 AW 41 R 135 39. 2_1% Z 0558 G23 T36 Z 05119
NC 13 [26] D AC _H SY NC C R T_H SY NC EXP_A_TXP _10
Z0544 AW 1 R 132 255_1% Z 0559 J 22 V40 Z 05120
Z0545 A40 NC 14 AC 37 D MI_RXP0 R 326 39. 2_1% Z 0560 H 23 C R T_I RE F EXP_A_TXP _11 W 36 Z 05121
NC 15 D MI_TXP_0 [26] D AC _VSY NC C R T_VSY NC EXP_A_TXP _12
Z0546 A4 AE 41 D MI_RXP1 Y 40 Z 05122
Z0547 A39 NC 16 D MI_TXP_1 AF 37 D MI_RXP2 EXP_A_TXP _13 AA 36 Z 05123
NC 17 D MI_TXP_2 DMI_R XP[3: 0] [13] EXP_A_TXP _14
Z0548 A3 AG 41 D MI_RXP3 AB 40 Z 05124
NC 18 D MI_TXP_3 EXP_A_TXP _15
MAX=0.5"
CALISTO GA C ALI STOG A
Minimize REFSET
R331 routing length and
100_04 R134 10K_04 PM_E XTTS0#
NB_RSTI N# shield with VSS +3VS
[ 13, 14, 16, 21] PLT_RST# R123 10K_04 PM_E XTTS1# R121 0_04 PM_EXTTS1#_R
R 110 *2.2K_04 MC H_CF G5 R513 *0_04 PM_EXTTS0#

[ 10] P M_EXTTS 1#
Layout note:
C al istog a S trap pin g LOW H IG H M_C LK_D DR 0 R124 *0_04 PM_EXTTS1#_R
[ 14, 29] PM_DPRSLPVR
R 116 *2.2K_04 MC H_CF G7 C 773 Very close to U24.AY35 &
MCH _ CFG5 DMIx2 D MIx4 U24.AW35
M_C LK_D DR 0# 10p_04
R 315 *2.2K_04 MC H_CF G9 MCH _ CFG7 (CP U S tra p) RS VD Mob ile C P U
R 100 80.6_1% M_R CO MPN
+1. 8V
MCH _ CFG9 (PC IE Gra ph ic s L an e) R evers e La ne No rm a l o pe ra tio n Layout note:
R 514 *2.2K_04 MC H_CF G11 M_C LK_D DR 1 R 105 80.6_1% M_R CO MPP
MCH _ CFG11 (P S B 4 X CL K EN ABL ) RS VD 8 X EN AB L E C 774 Very close to U24.AR1 &
M_C LK_D DR 1#
U24.AT1
R 491 *2.2K_04 MC H_CF G12 MCH _ CFG12 10p_04
MCH _ CFG13
R 492 *2.2K_04 MC H_CF G13 Layout note: +1. 5VS [ 3,8,13,15,22,28]
MCH _ CFG16 (FSB D yn a m i c OD T) Dis a ble E na bl e M_C LK_D DR 2
+1. 8V [7,9,10,28]
C 775 Very close to U24.AW7 & +3VS [2, 8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,26,27,29,30]
R 114 *2.2K_04 MC H_CF G16 MCH _ CFG18 (VC C s e lect) 1.0 5V 1.5V U24.AY7
M_C LK_D DR 2# 10p_04
MCH _ CFG19 (D MI L an e reversa l) No rm a l L a ne s revers e d
R 324 *1K_04 MC H_CF G18
MCH _ CFG20 (P C Ie ba ck wa rd Onl y S D VO o r P C Ie SD VO a nd P C Ie x1 are o pe ra tin g Layout note:
M_C LK_D DR 3
R 139 *1K_04 MC H_CF G19 in erpo erab ility m o de ) x1 i s o pe ra tio na l sim u lta ne ou sl y via th e P E G p o rt C 776 Very close to U24.AW40 &
+3VS
M_C LK_D DR 3#
U24.AY40
10p_04
R 327 *1K_04 MC H_CF G20
B - 6 Calistoga 2/5
Schematic Diagrams
Calistoga 3/5, DDR
U24D
[9] M_A_DQ[63:0] M_A_DQ0 AJ35 AU12 U24E
M_A_DQ1 AJ34 SA_DQ0 SA_BS_0 AV14 M_A_BS0# [9] [10] M_B_DQ[63:0] M_B_DQ0 AK39
M_A_DQ2 SA_DQ1 SA_BS_1 M_A_BS1# [9] M_B_DQ1 SB_DQ0
AM31 BA20 AJ37 AT24
M_A_DQ3 SA_DQ2 SA_BS_2 M_A_BS2# [9] M_B_DQ2 SB_DQ1 SB_BS_0 M_B_BS0# [10]
AM33 AP39 AV23
M_A_DQ4 SA_DQ3 M_B_DQ3 SB_DQ2 SB_BS_1 M_B_BS1# [10]
AJ36 AY13 AR41 AY28
M_A_DQ5 AK35 SA_DQ4 SA_CAS# AJ33 M_A_CAS# [9] M_B_DQ4 AJ38 SB_DQ3 SB_BS_2 M_B_BS2# [10]
M_A_DQ6 SA_DQ5 SA_DM_0 M_A_DM0 [9] M_B_DQ5 SB_DQ4
AJ32 AM35 AK38 AR24
M_A_DQ7 SA_DQ6 SA_DM_1 M_A_DM1 [9] M_B_DQ6 SB_DQ5 SB_CAS# M_B_CAS# [10]
AH31 AL26 AN41 AK36
M_A_DQ8 SA_DQ7 SA_DM_2 M_A_DM2 [9] M_B_DQ7 SB_DQ6 SB_DM_0 M_B_DM0 [10]
AN35 AN22 AP41 AR38
AP33 AM14 M_A_DM4 [9] AT40 AT36 M_B_DM2 [10]
M_A_DQ10 AR31 SA_DQ9 SA_DM_4 AL9 M_B_DQ9 AV41 SB_DQ8 SB_DM_2 BA31
AP31 AR3 AU38 AL17
AN38 AH4 AV38 AH8
AM36 AP38 BA5
M_A_DQ14 AM34 SA_DQ13 AK33 M_B_DQ13 AR40 SB_DQ12 SB_DM_6 AN4 M_B_DM6 [10]
SA_DQ14 SA_DQS_0 M_A_DQS0 [9] SB_DQ13 SB_DM_7 M_B_DM7 [10]
A
M_A_DQ15 AN33 AT33 M_B_DQ14 AW38
M_A_DQ16 SA_DQ15 SA_DQS_1 M_A_DQS1 [9] M_B_DQ15 SB_DQ14
AK26 AN28 AY 38 AM39
SA_DQ16 SA_DQS_2 M_A_DQS2 [9] SB_DQ15 SB_DQS_0 M_B_DQS0 [10]
B
M_A_DQ17 AL27 AM22 M_B_DQ16 BA38 AT39
M_A_DQ18 AM26 SA_DQ17 SA_DQS_3 AN12 M_A_DQS3 [9] M_B_DQ17 AV36 SB_DQ16 SB_DQS_1 AU35 M_B_DQS1 [10]
M_A_DQ19 SA_DQ18 SA_DQS_4 M_A_DQS4 [9] M_B_DQ18 SB_DQ17 SB_DQS_2 M_B_DQS2 [10]
AN24 AN8 AR36 AR29
MEMORY Sheet 6 of 41
AK28 AP3 AP36 AR16
AL28 AG5 BA36 AR10
MEMORY
AM24 AK32 M_A_DQS0# [9] AU36 AR7 M_B_DQS6 [10]
SA_DQ22 SA_DQS#_0 SB_DQ21 SB_DQS_6
Calistoga 3/5, DDR

M_A_DQ23 AP26 AU33 M_B_DQ22 AP35 AN5
M_A_DQ24 SA_DQ23 SA_DQS#_1 M_A_DQS1# [9] M_B_DQ23 SB_DQ22 SB_DQS_7 M_B_DQS7 [10]
AP23 AN27 AP34 AM40
M_A_DQ25 SA_DQ24 SA_DQS#_2 M_A_DQS2# [9] M_B_DQ24 SB_DQ23 SB_DQS#_0 M_B_DQS0# [10]
AL22 AM21 AY 33 AU39
AP21 AM12 BA33 AT35
M_A_DQ27 AN20 SA_DQ26 SA_DQS#_4 AL8 M_A_DQS4# [9] M_B_DQ26 AT31 SB_DQ25 SB_DQS#_2 AP29 M_B_DQS2# [10]
AL23 AN3 AU29 AP16
AP24 AH5 AU31 AT10
AP20 AW31 AT7
M_A_DQ31 AT21 SA_DQ30 AY16 M_A_A0 M_A_A[13:0] [9] M_B_DQ30 AV29 SB_DQ29 SB_DQS#_6 AP5 M_B_DQS6# [10]
M_A_DQ32 SA_DQ31 SA_MA_0 M_A_A1 M_B_DQ31 SB_DQ30 SB_DQS#_7 M_B_DQS7# [10]
AR12 AU14 AW29
SYSTEM
M_A_DQ33 SA_DQ32 SA_MA_1 M_A_A2 M_B_DQ32 SB_DQ31 M_B_A0 M_B_A[13:0] [10]

AR14 AW16 AM19 AY23
M_A_DQ34 AP13 SA_DQ33 SA_MA_2 BA16 M_A_A3 M_B_DQ33 AL19 SB_DQ32 SB_MA_0 AW24 M_B_A1
SYSTEM
M_A_DQ35 AP12 SA_DQ34 SA_MA_3 BA17 M_A_A4 M_B_DQ34 AP14 SB_DQ33 SB_MA_1 AY24 M_B_A2
M_A_DQ36 AT13 SA_DQ35 SA_MA_4 AU16 M_A_A5 M_B_DQ35 AN14 SB_DQ34 SB_MA_2 AR28 M_B_A3
M_A_DQ37 AT12 SA_DQ36 SA_MA_5 AV17 M_A_A6 M_B_DQ36 AN17 SB_DQ35 SB_MA_3 AT27 M_B_A4
M_A_DQ38 AL14 SA_DQ37 SA_MA_6 AU17 M_A_A7 M_B_DQ37 AM16 SB_DQ36 SB_MA_4 AT28 M_B_A5
M_A_DQ39 AL12 SA_DQ38 SA_MA_7 AW17 M_A_A8 M_B_DQ38 AP15 SB_DQ37 SB_MA_5 AU27 M_B_A6
M_A_DQ40 AK9 SA_DQ39 SA_MA_8 AT16 M_A_A9 M_B_DQ39 AL15 SB_DQ38 SB_MA_6 AV28 M_B_A7
M_A_DQ41 AN7 SA_DQ40 SA_MA_9 AU13 M_A_A10 M_B_DQ40 AJ11 SB_DQ39 SB_MA_7 AV27 M_B_A8
M_A_DQ42 AK8 SA_DQ41 SA_MA_10 AT17 M_A_A11 M_B_DQ41 AH10 SB_DQ40 SB_MA_8 AW27 M_B_A9
M_A_DQ43 AK7 SA_DQ42 SA_MA_11 AV20 M_A_A12 M_B_DQ42 AJ9 SB_DQ41 SB_MA_9 AV24 M_B_A10
M_A_DQ44 AP9 SA_DQ43 SA_MA_12 AV12 M_A_A13 M_B_DQ43 AN10 SB_DQ42 SB_MA_10 BA27 M_B_A11
M_A_DQ45 AN9 SA_DQ44 SA_MA_13 M_B_DQ44 SB_DQ43 SB_MA_11 M_B_A12
DDR
AK13 AY27
M_A_DQ46 AT5 SA_DQ45 AW14 M_B_DQ45 AH11 SB_DQ44 SB_MA_12 AR23 M_B_A13
M_A_DQ47 SA_DQ46 SA_RAS# M_A_RAS# [9] SB_DQ45 SB_MA_13
AL5 AK23 Z0601 M_B_DQ46 AK10
DDR
M_A_DQ48 AY2 SA_DQ47 SA_RCVENIN# AK24 Z0602 M_B_DQ47 AJ8 SB_DQ46 AU23
M_A_DQ49 SA_DQ48 SA_RCVENOUT# M_B_DQ48 SB_DQ47 SB_RAS# Z0603 M_B_RAS# [10]
AW2 AY14 BA10 AK16
M_A_DQ50 SA_DQ49 SA_WE# M_A_WE# [9] M_B_DQ49 SB_DQ48 SB_RCVENIN# Z0604
AP1 AW10 AK18
M_A_DQ51 AN2 SA_DQ50 M_B_DQ50 BA4 SB_DQ49 SB_RCVENOUT# AR27
M_A_DQ52 SA_DQ51 M_B_DQ51 SB_DQ50 SB_WE# M_B_WE# [10]
AV2 AW4
M_A_DQ53 AT3 SA_DQ52 M_B_DQ52 AY 10 SB_DQ51
M_A_DQ54 AN1 SA_DQ53 M_B_DQ53 AY 9 SB_DQ52
M_A_DQ55 AL2 SA_DQ54 M_B_DQ54 AW5 SB_DQ53
M_A_DQ56 AG7 SA_DQ55 M_B_DQ55 AY 5 SB_DQ54
M_A_DQ57 AF9 SA_DQ56 M_B_DQ56 AV4 SB_DQ55
M_A_DQ58 AG4 SA_DQ57 M_B_DQ57 AR5 SB_DQ56
M_A_DQ59 AF6 SA_DQ58 M_B_DQ58 AK4 SB_DQ57
M_A_DQ60 AG9 SA_DQ59 M_B_DQ59 AK3 SB_DQ58
M_A_DQ61 AH6 SA_DQ60 M_B_DQ60 AT4 SB_DQ59
M_A_DQ62 AF4 SA_DQ61 M_B_DQ61 AK5 SB_DQ60
M_A_DQ63 AF8 SA_DQ62 M_B_DQ62 AJ5 SB_DQ61
SA_DQ63 M_B_DQ63 AJ3 SB_DQ62
CALISTOGA SB_DQ63
CALISTOGA
Calistoga 3/5, DDR B - 7

Schematic Diagrams
Calistoga 4/5
U 24G
+1.05VS AA3 3
W3 3 VCC _0 AU 41
P3 3 VCC _1 VCC _SM_0 AT41 Z0701 U2 4F U24 I U24J
N3 3 VCC _2 VCC _SM_1 AM41 Z0702 A D27 AC 41 A K34 AT23 J11
L3 3 VCC _3 VCC _SM_2 AU 40 A C27 VCC_NC TF0 A E27 AA41 VS S_0 VSS _97 A G34 AN 23 VS S_180 VSS_273 D11
J3 3 VCC _4 VCC _SM_3 BA34 C28 8 C 562 AB27 VCC_NC TF1 VSS _NC TF0 A E26 W 41 VS S_1 VSS _98 A F34 AM23 VS S_181 VSS_274 B11
AA3 2 VCC _5 VCC _SM_4 AY 34 AA27 VCC_NC TF2 VSS _NC TF1 A E25 T41 VS S_2 VSS _99 A E34 AH 23 VS S_182 VSS_275 AV1 0
Y3 2 VCC _6 VCC _SM_5 AW 34 0.47 u 0. 47u Y 27 VCC_NC TF3 VSS _NC TF2 A E24 P41 VS S_3 VSS _100 A C34 AC 23 VS S_183 VSS_276 AP1 0
W3 2 VCC _7 VCC _SM_6 AV34 W27 VCC_NC TF4 VSS _NC TF3 A E23 M41 VS S_4 VSS _101 C 34 W 23 VS S_184 VSS_277 AL10
V3 2 VCC _8 VCC _SM_7 AU 34 V27 VCC_NC TF5 VSS _NC TF4 A E22 J 41 VS S_5 VSS _102 A W33 K 23 VS S_185 VSS_278 AJ10
P3 2 VCC _9 VCC _SM_8 AT34 U27 VCC_NC TF6 VSS _NC TF5 A E21 F 41 VS S_6 VSS _103 A V33 J 23 VS S_186 VSS_279 AG10
N3 2 VCC _10 VCC _SM_9 AR 34 T27 VCC_NC TF7 VSS _NC TF6 A E20 AV40 VS S_7 VSS _104 A R33 F 23 VS S_187 VSS_280 AC10
VCC _11 VCC _SM_10 VCC_NC TF8 VSS _NC TF7 VS S_8 VSS _105 VS S_188 VSS_281
M3 2 BA30 R27 A E19 AP40 A E33 C 23 W10
L3 2 VCC _12 VCC _SM_11 AY 30 A D26 VCC_NC TF9 VSS _NC TF8 A E18 AN 40 VS S_9 VSS _106 A B33 AA 22 VS S_189 VSS_282 U10
J3 2 VCC _13 VCC _SM_12 AW 30 A C26 VCC_NC TF10 VSS _NC TF9 A C17 AK40 VS S_10 VSS _107 Y 33 K 22 VS S_190 VSS_283 BA9
VCC _14 VCC _SM_13 +1.8V VCC_NC TF11 V SS_ NC TF10 VS S_11 VSS _108 VS S_191 VSS_284
AA3 1 AV30 AB26 Y 17 AJ 40 V 33 G22 AW 9
W3 1 VCC _15 VCC _SM_14 AU 30 C 542 C546 AA26 VCC_NC TF12 V SS_ NC TF11 U 17 AH 40 VS S_12 VSS _109 T33 F 22 VS S_192 VSS_285 AR9
V3 1 VCC _16 VCC _SM_15 AT30 Y 26 VCC_NC TF13 V SS_ NC TF12 AG40 VS S_13 VSS _110 R 33 E 22 VS S_193 VSS_286 AH9
T3 1 VCC _17 VCC _SM_16 AR 30 10u_08 10 u_08 W26 VCC_NC TF14 AF 40 VS S_14 VSS _111 M33 D 22 VS S_194 VSS_287 AB9
R3 1 VCC _18 VCC _SM_17 AP30 V26 VCC_NC TF15 AE40 VS S_15 VSS _112 H 33 A 22 VS S_195 VSS_288 Y9
P3 1 VCC _19 VCC _SM_18 AN 30 U26 VCC_NC TF16 B40 VS S_16 VSS _113 G33 BA 21 VS S_196 VSS_289 R9
VCC _20 VCC _SM_19 Layout Note: VCC_NC TF17 VS S_17 VSS _114 VS S_197 VSS_290
N3 1 AM30 T26 AY 39 F 33 AV 21 G9
M3 1 VCC _21 VCC _SM_20 AM29 R26 VCC_NC TF18 A G27 AW 39 VS S_18 VSS _115 D 33 AR 21 VS S_198 VSS_291 E9
VCC _22 VCC _SM_21 Co-layout VCC_NC TF19 VCC AUX_NC TF0 VS S_19 VSS _116 VS S_199 VSS_292
AA3 0 AL29 A D25 A F27 AV39 B 33 AN 21 A9
Y3 0 VCC _23 VCC _SM_22 AK29 A C25 VCC_NC TF20 VCC AUX_NC TF1 A G26 AR 39 VS S_20 VSS _117 A H32 AL 21 VS S_200 VSS_293 AG8
W3 0 VCC _24 VCC _SM_23 AJ 29 C 513 C524 C282 C797 AB25 VCC_NC TF21 VCC AUX_NC TF2 A F26 AN 39 VS S_21 VSS _118 A G32 AB 21 VS S_201 VSS_294 AD8
V3 0 VCC _25 VCC _SM_24 AH 29
+ +
AA25 VCC_NC TF22 VCC AUX_NC TF3 A G25 AJ 39 VS S_22 VSS _119 A F32 Y 21 VS S_202 VSS_295 AA8
U3 0 VCC _26 VCC _SM_25 AJ 28 10u_08 10 u_08 *33 0u/2.5V_ V 220u/2.5V_B Y 25 VCC_NC TF23 VCC AUX_NC TF4 A F25 AC 39 VS S_23 VSS _120 A E32 P 21 VS S_203 VSS_296 U8
T3 0 VCC _27 VCC _SM_26 AH 28 W25 VCC_NC TF24 VCC AUX_NC TF5 A G24 AB39 VS S_24 VSS _121 A C32 K 21 VS S_204 VSS_297 K8
R3 0 VCC _28 VCC _SM_27 AJ 27 V25 VCC_NC TF25 VCC AUX_NC TF6 A F24 AA39 VS S_25 VSS _122 A B32 J 21 VS S_205 VSS_298 C8
P3 0 VCC _29 VCC _SM_28 AH 27 U25 VCC_NC TF26 VCC AUX_NC TF7 A G23 Y 39 VS S_26 VSS _123 G32 H 21 VS S_206 VSS_299 BA7
N3 0 VCC _30 VCC _SM_29 BA26 T25 VCC_NC TF27 VCC AUX_NC TF8 A F23 W 39 VS S_27 VSS _124 B 32 C 21 VS S_207 VSS_300 AV7
M3 0 VCC _31 VCC _SM_30 AY 26 R25 VCC_NC TF28 VCC AUX_NC TF9 A G22 V39 VS S_28 VSS _125 A Y 31 AW 20 VS S_208 VSS_301 AP7
VCC _32 VCC _SM_31 VCC_NC TF29 V CCA UX_ NC TF10 VS S_29 VSS _126 VS S_209 VSS_302
Sheet 7 of 41
L3 0 AW 26 C 252 C 233 C219 A D24 A F22 T39 A V31 AR 20 AL7
AA2 9
Y2 9
VCC _33
VCC _34
VCC _35
VCC _SM_32
VCC _SM_33
VCC _SM_34
AV26
AU 26 0. 1u_X7R_04 0. 1u_X7R_04 0. 1u_X7R_04
A C24
AB24
VCC_NC TF30
VCC_NC TF31
VCC_NC TF32
V CCA UX_ NC TF11
V CCA UX_ NC TF12
V CCA UX_ NC TF13
A G21
A F21
R 39
P39
VS S_30
VS S_31
VS S_32
VSS _127
VSS _128
VSS _129
A N31
A J31
AM20
AA 20
VS S_210
VS S_211
VS S_212
VSS VSS_303
VSS_304
VSS_305
AJ7
AH7
W2 9 AT26 AA24 A G20 N 39 A G31 K 20 AF7
VCC _36 VCC _SM_35 VCC_NC TF33 V CCA UX_ NC TF14 VS S_33
VSS VSS _130 VS S_213 VSS_306
Calistoga 4/5
V2 9 AR 26 Y 24 A F20 M39 A B31 B 20 AC7
U2 9 VCC _37 VCC _SM_36 AJ 26 W24 VCC_NC TF34 V CCA UX_ NC TF15 A G19 L39 VS S_34 VSS _131 Y 31 A 20 VS S_214 VSS_307 R7
R2 9 VCC _38 VCC _SM_37 AH 26 V24 VCC_NC TF35 V CCA UX_ NC TF16 A F19 J 39 VS S_35 VSS _132 A B30 AN 19 VS S_215 VSS_308 G7
P2 9 VCC _39 VCC _SM_38 AJ 25 U24 VCC_NC TF36 V CCA UX_ NC TF17 R 19 H 39 VS S_36 VSS _133 E 30 AC 19 VS S_216 VSS_309 D7
M2 9 VCC _40 VCC _SM_39 AH 25 T24 VCC_NC TF37 V CCA UX_ NC TF18 A G18 G39 VS S_37 VSS _134 A T29 W 19 VS S_217 VSS_310 AG6
L2 9 VCC _41 VCC _SM_40 AJ 24 R24 VCC_NC TF38 V CCA UX_ NC TF19 A F18 F 39 VS S_38 VSS _135 A N29 K 19 VS S_218 VSS_311 AD6
AB2 8 VCC _42 VCC _SM_41 AH 24 A D23 VCC_NC TF39 V CCA UX_ NC TF20 R 18 D 39 VS S_39 VSS _136 A B29 G19 VS S_219 VSS_312 AB6
AA2 8 BA23 V23 A G17 AT38 T29 C 19 Y6
Y2 8 VCC _44 VCC _SM_43 AJ 23 U23 VCC_NC TF41 V CCA UX_ NC TF22 A F17 AM38 VS S_41 VSS _138 N 29 AH 18 VS S_221 VSS_314 U6
V2 8 VCC _45 VCC _SM_44 BA22 C18 5 T23 VCC_NC TF42 V CCA UX_ NC TF23 A E17 AH 38 VS S_42 VSS _139 K 29 P 18 VS S_222 VSS_315 N6
U2 8 VCC _46 VCC _SM_45 AY 22 R23 VCC_NC TF43 V CCA UX_ NC TF24 A D17 AG38 VS S_43 VSS _140 G29 H 18 VS S_223 VSS_316 K6
T2 8 VCC _47 VCC _SM_46 AW 22 0.47u A D22 VCC_NC TF44 V CCA UX_ NC TF25 A B17 AF 38 VS S_44 VSS _141 E 29 D 18 VS S_224 VSS_317 H6
R2 8 AV22 V22 A A17 AE38 C 29 A 18 B6
P2 8 VCC _49 VCC _SM_48 AU 22 U22 VCC_NC TF46 V CCA UX_ NC TF27 W 17 C 38 VS S_46 VSS _143 B 29 AY 17 VS S_226 VSS_319 AV5
N2 8 VCC _50 VCC _SM_49 AT22 T22 VCC_NC TF47 V CCA UX_ NC TF28 V 17 AK37 VS S_47 VSS _144 A 29 AR 17 VS S_227 VSS_320 AF5
M2 8 VCC _51 VCC _SM_50 AR 22 R22 VCC_NC TF48 V CCA UX_ NC TF29 T17 AH 37 VS S_48 VSS _145 B A28 AP 17 VS S_228 VSS_321 AD5
L2 8 VCC _52 VCC _SM_51 AP22 A D21 VCC_NC TF49 V CCA UX_ NC TF30 R 17 AB37 VS S_49 VSS _146 A W28 AM17 VS S_229 VSS_322 AY 4
VCC _53 VCC _SM_52 VCC_NC TF50
P2 7
N2 7 VCC _54
VCC _55
VCC _SM_53
VCC _SM_54
AK22
AJ 22
V21
U21 VCC_NC TF51
VCC_NC TF52
NCTF V CCA UX_ NC TF31
V CCA UX_ NC TF32
V CCA UX_ NC TF33
A G16
A F16
AA37
Y 37
VS S_50
VS S_51
VS S_52
VSS _147
VSS _148
VSS _149
A U28
A P28
AK 17
AV 16
VS S_230
VS S_231
VS S_232
VSS_323
VSS_324
VSS_325
AR4
AP4
M2 7 AK21 T21 A E16 W 37 A M28 AN 16 AL4
L2 7 VCC _56 VCC _SM_55 AK20 R21 VCC_NC TF53 V CCA UX_ NC TF34 A D16 V37 VS S_53 VSS _150 A D28 AL 16 VS S_233 VSS_326 AJ4
P2 6 VCC _57 VCC _SM_56 BA19 A D20 VCC_NC TF54 V CCA UX_ NC TF35 A C16 T37 VS S_54 VSS _151 A C28 J 16 VS S_234 VSS_327 Y4
N2 6 VCC _58 VCC _SM_57 AY 19 V20 VCC_NC TF55 V CCA UX_ NC TF36 A B16 R 37 VS S_55 VSS _152 W 28 F 16 VS S_235 VSS_328 U4
L2 6 VCC _59 VCC _SM_58 AW 19 U20 VCC_NC TF56 V CCA UX_ NC TF37 A A16 P37 VS S_56 VSS _153 J 28 C 16 VS S_236 VSS_329 R4
N2 5 VCC _60 VCC _SM_59 AV19 T20 VCC_NC TF57 V CCA UX_ NC TF38 Y 16 N 37 VS S_57 VSS _154 E 28 AN 15 VS S_237 VSS_330 J4
M2 5 VCC _61 VCC _SM_60 AU 19 R20 VCC_NC TF58 V CCA UX_ NC TF39 W 16 M37 VS S_58 VSS _155 A P27 AM15 VS S_238 VSS_331 F4
L2 5 VCC _62 VCC _SM_61 AT19 A D19 VCC_NC TF59 V CCA UX_ NC TF40 V 16 L37 VS S_59 VSS _156 A M27 AK 15 VS S_239 VSS_332 C4
P2 4 VCC _63 VCC _SM_62 AR 19 V19 VCC_NC TF60 V CCA UX_ NC TF41 U 16 J 37 VS S_60 VSS _157 A K27 N 15 VS S_240 VSS_333 AY 3
N2 4 VCC _64 VCC _SM_63 AP19 U19 VCC_NC TF61 V CCA UX_ NC TF42 T16 H 37 VS S_61 VSS _158 J 27 M15 VS S_241 VSS_334 AW 3
M2 4 VCC _65 VCC _SM_64 AK19 T19 VCC_NC TF62 V CCA UX_ NC TF43 R 16 G37 VS S_62 VSS _159 G27 L 15 VS S_242 VSS_335 AV3
AB2 3 VCC _66 VCC _SM_65 AJ 19 A D18 VCC_NC TF63 V CCA UX_ NC TF44 A G15 F 37 VS S_63 VSS _160 F 27 B 15 VS S_243 VSS_336 AL3
AA2 3 VCC _67 VCC _SM_66 AJ 18 A C18 VCC_NC TF64 V CCA UX_ NC TF45 A F15 D 37 VS S_64 VSS _161 C 27 A 15 VS S_244 VSS_337 AH3
Y2 3
P2 3
VCC _68
VCC _69
VCC _70
VCC VCC _SM_67
VCC _SM_68
VCC _SM_69
AJ 17
AH 17
AB18
AA18
VCC_NC TF65
VCC_NC TF66
VCC_NC TF67
V CCA UX_ NC TF46
V CCA UX_ NC TF47
V CCA UX_ NC TF48
A E15
A D15
AY 36
AW 36
VS S_65
VS S_66
VS S_67
VSS _162
VSS _163
VSS _164
B 27
A N26
BA 14
AT14
VS S_245
VS S_246
VS S_247
VSS_338
VSS_339
VSS_340
AG3
AF3
N2 3 AJ 16 Y 18 A C15 AN 36 M26 AK 14 AD3
M2 3 VCC _71 VCC _SM_70 AH 16 W18 VCC_NC TF68 V CCA UX_ NC TF49 A B15 AH 36 VS S_68 VSS _165 K 26 AD 14 VS S_248 VSS_341 AC3
L2 3 VCC _72 VCC _SM_71 BA15 V18 VCC_NC TF69 V CCA UX_ NC TF50 A A15 AG36 VS S_69 VSS _166 F 26 AA 14 VS S_249 VSS_342 AA3
AC2 2 VCC _73 VCC _SM_72 AY 15 U18 VCC_NC TF70 V CCA UX_ NC TF51 Y 15 AF 36 VS S_70 VSS _167 D 26 U 14 VS S_250 VSS_343 G3
AB2 2 VCC _74 VCC _SM_73 AW 15 C 171 T18 VCC_NC TF71 V CCA UX_ NC TF52 W 15 AE36 VS S_71 VSS _168 A K25 K 14 VS S_251 VSS_344 AT2
Y2 2 VCC _75 VCC _SM_74 AV15 +1.05V S VCC_NC TF72 V CCA UX_ NC TF53 V 15 AC 36 VS S_72 VSS _169 P 25 H 14 VS S_252 VSS_345 AR2
W2 2 VCC _76 VCC _SM_75 AU 15 0.47u V CCA UX_ NC TF54 U 15 C 36 VS S_73 VSS _170 K 25 E 14 VS S_253 VSS_346 AP2
VCC _77 VCC _SM_76 V CCA UX_ NC TF55 VS S_74 VSS _171 VS S_254 VSS_347
P2 2
N2 2 VCC _78 VCC _SM_77
AT15
AR 15
near pin BA15 V CCA UX_ NC TF56
T15
R 15
B36
BA35 VS S_75 VSS _172
H 25
E 25
AV 13
AR 13 VS S_255 VSS_348
AK2
AJ2
M2 2 VCC _79 VCC _SM_78 AJ 15 V CCA UX_ NC TF57 AV35 VS S_76 VSS _173 D 25 AN 13 VS S_256 VSS_349 AD2
VCC _80 VCC _SM_79 VS S_77 VSS _174 VS S_257 VSS_350
L2 2 AJ 14 CALISTOGA AR 35 A 25 AM13 AB2
AC2 1 VCC _81 VCC _SM_80 AJ 13 AH 35 VS S_78 VSS _175 B A24 AL 13 VS S_258 VSS_351 Y2
AA2 1 VCC _82 VCC _SM_81 AH 13 AB35 VS S_79 VSS _176 A U24 AG13 VS S_259 VSS_352 U2
VCC _83 VCC _SM_82 +1.5V S_AUX VS S_80 VSS _177 VS S_260 VSS_353
W2 1 AK12 AA35 A L24 P 13 T2
N2 1 VCC _84 VCC _SM_83 AJ 12 Y 35 VS S_81 VSS _178 A W23 F 13 VS S_261 VSS_354 N2
M2 1 VCC _85 VCC _SM_84 AH 12 W 35 VS S_82 VSS _179 D 13 VS S_262 VSS_355 J2
L2 1 VCC _86 VCC _SM_85 AG12 V35 VS S_83 B 13 VS S_263 VSS_356 H2
AC2 0 VCC _87 VCC _SM_86 AK11 T35 VS S_84 AY 12 VS S_264 VSS_357 F2
AB2 0 VCC _88 VCC _SM_87 BA8 R 35 VS S_85 AC 12 VS S_265 VSS_358 C2
Y2 0 VCC _89 VCC _SM_88 AY 8 P35 VS S_86 K 12 VS S_266 VSS_359 AL1
W2 0 VCC _90 VCC _SM_89 AW 8 N 35 VS S_87 H 12 VS S_267 VSS_360
P2 0 VCC _91 VCC _SM_90 AV8 +1.05V S M35 VS S_88 E 12 VS S_268
N2 0 VCC _92 VCC _SM_91 AT8 L35 VS S_89 AD 11 VS S_269
M2 0 VCC _93 VCC _SM_92 AR 8 J 35 VS S_90 AA 11 VS S_270
L2 0 VCC _94 VCC _SM_93 AP8 H 35 VS S_91 Y 11 VS S_271
AB1 9 VCC _95 VCC _SM_94 BA6 C54 5 C48 2 C4 83 C 170 C240 C 248 C 254 G35 VS S_92 VS S_272
AA1 9 VCC _96 VCC _SM_95 AY 6
+
F 35 VS S_93
VCC _97 VCC _SM_96 VS S_94 CALISTOGA
Y1 9 AW 6 220u/4V _V 10u_08 10u _08 1 u_X7R 0.22u 0.22u 0.22u D 35
N1 9 VCC _98 VCC _SM_97 AV6 AN 34 VS S_95
M1 9 VCC _99 VCC _SM_98 AT6 VS S_96
L1 9 VCC _100 VCC _SM_99 AR 6
N1 8 VCC _101 V CC_ SM_100 AP6 CAL ISTOGA
M1 8 VCC _102 V CC_ SM_101 AN 6
L1 8 VCC _103 V CC_ SM_102 AL6
P1 7 VCC _104 V CC_ SM_103 AK6
N1 7 VCC _105 V CC_ SM_104 AJ 6
M1 7 VCC _106 V CC_ SM_105 AV1 Z0703
N1 6 VCC _107 V CC_ SM_106 AJ 1 Z0704
M1 6 VCC _108 V CC_ SM_107 C 491 C13 5
L1 6 VCC _109 +1.05V S [ 2,3,4 ,8,1 2,15 ,30]
VCC _110 +1.5VS_AU X [ 8]
0.47u 0.47 u +1.8V [5,9,10, 28]
C ALI STOGA
B - 8 Calistoga 4/5
Schematic Diagrams
Calistoga 5/5
+2.5VS +2.5 VS _TXL VD S +2.5VS
+1.5V S_PCI E L19
+1.0 5V S
+1. 5V S L3 5 HC B1608 KF -1 21T25 H C B160 8KF -121T25 12/14 R2.0A
C 2 71 C 272 C 28 0
C5 72 C 5 67 C 568
+
1 u_X7R 0.1u_ X7R_ 04 0.1 u_X7R _ 04 C 47 8 C 204 C4 84 C266 C115
+
330u /2. 5V_V 10u _08 10u _08
Within U 24 H 10 u_08 10u_ 08 10u_08 10 u_08 47 0u/2. 5V _V
200mils H22
VC C SY N C AC 14
+1. 5VS_3GP LL C30 VTT_0 AB 14
B30 VC C _TXLVD S0 VTT_1 W 14
L3 4 HC B 1608 KF -121T25 A30 VC C _TXLVD S1 VTT_2 V14
+1. 5V S VC C _TXLVD S2 VTT_3 T14 C 25 9 C 217 C2 67 C241 C145 C1 40
C 5 66 C 555 AJ41 VTT_4 R1 4
+2.5V S AB41 VC C 3G0 VTT_5 P14 0. 1u _X7R _04 0. 1u_X7R _0 4 0. 1u_X7R _0 4 0. 1u _X7R _04 1u _X7R 1u_X7R
10u _08 0.1u_X7 R_ 04 C 28 7 Y 41 VC C 3G1 VTT_6 N1 4
V41 VC C 3G2 VTT_7 M1 4
0 .1 u_X7R_04 R41 VC C 3G3 VTT_8 L14
N41 VC C 3G4 VTT_9 AD 13
L41 VC C 3G5 V TT_10 AC 13
Within VC C 3G6 V TT_11
D4 1 S C S551V 200mils A C33 AB 13 C 23 6 C 255 C2 61 C245 C163 C1 58
R1 04 10 Z0801 C A G41 VC C A_ 3GPL L V TT_12 AA 13
+2. 5VS +1 .05VS +2 .5VS _C RTD AC H41 VC C A_ 3GBG V TT_13 Y1 3 0. 1u _X7R _04 0. 1u_X7R _0 4 0. 1u_X7R _0 4 0. 1u _X7R _04 0.1 u_X7 R _04 0.1 u_X7R _0 4
VS SA _3GBG V TT_14 W 13
L17 HC B 16 08KF -12 1T25 F21 V TT_15 V13
C 5 36 E21 VC C A_ CR TDA C 0 V TT_16 U1 3
0 .1u_ X7R_04 G21 VC C A_ CR TDA C 1 V TT_17 T13
VS SA _CR TD AC V TT_18 R1 3
Within V TT_19
250mils B26 N1 3
C39 VC C A_ DP LL A V TT_20 M1 3
+1. 5V S_ DP LL A AF 1 VC C A_ DP LL B V TT_21 L13
VC C A_ HP LL V TT_22 AB 12
L20 HC B 16 08KF -12 1T25 A38 V TT_23 AA 12 +3 VS _ATVB G L16 +3VS
Sheet 8 of 41
+1. 5VS VC C A_ LVDS V TT_24 +1.5 VS
B39 Y1 2 C 535 C530 H C B160 8K F-12 1T25
C 2 93 C 2 57 VS SA _LV DS V TT_25 W 12
AF 2 V TT_26 V12 1u_X7R 0. 1u_X7R _04
1u_ X7R 0 .1u_ X7R_04 VC C A_ MP LL V TT_27 U1 2
Calistoga 5/5
V TT_28
A
+3V S_ ATVBG H20 T12
+1. 5V S_ DP LL B G20 VC C A_ TVBG V TT_29 R1 2 D4 0
VS SA _TV BG V TT_30 +3V S_TVD AC A
P12 L13
L21 HC B 16 08KF -12 1T25 V TT_31 N1 2 C 526 C203 H C B160 8K F-12 1T25 SC S5 51V
V TT_32 M1 2
C 2 89 C 2 94 E19 V TT_33 L12 1u_X7R 0. 1u_X7R _04
C
+3 VS _TVD ACA VC C A_ TVDA C A0 V TT_34
F19 R1 1 R3 14
1u_ X7R 0 .1u_ X7R_04 C20 VC C A_ TVDA C A1 V TT_35 P11 10
+3 VS _TVD ACB VC C A_ TVDA C B0 V TT_36
D20 N1 1 Z080 2
+1.5V S_H PLL VC C A_ TVDA C B1 V TT_37 +3V S_TVD AC B
E20 M1 1 L14
+3 VS _TVD ACC
L27 HC B 16 08KF -12 1T25
F20 VC C A_ TVDA C C0
VC C A_ TVDA C C1 POWER V TT_38
V TT_39
V TT_40
R1 0
P10
C 529 C527 H C B160 8K F-12 1T25
C798
+1.5 VS AH 1 N1 0 1u_X7R 0. 1u_X7R _04
C 4 88 C 4 80 AH 2 VC C D_ H MP LL 0 V TT_41 M1 0 10u_08
+2.5 VS VC C D_ H MP LL 1 V TT_42 P9
22u _08 0 .1u_ X7R_04 C 284 A28 V TT_43 N9
VC C D_ LV D S0 V TT_44 +3V S_TVD AC C 12/05 R2.0A
Within B28 M9 C 239 L18
0.1u_ X7R_ 04 C28 VC C D_ LV D S1 V TT_45 R8 C235 H C B160 8K F-12 1T25
200mils VC C D_ LV D S2 V TT_46
CLOSE TO L14
P8 1u_X7R
D21 V TT_47 N8 0. 1u_X7R _04
+1. 5VS_MPLL
Within VC C D_ TV D AC V TT_48
200mils M8
A23 V TT_49 P7
+3 VS VC C _H V0 V TT_50
Within
L28 HC B 16 08KF -12 1T25 B23 N7 250mils
B25 VC C _H V1 V TT_51 M7
C 4 89 C 4 81 +1.5 VS VC C _H V2 V TT_52 R6
C 134 H19 V TT_53 P6
22u _08 0 .1u_ X7R_04 VC C DQ_ TV DA C V TT_54 M6
0.1u_ X7R_ 04 AK31 V TT_55 A6 V TTL F _C AP 3
AF31 VC C AU X0 V TT_56 R5
Within VC C AU X1 V TT_57
200mils AE31 P5 C 51 4
A C31 VC C AU X2 V TT_58 N5
+1. 5VS AL30 VC C AU X3 V TT_59 M5 0. 47 u
C258 C 264 AK30 VC C AU X4 V TT_60 P4
AJ30 VC C AU X5 V TT_61 N4
0.1u_ X7R _04 0.1u_ X7R_ 04 A H30 VC C AU X6 V TT_62 M4
A G30 VC C AU X7 V TT_63 R3
+1.5V S _QTV D AC AF30 VC C AU X8 V TT_64 P3
AE30 VC C AU X9 V TT_65 N3
L 11 H C B160 8KF -121T25 A D30 VC C AU X1 0 V TT_66 M3
A C30 VC C AU X1 1 V TT_67 R2
C 230 A G29 VC C AU X1 2 V TT_68 P2
AF29 VC C AU X1 3 V TT_69 M2
0.1u_ X7R_ 04 AE29 VC C AU X1 4 V TT_70 D2 V TTL F _C AP 2
A D29 VC C AU X1 5 V TT_71 AB 1 V TTL F _C AP 1
Within VC C AU X1 6 V TT_72
250mils A C29 R1
A G28 VC C AU X1 7 V TT_73 P1 C 49 2 C 493
+1 .5VS _A UX AF28 VC C AU X1 8 V TT_74 N1
AE28 VC C AU X1 9 V TT_75 M1 0. 47 u 0. 22u
R 154 0 _08 A H22 VC C AU X2 0 V TT_76
+1. 5V S VC C AU X2 1
AJ21
C 297 C 298 C 56 4 C 56 5 A H21 VC C AU X2 2
AJ20 VC C AU X2 3
10u _08 10u_0 8 1 0u_0 8 1 0u_08 A H20 VC C AU X2 4
VC C AU X2 5
A H19
P19 VC C AU X2 6
P16 VC C AU X2 7
A H15 VC C AU X2 8
VC C AU X2 9 +1.0 5VS [2 ,3 ,4, 7,12, 15 ,3 0]
C 208 C 260 C 18 8 C 19 0 P15 +1.5 VS [3, 5,1 3, 15,22 ,2 8]
VC C AU X3 0
A H14 +1.5 VS _A U X [7]
0.1u_ X7R_ 04 0.1u_X7 R_ 04 0 .1 u_X7R_04 0 .1u_ X7R _04 A G14 VC C AU X3 1
VC C AU X3 2 +2.5 VS [26 ,3 0]
AF14 +3V S [2,5, 9,10, 11,12 ,1 3, 14,15 ,1 6,17, 18 ,19,20, 21,22,2 4,2 6, 27 ,2 9,30]
AE14 VC C AU X3 3
Y 14 VC C AU X3 4
VC C AU X3 5
AF13
C 207 C 231 C 21 4 C 18 9 AE13 VC C AU X3 6
AF12 VC C AU X3 7
0.1u_ X7R_ 04 0.1u_X7 R_ 04 0 .1 u_X7R_04 0 .1u_ X7R _04 AE12 VC C AU X3 8
A D12 VC C AU X3 9
VC C AU X4 0
C AL ISTOGA
Calistoga 5/5 B - 9
Schematic Diagrams
DRII SO-DIMM 0
+VTT_MEM RESISTORS
16-56034-45A +VTT_ME M
M_C S 0# 4 1 R N43 C 516 0. 1u_X7R _04

M_A_RAS # 3 2 4P2 RX56_ 04
J D IMM- 2A
[6] M_ A_A[ 13:0] M_A_DQ[63: 0] [ 6]
M_A_A 0 102 5 M_A_DQ0 M_C S 1# 1 4 R N11 C 512 0. 1u_X7R _04
M_A_A 1 101 A0 D Q0 7 M_A_DQ1 M_OD T1 2 3 4P2 RX56_ 04
M_A_A 2 100 A1 D Q1 17 M_A_DQ2
M_A_A 3 99 A2 D Q2 19 M_A_DQ3 M_A_A13 4 1 R N42 C 150 0. 1u_X7R _04
M_A_A 4 98 A3 D Q3 4 M_A_DQ4 M_OD T0 3 2 4P2 RX56_ 04
M_A_A 5 97 A4 D Q4 6 M_A_DQ5
M_A_A 6 94 A5 D Q5 14 M_A_DQ6 M_A_A2 4 1 R N47 C 515 0. 1u_X7R _04
M_A_A 7 92 A6 D Q6 16 M_A_DQ7 M_A_A4 3 2 4P2 RX56_ 04
M_A_A 8 93 A7 D Q7 23 M_A_DQ8
Layout Note: A8 D Q8
M_A_A 9 91 25 M_A_DQ9 M_A_A1 4 1 R N24 C 220 0. 1u_X7R _04
A9 D Q9
Memory clock signal/space: M_A_A 10 105 35 M_A_DQ1 0 M_A_A3 3 2 4P2 RX56_ 04
A1 0/ AP D Q10
M_A_A 11 90 37 M_A_DQ1 1
A1 1 D Q11 +1.8V
9 / 4 / 9 => 9 / 5 / 9 M_A_A 12 89 20 M_A_DQ1 2 M_A_A8 1 4 R N18 C 510 0. 1u_X7R _04
A1 2 D Q12
M_A_A 13 116 22 M_A_DQ1 3 JD IMM-2 B M_A_A9 2 3 4P2 RX56_ 04
A1 3 D Q13
86 36 M_A_DQ1 4 1 12 18
A1 4 D Q14 V D D1 VS S16
84 38 M_A_DQ1 5 1 11 24 M_A_BS2# 1 4 R N20 C 206 0. 1u_X7R _04
A1 5 D Q15 V D D2 VS S17
M_ A_BS2# 85 43 M_A_DQ1 6 1 17 41 M_A_A12 2 3 4P2 RX56_ 04
[ 6] M_A_BS2 # A1 6_BA2 D Q16 V D D3 VS S18
45 M_A_DQ1 7 96 53
M_ A_BS0# 107 D Q17 55 M_A_DQ1 8 95 V D D4 VS S19 42 M_A_CAS # 1 4 R N15 C 215 0. 1u_X7R _04
[ 6] M_A_BS0 # BA 0 D Q18 V D D5 VS S20 M_A_W E#
M_ A_BS1# 106 57 M_A_DQ1 9 1 18 54 2 3 4P2 RX56_ 04
[ 6] M_A_BS1 # BA 1 D Q19 V D D6 VS S21
M_ C S0 # 110 44 M_A_DQ2 0 81 59
[5] M_ CS0 # S0 # D Q20 V D D7 VS S22
M_ C S1 # 115 46 M_A_DQ2 1 82 65 M_A_A5 4 1 R N25 C 234 0. 1u_X7R _04
[5] M_ CS1 # S1 # D Q21 V D D8 VS S23
M_ C LK _D D R 0 30 56 M_A_DQ2 2 87 60 M_C K E0 3 2 4P2 RX56_ 04
[5] M_ C LK _D D R 0 C K0 D Q22 V D D9 VS S24
M_ C LK _D D R 0# 32 58 M_A_DQ2 3 1 03 66
[ 5] M_C LK_D DR 0 # M_ C LK _D D R 1 C K0# D Q23 V D D10 VS S25
164 61 M_A_DQ2 4 88 127 M_A_A10 1 4 R N13 C 162 0. 1u_X7R _04
[5] M_ C LK _D D R 1 C K1 D Q24 V D D11 VS S26
M_ C LK _D D R 1# 166 63 M_A_DQ2 5 1 04 139 M_A_BS0# 2 3 4P2 RX56_ 04
Sheet 9 of 41
[ 5] M_C LK_D DR 1 # M_ C KE 0 C K1# D Q25 V D D12 VS S27
79 73 M_A_DQ2 6 128
[5] M_ CKE 0 C KE0 D Q26 VS S28
M_ C KE 1 80 75 M_A_DQ2 7 1 99 145 M_A_A6 4 1 R N49 C 197 0. 1u_X7R _04
[5] M_ CKE 1 C KE1 D Q27 +3VS V D DSP D VS S29
M_ A_C AS# 113 62 M_A_DQ2 8 165 M_A_A7 3 2 4P2 RX56_ 04
[ 6] M_A_C AS# C AS# D Q28 VS S30
M_ A_R AS# 108 64 M_A_DQ2 9 C 105 83 171
DRII SO-DIMM 0
[ 6] M_A_R AS# R AS# D Q29 NC1 VS S31
M_ A_W E# 109 74 M_A_DQ3 0 1 20 172 M_A_A11 4 1 R N51 C 159 0. 1u_X7R _04
[6] M_A_W E# W E# D Q30 NC2 VS S32
SA 0_D IM0 198 76 M_A_DQ3 1 0. 1u _X7R _ 04 50 177 M_C K E1 3 2 4P2 RX56_ 04
SA 0 D Q31 NC3 VS S33
SA 1_D IM0 200 123 M_A_DQ3 2 69 187
SA 1 D Q32 NC4 VS S34
197 125 M_A_DQ3 3 1 63 178 M_A_BS1# 4 1 R N45 C 186 0. 1u_X7R _04
[10, 14,17,1 8, 22 ] IC H _S MB C LK SC L D Q33 N C TEST VS S35
195 135 M_A_DQ3 4 190 M_A_A0 3 2 4P2 RX56_ 04
[10, 14,17,1 8, 22 ] IC H _S MB D A T SD A D Q34 [ 5] PM_EXTTS0# VS S36
R 282 R 279 137 M_A_DQ3 5 MV R EF _D I M0 1 9
M_ ODT0 114 D Q35 124 M_A_DQ3 6 V R EF VS S37 21
[5] M_ OD T0 O DT0 D Q36 VS S38
10K_04 10K_04 M_ ODT1 119 126 M_A_DQ3 7 C 306 2 01 33
[5] M_ OD T1 O DT1 D Q37 G N D0 VS S39
134 M_A_DQ3 8 2 02 155
10 D Q38 136 M_A_DQ3 9 0. 1u _X7R _ 04 G N D1 VS S40 34
[6 ] M_A _D M0 D M0 D Q39 VS S41 Layout note:
26 141 M_A_DQ4 0 132
[6 ] M_A _D M1 D M1 D Q40 VS S42
52 143 M_A_DQ4 1 47 144 Place one cap close to every 2 pull-up resistors
[6 ] M_A _D M2 D M2 D Q41 V SS1 VS S43
67 151 M_A_DQ4 2 1 33 156
[6 ] M_A _D M3
130 D M3 D Q42 153 M_A_DQ4 3 1 83 V SS2 VS S44 168 terminated to +VTT_MEM
[6 ] M_A _D M4 D M4 D Q43 V SS3 VS S45
147 140 M_A_DQ4 4 77 2
[6 ] M_A _D M5 D M5 D Q44 V SS4 VS S46
170 142 M_A_DQ4 5 12 3
[6 ] M_A _D M6 D M6 D Q45 V SS5 VS S47
185 152 M_A_DQ4 6 48 15
[6 ] M_A _D M7 D M7 D Q46 V SS6 VS S48
154 M_A_DQ4 7 1 84 27
13 D Q47 157 M_A_DQ4 8 78 V SS7 VS S49 39
[ 6] M_A_D QS 0 D QS 0 D Q48 V SS8 VS S50
31 159 M_A_DQ4 9 71 149 CLOSE TO SO-DIMM_0
[ 6] M_A_D QS 1 D QS 1 D Q49 V SS9 VS S51
51 173 M_A_DQ5 0 72 161
[ 6] M_A_D QS 2 D QS 2 D Q50 V SS1 0 VS S52
70 175 M_A_DQ5 1 1 21 28
131 158 M_A_DQ5 2 1 22 40
148 160 M_A_DQ5 3 1 96 138
169 174 M_A_DQ5 4 1 93 150 R 158 1K_ 1% MVR EF _DI M0
[ 6] M_A_D QS 6 D QS 6 D Q54 V SS1 4 VS S56 +1 .8V
188 176 M_A_DQ5 5 8 162
179 M_A_DQ5 6
11 D Q56 181 M_A_DQ5 7 CA014 5-20 0N 02 R 15 9 C3 02 C 30 5
[6] M_ A_D QS0# D QS 0# D Q57
29 189 M_A_DQ5 8
[6] M_ A_D QS1# D QS 1# D Q58
49 191 M_A_DQ5 9 1K_1% 1u 0. 1u_X7R _04
[6] M_ A_D QS2# D QS 2# D Q59
68 180 M_A_DQ6 0
[6] M_ A_D QS3# D QS 3# D Q60
129 182 M_A_DQ6 1
[6] M_ A_D QS4# D QS 4# D Q61
146 192 M_A_DQ6 2
[6] M_ A_D QS5# D QS 5# D Q62
167 194 M_A_DQ6 3
[6] M_ A_D QS6# D QS 6# D Q63
186
[6] M_ A_D QS7# D QS 7#
C A0145-200N02
+1.8V [5,7,10,2 8]
+1.8 V +3VS [2, 5, 8,10,11,12, 13,1 4,15, 16,17, 18,19,2 0, 21 ,22,24,26,27, 29,30]
+VTT_MEM [10,28]
C 194 C3 00 C 192 C 212 C 222 C 23 8 C265 C 213 C 2 28 C 244 C 178 C249 C 250 C179 C 193
+ +
* 15 0u/4 V_B *220u/ 4V_V 10u_0 8 10u _08 10u_08 10u_08 10u_ 08 0. 1u_X7R _04 0.1u_X7R _04 0. 1u_X7R _04 0.1 u_X7R_ 04 0. 1u_X7R _04 0.1u _X7R_ 04 0.1u_X7R _04 0.1u _X7R_ 04
B - 10 DRII SO-DIMM 0
Schematic Diagrams
DDRII SO-DIMM 1
+VTT_MEM RESISTORS
16-56034-45A +VTT_MEM
M_B_RAS# 4 1 RN 12 C 523 0.1u_X7R _04

J DI MM-1A M_B_A13 3 2 4P2RX56_04
[6] M_B_A[13:0] M_B_D Q[ 63:0] [6]
M_B_A0 102 5 M_B_D Q0
A0 D Q0
M_B_A1 101 7 M_B_D Q1 M_B_BS 1# 4 1 RN 14 C 518 0.1u_X7R _04
M_B_A2 100 A1 D Q1 17 M_B_D Q2 M_B_A0 3 2 4P2RX56_04
M_B_A3 99 A2 D Q2 19 M_B_D Q3
M_B_A4 98 A3 D Q3 4 M_B_D Q4 M_B_A5 4 1 RN 22 C 534 0.1u_X7R _04
A4 D Q4
M_B_A5 97 6 M_B_D Q5 M_B_BS 2# 3 2 4P2RX56_04
M_B_A6 94 A5 D Q5 14 M_B_D Q6
M_B_A7 92 A6 D Q6 16 M_B_D Q7 +1.8V M_B_A4 4 1 RN 16 C 537 0.1u_X7R _04
M_B_A8 93 A7 D Q7 23 M_B_D Q8 JD IMM-1B M_B_A2 3 2 4P2RX56_04
Layout Note: A8 D Q8
M_B_A9 91 25 M_B_D Q9 112 18
M_B_A10 105 A9 D Q9 35 M_B_D Q10 111 V DD 1 VSS 16 24 M_C KE3 4 1 RN 19 C 525 0.1u_X7R _04
Memory clock signal/space: A10/AP DQ 10 V DD 2 VSS 17
M_B_A11 90 37 M_B_D Q11 117 41 M_B_A9 3 2 4P2RX56_04
M_B_A12 89 A11 DQ 11 20 M_B_D Q12 96 V DD 3 VSS 18 53
9 / 4 / 9 => 9 / 5 / 9 A12 DQ 12 V DD 4 VSS 19
M_B_A13 116 22 M_B_D Q13 95 42 M_B_BS 0# 1 4 RN 48 C 538 0.1u_X7R _04
86 A13 DQ 13 36 M_B_D Q14 118 V DD 5 VSS 20 54 M_B_A10 2 3 4P2RX56_04
84 A14 DQ 14 38 M_B_D Q15 81 V DD 6 VSS 21 59
M_B _BS2# 85 A15 DQ 15 43 M_B_D Q16 82 V DD 7 VSS 22 65 M_B_A1 1 4 RN 50 C 216 0.1u_X7R _04
[6] M_B_BS2# A16_BA2 DQ 16 V DD 8 VSS 23
45 M_B_D Q17 87 60 M_B_A3 2 3 4P2RX56_04
M_B _BS0# 107 DQ 17 55 M_B_D Q18 103 V DD 9 VSS 24 66
[6] M_B_BS0# BA0 DQ 18 V DD 10 VSS 25
M_B _BS1# 106 57 M_B_D Q19 88 127 M_O DT2 4 1 RN 10 C 243 0.1u_X7R _04
[6] M_B_BS1# BA1 DQ 19 V DD 11 VSS 26
M_C S2# 110 44 M_B_D Q20 104 139 M_C S2# 3 2 4P2RX56_04
[ 5] M_CS2# S0# DQ 20 V DD 12 VSS 27
[ 5] M_CS3# M_C S3# 115 46 M_B_D Q21 128
M_C LK_D DR 3 30 S1# DQ 21 56 M_B_D Q22 199 VSS 28 145 M_B_A8 4 1 RN 21 C 528 0.1u_X7R _04
[ 5] M_CLK_DD R3 CK 0 DQ 22 +3VS V DD SPD VSS 29
M_C LK_D DR 3# 32 58 M_B_D Q23 165 M_B_A12 3 2 4P2RX56_04
[5] M_C LK_D DR 3# CK 0# DQ 23 VSS 30
Sheet 10 of 41
M_C LK_D DR 2 164 61 M_B_D Q24 C 104 83 171
[ 5] M_CLK_DD R2 M_C LK_D DR 2# 166 CK 1 DQ 24 63 M_B_D Q25 120 N C1 VSS 31 172 M_B_CAS# 1 4 RN 46 C 209 0.1u_X7R _04
[5] M_C LK_D DR 2# CK 1# DQ 25 N C2 VSS 32
M_C KE 2 79 73 M_B_D Q26 0.1u_X7R _04 50 177 M_B_W E# 2 3 4P2RX56_04
[ 5] M_CKE2 CK E0 DQ 26 N C3 VSS 33
R 77 M_C KE 3 80 75 M_B_D Q27 69 187
DDRII SO-DIMM 1
[ 5] M_CKE3 M_B _C AS # 113 CK E1 DQ 27 62 M_B_D Q28 163 N C4 VSS 34 178 M_O DT3 1 4 RN 44 C 195 0.1u_X7R _04
[6] M_B_CAS# CA S# DQ 28 N CTES T VSS 35
10K_04 M_B _R AS # 108 64 M_B_D Q29 190 M_C S3# 2 3 4P2RX56_04
[6] M_B_RAS# RA S# DQ 29 [5] P M_EXTTS1# VSS 36
M_B _W E# 109 74 M_B_D Q30 MVR EF _D IM1 1 9
[6] M_B_W E# SA0_D IM1 WE # DQ 30 V REF VSS 37
198 76 M_B_D Q31 21 M_C KE2 4 1 RN 23 C 180 0.1u_X7R _04
SA1_D IM1 200 SA0 DQ 31 123 M_B_D Q32 C 309 201 VSS 38 33 M_B_A7 3 2 4P2RX56_04
197 SA1 DQ 32 125 M_B_D Q33 202 G ND 0 VSS 39 155
[ 9,14,17,18,22] IC H_SMBC LK 195 SC L DQ 33 135 M_B_D Q34 0.1u_X7R _04 G ND 1 VSS 40 34 M_B_A6 4 1 RN 17 C 232 0.1u_X7R _04
R 76 [ 9,14,17,18,22] IC H_SMBD AT SD A DQ 34 137 M_B_D Q35 VSS 41 132 M_B_A11 3 2 4P2RX56_04
M_O DT2 114 DQ 35 124 M_B_D Q36 47 VSS 42 144
[ 5] M_OD T2 OD T0 DQ 36 V SS1 VSS 43
10K_04 [ 5] M_OD T3 M_O DT3 119 126 M_B_D Q37 133 156
OD T1 DQ 37 V SS2 VSS 44
134 M_B_D Q38 183 168
10 DQ 38 136 M_B_D Q39 77 V SS3 VSS 45 2
[6] M_B _D M0 DM0 DQ 39 V SS4 VSS 46
26 141 M_B_D Q40 12 3 La you t note :
+3V S [6] M_B _D M1 52 DM1 DQ 40 143 M_B_D Q41 48 V SS5 VSS 47 15
[6] M_B _D M2 DM2 DQ 41 V SS6 VSS 48
67 151 M_B_D Q42 184 27 Pl ace one cap close to every 2 pull-up re sistors
[6] M_B _D M3 DM3 DQ 42 V SS7 VSS 49
130 153 M_B_D Q43 78 39
[6] M_B _D M4 147 DM4 DQ 43 140 M_B_D Q44 71 V SS8 VSS 50 149 te rm ina te d to +V TT_M EM
[6] M_B _D M5 DM5 DQ 44 V SS9 VSS 51
170 142 M_B_D Q45 72 161
[6] M_B _D M6 DM6 DQ 45 V SS10 VSS 52
185 152 M_B_D Q46 121 28
[6] M_B _D M7 DM7 DQ 46 V SS11 VSS 53
154 M_B_D Q47 122 40
13 DQ 47 157 M_B_D Q48 196 V SS12 VSS 54 138
[6] M_B_DQS0 DQ S0 DQ 48 V SS13 VSS 55
31 159 M_B_D Q49 193 150 CLOSE TO SO-DIMM_1
[6] M_B_DQS1 DQ S1 DQ 49 V SS14 VSS 56
51 173 M_B_D Q50 8 162
[6] M_B_DQS2 70 DQ S2 DQ 50 175 M_B_D Q51 V SS15 VSS 57
[6] M_B_DQS3 DQ S3 DQ 51
131 158 M_B_D Q52 CA0115-20 0N 02
148 160 M_B_D Q53
[6] M_B_DQS6 169 174 M_B_D Q54 +1.8V R165 1K_1% MVREF_D IM1
188 DQ S6 DQ 54 176 M_B_D Q55
[6] M_B_DQS7 DQ S7 DQ 55 179 M_B_D Q56
11 DQ 56 181 M_B_D Q57 R164 C312 C310
[6] M_B_D QS0# DQ S0# DQ 57
29 189 M_B_D Q58
[6] M_B_D QS1# DQ S1# DQ 58
49 191 M_B_D Q59 1K _1% 1u 0. 1u_X7R_04
[6] M_B_D QS2# 68 DQ S2# DQ 59 180 M_B_D Q60
[6] M_B_D QS3# DQ S3# DQ 60
129 182 M_B_D Q61
[6] M_B_D QS4# DQ S4# DQ 61
146 192 M_B_D Q62
[6] M_B_D QS5# DQ S5# DQ 62
[6] M_B_D QS6# 167 194 M_B_D Q63
186 DQ S6# DQ 63
[6] M_B_D QS7# DQ S7#
C A0115-200N 02
Layout note:
SO-DIMM_1 is placed farther from
the GMCH than SO-DIMM_0
+1.8V [5, 7,9,28]

+1.8V
Layout Note: Layout Note: +3VS [ 2,5,8, 9,11,12,13,1 4, 15, 16, 17, 18,19,20,21,22,24,26 ,27,29,30]
+VTT_MEM [ 9,28]
Co-layout Co-layout
C795 C 286 C 218 C796 C 283 C 191 C 221 C211 C237 C242 C 251 C 273 C166 C253 C 268 C168 C177 C 246
+ + + + +
220u/ 2.5V_B * 220u/ 4V_V *150u/4 V_B 220u/ 2.5V_B * 220u/ 4V_V 10u_08 10u_08 10u_08 10u_08 10u_08 0.1u_X7R _04 0.1u_X7R_04 0.1u_X7 R_04 0.1u_X7R _04 0.1u_X7R_04 0. 1u_X7R_04 0.1u_X7R _04 0.1u_X7R _04
DDRII SO-DIMM 1 B - 11
Schematic Diagrams
PANEL, BRIDGE BATTERY, FAN

PANEL PANEL ID SELECTOR
LV DS-L0N
LV DS-L0N [5]
LV DS-L0P
LV DS-L0P [5] +3V S
LV DS-L1N
PLVD D LV DS-L1N [5]
LV DS-L1P
LV DS-L1P [5]
1
2
3
4
LV DS-L2N
LV DS-L2N [5]
LV DS-L2P RN 41
LV DS-L2P [5]
LV DS-LCLK N 8P 4RX10K_ 04
LV DS-LCLK N [5]
C4 C5 LV DS-LCLK P
LV DS-LCLK P [5 ]
LV DS-U0N
8
7
6
5
LV DS-U 0N [5]
JLCD 0.1 u_0 4 *1 0u_ 08 LV DS-U0P CLC DID2 5 4 RN 40
LV DS-U 0P [5] LC DID2 [14 ]
LV DS-U1N CLC DID1 6 3 8P4 RX1 K_04
1 LV DS-U 1N [5] LC DID1 [14 ]
LV DS-U1P CLC DID0 7 2
2 LV DS-U2N LV DS-U 1P [5] LC DID0 [14 ]
8 1
3 LV DS-U2P LV DS-U 2N [5]
J LCD LV DS-L 0N
4 LV DS-UCLKN LV DS-U 2P [5]
LV DS-L 0P
30 5 LV DS-UCLKP LV DS-U CLK N [ 5]
6 LV DS-U CLK P [ 5] PANEL ID Select Coaxial Cable
LV DS-L 1N
7 LV DS-L 1P
8 TYPE PANEL MODEL JLCD-30(GPIO19) JLCD-29(GPIO36) JLCD-28(GPIO37)
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
9 LV DS-L 2N
10 15" XGA AU B150XG01 0 ( GND ) 0 ( GND ) 0 ( GND )
LV DS-L 2P CP2 CP 3 C P4 CP5
11 *8P4CX1 0p *8P 4CX10p * 8P4C X10 p *8P4 CX10p
12 15" XGA CPT CLAA150XH01 0 ( GND ) 0 ( GND ) 0 ( GND )
LV DS-L CLK N
13 LV DS-L CLK P 15" SXGA+ AU B150PG03 1 ( NC ) 0 ( GND ) 0 ( GND )
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
14
15 LV DS-U 0N
16 12-1001D-0B0 15" SXGA+ CPT CLAA150PB03 1 ( NC ) 0 ( GND ) 0 ( GND )
LV DS-U 0P
17
18 14" WXGA Hydis HT140WX1-100 0 ( GND ) 1 ( NC ) 0 ( GND )
LV DS-U 1N
19 LV DS-U 1P
20 14" WXGA AU B140EW01 0 ( GND ) 1 ( NC ) 0 ( GND )
1 21 LV DS-U 2N
22 Layout Note: 14" WXGA SAMSUNG LTN140W1-L01 0 ( GND ) 1 ( NC ) 0 ( GND )
LV DS-U 2P
23
U42 1. Pin S & pin D
24 LV DS-U CLK N 6 1
Sheet 11 of 41
25 SI3457 D D trace width Min.
LV DS-U CLK P D AO3409
GN D1 26 1 6 5 2
Shi eld1 27 D
P
D
80 mils.
GN D2
Shi eld2 28
CLCDID 2
FAN CONTROL
PANEL, BRIDGE
GN D3 CLCDID 1 3 4 4 3 2. Co-Layout
Shi eld3 29 G S S G
GN D4 CLCDID 0
Shi eld4 30 *SI3 457 DV +V DD5 C6 +VD D5
LVC -C30 SFY GTP *10u _08
BATTERY, FAN
? ? ? ? +VD D3 Q92
2A A O34 09 2A
S D C415
PLV DD
C
C4 10 G C1 0.1u_ 04
R4 R 231 R230
S
0.1u_04 0.1u_04 R23 3 G D 32
100K_ 04 200_1% 200_1% 4.99 K_1% S CS355V
Z1 103 Z 1104 Q43
8
R 235 AO 3409
A
Z 1108 Z11 09 R2 32 10K _1% 3 0 _04 JFA N JFA N
+
D
1 Z110 5 Z110 6 Z1 103 3
1
2
- 2
D
R5 08 C413 1
100K_0 4 U17 A
+ 3
Z111 9 G G GM3 58 100u/6. 3V_B 8 5205 -03001
4
[5] E NAV DD
Q 42 Q41 ? ? ? ?
C 769 B SS1 38 2N70 02
S
[21 ] FA N_ON
0. 1u_X7R_04
[21,40] FAN _SE N
R 237 4 .7K_ 04
+3V H8
C A
D3 3 SCS 355 V
BRIDGE BATTERY
FOR M550N
V SUB VS UB VSU B +5VH 8 +5 VH8
D4 SCS 355V
A C Z1101 R1 6 3K 15-02315-7B1
+VA
Q4 Q1 VS UB+
AO 340 9 S I231 5BD S D2 SCS 551 V R 14 R25 R 22 R 509
R1 2 2K_ 08 Z1 102 S D S D A C +V IN D D_ON [ 21,2 7,28 ,40]
30 0K_1% *137 K_1% * 100K _1% *1 00K _04
G G
D
5
R8
V SUB +5VH 8 +V DD5 10K_ 04 Z 1116 1 Q7
[21, 40] V_SU B
V
Z11 14 + 4 Z 1118 G
R 10 1M Z 1117 3 O *2N7002
-
G
+5 VH8
S
R 15 R1 Z 1113 C C9 R 13 U1
B R24 R 23 *L MV3 31
2
200K _1% 100K_1% 1u 10 0K_1%
E *100 K_1% * 100K _1%
D
Q6 R 510
Z 1110 5 C2 DTC 114EUA
+ 7 Z 1112 G Q3 10 0K_04
Z 1111 6 2N7 002 1 0u_ 12 Z11 15
- Z1 120
S
U17 B R9 Q5 Q93
D
R5 R2 GM3 58 2N7002 2N7 002

100K _04
+3V S [ 2,5,8,9,1 0,12 ,13,14,15 ,16,17,18,19, 20,21,22, 24,2 6,27,29,3 0]
60.4K _1% 100K_1% G G
SUS B# [ 14,1 8,21,22,2 6,27,28, 40] +3V H8 [2,21,22 ,26,27,40]
+5V H8 [21, 23,2 7,40 ]
S
+VD D3 [12 ,27,31]

+VD D5 [27 ,28,29,31 ]
+VA [2 6,27 ]
+VI N [21,26 ,27, 28,29,30 ,31]
VS UB [26]
B - 12 PANEL, BRIDGE BATTERY, FAN

Schematic Diagrams
ICH7-M 1/4, SATA
12/13 R2.0A
X7 X5
C 713 10p *32.768KH z CM130327681220
12/16 R2.0A
1
Layout Note: 2 2 R 443
+VD D5 Co-layout 3 3 10M

U33A
R553 750_1% R 554 560 D 20 S CS 751V R TC_X1 A B1 A A6 LPC _AD 0 LP C_AD [3:0] [ 14,21,40]
4
Z 123 9 Z 1240 A C C 712 10p R TC_X2 A B2 R TXC 1 LA D0 A B5 LPC _AD 1
+R TC VC C R TC X2 LA D1 A C4 LPC _AD 2
R555 R TCR ST# A A3 LA D2 Y6 LPC _AD 3
LPC
R TC RST# LA D3
RTC
D 19 S CS 751V
1.96K_1% Z 1202 A C R 167 200K_1% IN TR UD ER# Y5 A C3 LPC _DR Q0#
IC H_INTVRMEN W4 I NTR UD ER # LD RQ0# A A5 Z 1226
I NTVRMEN (+3VS)LDR Q1#/GPIO23
1
C 314 JOPE N11 Z1203 W1 A B3 LPC _FR AME#
R358 R202 *OPEN _10m il-1MM Z1204 Y1 E E_C S LFR AME# LP C_FR AME# [14,21, 40] R 175 10 K_04
0.1u Z1205 Y2 E E_S HC LK A E22 +3V S
RTC CLEAR E E_D OU T A20GATE H _A20GATE [21]
1K_04 1M Z1206 W3 A H28
2
JCBAT JC BAT E E_D IN A20M# H _A20M# [ 2]
Z 1201 Z1207 V3 A G27 H _C PU SLP_S B#
1 LAN _CLK CP USLP#
R 447 * 10K_04 Z1208 U3 A F24 I CH _DPRSTP# R374 0_04
2 LAN _RS TS YN C TP1/ DP RSTP# H_DPRSTP# [2,29]
1 2 A H25 I CH _DPSLP# R372 0_04
CPU
H_DPSLP # [2]
LAN
TP2/D PSLP#
85205-02 R Z1209 U5
+R TCVCC Z1210 V4 LAN _RXD0 A G26
? ? ? ? LAN _RXD1 F ER R# H_FERR # [ 2]
Z1211 T5
LAN _RXD2
A G24 R 369 56 _04
C 601 Z1212 U7 GPIO49/ CPUPW R GD H _PW RGD [2] R 373 *56_04 +1. 05V S
Z1213 V6 LAN _TXD0 R 375 *56_04
LAN _TXD1
1u Within 2.5inch Z1214 V7 A G22
LAN _TXD2 IGNN E# H _IGNN E# [2]
Sheet 12 of 41
A G21
I NIT3_3V# F WH _IN IT# [14]
R453 39.2_1% Z1234 U1 A F22
[24, 26] AZ _B ITC LK A CZ _BI T_C LK IN IT# H _IN IT# [2]
R199 39.2_1% Z1235 R6 A F25
[24,26] A Z_SYN C R198 39.2_1% Z1236 A CZ _SY NC IN TR H _IN TR [2] R 379 10 K_04
AC-97/AZALIA
[24,26] AZ_RST# +3V S
ICH7-M 1/4, SATA

R200 39.2_1% Z1237 R5 A G23
[24, 26] AZ _S DOUT A CZ _RS T# RC IN# H _RC IN # [ 21]
T2 A H24
[ 24] AZ _S DIN 0 A CZ _SD IN 0 N MI H _NMI [2]
T3 A F23
+3VS +3VS [ 26] AZ _S DIN 1 A CZ _SD IN 1 S MI# H _SMI# [2]
Z 1215 T1 A H22
A CZ _SD IN 2 STPCLK# H _STPC LK# [2]
T4
A CZ _SD OU T A F26 S B_THR MTRIP# R364 24.9_1% PM_THR MTRIP#
THE RMTR IP# PM_THR MTR IP# [2,5]
R387 SATA_LED# AF 18
Q25 S ATA LE D# R368 56_04
+1.05VS
10K_04 G BS S138 SATAR XN 0 C662 3900p Z1216 A F3 A B15 I DE_PD D0 Layout note:
S ATA 0R XN D D0
D1 4 SC S751V SATAR XP0 C652 3900p Z1217 A E3 A E14 I DE_PD D1
SATA_LED# S D Z1238 C A SATATXN0 C702 3900p Z1218 AG2 S ATA 0R XP D D1 A G13 I DE_PD D2
HD _LED # [ 23] S ATA 0TXN D D2
24.9_1% needs to placed within 2" of ICH7,
SATATXP0 C686 3900p Z1219 AH2 A F13 I DE_PD D3 56 Ohm must be placed within 2" of 24.9_1%
S ATA 0TXP D D3
A D14 I DE_PD D4
D1 5 SC S751V Z1220 A F7 D D4 A C13 I DE_PD D5 w/o stub.
C A Z1221 A E7 S ATA 2R XN D D5 A D12 I DE_PD D6
[16] CD _DA SP# S ATA 2R XP D D6
Z1222 AG6 A C12 I DE_PD D7
Z1223 AH6 S ATA 2TXN D D7 A E12 I DE_PD D8
S ATA 2TXP D D8 A F12 I DE_PD D9
D D9
[17] CLK _S ATA# A F1 A B13 I DE_PD D10
A E1 S ATA _C LKN DD 10 A C14 I DE_PD D11
SATA
[ 17] CLK_SATA S ATA _C LKP DD 11 A F14 I DE_PD D12
DD 12
Z1224 AH 10 A H13 I DE_PD D13
+3V S R 408 24.9_1% AG10 S ATA RB IASN DD 13 A H14 I DE_PD D14
S ATA RB IASP DD 14 ID E_PDD [15:0] [16]
Within 500mil A C15 I DE_PD D15
DD 15
R 188 10K_04 I DE_IR Q AF 15 A H17
[16] ID E_PD IOR #
AH 15 D IOR # IDE D A0 A E17
ID E_PDA0 [16]
[16] ID E_PDI OW # D IOW # D A1 ID E_PDA1 [16]
[16] IDE _PD DACK# AF 16 A F17 ID E_PDA2 [16]
R 191 4.7K_04 I DE_PD IOR DY IDE_IR Q AH 16 D DA CK# D A2
[16] I DE_IR Q I DEI RQ
ID E_P DI OR DY AG16 A E16
[16] IDE _PD IORD Y I ORD Y D CS1# ID E_PDC S1# [ 16]
[16] IDE _PD DR EQ AE15 A D16 ID E_PDC S3# [ 16]
D DR EQ D CS3#
IC H7- M
C N1
+R TC VC C
1 +5VS
SATA HDD 2
3
LPC_ AD 0
LPC_ AD 1
JSATA R 207 4 LPC_ AD 2
5
S1 ? ? ? 332K_1% 6
LPC_ AD 3
S2 SA TATXP 0 330K LPC_ DR Q0#
S3 SA TATXN 0 7 LPC_ FR AME#
S4 8
9 PCI RS T# [13,18, 19, 20]
S5 SA TARXN 0 IC H_INTVR MEN
10 INT_SE RIR Q [14,19,21,40]
S6 SA TARXP0
S7 * 87212-10G0
+3VS R 208
P1 Z1229 R182 0_08 *0_04 +3V S

P2
P3 C 350 C3 60
P4 +VDD 5
P5 0.1u_04 10u_08 R 360 KBC_TH RMTRI P# [21,40] +1.05VS [2, 3,4, 7,8,15, 30]
+3VS [2, 5,8,9,10,11,13,14,15,16,17, 18, 19,20,21,22,24,26,27,29,30]
P6
+5VS [15,16,17,20,21, 23, 24,25,26,27]
D
P7 +5VS 47K_04
P8 +VDD 3 [ 11, 27,31]
+R TC VC C [ 15]
P9 Z 1227 G
P10 Q75
C
P11 Z1230 T144 R363 2N 7002

S
P12 C329 C 333 C3 36 C 340 C326 C 337 C316 C372 330

P13 Z1231 + + PM_TH RMTR IP# Z1228 B Q76 C 777
P14 Z1232 0. 1u_04 0.1u_04 0.1u_04 0.1u_04 1u 10u_08 100u/6.3V_B *100u/6.3V_B
P15 Z1233 2N3904 * 0.1u_04
C 16656-12204-L
E
P IN GN D1 ~2 =G ND
ICH7-M 1/4, SATA B - 13

Schematic Diagrams
ICH7-M 2/4, PCI, USB
U 33 D
[22 ] PCIE_R XN 1_W LAN F2 6 V26 D MI _RXN0 [5 ]
PERn 1 DMI0R XN
ICH7 Boot BIOS select [22 ] PCIE_R XP1_W LAN
F2 5 V25
D MI _RXP0 [5]
Direct Media Interface

C 32 5 0 .1u_ 04 PC IE_ TXN1_C E2 8 PERp 1 DMI0R XP U 28
[22 ] PCI E_TXN 1_W LAN C 32 4 0 .1u_ 04 PC IE_ TXP1_ C E2 7 PETn1 DMI0TXN U 27 D MI _TXN0 [5 ]
[22 ] PCI E_TXP1_W LAN PETp1 DMI0TXP D MI _TXP0 [5]
Strap GNT5# RA GNT4# RB
[22 ] PCIE_R XN 2_N EW _C AR D H2 6 Y 26 D MI _RXN1 [5 ]
H2 5 PERn 2 DMI1R XN Y 25
[22 ] PCIE_R XP 2_N EW _C AR D PC IE_ TXN2_C G2 8 PERp 2 DMI1R XP D MI _RXP1 [5]
LPC(default) 11 Unstaff Unstaff [22 ] PCI E_TXN 2_N EW _C AR D
C 32 3 0 .1u_ 04
PC IE_ TXP2_ C G2 7 PETn2 DMI1TXN
W 28
D MI _TXN1 [5 ]
[22 ] PCI E_TXP2_N EW _C AR D C 32 2 0 .1u_ 04 W 27 D MI _TXP1 [5]
PETp2 DMI1TXP
PCI-Express
PCI 10 Unstaff Stuff Z130 1 K2 6 AB2 6
Z130 2 K2 5 PERn 3 DMI2R XN AB2 5 D MI _RXN2 [5 ]
Z130 3 J2 8 PERp 3 DMI2R XP AA2 8 D MI _RXP2 [5]
Z130 4 PETn3 DMI2TXN D MI _TXN2 [5 ]
SPI 01 Stuff Unstaff J2 7
PETp3 DMI2TXP
AA2 7 D MI _TXP2 [5]
Z130 5 M2 6 AD2 5
PERn 4 DMI3R XN D MI _RXN3 [5 ]
Z130 6 M2 5 AD2 4
Z130 7 PERp 4 DMI3R XP D MI _RXP3 [5]
L2 8 AC2 8 D MI _TXN3 [5 ]
Z130 8 L2 7 PETn4 DMI3TXN AC2 7
PCIRST#: LAN,Cardbus AD23:CardBus PETp4 DMI3TXP D MI _TXP3 [5]
PLT_RST#: N/B,IDE,KBC AD27:LAN Z130 9 P2 6 AE2 8 C LK_PC IE_IC H# [17]
Z131 0 P2 5 PERn 5 D MI_ CL KN AE2 7
Z131 1 N2 8 PERp 5 D MI_ CL KP C LK_PC IE_IC H [17]
BUF_PLT_RST#: NEW CARD,MINI CARD PETn5
Z131 2 N2 7 C 25 Z1 326 R169 24 .9_ 1%
PETp5 DMI_Z CO MP +1 .5VS
REQ1#: LAN D 25 Place within 500
D MI_ IR CO MP
Z131 3 T2 5
Z131 4 T2 4 PERn 6 F1
mils of ICH
REQ2#: Cardbus PERp 6 USBP0N U SB_P N0 [16]
Z131 5 R2 8 F2
Z131 6 PETn6 USBP0P U SB_P P0 [16 ]
R2 7 G4
+3VS PETp6 USBP1N G3 U SB_P N1 [16]
USBP1P U SB_P P1 [16 ] USB0: PORT0
+3 VS INTA#: CardBus SPI_ SC LK R 2 H1
SPI_ CE# P6 SPI_C LK USBP2N U SB_P N2 [22] USB1: PORT1
R 48 8 *10 K_ 04 H2 U SB_P P2 [22 ]
8 1 PC I_PER R# Z131 9 P1 SPI_C S# USBP2P J4
INTB#: CardBus,LAN U SB_P N3 [25] USB2: PORT2
SPI
Sheet 13 of 41
R N3 1 7 2 PC I_SER R# SPI_A RB USBP3N J3
8 P4R X1 0K_04 6 3 PC I_R EQ 1# R 48 9 *10 K_ 04 SPI_ SI P5 USBP3P K1 U SB_P P3 [25 ]
INTC#: CardBus SPI_MOSI USBP4N U SB_P N4 [26] USB3: PORT3
5 4 PC I_R EQ 2# R 49 0 *10 K_ 04 SPI_ SO P2 K2
USB
8 1 PC I_I NTF# SPI_MISO USBP4P L4 U SB_P P4 [26 ] USB4: Bluetooth
INTD#: CardBus
ICH7-M 2/4, PCI, R N3 3 7 2 PC I_I NTG# D3 USBP5N L5 U SB_P N5 [22]
[1 6] USB_OC 0# OC 0# USBP5P U SB_P P5 [22 ] USB5: NEW CARD
8 P4R X1 0K_04 6 3 PC I_I NTE# [1 6] USB_OC 1# R 515 C4 M1 U SB_P N6 [26]
5 4 PC I_STO P# 10 K_ 04 Z133 9 D5 OC 1# USBP6N M2 USB6: CCD
8 1 PC I_I NTA# +3 V D4 OC 2# USBP6P N4 U SB_P P6 [26 ]
USB R N3 6
8 P4R X1 0K_04
7
6
5
2
3
4
PC I_I NTC#
PC I_I NTB#
PC I_LOC K#
[2 5] USB_OC 3#5
+3 V
6
7
4
3
2
Z132 2
Z132 3
Z132 4
E5
C3
A2
OC 3#
OC 4#
OC 5# /GPIO29 ( +3V)
USBP7N
USBP7P
N3
D2
U SB_P N7
U SB_P P7
[26]
[26 ]
USB7: Docking
1 8 PC I_F RAME# 8 1 Z132 5 B3 OC 6# /GPIO30 ( +3V) USBR BIAS# D1 Z1 327 R 450 2 2.6 _1%
R N3 2 2 7 PC I_TRD Y# OC 7# /GPIO31 ( +3V) U SBR BI AS
8 P4R X1 0K_04 3 6 PC I_R EQ 3# R N3 5 I CH 7-M Place within 500
4 5 PC I_R EQ 0# 8P4RX10K_0 4 mils of ICH
8 1 PC I_D EVSEL# R 461 *0 _0 4
R N3 4 7 2 PC I_R EQ 5# [22 ] U SB_O C5 #
8 P4R X1 0K_04 6 3 PC I_I RD Y#
5 4 PC I_I NTD#
R1 93 10 K_04 PC I_I NTH#

R1 92 10 K_04 PC I_R EQ 4#
[ 18, 19] PC I_AD [31: 0] U3 3B

PC I_AD0 E18 D7 PC I_R EQ 0#
PC I_AD1 C 18 A D0 R EQ 0# E7 Z1 333
PC I_AD2 A16 A D1 PCI GNT0# C 16 PC I_R EQ 1#
PC I_AD3 F 18 A D2 R EQ 1# D 16 PCI _REQ1 # [18 ] F WH _TBL# [1 4]
A D3 GNT1# PCI _GN T1 # [18]
PC I_AD4 E16 C 17 PC I_R EQ 2# PCI _REQ2 # [19 ]
PC I_AD5 A18 A D4 R EQ 2# D 17 R186
A D5 GNT2# PCI _GN T2 # [19] RB
+3 V PC I_AD6 E17 E13 PC I_R EQ 3#
C6 21 0. 1u_ 04 PC I_AD7 A17 A D6 R EQ 3# F 13 Z1 334 *1K _04
PC I_AD8 A15 A D7 GNT3# A13 PC I_R EQ 4#
U 30A PC I_AD9 C 14 A D8 (+3 VS)REQ4 #/GPIO 22 A14
14
74 LVC0 8 PC I_AD10 E14 A D9 (+3 VS)GN T4#/GPIO 48 C8 PC I_R EQ 5#

P LT_ RST# 1 PC I_AD11 D 14 A D10 (+5 VS) G PIO1/R EQ 5# D8 PCI_ GN T5 #
A D11 (+3 VS)GPIO 17/GNT5#
3 BU F_ PLT_R ST# [2 2] PC I_AD12 B12
2 PC I_AD13 C 13 A D12 B15
PC I_AD14 G15 A D13 C /BE0# C 12 PCI _C/ BE0# [18 ,19 ] R201
A D14 C /BE1# PCI _C/ BE1# [18 ,19 ] RA
R 365 PC I_AD15 G13 D 12 PCI _C/ BE2# [18 ,19 ]
PC I_AD16 E12 A D15 C /BE2# C 15 *1K _04
7
100K _04 PC I_AD17 C 11 A D16 C /BE3# PCI _C/ BE3# [18 ,19 ]
PC I_AD18 D 11 A D17 A7 PC I_I RD Y#
A D18 I RD Y# PCI _IR DY # [18, 19]
PC I_AD19 A11 E10 PCI _PAR [18,19 ]
PC I_AD20 A10 A D19 P AR B18 PC I_R ST#
PC I_AD21 F 11 A D20 PC IRST# A12 PC I_D EVSEL#
PC I_AD22 F 10 A D21 DEVSEL# C9 PC I_PER R# PCI _DEVSEL # [ 18, 19]
A D22 PER R# PCI _PERR # [18,19]
PC I_AD23 E9 E11 PC I_L OC K#
PC I_ RST# R 356 0_ 04 PC I_AD24 D9 A D23 PL OC K# B10 PC I_SER R#
A D24 SER R# PCI _SERR # [18,19]
PC I_AD25 B9 F 15 PC I_STO P# PCI _STOP# [18, 19]
PC I_AD26 A8 A D25 STOP# F 14 PC I_TRD Y #
PL T_ RST# A D26 TRD Y# PCI _TR DY # [18,19]
R 359 *0 _04 PC I_AD27 A6 F 16 PC I_F RAME#
PC IRST# [12 ,18 ,19,20 ] PC I_AD28 C7 A D27 FR AME# PCI _FR AME# [1 8,1 9]
PC I_AD29 B6 A D28 C 26 PL T_R ST#
Intel ? ? M660N ? ? PC I_AD30 E6 A D29 PLTRST# A9 PC LK_IC H
PLT_RST# [5 ,14 ,16,21 ]
A D30 PCIC LK PCL K_ ICH [1 7]
PC I_AD31 D6 B19
A D31 PME# PCI _PME# [18,1 9,2 1,4 0]
PCI _IN TA# A3

Interrupt I/F G8 PC I_I NTE#
PC LK_IC H R 197 *R Z 1338 C 375 *C [19] PC I_IN TA# PCI _IN TB# B4 P IRQ A# (+5VS)GPIO 2/PIRQE# F7 PC I_I NTF#
[1 8,19] PC I_IN TB# PCI _IN TC# C5 P IRQ B# (+5VS)GPIO 3/PIRQF# F8 PC I_I NTG#
[19] PC I_IN TC # PCI _IN TD# B5 P IRQ C # (+5VS)GPIO4/PI RQ G# G7 PC I_I NTH#
[19] PC I_IN TD # P IRQ D # (+5VS)GPIO5/PI RQ H#
+3VS Z1 328 AE5

MISC AE9 Z1 335
R SVD[1 ] RSVD [6] +1 .5VS [ 3,5 ,8,15,2 2,2 8]
U 44 Z1 329 AD5 AG8 Z1 336
Z 134 2 SPI_ SI Z1 330 R SVD[2 ] RSVD [7] Z1 337 +3 V [ 14, 15, 16,1 8,2 2,26,2 7,2 8,3 0]
8 5 R 539 *47 AG4 AH8 +3 VS [2, 5,8 ,9,10,1 1,1 2,1 4,15,1 6,17 ,18,19 ,20 ,21 ,22,24 ,26 ,27 ,29, 30]
VDD SI 2 Z 134 3 R 540 *47 SPI_ SO Z1 331 AH4 R SVD[3 ] RSVD [8] F 21 RSVD 9
SO 1 SPI_ CE# Z1 332 AD9 R SVD[4 ] RSVD [9] AH2 0
C E# R SVD[5 ] MCH _SYN C# MCH _I CH _SY NC # [5]
6 Z 134 4 R 541 *47 SPI_ SC LK
R5 42 * 3.3K Z 13 40 3 SCK IC H7 -M
W P# C7 78 C7 79 C780 C78 1
*33 PF *33 PF *33 PF *33PF

R5 43 * 3.3K Z 13 41 7 4
H OLD# VSS
*SPI
B - 14 ICH7-M 2/4, PCI, USB

Schematic Diagrams
ICH7-M 3/4, FWH
+3V
U33 C
R 174 2.2 K_0 4 ICH _SMBCL K ICH _SMBCLK C 22 AF19 Z 1404 R1 90 10K _04
[9,10,17, 18,22] I CH_SMB CLK SMBCL K ( +3VS )GP IO21 /SATA0G P
R 180 2.2 K_0 4 ICH _SMBDA T ICH _SMBDA T B 22 AH1 8
SMB
[9,10,17, 18,22] I CH_SMB DAT SMBDA TA ( +3VS )GP IO19 /SATA1G P LCDI D0 [11]
R 179 10K_04 PCI E_W AKE # LIN K_A LER T# A 26 AH1 9
SATA
GPIO
LIN KALERT# ( +3VS )GP IO36 /SATA2G P LCDI D1 [11]
SMB_LI NK0 B 25 AE19
SMLIN K0 ( +3VS )GP IO37 /SATA3G P LCDI D2 [11]
SMB_LI NK1 A 25
8 1 SB_ SUS STA T# SMLIN K1 AC1 C LK_ICH 14
C LK1 4 C LK_ ICH 14 [ 17]
R N26 7 2 PM_ RI# PM_RI# A 28 B2 C LK_ICH 48
C lock s
RI # C LK4 8 C LK_ ICH 48 [ 17]
8P 4RX10K _04 6 3 SMB _LIN K1
5 4 LINK _AL ERT# A 19 C20 Z 1405 Layout note:
[24 ] IC H_S PKR SP KR SU SCL K
SB_SUS STA T# A 27
R 178 10K_04 PM_ SY S RST# PM_SY S RS T# A 22 SU S_S TAT# B24 I CH_ SUS B#
SY S_R ST# SL P_S3 #
It"s for internal testing
D23 I CH_ SUS C# purposes only
8 1 ICH _SU SB# AB 18 SL P_S4 # F22 S LP_ S5#
[5] P M_B MBU SY # GP IO0 /BM_ BUS Y # ( +3VS ) SL P_S5 #
R N27 7 2 SMB _LIN K0
8P 4RX10K _04 6 3 SB_ SWI # SB_SW I# B 23 AA4 S B_P WROK R 487 *1 00K _04
[2 1] S B_S WI# GP IO1 1/SMBAL ERT# (+3V) PW RO K
5 4 SB_ SMI#
Power MGT
PM_STP PCI # AC 20 AC2 2 Z 1434 R512 0_0 4
[ 17] PM_ STPP CI# GP IO1 8/STPPC I# (+3VS ) GPIO1 6/DP RS LPVR P M_D PRS LPVR [5 ,29]
R 517 10K_04 PM_STP CPU # AF 21 ( +3V S)
GPIO
[17] P M_S TPC PU# GP IO2 0/STPCP U# (+3VS ) C21 S B_B ATLOW# R1 81 10K _04
SYS
TP0/ BATLOW # +3V
+3VS Z14 01 A 21
GP IO2 6 (+3 V) C23 P WR BTN # R5 52 10K _04
PWR BTN # +3V 12/15 R2.0A
R 448 *10K_04 SB_ MUTE Z14 02 B 21
GP IO2 7 (+3 V) P WR BTN # [2 1]
Z14 03 E 23
8 1 PM_ STP PCI# GP IO2 8 (+3 V) C19 Z 1406 R183 10K _04
R N30 7 2 INS TAN T_ON PM_CLK RU N# AG 18 L AN_RST#
[19, 21,40] P M_C LKR UN# GP IO3 2/CLKRU N# ( +3VS )
8P 4RX10K _04 6 3 SB_ SCI# Y4 Z 1407 R446 100 _04
RSMRST# P M_R SMR ST# [21, 40]
5 4 INS TAN T_O N AC 19
[21] IN STA NT_ ON GP IO3 3/AZ _DOCK_ EN# (+3V S)
1 8 INT_ SER IRQ S B_MUTE R 518 *0_ 04 Z143 5 U2 E20 Z 1408 R4 57 10K_04
[25] SB _MU TE GP IO3 4/AZ _DOCK_ RST#(+3V S) (+3 V) GPIO9
R N28 2 7 PM_ THR M# A20 Z 1409
(+3 V) G PIO1 0
8P 4RX10K _04 3 6 PM_ STP CPU # PC IE_W AKE # F 20 F19 Z 1410
[22] P CIE _WA KE# WA KE# (+3 V) G PIO1 2
4 5 PM_ CLK RUN # INT_SE RIRQ AH 21 E19 Z 1411
[1 2,19 ,21, 40] INT_ SER IRQ SE RIR Q (+3 V) G PIO1 3
PM_THR M# AF 20 R4 Z 1412
[2] PM_TH RM# TH RM# (+3 V) G PIO1 4
R 528 100K_0 4 SB_ ALIE N_D ET# E22 Z 1413
Sheet 14 of 41
(+3 V) G PIO1 5
AD 22 R3 Z 1414
[26] V RM_ PWR GD VR MPW RG D (+3 V) G PIO2 4
D20 Z 1415 R519 0_0 4 SB _MU TE
(+3 V) G PIO2 5
FLA SH# AC 21 AD2 1 Z 1416
[22] FLA SH# GP IO6 (+3V S) (+3V S) G PIO3 5
SB_SCI # AC 18 AD2 0 S B_A LIEN _DE T#
ICH7-M 3/4, FWH

[ 21] SB_S CI#
SB_SMI # E 21 GP IO7 (+3V S) GPIO (+3V S) G PIO3 8 AE20 F WH _WP #
S B_A LIEN _DE T# [17]
[ 21] SB_S MI# GP IO8 (+3V ) (+3V S) G PIO3 9
ICH 7-M
+3 V
U30B
14
74LV C08
PM_RS MRS T# 4
6
SUS B# [11,18,21 ,22,26,27 ,28, 40]
IC H_SU SB# 5
R 152
7
*1 00K _04
FWH +3V S
C403 0.1u_04
+3 V
+3V S
5
U1 4
U30C FL ASH # 1
14
74LV C08 4 FW H-W P#

PM_RS MRS T# 9 FW H_W P# 2 C75 5 C397 C 398 C756
8
SUS C# [21,4 0]
IC H_SU SC # 10 74A HC 1G32 0.1u_04 0.1u_04 0. 1u_0 4 0.1 u_04
+3V S
3
JBIOS
7
1 32
VP P VCC PCL K_F WH [17]
R224 100 _04 Z1421 2 31
[ 5,13,16,2 1] P LT_ RST# RS T# CL K
5 4 Z1422 3 30 Z14 27 R481 10K _04
+3 V R N38 6 3 Z1423 4 FGPI3 F GPI 4 29 Z14 28 R482 10K _04
8 P4R X10K _04 7 2 Z1424 5 FGPI2 IC 28
8 1 Z1425 6 FGPI1 GND A 27
U30D FW H-W P# 7 FGPI0 V CC A 26
14
74LV C08 R209 100 _04 Z1426 8 WP # GND 25

[13 ] FW H_ TBL# TB L# VCC
P M_P WROK 12 9 24
ID3 INIT# FW H_IN IT# [12]
11 Z14 20 R 398 0_04 SB _PW ROK 10 23
ID2 F WH 4 LPC _FR AME # [12,21 ,40]
13 11 22 Z14 29
[5,2 6,29] DE LAY _PW RGD ID1 RFU
12 21 Z14 30
R40 5 13 ID0 RFU 20 Z14 31
[12 ,21,40] L PC_ AD0 FW H0 RFU
14 19 Z14 32
7
[12 ,21,40] L PC_ AD1 FW H1 RFU

10K _1% 15 18 Z14 33
[12 ,21,40] L PC_ AD2 FW H2 RFU
16 17
GN D F WH 3 LPC _AD 3 [1 2,21 ,40]
K29 9003 2-T0 1R-T
SOCKET PLCC32
? ? ? ?
POWER OK
+3VS +3 V [ 13,1 5,16, 18,2 2,26,27,2 8,30]
U32
+3 VS [2,5 ,8,9, 10,11,12 ,13,15,16 ,17,18,19 ,20, 21,22,24, 26,27,29 ,30]
2 P M_P WR OK
RST# P M_P WR OK [26,2 9]
3
VC C
1
GN D R3 95 CLK_IC H14 R 452 *R Z1418 C 724 *C
C 628 G69 0L29 3T73
(IMP809) 10 0K_ 04 CLK_IC H48 R 449 *R Z1419 C 722 *C
0 .1u_ 04
ICH7-M 3/4, FWH B - 15

Schematic Diagrams
ICH7-M 4/4
+5VS +5 VS +5VS +5VS +5VS +5VS +5 VS +5VS +5VS +5VS +5VS +5VS +3V +3V +3 V +3V +3V +3V +3V U3 3E
A4 P28
A23 VSS[1] VSS[ 98] R1
C 417 C 661 C37 3 C2 10 C13 C3 C 61 C60 C2 70 C 414 C 408 C407 C165 C3 88 C 114 C 62 C97 C416 C3 41 B1 VSS[2] VSS[ 99] R 11
B8 VSS[3] VSS[100] R 12
Layout note: Layout note: VSS[4] VSS[101]
0.1u_ 04 0 .1u_04 0.1u_04 0.1u_0 4 0. 1u_04 0.1u_ 04 0 .1u _04 0.1u_04 0.1u_0 4 0. 1u_04 0.1u_04 0.1u _04 0.1u_04 0.1u_0 4 0. 1u_04 0.1u_04 0.1u _04 0.1 u_04 0. 1u_0 4 B11 R 13
B14 VSS[5] VSS[102] R 14
Place within 100 mils Place within 100 mils VSS[6] VSS[103]
B17 R 15
of pin AD17 of ICH7 of pin F6 of ICH7 on B20 VSS[7] VSS[104] R 16
on the bottom side or the bottom side of B26 VSS[8] VSS[105] R 17
U 33F +1.0 5VS +1. 05VS +1.05VS B28 VSS[9] VSS[106] R 18
140 mils on the top 140mils on the top VSS[10] VSS[107]
G10 L11 +1.05VS C2 T6
side V5R EF [1] Vcc 1_05[1] L12 C6 VSS[11] VSS[108] T12
VC C5R EF AD17 Vcc 1_05[2] L14 C 371 C3 61 C3 74 C27 VSS[12] VSS[109] T13
+5VS V5R EF [2] Vcc 1_05[3] L16
+
C 354 C355 C362 D10 VSS[13] VSS[110] T14
V5R EF _SU S F6 Vcc 1_05[4] L17 0. 1u_04 1u _X7R 100u/6 .3V_B D13 VSS[14] VSS[111] T15
V5R EF _Sus Vcc 1_05[5] L18 0.1u_04 0.1u _04 1u D18 VSS[15] VSS[112] T16
Vcc 1_05[6] VSS[16] VSS[113]
A
AA22 M11 D21 T17
D24 AA23 Vcc 1_5_B[ 1] Vcc 1_05[7] M18 D24 VSS[17] VSS[114] U4
+3 VS +5V +3V Vcc 1_5_B[ 2] Vcc 1_05[8] Layout note: VSS[18] VSS[115]
AB22 P11 E1 U 12
CORE
SCS751V AB23 Vcc 1_5_B[ 3] Vcc 1_05[9] P18 E2 VSS[19] VSS[116] U 13
Vcc 1_5_B[ 4] Vcc1 _05[10] Place at MCH edge VSS[20] VSS[117]
AC23 T11 E4 U 14
Vcc 1_5_B[ 5] Vcc1 _05[11] VSS[21] VSS[118]
A
Z1 501 AC24 T18 E8 U 15
C
D 47 R 451 D 48 AC25 Vcc 1_5_B[ 6] Vcc1 _05[12] U 11 E15 VSS[22] VSS[119] U 16
R18 7 AC26 Vcc 1_5_B[ 7] Vcc1 _05[13] U 18 +3VS F3 VSS[23] VSS[120] U 17
SCS751V 10 SCS751V AD26 Vcc 1_5_B[ 8] Vcc1 _05[14] V11 C3 94 F4 VSS[24] VSS[121] U 24
100_ 04 AD27 Vcc 1_5_B[ 9] Vcc1 _05[15] V12 F5 VSS[25] VSS[122] U 25
Vcc 1_5_B[ 10] Vcc1 _05[16] Layout note: VSS[26] VSS[123]
AD28 V14 0.1u_0 4 F12 U 26
C
VC C5 REF V5 REF _SU S D26 Vcc 1_5_B[ 11] Vcc1 _05[17] V16 F27 VSS[27] VSS[124] V2
Vcc 1_5_B[ 12] Vcc1 _05[18] Place on secondary VSS[28] VSS[125]
D27 V17 side under MCH F28 V13
C63 7 C 359 C 396 C 715 D28 Vcc 1_5_B[ 13] Vcc1 _05[19] V18 G1 VSS[29] VSS[126] V15
E2 4 Vcc 1_5_B[ 14] VCC PAU X Vcc1 _05[20] G2 VSS[30] VSS[127] V24
1u 0 .1u_04 1u 0 .1u_ 04 E2 5 Vcc 1_5_B[ 15] V5 G5 VSS[31] VSS[128] V27
E2 6 Vcc 1_5_B[ 16] Vcc Sus 3_3 /Vcc LAN3_3[1] V1 +3VS G6 VSS[32] VSS[129] V28
Vcc 1_5_B[ 17] Vcc Sus 3_3 /Vcc LAN3_3[2] Layout note: VSS[33] VSS[130]
F2 3 W2 C3 30 G9 W6
F2 4 Vcc 1_5_B[ 18] Vcc Sus 3_3 /Vcc LAN3_3[3] W7 G14 VSS[34] VSS[131] W 24
Vcc 1_5_B[ 19] Vcc Sus 3_3 /Vcc LAN3_3[4]
Place within 100 mils VSS[35] VSS[132]
G22 0.1u_0 4 G18 W 25
G23 Vcc 1_5_B[ 20] U6
of ICH7 on the bottom G21 VSS[36] VSS[133] W 26
H22 Vcc 1_5_B[ 21] Vcc3_ 3/VccH DA side of 140mils on G24 VSS[37] VSS[134] Y3
Sheet 15 of 41 +1.5VS_PCIE_IC H
H23
J22
J23
Vcc 1_5_B[ 22]
Vcc 1_5_B[ 23] Vc cSus3_ 3/VccSusH DA
Vcc 1_5_B[ 24]
Vcc 1_5_B[ 25] V_CPU_IO[1]
R7
AE2 3
+3V the top
+1.05VS
G25
G26
H3
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
Y 24
Y 27
Y 28
ICH7-M 4/4
K2 2 AE2 6 H4 AA1
L 23 0_12 K2 3 Vcc 1_5_B[ 26] V_CPU_IO[2] AH26 C 338 C3 35 C3 34 H5 VSS[42] VSS[139] AA24
+1.5VS
VCCA3G P
L22 Vcc 1_5_B[ 27] V_CPU_IO[3] H24 VSS[43] VSS[140] AA25
C346 C 343 C 344 C342 L23 Vcc 1_5_B[ 28] AA7 0. 1u_04 0.1u_0 4 1u H27 VSS[44] VSS[141] AA26
+
M22 Vcc 1_5_B[ 29] Vc c3_3[3] AB1 2 H28 VSS[45] VSS[142] AB4
100 u/6.3V_ B 0 .1u_ 04 0. 1u_04 0. 1u_04 M23 Vcc 1_5_B[ 30] Vc c3_3[4] AB2 0 J1 VSS[46] VSS[143] AB6
Vcc 1_5_B[ 31] Vc c3_3[5]
12/05 R2.0A VSS[47] VSS[144]
N22 AC16 J2 AB11
N23 Vcc 1_5_B[ 32] Vc c3_3[6] AD13 J5 VSS[48] VSS[145] AB14
Layout note: Vcc 1_5_B[ 33] Vc c3_3[7] +3VS VSS[49] VSS[146]
P2 2
I DE
AD18 Layout note: J24 AB16
P2 3 Vcc 1_5_B[ 34] Vc c3_3[8] AG12 C 363 C7 99 J25 VSS[50] VSS[147] AB19
Place above Caps within 100 mils of ICH on the bottom Vcc 1_5_B[ 35] Vc c3_3[9] VSS[51] VSS[148]
side or 140 mils on the top near D28, T28, AD28 R22 AG15 Place within 100 mils J26 AB21
R23 Vcc 1_5_B[ 36] Vcc 3_3[10] AG19 0. 1u_04 10 u_08 K24 VSS[52] VSS[149] AB24
R24 Vcc 1_5_B[ 37] Vcc 3_3[11] of ICH7 on the bottom K27 VSS[53] VSS[150] AB27
R25 Vcc 1_5_B[ 38] A5 side of 140mils on K28 VSS[54] VSS[151] AB28
Vcc 1_5_B[ 39] Vcc 3_3[12]
CLOSE TO C363 VSS[55] VSS[152]
R26 B13 the top L13 AC2
+3VS T22 Vcc 1_5_B[ 40] Vcc 3_3[13] B16 L15 VSS[56] VSS[153] AC5
T23 Vcc 1_5_B[ 41] Vcc 3_3[14] B7 L24 VSS[57] VSS[154] AC9
L 37 HC B1608KF-121T25 T26 Vcc 1_5_B[ 42] Vcc 3_3[15] C 10 L25 VSS[58] VSS[155] AC11
+1. 5VS Vcc 1_5_B[ 43] Vcc 3_3[16] +3VS VSS[59] VSS[156]
PCI
T27 D 15 L26 AD1
C60 4 C 611 C368 T28 Vcc 1_5_B[ 44] Vcc 3_3[17] F9 C 358 C3 64 C3 53 M3 VSS[60] VSS[157] AD3
Vcc 1_5_B[ 45] Vcc 3_3[18] Layout note: VSS[61] VSS[158]
U22 G11 M4 AD4
10u _08 0.01u _04 0. 1u_04 U23 Vcc 1_5_B[ 46] Vcc 3_3[19] G12 0. 1u_04 0.1u_0 4 0.1u_0 4 M5 VSS[62] VSS[159] AD7
Vcc 1_5_B[ 47] Vcc 3_3[20] Distribute in PCI section VSS[63] VSS[160]
V2 2 G16 M12 AD8
V2 3 Vcc 1_5_B[ 48] Vcc 3_3[21] M13 VSS[64] VSS[161] AD11
Layout note: Vcc 1_5_B[ 49] VSS[65] VSS[162]
W22 W5 M14 AD15
W23 Vcc 1_5_B[ 50] VccR TC M15 VSS[66] VSS[163] AD19
Place within 100mils of ICH on the Vcc 1_5_B[ 51] +R TC VC C VSS[67] VSS[164]
bottom side or 140 mils on the top Y22 P7 M16 AD23
Y23 Vcc 1_5_B[ 52] Vc cSu s3_3[1] C 317 C3 91 C 800 M17 VSS[68] VSS[165] AE2
Vcc 1_5_B[ 53] A24 CLOSE TO pin W5 M24 VSS[69] VSS[166] AE4
B2 7 Vc cSu s3_3[2] C 24 0. 1u_04 0.1u_0 4 10u_ 08 M27 VSS[70] VSS[167] AE8
Vcc 3_3[1] Vc cSu s3_3[3] D 19 M28 VSS[71] VSS[168] AE11
L44 Z1502 AG28 Vc cSu s3_3[4] D 22 12/14 R2.0A N1 VSS[72] VSS[169] AE13
H CB201 2KF -50 0T40 Vcc DMIPLL Vc cSu s3_3[5] G19 N2 VSS[73] VSS[170] AE18
AB7 Vc cSu s3_3[6] +3 V N5 VSS[74] VSS[171] AE21
+1 .5VS +1. 5VS AC 6 Vcc 1_5_A[ 1] K3 C 392 C3 52 N6 VSS[75] VSS[172] AE24
C71 7 C393 C668 AC 7 Vcc 1_5_A[ 2] Vc cSu s3_3[7] K4 N11 VSS[76] VSS[173] AE25
Layout note: Layout note: Vcc 1_5_A[ 3] Vc cSu s3_3[8] VSS[77] VSS[174]
AD 6 K5 0. 1u_04 0.1u_0 4 N12 AF2
10u_ 08 0.1 u_04 0. 1u_04 AE6 Vcc 1_5_A[ 4] Vc cSu s3_3[9] VSS[78] VSS[175]
ARX
Place within 100mils Place within 100mils of ICH K6 N13 AF4
AF 5 Vcc 1_5_A[ 5] Vcc Sus 3_3[10] L1 N14 VSS[79] VSS[176] AF8
of ICH on the bottom on the bottom side or 140 AF 6 Vcc 1_5_A[ 6] Vcc Sus 3_3[11] L2 N15 VSS[80] VSS[177] AF11
mils on the top near pin AG5 AG 5 Vcc 1_5_A[ 7] Vcc Sus 3_3[12] +3 V VSS[81] VSS[178]
USB
side or 140 mils on L3 N16 AF27
AH 5 Vcc 1_5_A[ 8] Vcc Sus 3_3[13] L6 C 389 C3 87 N17 VSS[82] VSS[179] AF28
the top Vcc 1_5_A[ 9] Vcc Sus 3_3[14] VSS[83] VSS[180]
L7 N18 AG1
Z1503 AD 2 Vcc Sus 3_3[15] M6 0. 1u_04 0.1u_0 4 N24 VSS[84] VSS[181] AG3
Vcc SATAPLL Vcc Sus 3_3[16] +1.0 5VS [2,3,4,7,8,12, 30] VSS[85] VSS[182]
M7 +1.5 VS [3,5 ,8,1 3,22,28] N25 AG7
AH11 Vcc Sus 3_3[17] N7 N26 VSS[86] VSS[183] AG11
+3VS Vcc 3_3[2] Vcc Sus 3_3[18] +3V [13,14,16, 18,2 2,2 6,27,28,30] P3 VSS[87] VSS[184] AG14
+3VS [2 ,5,8 ,9,1 0,11,12,13 ,14, 16,1 7,18,19,20,21, 22,2 4,2 6,27,29,30] VSS[88] VSS[185]
Layout note: C383 +1. 5VS AB10 AB1 7 +1. 5VS +5V [26,27,28, 29,3 0] P4 AG17
AB9 Vcc 1_5_A[ 10] Vc c1_5_A[19] AC17 P12 VSS[89] VSS[186] AG20
0.1 u_04 C676 AC10 Vcc 1_5_A[ 11] Vc c1_5_A[20] +5VS [1 2,16,17,20,21, 23,2 4,2 5,26,27] P13 VSS[90] VSS[187] AG25
Place within 100mils of Layout note: Vcc 1_5_A[ 12] +RTCVC C [12] VSS[91] VSS[188]
ICH on the bottom side or AD10 T7 +1. 5VS P14 AH1
Place within 100mils of ICH 1u_X7R AE10 Vcc 1_5_A[ 13] Vc c1_5_A[21] F 17 P15 VSS[92] VSS[189] AH3
140 mils on the top AF10 Vcc 1_5_A[ 14] Vc c1_5_A[22] +1. 5VS VSS[93] VSS[190]
ATX
on the bottom side or 140 G17 P16 AH7
AF 9 Vcc 1_5_A[ 15] Vc c1_5_A[23] P17 VSS[94] VSS[191] AH12
mils on the top near pin AG9 AG 9 Vcc 1_5_A[ 16] AB8 P24 VSS[95] VSS[192] AH23
AH 9 Vcc 1_5_A[ 17] Vc c1_5_A[24] AC8 +1.5 VS P27 VSS[96] VSS[193] AH27
Vcc 1_5_A[ 18] Vc c1_5_A[25] C3 95 VSS[97] VSS[194]
E3 K7 Z 1506 IC H7- M
+3V Vcc Sus 3_3[19] Vcc Sus 1_05[1] 0.1u_0 4
C1 C 28 Z 1507
C 339 +1.5VS Vcc USBPLL Vcc Sus 1_05[2] G20 Z 1508
C 35 7 Z1504 AA2 Vcc Sus 1_05[3]
0 .1u_04 Z1505 Y7 Vcc Sus 1_05/VccLAN1 _05[1] A1
Vc c1_5_A[26]
Vcc Sus 1_05/VccLAN1 _05[2] +1.5 VS Layout note:
0 .1u_04 H6
Vc c1_5_A[27] H7 C 390
USB CO RE
Vc c1_5_A[28] Place within 100 mils
J6
Vc c1_5_A[29] J7 0. 1u_04 of ICH7 on the bottom
Vc c1_5_A[30] side of 140mils on
I CH7-M the top
B - 16 ICH7-M 4/4
Schematic Diagrams
CD-ROM, PC-BEEP, USB2.0*2
ID E_PDD [15:0]
[12] I DE_PD D[15:0]
CD-ROM JC D USB 2.0
[24] C D_L 1 2 CD _R [24]
[24] CD _G C D_RESET# 3 4 IDE_PDD8
I DE_PD D7 5 6 IDE_PDD9
7 8
I DE_PD D6 IDE_PDD10
I DE_PD D4 11 12 IDE_PDD12 +5VS
13 14
I DE_PD D3 IDE_PDD13
I DE_PD D0 19 20 C66 U3
21 22 ID E_PDD REQ [ 12]
4 3
23 24 ID E_PDIOR# [12] 1u VI N V IN
[12] ID E_PDIO W# 25 26
2
[12] I DE_PD IOR DY 27 28 ID E_PDD ACK# [12] GND
Z1601
[12] ID E_IRQ 29 30 IDE_PDDI AG# 5 1
[12] IDE_PD A1 31 32 +VCC US B0 VO UT VO UT +VC CU SB1
[12] IDE_PD A0 33 34 ID E_PDA2 [12] C53 C56 RT9701CP L C 85 C 91
[12] ID E_PDC S1# 35 36 ID E_PDC S3# [12]
[12] C D_DA SP# 37 38 ? ? ? ?
0.1u_04 10u_08 10u_08 0. 1u_04
39 40
41 42
43 44
C D_CABSE L 45 46
47 48
Z 1611 Z 1610
49 50
C 12434-15A1
PIN GND1~GND2=GND
+5V S
5
U2
VP NC
1 Sheet 16 of 41
CD-ROM, PC-
2
VN
C 164 C198 C 223 C 227 C 152 C153 C154 C 175 C 292 C281 L4
+ + + + HC B3216KF-800T30 4 3
*100u/6.3V_B *100u/6.3V_B 0. 1u_04 0.1u_04 0.1u_04 0.1u_04 1u 10u_08 100u/6.3V_B 100u/6.3V _B C H2 CH 1
+VCC USB0
BEEP, USB2.0*2
*C M1213- 02ST
R 44 470K_04
[13] US B_O C0#
R 45 560K J USB1
Z 1602 1
VCC GN D1
Z 1603 2 GND 1 GN D2
DATA- GND 2 GN D3
Layout note: GND 3
Z 1604 3 GN D4
DATA+ GND 4
INT_CD_R & CD_GND & INT_CD_L must
parallel routing to Audio Codec. The C 38 C37 4
R131 33_04 C D_RE SET# + GN D
space must be equal. [5, 13,14,21] PLT_RST#
100u/6.3V_B 0.1u_04
Other Signal U SB-04R MX
Signal:Space = 1:2 C D_C AB SEL R96 0_04
CD_R
To Signal:Space = 1:1 From
AUDIO CD_G CD-ROM LP3
Signal:Space = 1:1 +3VS CM-4M3216-181J T
CODEC CD_L 8 1
[13] U SB_PN 0
Signal:Space = 1:2 ID E_PDD IAG# R90 *10K_04 [13] U SB_PP0 7 2
Other Signal 6 3
[13] U SB_PN 1
[13] U SB_PP1 5 4
U4
5 1
VP NC
2
VN
L7
HC B3216KF-800T30 4 3
C H2 CH 1
+VCC USB1
PC BEEP [13] USB_OC1#
R 72
R 73
470K_04
560K
*C M1213- 02ST
J USB2
Layout note:
Z 1605 1
VCC GN D1
Installed for ITE8510TE/GX-L only. GND 1
Z 1606 2 GN D2
DATA- GND 2 GN D3
R 486 *0_04 Z 1607 3 GND 3 GN D4
[21] AU TO _BEEP DATA+ GND 4
C 86 C82 4
+ GN D
+3V 100u/6.3V_B 0.1u_04
U SB-04R MX
+3V
C726 0.1u_04
R458
5
10K _04
1
[ 21,40] KBC BE EP
4 KBC _BE EP [24]
Z1608 2
+3V U 36
C710 0.1u_04 74AH C1G 08 R465
3
+3V [13, 14,15,18,22,26,27, 28,30]

+3VS [2,5,8,9,10,11,12,13, 14,15,17,18,19,20, 21,22,24,26,27,29, 30]
1M
+5V [15, 26,27,28,29,30]
5
1 +5VS [12,15,17, 20, 21,23,24,25,26, 27]

4
2 Z1609 C733
U40 2200p
74AHC 1G14
3
CD-ROM, PC-BEEP, USB2.0*2 B - 17

Schematic Diagrams
CLOCK GENERATOR, CCD
CLOCK GENERATOR Layout note:

Insatlled:
C LK_MCH _BC LK C94 * 10p_04
Differential clock
level is higher
C LK_MCH _BC LK# C98 * 10p_04
Layout note: Z 1708

+3V S R75 4.3K _1% _04 C LK_C PU _BC LK C89 * 10p_04
PLACE CRYSTAL
WITHIN 500 MILS C LK_C PU _BC LK# C92 * 10p_04
OF CK410M L6 +3V S L5 H CB1608K F-121T25 Z 1709
HC B1608KF -121 T25 C72 C 111 C75 C78 C88 C 103 C 84 C LK_P CIE_ICH C110 * 10p_04
Z1 701 10 u_08 1u 1u 0.1u_04 0.1u_0 4 0. 1u_04 0.1u_04

X1 C LK_P CIE_ICH # C109 * 10p_04
42
28
50
56
47
7
1
14.318MHz C7 3 C101 U5
2 1 16-33034-45C
VDD _PC I1
VD D_P CI0
VD DP CIEX
VDD PCI EX
VD DCP U
VD DREF
VR EF
10u_08 1u 11 49 Z1710 1 4 RN4 CLK _MC H_B CLK C LK_S ATA C108 * 10p_04
VDD _48 C PU CLK1 C LK_MCH _BC LK [4]
45 48 Z1711 2 3 4P2R X22_04 CLK _MC H_B CLK#
VDD A C PUC LK1# C LK_MCH _BC LK# [4]
C64 C63
52 Z1712 1 4 RN2 CLK _CPU_B CLK C LK_S ATA # C112 * 10p_04
C PU CLK0 C LK_CPU _BC LK [2]
22p 22 p XTA L_IN 58 51 Z1713 2 3 4P2R X22_04 CLK _CPU_B CLK #
X1 C PUC LK0# C LK_CPU _BC LK# [2]

C LK_P CIE_MIN I C106 10p_0 4
XTA L_O UT 57 44 Z1714
X2 PC IEX8 43 Z1715
PCI EX8#
C LK_P CIE_MIN I# C107 10p_0 4
41 Z1716 1 4 RN7 CLK _PC IE_MINI
PC IEX7 C LK_PCIE _MI NI [ 22]
? ? ? ! C LK_P CM48 R6 4 33_ 04 40 Z1717 2 3 4P2R X10_04 CLK _PC IE_MINI #
[19] CLK_PCM48 PCI EX7# C LK_PCIE _MI NI# [22]
C LK_I CH48 R6 2 33_ 04 C LK_D RE FSS C93 * 10p_04
Sheet 17 of 41
[1 4] C LK_ ICH4 8
FS LA 12 39 Z1718 1 4 RN8 CLK _PC IE_I CH
F SLA/US B_48MHz_2X PC IEX6 C LK_PCIE _IC H [13]
R5 8 2.2K_04 38 Z1719 2 3 4P2R X22_04 CLK _PC IE_I CH#
[4] CLK_B SEL0 PCI EX6# C LK_PCIE _IC H# [13]
R6 9 2.2K_04 FS LB 60 C LK_D RE FSS # C95 * 10p_04
[4] CLK_B SEL1 R EF0 /FS LB
CLOCK
R7 0 2.2K_04 36 Z1720
[4] CLK_B SEL2 PC IEX5
R6 7 33_ 04 FS LC 61 35 Z1721
[1 4] C LK_ ICH1 4 R EF1 /FS LC PCI EX5# C LK_D RE F C87 * 10p_04
62 30 Z1722
[14] PM_ STP CPU # C PU _STO P# PC IEX4
GENERATOR, CCD
63 31 Z1723
[14] PM_STPPC I# PCI/P CIE X_STOP# PCI EX4# C LK_D RE F# C90 * 10p_04
P CLK _FW H R66 33_04 Z 1702 5 26 Z1724 4 1 RN9 CLK _SA TA
[14] P CLK _FW H PCIC LK3 SATA CLK C LK_SATA [12]
27 Z1725 3 2 4P2R X22_04 CLK _SA TA#
S ATA CLK# C LK_SATA # [ 12]
CLK _PC IE_N EW _CA RD C100 * 10p_04
P CLK _LAN R68 33_04 Z 1703 4 24 Z1726
[18] P CLK _LA N PCIC LK2_2X PC IEX3 25 Z1727
PCI EX3# 33 CLK _PC IE_N EW _CA RD# C102 * 10p_04
PER EQ4# W LAN _CL KRE Q# [22]
P CLK _ITE R53 33_04 Z 1704 3
[21, 40] PCLK_ITE PCIC LK1_2X 22 Z1728 4 1 RN6 CLK _PC IE_N EW _CA RD
PC IEX2 CLK_PC IE_ NEW _CA RD [22 ]
23 Z1729 3 2 4P2R X22_04 CLK _PC IE_N EW _CA RD# C LK_P CIE_3G PLL C96 * 10p_04
PCI EX2# CLK_PC IE_ NEW _CA RD # [2 2]
P CLK _PCM R65 33_04 Z 1705 64 32
[1 9] P CLK _PC M PCIC LK0_2X PER EQ3# NEWCARD _CLKREQ # [ 22]
19 Z1730 4 1 RN5 CLK _PC IE_3GPLL C LK_P CIE_3G PLL# C99 * 10p_04
PC IEX1 C LK_PCIE _3G PLL [5]
+3VS R71 *10 K_04 Z 1706 9 20 Z1731 3 2 4P2R X22_04 CLK _PC IE_3GPLL#
* SELDOT/PCI CLK_F1 PCI EX1# C LK_PCIE _3G PLL # [5 ]
34 C LK_P CM48 C76 10p_0 4
PER EQ2# MCH_CLK REQ # [ 5]
P CLK _ICH R55 33_04 Z 1707 8
[13] PCLK _IC H PCIC LK_F0 17 Z1732 4 1 RN3 CLK _DR EFS S C LK_I CH48 C74 10p_0 4
LC DCL K/PC IEX0 C LK_DREFSS [5]
54 18 Z1733 3 2 4P2R X22_04 CLK _DR EFS S#
[9, 10,1 4,18,22] ICH _SMBCLK SCLK L CDC LK#/PCI EX0# C LK_DREFSS # [5 ]
55 16 Z1734 PCLK _ITE C65 10p_0 4
[9, 10,1 4,18,22] ICH _SMBDAT SDATA PER EQ1#
R 74 *1 0K_04
+3VS
10 PCLK _ICH C68 10p_0 4
[26,29] CLKEN # VTT_PWR GD#/PD
14 Z1735 4 1 RN1 CLK _DR EF
27F IX/D OT96 C LK_DREF [5]
G ND A
15 Z1736 3 2 4P2R X22_04 CLK _DR EF# PCLK _PCM C77 10p_0 4
G ND
G ND
GN D
G ND
GN D
GN D
G ND
C LK_DREF# [5]
GND
27SS /DO T96#
PCLK _LAN C80 10p_0 4
ICS 9LPR 310 BGLF R511 *10K_04
+3 VS
21
13
29
37
46
53
59
FSLC FSLB FSLA Host Clock C LK_I CH14 C81 10p_0 4
2
6
BSEL2 BSEL1 BSEL0 Frequency PCLK _FW H C83 10p_0 4
PEREQ1#: P CI ECLK 0, 6
1 0 1 100 MHz
PEREQ2#: P CI ECLK 1, 8 Layout note:
0 0 1 133 MHz PEREQ3#: P CI ECLK 2, 4
Place terminationclose to
0 1 1 166 MHz PEREQ4#: P CI ECLK 3, 5, 7 CK410M
1 1 1 200 MHz PEREQ[1..4]# have i nte rna l pull up
CCD 12/14 R2.0A Q40 L1

FOR ALIENWARE
AO 3409 HCB 2012KF-500T40
S D Z 1738 Q9 5 1.2A(48mil)
+5V +V CC_CCD
A O3409
G S D AL IENVCC
+5VS
R 236 R1 1
C 412 C8 G
100K _04 100K_0 4 R 524 R 525 C 771
0. 1u_04 10u_08
Z 173 7 100K_04 1 00K_04 0.1u_04
Z 1739 JAL ED JALE D

+3VS [2,5,8,9, 10,1 1,12,13,1 4,15,16,1 8,19,20, 21,22,24, 26,27,29,30]
D
FROM H8 def HI From H8 1 +5VS [12, 15,1 6,20, 21,2 3,24,25,2 6,27]
D
Q 39 5
G 2N 7002
default:LOW [22] AUS B_P N2 2 +V CC _CC D [26]
[21,40] C CD _EN [22] AUS B_P P2 3
G
[21,40] A LIEN _ON 4
Q96 Z 1740 1
S
2N7002 5
S
85204-050 01
+5 V R 526 *0_ 04
[21, 40] EC_ALIEN_D ET#
[26 ,27, 28,2 9,30] R 527 0_04
[14] SB_ALIEN_D ET#
B - 18 CLOCK GENERATOR, CCD

Schematic Diagrams
LAN RTL8110SBL
LAN _V DD 25 LAN _VD D 33
C E LAN _V D D33 L36

H CB3216K F-800T30
C 643 C 651 C 654 C 626 C669 C653 Q77
+3V
2S B1188
0. 1u_04 0.1u_04 0.1u_04 0.1u_04 10u_08 0. 1u_04 C587 C639 C 625
B
VCTRL25
10u_08 10u_08 0. 1u_04
LA N_VD D 33 LAN _V D D12 LAN_VDD 33

40 mil 330mA
C E
C 588 C 610 C647 C624 C 590 C 614 C 603 C648 C615 C 586 C 630 C 606 C 631 C 645 C589 C591 C 584 C 593 Q74
2SB1188
0.1u_04 0.1u_04 0.1u_04 0. 1u_04 0. 1u_04 0.1u_04 0.1u_04 0.1u_04 0. 1u_04 0. 1u_04 0. 1u_04 0.1u_04 0.1u_04 0.1u_04 0.1u_04 0.1u_04 10u_08 0.1u_04
B
VC TR L12
LAN _VD D33 C602 0. 1u_04
107
110
116
126
26
41
56
71
84
94
20
16
32
54
78
99
24
45
64
3
7
U 29
C 592 C 646
AVD D 33/AVD D L
AVD D 33/AVD D L
AVD D 33/AVD D L
VDD 25/VD D12

VDD 25/VD D 12
VDD /25VD D 12
VDD 25/ VD D 12
N C /VDD 12
N C /VDD 12
N C /VDD 12
N C /VDD 12
VD D 33
VD D 33
VD D 33
VD D 33
VD D 33
VD D 33
VD D 33
N C/ AVD DL
N C /VDD 12
N C /VDD 12
10 C 629 C623
N C /AVD D H
0.1u_04 0.1u_04 120
N C /AVD D H 0.01u_04 0.01u_04 L3 0_08
Z 1808 Z 1809 LA N_V_D AC LAN _VD D25
12
AVDD 25/AVDD H
C 618 PC I_AD 0 104 117 Z1801 C 33 C 32
PC I_AD 1 103 AD 0 LED 0 115 Z1802 R 394 R 389 R 386 R381
Sheet 18 of 41
LED
AD 1 LED 1 Z1803
0.1u_04 PC I_AD 2 102 POWER 114 0. 01u_04 0.01u_04
PC I_AD 3 98 AD 2 LED 2 113 Z1804 49.9_1% 49. 9_1% 49. 9_1% 49.9_1% L2 LP2 ? ? ? ?
AD 3 LED 3
PC I_AD 4 97 C M- 4M3216-181JT
PC I_AD 5 96 AD 4 1 LAN _MD I0+ 12 13 MLMX4- 4 5 Z 1818
LAN RTL8110SBL
ATTACHMENT UNIT
AD 5 MD I0+ TD 4- MX4- MLMX4+ Z 1819
PC I_AD 6 95 2 LAN _MD I0- 11 14 3 6
PC I_AD 7 93 AD 6 MD I0- 5 LAN _MD I1+ 9 TD 4+ MX4+ 16 MLMX3- 2 7 Z 1820
AD 7 MD I1+ TD 3- MX3- MLMX3+ Z 1821
PC I_AD 8 90 6 LAN _MD I1- 8 17 1 8
AD 8 MD I1- TD 3+ MX3+
PC I_AD 9 89
AD 9
PC I_AD 10 87 CLOSE TO LAN CHIP CLOSE TO TRANSFORMAL LP1 J LAN
PC I_AD 11 86 AD 10 14 LAN _MD I2+ 6 19 MLMX2- 4 5 Z 1822
PC I_AD 12 85 AD 11 NC /MD I2+ 15 LAN _MD I2- 5 TD 2- MX2- 20 MLMX2+ 3 6 Z 1823 1 2
PC I_AD 13 83 AD 12 N C/ MD I2- 18 LAN _MD I3+ 3 TD 2+ MX2+ 22 MLMX1- 2 7 Z 1824 3 4
PC I_AD 14 82 AD 13 NC /MD I3+ 19 LAN _MD I3- 2 TD 1- MX1- 23 MLMX1+ 1 8 Z 1825 5 6
PC I_AD 15 79 AD 14 N C/ MD I3- R 39 0_04 TD 1+ MX1+ 7 8
PC I_AD 16 59 AD 15 Z 1812 10 15 Z1813 CM-4M3216-181JT 9 10
AD 16 TC T4 MC T4
? ? ? ?
PC I_AD 17 58 R 367 R 371 R 377 R380 7 18 Z1814 S PU BF-10-VB-1-B
PC I_AD 18 57 AD 17 4 TC T3 MC T3 21 Z1815
PC I_AD 19 55 AD 18 49.9_1% 49. 9_1% 49. 9_1% 49.9_1% 1 TC T2 MC T2 24 Z1816
PC I_AD 20 53 AD 19 TC T1 MC T1
PC I_AD 21 50 AD 20 Z 1810 Z 1811 G S5019PLF
PC I_AD 22 49 AD 21 LAN C 31 C 17
PC I_AD 23 47 AD 22 C 619 C620 R17 R 20 R 21 R 27
PC I_AD 24 43 AD 23 RTL8100CL/RTL8110SBL 0. 01u_04 0.01u_04
PC I_AD 25 42 AD 24 0.01u_04 0.01u_04 75_1% 75_1% 75_1% 75_1%
PC I_AD 26 40 AD 25
PCI INTERFACE
PC I_AD 27 39 AD 26 LAN _V_DAC Z 1817

PC I_AD 28 37 AD 27
PC I_AD 29 36 AD 28 C 10
PC I_AD 30 34 AD 29 106 LA N -EEC S
EEPROM
PC I_AD 31 33 AD 30 EEC S 111 LA N -EESK 1000p/ 2K V_12

AD 31 EES K 109 LA N -EED I
EED I
[13, 19] PC I_C/ BE0# 92 108 LA N -EED O
77 C /B E0# EE D O R 361 * 0_04
[13, 19] PC I_C/ BE1# C /B E1# Z 1826 IC H_SMBD AT [ 9,10, 14,17,22]
[13, 19] PC I_C/ BE2# 60 74 R 357 * 0_04 IC H_SMBC LK [ 9,10, 14,17,22]
C /B E2# N C /SMBD ATA Z 1827
44 72
[13, 19] PC I_C/ BE3# C /B E3# NC /S MBC LK
PC LK_LAN 28 88 M66EN R 378 1K_04 LAN _V D D33
[17] PC LK_LAN C LK N C /M66EN 65 LA N _C LKR U N#
CLK RU N #
PC I_A D 27 LA N _ID SEL 46 R 355 10K_04
R 350 100_04 I DS EL 8 VCTRL25
CTR L25
LAN _R ST# 27 125 VCTRL12
R S T# N C/ CTR L12 R382 R376
[13,19] PC I_IN TB # 25 31 PC I_PME# [13,19, 21,40]
I NTA # PME# *10K_04 5. 1K_1% LAN_VD D 33
[13,19] P C I_PAR 76 105 LA N -R I# R 391 *10K_04 +3VS U31
30 PAR LW AK E LAN -EECS 1 8
[13] P CI _R EQ1# R E Q# Z 1805 CS VC C
[13] PC I_G N T1# 29 23 R 390 0_04 SUSB# [11,14, 21,22,26, 27,28,40] LAN -EESK 2 7
63 GN T# IS OLATE# LAN -EEDI 3 SK NC 6 C 627
[13,19] PC I_I RD Y # I RD Y #
[ 13,19] P CI _TRD Y # 67 121 LA N _X1 R 399 *15K LAN -EEDO 4 DI NC 5
69 TR DY # X1 DO GN D 0.1u_04
[13,19] PC I_STOP# STOP#
70 X3 25MH z AT93C 465666
[ 13,19] P CI _PER R # PERR #
75 122 LA N _X2 2 1 ? ? ? ?
[ 13,19] P CI _SER R # SERR # X2
61 GND
[13,19] PC I_FR AME# F R AME# Z 1806
68 127 C 650 C 649
[ 13,19] PCI _D EVSEL# D E VSEL# R TSET
GN D /D VSS
GN D /D VSS
GN D /D VSS
GN D /D VSS
GN D /D VSS
GN D /D VSS
GN D /D VSS
GN D /D VSS
G ND /D VSS
G ND /D VSS
G ND /D VSS
G ND /D VSS
G N D/ AVSS
G N D/ AVSS
G N D/ AVSS
G N D/ AVSS
G N D/ AVSS
27p 27p
N C/ DV SS
N C/ DV SS
N C/ DV SS
N C/ DV SS
N C/ DV SS
N C/ DV SS
N C /AVS S
N C /AVS S
N C /AVS S
R 420
+3V [13, 14,15,16, 22,26,27, 28,30]
+3VS [2,5, 8, 9,10, 11,12,13, 14,15,16, 17,19,20, 21,22,24, 26,27,29, 30]
2.49K_1%
R TL8110SBL
100
101
119
112
118
123
124
128
38
51
52
66
80
81
91
22
48
62
73
17
21
35
11
13
? ? ? ?
4
R392 10
LAN_R ST#
PCI R ST# [12,13, 19,20]
R362 *10 C 609 *10p_04
PC I_AD [ 31:0] PC LK_LA N Z1807
[13,19] PC I_AD [31:0]
LAN RTL8110SBL B - 19
Schematic Diagrams
PCI7412
R401
PC I_AD [31:0] 6.34K _1% 1 394_TPBIAS 1 C 640 0. 1u_04
[13,18] PC I_AD[ 31: 0] Z1927 R 396 *0_04
T 18 Z1926
+3V S
1 394_TPB1+ R 384 1K_04
U34A 1 394_TPB1- R 383 1K_04
1394_XI C 675 20p
T19
Layout note:
1
PC I_AD 0 R11 U34B
PC I_AD 1 P11 AD 0 X4 Cry st al m us t be plac e as close as
R1
A_CA D[ 31: 0] [20 ]
R0
PC I_AD 2 U11 AD 1 C10 A_C AD 31 R 19 24.576MH z pos sible to the Chip. Keep traces
AD 2 C AD31/D 10 Z1914 XI
PC I_AD 3 V11 A10 A_C AD 30 G6 all on one PCB lay er . J1394
AD 3 CA D 30/ D9 Z1915 R SV D
PC I_AD 4 W 11 F11 A_C AD 29 D1 R 18 1394_XO C 687 20p
2
PC I_AD 5 R10 AD 4 CA D 29/ D1 E11 A_C AD 28 Z1916 E3 R SV D XO 1
PC I_AD 6 U10 AD 5 CA D 28/ D8 C11 A_C AD 27 Z1917 E2 R SV D 3
2
PC I_AD 7 V10 AD 6 CA D 27/ D0 B13 A_C AD 26 Z1918 E1 R SV D R 12 1394_XCP S R 393 1K_04
4
PC I_AD 8 R9 AD 7 C AD 26/ A0 C13 A_C AD 25 Z1919 F5 R SV D CPS
AD 8 C AD 25/ A1 Z1920 R SV D
PC I_AD 9 U9 A14 A_C AD 24 F3
AD 9 C AD 24/ A2 Z1921 R SV D
PC I_AD 10 V9 B14 A_C AD 23 F2 C 635 1u
PC I_AD 11 W9 AD 10 C AD 23/ A3 B15 A_C AD 22 Z1922 G5 R SV D R400 56.2_1% J1394
PC I_AD 12 V8 AD 11 C AD 22/ A4 E14 A_C AD 21 R SV D R 13 1394_TPB IAS0 R406 56.2_1% LP5
PC I_AD 13 U8 AD 12 C AD 21/ A5 A16 A_C AD 20 Z1923 W12 TPB IAS0 V14 1394_TPA 0+ 1 8 Z1934 4 G N D1
AD 13 C AD 20/ A6 Z1924 V12 NC TPA0P TPA+ s hield
PC I_AD 14 R8 D19 A_C AD 19 W 14 1394_TPA 0- 2 7 Z1935 3 G N D2
AD 14 CAD19/A25 Z1925 U12 NC TPA0N TPA- s hield
PC I_AD 15 W7 E17 A_C AD 18 V13 1394_TPB 0+ 3 6 Z1936 2
PC I_AD 16 W4 AD 15 C AD 18/ A7 F15 A_C AD 17 NC TPB0P W 13 1394_TPB 0- 4 5 Z1937 1 TPB+
PC I_AD 17 T2 AD 16 CAD17/A24 H19 A_C AD 16 F7 TPB0N R402 56.2_1% TPB-
PC I_AD 18 T1 AD 17 CAD16/A17 J17 A_C AD 15 F10 GND 0 V16 Z 1928 R403 56.2_1% CM-4M3216-181J T
PC I_AD 19 R3 AD 18 C AD 15/IO W R# J15 A_C AD 14 F13 GND 1 TPA1P W 16 Z 1929 R404 5.1K_1% C 13116-104A1
AD 19 C AD 14/ A9 GND 2 TPA1N
? ? ? ?
PC I_AD 20 P5 J18 A_C AD 13 G14 W 17 1394_TPB IAS1 Z1933 C 633 220p_04
AD 20 C AD13/IOR D# GND 3 TPB IAS1 1394_TPB 1+

PC I_AD 21 R2 K15 A_C AD 12 H6 V15
PC I_AD 22 R1 AD 21 CAD12/A11 K17 A_C AD 11 K6 GND 4 TPB1P W 15 1394_TPB 1-
AD 22 C AD 11/O E# GND 5 TPB1N Layout note: Layout note:
PC I_AD 23 P3 K18 A_C AD 10 K14
PC I_AD 24 N3 AD 23 C AD 10/ CE2# L15 A_C AD 9 M14 GND 6
AD 24 C AD 9/A10 GND 7 Close to PCI7412 Close to 1394 CONN.
PC I_AD 25 N2 L18 A_C AD 8 N6
AD 25 CA D 8/D 15 GND 8
PC I_AD 26 N1 L19 A_C AD 7 P7 P17 Z 1938 R 411 4.7K _04
AD 26 C AD 7/ D7 GND 9 PHY _TEST_MA +3VS
PC I_AD 27 M5 M17 A_C AD 6 P9
PC I_AD 28 M6 AD 27 CA D 6/D 13 M18 A_C AD 5 GND 10 E7
S D_WP [ 20]
Sheet 19 of 41
PC I_AD 29 M3 AD 28 C AD 5/ D6 N19 A_C AD 4 SD _W P/S M_C E# E9
AD 29 CA D 4/D 12 SD_CD # S D_CD # [20 ]
PC I_AD 30 M2 M15 A_C AD 3 E6 Z 1939
PC I_AD 31 M1 AD 30 C AD 3/ D5 N17 A_C AD 2 SD_DAT3/SM_D 7 B5 Z 1940
AD 31 CA D 2/D 11 SD_DAT2/SM_D 6
N18 A_C AD 1 A5 Z 1941
PCI7412
C AD 1/ D4 SD_DAT1/SM_D 5 Z 1942
P19 A_C AD 0 C6
W 10 C AD 0/ D3 SD_DAT0/SM_D 4 A4 Z 1943
[13,18] PC I_C /BE0# C BE0# SD_CLK/S M_R E# Z 1944
V7 L17 C5
[13,18] PC I_C /BE1# C BE1# C C BE0#/ CE1# A_C CBE0# [ 20] S D_CMD/ SM_ALE
U5 H18
[13,18] PC I_C /BE2# C BE2# C C BE1#/ A8 A_C CBE1# [ 20] +3V S
P2 E18
[13,18] PC I_C /BE3# C BE3# C CBE2#/A12 A_C CBE2# [ 20]
E13 R 495 R 467 47_04
C CBE3 #/ RE G# A_C CBE3# [ 20] S D_CLK [20]
PC LK _PCM L1
[17 ] PCLK_PC M PC IC LK H14 * 47_04
U7 CP AR /A13 A_C PAR [20]
RN 39 * 8P4RX0_04
M540N
[1 3,18] PCI_PAR R6 PAR A11 B6 Z 1958 8 1
[13,18 ] PC I_F RAME # FR AME# CC LKRU N #/W P/IOIS16# A_C CLKR UN # [20] MS_DATA3/SD_DAT3/SM_D 3 54_MS_D3 [ 20]
V5 E19 A6 Z 1959 7 2
[ 13, 18] PCI _IR DY # IR DY # C FR AME#/A23 A_C FR AME# [20] MS_DATA2/SD_DAT2/SM_D 2 54_MS_D2 [ 20]
W5 F17 C7 Z 1960 6 3
[13,18] P CI_TR DY # TR D Y # C IRD Y #/A15 A_C IRD Y # [ 20] MS_DATA1/SD_DAT1/SM_D 1 Z 1961 54_MS_D1 [ 20]
U6 G15 B7 5 4
[ 13, 18] P CI _D EVSEL# D EVSEL# CTRD Y #/A22 A_C TR DY # [20] MS_SD IO(DATA 0) /SD _D ATA0/SM_D 0 54_MS_D0 [ 20]
V6 F19 E8 Z 1962 R 225 *0_04
[ 13, 18] PCI _STOP # STOP# C DEVSEL#/A21 A_C DEVS EL# [ 20] MS_BS/SD _C MD /SM_W E# Z 1956 54_MS_BS [ 20]
R7 G18 A7 R 227 *47_04
[13,18] P CI_PERR # PER R# C STOP#/A20 A_C STOP# [ 20] MS_C LK/ SD _C LK/SM_E L_W P# Z 1963 54_MS_CLK [20]
W6 A8 R 226 *0_04
[13,18] P CI_SERR # SER R# MS_CD # 54_MS_IN S# [20]
L3 G19
[13] P CI_REQ2 # PC IR EQ # CPER R #/A14 A_C PERR # [20]
L2 C12 A_C SERR # [20] C8
[ 13] PCI _GNT2# PC IGNT# CSER R #/W A IT# MC_PW R _C TR L0 Z 1945 C AR D_PW R EN # [20]
F8
P CI _AD 23 R 410 100_04 PC M_ID SELN 5 C14 MC _PW R_ CTRL1/SM_R/ B# RN 37 8P4 RX0_04
M550N
ID SEL C R EQ #/I NPAC K# A_C REQ# [20]
R 419 0_04 Z1901 K5 G17 B8 Z 1946 1 8
P CM_R ST# GRS T# C GN T# /W E# A_C GN T# [20] SM_CD # Z 1947 MS_D3 [20]
K3 B4 2 7
PR ST# S M_C LE MS_D2 [20]
H15 A3 Z 1948 3 6
C BLO CK#/A19 A_C BLOC K# [20] XD_ CD #/ SM_P HY S_ W P# MS_D1 [20]
R 421 47K_04 Z1902 J5 E12 4 5
+3VS Z1964 SU SPEND # CI NT#/R EADY /I RE Q# A_C INT# [20] MS_D0 [20]
R516 0_04 L5 A12 P10 R 216 0_04
[ 13, 18, 21,40] PCI _PME# R I_OUT#/PME# CSTS CH G /BV D1/STSC H G# A_C STSC HG [20] V CC 0 MS_BS [20]
H3 B12 P8 R 218 47_04
[24] PCMSPK SPKR OUT CA UD IO/BVD2 /SPK R# A_C AU DIO [20] V CC 1 +3VS MS_CLK [20]
R435 47K_04 P6 R 217 0_04
V CC 2 MS_INS# [20]
[20] TP S_LATC H C9 F18 A_C CLK [20] L14
LATC H/ VD 3/VPPD 0 C CLK/A16 V CC 3
[20] TPS_D ATA B9 L6
D ATA/VD2 /VPPD 1 V CC 4
[20] TPS_CLOC K
Z1903
A9
C4 C LOCK/VD 1/ VC CD 0#
R SVD/V D0/V CC D1#
C R ST# /R ESET
C15 A_C RST# [20] V CC 5
V CC 6
J 14
J6 C6 42 C663 C 729 C 667 C 719 C738 4 in 1 card reader
+3VS
R 211
R 428
47K_04
220 Z1955 K2
VR _EN #
RS VD /D 14
RS VD /A18
M19
H17
A_C D14 [ 20]
A_A18 [20]
V CC 7
V CC 8
F 14
F 12 0.01u_04 0. 1u_ 04 0. 1u_04 0.1u_04 1 0u _08 *10u_08 MMC/SD/MS/MS Pr
Z1904 E10 B10 F9
U SB_EN # R SV D/ D2 A_C D2 [20] V CC 9
R 385 330 Z1905 P12 F6 L41
TEST0 VC C 10
N15 A_C CD 1# [20] HC B1608K F-121T25
R 439 0_04 Z1906 G1 CC D 1#/ CD 1# B11 U 19 Z 1949
[13] PCI _IN TA# MFU NC 0 CC D 2#/ CD 2# A_C CD 2# [20] VD DP LL 33 +3V S
R 433 0_04 Z1907 H5
[ 13,18] PCI _IN TB# Z1908 MFU NC 1
R 436 0_04 H2 A13 P1 C 659 C 658 C 655
[13] PCI _IN TC # MFU NC 2 CVS1/VS1# A_C VS1 [ 20] VC C P1 +3V S
R 438 0_04 Z1909 H1 B16 W8
[ 12,14,21,40] INT_SER IR Q MFU NC 3 C VS2/VS2 A_C VS2 [ 20] VC C P0
R 432 0_04 Z1910 J1 1000p 0.1u_04 1 0u _08
[13] PCI _IN TD # Z1911 MFU NC 4
R 430 47K_04 J2 J 19
+3VS Z1912 MFU NC 5 VCC C B0 +AVC C
R 429 * 0_04 J3 A15
[14,2 1,40] PM_CLKR UN # MFU NC 6 VCC C B1 L38
R 424 47K_04 P13 HC B1608K F-121T25
+3VS AV DD 0 Z 1950
P14
PCM_SC L AV DD 1 +3V S
G2 U 15
S CL AV DD 2
C6 36 C632 C 641
R 441 0_04 PC M_48 F1 R 14 L39
[17] CLK_PC M48 C LK_48 G3 PCM_SD A AG ND 2 U 14 1000p 0. 1u_ 04 10u_08 0_08
S DA AG ND 1 U 13
AG ND 0
+3V S PC I7412ZH K
OSC1 K1 Z 1951 PC M_AGND
4
V DD OU T
3 Z 1913 R4 44 *0_04 OUTPUT VR _POR T1
VR _POR T2
K19 Z 1957
P15 Z 1952 C656
1 2 VD DP LL 15 C657
OE GN D
C6 60 1u
*48MH z +3VS Z 1953 1u
C 730 22-48R00-1BA 0.1u_04
R 221 2. 7K R 17
VSSP LL +3VS [2,5,8,9,10,11,1 2,13,14, 15, 16, 17,18,20,21,22 ,24,26,27,29,30]
* 0.01u_04 U1 5 R210
PC M_SC L +AVC C [20]
R213 2. 7K 8 7
VCC WP
0 PC I7412ZH K
6
PC M_SD A 5 SCL 1 PC M_RST# R422 10
SDA A0 PC IRST# [ 12, 13, 18,20]
2
4 A1 3
G ND A2 PC M_48 R407 *R Z 1954 C 644 *C
AT24C02N
? ? ? ?
B - 20 PCI7412
Schematic Diagrams
PCM SOCKET,3 IN 1 SOCKET
CARDBUS SOCKET U37

*TPS2220BDB
+AVCC +AVPP
9
AVCC 10
7 AVCC
J PCMCIA 20 12V 8
[19] A_C AD [31: 0] A_CAD 31 66 7 A_C CBE0# 12V AVPP
CAD 31/ D10 C CBE 0#/C E1# A_C CBE0# [19]
A_CAD 30 65 12 C351 *0.1u
A_CAD 29 31 CAD 30/ D9 CC BE1#/A8 21 A_C CBE1# [19] 17
CAD 29/ D1 CCBE2#/A12 A_C CBE2# [19] NC
A_CAD 28 64 61 A_C CBE3# [19] 18
A_CAD 27 30 CAD 28/ D8 CC BE3#/R EG# 13 1 NC
CAD 27/ D0 C PAR /A13 A_C PAR [19] 5V
A_CAD 26 29 +5VS 2 19
A_CAD 25 28 CAD 26/ A0 19 CCLK/A16 R 189 * 10 5V NC
A_CAD 24 27 CAD 25/ A1 C CLK/A16 33 A_C CLK [19] C705
CAD 24/ A2 CCLKR UN#/IOI S16# A_C CLKRU N# [19]
A_CAD 23 26 58 A_C RST#
A_CAD 22 25 CAD 23/ A3 C RST#/RE SET A_C RST# [ 19] *0.1u_04 3
CAD 22/ A4 D ATA TPS _DATA [19]
A_CAD 21 24 15 A_C GNT# [ 19] 4 TPS _CLOCK [19]
A_CAD 20 23 CAD 21/ A5 CGN T#/ WE# 60 CLOCK 5
A_CAD 19 56 CAD 20/ A6 C REQ#/I NPACK# 54 A_C REQ# [ 19] LATCH 12 TPS _LATCH [19]
CAD 19/ A25 C FRAME#/A23 A_C FRAME# [19] RESET# PCI RST# [12,13,18,19]
A_CAD 18 22 20 13
A_CAD 17 55 CAD 18/ A7 CIR DY#/A15 53 A_C IRD Y# [19] +3VS 3. 3V 15
CAD 17/ A24 C TR DY#/A22 A_C TRD Y# [19] OC
SH DN
A_CAD 16 46 50 A_C DEVSEL# [ 19] C741
GND
A_CAD 15 45 CAD 16/ A17 CD EVSEL#/A21 49
NC
NC
NC
NC
NC
NC
CAD 15/ IOW R# CSTOP#/A20 A_C STO P# [19]
A_CAD 14 11 14 A_C PER R# [19] *0.1u_04 Z 2002
A_CAD 13 44 CAD 14/ A9 C PERR#/A14 59
CAD 13/ IOR D# CSERR #/W AIT# A_C SER R# [19]
11
21
23
A_CAD 12 10 16
24
16
14
22
6
A_C INT# [19]
A_CAD 11 9 CAD 12/ A11 C INT#/IR EQ# 48 R462 * 10K_04
A_CAD 10 42 CAD 11/ OE# C BLOCK#/A19 62 A_C BLO CK# [19]
CAD 10/ CE2# CAU DIO/SPKR # A_C AUD IO [19]
A_CAD 9 8 63 A_C STSCHG [19]
A_CAD 8 41 CAD 9/A10 C STSCH G/STSC HG# Z2003 R442 * 10K_04
CAD 8/D 15 +3VS
A_CAD 7 6 43 A_C VS1 [19]
A_CAD 6 39 CAD 7/D 7 CV S1/ VS1# 57
A_CAD 5 5 CAD 6/D 13 CV S2/ VS2# 36 A_C VS2 [19]
CAD 5/D 6 C CD 1#/C D1# A_C CD1# [ 19]
Sheet 20 of 41
A_CAD 4 38 67
A_CAD 3 4 CAD 4/D 12 C CD 2#/C D2# A_C CD2# [ 19] +5VS +3VS
A_CAD 2 37 CAD 3/D 5 51
A_CAD 1 3 CAD 2/D 11 VCC 17
CAD 1/D 4 VCC +AVC C
PCM SOCKET, 3 IN
A_CAD 0 2 52
CAD 0/D 3 VPP 18 C691 C707 C 740 C 737
VPP 1 +AVP P
32 GND 34 C349 C731 C736 C348 C347 *0.1u_04 *10u_08 * 0.1u_04 * 10u_08
[19] A _CD 2
1 SOCKET
RFU /D2 GND
GND 4
40 35
GN D1
GN D2
GND3
GND 5
GN D6
[19] A_C D14 RFU /D14 GND
[19] A_A18 47 68 *0.1u *0.1u *0.1u_04 *0.1u_04 *0.1u_04
RFU /A18 GND
* 20216-0021L
69
74
70
71
72
73
? ? ? ?
PC B Footprint = 20216-0021A
4 IN 1 SOCKET SD/MMC/MS/MS Pro
FOR M540N FOR M550N
JC ARD -NOR JC ARD -REV
Card Reader Power SD _CD # P1 SD _CD # P1
[19] SD _C D# C D_SD C D_SD
SD _WP P2 MS _D2 P2
Q 94 [19] SD_W P 54_MS_D1 P3 W P_SD MS _D3 P3 D AT2_SD
AO3409 54_MS_D0 P4 D AT1_SD MS _BS P4 C D/D AT3_SD
S D P5 D AT0_SD P5 C MD_SD
+3VS +VC C_C AR D W P GND_SD VSS_SD
P6 +VCC _CARD P6
G P7 VSS_SD SD _CLK P7 VDD_SD
R 522 C405 R523 P8 VSS_MS P8 C LK_SD
[19] 54_MS_BS BS_MS VSS_SD
SD _CLK P9 MS _D0 P9
100K_04 0.1u_04 100K_04 [19] SD _C LK P10 C LK_SD MS _D1 P10 D AT0_SD
[19] 54_MS_D1 D AT1_MS D AT1_SD
P11 SD _WP P11
[19] 54_MS_D0 P12 SD IO/DAT0_MS P12 W P_SD
[19] CARD _PW REN# +VCC _CARD VD D_SD VSS_MS
[19] 54_MS_D2 P13 +VCC _CARD P13
P14 D AT2_MS MS _CLK P14 VCC_MS
VSS_SD [19] MS_C LK SCLK_MS
[19] 54_MS _IN S# P15 [19] MS_D3 P15
P16 IN S_MS P16 D AT3_MS
[19] 54_MS_D3 54_MS_BS P17 D AT3_MS [19] MS _IN S# P17 IN S_MS
C MD_SD [19] MS_D2 D AT2_MS
[19] 54_MS_C LK 54_MS_CLK P18 [19] MS_D0 P18
P19 SC LK_MS P23 P19 SDIO/DAT0_MS
+VCC _CARD VC C_MS GN D P24 [19] MS_D1 D AT1_MS
54_MS_D3 P20 [19] MS_BS P20 P22
P21 C D/D AT3_SD GN D P25 P21 BS_MS GN D P23
54_MS_D2 P22 VSS_MS GN D P26 VSS_MS GN D
D AT2_SD GN D MD R019-C 0-0010( Rev erse)
*MSD019-C 0-10A0(Normal ) ? ? ? ?
FOR M540N FOR M550N

CC LK/A16 54_MS_C LK SD_CLK MS_CLK SD_CLK
+VC C_C AR D +VC C_C AR D
R185 R 204 R 203 R 397 R 370
+3VS [2, 5,8,9,10,11, 12,13,14,15, 16,17,18,19,21, 22,24,26,27,29,30]
*0 *0 *0 0 0 +5VS [12,15, 16,17,21,23,24, 25,26,27]
C386 C385 C384 C634 C677
Z2005 Z2006 Z2007 Z2008 Z2009
C356 C 382 C 380 0.1u_04 0.1u_04 10u_08 C 638 C 617 0. 1u_04 10u_08
*10p_04 *10p_04 * 10p_04 10p_04 10p_04
Close to cardbus socket Close to MS socket Close to SD socket Close to MS socket Close to SD socket
PCM SOCKET,3 IN 1 SOCKET B - 21

Schematic Diagrams
T8510TE/ GX-L
SA [19:0]
KBC_BA T0_TEMP C365 1u A C KBC _GA20 U 11B SA[ 19: 0] [22]
[40] KBC_BAT0_TEMP [12] H _A20GATE SD [7:0]
D16 SCS751V [ 12,14,40] LPC _AD0 15 SD[ 7:0] [22]
KBC_BA T0_V C366 1u A C KBC _R CIN # 14 LA D0
[ 40] KBC_BAT0_V [12] H_RC IN# D17 SCS751V [ 12,14,40] LPC _AD1 13 LA D1 124 SA 0
KBC_CU RSEN C367 1u A C KBC _PWR BTN # [ 12,14,40] LPC _AD2 10 LA D2 FA0 125 SA 1
[40] KBC _C UR SEN [14] PWR BTN# [ 12,14,40] LPC _AD3 LA D3 FA1 SA 2
D13 SCS751V [40] KBC _PLTR ST# 126
A C SMI # R501 100_04 30 FA2/B ADD R0 127 SA 3
[ 14] SB_S MI# [5, 13,14,16] PLT_R ST# LP CR ST#/W UI4/GPD2 FA3/B ADD R1 SA 4
D21 SCS751V [12,14,40] LPC _FR AME# 9 128
A C SCI # 18 LF RAME# FA4/PP EN 131 SA 5
[ 14] SB_S CI# [17,40] PC LK_ITE LP CC LK FA5/SH BM SA 6
N UM C AP SCR OLL D22 SCS751V [ 12, 14,19,40] INT_S ERI RQ 7 132
A C SWI # 24 SERIR Q FA6 133 SA 7
[ 14] SB_SWI# [ 26, 40] KB C_BKLEN LP CPD#/ WU I6/GPE6 FA7
D
Q32 Q 30 Q31 D12 SCS751V 143 SA 8
A C KBC _IN STANT_ON 25 FA8 142 SA 9
N UM_LED G C AP_LED G SCR OLL_LED G [14] INSTANT_ON D18 SCS751V [14,19,40] PM_CLKRU N# ALIEN _O N 27 CLKR UN #/W UI7/GPE7 FA9 135 SA 10
2N7002 2N7002 2N 7002 [17,40] ALIEN_ON Z2101 28 LP C80HL/GPG6 F A10 134 SA 11
LP C80LL/ GPG7 F A11 SA 12
130
S
W RST# 19 F A12 129 SA 13
[22,40] W RST# 2 WR ST# F A13 121 SA 14
[27,40] P WR _SW# PW RSW/ GPE4 F A14 SA 15
JI NTKB SMI# 22 120
[ 40] SMI# EC SMI# F A15 SA 16
85201-24051 [40] SCI# SC I# 31 113
U 11A EC SC I#/GPD 3 F A16/GPG0 112 SA 17
26 71 KB-SI0 4 163 F A17/GPG1 104 SA 18
[26,40] AC_IN # RI1#/W U I0/G PD 0 KSI0/ STB# KB-SO[ 15:0] [26,40] BAT0_C LK SMCLK0/ GPB3 F A18/GPG2
29 72 KB-SI1 5 164 103 SA 19
[ 13,18,19,40] PC I_PME# 172 RI2#/W U I1/G PD 1 KSI1/AFD # 73 KB-SI2 6 KB-SO [15: 0] [40] [26,40] BAT0_D AT 169 SMDAT0/ GPB4 F A19/GPG3 3 Z2102
[14,40] PM_RSMR ST# TMRI0/W UI2/GPC4 KSI2/I NIT# KB-SI[7:0] [2,40] TMP _SC LK SMCLK1/ GPC 1 F A20/GPG4 Z2109
[40] SWI# SW I# 176 74 KB-SI3 8 KB-SI[ 7:0] [40] [2,40] TMP _SD AT 170 4
TMRI1/W UI3/GPC6 KSI 3/S LIN # SMDAT1/ GPC 2 F A21/GPG5
77 KB-SI4 11
LID _SW # 44 KSI4 78 KB-SI5 12 KBC_GA20 5 138 SD 0

[26, 40] LI D_SW # WU I5/ GPE5 KSI5 79 KB-SI6 14 [40] K BC _GA 20 KBC_RC IN# 6 GA20/ GP B5 FD0 139 SD 1
KSI6 [ 40] KBC_RC IN# KBRST#/GPB6 FD1 SD 2
KBC _THR MTRIP# 41 80 KB-SI7 15 J INT KB 165 140
[12,40] KBC _THR MTR IP# EC _ALIEN _D ET# GPD4 KSI7 RI NG #/PW R FAI L#/ LPC RST#/GPB7 FD2 SD 3
[17,40] EC _ALIEN _D ET# 42 23 141
62 GIN T/ GPD 5 49 KB-SO0 1 PW UR EQ# FD3 144 SD 4
[ 11,40] FAN_SEN Z2103 63 TACH 0/GPD 6 KSO0/PD 0 50 KB-SO1 2 1 24 80CLK 153 FD4 145 SD 5
TACH 1/GPD 7 KSO1/PD 1 [40] 80C LK RXD/GPB0 FD5 SD 6
51 KB-SO2 3 80DAT 154 146
KSO2/PD 2 52 KB-SO3 7 [40] 80D AT TXD/G PB 1 FD6 147 SD 7
KSO3/PD 3 FD7
Sheet 21 of 41
53 KB-SO4 9 161
KSO4/PD 4 VBAT
[ 40] EXTMS_C LK EXTMS_C LK 110 56 KB-SO5 10 173 BIOSC S# [22]
EXTMS_D AT 111 PS2CLK0/GPF0 KSO5/PD 5 57 KB-SO6 13 16 F CS# 150
[ 40] EXTMS_D AT
[ 40] EXTKB_C LK
EXTKB_CLK 114 PS2DAT0/GPF1 KSO6/PD 6 58 KB-SO7 16 Note: +3VS 95 VC C FR D# 151 XMEMR# [22]
XMEMW# [22]
T8510TE/ GX-L EXTKB_DAT 115 PS2CLK1/GPF2 KSO7/PD 7 59 KB-SO8 17 C381 C 303 C321 AVCC FW R#
[ 40] EXTKB_D AT
TP_CLK 116
PS2DAT1/GPF3 KSO 8/ACK#
60 KB-SO9 18
For 158 Z2112
[23,40] TP_CLK PS2CLK2/GPF4 KSO9/B USY IT8510TE/GX-L CK32K
TP_DATA 117 61 KB-SO10 19 *10u_08 * 0.1u_04 *0.1u_04 34
[23,40] TP_D ATA KBC _I NSTAN T_ON 118 PS2DAT2/GPF5 KS O10/PE 64 KB-SO11 20 45 VSTBY
[40] KBC_IN STANT_ON PS2CLK3/GPF6 K SO11/ERR # VSTBY Z2113
Z2104 119 65 KB-SO12 21 123 160 X2
PS2DAT3/GPF7 KSO12/SLC T 66 KB-SO13 22 L22 * 0_08 136 VSTBY C K32KE *32.768KH z
R194 100_04 KBC _BAT0_TEMP 81 KSO13 67 KB-SO14 23 Z2111 157 VSTBY 8 4 1
[ 26] BAT0_TEMP AD C0 KSO14 VSTBY NC
R195 100_04 KBC _BAT0_V 82 68 KB-SO15 24 166 11 3 2
[26] BAT0_V R196 100_04 KBC _C UR SE N 83 AD C1 KSO15 VSTBY NC 12 C307 C308
[26] CU RSEN 84 AD C2 32 Z 2106 R 177 120K +3VH8 NC 20
[ 11,40] V_SU B AD C3 PWM0/GPA0 F AN_ON [11] NC
Z2105 87 33 Z 2107 Z2106 [40] C304 C 299 C301 21 *10p *10p
AD C4/GP E0 PWM1/GPA1 NC
[40] P 80IN# P80IN# 88 36 Z 2108 85
89 AD C5/GP E1 PWM2/GPA2 37 C345 R 176 10u_08 0.1u_04 0. 1u_04 96 NC 86
[22, 40] W LAN _D ET# 90 AD C6/GP E2 PWM3/GPA3 38 AUTO_BEEP [16] AVSS NC 91
[22,26,40] BT_D ET# AD C7/GP E3 PWM4/GPA4 THERMAL_ON [ 2,40] NC
[26,40] TO TAL_C UR 93 39 WLAN_EN [22,23,40] 0.1u_04 *2.2M 159 92
MO DEL_ID 94 AD C8 PWM5/GPA5 40 17 VSS NC 97
[40] MODEL_ID AD C9 PWM6/GPA6
PWM7/GPA7
43
BT_EN [23,26,40]
CC D_EN [17,40] 35 VSS
VSS
NC
NC
98 Note:
WATC HD OG 47 46 106 For
[ 40] W ATC HD OG 171 CLKOUT/ GPC0 48 C AP_LED 122 VSS NC 107
[11,27,28,40] DD _ON KBC _PWR BTN# 175 GPC3 GPH 0 54 SCR OLL_LED CAP _LED [40] 137 VSS NC 108 IT8510TE/GX-L
[ 40] KBC_PW RBTN # GPC5 GPH 1 SCR OLL_LED [40] VSS NC
[ 16,40] KBCBEEP 1 55 N UM_LED NU M_LED [40] 167 109
CK32K OU T/GPC 7 GPH 2 69 VSS NC
162 GPH 3 70 ACI N_LED [23,40] * IT8510TE/ GX-L
[26,40] CH AG_EN GPB2 GPH 4 75 ON _SU S_LED [23,40]
GPH 5 BAT_F UL_LED [ 23, 40]
[14,40] SU SC # 148 76 BAT_LOW _LE D [23,40]
149 GPI0 GPH 6 105
[11,14,18,22,26, 27, 28,40] SU SB# GPI1 GPH 7 EMA IL_LED [ 23, 40]
SU SA# 152 Z 2110 [ 40]
WEB0# 155 GPI2 99 Z 2110 R171 120K
[40] WEB0# GPI3 D AC 0 BRIGHTNESS [26] BASE ADDRESS SHARE MEMORY
WEB1# 156 100 R170 120K +3VH8 +3VH8
[40] WEB1# GPI4 D AC 1 I_CH AR GE [26]
WEB2# 168 101
[40] WEB2# GPI5 D AC 2
[2, 40] TH ER MAL_ALER T# 174 102 KBC _C HARGE [ 40] SA3 R 163 *10K_04 SA 5 R160 *10K_04
GPI6 D AC 3 C328 R 535 C320 R 536
* IT8510TE/ GX-L KBC _VRO N [29, 40] SA2 R 166 *10K_04
VOL_MUTE [ 25,40] 0.1u_04 *2.2M 0.1u_04 *2.2M
+5VH 8
JPS2 JDOG J DOG
1 2
EXTMS_C LK 2 A
B
JPS 2 Note: Note:
2
EXTMS_D AT 3 6 For IT8510TE/GX-L 1
EXTKB_C LK 4 C 1
EXTKB_D AT 5 D +3VH 8 For IT8510TE/GX-L *88266-02001
E I_CHARGE R170 C320
6 J1
F 1 J1
*85205-06001 80DAT 1
2 BRIGHTNESS R171 C328
80CLK
P80IN # 3 R130 100K_04
Note: 4
5
1 5
I T85 10T E/G X-L 0 X
+3VH8
+3VH 8
KBC_MD 1 [ 40]
For IT8510TE/GX-L * 85205- 05001 R136

+3VH 8 H8/2111 120K 0.1u
V R502 10K _04 Q20
SU SA# R 503 * 10K_04 *0_04 U8 G 2N 7002 R138
KBC _THRMTR IP# Z2115 3 150K
W EB0# R 172 *10K_04 R173 10K_04 MR # 1 Z 2116 S D
INS_BUTTON [27] +5VS R ESET#
LID _S W# R 485 100K_04 5
+3VH 8 +3VH8 VC C
D
KBC_THR MTRIP# R 494 10K_04 Q 11 Q 10 4 W RST#

2N7002 2N7002 C79 0. 1u_04 MODE L_ID 2 W DI W RST# [22,40]
R N29 8P4R X10K_04 G G J HKB GN D C262
SMI# 1 8 A AT3510IG V
SC I# 2 7 SC RO LL 1 WATC HD OG 1u
MODEL ID
S
BT_DE T# 3 6 C70 R 63 N UM 2
3
WLAN _D ET# 4 5 C AP LOW M550N
EC _ALIEN _D ET# R 529 * 100K_04 0.1u_04 100K_04 W EB0 4
ALIEN _O N R 530 * 10K_04 W EB1# 5
6 HIGH M540N
W EB2#
7
+5VH 8 8 J HKB
[27] PWR SW 9
R N52 8P4R X10K_04 +VI N Z 2114 +3VS [2, 5,8,9,10,11,12,13,14,15,16,17,18, 19, 20, 22,24,26,27,29,30]
EXTMS _C LK 1 8 R54 100K_04 10
EXTMS _D AT 2 7 C 69 LI D_SW# 11 1 13 +3VH 8 [ 2,11,22,26,27,40]
EXTKB_C LK 3 6 12 +5VS [12,15,16,17,20,23, 24, 25,26,27]
+3VH 8 13 +5VH 8 [ 11,23,27,40]
EXTKB_D AT 4 5 0.1u +VIN [11,26,27,28,29, 30, 31]
C 67 0.1u_04 85201- 13051 A3
B - 22 T8510TE/ GX-L
Schematic Diagrams
ISA BIOS, MINI CARD, NEW CARD
ISA BIOS FOR MINI CARD

IT8510TE/GX-L [21 ] SA [19: 0]
[21] S D[7: 0]
SA [19:0]
SD [7:0 ]
ONLY
U12
TSOP 48pin 3V S A0
S A1
45
25 DQ 15/A -1 V CC
37
+3VH8
EON EN29LV800BT-70TCP S A2 24
A0
29 SD0 C4 76 JMI NI
A1 D Q0 P CIE_WA KE#
SST SST39LV088 S A3 23
A2 D Q1
31 SD1
[14 ] P CIE_ WAK E#
1
W AKE # 3.3V _0
2
+3V S
S A4 22 33 SD2 *0.1u_ 04 R14 7 * 0_04 Z2 202 3 4
A3 D Q2 [ 26] BT_D AT BT_DA TA GND 5
S A5 21 35 SD3 R14 6 * 0_04 Z2 203 5 6
A4 D Q3 [ 26] BT_C LK BT_CH CLK 1.5V _0 +1. 5VS
S A6 20 38 SD4 7 8 Z2225
A5 D Q4 [17] W LAN _CL KRE Q# CLKRE Q# UIM_PW R Z2226 T
S A7 19 40 SD5 9 10
A6 D Q5 GN D0 UIM_DATA Z2227 T
S A8 18 42 SD6 11 12
A7 D Q6 [17] C LK_ PCIE _MI NI# RE FCLK- UIM_CL K Z2228 T
S A9 8 44 SD7 13 14
A8 D Q7 [17] CLK _PC IE_MINI RE FCLK+ U IM_R ESE T T
S A10 7 30 15 16 Z2229
S A11 6 A9 D Q8 32 R14 5 1 0K_ 04 GN D1 UIM_VP P T
A1 0 D Q9 +3VS
S A12 5 34
S A13 4 A1 1 DQ10 36 KEY
S A14 3 A1 2 DQ11 39 17 18
S A15 2 A1 3 DQ12 41 19 NC 3 GND 6 20
A1 4 DQ13 NC 4 W_DIS ABLE # W LAN _EN [21 ,23,4 0]
S A16 1 43 21 22
A1 5 DQ14 GN D2 PE RSE T# BU F_P LT_ RST# [1 3]
+3VH8 S A17 48 C 758 0_C 04 Z2 219 23 24
A1 6 [13 ] PC IE_ RXN 1_W LAN PE Tn0 3. 3VAU X +3V
S A18 17 C 759 0_C 04 Z2 220 25 26
A1 7 B IOS_ WR # [13 ] PC IE_ RXP1 _WL AN PE Tp0 GND 7
S A19 16 11 27 28
A1 8 W E# 29 GN D3 1.5V _1 30 Z2205 R151 * 0_04
GN D4 NC( SMB _CL K) IC H_ SMB CLK [9,1 0,14,17,1 8]
R 281 9 28 31 32 Z2206 R150 * 0_04
NC 1 O E# XME MR# [21] [13] PC IE_TXN1_WL AN PE Rn0 N C(S MB_ DATA) IC H_ SMB DAT [9,1 0,14,17,1 8]
10 33 34
NC 2 [13] PC IE_TXP1 _WL AN PE Rp0 GND 8 Z2223 R537
* 120K 13 26 R14 2 0 _04 Z2 204 35 36 0 _04
NC 3 C E# BIOSCS # [2 1] [21,40] W LA N_D ET# GN D11 N C(US B_D -) Z2224 R538 U SB_ PN2 [13 ]
14 37 38 0 _04
Sheet 22 of 41
NC 4 NC 6 NC (US B_D +) U SB_ PP2 [13 ]
R 280 *0 _04 Z 220 1 12 39 40
[2 1,40 ] W RST# RE SET# NC 7 GND 9
15 46 41 42
C 477 47 RY /BY # VS S2 27 43 NC 8 NC (LED _WW AN #) 44 R520 R521
BY TE# VS S1 45 NC 9 LE D_W LAN # 46
ISA BIOS, MINI

NC 10 NC (LED _W PAN #)
* 1u *EN 29LV 800 BT-7 0TC P 47 48 *0_ 04 *0_0 4
NC 11 1.5V _2 +1. 5VS
R32 3 * 0_04 Z2 218 49 50
[ 26] BT_E N# NC 12 GND 10
51 52
[21, 26,40] B T_D ET# NC 13 3.3V _1 +3V S A USB _PP 2 [1 7]
CARD, NEW CARD

+3VH 8 A USB _PN 2 [ 17]
889 11-5204
5
U23
1
[ 21] XME MW# BIOS_W R# +3VS +1.5VS
4
2 C 226 C 247 C 269 C 275
[14] FLA SH#
*74A HC1 G32 0. 1u_0 4 1 0u_0 8 0. 1u_0 4 1 0u_ 08
3
NEW CARD
+3V C 770
0. 1u_04
+3V
5
U 27
1 7 4AH C1G08
[13 ] BU F_P LT_R ST#
4 R54 4 R5 45
2
+1.5 VS +3V S +3 V *100 K_0 4 *10 0K_ 04
3
U2 8 JNE W
21 20 Z2 208 12
A UXI N A UXOUT +3. 3VA UX
6 8 Z2 209 14
5 3 .3VI N 3. 3VOUT 7 15 +3. 3V
3 .3VI N 3. 3VOUT +3. 3V
18 16 Z2 210 9
19 1 .5VI N 1. 5VOUT 17 10 +1. 5V
R36 6 1 .5VI N 1. 5VOUT +1. 5V
*10 K_04 2 9 Z2 211 Z2 213 13
[1 3] B UF_ PLT_ RST# S Y SR ST# P ERS T# PE RST#
Z 220 7 3
+3V S HDN #
4 15 N EWC ARD _DE T# 17
[1 1,14 ,18, 21,2 6,27, 28,4 0] S USB # S TBY # CPP E# Z2 230 CP PE#
14 4
23 C PUS B# PC IE_ WAK E# 11 CP USB #
[1 3] U SB_ OC 5# OC# WA KE#
22 Z2 212 C613 C607 C 605 16
R CLK EN T [ 17] NEW CAR D_C LKR EQ# CL KRE Q#
R388 10K _04
+3V S
1 11 0.1 u_04 0.1u _04 0. 1u_04 19
NC GN D [1 7] C LK_P CIE _NE W_C ARD RE FCL K+
10 25 18
NC GN D [17] CL K_PC IE_NEW _CA RD # RE FCL K-
12
13 NC 24
NC NC C76 0 0 _C04 Z2 221 22
[13 ] PC IE_R XP2 _NE W_C AR D PE Rp0
P2 231 THLB 1 C76 1 0 _C04 Z2 222 21
[13 ] PC IE_R XN 2_NE W_ CAR D PE Rn0
25
[13] PC IE_TXP2 _NEW _C ARD PE Tp0
ENE P2231 pin3,4,15,22 24
[13] PC IE_TXN2 _NE W_C ARD PE Tn0
LP6 5 Z22 16
has internally Z2 214 RE SER VED T +1 .5VS [3 ,5,8, 13,15,28 ]
5 4 3 6 Z22 17
+1 .5VS +3V S +3V [ 13] USB _PP 5 US B_D + RE SER VED T +3 V [ 13,1 4,15, 16,1 8,26,27,2 8,30]
pulled high (170Kohm) 6 3 Z2 215 2
[ 13] USB _PN 5 US B_D - +3 VS [2,5 ,8,9, 10,11,12 ,13,14,15 ,16,17,18 ,19, 20,21,24, 26,27,29 ,30]
7 2
+3 VH8 [2, 11,2 1,26,27,4 0]
8 1 1
GND 20
GND
C6 08 C61 2 C61 6 C M-4M3216-181JT 8 23
[9, 10,14 ,17, 18] ICH _SMBDA T SMB_D ATA GND
7 26
[9, 10,14 ,17, 18] ICH _SMBCLK SMB_C LK GND
0. 1u_0 4 0.1 u_04 0.1u _04
1308 01-1
Ejector : 130851-C
ISA BIOS, MINI CARD, NEW CARD B - 23

Schematic Diagrams
TOUCH PAD, LED
CLICK BOARD FOR M550N LED BOARD
C7 39
+5VH 8 0.1 u_04

C37 6 J LB
+5VS 0.1 u_04 ON _SU S1 1 JL B

AC IN1 2
JTP_15 JTP_ 15
BATT_F ULL 1 3 12 1
1 BATT_C HAR 1 4
TP_CLK 1 4
TP_DATA 2 5
3 +5VS EMAIL1 6
C37 8 C369 4 W LAN1 7
852 01-04 051 HD _LED# 8
22p 22p C 399 BT1 9
? ? ? ? 10
0. 1u_0 4 11
12
852 01-12 051
Sheet 23 of 41
TOUCH PAD LED
TOUCH PAD, LED FOR M540N +5 VH8 +5VH 8
R 220 R219
JTP_14
Z 2301 +5VS *4 70 *470
1 TPBUTTON _R
2 TPBUTTON _L SW2
3 Z 2302 *TC0 31-AA1G-A160T Z230 6 Z2 307
JTP_ 14 4 Z 2303 1 2 R 222 D1 1,D1 2,D15
5
3
1 12 Z 2304 3 4 TP BUTTON _R
6 * 470 1 3 D2 5
7
SG
Y
8 TP_CL K C485 *22 p 2 4 *KP B-30 25YS GC
5
6
9 TP_DATA C487 *22 p Z23 05
10
4
11 +5 VS
A
C12 3 0. 1u_0 4 AC IN1
12
D28
*87 151- 1207 G SW1 ON _SU S1
? ? ? ? *TC0 31-AA1G-A160T *17 -21VG C-TR8
1 2
3 4 TP BUTTON _L HDD/CD-ROM
D
C
LED
D
G Q 89
5
6
[21 ,40] ACI N_LE D
VENDOR PART NUMBER 2 N700 2
G Q88
S
[ 21,40 ] ON _SU S_LED
Synaptics 2N70 02
S
[1 2] H D_LE D#
E-LAN 800409-5102
+5VS +5V S +5 VS +5 VH8 +5VH 8

+5VH 8
R22 3 R22 9 R2 28 R 215 R214

R 289 R288
*470 *470 *4 70 *4 70 *470
10 K_04 10K_ 04
Z 2308 Z 2309 Z231 0 Z23 11 Z2 312 TP_ CLK

TP_C LK [ 21,40 ]
A
3
TP_ DATA
TP_D ATA [21,4 0]
D 27 D29 D2 6
SG
SG
Y
Y
*1 7-21V GC- TR8 *KPB -3025 Y SG C *KPB-3 025Y SGC
4
BT1 BATT_CH AR1
C
E-MAIL LED EMAIL1

WLAN/BT LED WLAN1 BATT_FU LL1
+5V S [1 2,15, 16,17 ,20,2 1,24 ,25,2 6,27]

D
D
+5V H8 [11,2 1,27, 40]
D
D
G Q37 G Q33 G Q 36
[2 1,40 ] EMAIL_ LED [21, 26,40 ] BT_EN [2 1,40] BAT_LO W_LED
2N7 002 2N7 002 2 N700 2
G Q3 4 G Q87
S
S
[21 ,22,4 0] W LAN _EN [ 21,40 ] BAT_FU L_LE D
2N 7002 2N70 02
S
S
B - 24 TOUCH PAD, LED
Schematic Diagrams
AZALIA CODEC AL880

+3VS L46 +5VS_AU D L 43 +5 VS
HC B1608KF -121T2 5 HC B2 012KF- 500 T40 C 15 5
Z 240 1
6 80p
C 749 C747 C 734 C 714 C 750 C 711 C6 71 C 752 C 703 SU RR B-R Z 243 4 3 JSPDI F
L10 FC M1608KF -121T0 6 5
0 .1u _04 10u_0 8 0.1u _04 0.1u_04 0 .1u_0 4 0. 1u_ 04 10u_0 8 1 0u_08 0 .1u _04
4
SPDIF /SUR RB-L L9 FC M1608KF -121T0 6 Z 243 5 2
MIC 1-VREFO- L 1
AU DG C 13 2 2SJ -S870 -010
25
38
4
7
1
9
U 39 SPDIF OUT
R413 6 80p
(SURR_BACK)
DVSS1
DVDD 1
DVDD 2
AVD D1
AVD D2
DVSS2
Z 240 2 2
AUD IO _CH AN GE 3 GPIO0 27 Z2419 C7 18 10u _08 2. 2K_ 04
GPIO1 VREF AUD G
C 720 22p MI C1-L
5 28 MI C1- VR EFO -L
[1 2,2 6] AZ _SD OU T SD ATA-O UT MIC 1-VREFO -L MI C1- VR EFO -R
[1 2,2 6] AZ _BI TC LK R46 6 33_ 04 Z 240 3 6 32 C679
R45 5 39. 2_1% Z 240 4 8 BI T-C LK MIC 1-VREFO- R
[ 12] AZ_SDIN 0 10 SD ATA-I N 29 Z2420 33 0p
[12 ,26] AZ_SYN C SY NC DIGITAL LINE1-VREFO -L JSPDIF, JLINEIN
11 37 Z2421
[12,26] AZ_ RST# RESET# LI NE1-VREFO- R
Z2404 Max: 0.5inch
Z 240 5 Z2422 3
47 30 AUD G
SPDIF I/EAPD MIC2 -VR EF O 31 Z2423
SPDI FO 4 8 LIN E2 -VR EF O 1
SPDIF O 35 FR ON T-L 4
FR ON T-OUT-L F RONT- L [ 25] 5
BEEP R4 34 10 K_ 04 Z2 406 C7 09 1u Z 240 7 12 36 FR ON T-R
PC BEEP FRO N T-O UT- R F RONT- R [25] MIC 1-VREFO- R
R4 37 1K_0 4 39 Z2424
SU R R-OUT-L 41 Z2425 2
C7 06 100p_0 4 Z 240 8 13 SU RR -O UT- R R412
AU DG Se nse A( JD 1) TOP VIEW
Z 240 9 34 43 Z2426
Se nse B( JD 2) C EN -OU T 44 Z2427 2. 2K_ 04
Z 241 0 14 LFE-OU T
Z 241 1 15 LIN E2 -L 45 Z2428 C 708 0 .22u SUR RBACK-L MI C1-R
LIN E2 -R ANALOG SID ESU R R-OUT-L
Sheet 24 of 41
46 Z2429 C 690 0 .22u SUR RBACK-R
Z 241 2 16 SIDESU RR -O UT- R C678
Z 241 3 17 MI C2- L 33 Z2430 R 463 0_04 C 22 9
MI C2- R DC VOL +5VS_AUD 33 0p
Z 241 4
Z 241 5
Z 241 6
18
19
20
CD -L
CD -G ND
CD -R
JD REF
LIN E1 -L
40
23
Z2431
Z2432
Z2433
R 478
C 696 1u
20K_1 %
LIN E-L
LIN E-R
AUD G
AUD G
LIN E- R
L15
6 80p
FC M1608KF -121T0 6
Z 243 6 3 JLI NEI N
5
AZALIA CODEC
24 C 695 1u
AL880
AVSS1
AVSS2
MIC1 -L C6 98 1u Z 241 7 21 LIN E1- R 4
[2 5] MI C1- L MIC1 -R C6 97 1u Z 241 8 22 MI C1- L LIN E- L L12 FC M1608KF -121T0 6 Z 243 7 2
[2 5] MI C1- R MI C1- R R425 R4 26 1
ALC 880 C 18 7 2SJ -S870 -010
LINE IN
26
42
100 K_0 4 10 0K_04
6 80p
(SURR)
AU DG AUD G
AU DG
+5VS
R 454 10K_04 CH SEL
D
L45
H CB201 2KF -50 0T40 R 45 9
G
10K_04 Q80
C 685 0.1 u_04 2 N7 002
S
C 694 0.1 u_04 AUD IO_CH AN GE
Layout Note: C 743 0.1 u_04
[14] ICH _SPKR
U13 pin 1 ~ pin 11 and pin 47 and pin 48 [16] KBC _BEEP C 684 0.1 u_04 BEEP
C 751 0.1 u_04 G
are Digital signals. C 683 0.1 u_04
[19 ] PCMSPK Z2438
The others are Analog signals. C 754 0.1 u_04 SPDI FO D S
C 794 0.1 u_04 Q85 Q7 9

2N7 002 G 2N 7002
Layout Note: AU DG SUR RBACK-L S D C 73 2 0 .22u SPD IF/SUR RB-L
(1)MIC1-L (U13.21) (2)MIC1-R (U13.22)
(3)LINE-L (U13.23) (4)LINE-R (U13.24) Q7 8
G 2N 7002
(5)CD_L (U13.18) (6)CD_G (U13.19)
(7)CD_R (U13.20) SUR RBACK-R S D SUR RB-R
? ? ? ? ? ? AUDG, ? ? ? ? ? ? ?
+5VS & +VIN plane.
R417 1.5 K_ 04 Z 2439 C 682 1u Z 2414

Layout Note: [1 6] CD _L
R416 1.5 K_ 04 Z 2440 C 681 1u Z 2415
[16] CD _G R415 1.5 K_ 04 Z 2441 C 680 1u Z 2416
CD_R & CD_G & CD_L must parallel routing to audio [16] CD _R
Codec. The space must be equal.
+3 VS [2, 5,8,9,10,1 1,12,13,1 4,1 5,16,17,18,19 ,20,21,22 ,26 ,27,29, 30]
R418 R4 23 R 414 C 699 C700 C701
+5 VS [12,15 ,16 ,17,20,21 ,23 ,25, 26, 27]
AUDG
Signal:Space = 1:1 1.5K_0 4 1. 5K_04 1.5K_04 0 .1u_ 04 0.1u_ 04 0.1u _04
CD_R
Signal:Space = 1:1 To
From CD_G AUDIO
CD-ROM Signal:Space = 1:1 AU DG AUD G AU DG AUD G AUD G AU DG
CD_L CODEC
Signal:Space = 1:1
AUDG
AZALIA CODEC AL880 B - 25

Schematic Diagrams
AUDIO AMP, USB2.0

Mini 20 Mil C4 00 47 u/6.3 V_B
R47 5 10K_04 H EAD PHO NE-R
+
C 742 6p +5VS_AMP
+5VS _AMP C40 2 R 212
C 753 1u U 38
Z2501 R477 10K_ 04 Z2502 21 7 680p 1 K_0 4
[24] F RO NT-R RLI NEIN LVdd
Z2503 20 18 R 476
RH PIN RVdd
1 00K_04
Z2504 19 AUD G A UDG
6 RBY PAS S 14 Z25 08 R 473 100K_04 SE /BTL #
C 689 LBY PAS S SE /BTL 16
1 HP /LINE
10u_0 8 12 GN D/HS
13 GN D/HS A UDG LP4
24 GN D/HS FC A3216KF 4-121T03
GN D/HS SPK OUTR+
AU DG 25 22 SPK R+ 1 8
THR EM/ GND R OUT+ SPK OUTR- SPK OUTR+ [ 26]
26 15 SPK R- 2 7
THR EM/ GND R OUT- SPK OUTR- [ 26]
27 10 SPK L- 3 6
28 THR EM/ GND LOUT- 3 SPK L+ 4 5 SPK OUTL-
THR EM/ GND LOUT+ SPK OUTL- [26]
29 SPK OUTL+
THR EM/ GND SPK OUTL+ [ 26]
30
THR EM/ GND
31 11 MUTE_IN
32 THR EM/ GND MU TE IN 9 MUTE_O UT
THR EM/ GND MUTE OU T
33 8
THR EM/ GND SH UTD OWN JSP K_15
SP KOU TR+ JSP K_1 5
AU DG 2 SP KOU TR- 1
TJ 2
NC
17 SP KOU TL-
3
FOR M550N
C 673 1u Z2506 5 23 SP KOU TL+ 1 4

Z2505 R427 10K_ 04 Z2507 4 LHPIN NC 4
[24] F RO NT-L LLIN EIN
4
3
2
1
852 05-04001
A PA2020 ARL ? ? ? ?
? ? ? ? CP1
C 704 6p 8P4 CX180p
C672 47u/ 6.3V _B
HE ADP HON E-L
5
6
7
8
Sheet 25 of 41
R 431 10K _04
C 670 R409
AUDIO AMP,
680p 1K _04
USB2.0 AU DG AU DG
JI NTM IC_1 5
2 1
C 692 +5 VS +5VS L42 +5VS _AMP

0 .1u_04 HCB201 2KF-500T40
JI NTMIC_15
INT_MIC
1
5
U 35 C674 C7 48 C688 C 693 C 744 C787
1 C401
[14] S B_MUTE 2
4 MUTE _IN 0. 1u_04 10u_08 10u_08 0.1u_ 04 0. 1u_0 4 0.1 u_04
2 330p 88 266-020 01
[21,40 ] VO L_MUTE
? ? ? ?
74AHC T1G 32
AU DG
3
JAU DIO
TO AUDIO BOARD
USB CONN. 15 1
+5V S
16 2
C 313 U 10 JAU DIO

4 3
VIN VIN 1 2
1u SE/B TL#
2 HEA DPH ONE -R 3 4
G ND 5 6
HEA DPH ONE -L
5 1 INT_ MIC 7 8
+VC CUS B3 VOU T VO UT +VCC USB 3 9 10
[24] MIC1 -R 11 12 USB_P P3 [ 13] +5 VS [12, 15,1 6,17, 20,21,23 ,24,2 6,27]
C 319 C318 R T97 01C PL C327 C332
[24] MIC1 -L 13 14 USB_P N3 [13]
? ? ? ? 15 16 +VCC US B3
*0 .1u_04 *10 u_08 10u_08 0.1u _04
872 16-1606 C 331 R4 45 470K _04
USB _OC 3# [ 13]
C788 C789 C 790 C791 C792 C 793 R4 60 560K
0 .1u_04
*470p_04 *470p_04 *470p_04 *470p_0 4 *470p_04 *470p _04
B - 26 AUDIO AMP, USB2.0

Schematic Diagrams
MDC, BT, PWRGD, DDB CON
+3V
VCORE PWRGD +3V S +5V

+3VS
+5 V ALAZIA MDC JM DC
12 11 C 666 C6 65 C3 70
R47 5
C45 3 + 7 2 1 0. 1u_0 4 1u *10u_08
R5 2 R 56 *1K_04 6
*0.1 u_04 - U21B J MDC
10 0K_0 4 *2 .49K _1% Z2 605 *GM358 1 2 Z2 607
Q8 3 GND R ESERVE D 4 Z2 608
[12,24] AZ _SD OUT Azal ia_SD O R ESERVE D
D
8
* 2N7002 5 6
[ 12,2 4] A Z_S Y NC GND 3.3 V Ma in/a ux +3V
3 7 8
+ 1 Z 2604 G R184 3 9.2_ 1% Z260 6 9
Azal ia_SY NC GN D
10
Z 2602 [1 2] A Z_S DIN1 Azal ia_SD I GN D
Q5 7 2 11 12
- [12, 24] AZ_RST# Azal ia_R ST# A zalia_BCLK AZ _BITCLK [12 ,24]
D
2N 7002 Z2606 Max: 0.5inch
S
DE LAY _PW RGD [5, 14,29]
C7 1 U21A 8 8018 -120 G C66 4
G R 57 *G M358 ? ? ? ?
4
[17,29] CL KEN #
*0. 1u R51 10p_ 04
*2 K_1 %
S
*100 K_04
[14] VR M_P WRGD
USB BLUETOOTH +V CC_BT
INVERTER CONNECTOR C1 22
JBT
12/09 R2.0A 0. 1u_0 4
+3 V 1
2
Sheet 26 of 41
R54 6 0_04 Z2609
[13 ] U SB_ PN4 Z2610 3
+2.5 VS +3V +3V U43D R54 7 0_04 JB T
14
[13 ] U SB_ PP4 4
74LVC08
[21, 22,40] B T_D ET# 5
12 9
[ 22] BT_ DAT
MDC, BT, PWRGN,

Q2 11 6
[ 22] BT_ CLK BT_EN # 7
G *BS S138 U43 A C 772 13
14
[ 22] BT_ EN# 8

74LVC08
S D Z 2603 1 0 .1u_04 9
DDB CON
[5] BLO N
3 8 7212-09G0 1
7
R534 0_04 2
R3
U 43C
14
100K _04 74LVC 08

7
Z2601 9 +3VS
8 IN V_BL ON
+3V Z2612 10
U43 B R 278
14
[ 21,40] K BC_BKLE N
74LVC08
7
4 R7 1 00K_04 L8
[2 1,40 ] LID _SW #
6 HC B16 08K F-12 1T25
5 1M BT_EN #
[ 14,29] P M_P WROK +3 VS +VCC _BT
D
FROM H8 def HI C4 86 C12 0 C 121
Q 58
7
G 2 N7002 1u 0.1u _04 0.1u_04

[21, 23,4 0] B T_EN
S
TO MULTI-FUNCTION BOARD
+3V S
Q 45
SXUS-6 0-VB -1-P B SS1 38 G R 244 2.2K_04
+3V S
+VI N 60 59 +VIN
CRT_DD CAD ATA D S
58 57 DA C_D DC ADA TA [ 5]
C1 2 C411
56 55 Z2611
54 53 +3 VS
0. 1u 0.1u R 18 4.7K _04 D8 S CS7 51V
52 51 C 11 0.1 u_04 C A
50 49 +5V S
5
1
48 47 +2.5VS
R 19 4.7K _04
VSU B 46 45
CR T_V SY N C 4 2
20mil 44 43 +3V S D AC_ VSY NC [5]
CRT_DD CAC LK D S
+VA 42 41 DA C_D DC ACLK [5 ]
40 39 BAT0_C LK [ 21,40]
C409 0.1u U1 8 Q 44 G R 243 2.2K_04
38 37 BAT0_D AT [ 21,40] +3V S
74AHC 1G12 5 B SS1 38
3
INV _BLON 36 35 CHA G_E N [ 21,40]

34 33 CUR SE N [21] +3V S
[2 1] B RIGH TN ESS 32 31 BAT0_V [21]
30 29 BAT0_TE MP [21]
[13] US B_P N7 28 27 TV_ DAC A_OUT
[13 ] US B_P P7 26 25 TV_DAC A_OUT [5]
TV_ DAC B_OUT
24 23 TV_DAC B_OUT [5]
TV_ DAC C_O UT
[13] US B_P N6 22 21 TV_DAC C_O UT [5] +2 .5VS [8,30]
[13 ] US B_P P6 20 19 +3 V [ 13,1 4,15, 16,1 8,22 ,27,28,30]
CRT_HS Y NC
+VCC _CC D 18 17 +3 VS [2,5,8,9, 10,1 1,12 ,13,1 4,15 ,16,17,18,19, 20,21,22, 24,2 7,29 ,30]
CRT_VS Y NC
[21 ,40] TOTAL_C UR 16 15 +3 VS +3 VH8 [2, 11,2 1,22 ,27,4 0]
DAC _RE D
[2 1] I_CHA RGE 14 13 DAC _RE D [ 5] +5 V [ 15,2 7,28, 29,3 0]
DAC _GR EEN
+3VH 8 12 11 DAC _GR EEN [5] +5 VS [12, 15,16,17, 20,21,23 ,24,2 5,27 ]
5
1
DAC _BLUE
10 9 DAC _BLUE [5] +V A [ 11,27]
CRT_DD CAD ATA
[2 5] S PKOUTL + 8 7 +V IN [11, 21,27 ,28, 29,30,31]
CRT_DD CAC LK CR T_H SY N C 4 2
[2 5] S PKOUTL - 6 5 D AC_ HSY NC [5] +V CC _CC D [17]
[2 5] S PKOUTR - 4 3 SUS B# [11, 14,18,21, 22,2 7,28 ,40] V SUB [11]
[2 5] S PKOUTR + 2 1 AC_IN# [21,40]
U1 9
JDD B1 74AHC 1G12 5
3
J DDB
2 60
1 59
MDC, BT, PWRGD, DDB CON B - 27

Schematic Diagrams
SYSTEM POWER
D7 SCS 355V
A C
+VA +VI N1 Layout Note:
+3 VH 8 Q27 A O3409 D5 SCS 355V
S D +VIN A A C If U21 is adjustable(G916T1UF). So 165K_1% will be
+V IN
150mA C7
G
installed. And C496 will be changed to 100K_1%.
R 16 1 0.01u
R 168 330 K
1 0K_04 +V DD 5
DDON L TO H R 471 0_08

[21,40] PW R_SW # +5V H8
D
FROM H8
DEL PWSEN U 13
G G D D_ON 1 5
[21] P W RS W V IN VO +3V H8
Q29 Q28
D
FROM PWR 2 N7 002 2N7002 2 R 456
S
R 162 C 311 GN D *1 65 K_1%
SW BOARD
G 3 4 Z 27 05
Q26 100K_04 0.1u SD BP
I NS_ BU TTON [21]
2 N7 00 2 G916-3 .3
S
C 727 C 721 C 379 C 377 C 745
1u 0. 1u 10 u_08 0. 1u_0 4 1u
(100k_1%)
Sheet 27 of 41
SYSTEM POWER
+V DD 5 Q71 +5V +V DD 5 Q69 +5V S
A M9 433P AM943 3P
8 8
3 7 3 7
2 6 2 6
C 78 4 C 785 C 786 1 5 1 5
4 4
0 .1u_04 0.1u_04 0.1u_0 4 C 801 0.1u_0 4 C 802 0 .1u_04
R 349 R 54 8 11/21 R2.0A R 335 R 549

11/21 R2.0A
330K 1 00K_1% C 576 C 573 R 339 330K 100 K_1% C 577 C 558 C 579 C 559 C 578 R 346
Z 2703 10u_0 8 0.1u _04 100 K_04 Z 2708 10u_08 0.1u_0 4 0.1u _0 4 0. 1u _04 0. 1u _04 100K _04
D
R 504 R 50 5
100K_ 1% 1 00K_1%
Z 2701 G Z 2706 G
Q73 Q72
C 585 2 N7 00 2 C 570 2N700 2
S
S
0.1u 0.1u
[ 11 ,21,2 8, 40] DD _ON [11,1 4,18, 21 ,22,26, 28,40] SU SB#
+V DD 3 Q62 +3V +V DD 3 Q16 +3V S

A M9 433P AM943 3P
8 8
3 7 3 7
2 6 2 6
1 5 1 5
4 4
C 803 0.1u_0 4 C 804 0 .1u_04
12/05 R2.0A
R 81 R 55 0 R 290 R 551
11/21 R2.0A 11/21 R2.0A
330K 1 00K_1% 330K 100 K_1% C 128 C 133 C 805 C 80 6 R 86
+ +
C 499 C 502 R 296
+3V [ 13,14 ,15, 16 ,18,2 2,26, 28 ,30]
Z 2704 Z 2707 10u_08 0.1u_0 4 150u/4V_ B 15 0u/4V_B 100K _04
+3V S [2 ,5,8, 9,10, 11 ,12,13, 14,15 ,16, 17 ,18,1 9,20, 21 ,22,24, 26,29,30]
10u_0 8 0.1u _04 100 K_04
+3V H8 [2, 11 ,21,22, 26,40]
D
D
R 50 6 R 507
+5V [ 15,26 ,28, 29 ,30]
3 30K 330 K CLOSE TO Q16 +5V S [1 2, 15,16 ,17,20, 21,2 3,24, 25 ,26]
Z 2702 G Z 2709 G
+5V H8 [11,2 1,23, 40 ]
Q12 Q59 +VD D 3 [11,12, 31]
2 N7 00 2 C 490 2N700 2
S
S
+VD D 5 [11,28, 29,31]
R 157 C 129
+VA [ 11 ,26]
0.1u
+VI N [11,21, 26,2 8,29, 30 ,31]
100 K_04 0.1u
+VI N1 [ 31]
B - 28 SYSTEM POWER
Schematic Diagrams
+1.8V, +VTT MEM, +1.5VS
+1.8V,+0.9V +VDD5
+VD D5
CLOSE TO NCP5214
A
D9 R 92
SCS7 51V
C12 4 0 .1u_ X7R _04 10K_04 R8 9
U6 R91 10K_1%
R82 7. 15K_1% EN_ 1.8V P28_VR ON 10 0K_ 04
EN _1.8V 1 16 Z 280 6 Q18
C
VDD QEN OC DD Q +VI N
D
2N 700 2
C 127 C139 C5 01 C 144 R97
G Z 28 19
VTTEN 2 17 Z 2807 0. 1u 10u _12 10u_1 2 0 .1u *20K_1% Q19
VTTEN BOO ST
D
1
JOPEN 5 2N7002
S
+VD D5 R 80 *10K_04
C 118 GN D_FIELD 5 G
Z2801 3 20 C 119 *OPEN 20m il D D_ON [11,21,27, 40]
F PW M# VCC P
R79 4.7u
S
2
5
6
7
8
GN D_ FIELD 5
0 .22u
0_0 4 Q15
Z28 02 4 18 Z2808 R29 5 0 Z2813 4 R QA130N03
C117 0.1u_0 4 SS TGDD Q
L 30
2
3
1
GN D_FIELD5 2 .2uH JOPEN 9
R84 *10 0K_ 04 Z28 03 15 19 Z2809 1 2 8A Z2817 1 2
+3V PGOOD SW DD Q +1.8 V
OPEN_8A
5
6
7
8
JOPEN 3
2 1 1.5A Z28 04 6 21 Z2810 Q61
C151
C 279 C2 91 C173 C 174
+VTT_MEM VTT BGDD Q
C
+ +
4 R QA200N03 1u C 160
Z2 814
Sheet 28 of 41
(+0.9V) OPEN _1.5 A D 39 330u /2.5 V_V *3 30u/2.5V_V 0.1 u_04 0. 01u _04
C49 6 C49 5 4700p
2
3
1
+ +
8 22 SM340A R 93
150 u/4V_B *15 0u/4V_B F BVTT PGN D R301 Z 281 5
+1.8V,+VTT MEM,
4 .3K_1% _04
A
C131 100p_ 04 4.7 R 99
5 12 Z2811
VTTGND COMP C 136 220 0p R87 6.2K_1% 130_1 %
+VDD 5
R83 2.2 Z28 05 11
VCC A F BDD Q
13 Z2816
Z2 812
+1.5VS
C13 0
1u 14 7
VTTREF VTTI
C126 0. 1u_ 04 GN D_FIELD 5 R 94

10 9
C116 0. 1u_ 04 D DQ REF AGN D 3 .3K_1% _04
C 498
C479 0. 1u_ 04
1u N CP5214
PIN 2 3=GND GN D_FIELD5
R283 0
+5V
GND _F IELD5 GN D_FIELD5
GND _F IELD5
R2 86
+VIN 330K R88

VTTEN 100 K_ 04
+5V C 550 C 285 C 277 C 548
D
Q1 3
R352 10 1 0u_12 1 0u_12 0 .1u 0.01 u R5 32 C7 57 2N 7002
G Z 282 0
A
*10K_1% R 287 0.1u
D
1
D 46 JOPEN4 Q14
S
5
6
7
8
*0_04 2 N7002
R 354 SCS551 V Q2 2 G
4 RQ A13 0N 03 +1.5VS *OPEN_20m il SU SB# [ 11,1 4,18,21,22 ,26 ,27,40]
1M
C
S
2
2
3
1
[ 30] EN _1. 05VS
2
U 25 C 571
EN_1 .5V 1 14 Z 282 7 J OPEN10 +5V
EN/ PSV BST 0 .1u _04 OPEN _6A
Z 282 2 2 13 Z 282 8 R14 8 0 Z 283 2 L33
VIN DH 3.3u H R 483
6A
1
Z 282 3 3 12 Z 282 9
VOU T LX 0_04 R9 8
Z 282 4 4 11 Z 283 0 R33 3 1 3.7K_1% R484
VCC A ILI M C295 C551 C 553 C 547 100K_ 1%
C
5
6
7
8
+ +
Z 282 5 5 10 100 K_ 04
FBK VDD P D4 4 220u/ 4V_ V 220u/ 4V_V 0. 1u_04 0.1u_04 EN_1.5V
Z 282 6 6 9 Z 283 1 Q 66 4 C583
PGOOD DL
D
C5 97 C 596 SM340 A R343 Q9 0
7 8 C56 1 RQ A200N 03 100 p_04 R5 33 C1 46 2N 7002
2
3
1
1u 0. 1u GN D PGN D 20K_1% G Z 282 0

A
SC14 70 0.1u_04 *10K_1% 0.1u
D
1
JOPEN13 Q91
S
R34 2 0 2 N7002
G
GND _F IELD 2 GND _F IEL D2 *OPEN_20m il SU SB# [ 11,1 4,18,21,22 ,26 ,27,40]
GN D_ FIELD 2
S
2
C 582 0.1u_0 4
R344
+1.5VS [3,5 ,8,1 3,15,22] C 560 0.1u_0 4
R 347 *100K_0 4 10K_1%
+1.8V [5 ,7, 9,10] C 600 0.1u_0 4
+3V +3V [13,14, 15, 16,1 8,2 2,26,27,30 ]
+5V [15,26, 27, 29,3 0]
+VDD 5 [11 ,27, 29, 31] GN D_FIELD 2 GN D_FIELD 2
+VIN [11,21,26 ,27 ,29, 30, 31]
+VTT_MEM [9,1 0]
+1.8V, +VTT MEM, +1.5VS B - 29

Schematic Diagrams
+VCORE
+5V
Q4 9 Q48 +VIN
C 22 RQA13 0N 03 R QA130 N03
A
<VALUE > D35
SC S55 1V R 41
5
6
7
8
5
6
7
8
<VAL UE> C 47 C2 0 C 44 C 446 C4 31
+VD D5 +5V
C
JO PEN1 +VI N 4 4 <V AL UE> <VALU E> <VA LU E> <V AL UE> <VALU E>
*OPEN_ 30 mil BST1
1 2
2
3
1
2
3
1
V-RC 1
C4 18
C41 9 <V AL UE >
R32
<VALU E> <VALU E>
R 24 5 * 0_04 R3 1 Z 2905
Z 290 4
R 29 * 0_04 Z2 901 <VALUE > C42 1 <VALUE > Q4 7 Q46
[2,1 2] H_ DPRS TP#
[5 ,14] P M_DP RSLPVR R 33 4 99 _1%

EN _VCO RE
Z2 902 TG1
R247 RQA20 0N 03 R QA200 N03
L24 0 .5uH 18A
close to IMVP6
VPN1
+3 VS DR N 1 <VA LU E>
BG 1
D RN 1
Modified in
5
6
7
8
5
6
7
8
I SH
checklist
C
Rev 1.501 4 4 D3 4
44
41
37
43
42
40
39
38
36
35
34
R 25 0 C 420
<VALUE > SM340A
D RN 1
VPN 1
2
3
1
2
3
1
EN
NC
DPRSL
V IN1
BST1
TG1
BG1
V5 _1
ISH
<VAL UE>
C 25 1 00p _04
A
C LKEN # 1 33
R 252 3 0.1 K_1% R3 7 13 0K_ 1% [17 ,26] C LKEN # VREF 2 C LKEN # C S1+ 32 CS1N
Sheet 29 of 41 H YS 3 VREF C S1- 31 CS2N +VC OR E
C S1N
HYS U20 C S2-
R 38 * 100K_ 1%
[3] H_VI D6
C LSET 4
5 C LSET
VID 6
C S2+
ER RO UT
30
29 Z2906 R 246 <VALUE> 36A
R2 53 13 0K_ 1% 6 28 VC CA
+VCORE
[3] H_VI D5 VID 5 VC CA
C 30 1 00p _04 [3]
[3]
H_VI D4
H_VI D3
7
8 VID 4
VID 3
SC452 AG ND
D AC
27
26 DAC R4 0
[3] H_VI D2 9 25 SS <V ALU E>
C 18 1 000 p 10 VID 2 SS 24 C4 37 R 248 <VALUE>
[3] H_VI D1 VID 1 DR P+ 1
11 23 C44 0 C 35 C 457 C441 C4 29 C 436 C 46 6 C46 9
[3] H_VI D0 VID 0 D RP- E-R C 10 0p_ 04 + + + + + +
C S2N
PW RGD
D RN 2
+3 VS C50 <VALU E>1 u
VPN 2
470 u/2.5V_V
470u/2.5 V_V
* 470 u/2.5V_V
470 u/2 .5V _V
470u/ 2.5 V_V
*470u/ 2.5V _V
BST2
VIN2
V5 _2
PSI #
G ND
2
TG 2
BG 2
F B+
+VIN
FB-
Q 51 Q50
<VALU E> C 28 R QA13 0N0 3 RQA130N 03
R 25 7
12
15
19
45
VPN2 13
14
16
17
18
20
21
22
<VA LU E>
<VALUE >
C21 C 48 C2 4 C 45 C2 3
[5 ,14,26] D ELAY _PW R GD R 256 0 _04 Z 290 3 VR EF
5
6
7
8
5
6
7
8
<VAL UE>
<VAL UE>
<VALU E>
<VA LU E> <V AL UE>
R 49 10 F B+ 4 4
[3] VC CSEN SE R 48 10 F B-
[3] VSSSEN SE
2
3
1
2
3
1
[2] PSI#
D RP -
D RP +
R 251
R2 59 CS2P Z 290 7
C43 4 <VAL UE>
D RN 2
<VALU E> <VALUE> Q 55 Q56
TG2
R2 60 <VALU E>
R QA200 N0 3 RQA2 00 N03
L25 0 .5uH 18A
+3VS BG2
C
5
6
7
8
5
6
7
8
DR N2
D 37
R258 4 4
C45 5 SM340A
<VALU E> C 45 4
2
3
1
2
3
1
<VALU E> +5V
A
V-R C2 < VA LU E>
+VI N
BST2
R 61 R26 7
TH1, TH2
C
? ? =0603 D 36 10K_ 04 10K _04
CS 1N
SC S5 51V Z 290 8 EN _VCO RE
R2 61 TH 2 +5V
D
1
Q53
A
DR P_ L1 2 1 2N7 00 2 R 531
C 45 6 [ 21, 40] KBC_VR ON R5 9 *0 _04 VR _O N G J OP EN 2 G
<VAL UE> * OPEN_ 20 mil *1 0K_ 04
R2 55 100K_TH R249 <VALU E> <V AL UE > R6 0 0_04 Q9
S
2
D RN 1 [1 4,26] PM_PW R OK 2N 700 2
C 57 33n
<VALU E>
R43 <VA LU E>

DC R_DR 1 D RP+
R46 <VA LU E>

+3 VS [2, 5,8 ,9,10,1 1,1 2,1 3,14,1 5,16 ,17,18 ,19 ,20 ,21,22 ,24 ,26 ,27, 30]
DC R_DR 2 +5 V [ 15, 26, 27,2 8,3 0]
+VDD 5 [ 11, 27, 28,31]
R5 0 R 35 <VALUE> C 51 0. 1u_ 04
D RN 2 C4 49 R 25 4 +VCO RE [3 ]
C 19 33n C 43 0. 1u_ 04 +VIN [11 ,21 ,26,27 ,28 ,30, 31]
<VALU E> <VALUE >
R3 4 TH 1 <VA LU E> C 14 0. 1u_ 04
DR P_ L2 2 1 R4 2 1 2 0_08
D RP-
<VAL UE>
100K_TH
C S2 N
B - 30 +VCORE
Schematic Diagrams
+1.05VS, +2.5VS
+VIN
+5V
C263 C541 C540 C256
R351 10
10u_12 10u_12 0.1u 0.01u
A
D45
R353
SCS551V
1.5M
5
6
7
8
U26 C556
EN_1.05VS 1 14 Z3004 R133 Q21
[28] EN_1.05VS EN/PSV BST 0 0.1u 4 RQA130N03
Z3001 2 13 Z3005 Z3009 L32 1.05VS
VIN DH 1.5uH JOPEN8
9A
2
3
1
3 12 Z3006 1 2
VOUT LX +1.05VS
Z3002 4 11 Z3007 R332 6.49K_1% OPEN_9A
VCCA ILIM C543 C544 C581 C580
C
5
6
7
8
Z3003 + +
5 10
FBK VDDP Q65 D43 *220u/4V_V 220u/4V_V 0.1u_04 0.1u_04
Z3012 6 9 Z3008 4 RQA200N03
C598 C595 PGOOD DL SM340A C574 R341
7 8 C557
2
3
1
1u 0.1u GND PGND 47p 11K_1%
A
SC1470 0.1u_04
? ? ? ? V size=D size H=1.9mm
R337 0
? ? ? ? Sheet 30 of 41
GND_FIELD4 GND_FIELD4 GND_FIELD4 +1.05VS, +2.5VS
R340
10K_1%
R348 *100K_04
+3V
C594 0.1u_04
GND_FIELD4
C552 0.1u_04
C599 0.1u_04
GND_FIELD4
+3VS
R149 C549
10K_04 10u_08
U9
8 1 Z3010
GND EN
7 2 +2.5VS
GND VIN
6 3 1A
GND VO
5 4 Z3011
GND ADJ R143
SC1565
51K_1%
C274 C276 C278

+1.05VS [2,3,4,7,8,12,15]
10u_08 1u 0.1u_04
+2.5VS [8,26]
R140
+3V [13,14,15,16,18,22,26,27,28]
+3VS [2,5,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,26,27,29]
47K_1%
+5V [15,26,27,28,29]
+VIN [11,21,26,27,28,29,31]
+1.05VS, +2.5VS B - 31
Schematic Diagrams
+VDD3, +VDD5
+V IN V+ +VL +VIN
2A +VIN1
R 30 8 0
2A
C125 C 497 C 522 C113 C520 C225 C533
A
10u_12 10u_ 12 0. 1u 0.01u D 10 0.1u D 11 C169 C149 10 u_12 10u_12
C50 6 C5 07 C509
+VDD 3 SC S551V SC S551V 10u_08 0.1u_04
0.1u_04 0.1u_04 0.1 u_0 4
6
5
+VDD 5
C
23
U7 C 201 C 200 C199
5
6
JOPE N12 C 143 0.1u
VIN
Q60A 4 Z 3101 24 20 0.1u_04 0 .1u_04 0.1u _04
BOOST1 IN TV CC
1
SI48 34 C 183 0.1u JOPEN7
OPEN _4A R 85 L29 Z 310 3 Z 3102 26 17 Z3114 4
TG1 BOOS T2
4A 1 0m_25 4.7uH_BC IHP 073 5 R298 0 Q64A
3
Z 3104 25 14 Z3115 R 325 0 Z3116 SI 4834 L31 R1 22 OPEN _4A
SW 1 TG2 4. 7uH _BC IHP 073 5 10m_25
4A
2
Z 3105 22 15 Z3117 4A
BG1 S W2
8
7
7
8
C 503 C504 C50 8 C 500 Z 3106 30 18 Z3118
+ +
C141 SENSE 1+ BG2
*150u/4V_B 150u/4V_B 0.1u_04 0 .01u _04 R303 C15 7 2 Z 3107 31 12 Z3119
1000p SENSE 1- SE NSE 2+ 2
60.4K_ 1% *100p Q60B 1 11 Z3120 R 112 C 196 C20 5 C202 C532 C 531
SI48 34 VOSEN SE 1 SENS E2- Q64B
+ +
1
3 9 Z3121 C182 SI 4834 105K _1% 2200p 0.01u_04 0.1u _04 150u/6. 3V_D *150u/6.3V_D
1
PLLIN V OSENS E2
GND
1000p
R3 07 1 5K_1% Z3108 C517 1000p 8 Z3122
Z3109 Z 3110 5 ITH2
R300 C14 8 ITH 1
Sheet 31 of 41
C 172 33p 7 27
C147 0.1u_04 18.2K_ 1% 33p 3.3VOU T P GOOD C 181 100p_04 Z3130 R 108 15K _1%
10 R 111
NC
C505 0.1u_04 GN D_F IELD Z 3111 21 16 C 519 33p
+VDD3, +VDD5,
EXTVC C NC 29 19.6K _1%
C167 0.1u_04 R 101 *0 NC 32
+VD D5 NC
GND _F IELD R 297 1M GND _F IELD
C161 0.1u_04 Z 3112 4 28 Z3123
FC B RU N/S S1 V+
R 311 1M GN D_F IELD
C156 0.1u_04 13 Z3124
RU N/S S2
R 306 *0 R 102 0 Z 3113 2
+VL +VL PLLFLTR
GND _FIELD
6 19 C 521
R 103 R 304 SGND PGND C142
FCB:0V for continuous mode PLLFLTR:0V for 220KHZ 0.1 u 0. 1u
*0 *0 LTC 3728LXC UH ? ? ? ?
Open for burst mode 5V for 640KHZ
R310 0
5V for constant mode
GN D_FIE LD
GN D_F IEL D GND _FIELD GND _FI ELD
M1 M2 M3 M4 M5 M6 M7 M8
M-MAR K1 M-MARK1 M-MA RK1 M-MA RK 1 M-MARK1 M-MARK1 M-MARK 1 M-MAR K1
H16 H 19 H18 H 10 H15 H2 0 H14 H 12 H9 H8 H 17 H 21 H 22 H1 H2 H3 H7 H11 H 30

2 9 2 9 2 9 2 9 2 9 2 92 9 2 9 2 9 2 9 C 67D 67 C 158D15 8 C 158 D158 C 158D158 C158D158 C 67D 67 C 67D 67 C296D111 C 237B128D107
3 8 3 8 3 8 3 8 3 8 3 83 8 3 8 3 8 3 8
4 1 7 4 1 7 4 1 7 4 1 7 4 1 7 4 1 74 1 7 4 1 7 4 1 7 4 1 7
5 6 5 6 5 6 5 6 5 65 6 5 6 5 6 5 6
MTH 296 D111A MTH296D111 MTH 296D 111 MTH296D 111 C296D1 11N C29 6D111N C 296D111N C2 96D 185N C355C H512B296D 111 NC355C H512B296D 111N
H32 H31 H 28 H 23 H25 H27 H26 H2 4 H13 H29 +VDD 3 [11,1 2,27]
C237D 107A C23 7D107A C 237D107A C 237D83A C367B158D158 C237D 91 C367B158D158 C3 67B 158D15 8 C237D 91 C237B128D107 M1 0 M11 M13 M9 M14 M12
M- MAR K1 M-MA RK1 M-MARK1 M-MARK1 M-MA RK 1 M-MARK 1 +VDD 5 [11,2 7,28,29]
+VIN [11,21, 26,27,28,29 ,30]
+VIN1 [27]
B - 32 +VDD3, +VDD5
Schematic Diagrams
D/D BD (CRT, S-VIDEO, RJ-11)
CRT MCR T1
DS0 1A91-MD 221- 7F
M_RE D MR ED 1 MR 20 10K _1% MD13 SCS 751V

M_GR EEN 9 PR 100_ EN Z 3202 C A MLP 2
M+3V S
MGRN
AC
M_BL UE 2 FCA 3216 K4-1 21T0 3
AC
AC
10 MC8 5 0 .1u_ 04 MH S 4 5 M_H SY NC
MGN D
MD1 MD 2 MD3 MB LU 3 MB LU 3 6 M_B LUE
11 MUSB _PP 7_R 12/15 R2.0A MV S 2 7 M_V SY N C
BA V99 BA V99 BAV 99 MUSB _PN 7_R 4 MID 3 1 8 M_D DC ACLK
MR3 MR1 MR 19 MC 14 MC11 MC 12 MC 7 MC5 MC3 12 MID1
C
A
A
5
150 _1% 1 50_1 % 15 0_1% 22p _04 2 2p_ 04 22 p_04 22p _04 2 2p_ 04 22p_ 04 13 MHS
MGND MGN D MGND 6 1 8
14 MVS MGRN 2 7 M_G RE EN
7 MID 1 3 6 M_D DC ADA TA
15 MID3 MR ED 4 5 M_R ED
8
MGN D MLP1
GN D1
GND 2
M+2 .5VS
MC 6 MC4 MC2 MC 1 FC A32 16K4 -121 T03
100 0p_ 04 220p _04 2 20p_ 04 100 0p_ 04
MGN D MGN D MGND MG ND MGN D
M+3VH 8
CCD M+VCC _CC D
MR5 4 MC 86 0.1u MJ CCD 1

MGND
Sheet 32 of 41
JCCD
1
10K_ 04
MAC_ IN#
MU SB_PN6
MU SB_PP6 2
3 1 5
S-VIDEO
4
D/D BD (CRT, S-
MS-VI DEO 1 ML5
5
D
ML4 7
MR 57 1M 8 5204 -050 01 FC M16 08K F-12 1T06 RS VD 3 L1Z32 05FCM160 8KF -121 T06 L2 MTV _DA CB_ OUT
Z 3203 G MQ1 0 MTV_D ACC _OU T
L2 Z3204
L1 4 S -C_ C-PR
M+V A S-Y _C- Y
VIDEO, RJ11)
2N7002 MGN D 1
2 IR TNB MC 40 MC4 7 MR 22
S
MR 58 MR 21 MC 43 MC 42 IRTNC 5
6 CV BS_ C-PB 6p 6p 150 _1%
Aug -02 2005 Change IRTNA
GN D2S
S
200 K_1 % 150 _1% 6p 6p
GND 1
C10 878- 107A 5
MGN D MGND FOR CRT ESD MGND

ML6
L1Z32 06FCM160 8KF -121 T06 L2
MGND
MU1 MGND MTV _DA CA_ OUT

5 1
M+3V S VP NC
Bridge Battery Connector
2 MC 41 MC4 8 MR 23
MVSU B VN
MJB B1 MUSB _PN 7_R 4 3 MUSB _PP 7_R Layout Note: 6p 6p 150 _1%
JB B CH2 CH 1 MGND
2
C M12 13-0 2ST
2 1 L1 : Trace Length Max=0.5"
1
852 04-0 2R
CLOSE CRT CONNECTOR MGND
L2 : Trace Length Max=0.2"
MGN D
M+V IN M+3 VS M+V IN MC 84 MTV _DAC A_OUT

M540N SPEAKER
*0.1 u
MGND
M+3V S
FOR M540N CONNECTOR
MTV _DAC B_OUT
MTV _DAC C_ OUT
8
3 MR 59
AC
AC
AC
+ 1 MR6 0 MJS PK_ 14 JSP K_14
2 *15 K_1% MD D-S PKL +
- MR6 1 *10K _04 MD D-S PKL -
4
4 MD 4 MD 5 MD6
MU 5A M+3.1 429 V 5 *100 K_04 MD D-S PKR - 3 BA V99 BAV 99 BAV 99
MDD B1 *G M358
+ 7 Z3 201 Z32 10 PR1 00_E NA MD D-S PKR + 2
C
A
A
4
S PUF Z-60S2- VB-1-R P R10 0_E N 6 1 1

-
D
4
3
2
1
M+VI N MGN D *85 204- 0400 1 MC8 MC10 MC 9
60 59 MU 5B MCP 1
58 57 MR 62 *GM358 MR 63 G MQ1 1 *8P4 CX180p
56 55 M+V IN *2N7002 0 .1u_ 04 0. 1u_0 4 0.1 u_04
54 53 *30 0K_1 % *10 0K_0 4
S
52 51
MGN D MGND MGND
5
6
7
8
50 49 M+3VS M+3 VS M+3V S
48 47 M+2.5V S
MVS UB 46 45 MGN D MGN D MGN D MGND MGND
44 43 M+3VS
M+VA 42 41
20mil 40 39 MBA T0_ CLK [33 ] INVERTER CONNECTOR
38 37 MBA T0_ DAT [33 ] M+VIN
MC83 ML 1
MBLON 36 35 MCH AG_EN [33 ] PR1 00_E NA * 0.1u _04 HC B2012K- 500T40
MBR IGHTNES SH8 34 33 MCU RS EN [33]
32 31 MBA T0_ V [3 3] MGND
MU 4
30 29 MBA T0_ TEMP [3 3]
MUS B_PN 7 1 8 MC16 MC15 MC 22
28 27 MUSB _PN 7_R 1 OE V CC M+3VS
MUS B_PP 7 MTV_D AC A_OU T 2 7
26 25 MUSB _PN 7 1A 2OE MUSB _PP 7_R
MTV_D AC B_OU T 3 6 10 u_1 2 0 .01u 0.01 u
MUS B_PN 6 24 23 MTV_D AC C_O UT MDD B 4 1B 2B 5 MUSB _PP 7
22 21 G ND 2A
MUS B_PP 6 2 1 MJIN V M+3V H8 [ 33]
20 19 M_HS Y NC *S N74C B3Q330 6A MG ND MG ND MGN D Z32 07 J INV
M+VCC _CC D 18 17 1 M+VA [33 ]
M_VS Y NC MGN D M+VIN [3 3]
[3 3] MTOTAL_ CUR 16 15 2 6
M_RE D ML3
[33] MI_ CHA RG E 14 13 3
M_GR EEN FCM160 8KF- 121T06
M+3VH 8 12 11 4
M_BLU E Layout Note: MB LON Z32 08 1
MDD -SPK L+ 10 9 M_DD CAD ATA MR 64 0 _04 MB RIG HTN ESS H8 Z32 09 5
MDD -SPK L- 8 7 M_DD CAC LK MUS B_P N7 MU SB_ PN7 _R ML2 6
6 5 Co-layout
MDD -SPK R- MR 65 0 _04 FCM160 8KF- 121T06 MC 17 MC 18 85 204-0 600 1
MDD -SPK R+ 4 3 MAC_ IN#
MSU SB# [33 ] MUS B_P P7 MU SB_ PP7 _R under MU4
2 1 10 0p_0 4 100 p_04
MGN D MGND
60 59 MGND MGN D MGND
D/D BD (CRT, S-VIDEO, RJ-11) B - 33

Schematic Diagrams
D/D BD(CHARGER, DC IN)

CHARGER MC 67
M+V A
2.5A
MQ7
SI 4835
8
ML9
47uH _BC RH 124
MC53 2.5A MR 26 100m _2 5 MD 14
M+VB
S M340A MF 1 7A
15u/25V_D 3 7 Z3309 15 u/25V_D Z3310 Z3311 A C Z3 312
2 6
C
1 5
A
1
MQ8 MC 64 4 MD19 MC73 MC 49 MC 45 MC 44
+ + + +
D TA1 14E UA E MD18 MR 29
MJ OPEN1 0.1u S M34 0A 0.1u 0.1u 0.1u 0.1 u
*OPEN B S CS355V 100K_1%
C
A
2
Z3301 MR27 5. 1 Z3306
C
Z3302 MGND MGND MGN D Z 3304 Z3307 MGN D MGN D MGND MGND MGND MGN D MGN D
MR 55 MC7 4 MC 61 MR 51 MR 45
10K_0 4 C 10u/25V_ D 1 0u/ 25V_D
[32] MC HA G_ EN Z33 03 B MQ9 MR31 MR32 1K _1% 1K_1%
2
E
DTC114EU A 2K_08 2K_08 MC5 9 MR28 MZ D1
MR56 MC76 C Z 331 3 Z3314
Z 3305 B 0.01u 0 *ZD 9.1V
* 10K _04 0 .1u MQ4 E
2SD 1782KR
1
MR52 MC78
12/15 R2.0A MGND MGND
M+V B MGND MR5 *R C A Z3308 49.9K _1% *0.01u_04
MJOP EN 2
1 2 MGND MD 17 S CS355V M+VA
*OPE N
M+VB B MC71 0.1u_04 MGND MGN D
MQ6
8
DTA 114EU A MR3 6 102K_1 % Z 3316 MR48
E C Z 3317 40.2K _1% 3 MC 30
Z 3318 Z 3315 1 +
MR3 7 *1M 2 *0. 01u_04
-
MR 41 MU 3A
16
13
10
15
14
12
11
9
MC2 7 MC28 MR 47 GM358
Sheet 33 of 41
4
Z3319 2K _1%
C2
2IN +
2I N-
E2
E1
VC C
R EF
OU T
M+3 VH 8 0.1u_04 0.1u_04 10K _1%
C MC 65 MR 35 MR 34 MGND
D/D BD(CHARGER,
B MR42 MR4 6 49.9K_ 1%
MQ5 0.1u_04 25.5K _1% 1.5 M MU2 MC72
ED TC 114EU A TL594
1 00K _1% 1u MC2 9 *0. 01u_04
DC IN)
MGN D
1IN +
DT C
GND
1I N-
F BK
MR 43
RT
CT
C1
MGND MGN D
*R
8
MCU RS EN [32 ]
Z3321 M+3V H8
M+VBB MGN D MR39
M+V2.5 MR33
10K_04 100K _1%
MR50 Z3322 MI_ CH AR GE [32 ]
C
MC 24
Z3 320
C
30K _1% MC68 0.1u_04 Z3323 MD12 MD1 0 MD7 MR7 MR 6 MR 2
MC 77 Z3324 MC69 MR 40 MJOP EN 3 *OPEN
R 0. 1u_04 MR 38 1 2 M+V2.5 S CS355V SCS 355 V SCS3 55V 10K _04 2.2 K_1% 2. 2K_1% MB AT
MB AT0_V [32]
0.1u_04 *0.1u_04 *402K_1%
Z33 26
MD 21 MC70 MC 25 *24 .9K_1% 1
12/16 R2.0A
A
[ 32] MB AT0_C LK 2
C
MR53 MC 79 TL431
A
Z3328 [ 32] MB AT0_D AT 3
0. 1u_04 0.1u_04 MD20 MR 44 MC75 MR49
[3 2] MBA T0_TEMP 4
D
6.8K _1% 1u MGND MGN D
MGND MGN D SCS 355V 2.2 K_1% 10 00p 1 2K
5
C
MR 9 G Z3 329 MR11 * 10K _04
MS USB # [32]
10K_04 MQ1 MD11 MD9 MD8 MC23 MC 21 MC 13 BTD-05TI1G
A
MGND MGN D *2N 7002
S
Z 3327 MC26 MR 10 S CS355V SCS 355 V SCS3 55V 30p 30p 30 p
*0.1u_04 *100K_1%
A
MGN D
MGND MGND MGN D MGND

MD16 SM1040D 1
MD C- JAC K ML8 0_1 2 M+VA A2 M+V IN M+VB
2D C-G213-B2 00 MR4 100m _25
MV A+ ML7 0_1 2 Z3330 A1 C
1
2 MR24 100m _25
GN D1 MC 63 MC 60 MC 56 MR 30 MC 58 MC6 2 MC81 MC 82 MC66 MC 80 MC 31 MC33 MC 51 MC52 MC19 MC 20 MC50
GN D2
MC 37 MC46 MC5 5 MC 38 MC 39 MC54 MC57 MR 25
GN D3 0. 1u 0.1u 0.1 u 10K _08 0.1u 0.1u 0.1u 0.1 u 0.1u 0. 1u 0.1u 0.1u 0.1u 0.1u 0. 1u 0.1u 0.1u
GN D4 0.1 u 0. 1u 0.1u 0.1u 0.1u 0.1u 0.1u 10K_08 MR13 MR12
10K _1% 10K _1%
MGN D MGN D MGN D MGN D

Z3 331 Z3332 MGND MGN D
MGND MC 32 MD15 03A04 MH3 MH4

MR 14 MR 8 A C C 276D111 C 256D130
MC 35 M+VA 100K_1% *0. 1u M+VB
1u _0 8 10K_08
4
MGND
5 1
MR17 MGN D MGN D 6 2
10 K_1% 5 MGND MQ2 7 3
7 + SI4835 8
M+3V H8 [32 ]
[ 32] MTOTAL_C UR M+VA [32]
6 8 MGND MGND
- 7 3
M+VIN [3 2]
MC36 MR16 MU3 B 6 2
GM3 58 MQ3 5 1
1 u_0 8 *40. 2K_1% *SI4835 4 MH 2 MH 1
MGND 2 9 2 9
3 8 3 8
Z3325 MR 15 100K_ 1% 4 1 7 4 1 7
5 6 5 6
MGND
MC 34 * 0.1u MTH 276 D1 11 MTH 276D111
MGN D MGN D MGN D
B - 34 D/D BD(CHARGER, DC IN)

Schematic Diagrams
AUDIO BD(JACK, RJ-11, USB)

RJ-11 PLANE DIGITAL PLANE
PJL3
HCB3216 KF-8 00T30 PJU 2
Z 3404 5 1
PJ +VC CUSB3 VP NC
? ? ? ? ? ? ? ? ? 4
VN
2
3
CH 2 CH 1 PJG ND
? ? 2.5mm ? ? *CM1213-02S T
P JUS B2
1
VCC
PJM ODEM PJ L4 GN D1
2 1 PJU SB_PN3 4 3 Z 3405 2 GN D1 GN D2
DATA- GN D2 GN D3
PJU SB_PP3 1 2 Z 3406 3 GN D3 GN D4
PLW 321 6S161SQ 2 DATA+ GN D4
PJC4 PJ C3 4
+ GND
MODEM RJ-11
10 0u/6.3V_B 0.1u_04
PJ L9 U SB- 04R MX
PJMODE M BK212 5HS121_0805 PJRJ -11
Z3401 Z 3403 1 PJG ND PJG ND P JGN D PJ GND
1 Z3402 Z 3414 2 TIP
2 PJ L10 RIN G
85204-02 00 BK212 5HS121_0805
Sheet 34 of 41
PCB Foo tprint = 85204-020 0 C 10146-102A4-L
P IN G ND 1~4=PJG ND
AUDIO BD (JACK,
PJAU DIO
RJ11, USB)
PJ H1 PJH 4 PJH 3 PJ H2 PJH 5
12 1 2 9 2 9 2 9 C67D67 C67 D67
3 8 3 8 3 8
4 1 7 4 1 7 4 1 7
5 6 5 6 5 6
PJGN D P JC9 0 .1u_04 MTH 296D111 MTH 296D 111 MTH237D 111
PJG ND PJG ND P JGN D P JGN D
PJG ND
PJAUD IO
12 PJU SB_P N3 PJ +VC CUSB3
11 PJU SB_P P3
10
9
8 PJLF E
ANALOG PLANE 7
6
5
PJIN T_MIC
PJMIC1
4 PJSE /BTL#
3 PJH EAD PHO NE-R
2 PJH EAD PHO NE-L
1
87213 -1200
PJ AUD G
PJHP, PJMIC
3
1
4 5
P JAU DG
2
PJAU DG TOP VIEW
PJ C7 PJR 1
PJ C5
PJL 7 680p 1K_04
P JR4 330 FCM1608KF-121T06 680p
PJ HEA DPH ONE-R Z3407 Z3409 3 PJHP PJLF E Z3411 3 PJMIC
5 P JL5 FC M1608KF -121 T06 Z3412 5
PJ SE/B TL# PJIN T_MIC PJR 3 0 _04
4 4
PJ HEA DPH ONE-L Z3408 Z3410 2 PJMI C1 P JL6 FC M1608KF -121 T06 Z3413 2
PJL 8 1 1
P JR5 330 FCM1608KF-121T06 2SJ-S 8701N13 PJ C6 2SJ- S870 1N1 3
PJ C8 PJR 2 HEADPHONE 680p
MIC IN
680p 1K_04 (FRONT_OUT) (CENTER/SUB_W)
PJAU DG P JAU DG
P JAU DG PJAUD G
AUDIO BD(JACK, RJ-11, USB) B - 35

Schematic Diagrams
HOT KEY BD(HOTKEY, LED)

FOR M540G P S +5VS P S+5 VS PS +5VS PS +5VS
POWER NUM LOCK CAPS LOCK SCROLL
SWITCH LED LED LOCK
PSR 4 LED P SR 1 P SR 3 P SR 2 LED
470 LED8 4 70 LED4 470 LED5 4 70 LED6
P SD 8 * KP C -3216QB C-C PS D4 * 17 -21V GC-TR 8 P S D5 * 17-2 1VGC- TR 8 P SD 6 * 17 -21V GC- TR 8
Z 3501 A C Z 3502 A C PSN U M_ LED Z 35 03 A C P SC A P_LE D Z 3504 A C PSS CR OLL_LE D
LED7 LED1 LED2 LED3

P SD 7 K PC-32 16QBC -C PS D1 17-21 VGC -TR 8 P S D2 1 7-21V GC -TR 8 P SD 3 1 7-21VGC -TR8
A C A C A C A C
PSGN D
FOR M550G
Sheet 35 of 41 FOR M540G
HOT KEY SW2
P S SW 2
SW4
P SSW 4
SW6
PS SW 6
SW8
PS SW 8
BD(HOTKEY, LED)
* TC 0 17 -BB 1J-X1 60T * TC 017-BB1 J-X160 T * TC 017-B B1J- X160T * TC 017-BB1 J-X160T
1 2 P SW E B0 1 2 PSW E B1 # 1 2 P SW E B2# 1 2
P S+V IN
3 4 3 4 PSW1~8 3 4 3 4 PS PW RSW
P S+VIN
PSC 2 P SC 3 P SC 4
3 1 P SC 5
0.1u_0 4 0 .1u_04 4 2 0.1u _04
5
6
5
6
5
6
5
6
0.1u
P SGN D PSGN D PS GN D
PSGND PS GND PSGN D
SW1 SW3 SW5

SW7
P S SW 1 P SSW 3 PS SW 5
TC 017-B B1J -X160T TC 017-BB 1J -X16 0T TC 017-B B 1J -X160T PS SW 7
1 2 1 2 1 2 TC 017-B B 1J -X16 0T
3 4 3 4 3 4 1 2
3 4
5
6
5
6
5
6
5
6
PSGND P SGN D PS GN D
PS GND
FOR M550G
LID SWITCH IC
LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 MR SENSOR
FOR M540G FOR M550G M540G X X X V V V X V PSU1
P S+3V H 8 P S+3V H 8
PS +5VS
M550G V V V X X X V X PSU2
P SR 5 1 0K_ 1%
P SU 1 P S U2
P SH K B PS C1 0. 1u_04 1 3 PS LI D_S W # 1 3 PSLID _SW # SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8
PS GN D VC C OUT VC C OU T
GN D
1 GND
PSHKB PS SC R OLL _LED PS C 6
2
3
PS NU M_LE D M540G X V X V X V X V
1 PS CAP _LED 0. 1u _0 4 * AH 9 99 AH 999
4
PS W EB 0 PSU1, PSU2
M550G V X V X V X V X
2
2
5
PS W EB 1# 2
6
PS W EB 2#
7
P SGN D PS GND PS GND
8 1 3
PS PW R S W
9
10 PS +VI N
13
11 PS LID _SW #
12
13 PS +3V H 8 PS H1 PS H 4 PS H 5 P SH 7
PS H2 P SH 3 PS H6
85201 -13051R 2 9 2 9 2 9 C 48D 48 C48D 48 C 48D48 C 48D 48
PS GND 3 8 3 8 3 8
4 1 7 4 1 7 4 1 7
5 6 5 6 5 6
MTH 296D91 MTH296D 91 MTH 296D 91

P SGN D PSGND P SGN D P SGN D
B - 36 HOT KEY BD(HOTKEY, LED)

Schematic Diagrams
LED BOARD
L+5VS L+5VS L+5VH8 L+5VH8
LR8 LR2 LR6 LR4
470 470 470 470
L+5VH8 Z3601 Z3602 Z3603 Z3604

LLB
3
1 WLAN/BT
LLB LPOWER_ON LED LD1 LD5
2
SG
SG
LACIN_SUSLED
Y
12 3 LBATT_FULL KPB-3025YSGC KPB-3025YSGC
4 LBATT_CHARGE
5
4
6 L+5VS
LEMAIL_LED
7 LWLAN_EN LBT_EN
8 LHD_LED# LACIN_SUSLED
9
1 LBT_EN
10 LWLAN_EN
11 LPOWER_ON
12
85201-12051
LGND
LD1,LD4,LD5
Sheet 36 of 41
1 3 LED BOARD
2 4
L+5VS L+5VS L+5VH8 L+5VH8
LR1 LR3 LR7 LR5
470 470 470 470
Z3605 Z3606 Z3607 Z3608

A
3
LD2 LD3 LD4
SG
Y
17-21VGC-TR8 17-21VGC-TR8 KPB-3025YSGC
HDD/CD-ROM E-MAIL LED
4
C
LED
LBATT_CHARGE
LHD_LED# LEMAIL_LED
LBATT_FULL
LH1 LH2
2 9 2 9
3 8 3 8
4 1 7 4 1 7
5 6 5 6
MTH315D111 MTH315D111
LGND LGND LGND
LED BOARD B - 37
Schematic Diagrams
CLICK BOARD
FOR M550G
VENDOR PART NUMBER
Synaptics
E-LAN 800409-5102
CJTP
Z3801
1 CTPBUTTON_R
2
Sheet 37 of 41 CJTP
3
CTPBUTTON_L
Z3802 CTP
4
CLICK BOARD 1 5
6
Z3803
Z3804 CC1 CTP_DATA 1
2
CTP
CGND C+5VS CTP_CLK 4

7 CGND 3
0.1u_04 1
8 CTP_CLK 4
9 CTP_DATA 85201-0405
10
12 C+5VS
11
12 CC2
87151-1207 5/25
0.1u_04
CGND
CSW1~2
2 4
1 3
CSW2
TC031-AA1G-A160T CSW1
1 2 TC031-AA1G-A160T
3 4 CTPBUTTON_L 1 2
3 4 CTPBUTTON_R
5
6
5
6
CGND
CGND
CH1 CH3 CH5 CH4 CH2

2 9 2 9 2 9 C48D48 C48D48
3 8 3 8 3 8
4 1 7 4 1 7 4 1 7
5 6 5 6 5 6
MTH296D91 MTH296D91 MTH296D91

CGND CGND CGND CGND
B - 38 CLICK BOARD
Schematic Diagrams
RJ-45 BOARD
RJRJ-45
GND1 1 RMLMX4-
GND2 shield DA+ 2 RMLMX4+
shield DA- 3 RMLMX3-
DB+ 6 RMLMX3+
DB-
RJLAN
RGND 4 RMLMX2-
DC+ 5 RMLMX2+ 1 2
DC- 7 RMLMX1- 3 4
DD+ 8 RMLMX1+ 5 6
DD- 7 8
C10091-108A4 9 10
SPUAZ-10S2-VB-040-1-R Sheet 38 of 41
RJ-45 BOARD
RGND RGND
RJLAN
1 9
2 10
RH1 RH2
C237D91 C237D107
RGND RGND
RJ-45 BOARD B - 39
Schematic Diagrams
USB DANGLE BOARD

USB DANGLE BOARD
U+5VS
E E
B Z3901 Z3902 B
Sheet 39 of 41 C C
USB DANGLE UQ1 UQ2
*2N3906 *2N3906
BOARD
Z3903 Z3904 UJUSB1
4
UC1 *0.047u UC2 *0.047u UR1 *1.5K Z3905 3
2
1
5075ARP-04-SM2-WH
PIN GND1~2=UGND
UR2 UR3 UR4 UR5
*2.2K *33K *33K *2.2K
UGND UGND UGND UGND UGND
B - 40 USB DANGLE BOARD

Schematic Diagrams
H8/2111
+3VH8 +5VH8 +3VH8
Note:
KB-SO[15:0]
C762 C763 C764 C765 C766
For H8/2111 KB-SO[15:0] [21]
KB-SI[7:0]
KB-SI[7:0] [21]
0.1u_04 10u_08 0.1u_04 0.1u_04 10u_08
86
36
77
13
76
1
U41
VCCB
VCC
VCC
AVCC
AVref
VCL
KBC_MD0 10 96
MD0 P27 SCROLL_LED [21]
97
[21] KBC_MD1
KBC_MD1 9
MD1
P26
P25
98
NUM_LED [21]
CAP_LED [21]
Note:
99 ON_SUS_LED [21,23]
P24 100
KBC_RCIN# 16 P23 101
BAT_LOW_LED [21,23] For H8/2111
[21] KBC_RCIN# P50/ExTxD1* P22 BAT_FUL_LED [21,23]
15 102
[14,21] PM_RSMRST# P51/ExRxD1* P21 EMAIL_LED [21,23]
103 JH8DBG
68 P20 ACIN_LED [21,23] 2 1
[21] KBC_BAT0_TEMP P70/AN0
69 87 KB-SO7
[21] KBC_BAT0_V P71/AN1 PC7
70 88 KB-SO6
[21,26] TOTAL_CUR P72/AN2 PC6 KB-SO5
71 89
[11,21] V_SUB P73/AN3 PC5 10 9
+3VH8
72 90 KB-SO4
[21] KBC_CURSEN P74/AN4 PC4 KB-SO3
73 91 JH8DBG1
P75/AN5 PC3 KB-SO2
92 KBC_MD0
PC2 KB-SO1 2 1
74 93 KBC_TXD1 KBC_MD1
[13,18,19,21] PCI_PME# P76 PC1 KB-SO0 4 3
75 94 PWR_SW# KBC_RXD1
[21,26] LID_SW# P77 PC0 6 5
80DAT 80CLK
KB-SO15 8 7 P80IN#
59
129 PD7 60 KB-SO14 10 9
[21] SWI# KBC_GA20 P80/PME# PD6 KB-SO13
130 61 SPUFZ-10S3-B-0-B
[21] KBC_GA20 P81//CS2#/GA20 PD5
131 62 KB-SO12
[14,19,21] PM_CLKRUN# KBC_LPCPD#
KBC_TXD1
KBC_RXD1
132
133
134
P82/CLKRUN#/HIFSD
P83/LPCPD#
P84/IRQ3#/TxD1
PD4
PD3
PD2
63
64
65
KB-SO11
KB-SO10
KB-SO9
+3VH8 Sheet 40 of 41
P85/IRQ4#/RxD1 PD1
H8/2111
66 KB-SO8 RN55 8P4RX2.2K_04
PD0 KB-SI0
135 P78 4 5
[2,21] TMP_SCLK P86/IRQ5#/SCK1/SCL1
138 25 WLAN_DET# P79 KB-SI1 3 6
[2,21] TMP_SDAT P42/TMRI0/SDA1 PE7 BT_DET# WLAN_DET# [21,22] KB-SI2
26 P80 2 7
PE6 P80IN# BT_DET# [21,22,26] KB-SI3
27 P81 1 8
PE5 P80IN# [21]
121 28
[12,14,21] LPC_AD0 P30/D8/HDB0/LAD0 PE4 EC_ALIEN_DET# [17,21]
122 29 RN56 8P4RX2.2K_04
[12,14,21] LPC_AD1 P31/D9/HDB1/LAD1 PE3 KB-SI4
123 30 WEB2# P82 4 5
[12,14,21] LPC_AD2 P32/D10/HDB2/LAD2 PE2 WEB2# [21]
124 31 WEB1# P83 KB-SI5 3 6
[12,14,21] LPC_AD3 P33/D11/HDB3/LAD3 PE1 WEB0# WEB1# [21] KB-SI6
125 32 P84 2 7
[12,14,21] LPC_FRAME# P34/D12/HDB4/LFRAME# PE0 WEB0# [21] KB-SI7
126 P85 1 8
[21] KBC_PLTRST# P35/D13/HDB5/LRESET#
127 43
[17,21] PCLK_ITE P36/D14/HDB6/LCLK PF7/TMOY*
128 44 RN57 8P4RX10K_04
[12,14,19,21] INT_SERIRQ P37/D15/HDB7/SERIRQ PF6/ExTMOX* THERMAL_ALERT# [2,21]
45 1 8
PF5/ExTMIY* KBC_THRMTRIP#
PF4/ExTMIX*
46
KBC_THRMTRIP# [12,21]
P27 P80IN# 2 7
KBC_VRON 41 47 P24 WATCHDOG 3 6
[21,29] KBC_VRON PA0/KIN8# PF3/TMOB
KBC_PWRBTN# 40 48 P23 H8_PIN23 4 5
[21] KBC_PWRBTN# PA1/KIN9# PF2/TMOA
49
PF1/TMIB 50 RN58 8P4RX10K_04
EXTKB_CLK PF0/TMIA FAN_SEN [11,21] KBC_MD0
39 P10 1 8
[21] EXTKB_CLK EXTKB_DAT PA2/KIN10#/PS2AC KBC_INSTANT_ON KBC_NMI
38 51 P11 2 7
[21] EXTKB_DAT EXTMS_CLK PA3/KIN11#/PS2AD PG7/ExSCLB* KBC_INSTANT_ON [21] KBC_STBY#
37 52 P12 3 6
[21] EXTMS_CLK PA4/KIN12#/PS2BC PG6/ExSDAB*
EXTMS_DAT 35 53 P16 KBC_RCIN# 4 5
[21] EXTMS_DAT PA5/KIN13#/PS2BD PG5/ExSCLA*
TP_CLK 34 54 THERMAL_ON
[21,23] TP_CLK TP_DATA PA6/KIN14#/PS2CC PG4/ExSDAA* THERMAL_ON [2,21]
33 55 RN59 8P4RX10K_04
[21,23] TP_DATA PA7/KIN15#/PS2CD PG3 ALIEN_ON [17,21]
56 CCD_EN P136 80CLK 8 1
PG2 CCD_EN [17,21]
57 WLAN_EN P137 80DAT 7 2
PG1 BT_EN WLAN_EN [21,22,23]
142 58
BT_EN [21,23,26]
P132 KBC_LPCPD# 6 3
RESET_OUT# PG0
5 4
WRST# 8 6
[21,22] WRST# RESET# P47 5 RN60 8P4RX10K_04
P46 KBC_BKLEN [21,26]
KBC_NMI 11 4 P56 CCD_EN 1 8
NMI P45/TMR11 3 P58 BT_EN 2 7
KBC_STBY# 12 P44/TMO1 2 VOL_MUTE WLAN_EN 3 6
STBY# P43/TMC11 VOL_MUTE [21,25]
P57
P54 THERMAL_ON 4 5
137
WATCHDOG P41/TMO0 80DAT [21]
24 136
[21] WATCHDOG P90/IRQ2#/ADTRG# P40/TMCI0 80CLK [21]
H8_PIN23 23 P51 KBC_INSTANT_ON R499 10K_04
PWR_SW# 22 P91/IRQ1# 85 KB-SI7 WEB0# R496 10K_04
[21,27] PWR_SW# P92/IRQ0# P67/TMOX/KIN7#/IRQ7# KB-SI7 [21]
P32
21 84 KB-SI6 P31 WEB1# R497 10K_04
P93 P66/FTOB/KIN6#/IRQ6# KB-SI6 [21]
20 83 KB-SI5 P30 WEB2# R498 10K_04
P94 P65/FTID/KIN5# KB-SI5 [21]
19 82 KB-SI4
[21,26] AC_IN# MODEL_ID P95 P64/FTIC/KIN4# KB-SI3 KB-SI4 [21]
18 81
[21] MODEL_ID P96/EXCL P63/FTIB/KIN3# KB-SI3 [21]
80 KB-SI2
P62/FTIA/KIN2#/TMIY KB-SI1 KB-SI2 [21]
17 79
[21,26] BAT0_DAT P97SDA0 P61/FTOA/KIN1# KB-SI0 KB-SI1 [21]
[21,26] BAT0_CLK 14 78 KB-SI0 [21]
P52/ExSCK1*/SCL0 P60/FTCI/KIN0#/TMIX
120 104
[21] SMI# PB0/D0/WUE0#/LSMI# P17/PW7 Z2110 [21]
119 105
[21] SCI# PB1/D1/WUE1#/LSCI P16/PW6 KBC_CHARGE [21]
118 106
[11,21,27,28] DD_ON 117 PB2/WUE2# P15/PW5 107 CHAG_EN [21,26]
[16,21] KBCBEEP PB3/WUE3# P14/PW4
116 108
PB4/WUE4# P13/PW3
115 109
114 PB5/WUE5# P12/PW2 110
[11,14,18,21,22,26,27,28] SUSB# PB6/WUE6# P11/PW1
[14,21] SUSC# 113 112 Z2106 [21]
PB7/WUE7# P10/PW0
141 143
X2 XTAL
140 144
X1 EXTAL Z4001
AVSS
C767 22p +3VH8 [2,11,21,22,26,27]

VSS
VSS
VSS
VSS
VSS
+5VH8 [11,21,23,27]
X6
H8S/2111 LPC R500 Note:
111
139
42
95
67
7
10M 10MHz
For H8/2111
Z4002 C768 22p
H8/2111 B - 41
Schematic Diagrams
EXT.COM PORT
SIO EGN D EGND
EJC OM1
E+5V S
E LP1 12
Value = ( CL-12 ) * 2 EC 2 EC3 *F CA 3216KF4-121T03 5
EDTRO# 1 8 Z 4108 Z 410 7 9
EC 1
CL = 20 pF *16p *1 6p ETXD O 2 7 Z 4110 Z 410 8 4
EC N1 ECTSO# 3 6 Z 4109 Z 410 9 8
*0. 1u_04 E X1 *14.318MHz ERIN GO# 4 5 Z 4107 Z 411 0 3
1 Z 410 2 2 1 Z 4103 EDS RO# 1 8 Z 4113 Z 411 1 7
2 ELP C_AD 0 ERXDO 2 7 Z 4112 Z 411 2 2
3 ELP C_AD 1 EDC DO# 3 6 Z 4114 Z 411 3 6
4
ELP C_AD 2 EGN D E +3VS EU 1 ERTSO# 4 5 Z 4111 Z 411 4 1
5 ELP C_AD 3 1 8 ER1 13
6 ELP C_DR Q0 # 2 X1 X2 7 * 0_04 E LP2
7 ELP C_FR AME# 3 VD D S1 6 Z 4104 *F CA 3216KF4-121T03
8 GND S0 *C OM1_DB9
ELP CR ST# EC 4 4 5
9 EIN T_SER IR Q R EF C LK Z 4105 PIN 10 , 1 1,14~23=EGND
10 *0.1u _04 *IC S514MLF EGN D 33.33MHz
5
6
7
8
5
6
7
8
*87 212-10G0
ER2 * 33_04 EP CLK_SIO
E GN D EGN D ECP 1 EC P2
ER10 * 33_04 EP CLK_TPM *8 P4CX180p *8P4C X180p
Z 4106 ER3 * 33_04 ES IO_C LK
4
3
2
1
4
3
2
1
14.318MHz
EU 5 EGN D
E LPC _A D0 26 1 E +5VS
LAD 0 NC
E LPC _A D1 23 3 EU2
LAD 1 NC
E LPC _A D2 20 12 1 5 E+3VS
E LPC _A D3 17 LAD 2 NC VIN VO
Sheet 41 of 41
LAD 3 E+5VS
8 2
TE STI GN D
E LPC RS T# ER 11 *10 Z 4128 16 ER 12 *10K_ 04 EC 13
E LPC _F RA ME#22 LRESET# 9 Z 4134 3 4 Z 4101
LFR AME# TESTBI/ BA DD E+3VS SD BP
E INT_SE RI RQ 27 *0. 1u_ 04
EXT. COM PORT E PCLK_ TPM 21

SER IR Q
GP IO
6
2 EC 5
* G916- 3.3
EC 6 EC7 EC 8
26
LCLK GPI O2
ER 13 *0 E U3 E GN D
ER 14 *10K_04 5 Z 4135 *1u *0.1 u_ 04 * 10u_08 *0.1u_04
V CC
Z 4129 28 V SB Z 41 20 28 27 Z 4125
E+3VS LPC PD # C1+ V+
ER15 * 0_04 Z 4130 15 10 E +3VS EC 14
C LKRU N# V DD
ER16 * 10K_0 4 19
ER17 * 0_04 Z 4131 7 V DD 24 *0. 1u_ 04 Z 41 21 24 3 Z 4126
PP V DD EGN D C1- V-
EC 19 EC 20 EC15 EC 16
EGND Z 4132 13 Z 41 22 1
XTA LI/32K IN *1 0u_08 *0. 1u_04 EC 17 C2+ *0 .1u_04 *0. 1u_04
4
GND
EX2 11 *0. 1u_ 04 Z 41 23 2
*32.768K Hz GND 18 C2- EGND E GN D
1 4 Z 4133 14 GND 25
XTA LO GND E +3VS
2 3 ETXD 14 9 ETXDO
E C21 EC 22 *S LB -9635-TT-1.2 E C9 EC 10 EC 11 E C12 ERTS# 13 T1IN T1OUT 10 ER TSO#
EGN D EDTR# 12 T2IN T2OUT 11 ED TRO#
*1 0p *10p *0.1u_04 *0. 1u_04 *0.1u_04 * 10u_08 T3IN T3OUT
Z 4127 20
R2OUTB
EDS R# 19 4 ED SR O#
EGND EGND EGND EGN D E GN D EGND ERI NG# 18 R1OUT R1IN 5 ER INGO#
ECTS# 17 R2OUT R2IN 6 EC TSO#
24
35
R3OUT R3IN
8
EU 4 ERXD 16 7 ER XDO
R4OUT R4IN
EDC D# 15 8 ED CD O#
R5OUT R5IN
VD D
V DD
V DD
ER 8 23
*100K _04 FOR C EON
ELP C_ AD 0 32 33 Z 4124 22
L AD 0 NC E+3 VS /FORC EOFF
ELP C_ AD 1 36 37 25
ELP C_ AD 2 38 L AD 1 NC 39 21 GN D
ELP C_ AD 3 40 L AD 2 NC 41 /INVAL ID
L AD 3 NC
EPC LK _SI O 25 26
ELP C_ DR Q0# 16 L CL K NC 4 *MAX32 43 E GN D
ELP C_ FR AME# 30 L DR Q/XOR _OUT NC 31
BASE ADD
ELPC R ST# ER 4 *1 0 Z 411 5 27 L FR AME NC 18 ADD 2E
L RE SE T NC
EINT_S ER IRQER 5 *0 _04 Z 411 6 28 29
ER 6 *0 _04 Z 411 7 19 S ER IRQ NC 20 DEL 4E
C LK RU N GP O2 4
ESI O_C LK 43 42
C LK IN NC
E GN D
11 5
12 GPIO00 IR RX1 7
13 GPIO01 IRR X2_IR SL 0 6
GPIO02 I RTX
14
15 GPIO03 1 EC TS#
ER 7 GPIO04 C TS 1 44 ED CD #
*10K_04 17 D CD 1 45 ED SR#
GPIO20 D SR 1
Z 411 8 21 2 ED TR#
E+3VS GPIO21/LP CP D DTR1_BOU T1/B AD DR 3 ER ING#
22 RI 1 47 ER TS#
GPIO23 R TS 1/TRI S 46 ER XD
S IN 1 48 ETXD
SOUT1/TES T
VC OR F
ER 9
VSS
V SS
VSS
*10K_04
*P C8 738 1-VBH
10
23
34
9 Z 4119 EGN D
EC 18
*0.1u_04
EGN D E GN D
B - 42 EXT.COM PORT
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Clevo m540, m545n, m550, m555n Service Manual

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Clevo m540, m545n, m550, m555n Service Manual

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Preface

About this Manual

The following information is included:

Appendix A, Part Lists

IMPORTANT SAFETY INSTRUCTIONS

TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER,

Instructions for Care and Operation

Use only approved brands of Unplug the power cord before

The computer has specific power requirements:

ICH7-M 3/4, FWH ....................................................................... B-15

+1.8V, +VTT MEM, +1.5VS ....................................................... B-29

Intel® Core™ Solo Processor 65nm (65 Nanometer) Process Technology

Intel® Celeron® M Processor 65nm (65 Nanometer) Process Technology

Core Logic Intel 945GM + ICH7-M

Security Security (Kensington® Type) Lock Slot BIOS Password

LCD M550N/M555N Computers: M540N/M545N Computers:

Video Adapter Intel 945GM Integration

Keyboard & Winkey Keyboard Built-In TouchPad with Scrolling Function

Express Card ExpressCard/34/54 Slot

Communication AZALIA 56K Plug & Play Fax/Modem v.90/92 Compliant

Power Supports ACPI 2.0 Supports Battery Low Suspend

6 Cell Smart Lithium-Ion Battery Pack, 4000mAH (44.4W)

Physical Model A Computers: Model B Computers:

DC-In Jack) (Factory Option) Swap Battery - 2 ~ 3 Minutes Swap

Feature M540N/M545N M550N/M555N

15.0" XGA (1024 * 768) TFT

4-in-1 Card Front Left Side

Note: Only M550N Design Style is Pictured

1 - 6 External Locator - Top View with LCD Panel Open

External Locator - Front & Right Side Views Figure 2

External Locator - Front & Right Side Views 1 - 7

External Locator - Left Side & Rear View

1 - 8 External Locator - Left Side & Rear View

External Locator - Bottom View

To prevent your com-

External Locator - Bottom View 1 - 9

Figure 7 M550N Mainboard Overview - Top (Key Parts)

1 - 10 M550N Mainboard Overview - Top (Key Parts)

M550N Mainboard Overview - Bottom (Key Parts) Figure 8

1. CPU Socket (no

M550N Mainboard Overview - Bottom (Key Parts) 1 - 11

Figure 9 M550N Mainboard Overview - Top (Connectors)

1 - 12 M550N Mainboard Overview - Top (Connectors)

M550N Mainboard Overview - Bottom (Connectors) Figure 10

M550N Mainboard Overview - Bottom (Connectors) 1 - 13

Figure 11 M540N Mainboard Overview - Top (Key Parts)

1 - 14 M540N Mainboard Overview - Top (Key Parts)

M540N Mainboard Overview - Bottom (Key Parts) Figure 12

1. CPU Socket (no

M540N Mainboard Overview - Bottom (Key Parts) 1 - 15

Figure 13 M540N Mainboard Overview - Top (Connectors)

1 - 16 M540N Mainboard Overview - Top (Connectors)

M540N Mainboard Overview - Bottom (Connectors) Figure 14

M540N Mainboard Overview - Bottom (Connectors) 1 - 17

An example of these types of boxes are shown in the sidebar.

To remove the Battery: To remove the Optical Device:

2. Remove the keyboard page 2 - 16

To remove the Bluetooth:

Removing the Battery

R 110 2.2K_04 MC H_CF G5 R513 0_04 PM_EXTTS0#