Introduction to Embedded

System Design

Interrupts in MSP430

Dhananjay V. Gadre Badri Subudhi

Associate Professor Assistant Professor
ECE Division Electrical Engineering Department
Netaji Subhas University of Indian Institute of Technology,
Technology, New Delhi Jammu
 Why Interrupts?

● Polling external events to fulfill computational

requirements.

● Multiple inputs require round robin querying

method

● Good for small number of inputs.

 Format-I (Double Operand)
Instruction Cycles and Lengths
 Format-I (Double Operand)
Instruction Cycles and Lengths
 Introduction to
Interrupts
An interrupt refers to the transfer of program control from a
currently running program to another service program as a result of
an external or internal generated request or event.
 Where are Interrupts Used?
● Urgent tasks that must be executed promptly at higher priority
than main code as well as concurrently with the main code.
● Infrequent tasks, such as handling slow input from humans.
This saves overhead of polling.
○ For example, if you continuously poll (read) an input to
wait for a switch to be pressed, your CPU Load is very
high. On the other hand, in case the switch is connected
to a pin which is configured for an interrupt, your CPU
is free to do other tasks or maybe even go to sleep!

● Waking the CPU from sleep. Particularly important for

MSP430 which typically spends much of its time in LPM and
can be awakened only by interrupt.
Interrupt Versus
Function/Subroutine
● An interrupt is initiated by an external/internal signal
rather than from execution of an instruction (function
call).
● An interrupt procedure usually stores all information
necessary to define the state of CPU rather than storing
only the program counter.
● The address of the interrupt service program is determined
by hardware.
 Interrupts
● The code which handles an interrupt is called an Interrupt
Handler or Interrupt Service Routine (ISR).
● Interrupts can be requested by most peripheral modules like
Timers, GPIOs and some in the core of the MCU, such as clock
generators.
● Each interrupt has a flag, which is raised (set) when condition
of interrupt occurs.
● There are three types of interrupts in MSP430:
○ System Reset
○ Non Maskable Interrupts
○ Maskable Interrupts
 Maskable vs Non-
Maskable Interrupts
● Most interrupts are maskable (i.e. they can be suspended).
● They are effective only if general interrupt enable (GIE) is set
in Status Register (SR).
● Non-maskable interrupts cannot be suppressed by GIE, but
are enabled by individual interrupt enable bits.
 Non Maskable Interrupts
● A Non-maskable NMI interrupt can be generated by three
sources:
○ Oscillator Fault, OFIFG.
○ Access violation to memory.
○ NMI (non maskable interrupt) pin if it has been configured
for interrupt rather than reset.
 RST/NMI Pin
● At power-up, the RST/NMI pin is configured as the reset pin.
● The function of the RST/NMI pins is selected in the watchdog
control register WDTCTL.
● If the RST/NMI pin is set to the reset function, the CPU is held
in the reset state as long as the RST/NMI pin is held low. After
the input changes to a high state, the CPU starts program
execution at the word address stored in the reset vector,
0FFFEh, and the RSTIFG flag is set.
● If the RST/NMI pin is configured by user software as NMI, a
signal edge selected by the WDTNMIES bit generates an NMI
interrupt if the NMIIE bit is set. The RST/NMI flag NMIIFG is
also set.
 Vectored Interrupts
● MSP430 uses vectored interrupt.
● In a vectored interrupt, the source that interrupts supplies the
branch information to the computer.
● Vector address is stored in the vector table.
● Each interrupt vector has a distinct priority, which is used to
select which vector is taken if more than 1 interrupt is active.
● Priority is fixed: cannot be changed by user. A higher address
means higher priority.
● Reset vector has highest address 0xFFFE.
 Interrupt Flag
● The interrupt flag is cleared automatically for vectors that have
a single source.
● Flags remain set for servicing by software if the vector has
multiple sources.
 Useful points to
remember:
● Keep interrupts short. Avoid delay functions.
● While servicing ISR, other urgent ISRs are disabled unless
nested interrupts are allowed.
● If lengthy processing is needed, do minimum in ISR and send
a message to main function, by setting a flag.
 Interrupt Acceptance
1. Any currently executing instruction is completed.
2. The PC, which points to the next instruction, is pushed onto the
stack.
3. The SR(Status Register) is pushed onto the stack.
4. The interrupt with the highest priority is selected if multiple
interrupts occurred during the last instruction and are pending for
service.
5. The interrupt flag resets automatically on single-source flags.
Multiple source flags remain set for servicing by software.
6. The SR is cleared(for use within the ISR). This terminates any
low-power mode. Because the GIE bit is cleared, further interrupts
are disabled.
7. The content of the interrupt vector is loaded into the PC: the
program continues with the interrupt service routine at that address.
Interrupt Acceptance
(State of the RAM)
 Returning from an
Interrupt
1. The SR with all previous settings pops from the stack. All
previous settings of GIE, CPUOFF, etc. are now in effect,
regardless of the settings used during the interrupt service
routine.
2. The PC pops from the stack and begins execution at the point
where it was interrupted.
Interrupt Registers for GPIO
● All these registers are 8-bit registers.
● PxIE - Interrupt enable register
● PxIES - Interrupt edge selection register
● PxIFG - Interrupt flag register
 PxIE
● PxIE - Interrupt enable register
● 8 Bit Register corresponding to 8 pins on each port.
● Setting any bit as ‘0’ in this register disables the
interrupt for the corresponding pin.
● All the bits in this register are 0 by default.
● Setting any bit as ‘1’ in the register enables the interrupt
for the corresponding pin.
 PxIES
● PxIES - Interrupt edge selection register
● 8 bit register corresponding to 8 pins on each port.
● The bits of this register select the interrupt edge
transition type on the corresponding pins.
● Setting a bit as ‘0’ in the register enables interrupt flag
when transition is from low to high.
● Setting the bit as ‘1’ in the register enables interrupt
flag when transition is from high to low.
 PxIFG
● PxIFG - Interrupt flag register
● 8 bit register corresponding to 8 pins on each port.
● A bit of the interrupt flag register is set when the
selected interrupt edge occurs on the corresponding
pin.
● Using software PxIFG bits can be set or reset.
● PxIFG bits must be reset after the interrupt via
software. Setting the PxIFG via software can
generate software initiated interrupts.
Interrupt Code Flow
 ISR in C
For example:
#pragma vector = TIMER0_A0_VECTOR
__interrupt void CCR0_ISR(void)

Some extensions are needed by compiler to differentiate a standard

function and an ISR.
● #pragma associates the function with a particular interrupt vector.
This directive is a special-purpose directive that you can use to
turn on or off certain features.
● __interrupt keyword in the beginning of the next line that names
the function.
● No significance to the name of the function; it is the name of the
vector that matters. Name of function is not used in program.
● __enable_interrupt in main program sets the GIE bit and turns on
interrupts.
ISR names present in CCS
for MSP430
(In MSP430.h header file)
What should be done in an
ISR
● Save system context (done automatically)
● Re-enable interrupts if required.
● The interrupt code
● If multi-source interrupt, then read associated register to
determine source and clear the flag.
● Restore system context (done automatically)
● Return
 Variables for Interrupts

● Volatile: By declaring a variable as volatile, the compiler

gets to know that the value of the variable is susceptible to
frequent changes (with no direct action of the program)
and hence the compiler does not keep a copy of the
variable in a register (like cache). This prevents the
program to misinterpret the value of this variable.
● As a thumb rule: variables associated with input ports and
interrupts should be declared as volatile.
 Check List
● Enabled interrupts both in their module and generally (GIE
bit)?
● Provided ISR for all the enabled interrupts?
● Included code to acknowledge interrupt that share a vector
even if only 1 source is active?
● Are the variables declared as volatile?
Switch Interfacing using
Interrupts
Example Code 1(Bad ISR):
HelloInterrupt
External Switch
Example Code 2(Better ISR):
HelloInterrupt_Rising
 Example Code 3:
HelloInterrupt_Falling
 Exercise

Modify the existing code to toggle LED1 when SW1 is

pressed and to toggle LED2 when SW2 is pressed.
Thank you!