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Assignment (EEE 323) For 2017-18 Batch

This document outlines 18 assignments for an EEE 323 course. The assignments cover topics such as simplifying Boolean expressions, designing combinational logic circuits like adders and decoders, and creating sequential logic circuits using flip-flops including counters, decoders, and multiplexers. Students are asked to complete tasks like minimizing logic functions using Quine-McCluskey method, drawing state diagrams and deriving state tables, and implementing circuits using logic gates and flip-flops.

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Maruf Morshed
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75 views2 pages

Assignment (EEE 323) For 2017-18 Batch

This document outlines 18 assignments for an EEE 323 course. The assignments cover topics such as simplifying Boolean expressions, designing combinational logic circuits like adders and decoders, and creating sequential logic circuits using flip-flops including counters, decoders, and multiplexers. Students are asked to complete tasks like minimizing logic functions using Quine-McCluskey method, drawing state diagrams and deriving state tables, and implementing circuits using logic gates and flip-flops.

Uploaded by

Maruf Morshed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Assignment (EEE 323) for 2017-18 Batch

1. Simplify: Ā B̄ C̄ + Ā B C̄ + [ ( B + C + Ā D) ( B̄ + D̄ + A C̄ ) ]
2. Design a Two-bit binary adder (i.e. it adds two two-bit numbers)
3. True or false:
i. If A  B = 0, then A = B
ii. (A  B)' = Ā  B̄
iii. (X + Y) (X̄ + Y) (X + Ȳ)(X̄ + Ȳ) = 0
iv. A (A  B) + Ā (A  B) = B
4. Given the function F(W,X,Y,Z) =  m(1,5,7,8,9,15) + d(4,14)
find the minimum Sum-of-Products using Q & M method. Show your work including the
charts.
5. Design an AND-to-OR gate combinational network for the Boolean algebra function:
F = W’X’Y’Z’ + WX’Y’Z + WX’Y’Z’ + W’XY’Z’
Use as few gates as possible.
6. Design a sequential circuit with two JK FF A and B and two inputs E and X. If E = 0, the circuit
remains in the same state regardless of the value of X. When E = 1 and X = 1, the circuit goes
through the transition from (00) to (01) to (10) to (11) and back to (00) and repeat. When E = 1
and X = 0, the circuit goes through the state transition from (00) to (11) to (10) to (01) and back
to (00) and repeat.
7. Construct a 5-to-32 line decoder with four 3-to-8 line decoders with enable and 2-to-4 decoder.
Use block diagrams only.
8. Draw the logic diagram of a 2-to-4 line decoder with only NOR gates, include an enable input.
9. Construct a 16-to-1 line multiplexer with two 8-to-1 line multiplexers and one 2-to-1
multiplexer. Use block diagram to explain your answer. Implement circuit with multiplexers.
One multiplexer for the Sum, S and another for the Carry-out, Cout.
10. Consider the design of a 4-bit BCD counter that counts in the following way: 0000, 0010,
0011,…., 1001 and back to 0000.
i. Draw the state diagram and next state table.
ii. Implement the counter using D Flip Flops.

11. The 4-bit Johnson counter advances thru the sequence: 0000, 1000, 1100, 1110,1111, 0111,
0011, 0001 and repeat
i. Implement this counter using D Flip Flops.
ii. Implement this counter using T Flip Flops.
12. Show how to implement a JK Flip Flop starting with D Flip Flop.
13. Show how to implement a JK Flip Flop starting with T Flip Flop.
Assignment (EEE 323) for 2017-18 Batch
14. Analyze the following counter circuit to determine the count sequence for the circuit.

15. Consider the synchronous sequential circuit whose state table is given below. The circuit has
one input x and one output y. Design the circuit using
a) D flip-flops.
b) T flip-flops
c) Which design is simpler; i.e.; uses less number of gates, (a) or (b)?

16. Implement the following Boolean function with a 4 x 1 multiplexer, a 2-to-4-line decoder, two
inverters and an OR gate.
F(A,B,C,D) = ABC' + AB'C + ABD + AB'D + A'B'CD' + A'BCD + A'B'C'D
Connect inputs A and B to the selection lines of the multiplexer.
17. Use T flip-flops to design a synchronous decimal counter that counts the repeated Excess-3
binary sequence; 0011 to 1100. Treat unused states as don’t care conditions.
18. Design a 2-bit counter using JK-Flip flops with one input. When the input is 0, the counter counts
down, with the repeated sequence (11-10-01-00). When the input is 1, the counter counts
repeated random sequence (00-01-11-10).
a) Draw a state diagram for the sequential circuit.
b) Derive the state table for the sequential circuit.
c) Derive the simplified flip flops input equations.
d) Draw the logic circuit diagram of a 2-bit counter.

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