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Principle of MOSFET Device Technology

The document summarizes the construction, working principles, and circuit symbols of MOSFET devices. It describes how a MOSFET consists of an oxide layer deposited on a substrate with a gate terminal. Applying a negative gate voltage creates a depletion MOSFET, while positive voltage creates an enhancement MOSFET. Circuit symbols are provided for n-channel and p-channel enhancement and depletion MOSFETs. The working principles explain how applying different gate voltages in each type of MOSFET controls the flow of electrons or holes between the source and drain. Finally, the ID versus VDS characteristics curve is discussed.

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CHING HUI YEE
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512 views3 pages

Principle of MOSFET Device Technology

The document summarizes the construction, working principles, and circuit symbols of MOSFET devices. It describes how a MOSFET consists of an oxide layer deposited on a substrate with a gate terminal. Applying a negative gate voltage creates a depletion MOSFET, while positive voltage creates an enhancement MOSFET. Circuit symbols are provided for n-channel and p-channel enhancement and depletion MOSFETs. The working principles explain how applying different gate voltages in each type of MOSFET controls the flow of electrons or holes between the source and drain. Finally, the ID versus VDS characteristics curve is discussed.

Uploaded by

CHING HUI YEE
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Principle of MOSFET Device Technology

Construction of the MOSFET

Figure 1
Figure 1 shows the basic construction of a MOSFET. An oxide layer which is SiO 2
was insulated from the substrates is deposited on the substrate to the gate terminal connected.
The voltage at the gate (G) controls the operation of MOSFET. If applied negative gate bias
voltage, the MOSFET will act as depletion MOSFET; positive gate bias voltage, the
MOSFET will act as enhancement MOSFET.
Circuit symbol of the MOSFET

Figure 2 Figure 3
Figure 2 shown circuit symbol of n-channel enhancement mode MOSFET. Figure 3 shown
circuit symbol of n-channel depletion mode MOSFET.

Figure 4 Figure 5
Figure 4 shows circuit symbol of p-channel enhancement mode MOSFET. Figure 5 shown
circuit symbol of p-channel depletion mode MOSFET.
Working Principle of the MOSFET

Figure 6 Figure 7
Figure 6 shows the working of depletion mode of n -channel MOSFET. The two n +
are highly doped while p type substrate is lightly doped as shown in figure 7,thus n-channel
are formed between two N+ region, which connected source(S) and drain(D) .An n-channel
region exists under oxide with no voltage applied to the gate ,then current will flow in
between drain (D) and source (S).When the VGG is positive, the minority carriers (holes) will
be repelled while majority carriers (electron) will be attracted towards the SiO 2.Thus,the more
positive the VGG the more drain current (ID) will flow from source(S) to drain(D).If VGG is
negative, then lesser the drain current (ID) will flow from source to drain.

Figure 8 Figure 9

Figure 8 shows the working principle of n-channel enhancement mode MOSFET. The
positive gate voltage induces the electron inversion layer ,which connected the n-type source
and n-type drain region, as shown in figure 9.The current will flow from drain (D) to source
(S) when VGG is zero in between gate(G) and source (S) .When V GG is positive, the minority
carriers(holes) will be repelled while majority carriers (electron) will be attracted toward the
SiO2 layer. Thus, the more positive the V GG ,the more drain current (ID) will be flow from
drain(D) to source(S).

Figure 10 Figure 11
Figure 10 shows the p-channel enhancement mode MOSFET while figure 11 shows
the p-channel depletion mode MOSFET .In enhancement mode ,when the V GG is negative
gate voltage, the holes current will increase and flow from source(S) to drain(D),the
conventional current will enter the source and leave the drain. In depletion mode, when the
VGG is positive gate voltage, the depletion will be occurred ,thus the flow the current will
reduce.
ID versus VDS curve

When ID increase, the VDS also increase. As the VDS increase, the conductance of the
channel at the drain decreases, the slope of ID versus VDS curve decreases. When VDS keeps
increase equal to VT (VDS =VT ),the conductance at drain is zero, the slope of ID versus VDS
curve is zero. Then, VDS(sat) =VGS -VT, which VDS(sat) is the drain-to-source voltage producing
zero inversion charge density at the drain terminal. When VDS large than VDS(sat) ,the drain
current will be constant. In this case, the ID versus VDS is at saturation region.

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